1 /**************************************************************************** 2 * Driver for Solarflare network controllers and boards 3 * Copyright 2011-2013 Solarflare Communications Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published 7 * by the Free Software Foundation, incorporated herein by reference. 8 */ 9 10 /* Theory of operation: 11 * 12 * PTP support is assisted by firmware running on the MC, which provides 13 * the hardware timestamping capabilities. Both transmitted and received 14 * PTP event packets are queued onto internal queues for subsequent processing; 15 * this is because the MC operations are relatively long and would block 16 * block NAPI/interrupt operation. 17 * 18 * Receive event processing: 19 * The event contains the packet's UUID and sequence number, together 20 * with the hardware timestamp. The PTP receive packet queue is searched 21 * for this UUID/sequence number and, if found, put on a pending queue. 22 * Packets not matching are delivered without timestamps (MCDI events will 23 * always arrive after the actual packet). 24 * It is important for the operation of the PTP protocol that the ordering 25 * of packets between the event and general port is maintained. 26 * 27 * Work queue processing: 28 * If work waiting, synchronise host/hardware time 29 * 30 * Transmit: send packet through MC, which returns the transmission time 31 * that is converted to an appropriate timestamp. 32 * 33 * Receive: the packet's reception time is converted to an appropriate 34 * timestamp. 35 */ 36 #include <linux/ip.h> 37 #include <linux/udp.h> 38 #include <linux/time.h> 39 #include <linux/ktime.h> 40 #include <linux/module.h> 41 #include <linux/net_tstamp.h> 42 #include <linux/pps_kernel.h> 43 #include <linux/ptp_clock_kernel.h> 44 #include "net_driver.h" 45 #include "efx.h" 46 #include "mcdi.h" 47 #include "mcdi_pcol.h" 48 #include "io.h" 49 #include "farch_regs.h" 50 #include "nic.h" 51 52 /* Maximum number of events expected to make up a PTP event */ 53 #define MAX_EVENT_FRAGS 3 54 55 /* Maximum delay, ms, to begin synchronisation */ 56 #define MAX_SYNCHRONISE_WAIT_MS 2 57 58 /* How long, at most, to spend synchronising */ 59 #define SYNCHRONISE_PERIOD_NS 250000 60 61 /* How often to update the shared memory time */ 62 #define SYNCHRONISATION_GRANULARITY_NS 200 63 64 /* Minimum permitted length of a (corrected) synchronisation time */ 65 #define MIN_SYNCHRONISATION_NS 120 66 67 /* Maximum permitted length of a (corrected) synchronisation time */ 68 #define MAX_SYNCHRONISATION_NS 1000 69 70 /* How many (MC) receive events that can be queued */ 71 #define MAX_RECEIVE_EVENTS 8 72 73 /* Length of (modified) moving average. */ 74 #define AVERAGE_LENGTH 16 75 76 /* How long an unmatched event or packet can be held */ 77 #define PKT_EVENT_LIFETIME_MS 10 78 79 /* Offsets into PTP packet for identification. These offsets are from the 80 * start of the IP header, not the MAC header. Note that neither PTP V1 nor 81 * PTP V2 permit the use of IPV4 options. 82 */ 83 #define PTP_DPORT_OFFSET 22 84 85 #define PTP_V1_VERSION_LENGTH 2 86 #define PTP_V1_VERSION_OFFSET 28 87 88 #define PTP_V1_UUID_LENGTH 6 89 #define PTP_V1_UUID_OFFSET 50 90 91 #define PTP_V1_SEQUENCE_LENGTH 2 92 #define PTP_V1_SEQUENCE_OFFSET 58 93 94 /* The minimum length of a PTP V1 packet for offsets, etc. to be valid: 95 * includes IP header. 96 */ 97 #define PTP_V1_MIN_LENGTH 64 98 99 #define PTP_V2_VERSION_LENGTH 1 100 #define PTP_V2_VERSION_OFFSET 29 101 102 #define PTP_V2_UUID_LENGTH 8 103 #define PTP_V2_UUID_OFFSET 48 104 105 /* Although PTP V2 UUIDs are comprised a ClockIdentity (8) and PortNumber (2), 106 * the MC only captures the last six bytes of the clock identity. These values 107 * reflect those, not the ones used in the standard. The standard permits 108 * mapping of V1 UUIDs to V2 UUIDs with these same values. 109 */ 110 #define PTP_V2_MC_UUID_LENGTH 6 111 #define PTP_V2_MC_UUID_OFFSET 50 112 113 #define PTP_V2_SEQUENCE_LENGTH 2 114 #define PTP_V2_SEQUENCE_OFFSET 58 115 116 /* The minimum length of a PTP V2 packet for offsets, etc. to be valid: 117 * includes IP header. 118 */ 119 #define PTP_V2_MIN_LENGTH 63 120 121 #define PTP_MIN_LENGTH 63 122 123 #define PTP_ADDRESS 0xe0000181 /* 224.0.1.129 */ 124 #define PTP_EVENT_PORT 319 125 #define PTP_GENERAL_PORT 320 126 127 /* Annoyingly the format of the version numbers are different between 128 * versions 1 and 2 so it isn't possible to simply look for 1 or 2. 129 */ 130 #define PTP_VERSION_V1 1 131 132 #define PTP_VERSION_V2 2 133 #define PTP_VERSION_V2_MASK 0x0f 134 135 enum ptp_packet_state { 136 PTP_PACKET_STATE_UNMATCHED = 0, 137 PTP_PACKET_STATE_MATCHED, 138 PTP_PACKET_STATE_TIMED_OUT, 139 PTP_PACKET_STATE_MATCH_UNWANTED 140 }; 141 142 /* NIC synchronised with single word of time only comprising 143 * partial seconds and full nanoseconds: 10^9 ~ 2^30 so 2 bits for seconds. 144 */ 145 #define MC_NANOSECOND_BITS 30 146 #define MC_NANOSECOND_MASK ((1 << MC_NANOSECOND_BITS) - 1) 147 #define MC_SECOND_MASK ((1 << (32 - MC_NANOSECOND_BITS)) - 1) 148 149 /* Maximum parts-per-billion adjustment that is acceptable */ 150 #define MAX_PPB 1000000 151 152 /* Number of bits required to hold the above */ 153 #define MAX_PPB_BITS 20 154 155 /* Number of extra bits allowed when calculating fractional ns. 156 * EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS + MAX_PPB_BITS should 157 * be less than 63. 158 */ 159 #define PPB_EXTRA_BITS 2 160 161 /* Precalculate scale word to avoid long long division at runtime */ 162 #define PPB_SCALE_WORD ((1LL << (PPB_EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS +\ 163 MAX_PPB_BITS)) / 1000000000LL) 164 165 #define PTP_SYNC_ATTEMPTS 4 166 167 /** 168 * struct efx_ptp_match - Matching structure, stored in sk_buff's cb area. 169 * @words: UUID and (partial) sequence number 170 * @expiry: Time after which the packet should be delivered irrespective of 171 * event arrival. 172 * @state: The state of the packet - whether it is ready for processing or 173 * whether that is of no interest. 174 */ 175 struct efx_ptp_match { 176 u32 words[DIV_ROUND_UP(PTP_V1_UUID_LENGTH, 4)]; 177 unsigned long expiry; 178 enum ptp_packet_state state; 179 }; 180 181 /** 182 * struct efx_ptp_event_rx - A PTP receive event (from MC) 183 * @seq0: First part of (PTP) UUID 184 * @seq1: Second part of (PTP) UUID and sequence number 185 * @hwtimestamp: Event timestamp 186 */ 187 struct efx_ptp_event_rx { 188 struct list_head link; 189 u32 seq0; 190 u32 seq1; 191 ktime_t hwtimestamp; 192 unsigned long expiry; 193 }; 194 195 /** 196 * struct efx_ptp_timeset - Synchronisation between host and MC 197 * @host_start: Host time immediately before hardware timestamp taken 198 * @seconds: Hardware timestamp, seconds 199 * @nanoseconds: Hardware timestamp, nanoseconds 200 * @host_end: Host time immediately after hardware timestamp taken 201 * @waitns: Number of nanoseconds between hardware timestamp being read and 202 * host end time being seen 203 * @window: Difference of host_end and host_start 204 * @valid: Whether this timeset is valid 205 */ 206 struct efx_ptp_timeset { 207 u32 host_start; 208 u32 seconds; 209 u32 nanoseconds; 210 u32 host_end; 211 u32 waitns; 212 u32 window; /* Derived: end - start, allowing for wrap */ 213 }; 214 215 /** 216 * struct efx_ptp_data - Precision Time Protocol (PTP) state 217 * @channel: The PTP channel 218 * @rxq: Receive queue (awaiting timestamps) 219 * @txq: Transmit queue 220 * @evt_list: List of MC receive events awaiting packets 221 * @evt_free_list: List of free events 222 * @evt_lock: Lock for manipulating evt_list and evt_free_list 223 * @evt_overflow: Boolean indicating that event list has overflowed 224 * @rx_evts: Instantiated events (on evt_list and evt_free_list) 225 * @workwq: Work queue for processing pending PTP operations 226 * @work: Work task 227 * @reset_required: A serious error has occurred and the PTP task needs to be 228 * reset (disable, enable). 229 * @rxfilter_event: Receive filter when operating 230 * @rxfilter_general: Receive filter when operating 231 * @config: Current timestamp configuration 232 * @enabled: PTP operation enabled 233 * @mode: Mode in which PTP operating (PTP version) 234 * @evt_frags: Partly assembled PTP events 235 * @evt_frag_idx: Current fragment number 236 * @evt_code: Last event code 237 * @start: Address at which MC indicates ready for synchronisation 238 * @host_time_pps: Host time at last PPS 239 * @last_sync_ns: Last number of nanoseconds between readings when synchronising 240 * @base_sync_ns: Number of nanoseconds for last synchronisation. 241 * @base_sync_valid: Whether base_sync_time is valid. 242 * @current_adjfreq: Current ppb adjustment. 243 * @phc_clock: Pointer to registered phc device 244 * @phc_clock_info: Registration structure for phc device 245 * @pps_work: pps work task for handling pps events 246 * @pps_workwq: pps work queue 247 * @nic_ts_enabled: Flag indicating if NIC generated TS events are handled 248 * @txbuf: Buffer for use when transmitting (PTP) packets to MC (avoids 249 * allocations in main data path). 250 * @debug_ptp_dir: PTP debugfs directory 251 * @missed_rx_sync: Number of packets received without syncrhonisation. 252 * @good_syncs: Number of successful synchronisations. 253 * @no_time_syncs: Number of synchronisations with no good times. 254 * @bad_sync_durations: Number of synchronisations with bad durations. 255 * @bad_syncs: Number of failed synchronisations. 256 * @last_sync_time: Number of nanoseconds for last synchronisation. 257 * @sync_timeouts: Number of synchronisation timeouts 258 * @fast_syncs: Number of synchronisations requiring short delay 259 * @min_sync_delta: Minimum time between event and synchronisation 260 * @max_sync_delta: Maximum time between event and synchronisation 261 * @average_sync_delta: Average time between event and synchronisation. 262 * Modified moving average. 263 * @last_sync_delta: Last time between event and synchronisation 264 * @mc_stats: Context value for MC statistics 265 * @timeset: Last set of synchronisation statistics. 266 */ 267 struct efx_ptp_data { 268 struct efx_channel *channel; 269 struct sk_buff_head rxq; 270 struct sk_buff_head txq; 271 struct list_head evt_list; 272 struct list_head evt_free_list; 273 spinlock_t evt_lock; 274 bool evt_overflow; 275 struct efx_ptp_event_rx rx_evts[MAX_RECEIVE_EVENTS]; 276 struct workqueue_struct *workwq; 277 struct work_struct work; 278 bool reset_required; 279 u32 rxfilter_event; 280 u32 rxfilter_general; 281 bool rxfilter_installed; 282 struct hwtstamp_config config; 283 bool enabled; 284 unsigned int mode; 285 efx_qword_t evt_frags[MAX_EVENT_FRAGS]; 286 int evt_frag_idx; 287 int evt_code; 288 struct efx_buffer start; 289 struct pps_event_time host_time_pps; 290 unsigned last_sync_ns; 291 unsigned base_sync_ns; 292 bool base_sync_valid; 293 s64 current_adjfreq; 294 struct ptp_clock *phc_clock; 295 struct ptp_clock_info phc_clock_info; 296 struct work_struct pps_work; 297 struct workqueue_struct *pps_workwq; 298 bool nic_ts_enabled; 299 MCDI_DECLARE_BUF(txbuf, MC_CMD_PTP_IN_TRANSMIT_LENMAX); 300 struct efx_ptp_timeset 301 timeset[MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM]; 302 }; 303 304 static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta); 305 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta); 306 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts); 307 static int efx_phc_settime(struct ptp_clock_info *ptp, 308 const struct timespec *e_ts); 309 static int efx_phc_enable(struct ptp_clock_info *ptp, 310 struct ptp_clock_request *request, int on); 311 312 /* Enable MCDI PTP support. */ 313 static int efx_ptp_enable(struct efx_nic *efx) 314 { 315 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ENABLE_LEN); 316 317 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ENABLE); 318 MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); 319 MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_QUEUE, 320 efx->ptp_data->channel->channel); 321 MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_MODE, efx->ptp_data->mode); 322 323 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), 324 NULL, 0, NULL); 325 } 326 327 /* Disable MCDI PTP support. 328 * 329 * Note that this function should never rely on the presence of ptp_data - 330 * may be called before that exists. 331 */ 332 static int efx_ptp_disable(struct efx_nic *efx) 333 { 334 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_DISABLE_LEN); 335 336 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_DISABLE); 337 MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); 338 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), 339 NULL, 0, NULL); 340 } 341 342 static void efx_ptp_deliver_rx_queue(struct sk_buff_head *q) 343 { 344 struct sk_buff *skb; 345 346 while ((skb = skb_dequeue(q))) { 347 local_bh_disable(); 348 netif_receive_skb(skb); 349 local_bh_enable(); 350 } 351 } 352 353 static void efx_ptp_handle_no_channel(struct efx_nic *efx) 354 { 355 netif_err(efx, drv, efx->net_dev, 356 "ERROR: PTP requires MSI-X and 1 additional interrupt" 357 "vector. PTP disabled\n"); 358 } 359 360 /* Repeatedly send the host time to the MC which will capture the hardware 361 * time. 362 */ 363 static void efx_ptp_send_times(struct efx_nic *efx, 364 struct pps_event_time *last_time) 365 { 366 struct pps_event_time now; 367 struct timespec limit; 368 struct efx_ptp_data *ptp = efx->ptp_data; 369 struct timespec start; 370 int *mc_running = ptp->start.addr; 371 372 pps_get_ts(&now); 373 start = now.ts_real; 374 limit = now.ts_real; 375 timespec_add_ns(&limit, SYNCHRONISE_PERIOD_NS); 376 377 /* Write host time for specified period or until MC is done */ 378 while ((timespec_compare(&now.ts_real, &limit) < 0) && 379 ACCESS_ONCE(*mc_running)) { 380 struct timespec update_time; 381 unsigned int host_time; 382 383 /* Don't update continuously to avoid saturating the PCIe bus */ 384 update_time = now.ts_real; 385 timespec_add_ns(&update_time, SYNCHRONISATION_GRANULARITY_NS); 386 do { 387 pps_get_ts(&now); 388 } while ((timespec_compare(&now.ts_real, &update_time) < 0) && 389 ACCESS_ONCE(*mc_running)); 390 391 /* Synchronise NIC with single word of time only */ 392 host_time = (now.ts_real.tv_sec << MC_NANOSECOND_BITS | 393 now.ts_real.tv_nsec); 394 /* Update host time in NIC memory */ 395 efx->type->ptp_write_host_time(efx, host_time); 396 } 397 *last_time = now; 398 } 399 400 /* Read a timeset from the MC's results and partial process. */ 401 static void efx_ptp_read_timeset(MCDI_DECLARE_STRUCT_PTR(data), 402 struct efx_ptp_timeset *timeset) 403 { 404 unsigned start_ns, end_ns; 405 406 timeset->host_start = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTSTART); 407 timeset->seconds = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_SECONDS); 408 timeset->nanoseconds = MCDI_DWORD(data, 409 PTP_OUT_SYNCHRONIZE_NANOSECONDS); 410 timeset->host_end = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTEND), 411 timeset->waitns = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_WAITNS); 412 413 /* Ignore seconds */ 414 start_ns = timeset->host_start & MC_NANOSECOND_MASK; 415 end_ns = timeset->host_end & MC_NANOSECOND_MASK; 416 /* Allow for rollover */ 417 if (end_ns < start_ns) 418 end_ns += NSEC_PER_SEC; 419 /* Determine duration of operation */ 420 timeset->window = end_ns - start_ns; 421 } 422 423 /* Process times received from MC. 424 * 425 * Extract times from returned results, and establish the minimum value 426 * seen. The minimum value represents the "best" possible time and events 427 * too much greater than this are rejected - the machine is, perhaps, too 428 * busy. A number of readings are taken so that, hopefully, at least one good 429 * synchronisation will be seen in the results. 430 */ 431 static int 432 efx_ptp_process_times(struct efx_nic *efx, MCDI_DECLARE_STRUCT_PTR(synch_buf), 433 size_t response_length, 434 const struct pps_event_time *last_time) 435 { 436 unsigned number_readings = 437 MCDI_VAR_ARRAY_LEN(response_length, 438 PTP_OUT_SYNCHRONIZE_TIMESET); 439 unsigned i; 440 unsigned total; 441 unsigned ngood = 0; 442 unsigned last_good = 0; 443 struct efx_ptp_data *ptp = efx->ptp_data; 444 u32 last_sec; 445 u32 start_sec; 446 struct timespec delta; 447 448 if (number_readings == 0) 449 return -EAGAIN; 450 451 /* Read the set of results and increment stats for any results that 452 * appera to be erroneous. 453 */ 454 for (i = 0; i < number_readings; i++) { 455 efx_ptp_read_timeset( 456 MCDI_ARRAY_STRUCT_PTR(synch_buf, 457 PTP_OUT_SYNCHRONIZE_TIMESET, i), 458 &ptp->timeset[i]); 459 } 460 461 /* Find the last good host-MC synchronization result. The MC times 462 * when it finishes reading the host time so the corrected window time 463 * should be fairly constant for a given platform. 464 */ 465 total = 0; 466 for (i = 0; i < number_readings; i++) 467 if (ptp->timeset[i].window > ptp->timeset[i].waitns) { 468 unsigned win; 469 470 win = ptp->timeset[i].window - ptp->timeset[i].waitns; 471 if (win >= MIN_SYNCHRONISATION_NS && 472 win < MAX_SYNCHRONISATION_NS) { 473 total += ptp->timeset[i].window; 474 ngood++; 475 last_good = i; 476 } 477 } 478 479 if (ngood == 0) { 480 netif_warn(efx, drv, efx->net_dev, 481 "PTP no suitable synchronisations %dns\n", 482 ptp->base_sync_ns); 483 return -EAGAIN; 484 } 485 486 /* Average minimum this synchronisation */ 487 ptp->last_sync_ns = DIV_ROUND_UP(total, ngood); 488 if (!ptp->base_sync_valid || (ptp->last_sync_ns < ptp->base_sync_ns)) { 489 ptp->base_sync_valid = true; 490 ptp->base_sync_ns = ptp->last_sync_ns; 491 } 492 493 /* Calculate delay from actual PPS to last_time */ 494 delta.tv_nsec = 495 ptp->timeset[last_good].nanoseconds + 496 last_time->ts_real.tv_nsec - 497 (ptp->timeset[last_good].host_start & MC_NANOSECOND_MASK); 498 499 /* It is possible that the seconds rolled over between taking 500 * the start reading and the last value written by the host. The 501 * timescales are such that a gap of more than one second is never 502 * expected. 503 */ 504 start_sec = ptp->timeset[last_good].host_start >> MC_NANOSECOND_BITS; 505 last_sec = last_time->ts_real.tv_sec & MC_SECOND_MASK; 506 if (start_sec != last_sec) { 507 if (((start_sec + 1) & MC_SECOND_MASK) != last_sec) { 508 netif_warn(efx, hw, efx->net_dev, 509 "PTP bad synchronisation seconds\n"); 510 return -EAGAIN; 511 } else { 512 delta.tv_sec = 1; 513 } 514 } else { 515 delta.tv_sec = 0; 516 } 517 518 ptp->host_time_pps = *last_time; 519 pps_sub_ts(&ptp->host_time_pps, delta); 520 521 return 0; 522 } 523 524 /* Synchronize times between the host and the MC */ 525 static int efx_ptp_synchronize(struct efx_nic *efx, unsigned int num_readings) 526 { 527 struct efx_ptp_data *ptp = efx->ptp_data; 528 MCDI_DECLARE_BUF(synch_buf, MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX); 529 size_t response_length; 530 int rc; 531 unsigned long timeout; 532 struct pps_event_time last_time = {}; 533 unsigned int loops = 0; 534 int *start = ptp->start.addr; 535 536 MCDI_SET_DWORD(synch_buf, PTP_IN_OP, MC_CMD_PTP_OP_SYNCHRONIZE); 537 MCDI_SET_DWORD(synch_buf, PTP_IN_PERIPH_ID, 0); 538 MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_NUMTIMESETS, 539 num_readings); 540 MCDI_SET_QWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR, 541 ptp->start.dma_addr); 542 543 /* Clear flag that signals MC ready */ 544 ACCESS_ONCE(*start) = 0; 545 rc = efx_mcdi_rpc_start(efx, MC_CMD_PTP, synch_buf, 546 MC_CMD_PTP_IN_SYNCHRONIZE_LEN); 547 EFX_BUG_ON_PARANOID(rc); 548 549 /* Wait for start from MCDI (or timeout) */ 550 timeout = jiffies + msecs_to_jiffies(MAX_SYNCHRONISE_WAIT_MS); 551 while (!ACCESS_ONCE(*start) && (time_before(jiffies, timeout))) { 552 udelay(20); /* Usually start MCDI execution quickly */ 553 loops++; 554 } 555 556 if (ACCESS_ONCE(*start)) 557 efx_ptp_send_times(efx, &last_time); 558 559 /* Collect results */ 560 rc = efx_mcdi_rpc_finish(efx, MC_CMD_PTP, 561 MC_CMD_PTP_IN_SYNCHRONIZE_LEN, 562 synch_buf, sizeof(synch_buf), 563 &response_length); 564 if (rc == 0) 565 rc = efx_ptp_process_times(efx, synch_buf, response_length, 566 &last_time); 567 568 return rc; 569 } 570 571 /* Transmit a PTP packet, via the MCDI interface, to the wire. */ 572 static int efx_ptp_xmit_skb(struct efx_nic *efx, struct sk_buff *skb) 573 { 574 struct efx_ptp_data *ptp_data = efx->ptp_data; 575 struct skb_shared_hwtstamps timestamps; 576 int rc = -EIO; 577 MCDI_DECLARE_BUF(txtime, MC_CMD_PTP_OUT_TRANSMIT_LEN); 578 size_t len; 579 580 MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_OP, MC_CMD_PTP_OP_TRANSMIT); 581 MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_PERIPH_ID, 0); 582 MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_TRANSMIT_LENGTH, skb->len); 583 if (skb_shinfo(skb)->nr_frags != 0) { 584 rc = skb_linearize(skb); 585 if (rc != 0) 586 goto fail; 587 } 588 589 if (skb->ip_summed == CHECKSUM_PARTIAL) { 590 rc = skb_checksum_help(skb); 591 if (rc != 0) 592 goto fail; 593 } 594 skb_copy_from_linear_data(skb, 595 MCDI_PTR(ptp_data->txbuf, 596 PTP_IN_TRANSMIT_PACKET), 597 skb->len); 598 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, 599 ptp_data->txbuf, MC_CMD_PTP_IN_TRANSMIT_LEN(skb->len), 600 txtime, sizeof(txtime), &len); 601 if (rc != 0) 602 goto fail; 603 604 memset(×tamps, 0, sizeof(timestamps)); 605 timestamps.hwtstamp = ktime_set( 606 MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_SECONDS), 607 MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_NANOSECONDS)); 608 609 skb_tstamp_tx(skb, ×tamps); 610 611 rc = 0; 612 613 fail: 614 dev_kfree_skb(skb); 615 616 return rc; 617 } 618 619 static void efx_ptp_drop_time_expired_events(struct efx_nic *efx) 620 { 621 struct efx_ptp_data *ptp = efx->ptp_data; 622 struct list_head *cursor; 623 struct list_head *next; 624 625 /* Drop time-expired events */ 626 spin_lock_bh(&ptp->evt_lock); 627 if (!list_empty(&ptp->evt_list)) { 628 list_for_each_safe(cursor, next, &ptp->evt_list) { 629 struct efx_ptp_event_rx *evt; 630 631 evt = list_entry(cursor, struct efx_ptp_event_rx, 632 link); 633 if (time_after(jiffies, evt->expiry)) { 634 list_move(&evt->link, &ptp->evt_free_list); 635 netif_warn(efx, hw, efx->net_dev, 636 "PTP rx event dropped\n"); 637 } 638 } 639 } 640 /* If the event overflow flag is set and the event list is now empty 641 * clear the flag to re-enable the overflow warning message. 642 */ 643 if (ptp->evt_overflow && list_empty(&ptp->evt_list)) 644 ptp->evt_overflow = false; 645 spin_unlock_bh(&ptp->evt_lock); 646 } 647 648 static enum ptp_packet_state efx_ptp_match_rx(struct efx_nic *efx, 649 struct sk_buff *skb) 650 { 651 struct efx_ptp_data *ptp = efx->ptp_data; 652 bool evts_waiting; 653 struct list_head *cursor; 654 struct list_head *next; 655 struct efx_ptp_match *match; 656 enum ptp_packet_state rc = PTP_PACKET_STATE_UNMATCHED; 657 658 spin_lock_bh(&ptp->evt_lock); 659 evts_waiting = !list_empty(&ptp->evt_list); 660 spin_unlock_bh(&ptp->evt_lock); 661 662 if (!evts_waiting) 663 return PTP_PACKET_STATE_UNMATCHED; 664 665 match = (struct efx_ptp_match *)skb->cb; 666 /* Look for a matching timestamp in the event queue */ 667 spin_lock_bh(&ptp->evt_lock); 668 list_for_each_safe(cursor, next, &ptp->evt_list) { 669 struct efx_ptp_event_rx *evt; 670 671 evt = list_entry(cursor, struct efx_ptp_event_rx, link); 672 if ((evt->seq0 == match->words[0]) && 673 (evt->seq1 == match->words[1])) { 674 struct skb_shared_hwtstamps *timestamps; 675 676 /* Match - add in hardware timestamp */ 677 timestamps = skb_hwtstamps(skb); 678 timestamps->hwtstamp = evt->hwtimestamp; 679 680 match->state = PTP_PACKET_STATE_MATCHED; 681 rc = PTP_PACKET_STATE_MATCHED; 682 list_move(&evt->link, &ptp->evt_free_list); 683 break; 684 } 685 } 686 /* If the event overflow flag is set and the event list is now empty 687 * clear the flag to re-enable the overflow warning message. 688 */ 689 if (ptp->evt_overflow && list_empty(&ptp->evt_list)) 690 ptp->evt_overflow = false; 691 spin_unlock_bh(&ptp->evt_lock); 692 693 return rc; 694 } 695 696 /* Process any queued receive events and corresponding packets 697 * 698 * q is returned with all the packets that are ready for delivery. 699 * true is returned if at least one of those packets requires 700 * synchronisation. 701 */ 702 static bool efx_ptp_process_events(struct efx_nic *efx, struct sk_buff_head *q) 703 { 704 struct efx_ptp_data *ptp = efx->ptp_data; 705 bool rc = false; 706 struct sk_buff *skb; 707 708 while ((skb = skb_dequeue(&ptp->rxq))) { 709 struct efx_ptp_match *match; 710 711 match = (struct efx_ptp_match *)skb->cb; 712 if (match->state == PTP_PACKET_STATE_MATCH_UNWANTED) { 713 __skb_queue_tail(q, skb); 714 } else if (efx_ptp_match_rx(efx, skb) == 715 PTP_PACKET_STATE_MATCHED) { 716 rc = true; 717 __skb_queue_tail(q, skb); 718 } else if (time_after(jiffies, match->expiry)) { 719 match->state = PTP_PACKET_STATE_TIMED_OUT; 720 if (net_ratelimit()) 721 netif_warn(efx, rx_err, efx->net_dev, 722 "PTP packet - no timestamp seen\n"); 723 __skb_queue_tail(q, skb); 724 } else { 725 /* Replace unprocessed entry and stop */ 726 skb_queue_head(&ptp->rxq, skb); 727 break; 728 } 729 } 730 731 return rc; 732 } 733 734 /* Complete processing of a received packet */ 735 static inline void efx_ptp_process_rx(struct efx_nic *efx, struct sk_buff *skb) 736 { 737 local_bh_disable(); 738 netif_receive_skb(skb); 739 local_bh_enable(); 740 } 741 742 static int efx_ptp_start(struct efx_nic *efx) 743 { 744 struct efx_ptp_data *ptp = efx->ptp_data; 745 struct efx_filter_spec rxfilter; 746 int rc; 747 748 ptp->reset_required = false; 749 750 /* Must filter on both event and general ports to ensure 751 * that there is no packet re-ordering. 752 */ 753 efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0, 754 efx_rx_queue_index( 755 efx_channel_get_rx_queue(ptp->channel))); 756 rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP, 757 htonl(PTP_ADDRESS), 758 htons(PTP_EVENT_PORT)); 759 if (rc != 0) 760 return rc; 761 762 rc = efx_filter_insert_filter(efx, &rxfilter, true); 763 if (rc < 0) 764 return rc; 765 ptp->rxfilter_event = rc; 766 767 efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0, 768 efx_rx_queue_index( 769 efx_channel_get_rx_queue(ptp->channel))); 770 rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP, 771 htonl(PTP_ADDRESS), 772 htons(PTP_GENERAL_PORT)); 773 if (rc != 0) 774 goto fail; 775 776 rc = efx_filter_insert_filter(efx, &rxfilter, true); 777 if (rc < 0) 778 goto fail; 779 ptp->rxfilter_general = rc; 780 781 rc = efx_ptp_enable(efx); 782 if (rc != 0) 783 goto fail2; 784 785 ptp->evt_frag_idx = 0; 786 ptp->current_adjfreq = 0; 787 ptp->rxfilter_installed = true; 788 789 return 0; 790 791 fail2: 792 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, 793 ptp->rxfilter_general); 794 fail: 795 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, 796 ptp->rxfilter_event); 797 798 return rc; 799 } 800 801 static int efx_ptp_stop(struct efx_nic *efx) 802 { 803 struct efx_ptp_data *ptp = efx->ptp_data; 804 struct list_head *cursor; 805 struct list_head *next; 806 int rc; 807 808 if (ptp == NULL) 809 return 0; 810 811 rc = efx_ptp_disable(efx); 812 813 if (ptp->rxfilter_installed) { 814 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, 815 ptp->rxfilter_general); 816 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, 817 ptp->rxfilter_event); 818 ptp->rxfilter_installed = false; 819 } 820 821 /* Make sure RX packets are really delivered */ 822 efx_ptp_deliver_rx_queue(&efx->ptp_data->rxq); 823 skb_queue_purge(&efx->ptp_data->txq); 824 825 /* Drop any pending receive events */ 826 spin_lock_bh(&efx->ptp_data->evt_lock); 827 list_for_each_safe(cursor, next, &efx->ptp_data->evt_list) { 828 list_move(cursor, &efx->ptp_data->evt_free_list); 829 } 830 ptp->evt_overflow = false; 831 spin_unlock_bh(&efx->ptp_data->evt_lock); 832 833 return rc; 834 } 835 836 static int efx_ptp_restart(struct efx_nic *efx) 837 { 838 if (efx->ptp_data && efx->ptp_data->enabled) 839 return efx_ptp_start(efx); 840 return 0; 841 } 842 843 static void efx_ptp_pps_worker(struct work_struct *work) 844 { 845 struct efx_ptp_data *ptp = 846 container_of(work, struct efx_ptp_data, pps_work); 847 struct efx_nic *efx = ptp->channel->efx; 848 struct ptp_clock_event ptp_evt; 849 850 if (efx_ptp_synchronize(efx, PTP_SYNC_ATTEMPTS)) 851 return; 852 853 ptp_evt.type = PTP_CLOCK_PPSUSR; 854 ptp_evt.pps_times = ptp->host_time_pps; 855 ptp_clock_event(ptp->phc_clock, &ptp_evt); 856 } 857 858 /* Process any pending transmissions and timestamp any received packets. 859 */ 860 static void efx_ptp_worker(struct work_struct *work) 861 { 862 struct efx_ptp_data *ptp_data = 863 container_of(work, struct efx_ptp_data, work); 864 struct efx_nic *efx = ptp_data->channel->efx; 865 struct sk_buff *skb; 866 struct sk_buff_head tempq; 867 868 if (ptp_data->reset_required) { 869 efx_ptp_stop(efx); 870 efx_ptp_start(efx); 871 return; 872 } 873 874 efx_ptp_drop_time_expired_events(efx); 875 876 __skb_queue_head_init(&tempq); 877 if (efx_ptp_process_events(efx, &tempq) || 878 !skb_queue_empty(&ptp_data->txq)) { 879 880 while ((skb = skb_dequeue(&ptp_data->txq))) 881 efx_ptp_xmit_skb(efx, skb); 882 } 883 884 while ((skb = __skb_dequeue(&tempq))) 885 efx_ptp_process_rx(efx, skb); 886 } 887 888 /* Initialise PTP channel and state. 889 * 890 * Setting core_index to zero causes the queue to be initialised and doesn't 891 * overlap with 'rxq0' because ptp.c doesn't use skb_record_rx_queue. 892 */ 893 static int efx_ptp_probe_channel(struct efx_channel *channel) 894 { 895 struct efx_nic *efx = channel->efx; 896 struct efx_ptp_data *ptp; 897 int rc = 0; 898 unsigned int pos; 899 900 channel->irq_moderation = 0; 901 channel->rx_queue.core_index = 0; 902 903 ptp = kzalloc(sizeof(struct efx_ptp_data), GFP_KERNEL); 904 efx->ptp_data = ptp; 905 if (!efx->ptp_data) 906 return -ENOMEM; 907 908 rc = efx_nic_alloc_buffer(efx, &ptp->start, sizeof(int), GFP_KERNEL); 909 if (rc != 0) 910 goto fail1; 911 912 ptp->channel = channel; 913 skb_queue_head_init(&ptp->rxq); 914 skb_queue_head_init(&ptp->txq); 915 ptp->workwq = create_singlethread_workqueue("sfc_ptp"); 916 if (!ptp->workwq) { 917 rc = -ENOMEM; 918 goto fail2; 919 } 920 921 INIT_WORK(&ptp->work, efx_ptp_worker); 922 ptp->config.flags = 0; 923 ptp->config.tx_type = HWTSTAMP_TX_OFF; 924 ptp->config.rx_filter = HWTSTAMP_FILTER_NONE; 925 INIT_LIST_HEAD(&ptp->evt_list); 926 INIT_LIST_HEAD(&ptp->evt_free_list); 927 spin_lock_init(&ptp->evt_lock); 928 for (pos = 0; pos < MAX_RECEIVE_EVENTS; pos++) 929 list_add(&ptp->rx_evts[pos].link, &ptp->evt_free_list); 930 ptp->evt_overflow = false; 931 932 ptp->phc_clock_info.owner = THIS_MODULE; 933 snprintf(ptp->phc_clock_info.name, 934 sizeof(ptp->phc_clock_info.name), 935 "%pm", efx->net_dev->perm_addr); 936 ptp->phc_clock_info.max_adj = MAX_PPB; 937 ptp->phc_clock_info.n_alarm = 0; 938 ptp->phc_clock_info.n_ext_ts = 0; 939 ptp->phc_clock_info.n_per_out = 0; 940 ptp->phc_clock_info.pps = 1; 941 ptp->phc_clock_info.adjfreq = efx_phc_adjfreq; 942 ptp->phc_clock_info.adjtime = efx_phc_adjtime; 943 ptp->phc_clock_info.gettime = efx_phc_gettime; 944 ptp->phc_clock_info.settime = efx_phc_settime; 945 ptp->phc_clock_info.enable = efx_phc_enable; 946 947 ptp->phc_clock = ptp_clock_register(&ptp->phc_clock_info, 948 &efx->pci_dev->dev); 949 if (IS_ERR(ptp->phc_clock)) { 950 rc = PTR_ERR(ptp->phc_clock); 951 goto fail3; 952 } 953 954 INIT_WORK(&ptp->pps_work, efx_ptp_pps_worker); 955 ptp->pps_workwq = create_singlethread_workqueue("sfc_pps"); 956 if (!ptp->pps_workwq) { 957 rc = -ENOMEM; 958 goto fail4; 959 } 960 ptp->nic_ts_enabled = false; 961 962 return 0; 963 fail4: 964 ptp_clock_unregister(efx->ptp_data->phc_clock); 965 966 fail3: 967 destroy_workqueue(efx->ptp_data->workwq); 968 969 fail2: 970 efx_nic_free_buffer(efx, &ptp->start); 971 972 fail1: 973 kfree(efx->ptp_data); 974 efx->ptp_data = NULL; 975 976 return rc; 977 } 978 979 static void efx_ptp_remove_channel(struct efx_channel *channel) 980 { 981 struct efx_nic *efx = channel->efx; 982 983 if (!efx->ptp_data) 984 return; 985 986 (void)efx_ptp_disable(channel->efx); 987 988 cancel_work_sync(&efx->ptp_data->work); 989 cancel_work_sync(&efx->ptp_data->pps_work); 990 991 skb_queue_purge(&efx->ptp_data->rxq); 992 skb_queue_purge(&efx->ptp_data->txq); 993 994 ptp_clock_unregister(efx->ptp_data->phc_clock); 995 996 destroy_workqueue(efx->ptp_data->workwq); 997 destroy_workqueue(efx->ptp_data->pps_workwq); 998 999 efx_nic_free_buffer(efx, &efx->ptp_data->start); 1000 kfree(efx->ptp_data); 1001 } 1002 1003 static void efx_ptp_get_channel_name(struct efx_channel *channel, 1004 char *buf, size_t len) 1005 { 1006 snprintf(buf, len, "%s-ptp", channel->efx->name); 1007 } 1008 1009 /* Determine whether this packet should be processed by the PTP module 1010 * or transmitted conventionally. 1011 */ 1012 bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb) 1013 { 1014 return efx->ptp_data && 1015 efx->ptp_data->enabled && 1016 skb->len >= PTP_MIN_LENGTH && 1017 skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM && 1018 likely(skb->protocol == htons(ETH_P_IP)) && 1019 skb_transport_header_was_set(skb) && 1020 skb_network_header_len(skb) >= sizeof(struct iphdr) && 1021 ip_hdr(skb)->protocol == IPPROTO_UDP && 1022 skb_headlen(skb) >= 1023 skb_transport_offset(skb) + sizeof(struct udphdr) && 1024 udp_hdr(skb)->dest == htons(PTP_EVENT_PORT); 1025 } 1026 1027 /* Receive a PTP packet. Packets are queued until the arrival of 1028 * the receive timestamp from the MC - this will probably occur after the 1029 * packet arrival because of the processing in the MC. 1030 */ 1031 static bool efx_ptp_rx(struct efx_channel *channel, struct sk_buff *skb) 1032 { 1033 struct efx_nic *efx = channel->efx; 1034 struct efx_ptp_data *ptp = efx->ptp_data; 1035 struct efx_ptp_match *match = (struct efx_ptp_match *)skb->cb; 1036 u8 *match_data_012, *match_data_345; 1037 unsigned int version; 1038 1039 match->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS); 1040 1041 /* Correct version? */ 1042 if (ptp->mode == MC_CMD_PTP_MODE_V1) { 1043 if (!pskb_may_pull(skb, PTP_V1_MIN_LENGTH)) { 1044 return false; 1045 } 1046 version = ntohs(*(__be16 *)&skb->data[PTP_V1_VERSION_OFFSET]); 1047 if (version != PTP_VERSION_V1) { 1048 return false; 1049 } 1050 1051 /* PTP V1 uses all six bytes of the UUID to match the packet 1052 * to the timestamp 1053 */ 1054 match_data_012 = skb->data + PTP_V1_UUID_OFFSET; 1055 match_data_345 = skb->data + PTP_V1_UUID_OFFSET + 3; 1056 } else { 1057 if (!pskb_may_pull(skb, PTP_V2_MIN_LENGTH)) { 1058 return false; 1059 } 1060 version = skb->data[PTP_V2_VERSION_OFFSET]; 1061 if ((version & PTP_VERSION_V2_MASK) != PTP_VERSION_V2) { 1062 return false; 1063 } 1064 1065 /* The original V2 implementation uses bytes 2-7 of 1066 * the UUID to match the packet to the timestamp. This 1067 * discards two of the bytes of the MAC address used 1068 * to create the UUID (SF bug 33070). The PTP V2 1069 * enhanced mode fixes this issue and uses bytes 0-2 1070 * and byte 5-7 of the UUID. 1071 */ 1072 match_data_345 = skb->data + PTP_V2_UUID_OFFSET + 5; 1073 if (ptp->mode == MC_CMD_PTP_MODE_V2) { 1074 match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 2; 1075 } else { 1076 match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 0; 1077 BUG_ON(ptp->mode != MC_CMD_PTP_MODE_V2_ENHANCED); 1078 } 1079 } 1080 1081 /* Does this packet require timestamping? */ 1082 if (ntohs(*(__be16 *)&skb->data[PTP_DPORT_OFFSET]) == PTP_EVENT_PORT) { 1083 struct skb_shared_hwtstamps *timestamps; 1084 1085 match->state = PTP_PACKET_STATE_UNMATCHED; 1086 1087 /* Clear all timestamps held: filled in later */ 1088 timestamps = skb_hwtstamps(skb); 1089 memset(timestamps, 0, sizeof(*timestamps)); 1090 1091 /* We expect the sequence number to be in the same position in 1092 * the packet for PTP V1 and V2 1093 */ 1094 BUILD_BUG_ON(PTP_V1_SEQUENCE_OFFSET != PTP_V2_SEQUENCE_OFFSET); 1095 BUILD_BUG_ON(PTP_V1_SEQUENCE_LENGTH != PTP_V2_SEQUENCE_LENGTH); 1096 1097 /* Extract UUID/Sequence information */ 1098 match->words[0] = (match_data_012[0] | 1099 (match_data_012[1] << 8) | 1100 (match_data_012[2] << 16) | 1101 (match_data_345[0] << 24)); 1102 match->words[1] = (match_data_345[1] | 1103 (match_data_345[2] << 8) | 1104 (skb->data[PTP_V1_SEQUENCE_OFFSET + 1105 PTP_V1_SEQUENCE_LENGTH - 1] << 1106 16)); 1107 } else { 1108 match->state = PTP_PACKET_STATE_MATCH_UNWANTED; 1109 } 1110 1111 skb_queue_tail(&ptp->rxq, skb); 1112 queue_work(ptp->workwq, &ptp->work); 1113 1114 return true; 1115 } 1116 1117 /* Transmit a PTP packet. This has to be transmitted by the MC 1118 * itself, through an MCDI call. MCDI calls aren't permitted 1119 * in the transmit path so defer the actual transmission to a suitable worker. 1120 */ 1121 int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb) 1122 { 1123 struct efx_ptp_data *ptp = efx->ptp_data; 1124 1125 skb_queue_tail(&ptp->txq, skb); 1126 1127 if ((udp_hdr(skb)->dest == htons(PTP_EVENT_PORT)) && 1128 (skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM)) 1129 efx_xmit_hwtstamp_pending(skb); 1130 queue_work(ptp->workwq, &ptp->work); 1131 1132 return NETDEV_TX_OK; 1133 } 1134 1135 static int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted, 1136 unsigned int new_mode) 1137 { 1138 if ((enable_wanted != efx->ptp_data->enabled) || 1139 (enable_wanted && (efx->ptp_data->mode != new_mode))) { 1140 int rc = 0; 1141 1142 if (enable_wanted) { 1143 /* Change of mode requires disable */ 1144 if (efx->ptp_data->enabled && 1145 (efx->ptp_data->mode != new_mode)) { 1146 efx->ptp_data->enabled = false; 1147 rc = efx_ptp_stop(efx); 1148 if (rc != 0) 1149 return rc; 1150 } 1151 1152 /* Set new operating mode and establish 1153 * baseline synchronisation, which must 1154 * succeed. 1155 */ 1156 efx->ptp_data->mode = new_mode; 1157 if (netif_running(efx->net_dev)) 1158 rc = efx_ptp_start(efx); 1159 if (rc == 0) { 1160 rc = efx_ptp_synchronize(efx, 1161 PTP_SYNC_ATTEMPTS * 2); 1162 if (rc != 0) 1163 efx_ptp_stop(efx); 1164 } 1165 } else { 1166 rc = efx_ptp_stop(efx); 1167 } 1168 1169 if (rc != 0) 1170 return rc; 1171 1172 efx->ptp_data->enabled = enable_wanted; 1173 } 1174 1175 return 0; 1176 } 1177 1178 static int efx_ptp_ts_init(struct efx_nic *efx, struct hwtstamp_config *init) 1179 { 1180 bool enable_wanted = false; 1181 unsigned int new_mode; 1182 int rc; 1183 1184 if (init->flags) 1185 return -EINVAL; 1186 1187 if ((init->tx_type != HWTSTAMP_TX_OFF) && 1188 (init->tx_type != HWTSTAMP_TX_ON)) 1189 return -ERANGE; 1190 1191 new_mode = efx->ptp_data->mode; 1192 /* Determine whether any PTP HW operations are required */ 1193 switch (init->rx_filter) { 1194 case HWTSTAMP_FILTER_NONE: 1195 break; 1196 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 1197 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 1198 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 1199 init->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; 1200 new_mode = MC_CMD_PTP_MODE_V1; 1201 enable_wanted = true; 1202 break; 1203 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 1204 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 1205 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 1206 /* Although these three are accepted only IPV4 packets will be 1207 * timestamped 1208 */ 1209 init->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; 1210 new_mode = MC_CMD_PTP_MODE_V2_ENHANCED; 1211 enable_wanted = true; 1212 break; 1213 case HWTSTAMP_FILTER_PTP_V2_EVENT: 1214 case HWTSTAMP_FILTER_PTP_V2_SYNC: 1215 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 1216 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 1217 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 1218 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 1219 /* Non-IP + IPv6 timestamping not supported */ 1220 return -ERANGE; 1221 break; 1222 default: 1223 return -ERANGE; 1224 } 1225 1226 if (init->tx_type != HWTSTAMP_TX_OFF) 1227 enable_wanted = true; 1228 1229 /* Old versions of the firmware do not support the improved 1230 * UUID filtering option (SF bug 33070). If the firmware does 1231 * not accept the enhanced mode, fall back to the standard PTP 1232 * v2 UUID filtering. 1233 */ 1234 rc = efx_ptp_change_mode(efx, enable_wanted, new_mode); 1235 if ((rc != 0) && (new_mode == MC_CMD_PTP_MODE_V2_ENHANCED)) 1236 rc = efx_ptp_change_mode(efx, enable_wanted, MC_CMD_PTP_MODE_V2); 1237 if (rc != 0) 1238 return rc; 1239 1240 efx->ptp_data->config = *init; 1241 1242 return 0; 1243 } 1244 1245 void efx_ptp_get_ts_info(struct efx_nic *efx, struct ethtool_ts_info *ts_info) 1246 { 1247 struct efx_ptp_data *ptp = efx->ptp_data; 1248 1249 if (!ptp) 1250 return; 1251 1252 ts_info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE | 1253 SOF_TIMESTAMPING_RX_HARDWARE | 1254 SOF_TIMESTAMPING_RAW_HARDWARE); 1255 ts_info->phc_index = ptp_clock_index(ptp->phc_clock); 1256 ts_info->tx_types = 1 << HWTSTAMP_TX_OFF | 1 << HWTSTAMP_TX_ON; 1257 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE | 1258 1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT | 1259 1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC | 1260 1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ | 1261 1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT | 1262 1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC | 1263 1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1264 } 1265 1266 int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd) 1267 { 1268 struct hwtstamp_config config; 1269 int rc; 1270 1271 /* Not a PTP enabled port */ 1272 if (!efx->ptp_data) 1273 return -EOPNOTSUPP; 1274 1275 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 1276 return -EFAULT; 1277 1278 rc = efx_ptp_ts_init(efx, &config); 1279 if (rc != 0) 1280 return rc; 1281 1282 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) 1283 ? -EFAULT : 0; 1284 } 1285 1286 static void ptp_event_failure(struct efx_nic *efx, int expected_frag_len) 1287 { 1288 struct efx_ptp_data *ptp = efx->ptp_data; 1289 1290 netif_err(efx, hw, efx->net_dev, 1291 "PTP unexpected event length: got %d expected %d\n", 1292 ptp->evt_frag_idx, expected_frag_len); 1293 ptp->reset_required = true; 1294 queue_work(ptp->workwq, &ptp->work); 1295 } 1296 1297 /* Process a completed receive event. Put it on the event queue and 1298 * start worker thread. This is required because event and their 1299 * correspoding packets may come in either order. 1300 */ 1301 static void ptp_event_rx(struct efx_nic *efx, struct efx_ptp_data *ptp) 1302 { 1303 struct efx_ptp_event_rx *evt = NULL; 1304 1305 if (ptp->evt_frag_idx != 3) { 1306 ptp_event_failure(efx, 3); 1307 return; 1308 } 1309 1310 spin_lock_bh(&ptp->evt_lock); 1311 if (!list_empty(&ptp->evt_free_list)) { 1312 evt = list_first_entry(&ptp->evt_free_list, 1313 struct efx_ptp_event_rx, link); 1314 list_del(&evt->link); 1315 1316 evt->seq0 = EFX_QWORD_FIELD(ptp->evt_frags[2], MCDI_EVENT_DATA); 1317 evt->seq1 = (EFX_QWORD_FIELD(ptp->evt_frags[2], 1318 MCDI_EVENT_SRC) | 1319 (EFX_QWORD_FIELD(ptp->evt_frags[1], 1320 MCDI_EVENT_SRC) << 8) | 1321 (EFX_QWORD_FIELD(ptp->evt_frags[0], 1322 MCDI_EVENT_SRC) << 16)); 1323 evt->hwtimestamp = ktime_set( 1324 EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA), 1325 EFX_QWORD_FIELD(ptp->evt_frags[1], MCDI_EVENT_DATA)); 1326 evt->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS); 1327 list_add_tail(&evt->link, &ptp->evt_list); 1328 1329 queue_work(ptp->workwq, &ptp->work); 1330 } else if (!ptp->evt_overflow) { 1331 /* Log a warning message and set the event overflow flag. 1332 * The message won't be logged again until the event queue 1333 * becomes empty. 1334 */ 1335 netif_err(efx, rx_err, efx->net_dev, "PTP event queue overflow\n"); 1336 ptp->evt_overflow = true; 1337 } 1338 spin_unlock_bh(&ptp->evt_lock); 1339 } 1340 1341 static void ptp_event_fault(struct efx_nic *efx, struct efx_ptp_data *ptp) 1342 { 1343 int code = EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA); 1344 if (ptp->evt_frag_idx != 1) { 1345 ptp_event_failure(efx, 1); 1346 return; 1347 } 1348 1349 netif_err(efx, hw, efx->net_dev, "PTP error %d\n", code); 1350 } 1351 1352 static void ptp_event_pps(struct efx_nic *efx, struct efx_ptp_data *ptp) 1353 { 1354 if (ptp->nic_ts_enabled) 1355 queue_work(ptp->pps_workwq, &ptp->pps_work); 1356 } 1357 1358 void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev) 1359 { 1360 struct efx_ptp_data *ptp = efx->ptp_data; 1361 int code = EFX_QWORD_FIELD(*ev, MCDI_EVENT_CODE); 1362 1363 if (!ptp->enabled) 1364 return; 1365 1366 if (ptp->evt_frag_idx == 0) { 1367 ptp->evt_code = code; 1368 } else if (ptp->evt_code != code) { 1369 netif_err(efx, hw, efx->net_dev, 1370 "PTP out of sequence event %d\n", code); 1371 ptp->evt_frag_idx = 0; 1372 } 1373 1374 ptp->evt_frags[ptp->evt_frag_idx++] = *ev; 1375 if (!MCDI_EVENT_FIELD(*ev, CONT)) { 1376 /* Process resulting event */ 1377 switch (code) { 1378 case MCDI_EVENT_CODE_PTP_RX: 1379 ptp_event_rx(efx, ptp); 1380 break; 1381 case MCDI_EVENT_CODE_PTP_FAULT: 1382 ptp_event_fault(efx, ptp); 1383 break; 1384 case MCDI_EVENT_CODE_PTP_PPS: 1385 ptp_event_pps(efx, ptp); 1386 break; 1387 default: 1388 netif_err(efx, hw, efx->net_dev, 1389 "PTP unknown event %d\n", code); 1390 break; 1391 } 1392 ptp->evt_frag_idx = 0; 1393 } else if (MAX_EVENT_FRAGS == ptp->evt_frag_idx) { 1394 netif_err(efx, hw, efx->net_dev, 1395 "PTP too many event fragments\n"); 1396 ptp->evt_frag_idx = 0; 1397 } 1398 } 1399 1400 static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) 1401 { 1402 struct efx_ptp_data *ptp_data = container_of(ptp, 1403 struct efx_ptp_data, 1404 phc_clock_info); 1405 struct efx_nic *efx = ptp_data->channel->efx; 1406 MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN); 1407 s64 adjustment_ns; 1408 int rc; 1409 1410 if (delta > MAX_PPB) 1411 delta = MAX_PPB; 1412 else if (delta < -MAX_PPB) 1413 delta = -MAX_PPB; 1414 1415 /* Convert ppb to fixed point ns. */ 1416 adjustment_ns = (((s64)delta * PPB_SCALE_WORD) >> 1417 (PPB_EXTRA_BITS + MAX_PPB_BITS)); 1418 1419 MCDI_SET_DWORD(inadj, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST); 1420 MCDI_SET_DWORD(inadj, PTP_IN_PERIPH_ID, 0); 1421 MCDI_SET_QWORD(inadj, PTP_IN_ADJUST_FREQ, adjustment_ns); 1422 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_SECONDS, 0); 1423 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_NANOSECONDS, 0); 1424 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inadj, sizeof(inadj), 1425 NULL, 0, NULL); 1426 if (rc != 0) 1427 return rc; 1428 1429 ptp_data->current_adjfreq = adjustment_ns; 1430 return 0; 1431 } 1432 1433 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta) 1434 { 1435 struct efx_ptp_data *ptp_data = container_of(ptp, 1436 struct efx_ptp_data, 1437 phc_clock_info); 1438 struct efx_nic *efx = ptp_data->channel->efx; 1439 struct timespec delta_ts = ns_to_timespec(delta); 1440 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ADJUST_LEN); 1441 1442 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST); 1443 MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); 1444 MCDI_SET_QWORD(inbuf, PTP_IN_ADJUST_FREQ, ptp_data->current_adjfreq); 1445 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_SECONDS, (u32)delta_ts.tv_sec); 1446 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_NANOSECONDS, (u32)delta_ts.tv_nsec); 1447 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), 1448 NULL, 0, NULL); 1449 } 1450 1451 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts) 1452 { 1453 struct efx_ptp_data *ptp_data = container_of(ptp, 1454 struct efx_ptp_data, 1455 phc_clock_info); 1456 struct efx_nic *efx = ptp_data->channel->efx; 1457 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_READ_NIC_TIME_LEN); 1458 MCDI_DECLARE_BUF(outbuf, MC_CMD_PTP_OUT_READ_NIC_TIME_LEN); 1459 int rc; 1460 1461 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_READ_NIC_TIME); 1462 MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); 1463 1464 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), 1465 outbuf, sizeof(outbuf), NULL); 1466 if (rc != 0) 1467 return rc; 1468 1469 ts->tv_sec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_SECONDS); 1470 ts->tv_nsec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_NANOSECONDS); 1471 return 0; 1472 } 1473 1474 static int efx_phc_settime(struct ptp_clock_info *ptp, 1475 const struct timespec *e_ts) 1476 { 1477 /* Get the current NIC time, efx_phc_gettime. 1478 * Subtract from the desired time to get the offset 1479 * call efx_phc_adjtime with the offset 1480 */ 1481 int rc; 1482 struct timespec time_now; 1483 struct timespec delta; 1484 1485 rc = efx_phc_gettime(ptp, &time_now); 1486 if (rc != 0) 1487 return rc; 1488 1489 delta = timespec_sub(*e_ts, time_now); 1490 1491 rc = efx_phc_adjtime(ptp, timespec_to_ns(&delta)); 1492 if (rc != 0) 1493 return rc; 1494 1495 return 0; 1496 } 1497 1498 static int efx_phc_enable(struct ptp_clock_info *ptp, 1499 struct ptp_clock_request *request, 1500 int enable) 1501 { 1502 struct efx_ptp_data *ptp_data = container_of(ptp, 1503 struct efx_ptp_data, 1504 phc_clock_info); 1505 if (request->type != PTP_CLK_REQ_PPS) 1506 return -EOPNOTSUPP; 1507 1508 ptp_data->nic_ts_enabled = !!enable; 1509 return 0; 1510 } 1511 1512 static const struct efx_channel_type efx_ptp_channel_type = { 1513 .handle_no_channel = efx_ptp_handle_no_channel, 1514 .pre_probe = efx_ptp_probe_channel, 1515 .post_remove = efx_ptp_remove_channel, 1516 .get_name = efx_ptp_get_channel_name, 1517 /* no copy operation; there is no need to reallocate this channel */ 1518 .receive_skb = efx_ptp_rx, 1519 .keep_eventq = false, 1520 }; 1521 1522 void efx_ptp_probe(struct efx_nic *efx) 1523 { 1524 /* Check whether PTP is implemented on this NIC. The DISABLE 1525 * operation will succeed if and only if it is implemented. 1526 */ 1527 if (efx_ptp_disable(efx) == 0) 1528 efx->extra_channel_type[EFX_EXTRA_CHANNEL_PTP] = 1529 &efx_ptp_channel_type; 1530 } 1531 1532 void efx_ptp_start_datapath(struct efx_nic *efx) 1533 { 1534 if (efx_ptp_restart(efx)) 1535 netif_err(efx, drv, efx->net_dev, "Failed to restart PTP.\n"); 1536 } 1537 1538 void efx_ptp_stop_datapath(struct efx_nic *efx) 1539 { 1540 efx_ptp_stop(efx); 1541 } 1542