1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2005-2006 Fen Systems Ltd. 5 * Copyright 2005-2013 Solarflare Communications Inc. 6 */ 7 8 /* Common definitions for all Efx net driver code */ 9 10 #ifndef EFX_NET_DRIVER_H 11 #define EFX_NET_DRIVER_H 12 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/ethtool.h> 16 #include <linux/if_vlan.h> 17 #include <linux/timer.h> 18 #include <linux/mdio.h> 19 #include <linux/list.h> 20 #include <linux/pci.h> 21 #include <linux/device.h> 22 #include <linux/highmem.h> 23 #include <linux/workqueue.h> 24 #include <linux/mutex.h> 25 #include <linux/rwsem.h> 26 #include <linux/vmalloc.h> 27 #include <linux/mtd/mtd.h> 28 #include <net/busy_poll.h> 29 #include <net/xdp.h> 30 31 #include "enum.h" 32 #include "bitfield.h" 33 #include "filter.h" 34 35 /************************************************************************** 36 * 37 * Build definitions 38 * 39 **************************************************************************/ 40 41 #define EFX_DRIVER_VERSION "4.1" 42 43 #ifdef DEBUG 44 #define EFX_WARN_ON_ONCE_PARANOID(x) WARN_ON_ONCE(x) 45 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x) 46 #else 47 #define EFX_WARN_ON_ONCE_PARANOID(x) do {} while (0) 48 #define EFX_WARN_ON_PARANOID(x) do {} while (0) 49 #endif 50 51 /************************************************************************** 52 * 53 * Efx data structures 54 * 55 **************************************************************************/ 56 57 #define EFX_MAX_CHANNELS 32U 58 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS 59 #define EFX_EXTRA_CHANNEL_IOV 0 60 #define EFX_EXTRA_CHANNEL_PTP 1 61 #define EFX_MAX_EXTRA_CHANNELS 2U 62 63 /* Checksum generation is a per-queue option in hardware, so each 64 * queue visible to the networking core is backed by two hardware TX 65 * queues. */ 66 #define EFX_MAX_TX_TC 2 67 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS) 68 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */ 69 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */ 70 #define EFX_TXQ_TYPES 4 71 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS) 72 73 /* Maximum possible MTU the driver supports */ 74 #define EFX_MAX_MTU (9 * 1024) 75 76 /* Minimum MTU, from RFC791 (IP) */ 77 #define EFX_MIN_MTU 68 78 79 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page, 80 * and should be a multiple of the cache line size. 81 */ 82 #define EFX_RX_USR_BUF_SIZE (2048 - 256) 83 84 /* If possible, we should ensure cache line alignment at start and end 85 * of every buffer. Otherwise, we just need to ensure 4-byte 86 * alignment of the network header. 87 */ 88 #if NET_IP_ALIGN == 0 89 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES 90 #else 91 #define EFX_RX_BUF_ALIGNMENT 4 92 #endif 93 94 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and 95 * still fit two standard MTU size packets into a single 4K page. 96 */ 97 #define EFX_XDP_HEADROOM 128 98 #define EFX_XDP_TAILROOM SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) 99 100 /* Forward declare Precision Time Protocol (PTP) support structure. */ 101 struct efx_ptp_data; 102 struct hwtstamp_config; 103 104 struct efx_self_tests; 105 106 /** 107 * struct efx_buffer - A general-purpose DMA buffer 108 * @addr: host base address of the buffer 109 * @dma_addr: DMA base address of the buffer 110 * @len: Buffer length, in bytes 111 * 112 * The NIC uses these buffers for its interrupt status registers and 113 * MAC stats dumps. 114 */ 115 struct efx_buffer { 116 void *addr; 117 dma_addr_t dma_addr; 118 unsigned int len; 119 }; 120 121 /** 122 * struct efx_special_buffer - DMA buffer entered into buffer table 123 * @buf: Standard &struct efx_buffer 124 * @index: Buffer index within controller;s buffer table 125 * @entries: Number of buffer table entries 126 * 127 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE. 128 * Event and descriptor rings are addressed via one or more buffer 129 * table entries (and so can be physically non-contiguous, although we 130 * currently do not take advantage of that). On Falcon and Siena we 131 * have to take care of allocating and initialising the entries 132 * ourselves. On later hardware this is managed by the firmware and 133 * @index and @entries are left as 0. 134 */ 135 struct efx_special_buffer { 136 struct efx_buffer buf; 137 unsigned int index; 138 unsigned int entries; 139 }; 140 141 /** 142 * struct efx_tx_buffer - buffer state for a TX descriptor 143 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be 144 * freed when descriptor completes 145 * @xdpf: When @flags & %EFX_TX_BUF_XDP, the XDP frame information; its @data 146 * member is the associated buffer to drop a page reference on. 147 * @option: When @flags & %EFX_TX_BUF_OPTION, an EF10-specific option 148 * descriptor. 149 * @dma_addr: DMA address of the fragment. 150 * @flags: Flags for allocation and DMA mapping type 151 * @len: Length of this fragment. 152 * This field is zero when the queue slot is empty. 153 * @unmap_len: Length of this fragment to unmap 154 * @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping. 155 * Only valid if @unmap_len != 0. 156 */ 157 struct efx_tx_buffer { 158 union { 159 const struct sk_buff *skb; 160 struct xdp_frame *xdpf; 161 }; 162 union { 163 efx_qword_t option; /* EF10 */ 164 dma_addr_t dma_addr; 165 }; 166 unsigned short flags; 167 unsigned short len; 168 unsigned short unmap_len; 169 unsigned short dma_offset; 170 }; 171 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */ 172 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */ 173 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */ 174 #define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */ 175 #define EFX_TX_BUF_XDP 0x20 /* buffer was sent with XDP */ 176 #define EFX_TX_BUF_TSO_V3 0x40 /* empty buffer for a TSO_V3 descriptor */ 177 178 /** 179 * struct efx_tx_queue - An Efx TX queue 180 * 181 * This is a ring buffer of TX fragments. 182 * Since the TX completion path always executes on the same 183 * CPU and the xmit path can operate on different CPUs, 184 * performance is increased by ensuring that the completion 185 * path and the xmit path operate on different cache lines. 186 * This is particularly important if the xmit path is always 187 * executing on one CPU which is different from the completion 188 * path. There is also a cache line for members which are 189 * read but not written on the fast path. 190 * 191 * @efx: The associated Efx NIC 192 * @queue: DMA queue number 193 * @label: Label for TX completion events. 194 * Is our index within @channel->tx_queue array. 195 * @tso_version: Version of TSO in use for this queue. 196 * @channel: The associated channel 197 * @core_txq: The networking core TX queue structure 198 * @buffer: The software buffer ring 199 * @cb_page: Array of pages of copy buffers. Carved up according to 200 * %EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks. 201 * @txd: The hardware descriptor ring 202 * @ptr_mask: The size of the ring minus 1. 203 * @piobuf: PIO buffer region for this TX queue (shared with its partner). 204 * Size of the region is efx_piobuf_size. 205 * @piobuf_offset: Buffer offset to be specified in PIO descriptors 206 * @initialised: Has hardware queue been initialised? 207 * @timestamping: Is timestamping enabled for this channel? 208 * @xdp_tx: Is this an XDP tx queue? 209 * @handle_tso: TSO xmit preparation handler. Sets up the TSO metadata and 210 * may also map tx data, depending on the nature of the TSO implementation. 211 * @read_count: Current read pointer. 212 * This is the number of buffers that have been removed from both rings. 213 * @old_write_count: The value of @write_count when last checked. 214 * This is here for performance reasons. The xmit path will 215 * only get the up-to-date value of @write_count if this 216 * variable indicates that the queue is empty. This is to 217 * avoid cache-line ping-pong between the xmit path and the 218 * completion path. 219 * @merge_events: Number of TX merged completion events 220 * @completed_timestamp_major: Top part of the most recent tx timestamp. 221 * @completed_timestamp_minor: Low part of the most recent tx timestamp. 222 * @insert_count: Current insert pointer 223 * This is the number of buffers that have been added to the 224 * software ring. 225 * @write_count: Current write pointer 226 * This is the number of buffers that have been added to the 227 * hardware ring. 228 * @packet_write_count: Completable write pointer 229 * This is the write pointer of the last packet written. 230 * Normally this will equal @write_count, but as option descriptors 231 * don't produce completion events, they won't update this. 232 * Filled in iff @efx->type->option_descriptors; only used for PIO. 233 * Thus, this is written and used on EF10, and neither on farch. 234 * @old_read_count: The value of read_count when last checked. 235 * This is here for performance reasons. The xmit path will 236 * only get the up-to-date value of read_count if this 237 * variable indicates that the queue is full. This is to 238 * avoid cache-line ping-pong between the xmit path and the 239 * completion path. 240 * @tso_bursts: Number of times TSO xmit invoked by kernel 241 * @tso_long_headers: Number of packets with headers too long for standard 242 * blocks 243 * @tso_packets: Number of packets via the TSO xmit path 244 * @tso_fallbacks: Number of times TSO fallback used 245 * @pushes: Number of times the TX push feature has been used 246 * @pio_packets: Number of times the TX PIO feature has been used 247 * @xmit_more_available: Are any packets waiting to be pushed to the NIC 248 * @cb_packets: Number of times the TX copybreak feature has been used 249 * @notify_count: Count of notified descriptors to the NIC 250 * @empty_read_count: If the completion path has seen the queue as empty 251 * and the transmission path has not yet checked this, the value of 252 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0. 253 */ 254 struct efx_tx_queue { 255 /* Members which don't change on the fast path */ 256 struct efx_nic *efx ____cacheline_aligned_in_smp; 257 unsigned int queue; 258 unsigned int label; 259 unsigned int tso_version; 260 struct efx_channel *channel; 261 struct netdev_queue *core_txq; 262 struct efx_tx_buffer *buffer; 263 struct efx_buffer *cb_page; 264 struct efx_special_buffer txd; 265 unsigned int ptr_mask; 266 void __iomem *piobuf; 267 unsigned int piobuf_offset; 268 bool initialised; 269 bool timestamping; 270 bool xdp_tx; 271 272 /* Function pointers used in the fast path. */ 273 int (*handle_tso)(struct efx_tx_queue*, struct sk_buff*, bool *); 274 275 /* Members used mainly on the completion path */ 276 unsigned int read_count ____cacheline_aligned_in_smp; 277 unsigned int old_write_count; 278 unsigned int merge_events; 279 unsigned int bytes_compl; 280 unsigned int pkts_compl; 281 u32 completed_timestamp_major; 282 u32 completed_timestamp_minor; 283 284 /* Members used only on the xmit path */ 285 unsigned int insert_count ____cacheline_aligned_in_smp; 286 unsigned int write_count; 287 unsigned int packet_write_count; 288 unsigned int old_read_count; 289 unsigned int tso_bursts; 290 unsigned int tso_long_headers; 291 unsigned int tso_packets; 292 unsigned int tso_fallbacks; 293 unsigned int pushes; 294 unsigned int pio_packets; 295 bool xmit_more_available; 296 unsigned int cb_packets; 297 unsigned int notify_count; 298 /* Statistics to supplement MAC stats */ 299 unsigned long tx_packets; 300 301 /* Members shared between paths and sometimes updated */ 302 unsigned int empty_read_count ____cacheline_aligned_in_smp; 303 #define EFX_EMPTY_COUNT_VALID 0x80000000 304 atomic_t flush_outstanding; 305 }; 306 307 #define EFX_TX_CB_ORDER 7 308 #define EFX_TX_CB_SIZE (1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN 309 310 /** 311 * struct efx_rx_buffer - An Efx RX data buffer 312 * @dma_addr: DMA base address of the buffer 313 * @page: The associated page buffer. 314 * Will be %NULL if the buffer slot is currently free. 315 * @page_offset: If pending: offset in @page of DMA base address. 316 * If completed: offset in @page of Ethernet header. 317 * @len: If pending: length for DMA descriptor. 318 * If completed: received length, excluding hash prefix. 319 * @flags: Flags for buffer and packet state. These are only set on the 320 * first buffer of a scattered packet. 321 */ 322 struct efx_rx_buffer { 323 dma_addr_t dma_addr; 324 struct page *page; 325 u16 page_offset; 326 u16 len; 327 u16 flags; 328 }; 329 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001 330 #define EFX_RX_PKT_CSUMMED 0x0002 331 #define EFX_RX_PKT_DISCARD 0x0004 332 #define EFX_RX_PKT_TCP 0x0040 333 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */ 334 #define EFX_RX_PKT_CSUM_LEVEL 0x0200 335 336 /** 337 * struct efx_rx_page_state - Page-based rx buffer state 338 * 339 * Inserted at the start of every page allocated for receive buffers. 340 * Used to facilitate sharing dma mappings between recycled rx buffers 341 * and those passed up to the kernel. 342 * 343 * @dma_addr: The dma address of this page. 344 */ 345 struct efx_rx_page_state { 346 dma_addr_t dma_addr; 347 348 unsigned int __pad[] ____cacheline_aligned; 349 }; 350 351 /** 352 * struct efx_rx_queue - An Efx RX queue 353 * @efx: The associated Efx NIC 354 * @core_index: Index of network core RX queue. Will be >= 0 iff this 355 * is associated with a real RX queue. 356 * @buffer: The software buffer ring 357 * @rxd: The hardware descriptor ring 358 * @ptr_mask: The size of the ring minus 1. 359 * @refill_enabled: Enable refill whenever fill level is low 360 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as 361 * @rxq_flush_pending. 362 * @added_count: Number of buffers added to the receive queue. 363 * @notified_count: Number of buffers given to NIC (<= @added_count). 364 * @removed_count: Number of buffers removed from the receive queue. 365 * @scatter_n: Used by NIC specific receive code. 366 * @scatter_len: Used by NIC specific receive code. 367 * @page_ring: The ring to store DMA mapped pages for reuse. 368 * @page_add: Counter to calculate the write pointer for the recycle ring. 369 * @page_remove: Counter to calculate the read pointer for the recycle ring. 370 * @page_recycle_count: The number of pages that have been recycled. 371 * @page_recycle_failed: The number of pages that couldn't be recycled because 372 * the kernel still held a reference to them. 373 * @page_recycle_full: The number of pages that were released because the 374 * recycle ring was full. 375 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1. 376 * @max_fill: RX descriptor maximum fill level (<= ring size) 377 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill 378 * (<= @max_fill) 379 * @min_fill: RX descriptor minimum non-zero fill level. 380 * This records the minimum fill level observed when a ring 381 * refill was triggered. 382 * @recycle_count: RX buffer recycle counter. 383 * @slow_fill: Timer used to defer efx_nic_generate_fill_event(). 384 * @xdp_rxq_info: XDP specific RX queue information. 385 * @xdp_rxq_info_valid: Is xdp_rxq_info valid data?. 386 */ 387 struct efx_rx_queue { 388 struct efx_nic *efx; 389 int core_index; 390 struct efx_rx_buffer *buffer; 391 struct efx_special_buffer rxd; 392 unsigned int ptr_mask; 393 bool refill_enabled; 394 bool flush_pending; 395 396 unsigned int added_count; 397 unsigned int notified_count; 398 unsigned int removed_count; 399 unsigned int scatter_n; 400 unsigned int scatter_len; 401 struct page **page_ring; 402 unsigned int page_add; 403 unsigned int page_remove; 404 unsigned int page_recycle_count; 405 unsigned int page_recycle_failed; 406 unsigned int page_recycle_full; 407 unsigned int page_ptr_mask; 408 unsigned int max_fill; 409 unsigned int fast_fill_trigger; 410 unsigned int min_fill; 411 unsigned int min_overfill; 412 unsigned int recycle_count; 413 struct timer_list slow_fill; 414 unsigned int slow_fill_count; 415 /* Statistics to supplement MAC stats */ 416 unsigned long rx_packets; 417 struct xdp_rxq_info xdp_rxq_info; 418 bool xdp_rxq_info_valid; 419 }; 420 421 enum efx_sync_events_state { 422 SYNC_EVENTS_DISABLED = 0, 423 SYNC_EVENTS_QUIESCENT, 424 SYNC_EVENTS_REQUESTED, 425 SYNC_EVENTS_VALID, 426 }; 427 428 /** 429 * struct efx_channel - An Efx channel 430 * 431 * A channel comprises an event queue, at least one TX queue, at least 432 * one RX queue, and an associated tasklet for processing the event 433 * queue. 434 * 435 * @efx: Associated Efx NIC 436 * @channel: Channel instance number 437 * @type: Channel type definition 438 * @eventq_init: Event queue initialised flag 439 * @enabled: Channel enabled indicator 440 * @irq: IRQ number (MSI and MSI-X only) 441 * @irq_moderation_us: IRQ moderation value (in microseconds) 442 * @napi_dev: Net device used with NAPI 443 * @napi_str: NAPI control structure 444 * @state: state for NAPI vs busy polling 445 * @state_lock: lock protecting @state 446 * @eventq: Event queue buffer 447 * @eventq_mask: Event queue pointer mask 448 * @eventq_read_ptr: Event queue read pointer 449 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel 450 * @irq_count: Number of IRQs since last adaptive moderation decision 451 * @irq_mod_score: IRQ moderation score 452 * @rfs_filter_count: number of accelerated RFS filters currently in place; 453 * equals the count of @rps_flow_id slots filled 454 * @rfs_last_expiry: value of jiffies last time some accelerated RFS filters 455 * were checked for expiry 456 * @rfs_expire_index: next accelerated RFS filter ID to check for expiry 457 * @n_rfs_succeeded: number of successful accelerated RFS filter insertions 458 * @n_rfs_failed; number of failed accelerated RFS filter insertions 459 * @filter_work: Work item for efx_filter_rfs_expire() 460 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS, 461 * indexed by filter ID 462 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors 463 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors 464 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors 465 * @n_rx_mcast_mismatch: Count of unmatched multicast frames 466 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors 467 * @n_rx_overlength: Count of RX_OVERLENGTH errors 468 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun 469 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to 470 * lack of descriptors 471 * @n_rx_merge_events: Number of RX merged completion events 472 * @n_rx_merge_packets: Number of RX packets completed by merged events 473 * @n_rx_xdp_drops: Count of RX packets intentionally dropped due to XDP 474 * @n_rx_xdp_bad_drops: Count of RX packets dropped due to XDP errors 475 * @n_rx_xdp_tx: Count of RX packets retransmitted due to XDP 476 * @n_rx_xdp_redirect: Count of RX packets redirected to a different NIC by XDP 477 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by 478 * __efx_rx_packet(), or zero if there is none 479 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered 480 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0 481 * @rx_list: list of SKBs from current RX, awaiting processing 482 * @rx_queue: RX queue for this channel 483 * @tx_queue: TX queues for this channel 484 * @sync_events_state: Current state of sync events on this channel 485 * @sync_timestamp_major: Major part of the last ptp sync event 486 * @sync_timestamp_minor: Minor part of the last ptp sync event 487 */ 488 struct efx_channel { 489 struct efx_nic *efx; 490 int channel; 491 const struct efx_channel_type *type; 492 bool eventq_init; 493 bool enabled; 494 int irq; 495 unsigned int irq_moderation_us; 496 struct net_device *napi_dev; 497 struct napi_struct napi_str; 498 #ifdef CONFIG_NET_RX_BUSY_POLL 499 unsigned long busy_poll_state; 500 #endif 501 struct efx_special_buffer eventq; 502 unsigned int eventq_mask; 503 unsigned int eventq_read_ptr; 504 int event_test_cpu; 505 506 unsigned int irq_count; 507 unsigned int irq_mod_score; 508 #ifdef CONFIG_RFS_ACCEL 509 unsigned int rfs_filter_count; 510 unsigned int rfs_last_expiry; 511 unsigned int rfs_expire_index; 512 unsigned int n_rfs_succeeded; 513 unsigned int n_rfs_failed; 514 struct delayed_work filter_work; 515 #define RPS_FLOW_ID_INVALID 0xFFFFFFFF 516 u32 *rps_flow_id; 517 #endif 518 519 unsigned int n_rx_tobe_disc; 520 unsigned int n_rx_ip_hdr_chksum_err; 521 unsigned int n_rx_tcp_udp_chksum_err; 522 unsigned int n_rx_outer_ip_hdr_chksum_err; 523 unsigned int n_rx_outer_tcp_udp_chksum_err; 524 unsigned int n_rx_inner_ip_hdr_chksum_err; 525 unsigned int n_rx_inner_tcp_udp_chksum_err; 526 unsigned int n_rx_eth_crc_err; 527 unsigned int n_rx_mcast_mismatch; 528 unsigned int n_rx_frm_trunc; 529 unsigned int n_rx_overlength; 530 unsigned int n_skbuff_leaks; 531 unsigned int n_rx_nodesc_trunc; 532 unsigned int n_rx_merge_events; 533 unsigned int n_rx_merge_packets; 534 unsigned int n_rx_xdp_drops; 535 unsigned int n_rx_xdp_bad_drops; 536 unsigned int n_rx_xdp_tx; 537 unsigned int n_rx_xdp_redirect; 538 539 unsigned int rx_pkt_n_frags; 540 unsigned int rx_pkt_index; 541 542 struct list_head *rx_list; 543 544 struct efx_rx_queue rx_queue; 545 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES]; 546 547 enum efx_sync_events_state sync_events_state; 548 u32 sync_timestamp_major; 549 u32 sync_timestamp_minor; 550 }; 551 552 /** 553 * struct efx_msi_context - Context for each MSI 554 * @efx: The associated NIC 555 * @index: Index of the channel/IRQ 556 * @name: Name of the channel/IRQ 557 * 558 * Unlike &struct efx_channel, this is never reallocated and is always 559 * safe for the IRQ handler to access. 560 */ 561 struct efx_msi_context { 562 struct efx_nic *efx; 563 unsigned int index; 564 char name[IFNAMSIZ + 6]; 565 }; 566 567 /** 568 * struct efx_channel_type - distinguishes traffic and extra channels 569 * @handle_no_channel: Handle failure to allocate an extra channel 570 * @pre_probe: Set up extra state prior to initialisation 571 * @post_remove: Tear down extra state after finalisation, if allocated. 572 * May be called on channels that have not been probed. 573 * @get_name: Generate the channel's name (used for its IRQ handler) 574 * @copy: Copy the channel state prior to reallocation. May be %NULL if 575 * reallocation is not supported. 576 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb() 577 * @want_txqs: Determine whether this channel should have TX queues 578 * created. If %NULL, TX queues are not created. 579 * @keep_eventq: Flag for whether event queue should be kept initialised 580 * while the device is stopped 581 * @want_pio: Flag for whether PIO buffers should be linked to this 582 * channel's TX queues. 583 */ 584 struct efx_channel_type { 585 void (*handle_no_channel)(struct efx_nic *); 586 int (*pre_probe)(struct efx_channel *); 587 void (*post_remove)(struct efx_channel *); 588 void (*get_name)(struct efx_channel *, char *buf, size_t len); 589 struct efx_channel *(*copy)(const struct efx_channel *); 590 bool (*receive_skb)(struct efx_channel *, struct sk_buff *); 591 bool (*want_txqs)(struct efx_channel *); 592 bool keep_eventq; 593 bool want_pio; 594 }; 595 596 enum efx_led_mode { 597 EFX_LED_OFF = 0, 598 EFX_LED_ON = 1, 599 EFX_LED_DEFAULT = 2 600 }; 601 602 #define STRING_TABLE_LOOKUP(val, member) \ 603 ((val) < member ## _max) ? member ## _names[val] : "(invalid)" 604 605 extern const char *const efx_loopback_mode_names[]; 606 extern const unsigned int efx_loopback_mode_max; 607 #define LOOPBACK_MODE(efx) \ 608 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode) 609 610 extern const char *const efx_reset_type_names[]; 611 extern const unsigned int efx_reset_type_max; 612 #define RESET_TYPE(type) \ 613 STRING_TABLE_LOOKUP(type, efx_reset_type) 614 615 enum efx_int_mode { 616 /* Be careful if altering to correct macro below */ 617 EFX_INT_MODE_MSIX = 0, 618 EFX_INT_MODE_MSI = 1, 619 EFX_INT_MODE_LEGACY = 2, 620 EFX_INT_MODE_MAX /* Insert any new items before this */ 621 }; 622 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI) 623 624 enum nic_state { 625 STATE_UNINIT = 0, /* device being probed/removed or is frozen */ 626 STATE_READY = 1, /* hardware ready and netdev registered */ 627 STATE_DISABLED = 2, /* device disabled due to hardware errors */ 628 STATE_RECOVERY = 3, /* device recovering from PCI error */ 629 }; 630 631 /* Forward declaration */ 632 struct efx_nic; 633 634 /* Pseudo bit-mask flow control field */ 635 #define EFX_FC_RX FLOW_CTRL_RX 636 #define EFX_FC_TX FLOW_CTRL_TX 637 #define EFX_FC_AUTO 4 638 639 /** 640 * struct efx_link_state - Current state of the link 641 * @up: Link is up 642 * @fd: Link is full-duplex 643 * @fc: Actual flow control flags 644 * @speed: Link speed (Mbps) 645 */ 646 struct efx_link_state { 647 bool up; 648 bool fd; 649 u8 fc; 650 unsigned int speed; 651 }; 652 653 static inline bool efx_link_state_equal(const struct efx_link_state *left, 654 const struct efx_link_state *right) 655 { 656 return left->up == right->up && left->fd == right->fd && 657 left->fc == right->fc && left->speed == right->speed; 658 } 659 660 /** 661 * struct efx_phy_operations - Efx PHY operations table 662 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds, 663 * efx->loopback_modes. 664 * @init: Initialise PHY 665 * @fini: Shut down PHY 666 * @reconfigure: Reconfigure PHY (e.g. for new link parameters) 667 * @poll: Update @link_state and report whether it changed. 668 * Serialised by the mac_lock. 669 * @get_link_ksettings: Get ethtool settings. Serialised by the mac_lock. 670 * @set_link_ksettings: Set ethtool settings. Serialised by the mac_lock. 671 * @get_fecparam: Get Forward Error Correction settings. Serialised by mac_lock. 672 * @set_fecparam: Set Forward Error Correction settings. Serialised by mac_lock. 673 * @set_npage_adv: Set abilities advertised in (Extended) Next Page 674 * (only needed where AN bit is set in mmds) 675 * @test_alive: Test that PHY is 'alive' (online) 676 * @test_name: Get the name of a PHY-specific test/result 677 * @run_tests: Run tests and record results as appropriate (offline). 678 * Flags are the ethtool tests flags. 679 */ 680 struct efx_phy_operations { 681 int (*probe) (struct efx_nic *efx); 682 int (*init) (struct efx_nic *efx); 683 void (*fini) (struct efx_nic *efx); 684 void (*remove) (struct efx_nic *efx); 685 int (*reconfigure) (struct efx_nic *efx); 686 bool (*poll) (struct efx_nic *efx); 687 void (*get_link_ksettings)(struct efx_nic *efx, 688 struct ethtool_link_ksettings *cmd); 689 int (*set_link_ksettings)(struct efx_nic *efx, 690 const struct ethtool_link_ksettings *cmd); 691 int (*get_fecparam)(struct efx_nic *efx, struct ethtool_fecparam *fec); 692 int (*set_fecparam)(struct efx_nic *efx, 693 const struct ethtool_fecparam *fec); 694 void (*set_npage_adv) (struct efx_nic *efx, u32); 695 int (*test_alive) (struct efx_nic *efx); 696 const char *(*test_name) (struct efx_nic *efx, unsigned int index); 697 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags); 698 int (*get_module_eeprom) (struct efx_nic *efx, 699 struct ethtool_eeprom *ee, 700 u8 *data); 701 int (*get_module_info) (struct efx_nic *efx, 702 struct ethtool_modinfo *modinfo); 703 }; 704 705 /** 706 * enum efx_phy_mode - PHY operating mode flags 707 * @PHY_MODE_NORMAL: on and should pass traffic 708 * @PHY_MODE_TX_DISABLED: on with TX disabled 709 * @PHY_MODE_LOW_POWER: set to low power through MDIO 710 * @PHY_MODE_OFF: switched off through external control 711 * @PHY_MODE_SPECIAL: on but will not pass traffic 712 */ 713 enum efx_phy_mode { 714 PHY_MODE_NORMAL = 0, 715 PHY_MODE_TX_DISABLED = 1, 716 PHY_MODE_LOW_POWER = 2, 717 PHY_MODE_OFF = 4, 718 PHY_MODE_SPECIAL = 8, 719 }; 720 721 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode) 722 { 723 return !!(mode & ~PHY_MODE_TX_DISABLED); 724 } 725 726 /** 727 * struct efx_hw_stat_desc - Description of a hardware statistic 728 * @name: Name of the statistic as visible through ethtool, or %NULL if 729 * it should not be exposed 730 * @dma_width: Width in bits (0 for non-DMA statistics) 731 * @offset: Offset within stats (ignored for non-DMA statistics) 732 */ 733 struct efx_hw_stat_desc { 734 const char *name; 735 u16 dma_width; 736 u16 offset; 737 }; 738 739 /* Number of bits used in a multicast filter hash address */ 740 #define EFX_MCAST_HASH_BITS 8 741 742 /* Number of (single-bit) entries in a multicast filter hash */ 743 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS) 744 745 /* An Efx multicast filter hash */ 746 union efx_multicast_hash { 747 u8 byte[EFX_MCAST_HASH_ENTRIES / 8]; 748 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8]; 749 }; 750 751 struct vfdi_status; 752 753 /* The reserved RSS context value */ 754 #define EFX_MCDI_RSS_CONTEXT_INVALID 0xffffffff 755 /** 756 * struct efx_rss_context - A user-defined RSS context for filtering 757 * @list: node of linked list on which this struct is stored 758 * @context_id: the RSS_CONTEXT_ID returned by MC firmware, or 759 * %EFX_MCDI_RSS_CONTEXT_INVALID if this context is not present on the NIC. 760 * For Siena, 0 if RSS is active, else %EFX_MCDI_RSS_CONTEXT_INVALID. 761 * @user_id: the rss_context ID exposed to userspace over ethtool. 762 * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled 763 * @rx_hash_key: Toeplitz hash key for this RSS context 764 * @indir_table: Indirection table for this RSS context 765 */ 766 struct efx_rss_context { 767 struct list_head list; 768 u32 context_id; 769 u32 user_id; 770 bool rx_hash_udp_4tuple; 771 u8 rx_hash_key[40]; 772 u32 rx_indir_table[128]; 773 }; 774 775 #ifdef CONFIG_RFS_ACCEL 776 /* Order of these is important, since filter_id >= %EFX_ARFS_FILTER_ID_PENDING 777 * is used to test if filter does or will exist. 778 */ 779 #define EFX_ARFS_FILTER_ID_PENDING -1 780 #define EFX_ARFS_FILTER_ID_ERROR -2 781 #define EFX_ARFS_FILTER_ID_REMOVING -3 782 /** 783 * struct efx_arfs_rule - record of an ARFS filter and its IDs 784 * @node: linkage into hash table 785 * @spec: details of the filter (used as key for hash table). Use efx->type to 786 * determine which member to use. 787 * @rxq_index: channel to which the filter will steer traffic. 788 * @arfs_id: filter ID which was returned to ARFS 789 * @filter_id: index in software filter table. May be 790 * %EFX_ARFS_FILTER_ID_PENDING if filter was not inserted yet, 791 * %EFX_ARFS_FILTER_ID_ERROR if filter insertion failed, or 792 * %EFX_ARFS_FILTER_ID_REMOVING if expiry is currently removing the filter. 793 */ 794 struct efx_arfs_rule { 795 struct hlist_node node; 796 struct efx_filter_spec spec; 797 u16 rxq_index; 798 u16 arfs_id; 799 s32 filter_id; 800 }; 801 802 /* Size chosen so that the table is one page (4kB) */ 803 #define EFX_ARFS_HASH_TABLE_SIZE 512 804 805 /** 806 * struct efx_async_filter_insertion - Request to asynchronously insert a filter 807 * @net_dev: Reference to the netdevice 808 * @spec: The filter to insert 809 * @work: Workitem for this request 810 * @rxq_index: Identifies the channel for which this request was made 811 * @flow_id: Identifies the kernel-side flow for which this request was made 812 */ 813 struct efx_async_filter_insertion { 814 struct net_device *net_dev; 815 struct efx_filter_spec spec; 816 struct work_struct work; 817 u16 rxq_index; 818 u32 flow_id; 819 }; 820 821 /* Maximum number of ARFS workitems that may be in flight on an efx_nic */ 822 #define EFX_RPS_MAX_IN_FLIGHT 8 823 #endif /* CONFIG_RFS_ACCEL */ 824 825 /** 826 * struct efx_nic - an Efx NIC 827 * @name: Device name (net device name or bus id before net device registered) 828 * @pci_dev: The PCI device 829 * @node: List node for maintaning primary/secondary function lists 830 * @primary: &struct efx_nic instance for the primary function of this 831 * controller. May be the same structure, and may be %NULL if no 832 * primary function is bound. Serialised by rtnl_lock. 833 * @secondary_list: List of &struct efx_nic instances for the secondary PCI 834 * functions of the controller, if this is for the primary function. 835 * Serialised by rtnl_lock. 836 * @type: Controller type attributes 837 * @legacy_irq: IRQ number 838 * @workqueue: Workqueue for port reconfigures and the HW monitor. 839 * Work items do not hold and must not acquire RTNL. 840 * @workqueue_name: Name of workqueue 841 * @reset_work: Scheduled reset workitem 842 * @membase_phys: Memory BAR value as physical address 843 * @membase: Memory BAR value 844 * @vi_stride: step between per-VI registers / memory regions 845 * @interrupt_mode: Interrupt mode 846 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds 847 * @timer_max_ns: Interrupt timer maximum value, in nanoseconds 848 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues 849 * @irqs_hooked: Channel interrupts are hooked 850 * @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues 851 * @irq_rx_moderation_us: IRQ moderation time for RX event queues 852 * @msg_enable: Log message enable flags 853 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock. 854 * @reset_pending: Bitmask for pending resets 855 * @tx_queue: TX DMA queues 856 * @rx_queue: RX DMA queues 857 * @channel: Channels 858 * @msi_context: Context for each MSI 859 * @extra_channel_types: Types of extra (non-traffic) channels that 860 * should be allocated for this NIC 861 * @xdp_tx_queue_count: Number of entries in %xdp_tx_queues. 862 * @xdp_tx_queues: Array of pointers to tx queues used for XDP transmit. 863 * @rxq_entries: Size of receive queues requested by user. 864 * @txq_entries: Size of transmit queues requested by user. 865 * @txq_stop_thresh: TX queue fill level at or above which we stop it. 866 * @txq_wake_thresh: TX queue fill level at or below which we wake it. 867 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches 868 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches 869 * @sram_lim_qw: Qword address limit of SRAM 870 * @next_buffer_table: First available buffer table id 871 * @n_channels: Number of channels in use 872 * @n_rx_channels: Number of channels used for RX (= number of RX queues) 873 * @n_tx_channels: Number of channels used for TX 874 * @n_extra_tx_channels: Number of extra channels with TX queues 875 * @tx_queues_per_channel: number of TX queues probed on each channel 876 * @n_xdp_channels: Number of channels used for XDP TX 877 * @xdp_channel_offset: Offset of zeroth channel used for XPD TX. 878 * @xdp_tx_per_channel: Max number of TX queues on an XDP TX channel. 879 * @rx_ip_align: RX DMA address offset to have IP header aligned in 880 * in accordance with NET_IP_ALIGN 881 * @rx_dma_len: Current maximum RX DMA length 882 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer 883 * @rx_buffer_truesize: Amortised allocation size of an RX buffer, 884 * for use in sk_buff::truesize 885 * @rx_prefix_size: Size of RX prefix before packet data 886 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data 887 * (valid only if @rx_prefix_size != 0; always negative) 888 * @rx_packet_len_offset: Offset of RX packet length from start of packet data 889 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative) 890 * @rx_packet_ts_offset: Offset of timestamp from start of packet data 891 * (valid only if channel->sync_timestamps_enabled; always negative) 892 * @rx_scatter: Scatter mode enabled for receives 893 * @rss_context: Main RSS context. Its @list member is the head of the list of 894 * RSS contexts created by user requests 895 * @rss_lock: Protects custom RSS context software state in @rss_context.list 896 * @vport_id: The function's vport ID, only relevant for PFs 897 * @int_error_count: Number of internal errors seen recently 898 * @int_error_expire: Time at which error count will be expired 899 * @must_realloc_vis: Flag: VIs have yet to be reallocated after MC reboot 900 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will 901 * acknowledge but do nothing else. 902 * @irq_status: Interrupt status buffer 903 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0 904 * @irq_level: IRQ level/index for IRQs not triggered by an event queue 905 * @selftest_work: Work item for asynchronous self-test 906 * @mtd_list: List of MTDs attached to the NIC 907 * @nic_data: Hardware dependent state 908 * @mcdi: Management-Controller-to-Driver Interface state 909 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode, 910 * efx_monitor() and efx_reconfigure_port() 911 * @port_enabled: Port enabled indicator. 912 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and 913 * efx_mac_work() with kernel interfaces. Safe to read under any 914 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must 915 * be held to modify it. 916 * @port_initialized: Port initialized? 917 * @net_dev: Operating system network device. Consider holding the rtnl lock 918 * @fixed_features: Features which cannot be turned off 919 * @num_mac_stats: Number of MAC stats reported by firmware (MAC_STATS_NUM_STATS 920 * field of %MC_CMD_GET_CAPABILITIES_V4 response, or %MC_CMD_MAC_NSTATS) 921 * @stats_buffer: DMA buffer for statistics 922 * @phy_type: PHY type 923 * @phy_op: PHY interface 924 * @phy_data: PHY private data (including PHY-specific stats) 925 * @mdio: PHY MDIO interface 926 * @mdio_bus: PHY MDIO bus ID (only used by Siena) 927 * @phy_mode: PHY operating mode. Serialised by @mac_lock. 928 * @link_advertising: Autonegotiation advertising flags 929 * @fec_config: Forward Error Correction configuration flags. For bit positions 930 * see &enum ethtool_fec_config_bits. 931 * @link_state: Current state of the link 932 * @n_link_state_changes: Number of times the link has changed state 933 * @unicast_filter: Flag for Falcon-arch simple unicast filter. 934 * Protected by @mac_lock. 935 * @multicast_hash: Multicast hash table for Falcon-arch. 936 * Protected by @mac_lock. 937 * @wanted_fc: Wanted flow control flags 938 * @fc_disable: When non-zero flow control is disabled. Typically used to 939 * ensure that network back pressure doesn't delay dma queue flushes. 940 * Serialised by the rtnl lock. 941 * @mac_work: Work item for changing MAC promiscuity and multicast hash 942 * @loopback_mode: Loopback status 943 * @loopback_modes: Supported loopback mode bitmask 944 * @loopback_selftest: Offline self-test private state 945 * @xdp_prog: Current XDP programme for this interface 946 * @filter_sem: Filter table rw_semaphore, protects existence of @filter_state 947 * @filter_state: Architecture-dependent filter table state 948 * @rps_mutex: Protects RPS state of all channels 949 * @rps_slot_map: bitmap of in-flight entries in @rps_slot 950 * @rps_slot: array of ARFS insertion requests for efx_filter_rfs_work() 951 * @rps_hash_lock: Protects ARFS filter mapping state (@rps_hash_table and 952 * @rps_next_id). 953 * @rps_hash_table: Mapping between ARFS filters and their various IDs 954 * @rps_next_id: next arfs_id for an ARFS filter 955 * @active_queues: Count of RX and TX queues that haven't been flushed and drained. 956 * @rxq_flush_pending: Count of number of receive queues that need to be flushed. 957 * Decremented when the efx_flush_rx_queue() is called. 958 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet 959 * completed (either success or failure). Not used when MCDI is used to 960 * flush receive queues. 961 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions. 962 * @vf_count: Number of VFs intended to be enabled. 963 * @vf_init_count: Number of VFs that have been fully initialised. 964 * @vi_scale: log2 number of vnics per VF. 965 * @ptp_data: PTP state data 966 * @ptp_warned: has this NIC seen and warned about unexpected PTP events? 967 * @vpd_sn: Serial number read from VPD 968 * @xdp_rxq_info_failed: Have any of the rx queues failed to initialise their 969 * xdp_rxq_info structures? 970 * @netdev_notifier: Netdevice notifier. 971 * @mem_bar: The BAR that is mapped into membase. 972 * @reg_base: Offset from the start of the bar to the function control window. 973 * @monitor_work: Hardware monitor workitem 974 * @biu_lock: BIU (bus interface unit) lock 975 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This 976 * field is used by efx_test_interrupts() to verify that an 977 * interrupt has occurred. 978 * @stats_lock: Statistics update lock. Must be held when calling 979 * efx_nic_type::{update,start,stop}_stats. 980 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb 981 * 982 * This is stored in the private area of the &struct net_device. 983 */ 984 struct efx_nic { 985 /* The following fields should be written very rarely */ 986 987 char name[IFNAMSIZ]; 988 struct list_head node; 989 struct efx_nic *primary; 990 struct list_head secondary_list; 991 struct pci_dev *pci_dev; 992 unsigned int port_num; 993 const struct efx_nic_type *type; 994 int legacy_irq; 995 bool eeh_disabled_legacy_irq; 996 struct workqueue_struct *workqueue; 997 char workqueue_name[16]; 998 struct work_struct reset_work; 999 resource_size_t membase_phys; 1000 void __iomem *membase; 1001 1002 unsigned int vi_stride; 1003 1004 enum efx_int_mode interrupt_mode; 1005 unsigned int timer_quantum_ns; 1006 unsigned int timer_max_ns; 1007 bool irq_rx_adaptive; 1008 bool irqs_hooked; 1009 unsigned int irq_mod_step_us; 1010 unsigned int irq_rx_moderation_us; 1011 u32 msg_enable; 1012 1013 enum nic_state state; 1014 unsigned long reset_pending; 1015 1016 struct efx_channel *channel[EFX_MAX_CHANNELS]; 1017 struct efx_msi_context msi_context[EFX_MAX_CHANNELS]; 1018 const struct efx_channel_type * 1019 extra_channel_type[EFX_MAX_EXTRA_CHANNELS]; 1020 1021 unsigned int xdp_tx_queue_count; 1022 struct efx_tx_queue **xdp_tx_queues; 1023 1024 unsigned rxq_entries; 1025 unsigned txq_entries; 1026 unsigned int txq_stop_thresh; 1027 unsigned int txq_wake_thresh; 1028 1029 unsigned tx_dc_base; 1030 unsigned rx_dc_base; 1031 unsigned sram_lim_qw; 1032 unsigned next_buffer_table; 1033 1034 unsigned int max_channels; 1035 unsigned int max_vis; 1036 unsigned int max_tx_channels; 1037 unsigned n_channels; 1038 unsigned n_rx_channels; 1039 unsigned rss_spread; 1040 unsigned tx_channel_offset; 1041 unsigned n_tx_channels; 1042 unsigned n_extra_tx_channels; 1043 unsigned int tx_queues_per_channel; 1044 unsigned int n_xdp_channels; 1045 unsigned int xdp_channel_offset; 1046 unsigned int xdp_tx_per_channel; 1047 unsigned int rx_ip_align; 1048 unsigned int rx_dma_len; 1049 unsigned int rx_buffer_order; 1050 unsigned int rx_buffer_truesize; 1051 unsigned int rx_page_buf_step; 1052 unsigned int rx_bufs_per_page; 1053 unsigned int rx_pages_per_batch; 1054 unsigned int rx_prefix_size; 1055 int rx_packet_hash_offset; 1056 int rx_packet_len_offset; 1057 int rx_packet_ts_offset; 1058 bool rx_scatter; 1059 struct efx_rss_context rss_context; 1060 struct mutex rss_lock; 1061 u32 vport_id; 1062 1063 unsigned int_error_count; 1064 unsigned long int_error_expire; 1065 1066 bool must_realloc_vis; 1067 bool irq_soft_enabled; 1068 struct efx_buffer irq_status; 1069 unsigned irq_zero_count; 1070 unsigned irq_level; 1071 struct delayed_work selftest_work; 1072 1073 #ifdef CONFIG_SFC_MTD 1074 struct list_head mtd_list; 1075 #endif 1076 1077 void *nic_data; 1078 struct efx_mcdi_data *mcdi; 1079 1080 struct mutex mac_lock; 1081 struct work_struct mac_work; 1082 bool port_enabled; 1083 1084 bool mc_bist_for_other_fn; 1085 bool port_initialized; 1086 struct net_device *net_dev; 1087 1088 netdev_features_t fixed_features; 1089 1090 u16 num_mac_stats; 1091 struct efx_buffer stats_buffer; 1092 u64 rx_nodesc_drops_total; 1093 u64 rx_nodesc_drops_while_down; 1094 bool rx_nodesc_drops_prev_state; 1095 1096 unsigned int phy_type; 1097 const struct efx_phy_operations *phy_op; 1098 void *phy_data; 1099 struct mdio_if_info mdio; 1100 unsigned int mdio_bus; 1101 enum efx_phy_mode phy_mode; 1102 1103 __ETHTOOL_DECLARE_LINK_MODE_MASK(link_advertising); 1104 u32 fec_config; 1105 struct efx_link_state link_state; 1106 unsigned int n_link_state_changes; 1107 1108 bool unicast_filter; 1109 union efx_multicast_hash multicast_hash; 1110 u8 wanted_fc; 1111 unsigned fc_disable; 1112 1113 atomic_t rx_reset; 1114 enum efx_loopback_mode loopback_mode; 1115 u64 loopback_modes; 1116 1117 void *loopback_selftest; 1118 /* We access loopback_selftest immediately before running XDP, 1119 * so we want them next to each other. 1120 */ 1121 struct bpf_prog __rcu *xdp_prog; 1122 1123 struct rw_semaphore filter_sem; 1124 void *filter_state; 1125 #ifdef CONFIG_RFS_ACCEL 1126 struct mutex rps_mutex; 1127 unsigned long rps_slot_map; 1128 struct efx_async_filter_insertion rps_slot[EFX_RPS_MAX_IN_FLIGHT]; 1129 spinlock_t rps_hash_lock; 1130 struct hlist_head *rps_hash_table; 1131 u32 rps_next_id; 1132 #endif 1133 1134 atomic_t active_queues; 1135 atomic_t rxq_flush_pending; 1136 atomic_t rxq_flush_outstanding; 1137 wait_queue_head_t flush_wq; 1138 1139 #ifdef CONFIG_SFC_SRIOV 1140 unsigned vf_count; 1141 unsigned vf_init_count; 1142 unsigned vi_scale; 1143 #endif 1144 1145 struct efx_ptp_data *ptp_data; 1146 bool ptp_warned; 1147 1148 char *vpd_sn; 1149 bool xdp_rxq_info_failed; 1150 1151 struct notifier_block netdev_notifier; 1152 1153 unsigned int mem_bar; 1154 u32 reg_base; 1155 1156 /* The following fields may be written more often */ 1157 1158 struct delayed_work monitor_work ____cacheline_aligned_in_smp; 1159 spinlock_t biu_lock; 1160 int last_irq_cpu; 1161 spinlock_t stats_lock; 1162 atomic_t n_rx_noskb_drops; 1163 }; 1164 1165 static inline int efx_dev_registered(struct efx_nic *efx) 1166 { 1167 return efx->net_dev->reg_state == NETREG_REGISTERED; 1168 } 1169 1170 static inline unsigned int efx_port_num(struct efx_nic *efx) 1171 { 1172 return efx->port_num; 1173 } 1174 1175 struct efx_mtd_partition { 1176 struct list_head node; 1177 struct mtd_info mtd; 1178 const char *dev_type_name; 1179 const char *type_name; 1180 char name[IFNAMSIZ + 20]; 1181 }; 1182 1183 struct efx_udp_tunnel { 1184 #define TUNNEL_ENCAP_UDP_PORT_ENTRY_INVALID 0xffff 1185 u16 type; /* TUNNEL_ENCAP_UDP_PORT_ENTRY_foo, see mcdi_pcol.h */ 1186 __be16 port; 1187 }; 1188 1189 /** 1190 * struct efx_nic_type - Efx device type definition 1191 * @mem_bar: Get the memory BAR 1192 * @mem_map_size: Get memory BAR mapped size 1193 * @probe: Probe the controller 1194 * @remove: Free resources allocated by probe() 1195 * @init: Initialise the controller 1196 * @dimension_resources: Dimension controller resources (buffer table, 1197 * and VIs once the available interrupt resources are clear) 1198 * @fini: Shut down the controller 1199 * @monitor: Periodic function for polling link state and hardware monitor 1200 * @map_reset_reason: Map ethtool reset reason to a reset method 1201 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible 1202 * @reset: Reset the controller hardware and possibly the PHY. This will 1203 * be called while the controller is uninitialised. 1204 * @probe_port: Probe the MAC and PHY 1205 * @remove_port: Free resources allocated by probe_port() 1206 * @handle_global_event: Handle a "global" event (may be %NULL) 1207 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues) 1208 * @prepare_flush: Prepare the hardware for flushing the DMA queues 1209 * (for Falcon architecture) 1210 * @finish_flush: Clean up after flushing the DMA queues (for Falcon 1211 * architecture) 1212 * @prepare_flr: Prepare for an FLR 1213 * @finish_flr: Clean up after an FLR 1214 * @describe_stats: Describe statistics for ethtool 1215 * @update_stats: Update statistics not provided by event handling. 1216 * Either argument may be %NULL. 1217 * @start_stats: Start the regular fetching of statistics 1218 * @pull_stats: Pull stats from the NIC and wait until they arrive. 1219 * @stop_stats: Stop the regular fetching of statistics 1220 * @set_id_led: Set state of identifying LED or revert to automatic function 1221 * @push_irq_moderation: Apply interrupt moderation value 1222 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY 1223 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL) 1224 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings 1225 * to the hardware. Serialised by the mac_lock. 1226 * @check_mac_fault: Check MAC fault state. True if fault present. 1227 * @get_wol: Get WoL configuration from driver state 1228 * @set_wol: Push WoL configuration to the NIC 1229 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume) 1230 * @test_chip: Test registers. May use efx_farch_test_registers(), and is 1231 * expected to reset the NIC. 1232 * @test_nvram: Test validity of NVRAM contents 1233 * @mcdi_request: Send an MCDI request with the given header and SDU. 1234 * The SDU length may be any value from 0 up to the protocol- 1235 * defined maximum, but its buffer will be padded to a multiple 1236 * of 4 bytes. 1237 * @mcdi_poll_response: Test whether an MCDI response is available. 1238 * @mcdi_read_response: Read the MCDI response PDU. The offset will 1239 * be a multiple of 4. The length may not be, but the buffer 1240 * will be padded so it is safe to round up. 1241 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so, 1242 * return an appropriate error code for aborting any current 1243 * request; otherwise return 0. 1244 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must 1245 * be separately enabled after this. 1246 * @irq_test_generate: Generate a test IRQ 1247 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event 1248 * queue must be separately disabled before this. 1249 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is 1250 * a pointer to the &struct efx_msi_context for the channel. 1251 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument 1252 * is a pointer to the &struct efx_nic. 1253 * @tx_probe: Allocate resources for TX queue 1254 * @tx_init: Initialise TX queue on the NIC 1255 * @tx_remove: Free resources for TX queue 1256 * @tx_write: Write TX descriptors and doorbell 1257 * @tx_enqueue: Add an SKB to TX queue 1258 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC 1259 * @rx_pull_rss_config: Read RSS hash key and indirection table back from the NIC 1260 * @rx_push_rss_context_config: Write RSS hash key and indirection table for 1261 * user RSS context to the NIC 1262 * @rx_pull_rss_context_config: Read RSS hash key and indirection table for user 1263 * RSS context back from the NIC 1264 * @rx_probe: Allocate resources for RX queue 1265 * @rx_init: Initialise RX queue on the NIC 1266 * @rx_remove: Free resources for RX queue 1267 * @rx_write: Write RX descriptors and doorbell 1268 * @rx_defer_refill: Generate a refill reminder event 1269 * @rx_packet: Receive the queued RX buffer on a channel 1270 * @rx_buf_hash_valid: Determine whether the RX prefix contains a valid hash 1271 * @ev_probe: Allocate resources for event queue 1272 * @ev_init: Initialise event queue on the NIC 1273 * @ev_fini: Deinitialise event queue on the NIC 1274 * @ev_remove: Free resources for event queue 1275 * @ev_process: Process events for a queue, up to the given NAPI quota 1276 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ 1277 * @ev_test_generate: Generate a test event 1278 * @filter_table_probe: Probe filter capabilities and set up filter software state 1279 * @filter_table_restore: Restore filters removed from hardware 1280 * @filter_table_remove: Remove filters from hardware and tear down software state 1281 * @filter_update_rx_scatter: Update filters after change to rx scatter setting 1282 * @filter_insert: add or replace a filter 1283 * @filter_remove_safe: remove a filter by ID, carefully 1284 * @filter_get_safe: retrieve a filter by ID, carefully 1285 * @filter_clear_rx: Remove all RX filters whose priority is less than or 1286 * equal to the given priority and is not %EFX_FILTER_PRI_AUTO 1287 * @filter_count_rx_used: Get the number of filters in use at a given priority 1288 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1 1289 * @filter_get_rx_ids: Get list of RX filters at a given priority 1290 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS. 1291 * This must check whether the specified table entry is used by RFS 1292 * and that rps_may_expire_flow() returns true for it. 1293 * @mtd_probe: Probe and add MTD partitions associated with this net device, 1294 * using efx_mtd_add() 1295 * @mtd_rename: Set an MTD partition name using the net device name 1296 * @mtd_read: Read from an MTD partition 1297 * @mtd_erase: Erase part of an MTD partition 1298 * @mtd_write: Write to an MTD partition 1299 * @mtd_sync: Wait for write-back to complete on MTD partition. This 1300 * also notifies the driver that a writer has finished using this 1301 * partition. 1302 * @ptp_write_host_time: Send host time to MC as part of sync protocol 1303 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX 1304 * timestamping, possibly only temporarily for the purposes of a reset. 1305 * @ptp_set_ts_config: Set hardware timestamp configuration. The flags 1306 * and tx_type will already have been validated but this operation 1307 * must validate and update rx_filter. 1308 * @get_phys_port_id: Get the underlying physical port id. 1309 * @set_mac_address: Set the MAC address of the device 1310 * @tso_versions: Returns mask of firmware-assisted TSO versions supported. 1311 * If %NULL, then device does not support any TSO version. 1312 * @udp_tnl_push_ports: Push the list of UDP tunnel ports to the NIC if required. 1313 * @udp_tnl_has_port: Check if a port has been added as UDP tunnel 1314 * @print_additional_fwver: Dump NIC-specific additional FW version info 1315 * @sensor_event: Handle a sensor event from MCDI 1316 * @revision: Hardware architecture revision 1317 * @txd_ptr_tbl_base: TX descriptor ring base address 1318 * @rxd_ptr_tbl_base: RX descriptor ring base address 1319 * @buf_tbl_base: Buffer table base address 1320 * @evq_ptr_tbl_base: Event queue pointer table base address 1321 * @evq_rptr_tbl_base: Event queue read-pointer table base address 1322 * @max_dma_mask: Maximum possible DMA mask 1323 * @rx_prefix_size: Size of RX prefix before packet data 1324 * @rx_hash_offset: Offset of RX flow hash within prefix 1325 * @rx_ts_offset: Offset of timestamp within prefix 1326 * @rx_buffer_padding: Size of padding at end of RX packet 1327 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers 1328 * @always_rx_scatter: NIC will always scatter packets to multiple buffers 1329 * @option_descriptors: NIC supports TX option descriptors 1330 * @min_interrupt_mode: Lowest capability interrupt mode supported 1331 * from &enum efx_int_mode. 1332 * @timer_period_max: Maximum period of interrupt timer (in ticks) 1333 * @offload_features: net_device feature flags for protocol offload 1334 * features implemented in hardware 1335 * @mcdi_max_ver: Maximum MCDI version supported 1336 * @hwtstamp_filters: Mask of hardware timestamp filter types supported 1337 */ 1338 struct efx_nic_type { 1339 bool is_vf; 1340 unsigned int (*mem_bar)(struct efx_nic *efx); 1341 unsigned int (*mem_map_size)(struct efx_nic *efx); 1342 int (*probe)(struct efx_nic *efx); 1343 void (*remove)(struct efx_nic *efx); 1344 int (*init)(struct efx_nic *efx); 1345 int (*dimension_resources)(struct efx_nic *efx); 1346 void (*fini)(struct efx_nic *efx); 1347 void (*monitor)(struct efx_nic *efx); 1348 enum reset_type (*map_reset_reason)(enum reset_type reason); 1349 int (*map_reset_flags)(u32 *flags); 1350 int (*reset)(struct efx_nic *efx, enum reset_type method); 1351 int (*probe_port)(struct efx_nic *efx); 1352 void (*remove_port)(struct efx_nic *efx); 1353 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *); 1354 int (*fini_dmaq)(struct efx_nic *efx); 1355 void (*prepare_flush)(struct efx_nic *efx); 1356 void (*finish_flush)(struct efx_nic *efx); 1357 void (*prepare_flr)(struct efx_nic *efx); 1358 void (*finish_flr)(struct efx_nic *efx); 1359 size_t (*describe_stats)(struct efx_nic *efx, u8 *names); 1360 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats, 1361 struct rtnl_link_stats64 *core_stats); 1362 void (*start_stats)(struct efx_nic *efx); 1363 void (*pull_stats)(struct efx_nic *efx); 1364 void (*stop_stats)(struct efx_nic *efx); 1365 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode); 1366 void (*push_irq_moderation)(struct efx_channel *channel); 1367 int (*reconfigure_port)(struct efx_nic *efx); 1368 void (*prepare_enable_fc_tx)(struct efx_nic *efx); 1369 int (*reconfigure_mac)(struct efx_nic *efx, bool mtu_only); 1370 bool (*check_mac_fault)(struct efx_nic *efx); 1371 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol); 1372 int (*set_wol)(struct efx_nic *efx, u32 type); 1373 void (*resume_wol)(struct efx_nic *efx); 1374 unsigned int (*check_caps)(const struct efx_nic *efx, 1375 u8 flag, 1376 u32 offset); 1377 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests); 1378 int (*test_nvram)(struct efx_nic *efx); 1379 void (*mcdi_request)(struct efx_nic *efx, 1380 const efx_dword_t *hdr, size_t hdr_len, 1381 const efx_dword_t *sdu, size_t sdu_len); 1382 bool (*mcdi_poll_response)(struct efx_nic *efx); 1383 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu, 1384 size_t pdu_offset, size_t pdu_len); 1385 int (*mcdi_poll_reboot)(struct efx_nic *efx); 1386 void (*mcdi_reboot_detected)(struct efx_nic *efx); 1387 void (*irq_enable_master)(struct efx_nic *efx); 1388 int (*irq_test_generate)(struct efx_nic *efx); 1389 void (*irq_disable_non_ev)(struct efx_nic *efx); 1390 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id); 1391 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id); 1392 int (*tx_probe)(struct efx_tx_queue *tx_queue); 1393 void (*tx_init)(struct efx_tx_queue *tx_queue); 1394 void (*tx_remove)(struct efx_tx_queue *tx_queue); 1395 void (*tx_write)(struct efx_tx_queue *tx_queue); 1396 netdev_tx_t (*tx_enqueue)(struct efx_tx_queue *tx_queue, struct sk_buff *skb); 1397 unsigned int (*tx_limit_len)(struct efx_tx_queue *tx_queue, 1398 dma_addr_t dma_addr, unsigned int len); 1399 int (*rx_push_rss_config)(struct efx_nic *efx, bool user, 1400 const u32 *rx_indir_table, const u8 *key); 1401 int (*rx_pull_rss_config)(struct efx_nic *efx); 1402 int (*rx_push_rss_context_config)(struct efx_nic *efx, 1403 struct efx_rss_context *ctx, 1404 const u32 *rx_indir_table, 1405 const u8 *key); 1406 int (*rx_pull_rss_context_config)(struct efx_nic *efx, 1407 struct efx_rss_context *ctx); 1408 void (*rx_restore_rss_contexts)(struct efx_nic *efx); 1409 int (*rx_probe)(struct efx_rx_queue *rx_queue); 1410 void (*rx_init)(struct efx_rx_queue *rx_queue); 1411 void (*rx_remove)(struct efx_rx_queue *rx_queue); 1412 void (*rx_write)(struct efx_rx_queue *rx_queue); 1413 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue); 1414 void (*rx_packet)(struct efx_channel *channel); 1415 bool (*rx_buf_hash_valid)(const u8 *prefix); 1416 int (*ev_probe)(struct efx_channel *channel); 1417 int (*ev_init)(struct efx_channel *channel); 1418 void (*ev_fini)(struct efx_channel *channel); 1419 void (*ev_remove)(struct efx_channel *channel); 1420 int (*ev_process)(struct efx_channel *channel, int quota); 1421 void (*ev_read_ack)(struct efx_channel *channel); 1422 void (*ev_test_generate)(struct efx_channel *channel); 1423 int (*filter_table_probe)(struct efx_nic *efx); 1424 void (*filter_table_restore)(struct efx_nic *efx); 1425 void (*filter_table_remove)(struct efx_nic *efx); 1426 void (*filter_update_rx_scatter)(struct efx_nic *efx); 1427 s32 (*filter_insert)(struct efx_nic *efx, 1428 struct efx_filter_spec *spec, bool replace); 1429 int (*filter_remove_safe)(struct efx_nic *efx, 1430 enum efx_filter_priority priority, 1431 u32 filter_id); 1432 int (*filter_get_safe)(struct efx_nic *efx, 1433 enum efx_filter_priority priority, 1434 u32 filter_id, struct efx_filter_spec *); 1435 int (*filter_clear_rx)(struct efx_nic *efx, 1436 enum efx_filter_priority priority); 1437 u32 (*filter_count_rx_used)(struct efx_nic *efx, 1438 enum efx_filter_priority priority); 1439 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx); 1440 s32 (*filter_get_rx_ids)(struct efx_nic *efx, 1441 enum efx_filter_priority priority, 1442 u32 *buf, u32 size); 1443 #ifdef CONFIG_RFS_ACCEL 1444 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id, 1445 unsigned int index); 1446 #endif 1447 #ifdef CONFIG_SFC_MTD 1448 int (*mtd_probe)(struct efx_nic *efx); 1449 void (*mtd_rename)(struct efx_mtd_partition *part); 1450 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len, 1451 size_t *retlen, u8 *buffer); 1452 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len); 1453 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len, 1454 size_t *retlen, const u8 *buffer); 1455 int (*mtd_sync)(struct mtd_info *mtd); 1456 #endif 1457 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time); 1458 int (*ptp_set_ts_sync_events)(struct efx_nic *efx, bool en, bool temp); 1459 int (*ptp_set_ts_config)(struct efx_nic *efx, 1460 struct hwtstamp_config *init); 1461 int (*sriov_configure)(struct efx_nic *efx, int num_vfs); 1462 int (*vlan_rx_add_vid)(struct efx_nic *efx, __be16 proto, u16 vid); 1463 int (*vlan_rx_kill_vid)(struct efx_nic *efx, __be16 proto, u16 vid); 1464 int (*get_phys_port_id)(struct efx_nic *efx, 1465 struct netdev_phys_item_id *ppid); 1466 int (*sriov_init)(struct efx_nic *efx); 1467 void (*sriov_fini)(struct efx_nic *efx); 1468 bool (*sriov_wanted)(struct efx_nic *efx); 1469 void (*sriov_reset)(struct efx_nic *efx); 1470 void (*sriov_flr)(struct efx_nic *efx, unsigned vf_i); 1471 int (*sriov_set_vf_mac)(struct efx_nic *efx, int vf_i, u8 *mac); 1472 int (*sriov_set_vf_vlan)(struct efx_nic *efx, int vf_i, u16 vlan, 1473 u8 qos); 1474 int (*sriov_set_vf_spoofchk)(struct efx_nic *efx, int vf_i, 1475 bool spoofchk); 1476 int (*sriov_get_vf_config)(struct efx_nic *efx, int vf_i, 1477 struct ifla_vf_info *ivi); 1478 int (*sriov_set_vf_link_state)(struct efx_nic *efx, int vf_i, 1479 int link_state); 1480 int (*vswitching_probe)(struct efx_nic *efx); 1481 int (*vswitching_restore)(struct efx_nic *efx); 1482 void (*vswitching_remove)(struct efx_nic *efx); 1483 int (*get_mac_address)(struct efx_nic *efx, unsigned char *perm_addr); 1484 int (*set_mac_address)(struct efx_nic *efx); 1485 u32 (*tso_versions)(struct efx_nic *efx); 1486 int (*udp_tnl_push_ports)(struct efx_nic *efx); 1487 bool (*udp_tnl_has_port)(struct efx_nic *efx, __be16 port); 1488 size_t (*print_additional_fwver)(struct efx_nic *efx, char *buf, 1489 size_t len); 1490 void (*sensor_event)(struct efx_nic *efx, efx_qword_t *ev); 1491 1492 int revision; 1493 unsigned int txd_ptr_tbl_base; 1494 unsigned int rxd_ptr_tbl_base; 1495 unsigned int buf_tbl_base; 1496 unsigned int evq_ptr_tbl_base; 1497 unsigned int evq_rptr_tbl_base; 1498 u64 max_dma_mask; 1499 unsigned int rx_prefix_size; 1500 unsigned int rx_hash_offset; 1501 unsigned int rx_ts_offset; 1502 unsigned int rx_buffer_padding; 1503 bool can_rx_scatter; 1504 bool always_rx_scatter; 1505 bool option_descriptors; 1506 unsigned int min_interrupt_mode; 1507 unsigned int timer_period_max; 1508 netdev_features_t offload_features; 1509 int mcdi_max_ver; 1510 unsigned int max_rx_ip_filters; 1511 u32 hwtstamp_filters; 1512 unsigned int rx_hash_key_size; 1513 }; 1514 1515 /************************************************************************** 1516 * 1517 * Prototypes and inline functions 1518 * 1519 *************************************************************************/ 1520 1521 static inline struct efx_channel * 1522 efx_get_channel(struct efx_nic *efx, unsigned index) 1523 { 1524 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_channels); 1525 return efx->channel[index]; 1526 } 1527 1528 /* Iterate over all used channels */ 1529 #define efx_for_each_channel(_channel, _efx) \ 1530 for (_channel = (_efx)->channel[0]; \ 1531 _channel; \ 1532 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \ 1533 (_efx)->channel[_channel->channel + 1] : NULL) 1534 1535 /* Iterate over all used channels in reverse */ 1536 #define efx_for_each_channel_rev(_channel, _efx) \ 1537 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \ 1538 _channel; \ 1539 _channel = _channel->channel ? \ 1540 (_efx)->channel[_channel->channel - 1] : NULL) 1541 1542 static inline struct efx_channel * 1543 efx_get_tx_channel(struct efx_nic *efx, unsigned int index) 1544 { 1545 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels); 1546 return efx->channel[efx->tx_channel_offset + index]; 1547 } 1548 1549 static inline struct efx_tx_queue * 1550 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type) 1551 { 1552 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels || 1553 type >= efx->tx_queues_per_channel); 1554 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type]; 1555 } 1556 1557 static inline struct efx_channel * 1558 efx_get_xdp_channel(struct efx_nic *efx, unsigned int index) 1559 { 1560 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_xdp_channels); 1561 return efx->channel[efx->xdp_channel_offset + index]; 1562 } 1563 1564 static inline bool efx_channel_is_xdp_tx(struct efx_channel *channel) 1565 { 1566 return channel->channel - channel->efx->xdp_channel_offset < 1567 channel->efx->n_xdp_channels; 1568 } 1569 1570 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel) 1571 { 1572 return true; 1573 } 1574 1575 static inline unsigned int efx_channel_num_tx_queues(struct efx_channel *channel) 1576 { 1577 if (efx_channel_is_xdp_tx(channel)) 1578 return channel->efx->xdp_tx_per_channel; 1579 return channel->efx->tx_queues_per_channel; 1580 } 1581 1582 static inline struct efx_tx_queue * 1583 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type) 1584 { 1585 EFX_WARN_ON_ONCE_PARANOID(type >= efx_channel_num_tx_queues(channel)); 1586 return &channel->tx_queue[type]; 1587 } 1588 1589 /* Iterate over all TX queues belonging to a channel */ 1590 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \ 1591 if (!efx_channel_has_tx_queues(_channel)) \ 1592 ; \ 1593 else \ 1594 for (_tx_queue = (_channel)->tx_queue; \ 1595 _tx_queue < (_channel)->tx_queue + \ 1596 efx_channel_num_tx_queues(_channel); \ 1597 _tx_queue++) 1598 1599 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel) 1600 { 1601 return channel->rx_queue.core_index >= 0; 1602 } 1603 1604 static inline struct efx_rx_queue * 1605 efx_channel_get_rx_queue(struct efx_channel *channel) 1606 { 1607 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_rx_queue(channel)); 1608 return &channel->rx_queue; 1609 } 1610 1611 /* Iterate over all RX queues belonging to a channel */ 1612 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \ 1613 if (!efx_channel_has_rx_queue(_channel)) \ 1614 ; \ 1615 else \ 1616 for (_rx_queue = &(_channel)->rx_queue; \ 1617 _rx_queue; \ 1618 _rx_queue = NULL) 1619 1620 static inline struct efx_channel * 1621 efx_rx_queue_channel(struct efx_rx_queue *rx_queue) 1622 { 1623 return container_of(rx_queue, struct efx_channel, rx_queue); 1624 } 1625 1626 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue) 1627 { 1628 return efx_rx_queue_channel(rx_queue)->channel; 1629 } 1630 1631 /* Returns a pointer to the specified receive buffer in the RX 1632 * descriptor queue. 1633 */ 1634 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue, 1635 unsigned int index) 1636 { 1637 return &rx_queue->buffer[index]; 1638 } 1639 1640 static inline struct efx_rx_buffer * 1641 efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf) 1642 { 1643 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask))) 1644 return efx_rx_buffer(rx_queue, 0); 1645 else 1646 return rx_buf + 1; 1647 } 1648 1649 /** 1650 * EFX_MAX_FRAME_LEN - calculate maximum frame length 1651 * 1652 * This calculates the maximum frame length that will be used for a 1653 * given MTU. The frame length will be equal to the MTU plus a 1654 * constant amount of header space and padding. This is the quantity 1655 * that the net driver will program into the MAC as the maximum frame 1656 * length. 1657 * 1658 * The 10G MAC requires 8-byte alignment on the frame 1659 * length, so we round up to the nearest 8. 1660 * 1661 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an 1662 * XGMII cycle). If the frame length reaches the maximum value in the 1663 * same cycle, the XMAC can miss the IPG altogether. We work around 1664 * this by adding a further 16 bytes. 1665 */ 1666 #define EFX_FRAME_PAD 16 1667 #define EFX_MAX_FRAME_LEN(mtu) \ 1668 (ALIGN(((mtu) + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN + EFX_FRAME_PAD), 8)) 1669 1670 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb) 1671 { 1672 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP; 1673 } 1674 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb) 1675 { 1676 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1677 } 1678 1679 /* Get the max fill level of the TX queues on this channel */ 1680 static inline unsigned int 1681 efx_channel_tx_fill_level(struct efx_channel *channel) 1682 { 1683 struct efx_tx_queue *tx_queue; 1684 unsigned int fill_level = 0; 1685 1686 /* This function is currently only used by EF100, which maybe 1687 * could do something simpler and just compute the fill level 1688 * of the single TXQ that's really in use. 1689 */ 1690 efx_for_each_channel_tx_queue(tx_queue, channel) 1691 fill_level = max(fill_level, 1692 tx_queue->insert_count - tx_queue->read_count); 1693 1694 return fill_level; 1695 } 1696 1697 /* Get all supported features. 1698 * If a feature is not fixed, it is present in hw_features. 1699 * If a feature is fixed, it does not present in hw_features, but 1700 * always in features. 1701 */ 1702 static inline netdev_features_t efx_supported_features(const struct efx_nic *efx) 1703 { 1704 const struct net_device *net_dev = efx->net_dev; 1705 1706 return net_dev->features | net_dev->hw_features; 1707 } 1708 1709 /* Get the current TX queue insert index. */ 1710 static inline unsigned int 1711 efx_tx_queue_get_insert_index(const struct efx_tx_queue *tx_queue) 1712 { 1713 return tx_queue->insert_count & tx_queue->ptr_mask; 1714 } 1715 1716 /* Get a TX buffer. */ 1717 static inline struct efx_tx_buffer * 1718 __efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 1719 { 1720 return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)]; 1721 } 1722 1723 /* Get a TX buffer, checking it's not currently in use. */ 1724 static inline struct efx_tx_buffer * 1725 efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 1726 { 1727 struct efx_tx_buffer *buffer = 1728 __efx_tx_queue_get_insert_buffer(tx_queue); 1729 1730 EFX_WARN_ON_ONCE_PARANOID(buffer->len); 1731 EFX_WARN_ON_ONCE_PARANOID(buffer->flags); 1732 EFX_WARN_ON_ONCE_PARANOID(buffer->unmap_len); 1733 1734 return buffer; 1735 } 1736 1737 #endif /* EFX_NET_DRIVER_H */ 1738