1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2005-2006 Fen Systems Ltd. 5 * Copyright 2005-2013 Solarflare Communications Inc. 6 */ 7 8 /* Common definitions for all Efx net driver code */ 9 10 #ifndef EFX_NET_DRIVER_H 11 #define EFX_NET_DRIVER_H 12 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/ethtool.h> 16 #include <linux/if_vlan.h> 17 #include <linux/timer.h> 18 #include <linux/mdio.h> 19 #include <linux/list.h> 20 #include <linux/pci.h> 21 #include <linux/device.h> 22 #include <linux/highmem.h> 23 #include <linux/workqueue.h> 24 #include <linux/mutex.h> 25 #include <linux/rwsem.h> 26 #include <linux/vmalloc.h> 27 #include <linux/mtd/mtd.h> 28 #include <net/busy_poll.h> 29 #include <net/xdp.h> 30 31 #include "enum.h" 32 #include "bitfield.h" 33 #include "filter.h" 34 35 /************************************************************************** 36 * 37 * Build definitions 38 * 39 **************************************************************************/ 40 41 #define EFX_DRIVER_VERSION "4.1" 42 43 #ifdef DEBUG 44 #define EFX_WARN_ON_ONCE_PARANOID(x) WARN_ON_ONCE(x) 45 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x) 46 #else 47 #define EFX_WARN_ON_ONCE_PARANOID(x) do {} while (0) 48 #define EFX_WARN_ON_PARANOID(x) do {} while (0) 49 #endif 50 51 /************************************************************************** 52 * 53 * Efx data structures 54 * 55 **************************************************************************/ 56 57 #define EFX_MAX_CHANNELS 32U 58 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS 59 #define EFX_EXTRA_CHANNEL_IOV 0 60 #define EFX_EXTRA_CHANNEL_PTP 1 61 #define EFX_MAX_EXTRA_CHANNELS 2U 62 63 /* Checksum generation is a per-queue option in hardware, so each 64 * queue visible to the networking core is backed by two hardware TX 65 * queues. */ 66 #define EFX_MAX_TX_TC 2 67 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS) 68 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */ 69 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */ 70 #define EFX_TXQ_TYPES 4 71 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS) 72 73 /* Maximum possible MTU the driver supports */ 74 #define EFX_MAX_MTU (9 * 1024) 75 76 /* Minimum MTU, from RFC791 (IP) */ 77 #define EFX_MIN_MTU 68 78 79 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page, 80 * and should be a multiple of the cache line size. 81 */ 82 #define EFX_RX_USR_BUF_SIZE (2048 - 256) 83 84 /* If possible, we should ensure cache line alignment at start and end 85 * of every buffer. Otherwise, we just need to ensure 4-byte 86 * alignment of the network header. 87 */ 88 #if NET_IP_ALIGN == 0 89 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES 90 #else 91 #define EFX_RX_BUF_ALIGNMENT 4 92 #endif 93 94 /* Forward declare Precision Time Protocol (PTP) support structure. */ 95 struct efx_ptp_data; 96 struct hwtstamp_config; 97 98 struct efx_self_tests; 99 100 /** 101 * struct efx_buffer - A general-purpose DMA buffer 102 * @addr: host base address of the buffer 103 * @dma_addr: DMA base address of the buffer 104 * @len: Buffer length, in bytes 105 * 106 * The NIC uses these buffers for its interrupt status registers and 107 * MAC stats dumps. 108 */ 109 struct efx_buffer { 110 void *addr; 111 dma_addr_t dma_addr; 112 unsigned int len; 113 }; 114 115 /** 116 * struct efx_special_buffer - DMA buffer entered into buffer table 117 * @buf: Standard &struct efx_buffer 118 * @index: Buffer index within controller;s buffer table 119 * @entries: Number of buffer table entries 120 * 121 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE. 122 * Event and descriptor rings are addressed via one or more buffer 123 * table entries (and so can be physically non-contiguous, although we 124 * currently do not take advantage of that). On Falcon and Siena we 125 * have to take care of allocating and initialising the entries 126 * ourselves. On later hardware this is managed by the firmware and 127 * @index and @entries are left as 0. 128 */ 129 struct efx_special_buffer { 130 struct efx_buffer buf; 131 unsigned int index; 132 unsigned int entries; 133 }; 134 135 /** 136 * struct efx_tx_buffer - buffer state for a TX descriptor 137 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be 138 * freed when descriptor completes 139 * @xdpf: When @flags & %EFX_TX_BUF_XDP, the XDP frame information; its @data 140 * member is the associated buffer to drop a page reference on. 141 * @option: When @flags & %EFX_TX_BUF_OPTION, an EF10-specific option 142 * descriptor. 143 * @dma_addr: DMA address of the fragment. 144 * @flags: Flags for allocation and DMA mapping type 145 * @len: Length of this fragment. 146 * This field is zero when the queue slot is empty. 147 * @unmap_len: Length of this fragment to unmap 148 * @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping. 149 * Only valid if @unmap_len != 0. 150 */ 151 struct efx_tx_buffer { 152 union { 153 const struct sk_buff *skb; 154 struct xdp_frame *xdpf; 155 }; 156 union { 157 efx_qword_t option; /* EF10 */ 158 dma_addr_t dma_addr; 159 }; 160 unsigned short flags; 161 unsigned short len; 162 unsigned short unmap_len; 163 unsigned short dma_offset; 164 }; 165 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */ 166 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */ 167 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */ 168 #define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */ 169 #define EFX_TX_BUF_XDP 0x20 /* buffer was sent with XDP */ 170 171 /** 172 * struct efx_tx_queue - An Efx TX queue 173 * 174 * This is a ring buffer of TX fragments. 175 * Since the TX completion path always executes on the same 176 * CPU and the xmit path can operate on different CPUs, 177 * performance is increased by ensuring that the completion 178 * path and the xmit path operate on different cache lines. 179 * This is particularly important if the xmit path is always 180 * executing on one CPU which is different from the completion 181 * path. There is also a cache line for members which are 182 * read but not written on the fast path. 183 * 184 * @efx: The associated Efx NIC 185 * @queue: DMA queue number 186 * @tso_version: Version of TSO in use for this queue. 187 * @channel: The associated channel 188 * @core_txq: The networking core TX queue structure 189 * @buffer: The software buffer ring 190 * @cb_page: Array of pages of copy buffers. Carved up according to 191 * %EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks. 192 * @txd: The hardware descriptor ring 193 * @ptr_mask: The size of the ring minus 1. 194 * @piobuf: PIO buffer region for this TX queue (shared with its partner). 195 * Size of the region is efx_piobuf_size. 196 * @piobuf_offset: Buffer offset to be specified in PIO descriptors 197 * @initialised: Has hardware queue been initialised? 198 * @timestamping: Is timestamping enabled for this channel? 199 * @xdp_tx: Is this an XDP tx queue? 200 * @handle_tso: TSO xmit preparation handler. Sets up the TSO metadata and 201 * may also map tx data, depending on the nature of the TSO implementation. 202 * @read_count: Current read pointer. 203 * This is the number of buffers that have been removed from both rings. 204 * @old_write_count: The value of @write_count when last checked. 205 * This is here for performance reasons. The xmit path will 206 * only get the up-to-date value of @write_count if this 207 * variable indicates that the queue is empty. This is to 208 * avoid cache-line ping-pong between the xmit path and the 209 * completion path. 210 * @merge_events: Number of TX merged completion events 211 * @completed_timestamp_major: Top part of the most recent tx timestamp. 212 * @completed_timestamp_minor: Low part of the most recent tx timestamp. 213 * @insert_count: Current insert pointer 214 * This is the number of buffers that have been added to the 215 * software ring. 216 * @write_count: Current write pointer 217 * This is the number of buffers that have been added to the 218 * hardware ring. 219 * @packet_write_count: Completable write pointer 220 * This is the write pointer of the last packet written. 221 * Normally this will equal @write_count, but as option descriptors 222 * don't produce completion events, they won't update this. 223 * Filled in iff @efx->type->option_descriptors; only used for PIO. 224 * Thus, this is written and used on EF10, and neither on farch. 225 * @old_read_count: The value of read_count when last checked. 226 * This is here for performance reasons. The xmit path will 227 * only get the up-to-date value of read_count if this 228 * variable indicates that the queue is full. This is to 229 * avoid cache-line ping-pong between the xmit path and the 230 * completion path. 231 * @tso_bursts: Number of times TSO xmit invoked by kernel 232 * @tso_long_headers: Number of packets with headers too long for standard 233 * blocks 234 * @tso_packets: Number of packets via the TSO xmit path 235 * @tso_fallbacks: Number of times TSO fallback used 236 * @pushes: Number of times the TX push feature has been used 237 * @pio_packets: Number of times the TX PIO feature has been used 238 * @xmit_more_available: Are any packets waiting to be pushed to the NIC 239 * @cb_packets: Number of times the TX copybreak feature has been used 240 * @empty_read_count: If the completion path has seen the queue as empty 241 * and the transmission path has not yet checked this, the value of 242 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0. 243 */ 244 struct efx_tx_queue { 245 /* Members which don't change on the fast path */ 246 struct efx_nic *efx ____cacheline_aligned_in_smp; 247 unsigned queue; 248 unsigned int tso_version; 249 struct efx_channel *channel; 250 struct netdev_queue *core_txq; 251 struct efx_tx_buffer *buffer; 252 struct efx_buffer *cb_page; 253 struct efx_special_buffer txd; 254 unsigned int ptr_mask; 255 void __iomem *piobuf; 256 unsigned int piobuf_offset; 257 bool initialised; 258 bool timestamping; 259 bool xdp_tx; 260 261 /* Function pointers used in the fast path. */ 262 int (*handle_tso)(struct efx_tx_queue*, struct sk_buff*, bool *); 263 264 /* Members used mainly on the completion path */ 265 unsigned int read_count ____cacheline_aligned_in_smp; 266 unsigned int old_write_count; 267 unsigned int merge_events; 268 unsigned int bytes_compl; 269 unsigned int pkts_compl; 270 u32 completed_timestamp_major; 271 u32 completed_timestamp_minor; 272 273 /* Members used only on the xmit path */ 274 unsigned int insert_count ____cacheline_aligned_in_smp; 275 unsigned int write_count; 276 unsigned int packet_write_count; 277 unsigned int old_read_count; 278 unsigned int tso_bursts; 279 unsigned int tso_long_headers; 280 unsigned int tso_packets; 281 unsigned int tso_fallbacks; 282 unsigned int pushes; 283 unsigned int pio_packets; 284 bool xmit_more_available; 285 unsigned int cb_packets; 286 /* Statistics to supplement MAC stats */ 287 unsigned long tx_packets; 288 289 /* Members shared between paths and sometimes updated */ 290 unsigned int empty_read_count ____cacheline_aligned_in_smp; 291 #define EFX_EMPTY_COUNT_VALID 0x80000000 292 atomic_t flush_outstanding; 293 }; 294 295 #define EFX_TX_CB_ORDER 7 296 #define EFX_TX_CB_SIZE (1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN 297 298 /** 299 * struct efx_rx_buffer - An Efx RX data buffer 300 * @dma_addr: DMA base address of the buffer 301 * @page: The associated page buffer. 302 * Will be %NULL if the buffer slot is currently free. 303 * @page_offset: If pending: offset in @page of DMA base address. 304 * If completed: offset in @page of Ethernet header. 305 * @len: If pending: length for DMA descriptor. 306 * If completed: received length, excluding hash prefix. 307 * @flags: Flags for buffer and packet state. These are only set on the 308 * first buffer of a scattered packet. 309 */ 310 struct efx_rx_buffer { 311 dma_addr_t dma_addr; 312 struct page *page; 313 u16 page_offset; 314 u16 len; 315 u16 flags; 316 }; 317 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001 318 #define EFX_RX_PKT_CSUMMED 0x0002 319 #define EFX_RX_PKT_DISCARD 0x0004 320 #define EFX_RX_PKT_TCP 0x0040 321 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */ 322 #define EFX_RX_PKT_CSUM_LEVEL 0x0200 323 324 /** 325 * struct efx_rx_page_state - Page-based rx buffer state 326 * 327 * Inserted at the start of every page allocated for receive buffers. 328 * Used to facilitate sharing dma mappings between recycled rx buffers 329 * and those passed up to the kernel. 330 * 331 * @dma_addr: The dma address of this page. 332 */ 333 struct efx_rx_page_state { 334 dma_addr_t dma_addr; 335 336 unsigned int __pad[0] ____cacheline_aligned; 337 }; 338 339 /** 340 * struct efx_rx_queue - An Efx RX queue 341 * @efx: The associated Efx NIC 342 * @core_index: Index of network core RX queue. Will be >= 0 iff this 343 * is associated with a real RX queue. 344 * @buffer: The software buffer ring 345 * @rxd: The hardware descriptor ring 346 * @ptr_mask: The size of the ring minus 1. 347 * @refill_enabled: Enable refill whenever fill level is low 348 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as 349 * @rxq_flush_pending. 350 * @added_count: Number of buffers added to the receive queue. 351 * @notified_count: Number of buffers given to NIC (<= @added_count). 352 * @removed_count: Number of buffers removed from the receive queue. 353 * @scatter_n: Used by NIC specific receive code. 354 * @scatter_len: Used by NIC specific receive code. 355 * @page_ring: The ring to store DMA mapped pages for reuse. 356 * @page_add: Counter to calculate the write pointer for the recycle ring. 357 * @page_remove: Counter to calculate the read pointer for the recycle ring. 358 * @page_recycle_count: The number of pages that have been recycled. 359 * @page_recycle_failed: The number of pages that couldn't be recycled because 360 * the kernel still held a reference to them. 361 * @page_recycle_full: The number of pages that were released because the 362 * recycle ring was full. 363 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1. 364 * @max_fill: RX descriptor maximum fill level (<= ring size) 365 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill 366 * (<= @max_fill) 367 * @min_fill: RX descriptor minimum non-zero fill level. 368 * This records the minimum fill level observed when a ring 369 * refill was triggered. 370 * @recycle_count: RX buffer recycle counter. 371 * @slow_fill: Timer used to defer efx_nic_generate_fill_event(). 372 * @xdp_rxq_info: XDP specific RX queue information. 373 * @xdp_rxq_info_valid: Is xdp_rxq_info valid data?. 374 */ 375 struct efx_rx_queue { 376 struct efx_nic *efx; 377 int core_index; 378 struct efx_rx_buffer *buffer; 379 struct efx_special_buffer rxd; 380 unsigned int ptr_mask; 381 bool refill_enabled; 382 bool flush_pending; 383 384 unsigned int added_count; 385 unsigned int notified_count; 386 unsigned int removed_count; 387 unsigned int scatter_n; 388 unsigned int scatter_len; 389 struct page **page_ring; 390 unsigned int page_add; 391 unsigned int page_remove; 392 unsigned int page_recycle_count; 393 unsigned int page_recycle_failed; 394 unsigned int page_recycle_full; 395 unsigned int page_ptr_mask; 396 unsigned int max_fill; 397 unsigned int fast_fill_trigger; 398 unsigned int min_fill; 399 unsigned int min_overfill; 400 unsigned int recycle_count; 401 struct timer_list slow_fill; 402 unsigned int slow_fill_count; 403 /* Statistics to supplement MAC stats */ 404 unsigned long rx_packets; 405 struct xdp_rxq_info xdp_rxq_info; 406 bool xdp_rxq_info_valid; 407 }; 408 409 enum efx_sync_events_state { 410 SYNC_EVENTS_DISABLED = 0, 411 SYNC_EVENTS_QUIESCENT, 412 SYNC_EVENTS_REQUESTED, 413 SYNC_EVENTS_VALID, 414 }; 415 416 /** 417 * struct efx_channel - An Efx channel 418 * 419 * A channel comprises an event queue, at least one TX queue, at least 420 * one RX queue, and an associated tasklet for processing the event 421 * queue. 422 * 423 * @efx: Associated Efx NIC 424 * @channel: Channel instance number 425 * @type: Channel type definition 426 * @eventq_init: Event queue initialised flag 427 * @enabled: Channel enabled indicator 428 * @irq: IRQ number (MSI and MSI-X only) 429 * @irq_moderation_us: IRQ moderation value (in microseconds) 430 * @napi_dev: Net device used with NAPI 431 * @napi_str: NAPI control structure 432 * @state: state for NAPI vs busy polling 433 * @state_lock: lock protecting @state 434 * @eventq: Event queue buffer 435 * @eventq_mask: Event queue pointer mask 436 * @eventq_read_ptr: Event queue read pointer 437 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel 438 * @irq_count: Number of IRQs since last adaptive moderation decision 439 * @irq_mod_score: IRQ moderation score 440 * @rfs_filter_count: number of accelerated RFS filters currently in place; 441 * equals the count of @rps_flow_id slots filled 442 * @rfs_last_expiry: value of jiffies last time some accelerated RFS filters 443 * were checked for expiry 444 * @rfs_expire_index: next accelerated RFS filter ID to check for expiry 445 * @n_rfs_succeeded: number of successful accelerated RFS filter insertions 446 * @n_rfs_failed; number of failed accelerated RFS filter insertions 447 * @filter_work: Work item for efx_filter_rfs_expire() 448 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS, 449 * indexed by filter ID 450 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors 451 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors 452 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors 453 * @n_rx_mcast_mismatch: Count of unmatched multicast frames 454 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors 455 * @n_rx_overlength: Count of RX_OVERLENGTH errors 456 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun 457 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to 458 * lack of descriptors 459 * @n_rx_merge_events: Number of RX merged completion events 460 * @n_rx_merge_packets: Number of RX packets completed by merged events 461 * @n_rx_xdp_drops: Count of RX packets intentionally dropped due to XDP 462 * @n_rx_xdp_bad_drops: Count of RX packets dropped due to XDP errors 463 * @n_rx_xdp_tx: Count of RX packets retransmitted due to XDP 464 * @n_rx_xdp_redirect: Count of RX packets redirected to a different NIC by XDP 465 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by 466 * __efx_rx_packet(), or zero if there is none 467 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered 468 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0 469 * @rx_list: list of SKBs from current RX, awaiting processing 470 * @rx_queue: RX queue for this channel 471 * @tx_queue: TX queues for this channel 472 * @sync_events_state: Current state of sync events on this channel 473 * @sync_timestamp_major: Major part of the last ptp sync event 474 * @sync_timestamp_minor: Minor part of the last ptp sync event 475 */ 476 struct efx_channel { 477 struct efx_nic *efx; 478 int channel; 479 const struct efx_channel_type *type; 480 bool eventq_init; 481 bool enabled; 482 int irq; 483 unsigned int irq_moderation_us; 484 struct net_device *napi_dev; 485 struct napi_struct napi_str; 486 #ifdef CONFIG_NET_RX_BUSY_POLL 487 unsigned long busy_poll_state; 488 #endif 489 struct efx_special_buffer eventq; 490 unsigned int eventq_mask; 491 unsigned int eventq_read_ptr; 492 int event_test_cpu; 493 494 unsigned int irq_count; 495 unsigned int irq_mod_score; 496 #ifdef CONFIG_RFS_ACCEL 497 unsigned int rfs_filter_count; 498 unsigned int rfs_last_expiry; 499 unsigned int rfs_expire_index; 500 unsigned int n_rfs_succeeded; 501 unsigned int n_rfs_failed; 502 struct delayed_work filter_work; 503 #define RPS_FLOW_ID_INVALID 0xFFFFFFFF 504 u32 *rps_flow_id; 505 #endif 506 507 unsigned int n_rx_tobe_disc; 508 unsigned int n_rx_ip_hdr_chksum_err; 509 unsigned int n_rx_tcp_udp_chksum_err; 510 unsigned int n_rx_outer_ip_hdr_chksum_err; 511 unsigned int n_rx_outer_tcp_udp_chksum_err; 512 unsigned int n_rx_inner_ip_hdr_chksum_err; 513 unsigned int n_rx_inner_tcp_udp_chksum_err; 514 unsigned int n_rx_eth_crc_err; 515 unsigned int n_rx_mcast_mismatch; 516 unsigned int n_rx_frm_trunc; 517 unsigned int n_rx_overlength; 518 unsigned int n_skbuff_leaks; 519 unsigned int n_rx_nodesc_trunc; 520 unsigned int n_rx_merge_events; 521 unsigned int n_rx_merge_packets; 522 unsigned int n_rx_xdp_drops; 523 unsigned int n_rx_xdp_bad_drops; 524 unsigned int n_rx_xdp_tx; 525 unsigned int n_rx_xdp_redirect; 526 527 unsigned int rx_pkt_n_frags; 528 unsigned int rx_pkt_index; 529 530 struct list_head *rx_list; 531 532 struct efx_rx_queue rx_queue; 533 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES]; 534 535 enum efx_sync_events_state sync_events_state; 536 u32 sync_timestamp_major; 537 u32 sync_timestamp_minor; 538 }; 539 540 /** 541 * struct efx_msi_context - Context for each MSI 542 * @efx: The associated NIC 543 * @index: Index of the channel/IRQ 544 * @name: Name of the channel/IRQ 545 * 546 * Unlike &struct efx_channel, this is never reallocated and is always 547 * safe for the IRQ handler to access. 548 */ 549 struct efx_msi_context { 550 struct efx_nic *efx; 551 unsigned int index; 552 char name[IFNAMSIZ + 6]; 553 }; 554 555 /** 556 * struct efx_channel_type - distinguishes traffic and extra channels 557 * @handle_no_channel: Handle failure to allocate an extra channel 558 * @pre_probe: Set up extra state prior to initialisation 559 * @post_remove: Tear down extra state after finalisation, if allocated. 560 * May be called on channels that have not been probed. 561 * @get_name: Generate the channel's name (used for its IRQ handler) 562 * @copy: Copy the channel state prior to reallocation. May be %NULL if 563 * reallocation is not supported. 564 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb() 565 * @want_txqs: Determine whether this channel should have TX queues 566 * created. If %NULL, TX queues are not created. 567 * @keep_eventq: Flag for whether event queue should be kept initialised 568 * while the device is stopped 569 * @want_pio: Flag for whether PIO buffers should be linked to this 570 * channel's TX queues. 571 */ 572 struct efx_channel_type { 573 void (*handle_no_channel)(struct efx_nic *); 574 int (*pre_probe)(struct efx_channel *); 575 void (*post_remove)(struct efx_channel *); 576 void (*get_name)(struct efx_channel *, char *buf, size_t len); 577 struct efx_channel *(*copy)(const struct efx_channel *); 578 bool (*receive_skb)(struct efx_channel *, struct sk_buff *); 579 bool (*want_txqs)(struct efx_channel *); 580 bool keep_eventq; 581 bool want_pio; 582 }; 583 584 enum efx_led_mode { 585 EFX_LED_OFF = 0, 586 EFX_LED_ON = 1, 587 EFX_LED_DEFAULT = 2 588 }; 589 590 #define STRING_TABLE_LOOKUP(val, member) \ 591 ((val) < member ## _max) ? member ## _names[val] : "(invalid)" 592 593 extern const char *const efx_loopback_mode_names[]; 594 extern const unsigned int efx_loopback_mode_max; 595 #define LOOPBACK_MODE(efx) \ 596 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode) 597 598 extern const char *const efx_reset_type_names[]; 599 extern const unsigned int efx_reset_type_max; 600 #define RESET_TYPE(type) \ 601 STRING_TABLE_LOOKUP(type, efx_reset_type) 602 603 void efx_get_udp_tunnel_type_name(u16 type, char *buf, size_t buflen); 604 605 enum efx_int_mode { 606 /* Be careful if altering to correct macro below */ 607 EFX_INT_MODE_MSIX = 0, 608 EFX_INT_MODE_MSI = 1, 609 EFX_INT_MODE_LEGACY = 2, 610 EFX_INT_MODE_MAX /* Insert any new items before this */ 611 }; 612 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI) 613 614 enum nic_state { 615 STATE_UNINIT = 0, /* device being probed/removed or is frozen */ 616 STATE_READY = 1, /* hardware ready and netdev registered */ 617 STATE_DISABLED = 2, /* device disabled due to hardware errors */ 618 STATE_RECOVERY = 3, /* device recovering from PCI error */ 619 }; 620 621 /* Forward declaration */ 622 struct efx_nic; 623 624 /* Pseudo bit-mask flow control field */ 625 #define EFX_FC_RX FLOW_CTRL_RX 626 #define EFX_FC_TX FLOW_CTRL_TX 627 #define EFX_FC_AUTO 4 628 629 /** 630 * struct efx_link_state - Current state of the link 631 * @up: Link is up 632 * @fd: Link is full-duplex 633 * @fc: Actual flow control flags 634 * @speed: Link speed (Mbps) 635 */ 636 struct efx_link_state { 637 bool up; 638 bool fd; 639 u8 fc; 640 unsigned int speed; 641 }; 642 643 static inline bool efx_link_state_equal(const struct efx_link_state *left, 644 const struct efx_link_state *right) 645 { 646 return left->up == right->up && left->fd == right->fd && 647 left->fc == right->fc && left->speed == right->speed; 648 } 649 650 /** 651 * struct efx_phy_operations - Efx PHY operations table 652 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds, 653 * efx->loopback_modes. 654 * @init: Initialise PHY 655 * @fini: Shut down PHY 656 * @reconfigure: Reconfigure PHY (e.g. for new link parameters) 657 * @poll: Update @link_state and report whether it changed. 658 * Serialised by the mac_lock. 659 * @get_link_ksettings: Get ethtool settings. Serialised by the mac_lock. 660 * @set_link_ksettings: Set ethtool settings. Serialised by the mac_lock. 661 * @get_fecparam: Get Forward Error Correction settings. Serialised by mac_lock. 662 * @set_fecparam: Set Forward Error Correction settings. Serialised by mac_lock. 663 * @set_npage_adv: Set abilities advertised in (Extended) Next Page 664 * (only needed where AN bit is set in mmds) 665 * @test_alive: Test that PHY is 'alive' (online) 666 * @test_name: Get the name of a PHY-specific test/result 667 * @run_tests: Run tests and record results as appropriate (offline). 668 * Flags are the ethtool tests flags. 669 */ 670 struct efx_phy_operations { 671 int (*probe) (struct efx_nic *efx); 672 int (*init) (struct efx_nic *efx); 673 void (*fini) (struct efx_nic *efx); 674 void (*remove) (struct efx_nic *efx); 675 int (*reconfigure) (struct efx_nic *efx); 676 bool (*poll) (struct efx_nic *efx); 677 void (*get_link_ksettings)(struct efx_nic *efx, 678 struct ethtool_link_ksettings *cmd); 679 int (*set_link_ksettings)(struct efx_nic *efx, 680 const struct ethtool_link_ksettings *cmd); 681 int (*get_fecparam)(struct efx_nic *efx, struct ethtool_fecparam *fec); 682 int (*set_fecparam)(struct efx_nic *efx, 683 const struct ethtool_fecparam *fec); 684 void (*set_npage_adv) (struct efx_nic *efx, u32); 685 int (*test_alive) (struct efx_nic *efx); 686 const char *(*test_name) (struct efx_nic *efx, unsigned int index); 687 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags); 688 int (*get_module_eeprom) (struct efx_nic *efx, 689 struct ethtool_eeprom *ee, 690 u8 *data); 691 int (*get_module_info) (struct efx_nic *efx, 692 struct ethtool_modinfo *modinfo); 693 }; 694 695 /** 696 * enum efx_phy_mode - PHY operating mode flags 697 * @PHY_MODE_NORMAL: on and should pass traffic 698 * @PHY_MODE_TX_DISABLED: on with TX disabled 699 * @PHY_MODE_LOW_POWER: set to low power through MDIO 700 * @PHY_MODE_OFF: switched off through external control 701 * @PHY_MODE_SPECIAL: on but will not pass traffic 702 */ 703 enum efx_phy_mode { 704 PHY_MODE_NORMAL = 0, 705 PHY_MODE_TX_DISABLED = 1, 706 PHY_MODE_LOW_POWER = 2, 707 PHY_MODE_OFF = 4, 708 PHY_MODE_SPECIAL = 8, 709 }; 710 711 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode) 712 { 713 return !!(mode & ~PHY_MODE_TX_DISABLED); 714 } 715 716 /** 717 * struct efx_hw_stat_desc - Description of a hardware statistic 718 * @name: Name of the statistic as visible through ethtool, or %NULL if 719 * it should not be exposed 720 * @dma_width: Width in bits (0 for non-DMA statistics) 721 * @offset: Offset within stats (ignored for non-DMA statistics) 722 */ 723 struct efx_hw_stat_desc { 724 const char *name; 725 u16 dma_width; 726 u16 offset; 727 }; 728 729 /* Number of bits used in a multicast filter hash address */ 730 #define EFX_MCAST_HASH_BITS 8 731 732 /* Number of (single-bit) entries in a multicast filter hash */ 733 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS) 734 735 /* An Efx multicast filter hash */ 736 union efx_multicast_hash { 737 u8 byte[EFX_MCAST_HASH_ENTRIES / 8]; 738 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8]; 739 }; 740 741 struct vfdi_status; 742 743 /* The reserved RSS context value */ 744 #define EFX_MCDI_RSS_CONTEXT_INVALID 0xffffffff 745 /** 746 * struct efx_rss_context - A user-defined RSS context for filtering 747 * @list: node of linked list on which this struct is stored 748 * @context_id: the RSS_CONTEXT_ID returned by MC firmware, or 749 * %EFX_MCDI_RSS_CONTEXT_INVALID if this context is not present on the NIC. 750 * For Siena, 0 if RSS is active, else %EFX_MCDI_RSS_CONTEXT_INVALID. 751 * @user_id: the rss_context ID exposed to userspace over ethtool. 752 * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled 753 * @rx_hash_key: Toeplitz hash key for this RSS context 754 * @indir_table: Indirection table for this RSS context 755 */ 756 struct efx_rss_context { 757 struct list_head list; 758 u32 context_id; 759 u32 user_id; 760 bool rx_hash_udp_4tuple; 761 u8 rx_hash_key[40]; 762 u32 rx_indir_table[128]; 763 }; 764 765 #ifdef CONFIG_RFS_ACCEL 766 /* Order of these is important, since filter_id >= %EFX_ARFS_FILTER_ID_PENDING 767 * is used to test if filter does or will exist. 768 */ 769 #define EFX_ARFS_FILTER_ID_PENDING -1 770 #define EFX_ARFS_FILTER_ID_ERROR -2 771 #define EFX_ARFS_FILTER_ID_REMOVING -3 772 /** 773 * struct efx_arfs_rule - record of an ARFS filter and its IDs 774 * @node: linkage into hash table 775 * @spec: details of the filter (used as key for hash table). Use efx->type to 776 * determine which member to use. 777 * @rxq_index: channel to which the filter will steer traffic. 778 * @arfs_id: filter ID which was returned to ARFS 779 * @filter_id: index in software filter table. May be 780 * %EFX_ARFS_FILTER_ID_PENDING if filter was not inserted yet, 781 * %EFX_ARFS_FILTER_ID_ERROR if filter insertion failed, or 782 * %EFX_ARFS_FILTER_ID_REMOVING if expiry is currently removing the filter. 783 */ 784 struct efx_arfs_rule { 785 struct hlist_node node; 786 struct efx_filter_spec spec; 787 u16 rxq_index; 788 u16 arfs_id; 789 s32 filter_id; 790 }; 791 792 /* Size chosen so that the table is one page (4kB) */ 793 #define EFX_ARFS_HASH_TABLE_SIZE 512 794 795 /** 796 * struct efx_async_filter_insertion - Request to asynchronously insert a filter 797 * @net_dev: Reference to the netdevice 798 * @spec: The filter to insert 799 * @work: Workitem for this request 800 * @rxq_index: Identifies the channel for which this request was made 801 * @flow_id: Identifies the kernel-side flow for which this request was made 802 */ 803 struct efx_async_filter_insertion { 804 struct net_device *net_dev; 805 struct efx_filter_spec spec; 806 struct work_struct work; 807 u16 rxq_index; 808 u32 flow_id; 809 }; 810 811 /* Maximum number of ARFS workitems that may be in flight on an efx_nic */ 812 #define EFX_RPS_MAX_IN_FLIGHT 8 813 #endif /* CONFIG_RFS_ACCEL */ 814 815 /** 816 * struct efx_nic - an Efx NIC 817 * @name: Device name (net device name or bus id before net device registered) 818 * @pci_dev: The PCI device 819 * @node: List node for maintaning primary/secondary function lists 820 * @primary: &struct efx_nic instance for the primary function of this 821 * controller. May be the same structure, and may be %NULL if no 822 * primary function is bound. Serialised by rtnl_lock. 823 * @secondary_list: List of &struct efx_nic instances for the secondary PCI 824 * functions of the controller, if this is for the primary function. 825 * Serialised by rtnl_lock. 826 * @type: Controller type attributes 827 * @legacy_irq: IRQ number 828 * @workqueue: Workqueue for port reconfigures and the HW monitor. 829 * Work items do not hold and must not acquire RTNL. 830 * @workqueue_name: Name of workqueue 831 * @reset_work: Scheduled reset workitem 832 * @membase_phys: Memory BAR value as physical address 833 * @membase: Memory BAR value 834 * @vi_stride: step between per-VI registers / memory regions 835 * @interrupt_mode: Interrupt mode 836 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds 837 * @timer_max_ns: Interrupt timer maximum value, in nanoseconds 838 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues 839 * @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues 840 * @irq_rx_moderation_us: IRQ moderation time for RX event queues 841 * @msg_enable: Log message enable flags 842 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock. 843 * @reset_pending: Bitmask for pending resets 844 * @tx_queue: TX DMA queues 845 * @rx_queue: RX DMA queues 846 * @channel: Channels 847 * @msi_context: Context for each MSI 848 * @extra_channel_types: Types of extra (non-traffic) channels that 849 * should be allocated for this NIC 850 * @xdp_tx_queue_count: Number of entries in %xdp_tx_queues. 851 * @xdp_tx_queues: Array of pointers to tx queues used for XDP transmit. 852 * @rxq_entries: Size of receive queues requested by user. 853 * @txq_entries: Size of transmit queues requested by user. 854 * @txq_stop_thresh: TX queue fill level at or above which we stop it. 855 * @txq_wake_thresh: TX queue fill level at or below which we wake it. 856 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches 857 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches 858 * @sram_lim_qw: Qword address limit of SRAM 859 * @next_buffer_table: First available buffer table id 860 * @n_channels: Number of channels in use 861 * @n_rx_channels: Number of channels used for RX (= number of RX queues) 862 * @n_tx_channels: Number of channels used for TX 863 * @n_extra_tx_channels: Number of extra channels with TX queues 864 * @n_xdp_channels: Number of channels used for XDP TX 865 * @xdp_channel_offset: Offset of zeroth channel used for XPD TX. 866 * @xdp_tx_per_channel: Max number of TX queues on an XDP TX channel. 867 * @rx_ip_align: RX DMA address offset to have IP header aligned in 868 * in accordance with NET_IP_ALIGN 869 * @rx_dma_len: Current maximum RX DMA length 870 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer 871 * @rx_buffer_truesize: Amortised allocation size of an RX buffer, 872 * for use in sk_buff::truesize 873 * @rx_prefix_size: Size of RX prefix before packet data 874 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data 875 * (valid only if @rx_prefix_size != 0; always negative) 876 * @rx_packet_len_offset: Offset of RX packet length from start of packet data 877 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative) 878 * @rx_packet_ts_offset: Offset of timestamp from start of packet data 879 * (valid only if channel->sync_timestamps_enabled; always negative) 880 * @rx_scatter: Scatter mode enabled for receives 881 * @rss_context: Main RSS context. Its @list member is the head of the list of 882 * RSS contexts created by user requests 883 * @rss_lock: Protects custom RSS context software state in @rss_context.list 884 * @int_error_count: Number of internal errors seen recently 885 * @int_error_expire: Time at which error count will be expired 886 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will 887 * acknowledge but do nothing else. 888 * @irq_status: Interrupt status buffer 889 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0 890 * @irq_level: IRQ level/index for IRQs not triggered by an event queue 891 * @selftest_work: Work item for asynchronous self-test 892 * @mtd_list: List of MTDs attached to the NIC 893 * @nic_data: Hardware dependent state 894 * @mcdi: Management-Controller-to-Driver Interface state 895 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode, 896 * efx_monitor() and efx_reconfigure_port() 897 * @port_enabled: Port enabled indicator. 898 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and 899 * efx_mac_work() with kernel interfaces. Safe to read under any 900 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must 901 * be held to modify it. 902 * @port_initialized: Port initialized? 903 * @net_dev: Operating system network device. Consider holding the rtnl lock 904 * @fixed_features: Features which cannot be turned off 905 * @num_mac_stats: Number of MAC stats reported by firmware (MAC_STATS_NUM_STATS 906 * field of %MC_CMD_GET_CAPABILITIES_V4 response, or %MC_CMD_MAC_NSTATS) 907 * @stats_buffer: DMA buffer for statistics 908 * @phy_type: PHY type 909 * @phy_op: PHY interface 910 * @phy_data: PHY private data (including PHY-specific stats) 911 * @mdio: PHY MDIO interface 912 * @mdio_bus: PHY MDIO bus ID (only used by Siena) 913 * @phy_mode: PHY operating mode. Serialised by @mac_lock. 914 * @link_advertising: Autonegotiation advertising flags 915 * @fec_config: Forward Error Correction configuration flags. For bit positions 916 * see &enum ethtool_fec_config_bits. 917 * @link_state: Current state of the link 918 * @n_link_state_changes: Number of times the link has changed state 919 * @unicast_filter: Flag for Falcon-arch simple unicast filter. 920 * Protected by @mac_lock. 921 * @multicast_hash: Multicast hash table for Falcon-arch. 922 * Protected by @mac_lock. 923 * @wanted_fc: Wanted flow control flags 924 * @fc_disable: When non-zero flow control is disabled. Typically used to 925 * ensure that network back pressure doesn't delay dma queue flushes. 926 * Serialised by the rtnl lock. 927 * @mac_work: Work item for changing MAC promiscuity and multicast hash 928 * @loopback_mode: Loopback status 929 * @loopback_modes: Supported loopback mode bitmask 930 * @loopback_selftest: Offline self-test private state 931 * @xdp_prog: Current XDP programme for this interface 932 * @filter_sem: Filter table rw_semaphore, protects existence of @filter_state 933 * @filter_state: Architecture-dependent filter table state 934 * @rps_mutex: Protects RPS state of all channels 935 * @rps_slot_map: bitmap of in-flight entries in @rps_slot 936 * @rps_slot: array of ARFS insertion requests for efx_filter_rfs_work() 937 * @rps_hash_lock: Protects ARFS filter mapping state (@rps_hash_table and 938 * @rps_next_id). 939 * @rps_hash_table: Mapping between ARFS filters and their various IDs 940 * @rps_next_id: next arfs_id for an ARFS filter 941 * @active_queues: Count of RX and TX queues that haven't been flushed and drained. 942 * @rxq_flush_pending: Count of number of receive queues that need to be flushed. 943 * Decremented when the efx_flush_rx_queue() is called. 944 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet 945 * completed (either success or failure). Not used when MCDI is used to 946 * flush receive queues. 947 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions. 948 * @vf_count: Number of VFs intended to be enabled. 949 * @vf_init_count: Number of VFs that have been fully initialised. 950 * @vi_scale: log2 number of vnics per VF. 951 * @ptp_data: PTP state data 952 * @ptp_warned: has this NIC seen and warned about unexpected PTP events? 953 * @vpd_sn: Serial number read from VPD 954 * @xdp_rxq_info_failed: Have any of the rx queues failed to initialise their 955 * xdp_rxq_info structures? 956 * @monitor_work: Hardware monitor workitem 957 * @biu_lock: BIU (bus interface unit) lock 958 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This 959 * field is used by efx_test_interrupts() to verify that an 960 * interrupt has occurred. 961 * @stats_lock: Statistics update lock. Must be held when calling 962 * efx_nic_type::{update,start,stop}_stats. 963 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb 964 * 965 * This is stored in the private area of the &struct net_device. 966 */ 967 struct efx_nic { 968 /* The following fields should be written very rarely */ 969 970 char name[IFNAMSIZ]; 971 struct list_head node; 972 struct efx_nic *primary; 973 struct list_head secondary_list; 974 struct pci_dev *pci_dev; 975 unsigned int port_num; 976 const struct efx_nic_type *type; 977 int legacy_irq; 978 bool eeh_disabled_legacy_irq; 979 struct workqueue_struct *workqueue; 980 char workqueue_name[16]; 981 struct work_struct reset_work; 982 resource_size_t membase_phys; 983 void __iomem *membase; 984 985 unsigned int vi_stride; 986 987 enum efx_int_mode interrupt_mode; 988 unsigned int timer_quantum_ns; 989 unsigned int timer_max_ns; 990 bool irq_rx_adaptive; 991 unsigned int irq_mod_step_us; 992 unsigned int irq_rx_moderation_us; 993 u32 msg_enable; 994 995 enum nic_state state; 996 unsigned long reset_pending; 997 998 struct efx_channel *channel[EFX_MAX_CHANNELS]; 999 struct efx_msi_context msi_context[EFX_MAX_CHANNELS]; 1000 const struct efx_channel_type * 1001 extra_channel_type[EFX_MAX_EXTRA_CHANNELS]; 1002 1003 unsigned int xdp_tx_queue_count; 1004 struct efx_tx_queue **xdp_tx_queues; 1005 1006 unsigned rxq_entries; 1007 unsigned txq_entries; 1008 unsigned int txq_stop_thresh; 1009 unsigned int txq_wake_thresh; 1010 1011 unsigned tx_dc_base; 1012 unsigned rx_dc_base; 1013 unsigned sram_lim_qw; 1014 unsigned next_buffer_table; 1015 1016 unsigned int max_channels; 1017 unsigned int max_tx_channels; 1018 unsigned n_channels; 1019 unsigned n_rx_channels; 1020 unsigned rss_spread; 1021 unsigned tx_channel_offset; 1022 unsigned n_tx_channels; 1023 unsigned n_extra_tx_channels; 1024 unsigned int n_xdp_channels; 1025 unsigned int xdp_channel_offset; 1026 unsigned int xdp_tx_per_channel; 1027 unsigned int rx_ip_align; 1028 unsigned int rx_dma_len; 1029 unsigned int rx_buffer_order; 1030 unsigned int rx_buffer_truesize; 1031 unsigned int rx_page_buf_step; 1032 unsigned int rx_bufs_per_page; 1033 unsigned int rx_pages_per_batch; 1034 unsigned int rx_prefix_size; 1035 int rx_packet_hash_offset; 1036 int rx_packet_len_offset; 1037 int rx_packet_ts_offset; 1038 bool rx_scatter; 1039 struct efx_rss_context rss_context; 1040 struct mutex rss_lock; 1041 1042 unsigned int_error_count; 1043 unsigned long int_error_expire; 1044 1045 bool irq_soft_enabled; 1046 struct efx_buffer irq_status; 1047 unsigned irq_zero_count; 1048 unsigned irq_level; 1049 struct delayed_work selftest_work; 1050 1051 #ifdef CONFIG_SFC_MTD 1052 struct list_head mtd_list; 1053 #endif 1054 1055 void *nic_data; 1056 struct efx_mcdi_data *mcdi; 1057 1058 struct mutex mac_lock; 1059 struct work_struct mac_work; 1060 bool port_enabled; 1061 1062 bool mc_bist_for_other_fn; 1063 bool port_initialized; 1064 struct net_device *net_dev; 1065 1066 netdev_features_t fixed_features; 1067 1068 u16 num_mac_stats; 1069 struct efx_buffer stats_buffer; 1070 u64 rx_nodesc_drops_total; 1071 u64 rx_nodesc_drops_while_down; 1072 bool rx_nodesc_drops_prev_state; 1073 1074 unsigned int phy_type; 1075 const struct efx_phy_operations *phy_op; 1076 void *phy_data; 1077 struct mdio_if_info mdio; 1078 unsigned int mdio_bus; 1079 enum efx_phy_mode phy_mode; 1080 1081 __ETHTOOL_DECLARE_LINK_MODE_MASK(link_advertising); 1082 u32 fec_config; 1083 struct efx_link_state link_state; 1084 unsigned int n_link_state_changes; 1085 1086 bool unicast_filter; 1087 union efx_multicast_hash multicast_hash; 1088 u8 wanted_fc; 1089 unsigned fc_disable; 1090 1091 atomic_t rx_reset; 1092 enum efx_loopback_mode loopback_mode; 1093 u64 loopback_modes; 1094 1095 void *loopback_selftest; 1096 /* We access loopback_selftest immediately before running XDP, 1097 * so we want them next to each other. 1098 */ 1099 struct bpf_prog __rcu *xdp_prog; 1100 1101 struct rw_semaphore filter_sem; 1102 void *filter_state; 1103 #ifdef CONFIG_RFS_ACCEL 1104 struct mutex rps_mutex; 1105 unsigned long rps_slot_map; 1106 struct efx_async_filter_insertion rps_slot[EFX_RPS_MAX_IN_FLIGHT]; 1107 spinlock_t rps_hash_lock; 1108 struct hlist_head *rps_hash_table; 1109 u32 rps_next_id; 1110 #endif 1111 1112 atomic_t active_queues; 1113 atomic_t rxq_flush_pending; 1114 atomic_t rxq_flush_outstanding; 1115 wait_queue_head_t flush_wq; 1116 1117 #ifdef CONFIG_SFC_SRIOV 1118 unsigned vf_count; 1119 unsigned vf_init_count; 1120 unsigned vi_scale; 1121 #endif 1122 1123 struct efx_ptp_data *ptp_data; 1124 bool ptp_warned; 1125 1126 char *vpd_sn; 1127 bool xdp_rxq_info_failed; 1128 1129 /* The following fields may be written more often */ 1130 1131 struct delayed_work monitor_work ____cacheline_aligned_in_smp; 1132 spinlock_t biu_lock; 1133 int last_irq_cpu; 1134 spinlock_t stats_lock; 1135 atomic_t n_rx_noskb_drops; 1136 }; 1137 1138 static inline int efx_dev_registered(struct efx_nic *efx) 1139 { 1140 return efx->net_dev->reg_state == NETREG_REGISTERED; 1141 } 1142 1143 static inline unsigned int efx_port_num(struct efx_nic *efx) 1144 { 1145 return efx->port_num; 1146 } 1147 1148 struct efx_mtd_partition { 1149 struct list_head node; 1150 struct mtd_info mtd; 1151 const char *dev_type_name; 1152 const char *type_name; 1153 char name[IFNAMSIZ + 20]; 1154 }; 1155 1156 struct efx_udp_tunnel { 1157 u16 type; /* TUNNEL_ENCAP_UDP_PORT_ENTRY_foo, see mcdi_pcol.h */ 1158 __be16 port; 1159 /* Count of repeated adds of the same port. Used only inside the list, 1160 * not in request arguments. 1161 */ 1162 u16 count; 1163 }; 1164 1165 /** 1166 * struct efx_nic_type - Efx device type definition 1167 * @mem_bar: Get the memory BAR 1168 * @mem_map_size: Get memory BAR mapped size 1169 * @probe: Probe the controller 1170 * @remove: Free resources allocated by probe() 1171 * @init: Initialise the controller 1172 * @dimension_resources: Dimension controller resources (buffer table, 1173 * and VIs once the available interrupt resources are clear) 1174 * @fini: Shut down the controller 1175 * @monitor: Periodic function for polling link state and hardware monitor 1176 * @map_reset_reason: Map ethtool reset reason to a reset method 1177 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible 1178 * @reset: Reset the controller hardware and possibly the PHY. This will 1179 * be called while the controller is uninitialised. 1180 * @probe_port: Probe the MAC and PHY 1181 * @remove_port: Free resources allocated by probe_port() 1182 * @handle_global_event: Handle a "global" event (may be %NULL) 1183 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues) 1184 * @prepare_flush: Prepare the hardware for flushing the DMA queues 1185 * (for Falcon architecture) 1186 * @finish_flush: Clean up after flushing the DMA queues (for Falcon 1187 * architecture) 1188 * @prepare_flr: Prepare for an FLR 1189 * @finish_flr: Clean up after an FLR 1190 * @describe_stats: Describe statistics for ethtool 1191 * @update_stats: Update statistics not provided by event handling. 1192 * Either argument may be %NULL. 1193 * @start_stats: Start the regular fetching of statistics 1194 * @pull_stats: Pull stats from the NIC and wait until they arrive. 1195 * @stop_stats: Stop the regular fetching of statistics 1196 * @set_id_led: Set state of identifying LED or revert to automatic function 1197 * @push_irq_moderation: Apply interrupt moderation value 1198 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY 1199 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL) 1200 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings 1201 * to the hardware. Serialised by the mac_lock. 1202 * @check_mac_fault: Check MAC fault state. True if fault present. 1203 * @get_wol: Get WoL configuration from driver state 1204 * @set_wol: Push WoL configuration to the NIC 1205 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume) 1206 * @test_chip: Test registers. May use efx_farch_test_registers(), and is 1207 * expected to reset the NIC. 1208 * @test_nvram: Test validity of NVRAM contents 1209 * @mcdi_request: Send an MCDI request with the given header and SDU. 1210 * The SDU length may be any value from 0 up to the protocol- 1211 * defined maximum, but its buffer will be padded to a multiple 1212 * of 4 bytes. 1213 * @mcdi_poll_response: Test whether an MCDI response is available. 1214 * @mcdi_read_response: Read the MCDI response PDU. The offset will 1215 * be a multiple of 4. The length may not be, but the buffer 1216 * will be padded so it is safe to round up. 1217 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so, 1218 * return an appropriate error code for aborting any current 1219 * request; otherwise return 0. 1220 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must 1221 * be separately enabled after this. 1222 * @irq_test_generate: Generate a test IRQ 1223 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event 1224 * queue must be separately disabled before this. 1225 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is 1226 * a pointer to the &struct efx_msi_context for the channel. 1227 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument 1228 * is a pointer to the &struct efx_nic. 1229 * @tx_probe: Allocate resources for TX queue 1230 * @tx_init: Initialise TX queue on the NIC 1231 * @tx_remove: Free resources for TX queue 1232 * @tx_write: Write TX descriptors and doorbell 1233 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC 1234 * @rx_pull_rss_config: Read RSS hash key and indirection table back from the NIC 1235 * @rx_push_rss_context_config: Write RSS hash key and indirection table for 1236 * user RSS context to the NIC 1237 * @rx_pull_rss_context_config: Read RSS hash key and indirection table for user 1238 * RSS context back from the NIC 1239 * @rx_probe: Allocate resources for RX queue 1240 * @rx_init: Initialise RX queue on the NIC 1241 * @rx_remove: Free resources for RX queue 1242 * @rx_write: Write RX descriptors and doorbell 1243 * @rx_defer_refill: Generate a refill reminder event 1244 * @ev_probe: Allocate resources for event queue 1245 * @ev_init: Initialise event queue on the NIC 1246 * @ev_fini: Deinitialise event queue on the NIC 1247 * @ev_remove: Free resources for event queue 1248 * @ev_process: Process events for a queue, up to the given NAPI quota 1249 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ 1250 * @ev_test_generate: Generate a test event 1251 * @filter_table_probe: Probe filter capabilities and set up filter software state 1252 * @filter_table_restore: Restore filters removed from hardware 1253 * @filter_table_remove: Remove filters from hardware and tear down software state 1254 * @filter_update_rx_scatter: Update filters after change to rx scatter setting 1255 * @filter_insert: add or replace a filter 1256 * @filter_remove_safe: remove a filter by ID, carefully 1257 * @filter_get_safe: retrieve a filter by ID, carefully 1258 * @filter_clear_rx: Remove all RX filters whose priority is less than or 1259 * equal to the given priority and is not %EFX_FILTER_PRI_AUTO 1260 * @filter_count_rx_used: Get the number of filters in use at a given priority 1261 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1 1262 * @filter_get_rx_ids: Get list of RX filters at a given priority 1263 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS. 1264 * This must check whether the specified table entry is used by RFS 1265 * and that rps_may_expire_flow() returns true for it. 1266 * @mtd_probe: Probe and add MTD partitions associated with this net device, 1267 * using efx_mtd_add() 1268 * @mtd_rename: Set an MTD partition name using the net device name 1269 * @mtd_read: Read from an MTD partition 1270 * @mtd_erase: Erase part of an MTD partition 1271 * @mtd_write: Write to an MTD partition 1272 * @mtd_sync: Wait for write-back to complete on MTD partition. This 1273 * also notifies the driver that a writer has finished using this 1274 * partition. 1275 * @ptp_write_host_time: Send host time to MC as part of sync protocol 1276 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX 1277 * timestamping, possibly only temporarily for the purposes of a reset. 1278 * @ptp_set_ts_config: Set hardware timestamp configuration. The flags 1279 * and tx_type will already have been validated but this operation 1280 * must validate and update rx_filter. 1281 * @get_phys_port_id: Get the underlying physical port id. 1282 * @set_mac_address: Set the MAC address of the device 1283 * @tso_versions: Returns mask of firmware-assisted TSO versions supported. 1284 * If %NULL, then device does not support any TSO version. 1285 * @udp_tnl_push_ports: Push the list of UDP tunnel ports to the NIC if required. 1286 * @udp_tnl_add_port: Add a UDP tunnel port 1287 * @udp_tnl_has_port: Check if a port has been added as UDP tunnel 1288 * @udp_tnl_del_port: Remove a UDP tunnel port 1289 * @revision: Hardware architecture revision 1290 * @txd_ptr_tbl_base: TX descriptor ring base address 1291 * @rxd_ptr_tbl_base: RX descriptor ring base address 1292 * @buf_tbl_base: Buffer table base address 1293 * @evq_ptr_tbl_base: Event queue pointer table base address 1294 * @evq_rptr_tbl_base: Event queue read-pointer table base address 1295 * @max_dma_mask: Maximum possible DMA mask 1296 * @rx_prefix_size: Size of RX prefix before packet data 1297 * @rx_hash_offset: Offset of RX flow hash within prefix 1298 * @rx_ts_offset: Offset of timestamp within prefix 1299 * @rx_buffer_padding: Size of padding at end of RX packet 1300 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers 1301 * @always_rx_scatter: NIC will always scatter packets to multiple buffers 1302 * @option_descriptors: NIC supports TX option descriptors 1303 * @min_interrupt_mode: Lowest capability interrupt mode supported 1304 * from &enum efx_int_mode. 1305 * @max_interrupt_mode: Highest capability interrupt mode supported 1306 * from &enum efx_int_mode. 1307 * @timer_period_max: Maximum period of interrupt timer (in ticks) 1308 * @offload_features: net_device feature flags for protocol offload 1309 * features implemented in hardware 1310 * @mcdi_max_ver: Maximum MCDI version supported 1311 * @hwtstamp_filters: Mask of hardware timestamp filter types supported 1312 */ 1313 struct efx_nic_type { 1314 bool is_vf; 1315 unsigned int (*mem_bar)(struct efx_nic *efx); 1316 unsigned int (*mem_map_size)(struct efx_nic *efx); 1317 int (*probe)(struct efx_nic *efx); 1318 void (*remove)(struct efx_nic *efx); 1319 int (*init)(struct efx_nic *efx); 1320 int (*dimension_resources)(struct efx_nic *efx); 1321 void (*fini)(struct efx_nic *efx); 1322 void (*monitor)(struct efx_nic *efx); 1323 enum reset_type (*map_reset_reason)(enum reset_type reason); 1324 int (*map_reset_flags)(u32 *flags); 1325 int (*reset)(struct efx_nic *efx, enum reset_type method); 1326 int (*probe_port)(struct efx_nic *efx); 1327 void (*remove_port)(struct efx_nic *efx); 1328 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *); 1329 int (*fini_dmaq)(struct efx_nic *efx); 1330 void (*prepare_flush)(struct efx_nic *efx); 1331 void (*finish_flush)(struct efx_nic *efx); 1332 void (*prepare_flr)(struct efx_nic *efx); 1333 void (*finish_flr)(struct efx_nic *efx); 1334 size_t (*describe_stats)(struct efx_nic *efx, u8 *names); 1335 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats, 1336 struct rtnl_link_stats64 *core_stats); 1337 void (*start_stats)(struct efx_nic *efx); 1338 void (*pull_stats)(struct efx_nic *efx); 1339 void (*stop_stats)(struct efx_nic *efx); 1340 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode); 1341 void (*push_irq_moderation)(struct efx_channel *channel); 1342 int (*reconfigure_port)(struct efx_nic *efx); 1343 void (*prepare_enable_fc_tx)(struct efx_nic *efx); 1344 int (*reconfigure_mac)(struct efx_nic *efx); 1345 bool (*check_mac_fault)(struct efx_nic *efx); 1346 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol); 1347 int (*set_wol)(struct efx_nic *efx, u32 type); 1348 void (*resume_wol)(struct efx_nic *efx); 1349 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests); 1350 int (*test_nvram)(struct efx_nic *efx); 1351 void (*mcdi_request)(struct efx_nic *efx, 1352 const efx_dword_t *hdr, size_t hdr_len, 1353 const efx_dword_t *sdu, size_t sdu_len); 1354 bool (*mcdi_poll_response)(struct efx_nic *efx); 1355 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu, 1356 size_t pdu_offset, size_t pdu_len); 1357 int (*mcdi_poll_reboot)(struct efx_nic *efx); 1358 void (*mcdi_reboot_detected)(struct efx_nic *efx); 1359 void (*irq_enable_master)(struct efx_nic *efx); 1360 int (*irq_test_generate)(struct efx_nic *efx); 1361 void (*irq_disable_non_ev)(struct efx_nic *efx); 1362 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id); 1363 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id); 1364 int (*tx_probe)(struct efx_tx_queue *tx_queue); 1365 void (*tx_init)(struct efx_tx_queue *tx_queue); 1366 void (*tx_remove)(struct efx_tx_queue *tx_queue); 1367 void (*tx_write)(struct efx_tx_queue *tx_queue); 1368 unsigned int (*tx_limit_len)(struct efx_tx_queue *tx_queue, 1369 dma_addr_t dma_addr, unsigned int len); 1370 int (*rx_push_rss_config)(struct efx_nic *efx, bool user, 1371 const u32 *rx_indir_table, const u8 *key); 1372 int (*rx_pull_rss_config)(struct efx_nic *efx); 1373 int (*rx_push_rss_context_config)(struct efx_nic *efx, 1374 struct efx_rss_context *ctx, 1375 const u32 *rx_indir_table, 1376 const u8 *key); 1377 int (*rx_pull_rss_context_config)(struct efx_nic *efx, 1378 struct efx_rss_context *ctx); 1379 void (*rx_restore_rss_contexts)(struct efx_nic *efx); 1380 int (*rx_probe)(struct efx_rx_queue *rx_queue); 1381 void (*rx_init)(struct efx_rx_queue *rx_queue); 1382 void (*rx_remove)(struct efx_rx_queue *rx_queue); 1383 void (*rx_write)(struct efx_rx_queue *rx_queue); 1384 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue); 1385 int (*ev_probe)(struct efx_channel *channel); 1386 int (*ev_init)(struct efx_channel *channel); 1387 void (*ev_fini)(struct efx_channel *channel); 1388 void (*ev_remove)(struct efx_channel *channel); 1389 int (*ev_process)(struct efx_channel *channel, int quota); 1390 void (*ev_read_ack)(struct efx_channel *channel); 1391 void (*ev_test_generate)(struct efx_channel *channel); 1392 int (*filter_table_probe)(struct efx_nic *efx); 1393 void (*filter_table_restore)(struct efx_nic *efx); 1394 void (*filter_table_remove)(struct efx_nic *efx); 1395 void (*filter_update_rx_scatter)(struct efx_nic *efx); 1396 s32 (*filter_insert)(struct efx_nic *efx, 1397 struct efx_filter_spec *spec, bool replace); 1398 int (*filter_remove_safe)(struct efx_nic *efx, 1399 enum efx_filter_priority priority, 1400 u32 filter_id); 1401 int (*filter_get_safe)(struct efx_nic *efx, 1402 enum efx_filter_priority priority, 1403 u32 filter_id, struct efx_filter_spec *); 1404 int (*filter_clear_rx)(struct efx_nic *efx, 1405 enum efx_filter_priority priority); 1406 u32 (*filter_count_rx_used)(struct efx_nic *efx, 1407 enum efx_filter_priority priority); 1408 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx); 1409 s32 (*filter_get_rx_ids)(struct efx_nic *efx, 1410 enum efx_filter_priority priority, 1411 u32 *buf, u32 size); 1412 #ifdef CONFIG_RFS_ACCEL 1413 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id, 1414 unsigned int index); 1415 #endif 1416 #ifdef CONFIG_SFC_MTD 1417 int (*mtd_probe)(struct efx_nic *efx); 1418 void (*mtd_rename)(struct efx_mtd_partition *part); 1419 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len, 1420 size_t *retlen, u8 *buffer); 1421 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len); 1422 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len, 1423 size_t *retlen, const u8 *buffer); 1424 int (*mtd_sync)(struct mtd_info *mtd); 1425 #endif 1426 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time); 1427 int (*ptp_set_ts_sync_events)(struct efx_nic *efx, bool en, bool temp); 1428 int (*ptp_set_ts_config)(struct efx_nic *efx, 1429 struct hwtstamp_config *init); 1430 int (*sriov_configure)(struct efx_nic *efx, int num_vfs); 1431 int (*vlan_rx_add_vid)(struct efx_nic *efx, __be16 proto, u16 vid); 1432 int (*vlan_rx_kill_vid)(struct efx_nic *efx, __be16 proto, u16 vid); 1433 int (*get_phys_port_id)(struct efx_nic *efx, 1434 struct netdev_phys_item_id *ppid); 1435 int (*sriov_init)(struct efx_nic *efx); 1436 void (*sriov_fini)(struct efx_nic *efx); 1437 bool (*sriov_wanted)(struct efx_nic *efx); 1438 void (*sriov_reset)(struct efx_nic *efx); 1439 void (*sriov_flr)(struct efx_nic *efx, unsigned vf_i); 1440 int (*sriov_set_vf_mac)(struct efx_nic *efx, int vf_i, u8 *mac); 1441 int (*sriov_set_vf_vlan)(struct efx_nic *efx, int vf_i, u16 vlan, 1442 u8 qos); 1443 int (*sriov_set_vf_spoofchk)(struct efx_nic *efx, int vf_i, 1444 bool spoofchk); 1445 int (*sriov_get_vf_config)(struct efx_nic *efx, int vf_i, 1446 struct ifla_vf_info *ivi); 1447 int (*sriov_set_vf_link_state)(struct efx_nic *efx, int vf_i, 1448 int link_state); 1449 int (*vswitching_probe)(struct efx_nic *efx); 1450 int (*vswitching_restore)(struct efx_nic *efx); 1451 void (*vswitching_remove)(struct efx_nic *efx); 1452 int (*get_mac_address)(struct efx_nic *efx, unsigned char *perm_addr); 1453 int (*set_mac_address)(struct efx_nic *efx); 1454 u32 (*tso_versions)(struct efx_nic *efx); 1455 int (*udp_tnl_push_ports)(struct efx_nic *efx); 1456 int (*udp_tnl_add_port)(struct efx_nic *efx, struct efx_udp_tunnel tnl); 1457 bool (*udp_tnl_has_port)(struct efx_nic *efx, __be16 port); 1458 int (*udp_tnl_del_port)(struct efx_nic *efx, struct efx_udp_tunnel tnl); 1459 1460 int revision; 1461 unsigned int txd_ptr_tbl_base; 1462 unsigned int rxd_ptr_tbl_base; 1463 unsigned int buf_tbl_base; 1464 unsigned int evq_ptr_tbl_base; 1465 unsigned int evq_rptr_tbl_base; 1466 u64 max_dma_mask; 1467 unsigned int rx_prefix_size; 1468 unsigned int rx_hash_offset; 1469 unsigned int rx_ts_offset; 1470 unsigned int rx_buffer_padding; 1471 bool can_rx_scatter; 1472 bool always_rx_scatter; 1473 bool option_descriptors; 1474 unsigned int min_interrupt_mode; 1475 unsigned int max_interrupt_mode; 1476 unsigned int timer_period_max; 1477 netdev_features_t offload_features; 1478 int mcdi_max_ver; 1479 unsigned int max_rx_ip_filters; 1480 u32 hwtstamp_filters; 1481 unsigned int rx_hash_key_size; 1482 }; 1483 1484 /************************************************************************** 1485 * 1486 * Prototypes and inline functions 1487 * 1488 *************************************************************************/ 1489 1490 static inline struct efx_channel * 1491 efx_get_channel(struct efx_nic *efx, unsigned index) 1492 { 1493 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_channels); 1494 return efx->channel[index]; 1495 } 1496 1497 /* Iterate over all used channels */ 1498 #define efx_for_each_channel(_channel, _efx) \ 1499 for (_channel = (_efx)->channel[0]; \ 1500 _channel; \ 1501 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \ 1502 (_efx)->channel[_channel->channel + 1] : NULL) 1503 1504 /* Iterate over all used channels in reverse */ 1505 #define efx_for_each_channel_rev(_channel, _efx) \ 1506 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \ 1507 _channel; \ 1508 _channel = _channel->channel ? \ 1509 (_efx)->channel[_channel->channel - 1] : NULL) 1510 1511 static inline struct efx_tx_queue * 1512 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type) 1513 { 1514 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels || 1515 type >= EFX_TXQ_TYPES); 1516 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type]; 1517 } 1518 1519 static inline struct efx_channel * 1520 efx_get_xdp_channel(struct efx_nic *efx, unsigned int index) 1521 { 1522 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_xdp_channels); 1523 return efx->channel[efx->xdp_channel_offset + index]; 1524 } 1525 1526 static inline bool efx_channel_is_xdp_tx(struct efx_channel *channel) 1527 { 1528 return channel->channel - channel->efx->xdp_channel_offset < 1529 channel->efx->n_xdp_channels; 1530 } 1531 1532 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel) 1533 { 1534 return true; 1535 } 1536 1537 static inline struct efx_tx_queue * 1538 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type) 1539 { 1540 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_tx_queues(channel) || 1541 type >= EFX_TXQ_TYPES); 1542 return &channel->tx_queue[type]; 1543 } 1544 1545 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue) 1546 { 1547 return !(tx_queue->efx->net_dev->num_tc < 2 && 1548 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI); 1549 } 1550 1551 /* Iterate over all TX queues belonging to a channel */ 1552 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \ 1553 if (!efx_channel_has_tx_queues(_channel)) \ 1554 ; \ 1555 else \ 1556 for (_tx_queue = (_channel)->tx_queue; \ 1557 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \ 1558 (efx_tx_queue_used(_tx_queue) || \ 1559 efx_channel_is_xdp_tx(_channel)); \ 1560 _tx_queue++) 1561 1562 /* Iterate over all possible TX queues belonging to a channel */ 1563 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \ 1564 if (!efx_channel_has_tx_queues(_channel)) \ 1565 ; \ 1566 else \ 1567 for (_tx_queue = (_channel)->tx_queue; \ 1568 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \ 1569 _tx_queue++) 1570 1571 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel) 1572 { 1573 return channel->rx_queue.core_index >= 0; 1574 } 1575 1576 static inline struct efx_rx_queue * 1577 efx_channel_get_rx_queue(struct efx_channel *channel) 1578 { 1579 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_rx_queue(channel)); 1580 return &channel->rx_queue; 1581 } 1582 1583 /* Iterate over all RX queues belonging to a channel */ 1584 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \ 1585 if (!efx_channel_has_rx_queue(_channel)) \ 1586 ; \ 1587 else \ 1588 for (_rx_queue = &(_channel)->rx_queue; \ 1589 _rx_queue; \ 1590 _rx_queue = NULL) 1591 1592 static inline struct efx_channel * 1593 efx_rx_queue_channel(struct efx_rx_queue *rx_queue) 1594 { 1595 return container_of(rx_queue, struct efx_channel, rx_queue); 1596 } 1597 1598 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue) 1599 { 1600 return efx_rx_queue_channel(rx_queue)->channel; 1601 } 1602 1603 /* Returns a pointer to the specified receive buffer in the RX 1604 * descriptor queue. 1605 */ 1606 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue, 1607 unsigned int index) 1608 { 1609 return &rx_queue->buffer[index]; 1610 } 1611 1612 static inline struct efx_rx_buffer * 1613 efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf) 1614 { 1615 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask))) 1616 return efx_rx_buffer(rx_queue, 0); 1617 else 1618 return rx_buf + 1; 1619 } 1620 1621 /** 1622 * EFX_MAX_FRAME_LEN - calculate maximum frame length 1623 * 1624 * This calculates the maximum frame length that will be used for a 1625 * given MTU. The frame length will be equal to the MTU plus a 1626 * constant amount of header space and padding. This is the quantity 1627 * that the net driver will program into the MAC as the maximum frame 1628 * length. 1629 * 1630 * The 10G MAC requires 8-byte alignment on the frame 1631 * length, so we round up to the nearest 8. 1632 * 1633 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an 1634 * XGMII cycle). If the frame length reaches the maximum value in the 1635 * same cycle, the XMAC can miss the IPG altogether. We work around 1636 * this by adding a further 16 bytes. 1637 */ 1638 #define EFX_FRAME_PAD 16 1639 #define EFX_MAX_FRAME_LEN(mtu) \ 1640 (ALIGN(((mtu) + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN + EFX_FRAME_PAD), 8)) 1641 1642 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb) 1643 { 1644 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP; 1645 } 1646 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb) 1647 { 1648 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1649 } 1650 1651 /* Get all supported features. 1652 * If a feature is not fixed, it is present in hw_features. 1653 * If a feature is fixed, it does not present in hw_features, but 1654 * always in features. 1655 */ 1656 static inline netdev_features_t efx_supported_features(const struct efx_nic *efx) 1657 { 1658 const struct net_device *net_dev = efx->net_dev; 1659 1660 return net_dev->features | net_dev->hw_features; 1661 } 1662 1663 /* Get the current TX queue insert index. */ 1664 static inline unsigned int 1665 efx_tx_queue_get_insert_index(const struct efx_tx_queue *tx_queue) 1666 { 1667 return tx_queue->insert_count & tx_queue->ptr_mask; 1668 } 1669 1670 /* Get a TX buffer. */ 1671 static inline struct efx_tx_buffer * 1672 __efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 1673 { 1674 return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)]; 1675 } 1676 1677 /* Get a TX buffer, checking it's not currently in use. */ 1678 static inline struct efx_tx_buffer * 1679 efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 1680 { 1681 struct efx_tx_buffer *buffer = 1682 __efx_tx_queue_get_insert_buffer(tx_queue); 1683 1684 EFX_WARN_ON_ONCE_PARANOID(buffer->len); 1685 EFX_WARN_ON_ONCE_PARANOID(buffer->flags); 1686 EFX_WARN_ON_ONCE_PARANOID(buffer->unmap_len); 1687 1688 return buffer; 1689 } 1690 1691 #endif /* EFX_NET_DRIVER_H */ 1692