1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2005-2006 Fen Systems Ltd. 5 * Copyright 2005-2013 Solarflare Communications Inc. 6 */ 7 8 /* Common definitions for all Efx net driver code */ 9 10 #ifndef EFX_NET_DRIVER_H 11 #define EFX_NET_DRIVER_H 12 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/ethtool.h> 16 #include <linux/if_vlan.h> 17 #include <linux/timer.h> 18 #include <linux/mdio.h> 19 #include <linux/list.h> 20 #include <linux/pci.h> 21 #include <linux/device.h> 22 #include <linux/highmem.h> 23 #include <linux/workqueue.h> 24 #include <linux/mutex.h> 25 #include <linux/rwsem.h> 26 #include <linux/vmalloc.h> 27 #include <linux/i2c.h> 28 #include <linux/mtd/mtd.h> 29 #include <net/busy_poll.h> 30 #include <net/xdp.h> 31 32 #include "enum.h" 33 #include "bitfield.h" 34 #include "filter.h" 35 36 /************************************************************************** 37 * 38 * Build definitions 39 * 40 **************************************************************************/ 41 42 #define EFX_DRIVER_VERSION "4.1" 43 44 #ifdef DEBUG 45 #define EFX_WARN_ON_ONCE_PARANOID(x) WARN_ON_ONCE(x) 46 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x) 47 #else 48 #define EFX_WARN_ON_ONCE_PARANOID(x) do {} while (0) 49 #define EFX_WARN_ON_PARANOID(x) do {} while (0) 50 #endif 51 52 /************************************************************************** 53 * 54 * Efx data structures 55 * 56 **************************************************************************/ 57 58 #define EFX_MAX_CHANNELS 32U 59 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS 60 #define EFX_EXTRA_CHANNEL_IOV 0 61 #define EFX_EXTRA_CHANNEL_PTP 1 62 #define EFX_MAX_EXTRA_CHANNELS 2U 63 64 /* Checksum generation is a per-queue option in hardware, so each 65 * queue visible to the networking core is backed by two hardware TX 66 * queues. */ 67 #define EFX_MAX_TX_TC 2 68 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS) 69 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */ 70 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */ 71 #define EFX_TXQ_TYPES 4 72 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS) 73 74 /* Maximum possible MTU the driver supports */ 75 #define EFX_MAX_MTU (9 * 1024) 76 77 /* Minimum MTU, from RFC791 (IP) */ 78 #define EFX_MIN_MTU 68 79 80 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page, 81 * and should be a multiple of the cache line size. 82 */ 83 #define EFX_RX_USR_BUF_SIZE (2048 - 256) 84 85 /* If possible, we should ensure cache line alignment at start and end 86 * of every buffer. Otherwise, we just need to ensure 4-byte 87 * alignment of the network header. 88 */ 89 #if NET_IP_ALIGN == 0 90 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES 91 #else 92 #define EFX_RX_BUF_ALIGNMENT 4 93 #endif 94 95 /* Forward declare Precision Time Protocol (PTP) support structure. */ 96 struct efx_ptp_data; 97 struct hwtstamp_config; 98 99 struct efx_self_tests; 100 101 /** 102 * struct efx_buffer - A general-purpose DMA buffer 103 * @addr: host base address of the buffer 104 * @dma_addr: DMA base address of the buffer 105 * @len: Buffer length, in bytes 106 * 107 * The NIC uses these buffers for its interrupt status registers and 108 * MAC stats dumps. 109 */ 110 struct efx_buffer { 111 void *addr; 112 dma_addr_t dma_addr; 113 unsigned int len; 114 }; 115 116 /** 117 * struct efx_special_buffer - DMA buffer entered into buffer table 118 * @buf: Standard &struct efx_buffer 119 * @index: Buffer index within controller;s buffer table 120 * @entries: Number of buffer table entries 121 * 122 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE. 123 * Event and descriptor rings are addressed via one or more buffer 124 * table entries (and so can be physically non-contiguous, although we 125 * currently do not take advantage of that). On Falcon and Siena we 126 * have to take care of allocating and initialising the entries 127 * ourselves. On later hardware this is managed by the firmware and 128 * @index and @entries are left as 0. 129 */ 130 struct efx_special_buffer { 131 struct efx_buffer buf; 132 unsigned int index; 133 unsigned int entries; 134 }; 135 136 /** 137 * struct efx_tx_buffer - buffer state for a TX descriptor 138 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be 139 * freed when descriptor completes 140 * @xdpf: When @flags & %EFX_TX_BUF_XDP, the XDP frame information; its @data 141 * member is the associated buffer to drop a page reference on. 142 * @dma_addr: DMA address of the fragment. 143 * @flags: Flags for allocation and DMA mapping type 144 * @len: Length of this fragment. 145 * This field is zero when the queue slot is empty. 146 * @unmap_len: Length of this fragment to unmap 147 * @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping. 148 * Only valid if @unmap_len != 0. 149 */ 150 struct efx_tx_buffer { 151 union { 152 const struct sk_buff *skb; 153 struct xdp_frame *xdpf; 154 }; 155 union { 156 efx_qword_t option; 157 dma_addr_t dma_addr; 158 }; 159 unsigned short flags; 160 unsigned short len; 161 unsigned short unmap_len; 162 unsigned short dma_offset; 163 }; 164 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */ 165 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */ 166 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */ 167 #define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */ 168 #define EFX_TX_BUF_XDP 0x20 /* buffer was sent with XDP */ 169 170 /** 171 * struct efx_tx_queue - An Efx TX queue 172 * 173 * This is a ring buffer of TX fragments. 174 * Since the TX completion path always executes on the same 175 * CPU and the xmit path can operate on different CPUs, 176 * performance is increased by ensuring that the completion 177 * path and the xmit path operate on different cache lines. 178 * This is particularly important if the xmit path is always 179 * executing on one CPU which is different from the completion 180 * path. There is also a cache line for members which are 181 * read but not written on the fast path. 182 * 183 * @efx: The associated Efx NIC 184 * @queue: DMA queue number 185 * @tso_version: Version of TSO in use for this queue. 186 * @channel: The associated channel 187 * @core_txq: The networking core TX queue structure 188 * @buffer: The software buffer ring 189 * @cb_page: Array of pages of copy buffers. Carved up according to 190 * %EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks. 191 * @txd: The hardware descriptor ring 192 * @ptr_mask: The size of the ring minus 1. 193 * @piobuf: PIO buffer region for this TX queue (shared with its partner). 194 * Size of the region is efx_piobuf_size. 195 * @piobuf_offset: Buffer offset to be specified in PIO descriptors 196 * @initialised: Has hardware queue been initialised? 197 * @timestamping: Is timestamping enabled for this channel? 198 * @xdp_tx: Is this an XDP tx queue? 199 * @handle_tso: TSO xmit preparation handler. Sets up the TSO metadata and 200 * may also map tx data, depending on the nature of the TSO implementation. 201 * @read_count: Current read pointer. 202 * This is the number of buffers that have been removed from both rings. 203 * @old_write_count: The value of @write_count when last checked. 204 * This is here for performance reasons. The xmit path will 205 * only get the up-to-date value of @write_count if this 206 * variable indicates that the queue is empty. This is to 207 * avoid cache-line ping-pong between the xmit path and the 208 * completion path. 209 * @merge_events: Number of TX merged completion events 210 * @completed_desc_ptr: Most recent completed pointer - only used with 211 * timestamping. 212 * @completed_timestamp_major: Top part of the most recent tx timestamp. 213 * @completed_timestamp_minor: Low part of the most recent tx timestamp. 214 * @insert_count: Current insert pointer 215 * This is the number of buffers that have been added to the 216 * software ring. 217 * @write_count: Current write pointer 218 * This is the number of buffers that have been added to the 219 * hardware ring. 220 * @packet_write_count: Completable write pointer 221 * This is the write pointer of the last packet written. 222 * Normally this will equal @write_count, but as option descriptors 223 * don't produce completion events, they won't update this. 224 * Filled in iff @efx->type->option_descriptors; only used for PIO. 225 * Thus, this is written and used on EF10, and neither on farch. 226 * @old_read_count: The value of read_count when last checked. 227 * This is here for performance reasons. The xmit path will 228 * only get the up-to-date value of read_count if this 229 * variable indicates that the queue is full. This is to 230 * avoid cache-line ping-pong between the xmit path and the 231 * completion path. 232 * @tso_bursts: Number of times TSO xmit invoked by kernel 233 * @tso_long_headers: Number of packets with headers too long for standard 234 * blocks 235 * @tso_packets: Number of packets via the TSO xmit path 236 * @tso_fallbacks: Number of times TSO fallback used 237 * @pushes: Number of times the TX push feature has been used 238 * @pio_packets: Number of times the TX PIO feature has been used 239 * @xmit_more_available: Are any packets waiting to be pushed to the NIC 240 * @cb_packets: Number of times the TX copybreak feature has been used 241 * @empty_read_count: If the completion path has seen the queue as empty 242 * and the transmission path has not yet checked this, the value of 243 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0. 244 */ 245 struct efx_tx_queue { 246 /* Members which don't change on the fast path */ 247 struct efx_nic *efx ____cacheline_aligned_in_smp; 248 unsigned queue; 249 unsigned int tso_version; 250 struct efx_channel *channel; 251 struct netdev_queue *core_txq; 252 struct efx_tx_buffer *buffer; 253 struct efx_buffer *cb_page; 254 struct efx_special_buffer txd; 255 unsigned int ptr_mask; 256 void __iomem *piobuf; 257 unsigned int piobuf_offset; 258 bool initialised; 259 bool timestamping; 260 bool xdp_tx; 261 262 /* Function pointers used in the fast path. */ 263 int (*handle_tso)(struct efx_tx_queue*, struct sk_buff*, bool *); 264 265 /* Members used mainly on the completion path */ 266 unsigned int read_count ____cacheline_aligned_in_smp; 267 unsigned int old_write_count; 268 unsigned int merge_events; 269 unsigned int bytes_compl; 270 unsigned int pkts_compl; 271 unsigned int completed_desc_ptr; 272 u32 completed_timestamp_major; 273 u32 completed_timestamp_minor; 274 275 /* Members used only on the xmit path */ 276 unsigned int insert_count ____cacheline_aligned_in_smp; 277 unsigned int write_count; 278 unsigned int packet_write_count; 279 unsigned int old_read_count; 280 unsigned int tso_bursts; 281 unsigned int tso_long_headers; 282 unsigned int tso_packets; 283 unsigned int tso_fallbacks; 284 unsigned int pushes; 285 unsigned int pio_packets; 286 bool xmit_more_available; 287 unsigned int cb_packets; 288 /* Statistics to supplement MAC stats */ 289 unsigned long tx_packets; 290 291 /* Members shared between paths and sometimes updated */ 292 unsigned int empty_read_count ____cacheline_aligned_in_smp; 293 #define EFX_EMPTY_COUNT_VALID 0x80000000 294 atomic_t flush_outstanding; 295 }; 296 297 #define EFX_TX_CB_ORDER 7 298 #define EFX_TX_CB_SIZE (1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN 299 300 /** 301 * struct efx_rx_buffer - An Efx RX data buffer 302 * @dma_addr: DMA base address of the buffer 303 * @page: The associated page buffer. 304 * Will be %NULL if the buffer slot is currently free. 305 * @page_offset: If pending: offset in @page of DMA base address. 306 * If completed: offset in @page of Ethernet header. 307 * @len: If pending: length for DMA descriptor. 308 * If completed: received length, excluding hash prefix. 309 * @flags: Flags for buffer and packet state. These are only set on the 310 * first buffer of a scattered packet. 311 */ 312 struct efx_rx_buffer { 313 dma_addr_t dma_addr; 314 struct page *page; 315 u16 page_offset; 316 u16 len; 317 u16 flags; 318 }; 319 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001 320 #define EFX_RX_PKT_CSUMMED 0x0002 321 #define EFX_RX_PKT_DISCARD 0x0004 322 #define EFX_RX_PKT_TCP 0x0040 323 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */ 324 #define EFX_RX_PKT_CSUM_LEVEL 0x0200 325 326 /** 327 * struct efx_rx_page_state - Page-based rx buffer state 328 * 329 * Inserted at the start of every page allocated for receive buffers. 330 * Used to facilitate sharing dma mappings between recycled rx buffers 331 * and those passed up to the kernel. 332 * 333 * @dma_addr: The dma address of this page. 334 */ 335 struct efx_rx_page_state { 336 dma_addr_t dma_addr; 337 338 unsigned int __pad[0] ____cacheline_aligned; 339 }; 340 341 /** 342 * struct efx_rx_queue - An Efx RX queue 343 * @efx: The associated Efx NIC 344 * @core_index: Index of network core RX queue. Will be >= 0 iff this 345 * is associated with a real RX queue. 346 * @buffer: The software buffer ring 347 * @rxd: The hardware descriptor ring 348 * @ptr_mask: The size of the ring minus 1. 349 * @refill_enabled: Enable refill whenever fill level is low 350 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as 351 * @rxq_flush_pending. 352 * @added_count: Number of buffers added to the receive queue. 353 * @notified_count: Number of buffers given to NIC (<= @added_count). 354 * @removed_count: Number of buffers removed from the receive queue. 355 * @scatter_n: Used by NIC specific receive code. 356 * @scatter_len: Used by NIC specific receive code. 357 * @page_ring: The ring to store DMA mapped pages for reuse. 358 * @page_add: Counter to calculate the write pointer for the recycle ring. 359 * @page_remove: Counter to calculate the read pointer for the recycle ring. 360 * @page_recycle_count: The number of pages that have been recycled. 361 * @page_recycle_failed: The number of pages that couldn't be recycled because 362 * the kernel still held a reference to them. 363 * @page_recycle_full: The number of pages that were released because the 364 * recycle ring was full. 365 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1. 366 * @max_fill: RX descriptor maximum fill level (<= ring size) 367 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill 368 * (<= @max_fill) 369 * @min_fill: RX descriptor minimum non-zero fill level. 370 * This records the minimum fill level observed when a ring 371 * refill was triggered. 372 * @recycle_count: RX buffer recycle counter. 373 * @slow_fill: Timer used to defer efx_nic_generate_fill_event(). 374 * @xdp_rxq_info: XDP specific RX queue information. 375 * @xdp_rxq_info_valid: Is xdp_rxq_info valid data?. 376 */ 377 struct efx_rx_queue { 378 struct efx_nic *efx; 379 int core_index; 380 struct efx_rx_buffer *buffer; 381 struct efx_special_buffer rxd; 382 unsigned int ptr_mask; 383 bool refill_enabled; 384 bool flush_pending; 385 386 unsigned int added_count; 387 unsigned int notified_count; 388 unsigned int removed_count; 389 unsigned int scatter_n; 390 unsigned int scatter_len; 391 struct page **page_ring; 392 unsigned int page_add; 393 unsigned int page_remove; 394 unsigned int page_recycle_count; 395 unsigned int page_recycle_failed; 396 unsigned int page_recycle_full; 397 unsigned int page_ptr_mask; 398 unsigned int max_fill; 399 unsigned int fast_fill_trigger; 400 unsigned int min_fill; 401 unsigned int min_overfill; 402 unsigned int recycle_count; 403 struct timer_list slow_fill; 404 unsigned int slow_fill_count; 405 /* Statistics to supplement MAC stats */ 406 unsigned long rx_packets; 407 struct xdp_rxq_info xdp_rxq_info; 408 bool xdp_rxq_info_valid; 409 }; 410 411 enum efx_sync_events_state { 412 SYNC_EVENTS_DISABLED = 0, 413 SYNC_EVENTS_QUIESCENT, 414 SYNC_EVENTS_REQUESTED, 415 SYNC_EVENTS_VALID, 416 }; 417 418 /** 419 * struct efx_channel - An Efx channel 420 * 421 * A channel comprises an event queue, at least one TX queue, at least 422 * one RX queue, and an associated tasklet for processing the event 423 * queue. 424 * 425 * @efx: Associated Efx NIC 426 * @channel: Channel instance number 427 * @type: Channel type definition 428 * @eventq_init: Event queue initialised flag 429 * @enabled: Channel enabled indicator 430 * @irq: IRQ number (MSI and MSI-X only) 431 * @irq_moderation_us: IRQ moderation value (in microseconds) 432 * @napi_dev: Net device used with NAPI 433 * @napi_str: NAPI control structure 434 * @state: state for NAPI vs busy polling 435 * @state_lock: lock protecting @state 436 * @eventq: Event queue buffer 437 * @eventq_mask: Event queue pointer mask 438 * @eventq_read_ptr: Event queue read pointer 439 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel 440 * @irq_count: Number of IRQs since last adaptive moderation decision 441 * @irq_mod_score: IRQ moderation score 442 * @rfs_filter_count: number of accelerated RFS filters currently in place; 443 * equals the count of @rps_flow_id slots filled 444 * @rfs_last_expiry: value of jiffies last time some accelerated RFS filters 445 * were checked for expiry 446 * @rfs_expire_index: next accelerated RFS filter ID to check for expiry 447 * @n_rfs_succeeded: number of successful accelerated RFS filter insertions 448 * @n_rfs_failed; number of failed accelerated RFS filter insertions 449 * @filter_work: Work item for efx_filter_rfs_expire() 450 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS, 451 * indexed by filter ID 452 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors 453 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors 454 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors 455 * @n_rx_mcast_mismatch: Count of unmatched multicast frames 456 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors 457 * @n_rx_overlength: Count of RX_OVERLENGTH errors 458 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun 459 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to 460 * lack of descriptors 461 * @n_rx_merge_events: Number of RX merged completion events 462 * @n_rx_merge_packets: Number of RX packets completed by merged events 463 * @n_rx_xdp_drops: Count of RX packets intentionally dropped due to XDP 464 * @n_rx_xdp_bad_drops: Count of RX packets dropped due to XDP errors 465 * @n_rx_xdp_tx: Count of RX packets retransmitted due to XDP 466 * @n_rx_xdp_redirect: Count of RX packets redirected to a different NIC by XDP 467 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by 468 * __efx_rx_packet(), or zero if there is none 469 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered 470 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0 471 * @rx_list: list of SKBs from current RX, awaiting processing 472 * @rx_queue: RX queue for this channel 473 * @tx_queue: TX queues for this channel 474 * @sync_events_state: Current state of sync events on this channel 475 * @sync_timestamp_major: Major part of the last ptp sync event 476 * @sync_timestamp_minor: Minor part of the last ptp sync event 477 */ 478 struct efx_channel { 479 struct efx_nic *efx; 480 int channel; 481 const struct efx_channel_type *type; 482 bool eventq_init; 483 bool enabled; 484 int irq; 485 unsigned int irq_moderation_us; 486 struct net_device *napi_dev; 487 struct napi_struct napi_str; 488 #ifdef CONFIG_NET_RX_BUSY_POLL 489 unsigned long busy_poll_state; 490 #endif 491 struct efx_special_buffer eventq; 492 unsigned int eventq_mask; 493 unsigned int eventq_read_ptr; 494 int event_test_cpu; 495 496 unsigned int irq_count; 497 unsigned int irq_mod_score; 498 #ifdef CONFIG_RFS_ACCEL 499 unsigned int rfs_filter_count; 500 unsigned int rfs_last_expiry; 501 unsigned int rfs_expire_index; 502 unsigned int n_rfs_succeeded; 503 unsigned int n_rfs_failed; 504 struct delayed_work filter_work; 505 #define RPS_FLOW_ID_INVALID 0xFFFFFFFF 506 u32 *rps_flow_id; 507 #endif 508 509 unsigned int n_rx_tobe_disc; 510 unsigned int n_rx_ip_hdr_chksum_err; 511 unsigned int n_rx_tcp_udp_chksum_err; 512 unsigned int n_rx_outer_ip_hdr_chksum_err; 513 unsigned int n_rx_outer_tcp_udp_chksum_err; 514 unsigned int n_rx_inner_ip_hdr_chksum_err; 515 unsigned int n_rx_inner_tcp_udp_chksum_err; 516 unsigned int n_rx_eth_crc_err; 517 unsigned int n_rx_mcast_mismatch; 518 unsigned int n_rx_frm_trunc; 519 unsigned int n_rx_overlength; 520 unsigned int n_skbuff_leaks; 521 unsigned int n_rx_nodesc_trunc; 522 unsigned int n_rx_merge_events; 523 unsigned int n_rx_merge_packets; 524 unsigned int n_rx_xdp_drops; 525 unsigned int n_rx_xdp_bad_drops; 526 unsigned int n_rx_xdp_tx; 527 unsigned int n_rx_xdp_redirect; 528 529 unsigned int rx_pkt_n_frags; 530 unsigned int rx_pkt_index; 531 532 struct list_head *rx_list; 533 534 struct efx_rx_queue rx_queue; 535 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES]; 536 537 enum efx_sync_events_state sync_events_state; 538 u32 sync_timestamp_major; 539 u32 sync_timestamp_minor; 540 }; 541 542 /** 543 * struct efx_msi_context - Context for each MSI 544 * @efx: The associated NIC 545 * @index: Index of the channel/IRQ 546 * @name: Name of the channel/IRQ 547 * 548 * Unlike &struct efx_channel, this is never reallocated and is always 549 * safe for the IRQ handler to access. 550 */ 551 struct efx_msi_context { 552 struct efx_nic *efx; 553 unsigned int index; 554 char name[IFNAMSIZ + 6]; 555 }; 556 557 /** 558 * struct efx_channel_type - distinguishes traffic and extra channels 559 * @handle_no_channel: Handle failure to allocate an extra channel 560 * @pre_probe: Set up extra state prior to initialisation 561 * @post_remove: Tear down extra state after finalisation, if allocated. 562 * May be called on channels that have not been probed. 563 * @get_name: Generate the channel's name (used for its IRQ handler) 564 * @copy: Copy the channel state prior to reallocation. May be %NULL if 565 * reallocation is not supported. 566 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb() 567 * @want_txqs: Determine whether this channel should have TX queues 568 * created. If %NULL, TX queues are not created. 569 * @keep_eventq: Flag for whether event queue should be kept initialised 570 * while the device is stopped 571 * @want_pio: Flag for whether PIO buffers should be linked to this 572 * channel's TX queues. 573 */ 574 struct efx_channel_type { 575 void (*handle_no_channel)(struct efx_nic *); 576 int (*pre_probe)(struct efx_channel *); 577 void (*post_remove)(struct efx_channel *); 578 void (*get_name)(struct efx_channel *, char *buf, size_t len); 579 struct efx_channel *(*copy)(const struct efx_channel *); 580 bool (*receive_skb)(struct efx_channel *, struct sk_buff *); 581 bool (*want_txqs)(struct efx_channel *); 582 bool keep_eventq; 583 bool want_pio; 584 }; 585 586 enum efx_led_mode { 587 EFX_LED_OFF = 0, 588 EFX_LED_ON = 1, 589 EFX_LED_DEFAULT = 2 590 }; 591 592 #define STRING_TABLE_LOOKUP(val, member) \ 593 ((val) < member ## _max) ? member ## _names[val] : "(invalid)" 594 595 extern const char *const efx_loopback_mode_names[]; 596 extern const unsigned int efx_loopback_mode_max; 597 #define LOOPBACK_MODE(efx) \ 598 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode) 599 600 extern const char *const efx_reset_type_names[]; 601 extern const unsigned int efx_reset_type_max; 602 #define RESET_TYPE(type) \ 603 STRING_TABLE_LOOKUP(type, efx_reset_type) 604 605 void efx_get_udp_tunnel_type_name(u16 type, char *buf, size_t buflen); 606 607 enum efx_int_mode { 608 /* Be careful if altering to correct macro below */ 609 EFX_INT_MODE_MSIX = 0, 610 EFX_INT_MODE_MSI = 1, 611 EFX_INT_MODE_LEGACY = 2, 612 EFX_INT_MODE_MAX /* Insert any new items before this */ 613 }; 614 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI) 615 616 enum nic_state { 617 STATE_UNINIT = 0, /* device being probed/removed or is frozen */ 618 STATE_READY = 1, /* hardware ready and netdev registered */ 619 STATE_DISABLED = 2, /* device disabled due to hardware errors */ 620 STATE_RECOVERY = 3, /* device recovering from PCI error */ 621 }; 622 623 /* Forward declaration */ 624 struct efx_nic; 625 626 /* Pseudo bit-mask flow control field */ 627 #define EFX_FC_RX FLOW_CTRL_RX 628 #define EFX_FC_TX FLOW_CTRL_TX 629 #define EFX_FC_AUTO 4 630 631 /** 632 * struct efx_link_state - Current state of the link 633 * @up: Link is up 634 * @fd: Link is full-duplex 635 * @fc: Actual flow control flags 636 * @speed: Link speed (Mbps) 637 */ 638 struct efx_link_state { 639 bool up; 640 bool fd; 641 u8 fc; 642 unsigned int speed; 643 }; 644 645 static inline bool efx_link_state_equal(const struct efx_link_state *left, 646 const struct efx_link_state *right) 647 { 648 return left->up == right->up && left->fd == right->fd && 649 left->fc == right->fc && left->speed == right->speed; 650 } 651 652 /** 653 * struct efx_phy_operations - Efx PHY operations table 654 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds, 655 * efx->loopback_modes. 656 * @init: Initialise PHY 657 * @fini: Shut down PHY 658 * @reconfigure: Reconfigure PHY (e.g. for new link parameters) 659 * @poll: Update @link_state and report whether it changed. 660 * Serialised by the mac_lock. 661 * @get_link_ksettings: Get ethtool settings. Serialised by the mac_lock. 662 * @set_link_ksettings: Set ethtool settings. Serialised by the mac_lock. 663 * @get_fecparam: Get Forward Error Correction settings. Serialised by mac_lock. 664 * @set_fecparam: Set Forward Error Correction settings. Serialised by mac_lock. 665 * @set_npage_adv: Set abilities advertised in (Extended) Next Page 666 * (only needed where AN bit is set in mmds) 667 * @test_alive: Test that PHY is 'alive' (online) 668 * @test_name: Get the name of a PHY-specific test/result 669 * @run_tests: Run tests and record results as appropriate (offline). 670 * Flags are the ethtool tests flags. 671 */ 672 struct efx_phy_operations { 673 int (*probe) (struct efx_nic *efx); 674 int (*init) (struct efx_nic *efx); 675 void (*fini) (struct efx_nic *efx); 676 void (*remove) (struct efx_nic *efx); 677 int (*reconfigure) (struct efx_nic *efx); 678 bool (*poll) (struct efx_nic *efx); 679 void (*get_link_ksettings)(struct efx_nic *efx, 680 struct ethtool_link_ksettings *cmd); 681 int (*set_link_ksettings)(struct efx_nic *efx, 682 const struct ethtool_link_ksettings *cmd); 683 int (*get_fecparam)(struct efx_nic *efx, struct ethtool_fecparam *fec); 684 int (*set_fecparam)(struct efx_nic *efx, 685 const struct ethtool_fecparam *fec); 686 void (*set_npage_adv) (struct efx_nic *efx, u32); 687 int (*test_alive) (struct efx_nic *efx); 688 const char *(*test_name) (struct efx_nic *efx, unsigned int index); 689 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags); 690 int (*get_module_eeprom) (struct efx_nic *efx, 691 struct ethtool_eeprom *ee, 692 u8 *data); 693 int (*get_module_info) (struct efx_nic *efx, 694 struct ethtool_modinfo *modinfo); 695 }; 696 697 /** 698 * enum efx_phy_mode - PHY operating mode flags 699 * @PHY_MODE_NORMAL: on and should pass traffic 700 * @PHY_MODE_TX_DISABLED: on with TX disabled 701 * @PHY_MODE_LOW_POWER: set to low power through MDIO 702 * @PHY_MODE_OFF: switched off through external control 703 * @PHY_MODE_SPECIAL: on but will not pass traffic 704 */ 705 enum efx_phy_mode { 706 PHY_MODE_NORMAL = 0, 707 PHY_MODE_TX_DISABLED = 1, 708 PHY_MODE_LOW_POWER = 2, 709 PHY_MODE_OFF = 4, 710 PHY_MODE_SPECIAL = 8, 711 }; 712 713 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode) 714 { 715 return !!(mode & ~PHY_MODE_TX_DISABLED); 716 } 717 718 /** 719 * struct efx_hw_stat_desc - Description of a hardware statistic 720 * @name: Name of the statistic as visible through ethtool, or %NULL if 721 * it should not be exposed 722 * @dma_width: Width in bits (0 for non-DMA statistics) 723 * @offset: Offset within stats (ignored for non-DMA statistics) 724 */ 725 struct efx_hw_stat_desc { 726 const char *name; 727 u16 dma_width; 728 u16 offset; 729 }; 730 731 /* Number of bits used in a multicast filter hash address */ 732 #define EFX_MCAST_HASH_BITS 8 733 734 /* Number of (single-bit) entries in a multicast filter hash */ 735 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS) 736 737 /* An Efx multicast filter hash */ 738 union efx_multicast_hash { 739 u8 byte[EFX_MCAST_HASH_ENTRIES / 8]; 740 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8]; 741 }; 742 743 struct vfdi_status; 744 745 /* The reserved RSS context value */ 746 #define EFX_EF10_RSS_CONTEXT_INVALID 0xffffffff 747 /** 748 * struct efx_rss_context - A user-defined RSS context for filtering 749 * @list: node of linked list on which this struct is stored 750 * @context_id: the RSS_CONTEXT_ID returned by MC firmware, or 751 * %EFX_EF10_RSS_CONTEXT_INVALID if this context is not present on the NIC. 752 * For Siena, 0 if RSS is active, else %EFX_EF10_RSS_CONTEXT_INVALID. 753 * @user_id: the rss_context ID exposed to userspace over ethtool. 754 * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled 755 * @rx_hash_key: Toeplitz hash key for this RSS context 756 * @indir_table: Indirection table for this RSS context 757 */ 758 struct efx_rss_context { 759 struct list_head list; 760 u32 context_id; 761 u32 user_id; 762 bool rx_hash_udp_4tuple; 763 u8 rx_hash_key[40]; 764 u32 rx_indir_table[128]; 765 }; 766 767 #ifdef CONFIG_RFS_ACCEL 768 /* Order of these is important, since filter_id >= %EFX_ARFS_FILTER_ID_PENDING 769 * is used to test if filter does or will exist. 770 */ 771 #define EFX_ARFS_FILTER_ID_PENDING -1 772 #define EFX_ARFS_FILTER_ID_ERROR -2 773 #define EFX_ARFS_FILTER_ID_REMOVING -3 774 /** 775 * struct efx_arfs_rule - record of an ARFS filter and its IDs 776 * @node: linkage into hash table 777 * @spec: details of the filter (used as key for hash table). Use efx->type to 778 * determine which member to use. 779 * @rxq_index: channel to which the filter will steer traffic. 780 * @arfs_id: filter ID which was returned to ARFS 781 * @filter_id: index in software filter table. May be 782 * %EFX_ARFS_FILTER_ID_PENDING if filter was not inserted yet, 783 * %EFX_ARFS_FILTER_ID_ERROR if filter insertion failed, or 784 * %EFX_ARFS_FILTER_ID_REMOVING if expiry is currently removing the filter. 785 */ 786 struct efx_arfs_rule { 787 struct hlist_node node; 788 struct efx_filter_spec spec; 789 u16 rxq_index; 790 u16 arfs_id; 791 s32 filter_id; 792 }; 793 794 /* Size chosen so that the table is one page (4kB) */ 795 #define EFX_ARFS_HASH_TABLE_SIZE 512 796 797 /** 798 * struct efx_async_filter_insertion - Request to asynchronously insert a filter 799 * @net_dev: Reference to the netdevice 800 * @spec: The filter to insert 801 * @work: Workitem for this request 802 * @rxq_index: Identifies the channel for which this request was made 803 * @flow_id: Identifies the kernel-side flow for which this request was made 804 */ 805 struct efx_async_filter_insertion { 806 struct net_device *net_dev; 807 struct efx_filter_spec spec; 808 struct work_struct work; 809 u16 rxq_index; 810 u32 flow_id; 811 }; 812 813 /* Maximum number of ARFS workitems that may be in flight on an efx_nic */ 814 #define EFX_RPS_MAX_IN_FLIGHT 8 815 #endif /* CONFIG_RFS_ACCEL */ 816 817 /** 818 * struct efx_nic - an Efx NIC 819 * @name: Device name (net device name or bus id before net device registered) 820 * @pci_dev: The PCI device 821 * @node: List node for maintaning primary/secondary function lists 822 * @primary: &struct efx_nic instance for the primary function of this 823 * controller. May be the same structure, and may be %NULL if no 824 * primary function is bound. Serialised by rtnl_lock. 825 * @secondary_list: List of &struct efx_nic instances for the secondary PCI 826 * functions of the controller, if this is for the primary function. 827 * Serialised by rtnl_lock. 828 * @type: Controller type attributes 829 * @legacy_irq: IRQ number 830 * @workqueue: Workqueue for port reconfigures and the HW monitor. 831 * Work items do not hold and must not acquire RTNL. 832 * @workqueue_name: Name of workqueue 833 * @reset_work: Scheduled reset workitem 834 * @membase_phys: Memory BAR value as physical address 835 * @membase: Memory BAR value 836 * @vi_stride: step between per-VI registers / memory regions 837 * @interrupt_mode: Interrupt mode 838 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds 839 * @timer_max_ns: Interrupt timer maximum value, in nanoseconds 840 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues 841 * @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues 842 * @irq_rx_moderation_us: IRQ moderation time for RX event queues 843 * @msg_enable: Log message enable flags 844 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock. 845 * @reset_pending: Bitmask for pending resets 846 * @tx_queue: TX DMA queues 847 * @rx_queue: RX DMA queues 848 * @channel: Channels 849 * @msi_context: Context for each MSI 850 * @extra_channel_types: Types of extra (non-traffic) channels that 851 * should be allocated for this NIC 852 * @xdp_tx_queue_count: Number of entries in %xdp_tx_queues. 853 * @xdp_tx_queues: Array of pointers to tx queues used for XDP transmit. 854 * @rxq_entries: Size of receive queues requested by user. 855 * @txq_entries: Size of transmit queues requested by user. 856 * @txq_stop_thresh: TX queue fill level at or above which we stop it. 857 * @txq_wake_thresh: TX queue fill level at or below which we wake it. 858 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches 859 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches 860 * @sram_lim_qw: Qword address limit of SRAM 861 * @next_buffer_table: First available buffer table id 862 * @n_channels: Number of channels in use 863 * @n_rx_channels: Number of channels used for RX (= number of RX queues) 864 * @n_tx_channels: Number of channels used for TX 865 * @n_extra_tx_channels: Number of extra channels with TX queues 866 * @n_xdp_channels: Number of channels used for XDP TX 867 * @xdp_channel_offset: Offset of zeroth channel used for XPD TX. 868 * @xdp_tx_per_channel: Max number of TX queues on an XDP TX channel. 869 * @rx_ip_align: RX DMA address offset to have IP header aligned in 870 * in accordance with NET_IP_ALIGN 871 * @rx_dma_len: Current maximum RX DMA length 872 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer 873 * @rx_buffer_truesize: Amortised allocation size of an RX buffer, 874 * for use in sk_buff::truesize 875 * @rx_prefix_size: Size of RX prefix before packet data 876 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data 877 * (valid only if @rx_prefix_size != 0; always negative) 878 * @rx_packet_len_offset: Offset of RX packet length from start of packet data 879 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative) 880 * @rx_packet_ts_offset: Offset of timestamp from start of packet data 881 * (valid only if channel->sync_timestamps_enabled; always negative) 882 * @rx_scatter: Scatter mode enabled for receives 883 * @rss_context: Main RSS context. Its @list member is the head of the list of 884 * RSS contexts created by user requests 885 * @rss_lock: Protects custom RSS context software state in @rss_context.list 886 * @int_error_count: Number of internal errors seen recently 887 * @int_error_expire: Time at which error count will be expired 888 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will 889 * acknowledge but do nothing else. 890 * @irq_status: Interrupt status buffer 891 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0 892 * @irq_level: IRQ level/index for IRQs not triggered by an event queue 893 * @selftest_work: Work item for asynchronous self-test 894 * @mtd_list: List of MTDs attached to the NIC 895 * @nic_data: Hardware dependent state 896 * @mcdi: Management-Controller-to-Driver Interface state 897 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode, 898 * efx_monitor() and efx_reconfigure_port() 899 * @port_enabled: Port enabled indicator. 900 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and 901 * efx_mac_work() with kernel interfaces. Safe to read under any 902 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must 903 * be held to modify it. 904 * @port_initialized: Port initialized? 905 * @net_dev: Operating system network device. Consider holding the rtnl lock 906 * @fixed_features: Features which cannot be turned off 907 * @num_mac_stats: Number of MAC stats reported by firmware (MAC_STATS_NUM_STATS 908 * field of %MC_CMD_GET_CAPABILITIES_V4 response, or %MC_CMD_MAC_NSTATS) 909 * @stats_buffer: DMA buffer for statistics 910 * @phy_type: PHY type 911 * @phy_op: PHY interface 912 * @phy_data: PHY private data (including PHY-specific stats) 913 * @mdio: PHY MDIO interface 914 * @mdio_bus: PHY MDIO bus ID (only used by Siena) 915 * @phy_mode: PHY operating mode. Serialised by @mac_lock. 916 * @link_advertising: Autonegotiation advertising flags 917 * @fec_config: Forward Error Correction configuration flags. For bit positions 918 * see &enum ethtool_fec_config_bits. 919 * @link_state: Current state of the link 920 * @n_link_state_changes: Number of times the link has changed state 921 * @unicast_filter: Flag for Falcon-arch simple unicast filter. 922 * Protected by @mac_lock. 923 * @multicast_hash: Multicast hash table for Falcon-arch. 924 * Protected by @mac_lock. 925 * @wanted_fc: Wanted flow control flags 926 * @fc_disable: When non-zero flow control is disabled. Typically used to 927 * ensure that network back pressure doesn't delay dma queue flushes. 928 * Serialised by the rtnl lock. 929 * @mac_work: Work item for changing MAC promiscuity and multicast hash 930 * @loopback_mode: Loopback status 931 * @loopback_modes: Supported loopback mode bitmask 932 * @loopback_selftest: Offline self-test private state 933 * @xdp_prog: Current XDP programme for this interface 934 * @filter_sem: Filter table rw_semaphore, protects existence of @filter_state 935 * @filter_state: Architecture-dependent filter table state 936 * @rps_mutex: Protects RPS state of all channels 937 * @rps_slot_map: bitmap of in-flight entries in @rps_slot 938 * @rps_slot: array of ARFS insertion requests for efx_filter_rfs_work() 939 * @rps_hash_lock: Protects ARFS filter mapping state (@rps_hash_table and 940 * @rps_next_id). 941 * @rps_hash_table: Mapping between ARFS filters and their various IDs 942 * @rps_next_id: next arfs_id for an ARFS filter 943 * @active_queues: Count of RX and TX queues that haven't been flushed and drained. 944 * @rxq_flush_pending: Count of number of receive queues that need to be flushed. 945 * Decremented when the efx_flush_rx_queue() is called. 946 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet 947 * completed (either success or failure). Not used when MCDI is used to 948 * flush receive queues. 949 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions. 950 * @vf_count: Number of VFs intended to be enabled. 951 * @vf_init_count: Number of VFs that have been fully initialised. 952 * @vi_scale: log2 number of vnics per VF. 953 * @ptp_data: PTP state data 954 * @ptp_warned: has this NIC seen and warned about unexpected PTP events? 955 * @vpd_sn: Serial number read from VPD 956 * @xdp_rxq_info_failed: Have any of the rx queues failed to initialise their 957 * xdp_rxq_info structures? 958 * @monitor_work: Hardware monitor workitem 959 * @biu_lock: BIU (bus interface unit) lock 960 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This 961 * field is used by efx_test_interrupts() to verify that an 962 * interrupt has occurred. 963 * @stats_lock: Statistics update lock. Must be held when calling 964 * efx_nic_type::{update,start,stop}_stats. 965 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb 966 * 967 * This is stored in the private area of the &struct net_device. 968 */ 969 struct efx_nic { 970 /* The following fields should be written very rarely */ 971 972 char name[IFNAMSIZ]; 973 struct list_head node; 974 struct efx_nic *primary; 975 struct list_head secondary_list; 976 struct pci_dev *pci_dev; 977 unsigned int port_num; 978 const struct efx_nic_type *type; 979 int legacy_irq; 980 bool eeh_disabled_legacy_irq; 981 struct workqueue_struct *workqueue; 982 char workqueue_name[16]; 983 struct work_struct reset_work; 984 resource_size_t membase_phys; 985 void __iomem *membase; 986 987 unsigned int vi_stride; 988 989 enum efx_int_mode interrupt_mode; 990 unsigned int timer_quantum_ns; 991 unsigned int timer_max_ns; 992 bool irq_rx_adaptive; 993 unsigned int irq_mod_step_us; 994 unsigned int irq_rx_moderation_us; 995 u32 msg_enable; 996 997 enum nic_state state; 998 unsigned long reset_pending; 999 1000 struct efx_channel *channel[EFX_MAX_CHANNELS]; 1001 struct efx_msi_context msi_context[EFX_MAX_CHANNELS]; 1002 const struct efx_channel_type * 1003 extra_channel_type[EFX_MAX_EXTRA_CHANNELS]; 1004 1005 unsigned int xdp_tx_queue_count; 1006 struct efx_tx_queue **xdp_tx_queues; 1007 1008 unsigned rxq_entries; 1009 unsigned txq_entries; 1010 unsigned int txq_stop_thresh; 1011 unsigned int txq_wake_thresh; 1012 1013 unsigned tx_dc_base; 1014 unsigned rx_dc_base; 1015 unsigned sram_lim_qw; 1016 unsigned next_buffer_table; 1017 1018 unsigned int max_channels; 1019 unsigned int max_tx_channels; 1020 unsigned n_channels; 1021 unsigned n_rx_channels; 1022 unsigned rss_spread; 1023 unsigned tx_channel_offset; 1024 unsigned n_tx_channels; 1025 unsigned n_extra_tx_channels; 1026 unsigned int n_xdp_channels; 1027 unsigned int xdp_channel_offset; 1028 unsigned int xdp_tx_per_channel; 1029 unsigned int rx_ip_align; 1030 unsigned int rx_dma_len; 1031 unsigned int rx_buffer_order; 1032 unsigned int rx_buffer_truesize; 1033 unsigned int rx_page_buf_step; 1034 unsigned int rx_bufs_per_page; 1035 unsigned int rx_pages_per_batch; 1036 unsigned int rx_prefix_size; 1037 int rx_packet_hash_offset; 1038 int rx_packet_len_offset; 1039 int rx_packet_ts_offset; 1040 bool rx_scatter; 1041 struct efx_rss_context rss_context; 1042 struct mutex rss_lock; 1043 1044 unsigned int_error_count; 1045 unsigned long int_error_expire; 1046 1047 bool irq_soft_enabled; 1048 struct efx_buffer irq_status; 1049 unsigned irq_zero_count; 1050 unsigned irq_level; 1051 struct delayed_work selftest_work; 1052 1053 #ifdef CONFIG_SFC_MTD 1054 struct list_head mtd_list; 1055 #endif 1056 1057 void *nic_data; 1058 struct efx_mcdi_data *mcdi; 1059 1060 struct mutex mac_lock; 1061 struct work_struct mac_work; 1062 bool port_enabled; 1063 1064 bool mc_bist_for_other_fn; 1065 bool port_initialized; 1066 struct net_device *net_dev; 1067 1068 netdev_features_t fixed_features; 1069 1070 u16 num_mac_stats; 1071 struct efx_buffer stats_buffer; 1072 u64 rx_nodesc_drops_total; 1073 u64 rx_nodesc_drops_while_down; 1074 bool rx_nodesc_drops_prev_state; 1075 1076 unsigned int phy_type; 1077 const struct efx_phy_operations *phy_op; 1078 void *phy_data; 1079 struct mdio_if_info mdio; 1080 unsigned int mdio_bus; 1081 enum efx_phy_mode phy_mode; 1082 1083 __ETHTOOL_DECLARE_LINK_MODE_MASK(link_advertising); 1084 u32 fec_config; 1085 struct efx_link_state link_state; 1086 unsigned int n_link_state_changes; 1087 1088 bool unicast_filter; 1089 union efx_multicast_hash multicast_hash; 1090 u8 wanted_fc; 1091 unsigned fc_disable; 1092 1093 atomic_t rx_reset; 1094 enum efx_loopback_mode loopback_mode; 1095 u64 loopback_modes; 1096 1097 void *loopback_selftest; 1098 /* We access loopback_selftest immediately before running XDP, 1099 * so we want them next to each other. 1100 */ 1101 struct bpf_prog __rcu *xdp_prog; 1102 1103 struct rw_semaphore filter_sem; 1104 void *filter_state; 1105 #ifdef CONFIG_RFS_ACCEL 1106 struct mutex rps_mutex; 1107 unsigned long rps_slot_map; 1108 struct efx_async_filter_insertion rps_slot[EFX_RPS_MAX_IN_FLIGHT]; 1109 spinlock_t rps_hash_lock; 1110 struct hlist_head *rps_hash_table; 1111 u32 rps_next_id; 1112 #endif 1113 1114 atomic_t active_queues; 1115 atomic_t rxq_flush_pending; 1116 atomic_t rxq_flush_outstanding; 1117 wait_queue_head_t flush_wq; 1118 1119 #ifdef CONFIG_SFC_SRIOV 1120 unsigned vf_count; 1121 unsigned vf_init_count; 1122 unsigned vi_scale; 1123 #endif 1124 1125 struct efx_ptp_data *ptp_data; 1126 bool ptp_warned; 1127 1128 char *vpd_sn; 1129 bool xdp_rxq_info_failed; 1130 1131 /* The following fields may be written more often */ 1132 1133 struct delayed_work monitor_work ____cacheline_aligned_in_smp; 1134 spinlock_t biu_lock; 1135 int last_irq_cpu; 1136 spinlock_t stats_lock; 1137 atomic_t n_rx_noskb_drops; 1138 }; 1139 1140 static inline int efx_dev_registered(struct efx_nic *efx) 1141 { 1142 return efx->net_dev->reg_state == NETREG_REGISTERED; 1143 } 1144 1145 static inline unsigned int efx_port_num(struct efx_nic *efx) 1146 { 1147 return efx->port_num; 1148 } 1149 1150 struct efx_mtd_partition { 1151 struct list_head node; 1152 struct mtd_info mtd; 1153 const char *dev_type_name; 1154 const char *type_name; 1155 char name[IFNAMSIZ + 20]; 1156 }; 1157 1158 struct efx_udp_tunnel { 1159 u16 type; /* TUNNEL_ENCAP_UDP_PORT_ENTRY_foo, see mcdi_pcol.h */ 1160 __be16 port; 1161 /* Count of repeated adds of the same port. Used only inside the list, 1162 * not in request arguments. 1163 */ 1164 u16 count; 1165 }; 1166 1167 /** 1168 * struct efx_nic_type - Efx device type definition 1169 * @mem_bar: Get the memory BAR 1170 * @mem_map_size: Get memory BAR mapped size 1171 * @probe: Probe the controller 1172 * @remove: Free resources allocated by probe() 1173 * @init: Initialise the controller 1174 * @dimension_resources: Dimension controller resources (buffer table, 1175 * and VIs once the available interrupt resources are clear) 1176 * @fini: Shut down the controller 1177 * @monitor: Periodic function for polling link state and hardware monitor 1178 * @map_reset_reason: Map ethtool reset reason to a reset method 1179 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible 1180 * @reset: Reset the controller hardware and possibly the PHY. This will 1181 * be called while the controller is uninitialised. 1182 * @probe_port: Probe the MAC and PHY 1183 * @remove_port: Free resources allocated by probe_port() 1184 * @handle_global_event: Handle a "global" event (may be %NULL) 1185 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues) 1186 * @prepare_flush: Prepare the hardware for flushing the DMA queues 1187 * (for Falcon architecture) 1188 * @finish_flush: Clean up after flushing the DMA queues (for Falcon 1189 * architecture) 1190 * @prepare_flr: Prepare for an FLR 1191 * @finish_flr: Clean up after an FLR 1192 * @describe_stats: Describe statistics for ethtool 1193 * @update_stats: Update statistics not provided by event handling. 1194 * Either argument may be %NULL. 1195 * @start_stats: Start the regular fetching of statistics 1196 * @pull_stats: Pull stats from the NIC and wait until they arrive. 1197 * @stop_stats: Stop the regular fetching of statistics 1198 * @set_id_led: Set state of identifying LED or revert to automatic function 1199 * @push_irq_moderation: Apply interrupt moderation value 1200 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY 1201 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL) 1202 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings 1203 * to the hardware. Serialised by the mac_lock. 1204 * @check_mac_fault: Check MAC fault state. True if fault present. 1205 * @get_wol: Get WoL configuration from driver state 1206 * @set_wol: Push WoL configuration to the NIC 1207 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume) 1208 * @test_chip: Test registers. May use efx_farch_test_registers(), and is 1209 * expected to reset the NIC. 1210 * @test_nvram: Test validity of NVRAM contents 1211 * @mcdi_request: Send an MCDI request with the given header and SDU. 1212 * The SDU length may be any value from 0 up to the protocol- 1213 * defined maximum, but its buffer will be padded to a multiple 1214 * of 4 bytes. 1215 * @mcdi_poll_response: Test whether an MCDI response is available. 1216 * @mcdi_read_response: Read the MCDI response PDU. The offset will 1217 * be a multiple of 4. The length may not be, but the buffer 1218 * will be padded so it is safe to round up. 1219 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so, 1220 * return an appropriate error code for aborting any current 1221 * request; otherwise return 0. 1222 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must 1223 * be separately enabled after this. 1224 * @irq_test_generate: Generate a test IRQ 1225 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event 1226 * queue must be separately disabled before this. 1227 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is 1228 * a pointer to the &struct efx_msi_context for the channel. 1229 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument 1230 * is a pointer to the &struct efx_nic. 1231 * @tx_probe: Allocate resources for TX queue 1232 * @tx_init: Initialise TX queue on the NIC 1233 * @tx_remove: Free resources for TX queue 1234 * @tx_write: Write TX descriptors and doorbell 1235 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC 1236 * @rx_pull_rss_config: Read RSS hash key and indirection table back from the NIC 1237 * @rx_push_rss_context_config: Write RSS hash key and indirection table for 1238 * user RSS context to the NIC 1239 * @rx_pull_rss_context_config: Read RSS hash key and indirection table for user 1240 * RSS context back from the NIC 1241 * @rx_probe: Allocate resources for RX queue 1242 * @rx_init: Initialise RX queue on the NIC 1243 * @rx_remove: Free resources for RX queue 1244 * @rx_write: Write RX descriptors and doorbell 1245 * @rx_defer_refill: Generate a refill reminder event 1246 * @ev_probe: Allocate resources for event queue 1247 * @ev_init: Initialise event queue on the NIC 1248 * @ev_fini: Deinitialise event queue on the NIC 1249 * @ev_remove: Free resources for event queue 1250 * @ev_process: Process events for a queue, up to the given NAPI quota 1251 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ 1252 * @ev_test_generate: Generate a test event 1253 * @filter_table_probe: Probe filter capabilities and set up filter software state 1254 * @filter_table_restore: Restore filters removed from hardware 1255 * @filter_table_remove: Remove filters from hardware and tear down software state 1256 * @filter_update_rx_scatter: Update filters after change to rx scatter setting 1257 * @filter_insert: add or replace a filter 1258 * @filter_remove_safe: remove a filter by ID, carefully 1259 * @filter_get_safe: retrieve a filter by ID, carefully 1260 * @filter_clear_rx: Remove all RX filters whose priority is less than or 1261 * equal to the given priority and is not %EFX_FILTER_PRI_AUTO 1262 * @filter_count_rx_used: Get the number of filters in use at a given priority 1263 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1 1264 * @filter_get_rx_ids: Get list of RX filters at a given priority 1265 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS. 1266 * This must check whether the specified table entry is used by RFS 1267 * and that rps_may_expire_flow() returns true for it. 1268 * @mtd_probe: Probe and add MTD partitions associated with this net device, 1269 * using efx_mtd_add() 1270 * @mtd_rename: Set an MTD partition name using the net device name 1271 * @mtd_read: Read from an MTD partition 1272 * @mtd_erase: Erase part of an MTD partition 1273 * @mtd_write: Write to an MTD partition 1274 * @mtd_sync: Wait for write-back to complete on MTD partition. This 1275 * also notifies the driver that a writer has finished using this 1276 * partition. 1277 * @ptp_write_host_time: Send host time to MC as part of sync protocol 1278 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX 1279 * timestamping, possibly only temporarily for the purposes of a reset. 1280 * @ptp_set_ts_config: Set hardware timestamp configuration. The flags 1281 * and tx_type will already have been validated but this operation 1282 * must validate and update rx_filter. 1283 * @get_phys_port_id: Get the underlying physical port id. 1284 * @set_mac_address: Set the MAC address of the device 1285 * @tso_versions: Returns mask of firmware-assisted TSO versions supported. 1286 * If %NULL, then device does not support any TSO version. 1287 * @udp_tnl_push_ports: Push the list of UDP tunnel ports to the NIC if required. 1288 * @udp_tnl_add_port: Add a UDP tunnel port 1289 * @udp_tnl_has_port: Check if a port has been added as UDP tunnel 1290 * @udp_tnl_del_port: Remove a UDP tunnel port 1291 * @revision: Hardware architecture revision 1292 * @txd_ptr_tbl_base: TX descriptor ring base address 1293 * @rxd_ptr_tbl_base: RX descriptor ring base address 1294 * @buf_tbl_base: Buffer table base address 1295 * @evq_ptr_tbl_base: Event queue pointer table base address 1296 * @evq_rptr_tbl_base: Event queue read-pointer table base address 1297 * @max_dma_mask: Maximum possible DMA mask 1298 * @rx_prefix_size: Size of RX prefix before packet data 1299 * @rx_hash_offset: Offset of RX flow hash within prefix 1300 * @rx_ts_offset: Offset of timestamp within prefix 1301 * @rx_buffer_padding: Size of padding at end of RX packet 1302 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers 1303 * @always_rx_scatter: NIC will always scatter packets to multiple buffers 1304 * @option_descriptors: NIC supports TX option descriptors 1305 * @min_interrupt_mode: Lowest capability interrupt mode supported 1306 * from &enum efx_int_mode. 1307 * @max_interrupt_mode: Highest capability interrupt mode supported 1308 * from &enum efx_int_mode. 1309 * @timer_period_max: Maximum period of interrupt timer (in ticks) 1310 * @offload_features: net_device feature flags for protocol offload 1311 * features implemented in hardware 1312 * @mcdi_max_ver: Maximum MCDI version supported 1313 * @hwtstamp_filters: Mask of hardware timestamp filter types supported 1314 */ 1315 struct efx_nic_type { 1316 bool is_vf; 1317 unsigned int (*mem_bar)(struct efx_nic *efx); 1318 unsigned int (*mem_map_size)(struct efx_nic *efx); 1319 int (*probe)(struct efx_nic *efx); 1320 void (*remove)(struct efx_nic *efx); 1321 int (*init)(struct efx_nic *efx); 1322 int (*dimension_resources)(struct efx_nic *efx); 1323 void (*fini)(struct efx_nic *efx); 1324 void (*monitor)(struct efx_nic *efx); 1325 enum reset_type (*map_reset_reason)(enum reset_type reason); 1326 int (*map_reset_flags)(u32 *flags); 1327 int (*reset)(struct efx_nic *efx, enum reset_type method); 1328 int (*probe_port)(struct efx_nic *efx); 1329 void (*remove_port)(struct efx_nic *efx); 1330 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *); 1331 int (*fini_dmaq)(struct efx_nic *efx); 1332 void (*prepare_flush)(struct efx_nic *efx); 1333 void (*finish_flush)(struct efx_nic *efx); 1334 void (*prepare_flr)(struct efx_nic *efx); 1335 void (*finish_flr)(struct efx_nic *efx); 1336 size_t (*describe_stats)(struct efx_nic *efx, u8 *names); 1337 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats, 1338 struct rtnl_link_stats64 *core_stats); 1339 void (*start_stats)(struct efx_nic *efx); 1340 void (*pull_stats)(struct efx_nic *efx); 1341 void (*stop_stats)(struct efx_nic *efx); 1342 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode); 1343 void (*push_irq_moderation)(struct efx_channel *channel); 1344 int (*reconfigure_port)(struct efx_nic *efx); 1345 void (*prepare_enable_fc_tx)(struct efx_nic *efx); 1346 int (*reconfigure_mac)(struct efx_nic *efx); 1347 bool (*check_mac_fault)(struct efx_nic *efx); 1348 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol); 1349 int (*set_wol)(struct efx_nic *efx, u32 type); 1350 void (*resume_wol)(struct efx_nic *efx); 1351 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests); 1352 int (*test_nvram)(struct efx_nic *efx); 1353 void (*mcdi_request)(struct efx_nic *efx, 1354 const efx_dword_t *hdr, size_t hdr_len, 1355 const efx_dword_t *sdu, size_t sdu_len); 1356 bool (*mcdi_poll_response)(struct efx_nic *efx); 1357 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu, 1358 size_t pdu_offset, size_t pdu_len); 1359 int (*mcdi_poll_reboot)(struct efx_nic *efx); 1360 void (*mcdi_reboot_detected)(struct efx_nic *efx); 1361 void (*irq_enable_master)(struct efx_nic *efx); 1362 int (*irq_test_generate)(struct efx_nic *efx); 1363 void (*irq_disable_non_ev)(struct efx_nic *efx); 1364 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id); 1365 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id); 1366 int (*tx_probe)(struct efx_tx_queue *tx_queue); 1367 void (*tx_init)(struct efx_tx_queue *tx_queue); 1368 void (*tx_remove)(struct efx_tx_queue *tx_queue); 1369 void (*tx_write)(struct efx_tx_queue *tx_queue); 1370 unsigned int (*tx_limit_len)(struct efx_tx_queue *tx_queue, 1371 dma_addr_t dma_addr, unsigned int len); 1372 int (*rx_push_rss_config)(struct efx_nic *efx, bool user, 1373 const u32 *rx_indir_table, const u8 *key); 1374 int (*rx_pull_rss_config)(struct efx_nic *efx); 1375 int (*rx_push_rss_context_config)(struct efx_nic *efx, 1376 struct efx_rss_context *ctx, 1377 const u32 *rx_indir_table, 1378 const u8 *key); 1379 int (*rx_pull_rss_context_config)(struct efx_nic *efx, 1380 struct efx_rss_context *ctx); 1381 void (*rx_restore_rss_contexts)(struct efx_nic *efx); 1382 int (*rx_probe)(struct efx_rx_queue *rx_queue); 1383 void (*rx_init)(struct efx_rx_queue *rx_queue); 1384 void (*rx_remove)(struct efx_rx_queue *rx_queue); 1385 void (*rx_write)(struct efx_rx_queue *rx_queue); 1386 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue); 1387 int (*ev_probe)(struct efx_channel *channel); 1388 int (*ev_init)(struct efx_channel *channel); 1389 void (*ev_fini)(struct efx_channel *channel); 1390 void (*ev_remove)(struct efx_channel *channel); 1391 int (*ev_process)(struct efx_channel *channel, int quota); 1392 void (*ev_read_ack)(struct efx_channel *channel); 1393 void (*ev_test_generate)(struct efx_channel *channel); 1394 int (*filter_table_probe)(struct efx_nic *efx); 1395 void (*filter_table_restore)(struct efx_nic *efx); 1396 void (*filter_table_remove)(struct efx_nic *efx); 1397 void (*filter_update_rx_scatter)(struct efx_nic *efx); 1398 s32 (*filter_insert)(struct efx_nic *efx, 1399 struct efx_filter_spec *spec, bool replace); 1400 int (*filter_remove_safe)(struct efx_nic *efx, 1401 enum efx_filter_priority priority, 1402 u32 filter_id); 1403 int (*filter_get_safe)(struct efx_nic *efx, 1404 enum efx_filter_priority priority, 1405 u32 filter_id, struct efx_filter_spec *); 1406 int (*filter_clear_rx)(struct efx_nic *efx, 1407 enum efx_filter_priority priority); 1408 u32 (*filter_count_rx_used)(struct efx_nic *efx, 1409 enum efx_filter_priority priority); 1410 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx); 1411 s32 (*filter_get_rx_ids)(struct efx_nic *efx, 1412 enum efx_filter_priority priority, 1413 u32 *buf, u32 size); 1414 #ifdef CONFIG_RFS_ACCEL 1415 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id, 1416 unsigned int index); 1417 #endif 1418 #ifdef CONFIG_SFC_MTD 1419 int (*mtd_probe)(struct efx_nic *efx); 1420 void (*mtd_rename)(struct efx_mtd_partition *part); 1421 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len, 1422 size_t *retlen, u8 *buffer); 1423 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len); 1424 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len, 1425 size_t *retlen, const u8 *buffer); 1426 int (*mtd_sync)(struct mtd_info *mtd); 1427 #endif 1428 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time); 1429 int (*ptp_set_ts_sync_events)(struct efx_nic *efx, bool en, bool temp); 1430 int (*ptp_set_ts_config)(struct efx_nic *efx, 1431 struct hwtstamp_config *init); 1432 int (*sriov_configure)(struct efx_nic *efx, int num_vfs); 1433 int (*vlan_rx_add_vid)(struct efx_nic *efx, __be16 proto, u16 vid); 1434 int (*vlan_rx_kill_vid)(struct efx_nic *efx, __be16 proto, u16 vid); 1435 int (*get_phys_port_id)(struct efx_nic *efx, 1436 struct netdev_phys_item_id *ppid); 1437 int (*sriov_init)(struct efx_nic *efx); 1438 void (*sriov_fini)(struct efx_nic *efx); 1439 bool (*sriov_wanted)(struct efx_nic *efx); 1440 void (*sriov_reset)(struct efx_nic *efx); 1441 void (*sriov_flr)(struct efx_nic *efx, unsigned vf_i); 1442 int (*sriov_set_vf_mac)(struct efx_nic *efx, int vf_i, u8 *mac); 1443 int (*sriov_set_vf_vlan)(struct efx_nic *efx, int vf_i, u16 vlan, 1444 u8 qos); 1445 int (*sriov_set_vf_spoofchk)(struct efx_nic *efx, int vf_i, 1446 bool spoofchk); 1447 int (*sriov_get_vf_config)(struct efx_nic *efx, int vf_i, 1448 struct ifla_vf_info *ivi); 1449 int (*sriov_set_vf_link_state)(struct efx_nic *efx, int vf_i, 1450 int link_state); 1451 int (*vswitching_probe)(struct efx_nic *efx); 1452 int (*vswitching_restore)(struct efx_nic *efx); 1453 void (*vswitching_remove)(struct efx_nic *efx); 1454 int (*get_mac_address)(struct efx_nic *efx, unsigned char *perm_addr); 1455 int (*set_mac_address)(struct efx_nic *efx); 1456 u32 (*tso_versions)(struct efx_nic *efx); 1457 int (*udp_tnl_push_ports)(struct efx_nic *efx); 1458 int (*udp_tnl_add_port)(struct efx_nic *efx, struct efx_udp_tunnel tnl); 1459 bool (*udp_tnl_has_port)(struct efx_nic *efx, __be16 port); 1460 int (*udp_tnl_del_port)(struct efx_nic *efx, struct efx_udp_tunnel tnl); 1461 1462 int revision; 1463 unsigned int txd_ptr_tbl_base; 1464 unsigned int rxd_ptr_tbl_base; 1465 unsigned int buf_tbl_base; 1466 unsigned int evq_ptr_tbl_base; 1467 unsigned int evq_rptr_tbl_base; 1468 u64 max_dma_mask; 1469 unsigned int rx_prefix_size; 1470 unsigned int rx_hash_offset; 1471 unsigned int rx_ts_offset; 1472 unsigned int rx_buffer_padding; 1473 bool can_rx_scatter; 1474 bool always_rx_scatter; 1475 bool option_descriptors; 1476 unsigned int min_interrupt_mode; 1477 unsigned int max_interrupt_mode; 1478 unsigned int timer_period_max; 1479 netdev_features_t offload_features; 1480 int mcdi_max_ver; 1481 unsigned int max_rx_ip_filters; 1482 u32 hwtstamp_filters; 1483 unsigned int rx_hash_key_size; 1484 }; 1485 1486 /************************************************************************** 1487 * 1488 * Prototypes and inline functions 1489 * 1490 *************************************************************************/ 1491 1492 static inline struct efx_channel * 1493 efx_get_channel(struct efx_nic *efx, unsigned index) 1494 { 1495 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_channels); 1496 return efx->channel[index]; 1497 } 1498 1499 /* Iterate over all used channels */ 1500 #define efx_for_each_channel(_channel, _efx) \ 1501 for (_channel = (_efx)->channel[0]; \ 1502 _channel; \ 1503 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \ 1504 (_efx)->channel[_channel->channel + 1] : NULL) 1505 1506 /* Iterate over all used channels in reverse */ 1507 #define efx_for_each_channel_rev(_channel, _efx) \ 1508 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \ 1509 _channel; \ 1510 _channel = _channel->channel ? \ 1511 (_efx)->channel[_channel->channel - 1] : NULL) 1512 1513 static inline struct efx_tx_queue * 1514 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type) 1515 { 1516 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels || 1517 type >= EFX_TXQ_TYPES); 1518 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type]; 1519 } 1520 1521 static inline struct efx_channel * 1522 efx_get_xdp_channel(struct efx_nic *efx, unsigned int index) 1523 { 1524 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_xdp_channels); 1525 return efx->channel[efx->xdp_channel_offset + index]; 1526 } 1527 1528 static inline bool efx_channel_is_xdp_tx(struct efx_channel *channel) 1529 { 1530 return channel->channel - channel->efx->xdp_channel_offset < 1531 channel->efx->n_xdp_channels; 1532 } 1533 1534 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel) 1535 { 1536 return efx_channel_is_xdp_tx(channel) || 1537 (channel->type && channel->type->want_txqs && 1538 channel->type->want_txqs(channel)); 1539 } 1540 1541 static inline struct efx_tx_queue * 1542 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type) 1543 { 1544 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_tx_queues(channel) || 1545 type >= EFX_TXQ_TYPES); 1546 return &channel->tx_queue[type]; 1547 } 1548 1549 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue) 1550 { 1551 return !(tx_queue->efx->net_dev->num_tc < 2 && 1552 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI); 1553 } 1554 1555 /* Iterate over all TX queues belonging to a channel */ 1556 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \ 1557 if (!efx_channel_has_tx_queues(_channel)) \ 1558 ; \ 1559 else \ 1560 for (_tx_queue = (_channel)->tx_queue; \ 1561 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \ 1562 (efx_tx_queue_used(_tx_queue) || \ 1563 efx_channel_is_xdp_tx(_channel)); \ 1564 _tx_queue++) 1565 1566 /* Iterate over all possible TX queues belonging to a channel */ 1567 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \ 1568 if (!efx_channel_has_tx_queues(_channel)) \ 1569 ; \ 1570 else \ 1571 for (_tx_queue = (_channel)->tx_queue; \ 1572 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \ 1573 _tx_queue++) 1574 1575 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel) 1576 { 1577 return channel->rx_queue.core_index >= 0; 1578 } 1579 1580 static inline struct efx_rx_queue * 1581 efx_channel_get_rx_queue(struct efx_channel *channel) 1582 { 1583 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_rx_queue(channel)); 1584 return &channel->rx_queue; 1585 } 1586 1587 /* Iterate over all RX queues belonging to a channel */ 1588 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \ 1589 if (!efx_channel_has_rx_queue(_channel)) \ 1590 ; \ 1591 else \ 1592 for (_rx_queue = &(_channel)->rx_queue; \ 1593 _rx_queue; \ 1594 _rx_queue = NULL) 1595 1596 static inline struct efx_channel * 1597 efx_rx_queue_channel(struct efx_rx_queue *rx_queue) 1598 { 1599 return container_of(rx_queue, struct efx_channel, rx_queue); 1600 } 1601 1602 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue) 1603 { 1604 return efx_rx_queue_channel(rx_queue)->channel; 1605 } 1606 1607 /* Returns a pointer to the specified receive buffer in the RX 1608 * descriptor queue. 1609 */ 1610 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue, 1611 unsigned int index) 1612 { 1613 return &rx_queue->buffer[index]; 1614 } 1615 1616 /** 1617 * EFX_MAX_FRAME_LEN - calculate maximum frame length 1618 * 1619 * This calculates the maximum frame length that will be used for a 1620 * given MTU. The frame length will be equal to the MTU plus a 1621 * constant amount of header space and padding. This is the quantity 1622 * that the net driver will program into the MAC as the maximum frame 1623 * length. 1624 * 1625 * The 10G MAC requires 8-byte alignment on the frame 1626 * length, so we round up to the nearest 8. 1627 * 1628 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an 1629 * XGMII cycle). If the frame length reaches the maximum value in the 1630 * same cycle, the XMAC can miss the IPG altogether. We work around 1631 * this by adding a further 16 bytes. 1632 */ 1633 #define EFX_FRAME_PAD 16 1634 #define EFX_MAX_FRAME_LEN(mtu) \ 1635 (ALIGN(((mtu) + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN + EFX_FRAME_PAD), 8)) 1636 1637 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb) 1638 { 1639 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP; 1640 } 1641 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb) 1642 { 1643 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1644 } 1645 1646 /* Get all supported features. 1647 * If a feature is not fixed, it is present in hw_features. 1648 * If a feature is fixed, it does not present in hw_features, but 1649 * always in features. 1650 */ 1651 static inline netdev_features_t efx_supported_features(const struct efx_nic *efx) 1652 { 1653 const struct net_device *net_dev = efx->net_dev; 1654 1655 return net_dev->features | net_dev->hw_features; 1656 } 1657 1658 /* Get the current TX queue insert index. */ 1659 static inline unsigned int 1660 efx_tx_queue_get_insert_index(const struct efx_tx_queue *tx_queue) 1661 { 1662 return tx_queue->insert_count & tx_queue->ptr_mask; 1663 } 1664 1665 /* Get a TX buffer. */ 1666 static inline struct efx_tx_buffer * 1667 __efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 1668 { 1669 return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)]; 1670 } 1671 1672 /* Get a TX buffer, checking it's not currently in use. */ 1673 static inline struct efx_tx_buffer * 1674 efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 1675 { 1676 struct efx_tx_buffer *buffer = 1677 __efx_tx_queue_get_insert_buffer(tx_queue); 1678 1679 EFX_WARN_ON_ONCE_PARANOID(buffer->len); 1680 EFX_WARN_ON_ONCE_PARANOID(buffer->flags); 1681 EFX_WARN_ON_ONCE_PARANOID(buffer->unmap_len); 1682 1683 return buffer; 1684 } 1685 1686 #endif /* EFX_NET_DRIVER_H */ 1687