1 // SPDX-License-Identifier: GPL-2.0-only 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2008-2013 Solarflare Communications Inc. 5 */ 6 7 #include <linux/delay.h> 8 #include <linux/moduleparam.h> 9 #include <linux/atomic.h> 10 #include "net_driver.h" 11 #include "nic.h" 12 #include "io.h" 13 #include "farch_regs.h" 14 #include "mcdi_pcol.h" 15 16 /************************************************************************** 17 * 18 * Management-Controller-to-Driver Interface 19 * 20 ************************************************************************** 21 */ 22 23 #define MCDI_RPC_TIMEOUT (10 * HZ) 24 25 /* A reboot/assertion causes the MCDI status word to be set after the 26 * command word is set or a REBOOT event is sent. If we notice a reboot 27 * via these mechanisms then wait 250ms for the status word to be set. 28 */ 29 #define MCDI_STATUS_DELAY_US 100 30 #define MCDI_STATUS_DELAY_COUNT 2500 31 #define MCDI_STATUS_SLEEP_MS \ 32 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) 33 34 #define SEQ_MASK \ 35 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) 36 37 struct efx_mcdi_async_param { 38 struct list_head list; 39 unsigned int cmd; 40 size_t inlen; 41 size_t outlen; 42 bool quiet; 43 efx_mcdi_async_completer *complete; 44 unsigned long cookie; 45 /* followed by request/response buffer */ 46 }; 47 48 static void efx_mcdi_timeout_async(struct timer_list *t); 49 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, 50 bool *was_attached_out); 51 static bool efx_mcdi_poll_once(struct efx_nic *efx); 52 static void efx_mcdi_abandon(struct efx_nic *efx); 53 54 #ifdef CONFIG_SFC_MCDI_LOGGING 55 static bool mcdi_logging_default; 56 module_param(mcdi_logging_default, bool, 0644); 57 MODULE_PARM_DESC(mcdi_logging_default, 58 "Enable MCDI logging on newly-probed functions"); 59 #endif 60 61 int efx_mcdi_init(struct efx_nic *efx) 62 { 63 struct efx_mcdi_iface *mcdi; 64 bool already_attached; 65 int rc = -ENOMEM; 66 67 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); 68 if (!efx->mcdi) 69 goto fail; 70 71 mcdi = efx_mcdi(efx); 72 mcdi->efx = efx; 73 #ifdef CONFIG_SFC_MCDI_LOGGING 74 /* consuming code assumes buffer is page-sized */ 75 mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL); 76 if (!mcdi->logging_buffer) 77 goto fail1; 78 mcdi->logging_enabled = mcdi_logging_default; 79 #endif 80 init_waitqueue_head(&mcdi->wq); 81 init_waitqueue_head(&mcdi->proxy_rx_wq); 82 spin_lock_init(&mcdi->iface_lock); 83 mcdi->state = MCDI_STATE_QUIESCENT; 84 mcdi->mode = MCDI_MODE_POLL; 85 spin_lock_init(&mcdi->async_lock); 86 INIT_LIST_HEAD(&mcdi->async_list); 87 timer_setup(&mcdi->async_timer, efx_mcdi_timeout_async, 0); 88 89 (void) efx_mcdi_poll_reboot(efx); 90 mcdi->new_epoch = true; 91 92 /* Recover from a failed assertion before probing */ 93 rc = efx_mcdi_handle_assertion(efx); 94 if (rc) 95 goto fail2; 96 97 /* Let the MC (and BMC, if this is a LOM) know that the driver 98 * is loaded. We should do this before we reset the NIC. 99 */ 100 rc = efx_mcdi_drv_attach(efx, true, &already_attached); 101 if (rc) { 102 pci_err(efx->pci_dev, "Unable to register driver with MCPU\n"); 103 goto fail2; 104 } 105 if (already_attached) 106 /* Not a fatal error */ 107 pci_err(efx->pci_dev, "Host already registered with MCPU\n"); 108 109 if (efx->mcdi->fn_flags & 110 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY)) 111 efx->primary = efx; 112 113 return 0; 114 fail2: 115 #ifdef CONFIG_SFC_MCDI_LOGGING 116 free_page((unsigned long)mcdi->logging_buffer); 117 fail1: 118 #endif 119 kfree(efx->mcdi); 120 efx->mcdi = NULL; 121 fail: 122 return rc; 123 } 124 125 void efx_mcdi_detach(struct efx_nic *efx) 126 { 127 if (!efx->mcdi) 128 return; 129 130 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT); 131 132 /* Relinquish the device (back to the BMC, if this is a LOM) */ 133 efx_mcdi_drv_attach(efx, false, NULL); 134 } 135 136 void efx_mcdi_fini(struct efx_nic *efx) 137 { 138 if (!efx->mcdi) 139 return; 140 141 #ifdef CONFIG_SFC_MCDI_LOGGING 142 free_page((unsigned long)efx->mcdi->iface.logging_buffer); 143 #endif 144 145 kfree(efx->mcdi); 146 } 147 148 static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd, 149 const efx_dword_t *inbuf, size_t inlen) 150 { 151 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 152 #ifdef CONFIG_SFC_MCDI_LOGGING 153 char *buf = mcdi->logging_buffer; /* page-sized */ 154 #endif 155 efx_dword_t hdr[2]; 156 size_t hdr_len; 157 u32 xflags, seqno; 158 159 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT); 160 161 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ 162 spin_lock_bh(&mcdi->iface_lock); 163 ++mcdi->seqno; 164 seqno = mcdi->seqno & SEQ_MASK; 165 spin_unlock_bh(&mcdi->iface_lock); 166 167 xflags = 0; 168 if (mcdi->mode == MCDI_MODE_EVENTS) 169 xflags |= MCDI_HEADER_XFLAGS_EVREQ; 170 171 if (efx->type->mcdi_max_ver == 1) { 172 /* MCDI v1 */ 173 EFX_POPULATE_DWORD_7(hdr[0], 174 MCDI_HEADER_RESPONSE, 0, 175 MCDI_HEADER_RESYNC, 1, 176 MCDI_HEADER_CODE, cmd, 177 MCDI_HEADER_DATALEN, inlen, 178 MCDI_HEADER_SEQ, seqno, 179 MCDI_HEADER_XFLAGS, xflags, 180 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); 181 hdr_len = 4; 182 } else { 183 /* MCDI v2 */ 184 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2); 185 EFX_POPULATE_DWORD_7(hdr[0], 186 MCDI_HEADER_RESPONSE, 0, 187 MCDI_HEADER_RESYNC, 1, 188 MCDI_HEADER_CODE, MC_CMD_V2_EXTN, 189 MCDI_HEADER_DATALEN, 0, 190 MCDI_HEADER_SEQ, seqno, 191 MCDI_HEADER_XFLAGS, xflags, 192 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); 193 EFX_POPULATE_DWORD_2(hdr[1], 194 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd, 195 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen); 196 hdr_len = 8; 197 } 198 199 #ifdef CONFIG_SFC_MCDI_LOGGING 200 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { 201 int bytes = 0; 202 int i; 203 /* Lengths should always be a whole number of dwords, so scream 204 * if they're not. 205 */ 206 WARN_ON_ONCE(hdr_len % 4); 207 WARN_ON_ONCE(inlen % 4); 208 209 /* We own the logging buffer, as only one MCDI can be in 210 * progress on a NIC at any one time. So no need for locking. 211 */ 212 for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++) 213 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, 214 " %08x", 215 le32_to_cpu(hdr[i].u32[0])); 216 217 for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++) 218 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, 219 " %08x", 220 le32_to_cpu(inbuf[i].u32[0])); 221 222 netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf); 223 } 224 #endif 225 226 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen); 227 228 mcdi->new_epoch = false; 229 } 230 231 static int efx_mcdi_errno(unsigned int mcdi_err) 232 { 233 switch (mcdi_err) { 234 case 0: 235 return 0; 236 #define TRANSLATE_ERROR(name) \ 237 case MC_CMD_ERR_ ## name: \ 238 return -name; 239 TRANSLATE_ERROR(EPERM); 240 TRANSLATE_ERROR(ENOENT); 241 TRANSLATE_ERROR(EINTR); 242 TRANSLATE_ERROR(EAGAIN); 243 TRANSLATE_ERROR(EACCES); 244 TRANSLATE_ERROR(EBUSY); 245 TRANSLATE_ERROR(EINVAL); 246 TRANSLATE_ERROR(EDEADLK); 247 TRANSLATE_ERROR(ENOSYS); 248 TRANSLATE_ERROR(ETIME); 249 TRANSLATE_ERROR(EALREADY); 250 TRANSLATE_ERROR(ENOSPC); 251 #undef TRANSLATE_ERROR 252 case MC_CMD_ERR_ENOTSUP: 253 return -EOPNOTSUPP; 254 case MC_CMD_ERR_ALLOC_FAIL: 255 return -ENOBUFS; 256 case MC_CMD_ERR_MAC_EXIST: 257 return -EADDRINUSE; 258 default: 259 return -EPROTO; 260 } 261 } 262 263 static void efx_mcdi_read_response_header(struct efx_nic *efx) 264 { 265 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 266 unsigned int respseq, respcmd, error; 267 #ifdef CONFIG_SFC_MCDI_LOGGING 268 char *buf = mcdi->logging_buffer; /* page-sized */ 269 #endif 270 efx_dword_t hdr; 271 272 efx->type->mcdi_read_response(efx, &hdr, 0, 4); 273 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ); 274 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE); 275 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR); 276 277 if (respcmd != MC_CMD_V2_EXTN) { 278 mcdi->resp_hdr_len = 4; 279 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN); 280 } else { 281 efx->type->mcdi_read_response(efx, &hdr, 4, 4); 282 mcdi->resp_hdr_len = 8; 283 mcdi->resp_data_len = 284 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); 285 } 286 287 #ifdef CONFIG_SFC_MCDI_LOGGING 288 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { 289 size_t hdr_len, data_len; 290 int bytes = 0; 291 int i; 292 293 WARN_ON_ONCE(mcdi->resp_hdr_len % 4); 294 hdr_len = mcdi->resp_hdr_len / 4; 295 /* MCDI_DECLARE_BUF ensures that underlying buffer is padded 296 * to dword size, and the MCDI buffer is always dword size 297 */ 298 data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4); 299 300 /* We own the logging buffer, as only one MCDI can be in 301 * progress on a NIC at any one time. So no need for locking. 302 */ 303 for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) { 304 efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4); 305 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, 306 " %08x", le32_to_cpu(hdr.u32[0])); 307 } 308 309 for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) { 310 efx->type->mcdi_read_response(efx, &hdr, 311 mcdi->resp_hdr_len + (i * 4), 4); 312 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, 313 " %08x", le32_to_cpu(hdr.u32[0])); 314 } 315 316 netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf); 317 } 318 #endif 319 320 mcdi->resprc_raw = 0; 321 if (error && mcdi->resp_data_len == 0) { 322 netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); 323 mcdi->resprc = -EIO; 324 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { 325 netif_err(efx, hw, efx->net_dev, 326 "MC response mismatch tx seq 0x%x rx seq 0x%x\n", 327 respseq, mcdi->seqno); 328 mcdi->resprc = -EIO; 329 } else if (error) { 330 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4); 331 mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0); 332 mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw); 333 } else { 334 mcdi->resprc = 0; 335 } 336 } 337 338 static bool efx_mcdi_poll_once(struct efx_nic *efx) 339 { 340 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 341 342 rmb(); 343 if (!efx->type->mcdi_poll_response(efx)) 344 return false; 345 346 spin_lock_bh(&mcdi->iface_lock); 347 efx_mcdi_read_response_header(efx); 348 spin_unlock_bh(&mcdi->iface_lock); 349 350 return true; 351 } 352 353 static int efx_mcdi_poll(struct efx_nic *efx) 354 { 355 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 356 unsigned long time, finish; 357 unsigned int spins; 358 int rc; 359 360 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ 361 rc = efx_mcdi_poll_reboot(efx); 362 if (rc) { 363 spin_lock_bh(&mcdi->iface_lock); 364 mcdi->resprc = rc; 365 mcdi->resp_hdr_len = 0; 366 mcdi->resp_data_len = 0; 367 spin_unlock_bh(&mcdi->iface_lock); 368 return 0; 369 } 370 371 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, 372 * because generally mcdi responses are fast. After that, back off 373 * and poll once a jiffy (approximately) 374 */ 375 spins = USER_TICK_USEC; 376 finish = jiffies + MCDI_RPC_TIMEOUT; 377 378 while (1) { 379 if (spins != 0) { 380 --spins; 381 udelay(1); 382 } else { 383 schedule_timeout_uninterruptible(1); 384 } 385 386 time = jiffies; 387 388 if (efx_mcdi_poll_once(efx)) 389 break; 390 391 if (time_after(time, finish)) 392 return -ETIMEDOUT; 393 } 394 395 /* Return rc=0 like wait_event_timeout() */ 396 return 0; 397 } 398 399 /* Test and clear MC-rebooted flag for this port/function; reset 400 * software state as necessary. 401 */ 402 int efx_mcdi_poll_reboot(struct efx_nic *efx) 403 { 404 if (!efx->mcdi) 405 return 0; 406 407 return efx->type->mcdi_poll_reboot(efx); 408 } 409 410 static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi) 411 { 412 return cmpxchg(&mcdi->state, 413 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) == 414 MCDI_STATE_QUIESCENT; 415 } 416 417 static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi) 418 { 419 /* Wait until the interface becomes QUIESCENT and we win the race 420 * to mark it RUNNING_SYNC. 421 */ 422 wait_event(mcdi->wq, 423 cmpxchg(&mcdi->state, 424 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) == 425 MCDI_STATE_QUIESCENT); 426 } 427 428 static int efx_mcdi_await_completion(struct efx_nic *efx) 429 { 430 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 431 432 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED, 433 MCDI_RPC_TIMEOUT) == 0) 434 return -ETIMEDOUT; 435 436 /* Check if efx_mcdi_set_mode() switched us back to polled completions. 437 * In which case, poll for completions directly. If efx_mcdi_ev_cpl() 438 * completed the request first, then we'll just end up completing the 439 * request again, which is safe. 440 * 441 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which 442 * wait_event_timeout() implicitly provides. 443 */ 444 if (mcdi->mode == MCDI_MODE_POLL) 445 return efx_mcdi_poll(efx); 446 447 return 0; 448 } 449 450 /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the 451 * requester. Return whether this was done. Does not take any locks. 452 */ 453 static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi) 454 { 455 if (cmpxchg(&mcdi->state, 456 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) == 457 MCDI_STATE_RUNNING_SYNC) { 458 wake_up(&mcdi->wq); 459 return true; 460 } 461 462 return false; 463 } 464 465 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) 466 { 467 if (mcdi->mode == MCDI_MODE_EVENTS) { 468 struct efx_mcdi_async_param *async; 469 struct efx_nic *efx = mcdi->efx; 470 471 /* Process the asynchronous request queue */ 472 spin_lock_bh(&mcdi->async_lock); 473 async = list_first_entry_or_null( 474 &mcdi->async_list, struct efx_mcdi_async_param, list); 475 if (async) { 476 mcdi->state = MCDI_STATE_RUNNING_ASYNC; 477 efx_mcdi_send_request(efx, async->cmd, 478 (const efx_dword_t *)(async + 1), 479 async->inlen); 480 mod_timer(&mcdi->async_timer, 481 jiffies + MCDI_RPC_TIMEOUT); 482 } 483 spin_unlock_bh(&mcdi->async_lock); 484 485 if (async) 486 return; 487 } 488 489 mcdi->state = MCDI_STATE_QUIESCENT; 490 wake_up(&mcdi->wq); 491 } 492 493 /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the 494 * asynchronous completion function, and release the interface. 495 * Return whether this was done. Must be called in bh-disabled 496 * context. Will take iface_lock and async_lock. 497 */ 498 static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout) 499 { 500 struct efx_nic *efx = mcdi->efx; 501 struct efx_mcdi_async_param *async; 502 size_t hdr_len, data_len, err_len; 503 efx_dword_t *outbuf; 504 MCDI_DECLARE_BUF_ERR(errbuf); 505 int rc; 506 507 if (cmpxchg(&mcdi->state, 508 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) != 509 MCDI_STATE_RUNNING_ASYNC) 510 return false; 511 512 spin_lock(&mcdi->iface_lock); 513 if (timeout) { 514 /* Ensure that if the completion event arrives later, 515 * the seqno check in efx_mcdi_ev_cpl() will fail 516 */ 517 ++mcdi->seqno; 518 ++mcdi->credits; 519 rc = -ETIMEDOUT; 520 hdr_len = 0; 521 data_len = 0; 522 } else { 523 rc = mcdi->resprc; 524 hdr_len = mcdi->resp_hdr_len; 525 data_len = mcdi->resp_data_len; 526 } 527 spin_unlock(&mcdi->iface_lock); 528 529 /* Stop the timer. In case the timer function is running, we 530 * must wait for it to return so that there is no possibility 531 * of it aborting the next request. 532 */ 533 if (!timeout) 534 del_timer_sync(&mcdi->async_timer); 535 536 spin_lock(&mcdi->async_lock); 537 async = list_first_entry(&mcdi->async_list, 538 struct efx_mcdi_async_param, list); 539 list_del(&async->list); 540 spin_unlock(&mcdi->async_lock); 541 542 outbuf = (efx_dword_t *)(async + 1); 543 efx->type->mcdi_read_response(efx, outbuf, hdr_len, 544 min(async->outlen, data_len)); 545 if (!timeout && rc && !async->quiet) { 546 err_len = min(sizeof(errbuf), data_len); 547 efx->type->mcdi_read_response(efx, errbuf, hdr_len, 548 sizeof(errbuf)); 549 efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf, 550 err_len, rc); 551 } 552 553 if (async->complete) 554 async->complete(efx, async->cookie, rc, outbuf, 555 min(async->outlen, data_len)); 556 kfree(async); 557 558 efx_mcdi_release(mcdi); 559 560 return true; 561 } 562 563 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, 564 unsigned int datalen, unsigned int mcdi_err) 565 { 566 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 567 bool wake = false; 568 569 spin_lock(&mcdi->iface_lock); 570 571 if ((seqno ^ mcdi->seqno) & SEQ_MASK) { 572 if (mcdi->credits) 573 /* The request has been cancelled */ 574 --mcdi->credits; 575 else 576 netif_err(efx, hw, efx->net_dev, 577 "MC response mismatch tx seq 0x%x rx " 578 "seq 0x%x\n", seqno, mcdi->seqno); 579 } else { 580 if (efx->type->mcdi_max_ver >= 2) { 581 /* MCDI v2 responses don't fit in an event */ 582 efx_mcdi_read_response_header(efx); 583 } else { 584 mcdi->resprc = efx_mcdi_errno(mcdi_err); 585 mcdi->resp_hdr_len = 4; 586 mcdi->resp_data_len = datalen; 587 } 588 589 wake = true; 590 } 591 592 spin_unlock(&mcdi->iface_lock); 593 594 if (wake) { 595 if (!efx_mcdi_complete_async(mcdi, false)) 596 (void) efx_mcdi_complete_sync(mcdi); 597 598 /* If the interface isn't RUNNING_ASYNC or 599 * RUNNING_SYNC then we've received a duplicate 600 * completion after we've already transitioned back to 601 * QUIESCENT. [A subsequent invocation would increment 602 * seqno, so would have failed the seqno check]. 603 */ 604 } 605 } 606 607 static void efx_mcdi_timeout_async(struct timer_list *t) 608 { 609 struct efx_mcdi_iface *mcdi = from_timer(mcdi, t, async_timer); 610 611 efx_mcdi_complete_async(mcdi, true); 612 } 613 614 static int 615 efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen) 616 { 617 if (efx->type->mcdi_max_ver < 0 || 618 (efx->type->mcdi_max_ver < 2 && 619 cmd > MC_CMD_CMD_SPACE_ESCAPE_7)) 620 return -EINVAL; 621 622 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 || 623 (efx->type->mcdi_max_ver < 2 && 624 inlen > MCDI_CTL_SDU_LEN_MAX_V1)) 625 return -EMSGSIZE; 626 627 return 0; 628 } 629 630 static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx, 631 size_t hdr_len, size_t data_len, 632 u32 *proxy_handle) 633 { 634 MCDI_DECLARE_BUF_ERR(testbuf); 635 const size_t buflen = sizeof(testbuf); 636 637 if (!proxy_handle || data_len < buflen) 638 return false; 639 640 efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen); 641 if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) { 642 *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE); 643 return true; 644 } 645 646 return false; 647 } 648 649 static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd, 650 size_t inlen, 651 efx_dword_t *outbuf, size_t outlen, 652 size_t *outlen_actual, bool quiet, 653 u32 *proxy_handle, int *raw_rc) 654 { 655 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 656 MCDI_DECLARE_BUF_ERR(errbuf); 657 int rc; 658 659 if (mcdi->mode == MCDI_MODE_POLL) 660 rc = efx_mcdi_poll(efx); 661 else 662 rc = efx_mcdi_await_completion(efx); 663 664 if (rc != 0) { 665 netif_err(efx, hw, efx->net_dev, 666 "MC command 0x%x inlen %d mode %d timed out\n", 667 cmd, (int)inlen, mcdi->mode); 668 669 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) { 670 netif_err(efx, hw, efx->net_dev, 671 "MCDI request was completed without an event\n"); 672 rc = 0; 673 } 674 675 efx_mcdi_abandon(efx); 676 677 /* Close the race with efx_mcdi_ev_cpl() executing just too late 678 * and completing a request we've just cancelled, by ensuring 679 * that the seqno check therein fails. 680 */ 681 spin_lock_bh(&mcdi->iface_lock); 682 ++mcdi->seqno; 683 ++mcdi->credits; 684 spin_unlock_bh(&mcdi->iface_lock); 685 } 686 687 if (proxy_handle) 688 *proxy_handle = 0; 689 690 if (rc != 0) { 691 if (outlen_actual) 692 *outlen_actual = 0; 693 } else { 694 size_t hdr_len, data_len, err_len; 695 696 /* At the very least we need a memory barrier here to ensure 697 * we pick up changes from efx_mcdi_ev_cpl(). Protect against 698 * a spurious efx_mcdi_ev_cpl() running concurrently by 699 * acquiring the iface_lock. */ 700 spin_lock_bh(&mcdi->iface_lock); 701 rc = mcdi->resprc; 702 if (raw_rc) 703 *raw_rc = mcdi->resprc_raw; 704 hdr_len = mcdi->resp_hdr_len; 705 data_len = mcdi->resp_data_len; 706 err_len = min(sizeof(errbuf), data_len); 707 spin_unlock_bh(&mcdi->iface_lock); 708 709 BUG_ON(rc > 0); 710 711 efx->type->mcdi_read_response(efx, outbuf, hdr_len, 712 min(outlen, data_len)); 713 if (outlen_actual) 714 *outlen_actual = data_len; 715 716 efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len); 717 718 if (cmd == MC_CMD_REBOOT && rc == -EIO) { 719 /* Don't reset if MC_CMD_REBOOT returns EIO */ 720 } else if (rc == -EIO || rc == -EINTR) { 721 netif_err(efx, hw, efx->net_dev, "MC reboot detected\n"); 722 netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n", 723 cmd, -rc); 724 if (efx->type->mcdi_reboot_detected) 725 efx->type->mcdi_reboot_detected(efx); 726 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 727 } else if (proxy_handle && (rc == -EPROTO) && 728 efx_mcdi_get_proxy_handle(efx, hdr_len, data_len, 729 proxy_handle)) { 730 mcdi->proxy_rx_status = 0; 731 mcdi->proxy_rx_handle = 0; 732 mcdi->state = MCDI_STATE_PROXY_WAIT; 733 } else if (rc && !quiet) { 734 efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len, 735 rc); 736 } 737 738 if (rc == -EIO || rc == -EINTR) { 739 msleep(MCDI_STATUS_SLEEP_MS); 740 efx_mcdi_poll_reboot(efx); 741 mcdi->new_epoch = true; 742 } 743 } 744 745 if (!proxy_handle || !*proxy_handle) 746 efx_mcdi_release(mcdi); 747 return rc; 748 } 749 750 static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi) 751 { 752 if (mcdi->state == MCDI_STATE_PROXY_WAIT) { 753 /* Interrupt the proxy wait. */ 754 mcdi->proxy_rx_status = -EINTR; 755 wake_up(&mcdi->proxy_rx_wq); 756 } 757 } 758 759 static void efx_mcdi_ev_proxy_response(struct efx_nic *efx, 760 u32 handle, int status) 761 { 762 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 763 764 WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT); 765 766 mcdi->proxy_rx_status = efx_mcdi_errno(status); 767 /* Ensure the status is written before we update the handle, since the 768 * latter is used to check if we've finished. 769 */ 770 wmb(); 771 mcdi->proxy_rx_handle = handle; 772 wake_up(&mcdi->proxy_rx_wq); 773 } 774 775 static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet) 776 { 777 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 778 int rc; 779 780 /* Wait for a proxy event, or timeout. */ 781 rc = wait_event_timeout(mcdi->proxy_rx_wq, 782 mcdi->proxy_rx_handle != 0 || 783 mcdi->proxy_rx_status == -EINTR, 784 MCDI_RPC_TIMEOUT); 785 786 if (rc <= 0) { 787 netif_dbg(efx, hw, efx->net_dev, 788 "MCDI proxy timeout %d\n", handle); 789 return -ETIMEDOUT; 790 } else if (mcdi->proxy_rx_handle != handle) { 791 netif_warn(efx, hw, efx->net_dev, 792 "MCDI proxy unexpected handle %d (expected %d)\n", 793 mcdi->proxy_rx_handle, handle); 794 return -EINVAL; 795 } 796 797 return mcdi->proxy_rx_status; 798 } 799 800 static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd, 801 const efx_dword_t *inbuf, size_t inlen, 802 efx_dword_t *outbuf, size_t outlen, 803 size_t *outlen_actual, bool quiet, int *raw_rc) 804 { 805 u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */ 806 int rc; 807 808 if (inbuf && inlen && (inbuf == outbuf)) { 809 /* The input buffer can't be aliased with the output. */ 810 WARN_ON(1); 811 return -EINVAL; 812 } 813 814 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen); 815 if (rc) 816 return rc; 817 818 rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, 819 outlen_actual, quiet, &proxy_handle, raw_rc); 820 821 if (proxy_handle) { 822 /* Handle proxy authorisation. This allows approval of MCDI 823 * operations to be delegated to the admin function, allowing 824 * fine control over (eg) multicast subscriptions. 825 */ 826 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 827 828 netif_dbg(efx, hw, efx->net_dev, 829 "MCDI waiting for proxy auth %d\n", 830 proxy_handle); 831 rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet); 832 833 if (rc == 0) { 834 netif_dbg(efx, hw, efx->net_dev, 835 "MCDI proxy retry %d\n", proxy_handle); 836 837 /* We now retry the original request. */ 838 mcdi->state = MCDI_STATE_RUNNING_SYNC; 839 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 840 841 rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, 842 outbuf, outlen, outlen_actual, 843 quiet, NULL, raw_rc); 844 } else { 845 netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err, 846 "MC command 0x%x failed after proxy auth rc=%d\n", 847 cmd, rc); 848 849 if (rc == -EINTR || rc == -EIO) 850 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 851 efx_mcdi_release(mcdi); 852 } 853 } 854 855 return rc; 856 } 857 858 static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd, 859 const efx_dword_t *inbuf, size_t inlen, 860 efx_dword_t *outbuf, size_t outlen, 861 size_t *outlen_actual, bool quiet) 862 { 863 int raw_rc = 0; 864 int rc; 865 866 rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, 867 outbuf, outlen, outlen_actual, true, &raw_rc); 868 869 if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && 870 efx->type->is_vf) { 871 /* If the EVB port isn't available within a VF this may 872 * mean the PF is still bringing the switch up. We should 873 * retry our request shortly. 874 */ 875 unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT; 876 unsigned int delay_us = 10000; 877 878 netif_dbg(efx, hw, efx->net_dev, 879 "%s: NO_EVB_PORT; will retry request\n", 880 __func__); 881 882 do { 883 usleep_range(delay_us, delay_us + 10000); 884 rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, 885 outbuf, outlen, outlen_actual, 886 true, &raw_rc); 887 if (delay_us < 100000) 888 delay_us <<= 1; 889 } while ((rc == -EPROTO) && 890 (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && 891 time_before(jiffies, abort_time)); 892 } 893 894 if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO)) 895 efx_mcdi_display_error(efx, cmd, inlen, 896 outbuf, outlen, rc); 897 898 return rc; 899 } 900 901 /** 902 * efx_mcdi_rpc - Issue an MCDI command and wait for completion 903 * @efx: NIC through which to issue the command 904 * @cmd: Command type number 905 * @inbuf: Command parameters 906 * @inlen: Length of command parameters, in bytes. Must be a multiple 907 * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1. 908 * @outbuf: Response buffer. May be %NULL if @outlen is 0. 909 * @outlen: Length of response buffer, in bytes. If the actual 910 * response is longer than @outlen & ~3, it will be truncated 911 * to that length. 912 * @outlen_actual: Pointer through which to return the actual response 913 * length. May be %NULL if this is not needed. 914 * 915 * This function may sleep and therefore must be called in an appropriate 916 * context. 917 * 918 * Return: A negative error code, or zero if successful. The error 919 * code may come from the MCDI response or may indicate a failure 920 * to communicate with the MC. In the former case, the response 921 * will still be copied to @outbuf and *@outlen_actual will be 922 * set accordingly. In the latter case, *@outlen_actual will be 923 * set to zero. 924 */ 925 int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, 926 const efx_dword_t *inbuf, size_t inlen, 927 efx_dword_t *outbuf, size_t outlen, 928 size_t *outlen_actual) 929 { 930 return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, 931 outlen_actual, false); 932 } 933 934 /* Normally, on receiving an error code in the MCDI response, 935 * efx_mcdi_rpc will log an error message containing (among other 936 * things) the raw error code, by means of efx_mcdi_display_error. 937 * This _quiet version suppresses that; if the caller wishes to log 938 * the error conditionally on the return code, it should call this 939 * function and is then responsible for calling efx_mcdi_display_error 940 * as needed. 941 */ 942 int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd, 943 const efx_dword_t *inbuf, size_t inlen, 944 efx_dword_t *outbuf, size_t outlen, 945 size_t *outlen_actual) 946 { 947 return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, 948 outlen_actual, true); 949 } 950 951 int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd, 952 const efx_dword_t *inbuf, size_t inlen) 953 { 954 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 955 int rc; 956 957 rc = efx_mcdi_check_supported(efx, cmd, inlen); 958 if (rc) 959 return rc; 960 961 if (efx->mc_bist_for_other_fn) 962 return -ENETDOWN; 963 964 if (mcdi->mode == MCDI_MODE_FAIL) 965 return -ENETDOWN; 966 967 efx_mcdi_acquire_sync(mcdi); 968 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 969 return 0; 970 } 971 972 static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, 973 const efx_dword_t *inbuf, size_t inlen, 974 size_t outlen, 975 efx_mcdi_async_completer *complete, 976 unsigned long cookie, bool quiet) 977 { 978 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 979 struct efx_mcdi_async_param *async; 980 int rc; 981 982 rc = efx_mcdi_check_supported(efx, cmd, inlen); 983 if (rc) 984 return rc; 985 986 if (efx->mc_bist_for_other_fn) 987 return -ENETDOWN; 988 989 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4), 990 GFP_ATOMIC); 991 if (!async) 992 return -ENOMEM; 993 994 async->cmd = cmd; 995 async->inlen = inlen; 996 async->outlen = outlen; 997 async->quiet = quiet; 998 async->complete = complete; 999 async->cookie = cookie; 1000 memcpy(async + 1, inbuf, inlen); 1001 1002 spin_lock_bh(&mcdi->async_lock); 1003 1004 if (mcdi->mode == MCDI_MODE_EVENTS) { 1005 list_add_tail(&async->list, &mcdi->async_list); 1006 1007 /* If this is at the front of the queue, try to start it 1008 * immediately 1009 */ 1010 if (mcdi->async_list.next == &async->list && 1011 efx_mcdi_acquire_async(mcdi)) { 1012 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 1013 mod_timer(&mcdi->async_timer, 1014 jiffies + MCDI_RPC_TIMEOUT); 1015 } 1016 } else { 1017 kfree(async); 1018 rc = -ENETDOWN; 1019 } 1020 1021 spin_unlock_bh(&mcdi->async_lock); 1022 1023 return rc; 1024 } 1025 1026 /** 1027 * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously 1028 * @efx: NIC through which to issue the command 1029 * @cmd: Command type number 1030 * @inbuf: Command parameters 1031 * @inlen: Length of command parameters, in bytes 1032 * @outlen: Length to allocate for response buffer, in bytes 1033 * @complete: Function to be called on completion or cancellation. 1034 * @cookie: Arbitrary value to be passed to @complete. 1035 * 1036 * This function does not sleep and therefore may be called in atomic 1037 * context. It will fail if event queues are disabled or if MCDI 1038 * event completions have been disabled due to an error. 1039 * 1040 * If it succeeds, the @complete function will be called exactly once 1041 * in atomic context, when one of the following occurs: 1042 * (a) the completion event is received (in NAPI context) 1043 * (b) event queues are disabled (in the process that disables them) 1044 * (c) the request times-out (in timer context) 1045 */ 1046 int 1047 efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, 1048 const efx_dword_t *inbuf, size_t inlen, size_t outlen, 1049 efx_mcdi_async_completer *complete, unsigned long cookie) 1050 { 1051 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, 1052 cookie, false); 1053 } 1054 1055 int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd, 1056 const efx_dword_t *inbuf, size_t inlen, 1057 size_t outlen, efx_mcdi_async_completer *complete, 1058 unsigned long cookie) 1059 { 1060 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, 1061 cookie, true); 1062 } 1063 1064 int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen, 1065 efx_dword_t *outbuf, size_t outlen, 1066 size_t *outlen_actual) 1067 { 1068 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, 1069 outlen_actual, false, NULL, NULL); 1070 } 1071 1072 int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen, 1073 efx_dword_t *outbuf, size_t outlen, 1074 size_t *outlen_actual) 1075 { 1076 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, 1077 outlen_actual, true, NULL, NULL); 1078 } 1079 1080 void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd, 1081 size_t inlen, efx_dword_t *outbuf, 1082 size_t outlen, int rc) 1083 { 1084 int code = 0, err_arg = 0; 1085 1086 if (outlen >= MC_CMD_ERR_CODE_OFST + 4) 1087 code = MCDI_DWORD(outbuf, ERR_CODE); 1088 if (outlen >= MC_CMD_ERR_ARG_OFST + 4) 1089 err_arg = MCDI_DWORD(outbuf, ERR_ARG); 1090 netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err, 1091 "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n", 1092 cmd, inlen, rc, code, err_arg); 1093 } 1094 1095 /* Switch to polled MCDI completions. This can be called in various 1096 * error conditions with various locks held, so it must be lockless. 1097 * Caller is responsible for flushing asynchronous requests later. 1098 */ 1099 void efx_mcdi_mode_poll(struct efx_nic *efx) 1100 { 1101 struct efx_mcdi_iface *mcdi; 1102 1103 if (!efx->mcdi) 1104 return; 1105 1106 mcdi = efx_mcdi(efx); 1107 /* If already in polling mode, nothing to do. 1108 * If in fail-fast state, don't switch to polled completion. 1109 * FLR recovery will do that later. 1110 */ 1111 if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL) 1112 return; 1113 1114 /* We can switch from event completion to polled completion, because 1115 * mcdi requests are always completed in shared memory. We do this by 1116 * switching the mode to POLL'd then completing the request. 1117 * efx_mcdi_await_completion() will then call efx_mcdi_poll(). 1118 * 1119 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), 1120 * which efx_mcdi_complete_sync() provides for us. 1121 */ 1122 mcdi->mode = MCDI_MODE_POLL; 1123 1124 efx_mcdi_complete_sync(mcdi); 1125 } 1126 1127 /* Flush any running or queued asynchronous requests, after event processing 1128 * is stopped 1129 */ 1130 void efx_mcdi_flush_async(struct efx_nic *efx) 1131 { 1132 struct efx_mcdi_async_param *async, *next; 1133 struct efx_mcdi_iface *mcdi; 1134 1135 if (!efx->mcdi) 1136 return; 1137 1138 mcdi = efx_mcdi(efx); 1139 1140 /* We must be in poll or fail mode so no more requests can be queued */ 1141 BUG_ON(mcdi->mode == MCDI_MODE_EVENTS); 1142 1143 del_timer_sync(&mcdi->async_timer); 1144 1145 /* If a request is still running, make sure we give the MC 1146 * time to complete it so that the response won't overwrite our 1147 * next request. 1148 */ 1149 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) { 1150 efx_mcdi_poll(efx); 1151 mcdi->state = MCDI_STATE_QUIESCENT; 1152 } 1153 1154 /* Nothing else will access the async list now, so it is safe 1155 * to walk it without holding async_lock. If we hold it while 1156 * calling a completer then lockdep may warn that we have 1157 * acquired locks in the wrong order. 1158 */ 1159 list_for_each_entry_safe(async, next, &mcdi->async_list, list) { 1160 if (async->complete) 1161 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0); 1162 list_del(&async->list); 1163 kfree(async); 1164 } 1165 } 1166 1167 void efx_mcdi_mode_event(struct efx_nic *efx) 1168 { 1169 struct efx_mcdi_iface *mcdi; 1170 1171 if (!efx->mcdi) 1172 return; 1173 1174 mcdi = efx_mcdi(efx); 1175 /* If already in event completion mode, nothing to do. 1176 * If in fail-fast state, don't switch to event completion. FLR 1177 * recovery will do that later. 1178 */ 1179 if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL) 1180 return; 1181 1182 /* We can't switch from polled to event completion in the middle of a 1183 * request, because the completion method is specified in the request. 1184 * So acquire the interface to serialise the requestors. We don't need 1185 * to acquire the iface_lock to change the mode here, but we do need a 1186 * write memory barrier ensure that efx_mcdi_rpc() sees it, which 1187 * efx_mcdi_acquire() provides. 1188 */ 1189 efx_mcdi_acquire_sync(mcdi); 1190 mcdi->mode = MCDI_MODE_EVENTS; 1191 efx_mcdi_release(mcdi); 1192 } 1193 1194 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) 1195 { 1196 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1197 1198 /* If there is an outstanding MCDI request, it has been terminated 1199 * either by a BADASSERT or REBOOT event. If the mcdi interface is 1200 * in polled mode, then do nothing because the MC reboot handler will 1201 * set the header correctly. However, if the mcdi interface is waiting 1202 * for a CMDDONE event it won't receive it [and since all MCDI events 1203 * are sent to the same queue, we can't be racing with 1204 * efx_mcdi_ev_cpl()] 1205 * 1206 * If there is an outstanding asynchronous request, we can't 1207 * complete it now (efx_mcdi_complete() would deadlock). The 1208 * reset process will take care of this. 1209 * 1210 * There's a race here with efx_mcdi_send_request(), because 1211 * we might receive a REBOOT event *before* the request has 1212 * been copied out. In polled mode (during startup) this is 1213 * irrelevant, because efx_mcdi_complete_sync() is ignored. In 1214 * event mode, this condition is just an edge-case of 1215 * receiving a REBOOT event after posting the MCDI 1216 * request. Did the mc reboot before or after the copyout? The 1217 * best we can do always is just return failure. 1218 * 1219 * If there is an outstanding proxy response expected it is not going 1220 * to arrive. We should thus abort it. 1221 */ 1222 spin_lock(&mcdi->iface_lock); 1223 efx_mcdi_proxy_abort(mcdi); 1224 1225 if (efx_mcdi_complete_sync(mcdi)) { 1226 if (mcdi->mode == MCDI_MODE_EVENTS) { 1227 mcdi->resprc = rc; 1228 mcdi->resp_hdr_len = 0; 1229 mcdi->resp_data_len = 0; 1230 ++mcdi->credits; 1231 } 1232 } else { 1233 int count; 1234 1235 /* Consume the status word since efx_mcdi_rpc_finish() won't */ 1236 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { 1237 rc = efx_mcdi_poll_reboot(efx); 1238 if (rc) 1239 break; 1240 udelay(MCDI_STATUS_DELAY_US); 1241 } 1242 1243 /* On EF10, a CODE_MC_REBOOT event can be received without the 1244 * reboot detection in efx_mcdi_poll_reboot() being triggered. 1245 * If zero was returned from the final call to 1246 * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the 1247 * MC has definitely rebooted so prepare for the reset. 1248 */ 1249 if (!rc && efx->type->mcdi_reboot_detected) 1250 efx->type->mcdi_reboot_detected(efx); 1251 1252 mcdi->new_epoch = true; 1253 1254 /* Nobody was waiting for an MCDI request, so trigger a reset */ 1255 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 1256 } 1257 1258 spin_unlock(&mcdi->iface_lock); 1259 } 1260 1261 /* The MC is going down in to BIST mode. set the BIST flag to block 1262 * new MCDI, cancel any outstanding MCDI and schedule a BIST-type reset 1263 * (which doesn't actually execute a reset, it waits for the controlling 1264 * function to reset it). 1265 */ 1266 static void efx_mcdi_ev_bist(struct efx_nic *efx) 1267 { 1268 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1269 1270 spin_lock(&mcdi->iface_lock); 1271 efx->mc_bist_for_other_fn = true; 1272 efx_mcdi_proxy_abort(mcdi); 1273 1274 if (efx_mcdi_complete_sync(mcdi)) { 1275 if (mcdi->mode == MCDI_MODE_EVENTS) { 1276 mcdi->resprc = -EIO; 1277 mcdi->resp_hdr_len = 0; 1278 mcdi->resp_data_len = 0; 1279 ++mcdi->credits; 1280 } 1281 } 1282 mcdi->new_epoch = true; 1283 efx_schedule_reset(efx, RESET_TYPE_MC_BIST); 1284 spin_unlock(&mcdi->iface_lock); 1285 } 1286 1287 /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try 1288 * to recover. 1289 */ 1290 static void efx_mcdi_abandon(struct efx_nic *efx) 1291 { 1292 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1293 1294 if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL) 1295 return; /* it had already been done */ 1296 netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n"); 1297 efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT); 1298 } 1299 1300 static void efx_handle_drain_event(struct efx_nic *efx) 1301 { 1302 if (atomic_dec_and_test(&efx->active_queues)) 1303 wake_up(&efx->flush_wq); 1304 1305 WARN_ON(atomic_read(&efx->active_queues) < 0); 1306 } 1307 1308 /* Called from efx_farch_ev_process and efx_ef10_ev_process for MCDI events */ 1309 void efx_mcdi_process_event(struct efx_channel *channel, 1310 efx_qword_t *event) 1311 { 1312 struct efx_nic *efx = channel->efx; 1313 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); 1314 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); 1315 1316 switch (code) { 1317 case MCDI_EVENT_CODE_BADSSERT: 1318 netif_err(efx, hw, efx->net_dev, 1319 "MC watchdog or assertion failure at 0x%x\n", data); 1320 efx_mcdi_ev_death(efx, -EINTR); 1321 break; 1322 1323 case MCDI_EVENT_CODE_PMNOTICE: 1324 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); 1325 break; 1326 1327 case MCDI_EVENT_CODE_CMDDONE: 1328 efx_mcdi_ev_cpl(efx, 1329 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), 1330 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), 1331 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); 1332 break; 1333 1334 case MCDI_EVENT_CODE_LINKCHANGE: 1335 efx_mcdi_process_link_change(efx, event); 1336 break; 1337 case MCDI_EVENT_CODE_SENSOREVT: 1338 efx_sensor_event(efx, event); 1339 break; 1340 case MCDI_EVENT_CODE_SCHEDERR: 1341 netif_dbg(efx, hw, efx->net_dev, 1342 "MC Scheduler alert (0x%x)\n", data); 1343 break; 1344 case MCDI_EVENT_CODE_REBOOT: 1345 case MCDI_EVENT_CODE_MC_REBOOT: 1346 netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); 1347 efx_mcdi_ev_death(efx, -EIO); 1348 break; 1349 case MCDI_EVENT_CODE_MC_BIST: 1350 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n"); 1351 efx_mcdi_ev_bist(efx); 1352 break; 1353 case MCDI_EVENT_CODE_MAC_STATS_DMA: 1354 /* MAC stats are gather lazily. We can ignore this. */ 1355 break; 1356 case MCDI_EVENT_CODE_FLR: 1357 if (efx->type->sriov_flr) 1358 efx->type->sriov_flr(efx, 1359 MCDI_EVENT_FIELD(*event, FLR_VF)); 1360 break; 1361 case MCDI_EVENT_CODE_PTP_RX: 1362 case MCDI_EVENT_CODE_PTP_FAULT: 1363 case MCDI_EVENT_CODE_PTP_PPS: 1364 efx_ptp_event(efx, event); 1365 break; 1366 case MCDI_EVENT_CODE_PTP_TIME: 1367 efx_time_sync_event(channel, event); 1368 break; 1369 case MCDI_EVENT_CODE_TX_FLUSH: 1370 case MCDI_EVENT_CODE_RX_FLUSH: 1371 /* Two flush events will be sent: one to the same event 1372 * queue as completions, and one to event queue 0. 1373 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER 1374 * flag will be set, and we should ignore the event 1375 * because we want to wait for all completions. 1376 */ 1377 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN != 1378 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN); 1379 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER)) 1380 efx_handle_drain_event(efx); 1381 break; 1382 case MCDI_EVENT_CODE_TX_ERR: 1383 case MCDI_EVENT_CODE_RX_ERR: 1384 netif_err(efx, hw, efx->net_dev, 1385 "%s DMA error (event: "EFX_QWORD_FMT")\n", 1386 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX", 1387 EFX_QWORD_VAL(*event)); 1388 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR); 1389 break; 1390 case MCDI_EVENT_CODE_PROXY_RESPONSE: 1391 efx_mcdi_ev_proxy_response(efx, 1392 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE), 1393 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC)); 1394 break; 1395 default: 1396 netif_err(efx, hw, efx->net_dev, 1397 "Unknown MCDI event " EFX_QWORD_FMT "\n", 1398 EFX_QWORD_VAL(*event)); 1399 } 1400 } 1401 1402 /************************************************************************** 1403 * 1404 * Specific request functions 1405 * 1406 ************************************************************************** 1407 */ 1408 1409 void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) 1410 { 1411 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN); 1412 size_t outlength; 1413 const __le16 *ver_words; 1414 size_t offset; 1415 int rc; 1416 1417 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); 1418 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, 1419 outbuf, sizeof(outbuf), &outlength); 1420 if (rc) 1421 goto fail; 1422 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { 1423 rc = -EIO; 1424 goto fail; 1425 } 1426 1427 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); 1428 offset = scnprintf(buf, len, "%u.%u.%u.%u", 1429 le16_to_cpu(ver_words[0]), 1430 le16_to_cpu(ver_words[1]), 1431 le16_to_cpu(ver_words[2]), 1432 le16_to_cpu(ver_words[3])); 1433 1434 if (efx->type->print_additional_fwver) 1435 offset += efx->type->print_additional_fwver(efx, buf + offset, 1436 len - offset); 1437 1438 /* It's theoretically possible for the string to exceed 31 1439 * characters, though in practice the first three version 1440 * components are short enough that this doesn't happen. 1441 */ 1442 if (WARN_ON(offset >= len)) 1443 buf[0] = 0; 1444 1445 return; 1446 1447 fail: 1448 pci_err(efx->pci_dev, "%s: failed rc=%d\n", __func__, rc); 1449 buf[0] = 0; 1450 } 1451 1452 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, 1453 bool *was_attached) 1454 { 1455 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN); 1456 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN); 1457 size_t outlen; 1458 int rc; 1459 1460 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, 1461 driver_operating ? 1 : 0); 1462 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); 1463 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY); 1464 1465 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), 1466 outbuf, sizeof(outbuf), &outlen); 1467 /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID 1468 * specified will fail with EPERM, and we have to tell the MC we don't 1469 * care what firmware we get. 1470 */ 1471 if (rc == -EPERM) { 1472 pci_dbg(efx->pci_dev, 1473 "%s with fw-variant setting failed EPERM, trying without it\n", 1474 __func__); 1475 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, 1476 MC_CMD_FW_DONT_CARE); 1477 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, 1478 sizeof(inbuf), outbuf, sizeof(outbuf), 1479 &outlen); 1480 } 1481 if (rc) { 1482 efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf), 1483 outbuf, outlen, rc); 1484 goto fail; 1485 } 1486 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { 1487 rc = -EIO; 1488 goto fail; 1489 } 1490 1491 if (driver_operating) { 1492 if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) { 1493 efx->mcdi->fn_flags = 1494 MCDI_DWORD(outbuf, 1495 DRV_ATTACH_EXT_OUT_FUNC_FLAGS); 1496 } else { 1497 /* Synthesise flags for Siena */ 1498 efx->mcdi->fn_flags = 1499 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL | 1500 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED | 1501 (efx_port_num(efx) == 0) << 1502 MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY; 1503 } 1504 } 1505 1506 /* We currently assume we have control of the external link 1507 * and are completely trusted by firmware. Abort probing 1508 * if that's not true for this function. 1509 */ 1510 1511 if (was_attached != NULL) 1512 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); 1513 return 0; 1514 1515 fail: 1516 pci_err(efx->pci_dev, "%s: failed rc=%d\n", __func__, rc); 1517 return rc; 1518 } 1519 1520 int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, 1521 u16 *fw_subtype_list, u32 *capabilities) 1522 { 1523 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX); 1524 size_t outlen, i; 1525 int port_num = efx_port_num(efx); 1526 int rc; 1527 1528 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); 1529 /* we need __aligned(2) for ether_addr_copy */ 1530 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1); 1531 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1); 1532 1533 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, 1534 outbuf, sizeof(outbuf), &outlen); 1535 if (rc) 1536 goto fail; 1537 1538 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { 1539 rc = -EIO; 1540 goto fail; 1541 } 1542 1543 if (mac_address) 1544 ether_addr_copy(mac_address, 1545 port_num ? 1546 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) : 1547 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0)); 1548 if (fw_subtype_list) { 1549 for (i = 0; 1550 i < MCDI_VAR_ARRAY_LEN(outlen, 1551 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); 1552 i++) 1553 fw_subtype_list[i] = MCDI_ARRAY_WORD( 1554 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i); 1555 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++) 1556 fw_subtype_list[i] = 0; 1557 } 1558 if (capabilities) { 1559 if (port_num) 1560 *capabilities = MCDI_DWORD(outbuf, 1561 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); 1562 else 1563 *capabilities = MCDI_DWORD(outbuf, 1564 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); 1565 } 1566 1567 return 0; 1568 1569 fail: 1570 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", 1571 __func__, rc, (int)outlen); 1572 1573 return rc; 1574 } 1575 1576 int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) 1577 { 1578 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN); 1579 u32 dest = 0; 1580 int rc; 1581 1582 if (uart) 1583 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; 1584 if (evq) 1585 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; 1586 1587 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); 1588 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); 1589 1590 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); 1591 1592 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), 1593 NULL, 0, NULL); 1594 return rc; 1595 } 1596 1597 int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) 1598 { 1599 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN); 1600 size_t outlen; 1601 int rc; 1602 1603 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); 1604 1605 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, 1606 outbuf, sizeof(outbuf), &outlen); 1607 if (rc) 1608 goto fail; 1609 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { 1610 rc = -EIO; 1611 goto fail; 1612 } 1613 1614 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); 1615 return 0; 1616 1617 fail: 1618 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", 1619 __func__, rc); 1620 return rc; 1621 } 1622 1623 /* This function finds types using the new NVRAM_PARTITIONS mcdi. */ 1624 static int efx_new_mcdi_nvram_types(struct efx_nic *efx, u32 *number, 1625 u32 *nvram_types) 1626 { 1627 efx_dword_t *outbuf = kzalloc(MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2, 1628 GFP_KERNEL); 1629 size_t outlen; 1630 int rc; 1631 1632 if (!outbuf) 1633 return -ENOMEM; 1634 1635 BUILD_BUG_ON(MC_CMD_NVRAM_PARTITIONS_IN_LEN != 0); 1636 1637 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_PARTITIONS, NULL, 0, 1638 outbuf, MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2, &outlen); 1639 if (rc) 1640 goto fail; 1641 1642 *number = MCDI_DWORD(outbuf, NVRAM_PARTITIONS_OUT_NUM_PARTITIONS); 1643 1644 memcpy(nvram_types, MCDI_PTR(outbuf, NVRAM_PARTITIONS_OUT_TYPE_ID), 1645 *number * sizeof(u32)); 1646 1647 fail: 1648 kfree(outbuf); 1649 return rc; 1650 } 1651 1652 int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, 1653 size_t *size_out, size_t *erase_size_out, 1654 bool *protected_out) 1655 { 1656 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN); 1657 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN); 1658 size_t outlen; 1659 int rc; 1660 1661 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); 1662 1663 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), 1664 outbuf, sizeof(outbuf), &outlen); 1665 if (rc) 1666 goto fail; 1667 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { 1668 rc = -EIO; 1669 goto fail; 1670 } 1671 1672 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); 1673 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); 1674 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & 1675 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); 1676 return 0; 1677 1678 fail: 1679 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1680 return rc; 1681 } 1682 1683 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) 1684 { 1685 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN); 1686 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN); 1687 int rc; 1688 1689 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); 1690 1691 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), 1692 outbuf, sizeof(outbuf), NULL); 1693 if (rc) 1694 return rc; 1695 1696 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { 1697 case MC_CMD_NVRAM_TEST_PASS: 1698 case MC_CMD_NVRAM_TEST_NOTSUPP: 1699 return 0; 1700 default: 1701 return -EIO; 1702 } 1703 } 1704 1705 /* This function tests nvram partitions using the new mcdi partition lookup scheme */ 1706 int efx_new_mcdi_nvram_test_all(struct efx_nic *efx) 1707 { 1708 u32 *nvram_types = kzalloc(MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2, 1709 GFP_KERNEL); 1710 unsigned int number; 1711 int rc, i; 1712 1713 if (!nvram_types) 1714 return -ENOMEM; 1715 1716 rc = efx_new_mcdi_nvram_types(efx, &number, nvram_types); 1717 if (rc) 1718 goto fail; 1719 1720 /* Require at least one check */ 1721 rc = -EAGAIN; 1722 1723 for (i = 0; i < number; i++) { 1724 if (nvram_types[i] == NVRAM_PARTITION_TYPE_PARTITION_MAP || 1725 nvram_types[i] == NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG) 1726 continue; 1727 1728 rc = efx_mcdi_nvram_test(efx, nvram_types[i]); 1729 if (rc) 1730 goto fail; 1731 } 1732 1733 fail: 1734 kfree(nvram_types); 1735 return rc; 1736 } 1737 1738 int efx_mcdi_nvram_test_all(struct efx_nic *efx) 1739 { 1740 u32 nvram_types; 1741 unsigned int type; 1742 int rc; 1743 1744 rc = efx_mcdi_nvram_types(efx, &nvram_types); 1745 if (rc) 1746 goto fail1; 1747 1748 type = 0; 1749 while (nvram_types != 0) { 1750 if (nvram_types & 1) { 1751 rc = efx_mcdi_nvram_test(efx, type); 1752 if (rc) 1753 goto fail2; 1754 } 1755 type++; 1756 nvram_types >>= 1; 1757 } 1758 1759 return 0; 1760 1761 fail2: 1762 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", 1763 __func__, type); 1764 fail1: 1765 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1766 return rc; 1767 } 1768 1769 /* Returns 1 if an assertion was read, 0 if no assertion had fired, 1770 * negative on error. 1771 */ 1772 static int efx_mcdi_read_assertion(struct efx_nic *efx) 1773 { 1774 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN); 1775 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN); 1776 unsigned int flags, index; 1777 const char *reason; 1778 size_t outlen; 1779 int retry; 1780 int rc; 1781 1782 /* Attempt to read any stored assertion state before we reboot 1783 * the mcfw out of the assertion handler. Retry twice, once 1784 * because a boot-time assertion might cause this command to fail 1785 * with EINTR. And once again because GET_ASSERTS can race with 1786 * MC_CMD_REBOOT running on the other port. */ 1787 retry = 2; 1788 do { 1789 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); 1790 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS, 1791 inbuf, MC_CMD_GET_ASSERTS_IN_LEN, 1792 outbuf, sizeof(outbuf), &outlen); 1793 if (rc == -EPERM) 1794 return 0; 1795 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); 1796 1797 if (rc) { 1798 efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS, 1799 MC_CMD_GET_ASSERTS_IN_LEN, outbuf, 1800 outlen, rc); 1801 return rc; 1802 } 1803 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) 1804 return -EIO; 1805 1806 /* Print out any recorded assertion state */ 1807 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); 1808 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) 1809 return 0; 1810 1811 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) 1812 ? "system-level assertion" 1813 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) 1814 ? "thread-level assertion" 1815 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) 1816 ? "watchdog reset" 1817 : "unknown assertion"; 1818 netif_err(efx, hw, efx->net_dev, 1819 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, 1820 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), 1821 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); 1822 1823 /* Print out the registers */ 1824 for (index = 0; 1825 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; 1826 index++) 1827 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", 1828 1 + index, 1829 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS, 1830 index)); 1831 1832 return 1; 1833 } 1834 1835 static int efx_mcdi_exit_assertion(struct efx_nic *efx) 1836 { 1837 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); 1838 int rc; 1839 1840 /* If the MC is running debug firmware, it might now be 1841 * waiting for a debugger to attach, but we just want it to 1842 * reboot. We set a flag that makes the command a no-op if it 1843 * has already done so. 1844 * The MCDI will thus return either 0 or -EIO. 1845 */ 1846 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); 1847 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 1848 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); 1849 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, 1850 NULL, 0, NULL); 1851 if (rc == -EIO) 1852 rc = 0; 1853 if (rc) 1854 efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN, 1855 NULL, 0, rc); 1856 return rc; 1857 } 1858 1859 int efx_mcdi_handle_assertion(struct efx_nic *efx) 1860 { 1861 int rc; 1862 1863 rc = efx_mcdi_read_assertion(efx); 1864 if (rc <= 0) 1865 return rc; 1866 1867 return efx_mcdi_exit_assertion(efx); 1868 } 1869 1870 int efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) 1871 { 1872 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN); 1873 1874 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); 1875 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); 1876 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); 1877 1878 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); 1879 1880 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); 1881 1882 return efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), NULL, 0, NULL); 1883 } 1884 1885 static int efx_mcdi_reset_func(struct efx_nic *efx) 1886 { 1887 MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN); 1888 int rc; 1889 1890 BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0); 1891 MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG, 1892 ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1); 1893 rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf), 1894 NULL, 0, NULL); 1895 return rc; 1896 } 1897 1898 static int efx_mcdi_reset_mc(struct efx_nic *efx) 1899 { 1900 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); 1901 int rc; 1902 1903 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); 1904 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); 1905 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), 1906 NULL, 0, NULL); 1907 /* White is black, and up is down */ 1908 if (rc == -EIO) 1909 return 0; 1910 if (rc == 0) 1911 rc = -EIO; 1912 return rc; 1913 } 1914 1915 enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason) 1916 { 1917 return RESET_TYPE_RECOVER_OR_ALL; 1918 } 1919 1920 int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method) 1921 { 1922 int rc; 1923 1924 /* If MCDI is down, we can't handle_assertion */ 1925 if (method == RESET_TYPE_MCDI_TIMEOUT) { 1926 rc = pci_reset_function(efx->pci_dev); 1927 if (rc) 1928 return rc; 1929 /* Re-enable polled MCDI completion */ 1930 if (efx->mcdi) { 1931 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 1932 mcdi->mode = MCDI_MODE_POLL; 1933 } 1934 return 0; 1935 } 1936 1937 /* Recover from a failed assertion pre-reset */ 1938 rc = efx_mcdi_handle_assertion(efx); 1939 if (rc) 1940 return rc; 1941 1942 if (method == RESET_TYPE_DATAPATH) 1943 return 0; 1944 else if (method == RESET_TYPE_WORLD) 1945 return efx_mcdi_reset_mc(efx); 1946 else 1947 return efx_mcdi_reset_func(efx); 1948 } 1949 1950 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, 1951 const u8 *mac, int *id_out) 1952 { 1953 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN); 1954 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN); 1955 size_t outlen; 1956 int rc; 1957 1958 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); 1959 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, 1960 MC_CMD_FILTER_MODE_SIMPLE); 1961 ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac); 1962 1963 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), 1964 outbuf, sizeof(outbuf), &outlen); 1965 if (rc) 1966 goto fail; 1967 1968 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { 1969 rc = -EIO; 1970 goto fail; 1971 } 1972 1973 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); 1974 1975 return 0; 1976 1977 fail: 1978 *id_out = -1; 1979 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1980 return rc; 1981 1982 } 1983 1984 1985 int 1986 efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) 1987 { 1988 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); 1989 } 1990 1991 1992 int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) 1993 { 1994 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN); 1995 size_t outlen; 1996 int rc; 1997 1998 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, 1999 outbuf, sizeof(outbuf), &outlen); 2000 if (rc) 2001 goto fail; 2002 2003 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { 2004 rc = -EIO; 2005 goto fail; 2006 } 2007 2008 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); 2009 2010 return 0; 2011 2012 fail: 2013 *id_out = -1; 2014 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 2015 return rc; 2016 } 2017 2018 2019 int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) 2020 { 2021 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN); 2022 int rc; 2023 2024 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); 2025 2026 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), 2027 NULL, 0, NULL); 2028 return rc; 2029 } 2030 2031 int efx_mcdi_flush_rxqs(struct efx_nic *efx) 2032 { 2033 struct efx_channel *channel; 2034 struct efx_rx_queue *rx_queue; 2035 MCDI_DECLARE_BUF(inbuf, 2036 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); 2037 int rc, count; 2038 2039 BUILD_BUG_ON(EFX_MAX_CHANNELS > 2040 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM); 2041 2042 count = 0; 2043 efx_for_each_channel(channel, efx) { 2044 efx_for_each_channel_rx_queue(rx_queue, channel) { 2045 if (rx_queue->flush_pending) { 2046 rx_queue->flush_pending = false; 2047 atomic_dec(&efx->rxq_flush_pending); 2048 MCDI_SET_ARRAY_DWORD( 2049 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST, 2050 count, efx_rx_queue_index(rx_queue)); 2051 count++; 2052 } 2053 } 2054 } 2055 2056 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf, 2057 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL); 2058 WARN_ON(rc < 0); 2059 2060 return rc; 2061 } 2062 2063 int efx_mcdi_wol_filter_reset(struct efx_nic *efx) 2064 { 2065 int rc; 2066 2067 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); 2068 return rc; 2069 } 2070 2071 int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled, 2072 unsigned int *flags) 2073 { 2074 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN); 2075 MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN); 2076 size_t outlen; 2077 int rc; 2078 2079 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0); 2080 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type); 2081 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled); 2082 rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf), 2083 outbuf, sizeof(outbuf), &outlen); 2084 if (rc) 2085 return rc; 2086 2087 if (!flags) 2088 return 0; 2089 2090 if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN) 2091 *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS); 2092 else 2093 *flags = 0; 2094 2095 return 0; 2096 } 2097 2098 int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out, 2099 unsigned int *enabled_out) 2100 { 2101 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN); 2102 size_t outlen; 2103 int rc; 2104 2105 rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0, 2106 outbuf, sizeof(outbuf), &outlen); 2107 if (rc) 2108 goto fail; 2109 2110 if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) { 2111 rc = -EIO; 2112 goto fail; 2113 } 2114 2115 if (impl_out) 2116 *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED); 2117 2118 if (enabled_out) 2119 *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED); 2120 2121 return 0; 2122 2123 fail: 2124 /* Older firmware lacks GET_WORKAROUNDS and this isn't especially 2125 * terrifying. The call site will have to deal with it though. 2126 */ 2127 netif_cond_dbg(efx, hw, efx->net_dev, rc == -ENOSYS, err, 2128 "%s: failed rc=%d\n", __func__, rc); 2129 return rc; 2130 } 2131 2132 /* Failure to read a privilege mask is never fatal, because we can always 2133 * carry on as though we didn't have the privilege we were interested in. 2134 * So use efx_mcdi_rpc_quiet(). 2135 */ 2136 int efx_mcdi_get_privilege_mask(struct efx_nic *efx, u32 *mask) 2137 { 2138 MCDI_DECLARE_BUF(fi_outbuf, MC_CMD_GET_FUNCTION_INFO_OUT_LEN); 2139 MCDI_DECLARE_BUF(pm_inbuf, MC_CMD_PRIVILEGE_MASK_IN_LEN); 2140 MCDI_DECLARE_BUF(pm_outbuf, MC_CMD_PRIVILEGE_MASK_OUT_LEN); 2141 size_t outlen; 2142 u16 pf, vf; 2143 int rc; 2144 2145 if (!efx || !mask) 2146 return -EINVAL; 2147 2148 /* Get our function number */ 2149 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_FUNCTION_INFO, NULL, 0, 2150 fi_outbuf, MC_CMD_GET_FUNCTION_INFO_OUT_LEN, 2151 &outlen); 2152 if (rc != 0) 2153 return rc; 2154 if (outlen < MC_CMD_GET_FUNCTION_INFO_OUT_LEN) 2155 return -EIO; 2156 2157 pf = MCDI_DWORD(fi_outbuf, GET_FUNCTION_INFO_OUT_PF); 2158 vf = MCDI_DWORD(fi_outbuf, GET_FUNCTION_INFO_OUT_VF); 2159 2160 MCDI_POPULATE_DWORD_2(pm_inbuf, PRIVILEGE_MASK_IN_FUNCTION, 2161 PRIVILEGE_MASK_IN_FUNCTION_PF, pf, 2162 PRIVILEGE_MASK_IN_FUNCTION_VF, vf); 2163 2164 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_PRIVILEGE_MASK, 2165 pm_inbuf, sizeof(pm_inbuf), 2166 pm_outbuf, sizeof(pm_outbuf), &outlen); 2167 2168 if (rc != 0) 2169 return rc; 2170 if (outlen < MC_CMD_PRIVILEGE_MASK_OUT_LEN) 2171 return -EIO; 2172 2173 *mask = MCDI_DWORD(pm_outbuf, PRIVILEGE_MASK_OUT_OLD_MASK); 2174 2175 return 0; 2176 } 2177 2178 int efx_mcdi_nvram_metadata(struct efx_nic *efx, unsigned int type, 2179 u32 *subtype, u16 version[4], char *desc, 2180 size_t descsize) 2181 { 2182 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_METADATA_IN_LEN); 2183 efx_dword_t *outbuf; 2184 size_t outlen; 2185 u32 flags; 2186 int rc; 2187 2188 outbuf = kzalloc(MC_CMD_NVRAM_METADATA_OUT_LENMAX_MCDI2, GFP_KERNEL); 2189 if (!outbuf) 2190 return -ENOMEM; 2191 2192 MCDI_SET_DWORD(inbuf, NVRAM_METADATA_IN_TYPE, type); 2193 2194 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_NVRAM_METADATA, inbuf, 2195 sizeof(inbuf), outbuf, 2196 MC_CMD_NVRAM_METADATA_OUT_LENMAX_MCDI2, 2197 &outlen); 2198 if (rc) 2199 goto out_free; 2200 if (outlen < MC_CMD_NVRAM_METADATA_OUT_LENMIN) { 2201 rc = -EIO; 2202 goto out_free; 2203 } 2204 2205 flags = MCDI_DWORD(outbuf, NVRAM_METADATA_OUT_FLAGS); 2206 2207 if (desc && descsize > 0) { 2208 if (flags & BIT(MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_LBN)) { 2209 if (descsize <= 2210 MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_NUM(outlen)) { 2211 rc = -E2BIG; 2212 goto out_free; 2213 } 2214 2215 strncpy(desc, 2216 MCDI_PTR(outbuf, NVRAM_METADATA_OUT_DESCRIPTION), 2217 MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_NUM(outlen)); 2218 desc[MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_NUM(outlen)] = '\0'; 2219 } else { 2220 desc[0] = '\0'; 2221 } 2222 } 2223 2224 if (subtype) { 2225 if (flags & BIT(MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_LBN)) 2226 *subtype = MCDI_DWORD(outbuf, NVRAM_METADATA_OUT_SUBTYPE); 2227 else 2228 *subtype = 0; 2229 } 2230 2231 if (version) { 2232 if (flags & BIT(MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_LBN)) { 2233 version[0] = MCDI_WORD(outbuf, NVRAM_METADATA_OUT_VERSION_W); 2234 version[1] = MCDI_WORD(outbuf, NVRAM_METADATA_OUT_VERSION_X); 2235 version[2] = MCDI_WORD(outbuf, NVRAM_METADATA_OUT_VERSION_Y); 2236 version[3] = MCDI_WORD(outbuf, NVRAM_METADATA_OUT_VERSION_Z); 2237 } else { 2238 version[0] = 0; 2239 version[1] = 0; 2240 version[2] = 0; 2241 version[3] = 0; 2242 } 2243 } 2244 2245 out_free: 2246 kfree(outbuf); 2247 return rc; 2248 } 2249 2250 #ifdef CONFIG_SFC_MTD 2251 2252 #define EFX_MCDI_NVRAM_LEN_MAX 128 2253 2254 static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) 2255 { 2256 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN); 2257 int rc; 2258 2259 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); 2260 MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_START_V2_IN_FLAGS, 2261 NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT, 2262 1); 2263 2264 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); 2265 2266 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), 2267 NULL, 0, NULL); 2268 2269 return rc; 2270 } 2271 2272 static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, 2273 loff_t offset, u8 *buffer, size_t length) 2274 { 2275 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_V2_LEN); 2276 MCDI_DECLARE_BUF(outbuf, 2277 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)); 2278 size_t outlen; 2279 int rc; 2280 2281 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); 2282 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); 2283 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); 2284 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_V2_MODE, 2285 MC_CMD_NVRAM_READ_IN_V2_DEFAULT); 2286 2287 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), 2288 outbuf, sizeof(outbuf), &outlen); 2289 if (rc) 2290 return rc; 2291 2292 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); 2293 return 0; 2294 } 2295 2296 static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, 2297 loff_t offset, const u8 *buffer, size_t length) 2298 { 2299 MCDI_DECLARE_BUF(inbuf, 2300 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)); 2301 int rc; 2302 2303 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); 2304 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); 2305 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); 2306 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); 2307 2308 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); 2309 2310 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, 2311 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), 2312 NULL, 0, NULL); 2313 return rc; 2314 } 2315 2316 static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, 2317 loff_t offset, size_t length) 2318 { 2319 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN); 2320 int rc; 2321 2322 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); 2323 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); 2324 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); 2325 2326 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); 2327 2328 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), 2329 NULL, 0, NULL); 2330 return rc; 2331 } 2332 2333 static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) 2334 { 2335 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN); 2336 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN); 2337 size_t outlen; 2338 int rc, rc2; 2339 2340 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); 2341 /* Always set this flag. Old firmware ignores it */ 2342 MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS, 2343 NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT, 2344 1); 2345 2346 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), 2347 outbuf, sizeof(outbuf), &outlen); 2348 if (!rc && outlen >= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) { 2349 rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE); 2350 if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS) 2351 netif_err(efx, drv, efx->net_dev, 2352 "NVRAM update failed verification with code 0x%x\n", 2353 rc2); 2354 switch (rc2) { 2355 case MC_CMD_NVRAM_VERIFY_RC_SUCCESS: 2356 break; 2357 case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED: 2358 case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED: 2359 case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED: 2360 case MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED: 2361 case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED: 2362 rc = -EIO; 2363 break; 2364 case MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT: 2365 case MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST: 2366 rc = -EINVAL; 2367 break; 2368 case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES: 2369 case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS: 2370 case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH: 2371 rc = -EPERM; 2372 break; 2373 default: 2374 netif_err(efx, drv, efx->net_dev, 2375 "Unknown response to NVRAM_UPDATE_FINISH\n"); 2376 rc = -EIO; 2377 } 2378 } 2379 2380 return rc; 2381 } 2382 2383 int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, 2384 size_t len, size_t *retlen, u8 *buffer) 2385 { 2386 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 2387 struct efx_nic *efx = mtd->priv; 2388 loff_t offset = start; 2389 loff_t end = min_t(loff_t, start + len, mtd->size); 2390 size_t chunk; 2391 int rc = 0; 2392 2393 while (offset < end) { 2394 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); 2395 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, 2396 buffer, chunk); 2397 if (rc) 2398 goto out; 2399 offset += chunk; 2400 buffer += chunk; 2401 } 2402 out: 2403 *retlen = offset - start; 2404 return rc; 2405 } 2406 2407 int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) 2408 { 2409 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 2410 struct efx_nic *efx = mtd->priv; 2411 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); 2412 loff_t end = min_t(loff_t, start + len, mtd->size); 2413 size_t chunk = part->common.mtd.erasesize; 2414 int rc = 0; 2415 2416 if (!part->updating) { 2417 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); 2418 if (rc) 2419 goto out; 2420 part->updating = true; 2421 } 2422 2423 /* The MCDI interface can in fact do multiple erase blocks at once; 2424 * but erasing may be slow, so we make multiple calls here to avoid 2425 * tripping the MCDI RPC timeout. */ 2426 while (offset < end) { 2427 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, 2428 chunk); 2429 if (rc) 2430 goto out; 2431 offset += chunk; 2432 } 2433 out: 2434 return rc; 2435 } 2436 2437 int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start, 2438 size_t len, size_t *retlen, const u8 *buffer) 2439 { 2440 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 2441 struct efx_nic *efx = mtd->priv; 2442 loff_t offset = start; 2443 loff_t end = min_t(loff_t, start + len, mtd->size); 2444 size_t chunk; 2445 int rc = 0; 2446 2447 if (!part->updating) { 2448 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); 2449 if (rc) 2450 goto out; 2451 part->updating = true; 2452 } 2453 2454 while (offset < end) { 2455 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); 2456 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, 2457 buffer, chunk); 2458 if (rc) 2459 goto out; 2460 offset += chunk; 2461 buffer += chunk; 2462 } 2463 out: 2464 *retlen = offset - start; 2465 return rc; 2466 } 2467 2468 int efx_mcdi_mtd_sync(struct mtd_info *mtd) 2469 { 2470 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 2471 struct efx_nic *efx = mtd->priv; 2472 int rc = 0; 2473 2474 if (part->updating) { 2475 part->updating = false; 2476 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); 2477 } 2478 2479 return rc; 2480 } 2481 2482 void efx_mcdi_mtd_rename(struct efx_mtd_partition *part) 2483 { 2484 struct efx_mcdi_mtd_partition *mcdi_part = 2485 container_of(part, struct efx_mcdi_mtd_partition, common); 2486 struct efx_nic *efx = part->mtd.priv; 2487 2488 snprintf(part->name, sizeof(part->name), "%s %s:%02x", 2489 efx->name, part->type_name, mcdi_part->fw_subtype); 2490 } 2491 2492 #endif /* CONFIG_SFC_MTD */ 2493