xref: /openbmc/linux/drivers/net/ethernet/sfc/mcdi.c (revision b34e08d5)
1 /****************************************************************************
2  * Driver for Solarflare network controllers and boards
3  * Copyright 2008-2013 Solarflare Communications Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published
7  * by the Free Software Foundation, incorporated herein by reference.
8  */
9 
10 #include <linux/delay.h>
11 #include <asm/cmpxchg.h>
12 #include "net_driver.h"
13 #include "nic.h"
14 #include "io.h"
15 #include "farch_regs.h"
16 #include "mcdi_pcol.h"
17 #include "phy.h"
18 
19 /**************************************************************************
20  *
21  * Management-Controller-to-Driver Interface
22  *
23  **************************************************************************
24  */
25 
26 #define MCDI_RPC_TIMEOUT       (10 * HZ)
27 
28 /* A reboot/assertion causes the MCDI status word to be set after the
29  * command word is set or a REBOOT event is sent. If we notice a reboot
30  * via these mechanisms then wait 250ms for the status word to be set.
31  */
32 #define MCDI_STATUS_DELAY_US		100
33 #define MCDI_STATUS_DELAY_COUNT		2500
34 #define MCDI_STATUS_SLEEP_MS						\
35 	(MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
36 
37 #define SEQ_MASK							\
38 	EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
39 
40 struct efx_mcdi_async_param {
41 	struct list_head list;
42 	unsigned int cmd;
43 	size_t inlen;
44 	size_t outlen;
45 	bool quiet;
46 	efx_mcdi_async_completer *complete;
47 	unsigned long cookie;
48 	/* followed by request/response buffer */
49 };
50 
51 static void efx_mcdi_timeout_async(unsigned long context);
52 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
53 			       bool *was_attached_out);
54 static bool efx_mcdi_poll_once(struct efx_nic *efx);
55 
56 static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
57 {
58 	EFX_BUG_ON_PARANOID(!efx->mcdi);
59 	return &efx->mcdi->iface;
60 }
61 
62 int efx_mcdi_init(struct efx_nic *efx)
63 {
64 	struct efx_mcdi_iface *mcdi;
65 	bool already_attached;
66 	int rc;
67 
68 	efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
69 	if (!efx->mcdi)
70 		return -ENOMEM;
71 
72 	mcdi = efx_mcdi(efx);
73 	mcdi->efx = efx;
74 	init_waitqueue_head(&mcdi->wq);
75 	spin_lock_init(&mcdi->iface_lock);
76 	mcdi->state = MCDI_STATE_QUIESCENT;
77 	mcdi->mode = MCDI_MODE_POLL;
78 	spin_lock_init(&mcdi->async_lock);
79 	INIT_LIST_HEAD(&mcdi->async_list);
80 	setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
81 		    (unsigned long)mcdi);
82 
83 	(void) efx_mcdi_poll_reboot(efx);
84 	mcdi->new_epoch = true;
85 
86 	/* Recover from a failed assertion before probing */
87 	rc = efx_mcdi_handle_assertion(efx);
88 	if (rc)
89 		return rc;
90 
91 	/* Let the MC (and BMC, if this is a LOM) know that the driver
92 	 * is loaded. We should do this before we reset the NIC.
93 	 */
94 	rc = efx_mcdi_drv_attach(efx, true, &already_attached);
95 	if (rc) {
96 		netif_err(efx, probe, efx->net_dev,
97 			  "Unable to register driver with MCPU\n");
98 		return rc;
99 	}
100 	if (already_attached)
101 		/* Not a fatal error */
102 		netif_err(efx, probe, efx->net_dev,
103 			  "Host already registered with MCPU\n");
104 
105 	if (efx->mcdi->fn_flags &
106 	    (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
107 		efx->primary = efx;
108 
109 	return 0;
110 }
111 
112 void efx_mcdi_fini(struct efx_nic *efx)
113 {
114 	if (!efx->mcdi)
115 		return;
116 
117 	BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
118 
119 	/* Relinquish the device (back to the BMC, if this is a LOM) */
120 	efx_mcdi_drv_attach(efx, false, NULL);
121 
122 	kfree(efx->mcdi);
123 }
124 
125 static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
126 				  const efx_dword_t *inbuf, size_t inlen)
127 {
128 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
129 	efx_dword_t hdr[2];
130 	size_t hdr_len;
131 	u32 xflags, seqno;
132 
133 	BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
134 
135 	/* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
136 	spin_lock_bh(&mcdi->iface_lock);
137 	++mcdi->seqno;
138 	spin_unlock_bh(&mcdi->iface_lock);
139 
140 	seqno = mcdi->seqno & SEQ_MASK;
141 	xflags = 0;
142 	if (mcdi->mode == MCDI_MODE_EVENTS)
143 		xflags |= MCDI_HEADER_XFLAGS_EVREQ;
144 
145 	if (efx->type->mcdi_max_ver == 1) {
146 		/* MCDI v1 */
147 		EFX_POPULATE_DWORD_7(hdr[0],
148 				     MCDI_HEADER_RESPONSE, 0,
149 				     MCDI_HEADER_RESYNC, 1,
150 				     MCDI_HEADER_CODE, cmd,
151 				     MCDI_HEADER_DATALEN, inlen,
152 				     MCDI_HEADER_SEQ, seqno,
153 				     MCDI_HEADER_XFLAGS, xflags,
154 				     MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
155 		hdr_len = 4;
156 	} else {
157 		/* MCDI v2 */
158 		BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
159 		EFX_POPULATE_DWORD_7(hdr[0],
160 				     MCDI_HEADER_RESPONSE, 0,
161 				     MCDI_HEADER_RESYNC, 1,
162 				     MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
163 				     MCDI_HEADER_DATALEN, 0,
164 				     MCDI_HEADER_SEQ, seqno,
165 				     MCDI_HEADER_XFLAGS, xflags,
166 				     MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
167 		EFX_POPULATE_DWORD_2(hdr[1],
168 				     MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
169 				     MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
170 		hdr_len = 8;
171 	}
172 
173 	efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
174 
175 	mcdi->new_epoch = false;
176 }
177 
178 static int efx_mcdi_errno(unsigned int mcdi_err)
179 {
180 	switch (mcdi_err) {
181 	case 0:
182 		return 0;
183 #define TRANSLATE_ERROR(name)					\
184 	case MC_CMD_ERR_ ## name:				\
185 		return -name;
186 	TRANSLATE_ERROR(EPERM);
187 	TRANSLATE_ERROR(ENOENT);
188 	TRANSLATE_ERROR(EINTR);
189 	TRANSLATE_ERROR(EAGAIN);
190 	TRANSLATE_ERROR(EACCES);
191 	TRANSLATE_ERROR(EBUSY);
192 	TRANSLATE_ERROR(EINVAL);
193 	TRANSLATE_ERROR(EDEADLK);
194 	TRANSLATE_ERROR(ENOSYS);
195 	TRANSLATE_ERROR(ETIME);
196 	TRANSLATE_ERROR(EALREADY);
197 	TRANSLATE_ERROR(ENOSPC);
198 #undef TRANSLATE_ERROR
199 	case MC_CMD_ERR_ENOTSUP:
200 		return -EOPNOTSUPP;
201 	case MC_CMD_ERR_ALLOC_FAIL:
202 		return -ENOBUFS;
203 	case MC_CMD_ERR_MAC_EXIST:
204 		return -EADDRINUSE;
205 	default:
206 		return -EPROTO;
207 	}
208 }
209 
210 static void efx_mcdi_read_response_header(struct efx_nic *efx)
211 {
212 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
213 	unsigned int respseq, respcmd, error;
214 	efx_dword_t hdr;
215 
216 	efx->type->mcdi_read_response(efx, &hdr, 0, 4);
217 	respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
218 	respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
219 	error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
220 
221 	if (respcmd != MC_CMD_V2_EXTN) {
222 		mcdi->resp_hdr_len = 4;
223 		mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
224 	} else {
225 		efx->type->mcdi_read_response(efx, &hdr, 4, 4);
226 		mcdi->resp_hdr_len = 8;
227 		mcdi->resp_data_len =
228 			EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
229 	}
230 
231 	if (error && mcdi->resp_data_len == 0) {
232 		netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
233 		mcdi->resprc = -EIO;
234 	} else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
235 		netif_err(efx, hw, efx->net_dev,
236 			  "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
237 			  respseq, mcdi->seqno);
238 		mcdi->resprc = -EIO;
239 	} else if (error) {
240 		efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
241 		mcdi->resprc =
242 			efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
243 	} else {
244 		mcdi->resprc = 0;
245 	}
246 }
247 
248 static bool efx_mcdi_poll_once(struct efx_nic *efx)
249 {
250 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
251 
252 	rmb();
253 	if (!efx->type->mcdi_poll_response(efx))
254 		return false;
255 
256 	spin_lock_bh(&mcdi->iface_lock);
257 	efx_mcdi_read_response_header(efx);
258 	spin_unlock_bh(&mcdi->iface_lock);
259 
260 	return true;
261 }
262 
263 static int efx_mcdi_poll(struct efx_nic *efx)
264 {
265 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
266 	unsigned long time, finish;
267 	unsigned int spins;
268 	int rc;
269 
270 	/* Check for a reboot atomically with respect to efx_mcdi_copyout() */
271 	rc = efx_mcdi_poll_reboot(efx);
272 	if (rc) {
273 		spin_lock_bh(&mcdi->iface_lock);
274 		mcdi->resprc = rc;
275 		mcdi->resp_hdr_len = 0;
276 		mcdi->resp_data_len = 0;
277 		spin_unlock_bh(&mcdi->iface_lock);
278 		return 0;
279 	}
280 
281 	/* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
282 	 * because generally mcdi responses are fast. After that, back off
283 	 * and poll once a jiffy (approximately)
284 	 */
285 	spins = TICK_USEC;
286 	finish = jiffies + MCDI_RPC_TIMEOUT;
287 
288 	while (1) {
289 		if (spins != 0) {
290 			--spins;
291 			udelay(1);
292 		} else {
293 			schedule_timeout_uninterruptible(1);
294 		}
295 
296 		time = jiffies;
297 
298 		if (efx_mcdi_poll_once(efx))
299 			break;
300 
301 		if (time_after(time, finish))
302 			return -ETIMEDOUT;
303 	}
304 
305 	/* Return rc=0 like wait_event_timeout() */
306 	return 0;
307 }
308 
309 /* Test and clear MC-rebooted flag for this port/function; reset
310  * software state as necessary.
311  */
312 int efx_mcdi_poll_reboot(struct efx_nic *efx)
313 {
314 	if (!efx->mcdi)
315 		return 0;
316 
317 	return efx->type->mcdi_poll_reboot(efx);
318 }
319 
320 static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
321 {
322 	return cmpxchg(&mcdi->state,
323 		       MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
324 		MCDI_STATE_QUIESCENT;
325 }
326 
327 static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
328 {
329 	/* Wait until the interface becomes QUIESCENT and we win the race
330 	 * to mark it RUNNING_SYNC.
331 	 */
332 	wait_event(mcdi->wq,
333 		   cmpxchg(&mcdi->state,
334 			   MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
335 		   MCDI_STATE_QUIESCENT);
336 }
337 
338 static int efx_mcdi_await_completion(struct efx_nic *efx)
339 {
340 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
341 
342 	if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
343 			       MCDI_RPC_TIMEOUT) == 0)
344 		return -ETIMEDOUT;
345 
346 	/* Check if efx_mcdi_set_mode() switched us back to polled completions.
347 	 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
348 	 * completed the request first, then we'll just end up completing the
349 	 * request again, which is safe.
350 	 *
351 	 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
352 	 * wait_event_timeout() implicitly provides.
353 	 */
354 	if (mcdi->mode == MCDI_MODE_POLL)
355 		return efx_mcdi_poll(efx);
356 
357 	return 0;
358 }
359 
360 /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
361  * requester.  Return whether this was done.  Does not take any locks.
362  */
363 static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
364 {
365 	if (cmpxchg(&mcdi->state,
366 		    MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
367 	    MCDI_STATE_RUNNING_SYNC) {
368 		wake_up(&mcdi->wq);
369 		return true;
370 	}
371 
372 	return false;
373 }
374 
375 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
376 {
377 	if (mcdi->mode == MCDI_MODE_EVENTS) {
378 		struct efx_mcdi_async_param *async;
379 		struct efx_nic *efx = mcdi->efx;
380 
381 		/* Process the asynchronous request queue */
382 		spin_lock_bh(&mcdi->async_lock);
383 		async = list_first_entry_or_null(
384 			&mcdi->async_list, struct efx_mcdi_async_param, list);
385 		if (async) {
386 			mcdi->state = MCDI_STATE_RUNNING_ASYNC;
387 			efx_mcdi_send_request(efx, async->cmd,
388 					      (const efx_dword_t *)(async + 1),
389 					      async->inlen);
390 			mod_timer(&mcdi->async_timer,
391 				  jiffies + MCDI_RPC_TIMEOUT);
392 		}
393 		spin_unlock_bh(&mcdi->async_lock);
394 
395 		if (async)
396 			return;
397 	}
398 
399 	mcdi->state = MCDI_STATE_QUIESCENT;
400 	wake_up(&mcdi->wq);
401 }
402 
403 /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
404  * asynchronous completion function, and release the interface.
405  * Return whether this was done.  Must be called in bh-disabled
406  * context.  Will take iface_lock and async_lock.
407  */
408 static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
409 {
410 	struct efx_nic *efx = mcdi->efx;
411 	struct efx_mcdi_async_param *async;
412 	size_t hdr_len, data_len, err_len;
413 	efx_dword_t *outbuf;
414 	MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
415 	int rc;
416 
417 	if (cmpxchg(&mcdi->state,
418 		    MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
419 	    MCDI_STATE_RUNNING_ASYNC)
420 		return false;
421 
422 	spin_lock(&mcdi->iface_lock);
423 	if (timeout) {
424 		/* Ensure that if the completion event arrives later,
425 		 * the seqno check in efx_mcdi_ev_cpl() will fail
426 		 */
427 		++mcdi->seqno;
428 		++mcdi->credits;
429 		rc = -ETIMEDOUT;
430 		hdr_len = 0;
431 		data_len = 0;
432 	} else {
433 		rc = mcdi->resprc;
434 		hdr_len = mcdi->resp_hdr_len;
435 		data_len = mcdi->resp_data_len;
436 	}
437 	spin_unlock(&mcdi->iface_lock);
438 
439 	/* Stop the timer.  In case the timer function is running, we
440 	 * must wait for it to return so that there is no possibility
441 	 * of it aborting the next request.
442 	 */
443 	if (!timeout)
444 		del_timer_sync(&mcdi->async_timer);
445 
446 	spin_lock(&mcdi->async_lock);
447 	async = list_first_entry(&mcdi->async_list,
448 				 struct efx_mcdi_async_param, list);
449 	list_del(&async->list);
450 	spin_unlock(&mcdi->async_lock);
451 
452 	outbuf = (efx_dword_t *)(async + 1);
453 	efx->type->mcdi_read_response(efx, outbuf, hdr_len,
454 				      min(async->outlen, data_len));
455 	if (!timeout && rc && !async->quiet) {
456 		err_len = min(sizeof(errbuf), data_len);
457 		efx->type->mcdi_read_response(efx, errbuf, hdr_len,
458 					      sizeof(errbuf));
459 		efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
460 				       err_len, rc);
461 	}
462 	async->complete(efx, async->cookie, rc, outbuf, data_len);
463 	kfree(async);
464 
465 	efx_mcdi_release(mcdi);
466 
467 	return true;
468 }
469 
470 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
471 			    unsigned int datalen, unsigned int mcdi_err)
472 {
473 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
474 	bool wake = false;
475 
476 	spin_lock(&mcdi->iface_lock);
477 
478 	if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
479 		if (mcdi->credits)
480 			/* The request has been cancelled */
481 			--mcdi->credits;
482 		else
483 			netif_err(efx, hw, efx->net_dev,
484 				  "MC response mismatch tx seq 0x%x rx "
485 				  "seq 0x%x\n", seqno, mcdi->seqno);
486 	} else {
487 		if (efx->type->mcdi_max_ver >= 2) {
488 			/* MCDI v2 responses don't fit in an event */
489 			efx_mcdi_read_response_header(efx);
490 		} else {
491 			mcdi->resprc = efx_mcdi_errno(mcdi_err);
492 			mcdi->resp_hdr_len = 4;
493 			mcdi->resp_data_len = datalen;
494 		}
495 
496 		wake = true;
497 	}
498 
499 	spin_unlock(&mcdi->iface_lock);
500 
501 	if (wake) {
502 		if (!efx_mcdi_complete_async(mcdi, false))
503 			(void) efx_mcdi_complete_sync(mcdi);
504 
505 		/* If the interface isn't RUNNING_ASYNC or
506 		 * RUNNING_SYNC then we've received a duplicate
507 		 * completion after we've already transitioned back to
508 		 * QUIESCENT. [A subsequent invocation would increment
509 		 * seqno, so would have failed the seqno check].
510 		 */
511 	}
512 }
513 
514 static void efx_mcdi_timeout_async(unsigned long context)
515 {
516 	struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
517 
518 	efx_mcdi_complete_async(mcdi, true);
519 }
520 
521 static int
522 efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
523 {
524 	if (efx->type->mcdi_max_ver < 0 ||
525 	     (efx->type->mcdi_max_ver < 2 &&
526 	      cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
527 		return -EINVAL;
528 
529 	if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
530 	    (efx->type->mcdi_max_ver < 2 &&
531 	     inlen > MCDI_CTL_SDU_LEN_MAX_V1))
532 		return -EMSGSIZE;
533 
534 	return 0;
535 }
536 
537 static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
538 				efx_dword_t *outbuf, size_t outlen,
539 				size_t *outlen_actual, bool quiet)
540 {
541 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
542 	MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
543 	int rc;
544 
545 	if (mcdi->mode == MCDI_MODE_POLL)
546 		rc = efx_mcdi_poll(efx);
547 	else
548 		rc = efx_mcdi_await_completion(efx);
549 
550 	if (rc != 0) {
551 		netif_err(efx, hw, efx->net_dev,
552 			  "MC command 0x%x inlen %d mode %d timed out\n",
553 			  cmd, (int)inlen, mcdi->mode);
554 
555 		if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
556 			netif_err(efx, hw, efx->net_dev,
557 				  "MCDI request was completed without an event\n");
558 			rc = 0;
559 		}
560 
561 		/* Close the race with efx_mcdi_ev_cpl() executing just too late
562 		 * and completing a request we've just cancelled, by ensuring
563 		 * that the seqno check therein fails.
564 		 */
565 		spin_lock_bh(&mcdi->iface_lock);
566 		++mcdi->seqno;
567 		++mcdi->credits;
568 		spin_unlock_bh(&mcdi->iface_lock);
569 	}
570 
571 	if (rc != 0) {
572 		if (outlen_actual)
573 			*outlen_actual = 0;
574 	} else {
575 		size_t hdr_len, data_len, err_len;
576 
577 		/* At the very least we need a memory barrier here to ensure
578 		 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
579 		 * a spurious efx_mcdi_ev_cpl() running concurrently by
580 		 * acquiring the iface_lock. */
581 		spin_lock_bh(&mcdi->iface_lock);
582 		rc = mcdi->resprc;
583 		hdr_len = mcdi->resp_hdr_len;
584 		data_len = mcdi->resp_data_len;
585 		err_len = min(sizeof(errbuf), data_len);
586 		spin_unlock_bh(&mcdi->iface_lock);
587 
588 		BUG_ON(rc > 0);
589 
590 		efx->type->mcdi_read_response(efx, outbuf, hdr_len,
591 					      min(outlen, data_len));
592 		if (outlen_actual)
593 			*outlen_actual = data_len;
594 
595 		efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
596 
597 		if (cmd == MC_CMD_REBOOT && rc == -EIO) {
598 			/* Don't reset if MC_CMD_REBOOT returns EIO */
599 		} else if (rc == -EIO || rc == -EINTR) {
600 			netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
601 				  -rc);
602 			efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
603 		} else if (rc && !quiet) {
604 			efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
605 					       rc);
606 		}
607 
608 		if (rc == -EIO || rc == -EINTR) {
609 			msleep(MCDI_STATUS_SLEEP_MS);
610 			efx_mcdi_poll_reboot(efx);
611 			mcdi->new_epoch = true;
612 		}
613 	}
614 
615 	efx_mcdi_release(mcdi);
616 	return rc;
617 }
618 
619 static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
620 			 const efx_dword_t *inbuf, size_t inlen,
621 			 efx_dword_t *outbuf, size_t outlen,
622 			 size_t *outlen_actual, bool quiet)
623 {
624 	int rc;
625 
626 	rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
627 	if (rc) {
628 		if (outlen_actual)
629 			*outlen_actual = 0;
630 		return rc;
631 	}
632 	return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
633 				    outlen_actual, quiet);
634 }
635 
636 int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
637 		 const efx_dword_t *inbuf, size_t inlen,
638 		 efx_dword_t *outbuf, size_t outlen,
639 		 size_t *outlen_actual)
640 {
641 	return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
642 			     outlen_actual, false);
643 }
644 
645 /* Normally, on receiving an error code in the MCDI response,
646  * efx_mcdi_rpc will log an error message containing (among other
647  * things) the raw error code, by means of efx_mcdi_display_error.
648  * This _quiet version suppresses that; if the caller wishes to log
649  * the error conditionally on the return code, it should call this
650  * function and is then responsible for calling efx_mcdi_display_error
651  * as needed.
652  */
653 int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
654 		       const efx_dword_t *inbuf, size_t inlen,
655 		       efx_dword_t *outbuf, size_t outlen,
656 		       size_t *outlen_actual)
657 {
658 	return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
659 			     outlen_actual, true);
660 }
661 
662 int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
663 		       const efx_dword_t *inbuf, size_t inlen)
664 {
665 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
666 	int rc;
667 
668 	rc = efx_mcdi_check_supported(efx, cmd, inlen);
669 	if (rc)
670 		return rc;
671 
672 	if (efx->mc_bist_for_other_fn)
673 		return -ENETDOWN;
674 
675 	efx_mcdi_acquire_sync(mcdi);
676 	efx_mcdi_send_request(efx, cmd, inbuf, inlen);
677 	return 0;
678 }
679 
680 static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
681 			       const efx_dword_t *inbuf, size_t inlen,
682 			       size_t outlen,
683 			       efx_mcdi_async_completer *complete,
684 			       unsigned long cookie, bool quiet)
685 {
686 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
687 	struct efx_mcdi_async_param *async;
688 	int rc;
689 
690 	rc = efx_mcdi_check_supported(efx, cmd, inlen);
691 	if (rc)
692 		return rc;
693 
694 	if (efx->mc_bist_for_other_fn)
695 		return -ENETDOWN;
696 
697 	async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
698 			GFP_ATOMIC);
699 	if (!async)
700 		return -ENOMEM;
701 
702 	async->cmd = cmd;
703 	async->inlen = inlen;
704 	async->outlen = outlen;
705 	async->quiet = quiet;
706 	async->complete = complete;
707 	async->cookie = cookie;
708 	memcpy(async + 1, inbuf, inlen);
709 
710 	spin_lock_bh(&mcdi->async_lock);
711 
712 	if (mcdi->mode == MCDI_MODE_EVENTS) {
713 		list_add_tail(&async->list, &mcdi->async_list);
714 
715 		/* If this is at the front of the queue, try to start it
716 		 * immediately
717 		 */
718 		if (mcdi->async_list.next == &async->list &&
719 		    efx_mcdi_acquire_async(mcdi)) {
720 			efx_mcdi_send_request(efx, cmd, inbuf, inlen);
721 			mod_timer(&mcdi->async_timer,
722 				  jiffies + MCDI_RPC_TIMEOUT);
723 		}
724 	} else {
725 		kfree(async);
726 		rc = -ENETDOWN;
727 	}
728 
729 	spin_unlock_bh(&mcdi->async_lock);
730 
731 	return rc;
732 }
733 
734 /**
735  * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
736  * @efx: NIC through which to issue the command
737  * @cmd: Command type number
738  * @inbuf: Command parameters
739  * @inlen: Length of command parameters, in bytes
740  * @outlen: Length to allocate for response buffer, in bytes
741  * @complete: Function to be called on completion or cancellation.
742  * @cookie: Arbitrary value to be passed to @complete.
743  *
744  * This function does not sleep and therefore may be called in atomic
745  * context.  It will fail if event queues are disabled or if MCDI
746  * event completions have been disabled due to an error.
747  *
748  * If it succeeds, the @complete function will be called exactly once
749  * in atomic context, when one of the following occurs:
750  * (a) the completion event is received (in NAPI context)
751  * (b) event queues are disabled (in the process that disables them)
752  * (c) the request times-out (in timer context)
753  */
754 int
755 efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
756 		   const efx_dword_t *inbuf, size_t inlen, size_t outlen,
757 		   efx_mcdi_async_completer *complete, unsigned long cookie)
758 {
759 	return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
760 				   cookie, false);
761 }
762 
763 int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
764 			     const efx_dword_t *inbuf, size_t inlen,
765 			     size_t outlen, efx_mcdi_async_completer *complete,
766 			     unsigned long cookie)
767 {
768 	return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
769 				   cookie, true);
770 }
771 
772 int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
773 			efx_dword_t *outbuf, size_t outlen,
774 			size_t *outlen_actual)
775 {
776 	return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
777 				    outlen_actual, false);
778 }
779 
780 int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
781 			      efx_dword_t *outbuf, size_t outlen,
782 			      size_t *outlen_actual)
783 {
784 	return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
785 				    outlen_actual, true);
786 }
787 
788 void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
789 			    size_t inlen, efx_dword_t *outbuf,
790 			    size_t outlen, int rc)
791 {
792 	int code = 0, err_arg = 0;
793 
794 	if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
795 		code = MCDI_DWORD(outbuf, ERR_CODE);
796 	if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
797 		err_arg = MCDI_DWORD(outbuf, ERR_ARG);
798 	netif_err(efx, hw, efx->net_dev,
799 		  "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n",
800 		  cmd, (int)inlen, rc, code, err_arg);
801 }
802 
803 /* Switch to polled MCDI completions.  This can be called in various
804  * error conditions with various locks held, so it must be lockless.
805  * Caller is responsible for flushing asynchronous requests later.
806  */
807 void efx_mcdi_mode_poll(struct efx_nic *efx)
808 {
809 	struct efx_mcdi_iface *mcdi;
810 
811 	if (!efx->mcdi)
812 		return;
813 
814 	mcdi = efx_mcdi(efx);
815 	if (mcdi->mode == MCDI_MODE_POLL)
816 		return;
817 
818 	/* We can switch from event completion to polled completion, because
819 	 * mcdi requests are always completed in shared memory. We do this by
820 	 * switching the mode to POLL'd then completing the request.
821 	 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
822 	 *
823 	 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
824 	 * which efx_mcdi_complete_sync() provides for us.
825 	 */
826 	mcdi->mode = MCDI_MODE_POLL;
827 
828 	efx_mcdi_complete_sync(mcdi);
829 }
830 
831 /* Flush any running or queued asynchronous requests, after event processing
832  * is stopped
833  */
834 void efx_mcdi_flush_async(struct efx_nic *efx)
835 {
836 	struct efx_mcdi_async_param *async, *next;
837 	struct efx_mcdi_iface *mcdi;
838 
839 	if (!efx->mcdi)
840 		return;
841 
842 	mcdi = efx_mcdi(efx);
843 
844 	/* We must be in polling mode so no more requests can be queued */
845 	BUG_ON(mcdi->mode != MCDI_MODE_POLL);
846 
847 	del_timer_sync(&mcdi->async_timer);
848 
849 	/* If a request is still running, make sure we give the MC
850 	 * time to complete it so that the response won't overwrite our
851 	 * next request.
852 	 */
853 	if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
854 		efx_mcdi_poll(efx);
855 		mcdi->state = MCDI_STATE_QUIESCENT;
856 	}
857 
858 	/* Nothing else will access the async list now, so it is safe
859 	 * to walk it without holding async_lock.  If we hold it while
860 	 * calling a completer then lockdep may warn that we have
861 	 * acquired locks in the wrong order.
862 	 */
863 	list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
864 		async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
865 		list_del(&async->list);
866 		kfree(async);
867 	}
868 }
869 
870 void efx_mcdi_mode_event(struct efx_nic *efx)
871 {
872 	struct efx_mcdi_iface *mcdi;
873 
874 	if (!efx->mcdi)
875 		return;
876 
877 	mcdi = efx_mcdi(efx);
878 
879 	if (mcdi->mode == MCDI_MODE_EVENTS)
880 		return;
881 
882 	/* We can't switch from polled to event completion in the middle of a
883 	 * request, because the completion method is specified in the request.
884 	 * So acquire the interface to serialise the requestors. We don't need
885 	 * to acquire the iface_lock to change the mode here, but we do need a
886 	 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
887 	 * efx_mcdi_acquire() provides.
888 	 */
889 	efx_mcdi_acquire_sync(mcdi);
890 	mcdi->mode = MCDI_MODE_EVENTS;
891 	efx_mcdi_release(mcdi);
892 }
893 
894 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
895 {
896 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
897 
898 	/* If there is an outstanding MCDI request, it has been terminated
899 	 * either by a BADASSERT or REBOOT event. If the mcdi interface is
900 	 * in polled mode, then do nothing because the MC reboot handler will
901 	 * set the header correctly. However, if the mcdi interface is waiting
902 	 * for a CMDDONE event it won't receive it [and since all MCDI events
903 	 * are sent to the same queue, we can't be racing with
904 	 * efx_mcdi_ev_cpl()]
905 	 *
906 	 * If there is an outstanding asynchronous request, we can't
907 	 * complete it now (efx_mcdi_complete() would deadlock).  The
908 	 * reset process will take care of this.
909 	 *
910 	 * There's a race here with efx_mcdi_send_request(), because
911 	 * we might receive a REBOOT event *before* the request has
912 	 * been copied out. In polled mode (during startup) this is
913 	 * irrelevant, because efx_mcdi_complete_sync() is ignored. In
914 	 * event mode, this condition is just an edge-case of
915 	 * receiving a REBOOT event after posting the MCDI
916 	 * request. Did the mc reboot before or after the copyout? The
917 	 * best we can do always is just return failure.
918 	 */
919 	spin_lock(&mcdi->iface_lock);
920 	if (efx_mcdi_complete_sync(mcdi)) {
921 		if (mcdi->mode == MCDI_MODE_EVENTS) {
922 			mcdi->resprc = rc;
923 			mcdi->resp_hdr_len = 0;
924 			mcdi->resp_data_len = 0;
925 			++mcdi->credits;
926 		}
927 	} else {
928 		int count;
929 
930 		/* Consume the status word since efx_mcdi_rpc_finish() won't */
931 		for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
932 			if (efx_mcdi_poll_reboot(efx))
933 				break;
934 			udelay(MCDI_STATUS_DELAY_US);
935 		}
936 		mcdi->new_epoch = true;
937 
938 		/* Nobody was waiting for an MCDI request, so trigger a reset */
939 		efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
940 	}
941 
942 	spin_unlock(&mcdi->iface_lock);
943 }
944 
945 /* The MC is going down in to BIST mode. set the BIST flag to block
946  * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
947  * (which doesn't actually execute a reset, it waits for the controlling
948  * function to reset it).
949  */
950 static void efx_mcdi_ev_bist(struct efx_nic *efx)
951 {
952 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
953 
954 	spin_lock(&mcdi->iface_lock);
955 	efx->mc_bist_for_other_fn = true;
956 	if (efx_mcdi_complete_sync(mcdi)) {
957 		if (mcdi->mode == MCDI_MODE_EVENTS) {
958 			mcdi->resprc = -EIO;
959 			mcdi->resp_hdr_len = 0;
960 			mcdi->resp_data_len = 0;
961 			++mcdi->credits;
962 		}
963 	}
964 	mcdi->new_epoch = true;
965 	efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
966 	spin_unlock(&mcdi->iface_lock);
967 }
968 
969 /* Called from  falcon_process_eventq for MCDI events */
970 void efx_mcdi_process_event(struct efx_channel *channel,
971 			    efx_qword_t *event)
972 {
973 	struct efx_nic *efx = channel->efx;
974 	int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
975 	u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
976 
977 	switch (code) {
978 	case MCDI_EVENT_CODE_BADSSERT:
979 		netif_err(efx, hw, efx->net_dev,
980 			  "MC watchdog or assertion failure at 0x%x\n", data);
981 		efx_mcdi_ev_death(efx, -EINTR);
982 		break;
983 
984 	case MCDI_EVENT_CODE_PMNOTICE:
985 		netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
986 		break;
987 
988 	case MCDI_EVENT_CODE_CMDDONE:
989 		efx_mcdi_ev_cpl(efx,
990 				MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
991 				MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
992 				MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
993 		break;
994 
995 	case MCDI_EVENT_CODE_LINKCHANGE:
996 		efx_mcdi_process_link_change(efx, event);
997 		break;
998 	case MCDI_EVENT_CODE_SENSOREVT:
999 		efx_mcdi_sensor_event(efx, event);
1000 		break;
1001 	case MCDI_EVENT_CODE_SCHEDERR:
1002 		netif_dbg(efx, hw, efx->net_dev,
1003 			  "MC Scheduler alert (0x%x)\n", data);
1004 		break;
1005 	case MCDI_EVENT_CODE_REBOOT:
1006 	case MCDI_EVENT_CODE_MC_REBOOT:
1007 		netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
1008 		efx_mcdi_ev_death(efx, -EIO);
1009 		break;
1010 	case MCDI_EVENT_CODE_MC_BIST:
1011 		netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1012 		efx_mcdi_ev_bist(efx);
1013 		break;
1014 	case MCDI_EVENT_CODE_MAC_STATS_DMA:
1015 		/* MAC stats are gather lazily.  We can ignore this. */
1016 		break;
1017 	case MCDI_EVENT_CODE_FLR:
1018 		efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
1019 		break;
1020 	case MCDI_EVENT_CODE_PTP_RX:
1021 	case MCDI_EVENT_CODE_PTP_FAULT:
1022 	case MCDI_EVENT_CODE_PTP_PPS:
1023 		efx_ptp_event(efx, event);
1024 		break;
1025 	case MCDI_EVENT_CODE_PTP_TIME:
1026 		efx_time_sync_event(channel, event);
1027 		break;
1028 	case MCDI_EVENT_CODE_TX_FLUSH:
1029 	case MCDI_EVENT_CODE_RX_FLUSH:
1030 		/* Two flush events will be sent: one to the same event
1031 		 * queue as completions, and one to event queue 0.
1032 		 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
1033 		 * flag will be set, and we should ignore the event
1034 		 * because we want to wait for all completions.
1035 		 */
1036 		BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1037 			     MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1038 		if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1039 			efx_ef10_handle_drain_event(efx);
1040 		break;
1041 	case MCDI_EVENT_CODE_TX_ERR:
1042 	case MCDI_EVENT_CODE_RX_ERR:
1043 		netif_err(efx, hw, efx->net_dev,
1044 			  "%s DMA error (event: "EFX_QWORD_FMT")\n",
1045 			  code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1046 			  EFX_QWORD_VAL(*event));
1047 		efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1048 		break;
1049 	default:
1050 		netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
1051 			  code);
1052 	}
1053 }
1054 
1055 /**************************************************************************
1056  *
1057  * Specific request functions
1058  *
1059  **************************************************************************
1060  */
1061 
1062 void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
1063 {
1064 	MCDI_DECLARE_BUF(outbuf,
1065 			 max(MC_CMD_GET_VERSION_OUT_LEN,
1066 			     MC_CMD_GET_CAPABILITIES_OUT_LEN));
1067 	size_t outlength;
1068 	const __le16 *ver_words;
1069 	size_t offset;
1070 	int rc;
1071 
1072 	BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
1073 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1074 			  outbuf, sizeof(outbuf), &outlength);
1075 	if (rc)
1076 		goto fail;
1077 	if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
1078 		rc = -EIO;
1079 		goto fail;
1080 	}
1081 
1082 	ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
1083 	offset = snprintf(buf, len, "%u.%u.%u.%u",
1084 			  le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
1085 			  le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
1086 
1087 	/* EF10 may have multiple datapath firmware variants within a
1088 	 * single version.  Report which variants are running.
1089 	 */
1090 	if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
1091 		BUILD_BUG_ON(MC_CMD_GET_CAPABILITIES_IN_LEN != 0);
1092 		rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
1093 				  outbuf, sizeof(outbuf), &outlength);
1094 		if (rc || outlength < MC_CMD_GET_CAPABILITIES_OUT_LEN)
1095 			offset += snprintf(
1096 				buf + offset, len - offset, " rx? tx?");
1097 		else
1098 			offset += snprintf(
1099 				buf + offset, len - offset, " rx%x tx%x",
1100 				MCDI_WORD(outbuf,
1101 					  GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID),
1102 				MCDI_WORD(outbuf,
1103 					  GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID));
1104 
1105 		/* It's theoretically possible for the string to exceed 31
1106 		 * characters, though in practice the first three version
1107 		 * components are short enough that this doesn't happen.
1108 		 */
1109 		if (WARN_ON(offset >= len))
1110 			buf[0] = 0;
1111 	}
1112 
1113 	return;
1114 
1115 fail:
1116 	netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1117 	buf[0] = 0;
1118 }
1119 
1120 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1121 			       bool *was_attached)
1122 {
1123 	MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
1124 	MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1125 	size_t outlen;
1126 	int rc;
1127 
1128 	MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1129 		       driver_operating ? 1 : 0);
1130 	MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
1131 	MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
1132 
1133 	rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1134 			  outbuf, sizeof(outbuf), &outlen);
1135 	if (rc)
1136 		goto fail;
1137 	if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1138 		rc = -EIO;
1139 		goto fail;
1140 	}
1141 
1142 	if (driver_operating) {
1143 		if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
1144 			efx->mcdi->fn_flags =
1145 				MCDI_DWORD(outbuf,
1146 					   DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
1147 		} else {
1148 			/* Synthesise flags for Siena */
1149 			efx->mcdi->fn_flags =
1150 				1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1151 				1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
1152 				(efx_port_num(efx) == 0) <<
1153 				MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
1154 		}
1155 	}
1156 
1157 	/* We currently assume we have control of the external link
1158 	 * and are completely trusted by firmware.  Abort probing
1159 	 * if that's not true for this function.
1160 	 */
1161 	if (driver_operating &&
1162 	    (efx->mcdi->fn_flags &
1163 	     (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1164 	      1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) !=
1165 	    (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1166 	     1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) {
1167 		netif_err(efx, probe, efx->net_dev,
1168 			  "This driver version only supports one function per port\n");
1169 		return -ENODEV;
1170 	}
1171 
1172 	if (was_attached != NULL)
1173 		*was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1174 	return 0;
1175 
1176 fail:
1177 	netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1178 	return rc;
1179 }
1180 
1181 int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
1182 			   u16 *fw_subtype_list, u32 *capabilities)
1183 {
1184 	MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
1185 	size_t outlen, i;
1186 	int port_num = efx_port_num(efx);
1187 	int rc;
1188 
1189 	BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1190 	/* we need __aligned(2) for ether_addr_copy */
1191 	BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
1192 	BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
1193 
1194 	rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1195 			  outbuf, sizeof(outbuf), &outlen);
1196 	if (rc)
1197 		goto fail;
1198 
1199 	if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1200 		rc = -EIO;
1201 		goto fail;
1202 	}
1203 
1204 	if (mac_address)
1205 		ether_addr_copy(mac_address,
1206 				port_num ?
1207 				MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1208 				MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
1209 	if (fw_subtype_list) {
1210 		for (i = 0;
1211 		     i < MCDI_VAR_ARRAY_LEN(outlen,
1212 					    GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1213 		     i++)
1214 			fw_subtype_list[i] = MCDI_ARRAY_WORD(
1215 				outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1216 		for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1217 			fw_subtype_list[i] = 0;
1218 	}
1219 	if (capabilities) {
1220 		if (port_num)
1221 			*capabilities = MCDI_DWORD(outbuf,
1222 					GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1223 		else
1224 			*capabilities = MCDI_DWORD(outbuf,
1225 					GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1226 	}
1227 
1228 	return 0;
1229 
1230 fail:
1231 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1232 		  __func__, rc, (int)outlen);
1233 
1234 	return rc;
1235 }
1236 
1237 int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1238 {
1239 	MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
1240 	u32 dest = 0;
1241 	int rc;
1242 
1243 	if (uart)
1244 		dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1245 	if (evq)
1246 		dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1247 
1248 	MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1249 	MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1250 
1251 	BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1252 
1253 	rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1254 			  NULL, 0, NULL);
1255 	return rc;
1256 }
1257 
1258 int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1259 {
1260 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
1261 	size_t outlen;
1262 	int rc;
1263 
1264 	BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1265 
1266 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1267 			  outbuf, sizeof(outbuf), &outlen);
1268 	if (rc)
1269 		goto fail;
1270 	if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1271 		rc = -EIO;
1272 		goto fail;
1273 	}
1274 
1275 	*nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1276 	return 0;
1277 
1278 fail:
1279 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1280 		  __func__, rc);
1281 	return rc;
1282 }
1283 
1284 int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1285 			size_t *size_out, size_t *erase_size_out,
1286 			bool *protected_out)
1287 {
1288 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1289 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
1290 	size_t outlen;
1291 	int rc;
1292 
1293 	MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1294 
1295 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1296 			  outbuf, sizeof(outbuf), &outlen);
1297 	if (rc)
1298 		goto fail;
1299 	if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1300 		rc = -EIO;
1301 		goto fail;
1302 	}
1303 
1304 	*size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1305 	*erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1306 	*protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
1307 				(1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
1308 	return 0;
1309 
1310 fail:
1311 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1312 	return rc;
1313 }
1314 
1315 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1316 {
1317 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1318 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
1319 	int rc;
1320 
1321 	MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1322 
1323 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1324 			  outbuf, sizeof(outbuf), NULL);
1325 	if (rc)
1326 		return rc;
1327 
1328 	switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1329 	case MC_CMD_NVRAM_TEST_PASS:
1330 	case MC_CMD_NVRAM_TEST_NOTSUPP:
1331 		return 0;
1332 	default:
1333 		return -EIO;
1334 	}
1335 }
1336 
1337 int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1338 {
1339 	u32 nvram_types;
1340 	unsigned int type;
1341 	int rc;
1342 
1343 	rc = efx_mcdi_nvram_types(efx, &nvram_types);
1344 	if (rc)
1345 		goto fail1;
1346 
1347 	type = 0;
1348 	while (nvram_types != 0) {
1349 		if (nvram_types & 1) {
1350 			rc = efx_mcdi_nvram_test(efx, type);
1351 			if (rc)
1352 				goto fail2;
1353 		}
1354 		type++;
1355 		nvram_types >>= 1;
1356 	}
1357 
1358 	return 0;
1359 
1360 fail2:
1361 	netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1362 		  __func__, type);
1363 fail1:
1364 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1365 	return rc;
1366 }
1367 
1368 static int efx_mcdi_read_assertion(struct efx_nic *efx)
1369 {
1370 	MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
1371 	MCDI_DECLARE_BUF_OUT_OR_ERR(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
1372 	unsigned int flags, index;
1373 	const char *reason;
1374 	size_t outlen;
1375 	int retry;
1376 	int rc;
1377 
1378 	/* Attempt to read any stored assertion state before we reboot
1379 	 * the mcfw out of the assertion handler. Retry twice, once
1380 	 * because a boot-time assertion might cause this command to fail
1381 	 * with EINTR. And once again because GET_ASSERTS can race with
1382 	 * MC_CMD_REBOOT running on the other port. */
1383 	retry = 2;
1384 	do {
1385 		MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1386 		rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1387 					inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1388 					outbuf, sizeof(outbuf), &outlen);
1389 	} while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1390 
1391 	if (rc) {
1392 		efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1393 				       MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1394 				       outlen, rc);
1395 		return rc;
1396 	}
1397 	if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
1398 		return -EIO;
1399 
1400 	/* Print out any recorded assertion state */
1401 	flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1402 	if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1403 		return 0;
1404 
1405 	reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1406 		? "system-level assertion"
1407 		: (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1408 		? "thread-level assertion"
1409 		: (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1410 		? "watchdog reset"
1411 		: "unknown assertion";
1412 	netif_err(efx, hw, efx->net_dev,
1413 		  "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1414 		  MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1415 		  MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1416 
1417 	/* Print out the registers */
1418 	for (index = 0;
1419 	     index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1420 	     index++)
1421 		netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1422 			  1 + index,
1423 			  MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1424 					   index));
1425 
1426 	return 0;
1427 }
1428 
1429 static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1430 {
1431 	MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1432 
1433 	/* If the MC is running debug firmware, it might now be
1434 	 * waiting for a debugger to attach, but we just want it to
1435 	 * reboot.  We set a flag that makes the command a no-op if it
1436 	 * has already done so.  We don't know what return code to
1437 	 * expect (0 or -EIO), so ignore it.
1438 	 */
1439 	BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1440 	MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1441 		       MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1442 	(void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1443 			    NULL, 0, NULL);
1444 }
1445 
1446 int efx_mcdi_handle_assertion(struct efx_nic *efx)
1447 {
1448 	int rc;
1449 
1450 	rc = efx_mcdi_read_assertion(efx);
1451 	if (rc)
1452 		return rc;
1453 
1454 	efx_mcdi_exit_assertion(efx);
1455 
1456 	return 0;
1457 }
1458 
1459 void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1460 {
1461 	MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
1462 	int rc;
1463 
1464 	BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1465 	BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1466 	BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1467 
1468 	BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1469 
1470 	MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1471 
1472 	rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1473 			  NULL, 0, NULL);
1474 }
1475 
1476 static int efx_mcdi_reset_func(struct efx_nic *efx)
1477 {
1478 	MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
1479 	int rc;
1480 
1481 	BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
1482 	MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
1483 			      ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
1484 	rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
1485 			  NULL, 0, NULL);
1486 	return rc;
1487 }
1488 
1489 static int efx_mcdi_reset_mc(struct efx_nic *efx)
1490 {
1491 	MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1492 	int rc;
1493 
1494 	BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1495 	MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1496 	rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1497 			  NULL, 0, NULL);
1498 	/* White is black, and up is down */
1499 	if (rc == -EIO)
1500 		return 0;
1501 	if (rc == 0)
1502 		rc = -EIO;
1503 	return rc;
1504 }
1505 
1506 enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1507 {
1508 	return RESET_TYPE_RECOVER_OR_ALL;
1509 }
1510 
1511 int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1512 {
1513 	int rc;
1514 
1515 	/* Recover from a failed assertion pre-reset */
1516 	rc = efx_mcdi_handle_assertion(efx);
1517 	if (rc)
1518 		return rc;
1519 
1520 	if (method == RESET_TYPE_WORLD)
1521 		return efx_mcdi_reset_mc(efx);
1522 	else
1523 		return efx_mcdi_reset_func(efx);
1524 }
1525 
1526 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1527 				   const u8 *mac, int *id_out)
1528 {
1529 	MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1530 	MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
1531 	size_t outlen;
1532 	int rc;
1533 
1534 	MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1535 	MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1536 		       MC_CMD_FILTER_MODE_SIMPLE);
1537 	ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
1538 
1539 	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1540 			  outbuf, sizeof(outbuf), &outlen);
1541 	if (rc)
1542 		goto fail;
1543 
1544 	if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1545 		rc = -EIO;
1546 		goto fail;
1547 	}
1548 
1549 	*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1550 
1551 	return 0;
1552 
1553 fail:
1554 	*id_out = -1;
1555 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1556 	return rc;
1557 
1558 }
1559 
1560 
1561 int
1562 efx_mcdi_wol_filter_set_magic(struct efx_nic *efx,  const u8 *mac, int *id_out)
1563 {
1564 	return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1565 }
1566 
1567 
1568 int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1569 {
1570 	MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
1571 	size_t outlen;
1572 	int rc;
1573 
1574 	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1575 			  outbuf, sizeof(outbuf), &outlen);
1576 	if (rc)
1577 		goto fail;
1578 
1579 	if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
1580 		rc = -EIO;
1581 		goto fail;
1582 	}
1583 
1584 	*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1585 
1586 	return 0;
1587 
1588 fail:
1589 	*id_out = -1;
1590 	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1591 	return rc;
1592 }
1593 
1594 
1595 int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1596 {
1597 	MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
1598 	int rc;
1599 
1600 	MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1601 
1602 	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1603 			  NULL, 0, NULL);
1604 	return rc;
1605 }
1606 
1607 int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1608 {
1609 	struct efx_channel *channel;
1610 	struct efx_rx_queue *rx_queue;
1611 	MCDI_DECLARE_BUF(inbuf,
1612 			 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
1613 	int rc, count;
1614 
1615 	BUILD_BUG_ON(EFX_MAX_CHANNELS >
1616 		     MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1617 
1618 	count = 0;
1619 	efx_for_each_channel(channel, efx) {
1620 		efx_for_each_channel_rx_queue(rx_queue, channel) {
1621 			if (rx_queue->flush_pending) {
1622 				rx_queue->flush_pending = false;
1623 				atomic_dec(&efx->rxq_flush_pending);
1624 				MCDI_SET_ARRAY_DWORD(
1625 					inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1626 					count, efx_rx_queue_index(rx_queue));
1627 				count++;
1628 			}
1629 		}
1630 	}
1631 
1632 	rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1633 			  MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
1634 	WARN_ON(rc < 0);
1635 
1636 	return rc;
1637 }
1638 
1639 int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1640 {
1641 	int rc;
1642 
1643 	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1644 	return rc;
1645 }
1646 
1647 int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
1648 {
1649 	MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
1650 
1651 	BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
1652 	MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
1653 	MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
1654 	return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
1655 			    NULL, 0, NULL);
1656 }
1657 
1658 #ifdef CONFIG_SFC_MTD
1659 
1660 #define EFX_MCDI_NVRAM_LEN_MAX 128
1661 
1662 static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
1663 {
1664 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
1665 	int rc;
1666 
1667 	MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
1668 
1669 	BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
1670 
1671 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
1672 			  NULL, 0, NULL);
1673 	return rc;
1674 }
1675 
1676 static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
1677 			       loff_t offset, u8 *buffer, size_t length)
1678 {
1679 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
1680 	MCDI_DECLARE_BUF(outbuf,
1681 			 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1682 	size_t outlen;
1683 	int rc;
1684 
1685 	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
1686 	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
1687 	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
1688 
1689 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
1690 			  outbuf, sizeof(outbuf), &outlen);
1691 	if (rc)
1692 		return rc;
1693 
1694 	memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
1695 	return 0;
1696 }
1697 
1698 static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
1699 				loff_t offset, const u8 *buffer, size_t length)
1700 {
1701 	MCDI_DECLARE_BUF(inbuf,
1702 			 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1703 	int rc;
1704 
1705 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
1706 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
1707 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
1708 	memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
1709 
1710 	BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
1711 
1712 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
1713 			  ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
1714 			  NULL, 0, NULL);
1715 	return rc;
1716 }
1717 
1718 static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
1719 				loff_t offset, size_t length)
1720 {
1721 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
1722 	int rc;
1723 
1724 	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
1725 	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
1726 	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
1727 
1728 	BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
1729 
1730 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
1731 			  NULL, 0, NULL);
1732 	return rc;
1733 }
1734 
1735 static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
1736 {
1737 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
1738 	int rc;
1739 
1740 	MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
1741 
1742 	BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
1743 
1744 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
1745 			  NULL, 0, NULL);
1746 	return rc;
1747 }
1748 
1749 int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
1750 		      size_t len, size_t *retlen, u8 *buffer)
1751 {
1752 	struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1753 	struct efx_nic *efx = mtd->priv;
1754 	loff_t offset = start;
1755 	loff_t end = min_t(loff_t, start + len, mtd->size);
1756 	size_t chunk;
1757 	int rc = 0;
1758 
1759 	while (offset < end) {
1760 		chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1761 		rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
1762 					 buffer, chunk);
1763 		if (rc)
1764 			goto out;
1765 		offset += chunk;
1766 		buffer += chunk;
1767 	}
1768 out:
1769 	*retlen = offset - start;
1770 	return rc;
1771 }
1772 
1773 int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
1774 {
1775 	struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1776 	struct efx_nic *efx = mtd->priv;
1777 	loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
1778 	loff_t end = min_t(loff_t, start + len, mtd->size);
1779 	size_t chunk = part->common.mtd.erasesize;
1780 	int rc = 0;
1781 
1782 	if (!part->updating) {
1783 		rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1784 		if (rc)
1785 			goto out;
1786 		part->updating = true;
1787 	}
1788 
1789 	/* The MCDI interface can in fact do multiple erase blocks at once;
1790 	 * but erasing may be slow, so we make multiple calls here to avoid
1791 	 * tripping the MCDI RPC timeout. */
1792 	while (offset < end) {
1793 		rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
1794 					  chunk);
1795 		if (rc)
1796 			goto out;
1797 		offset += chunk;
1798 	}
1799 out:
1800 	return rc;
1801 }
1802 
1803 int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
1804 		       size_t len, size_t *retlen, const u8 *buffer)
1805 {
1806 	struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1807 	struct efx_nic *efx = mtd->priv;
1808 	loff_t offset = start;
1809 	loff_t end = min_t(loff_t, start + len, mtd->size);
1810 	size_t chunk;
1811 	int rc = 0;
1812 
1813 	if (!part->updating) {
1814 		rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1815 		if (rc)
1816 			goto out;
1817 		part->updating = true;
1818 	}
1819 
1820 	while (offset < end) {
1821 		chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1822 		rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
1823 					  buffer, chunk);
1824 		if (rc)
1825 			goto out;
1826 		offset += chunk;
1827 		buffer += chunk;
1828 	}
1829 out:
1830 	*retlen = offset - start;
1831 	return rc;
1832 }
1833 
1834 int efx_mcdi_mtd_sync(struct mtd_info *mtd)
1835 {
1836 	struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1837 	struct efx_nic *efx = mtd->priv;
1838 	int rc = 0;
1839 
1840 	if (part->updating) {
1841 		part->updating = false;
1842 		rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
1843 	}
1844 
1845 	return rc;
1846 }
1847 
1848 void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
1849 {
1850 	struct efx_mcdi_mtd_partition *mcdi_part =
1851 		container_of(part, struct efx_mcdi_mtd_partition, common);
1852 	struct efx_nic *efx = part->mtd.priv;
1853 
1854 	snprintf(part->name, sizeof(part->name), "%s %s:%02x",
1855 		 efx->name, part->type_name, mcdi_part->fw_subtype);
1856 }
1857 
1858 #endif /* CONFIG_SFC_MTD */
1859