1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 25a6681e2SEdward Cree /**************************************************************************** 35a6681e2SEdward Cree * Driver for Solarflare network controllers and boards 45a6681e2SEdward Cree * Copyright 2007-2010 Solarflare Communications Inc. 55a6681e2SEdward Cree */ 65a6681e2SEdward Cree 75a6681e2SEdward Cree #ifndef EF4_PHY_H 85a6681e2SEdward Cree #define EF4_PHY_H 95a6681e2SEdward Cree 105a6681e2SEdward Cree /**************************************************************************** 115a6681e2SEdward Cree * 10Xpress (SFX7101) PHY 125a6681e2SEdward Cree */ 135a6681e2SEdward Cree extern const struct ef4_phy_operations falcon_sfx7101_phy_ops; 145a6681e2SEdward Cree 155a6681e2SEdward Cree void tenxpress_set_id_led(struct ef4_nic *efx, enum ef4_led_mode mode); 165a6681e2SEdward Cree 175a6681e2SEdward Cree /**************************************************************************** 185a6681e2SEdward Cree * AMCC/Quake QT202x PHYs 195a6681e2SEdward Cree */ 205a6681e2SEdward Cree extern const struct ef4_phy_operations falcon_qt202x_phy_ops; 215a6681e2SEdward Cree 225a6681e2SEdward Cree /* These PHYs provide various H/W control states for LEDs */ 235a6681e2SEdward Cree #define QUAKE_LED_LINK_INVAL (0) 245a6681e2SEdward Cree #define QUAKE_LED_LINK_STAT (1) 255a6681e2SEdward Cree #define QUAKE_LED_LINK_ACT (2) 265a6681e2SEdward Cree #define QUAKE_LED_LINK_ACTSTAT (3) 275a6681e2SEdward Cree #define QUAKE_LED_OFF (4) 285a6681e2SEdward Cree #define QUAKE_LED_ON (5) 295a6681e2SEdward Cree #define QUAKE_LED_LINK_INPUT (6) /* Pin is an input. */ 305a6681e2SEdward Cree /* What link the LED tracks */ 315a6681e2SEdward Cree #define QUAKE_LED_TXLINK (0) 325a6681e2SEdward Cree #define QUAKE_LED_RXLINK (8) 335a6681e2SEdward Cree 345a6681e2SEdward Cree void falcon_qt202x_set_led(struct ef4_nic *p, int led, int state); 355a6681e2SEdward Cree 365a6681e2SEdward Cree /**************************************************************************** 375a6681e2SEdward Cree * Transwitch CX4 retimer 385a6681e2SEdward Cree */ 395a6681e2SEdward Cree extern const struct ef4_phy_operations falcon_txc_phy_ops; 405a6681e2SEdward Cree 415a6681e2SEdward Cree #define TXC_GPIO_DIR_INPUT 0 425a6681e2SEdward Cree #define TXC_GPIO_DIR_OUTPUT 1 435a6681e2SEdward Cree 445a6681e2SEdward Cree void falcon_txc_set_gpio_dir(struct ef4_nic *efx, int pin, int dir); 455a6681e2SEdward Cree void falcon_txc_set_gpio_val(struct ef4_nic *efx, int pin, int val); 465a6681e2SEdward Cree 475a6681e2SEdward Cree #endif 48