1 /* 2 * linux/drivers/acorn/net/ether3.c 3 * 4 * Copyright (C) 1995-2000 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * SEEQ nq8005 ethernet driver for Acorn/ANT Ether3 card 11 * for Acorn machines 12 * 13 * By Russell King, with some suggestions from borris@ant.co.uk 14 * 15 * Changelog: 16 * 1.04 RMK 29/02/1996 Won't pass packets that are from our ethernet 17 * address up to the higher levels - they're 18 * silently ignored. I/F can now be put into 19 * multicast mode. Receiver routine optimised. 20 * 1.05 RMK 30/02/1996 Now claims interrupt at open when part of 21 * the kernel rather than when a module. 22 * 1.06 RMK 02/03/1996 Various code cleanups 23 * 1.07 RMK 13/10/1996 Optimised interrupt routine and transmit 24 * routines. 25 * 1.08 RMK 14/10/1996 Fixed problem with too many packets, 26 * prevented the kernel message about dropped 27 * packets appearing too many times a second. 28 * Now does not disable all IRQs, only the IRQ 29 * used by this card. 30 * 1.09 RMK 10/11/1996 Only enables TX irq when buffer space is low, 31 * but we still service the TX queue if we get a 32 * RX interrupt. 33 * 1.10 RMK 15/07/1997 Fixed autoprobing of NQ8004. 34 * 1.11 RMK 16/11/1997 Fixed autoprobing of NQ8005A. 35 * 1.12 RMK 31/12/1997 Removed reference to dev_tint for Linux 2.1. 36 * RMK 27/06/1998 Changed asm/delay.h to linux/delay.h. 37 * 1.13 RMK 29/06/1998 Fixed problem with transmission of packets. 38 * Chip seems to have a bug in, whereby if the 39 * packet starts two bytes from the end of the 40 * buffer, it corrupts the receiver chain, and 41 * never updates the transmit status correctly. 42 * 1.14 RMK 07/01/1998 Added initial code for ETHERB addressing. 43 * 1.15 RMK 30/04/1999 More fixes to the transmit routine for buggy 44 * hardware. 45 * 1.16 RMK 10/02/2000 Updated for 2.3.43 46 * 1.17 RMK 13/05/2000 Updated for 2.3.99-pre8 47 */ 48 49 #include <linux/module.h> 50 #include <linux/kernel.h> 51 #include <linux/types.h> 52 #include <linux/fcntl.h> 53 #include <linux/interrupt.h> 54 #include <linux/ioport.h> 55 #include <linux/in.h> 56 #include <linux/slab.h> 57 #include <linux/string.h> 58 #include <linux/errno.h> 59 #include <linux/netdevice.h> 60 #include <linux/etherdevice.h> 61 #include <linux/skbuff.h> 62 #include <linux/device.h> 63 #include <linux/init.h> 64 #include <linux/delay.h> 65 #include <linux/bitops.h> 66 67 #include <asm/ecard.h> 68 #include <asm/io.h> 69 70 static char version[] = "ether3 ethernet driver (c) 1995-2000 R.M.King v1.17\n"; 71 72 #include "ether3.h" 73 74 static unsigned int net_debug = NET_DEBUG; 75 76 static void ether3_setmulticastlist(struct net_device *dev); 77 static int ether3_rx(struct net_device *dev, unsigned int maxcnt); 78 static void ether3_tx(struct net_device *dev); 79 static int ether3_open (struct net_device *dev); 80 static int ether3_sendpacket (struct sk_buff *skb, struct net_device *dev); 81 static irqreturn_t ether3_interrupt (int irq, void *dev_id); 82 static int ether3_close (struct net_device *dev); 83 static void ether3_setmulticastlist (struct net_device *dev); 84 static void ether3_timeout(struct net_device *dev); 85 86 #define BUS_16 2 87 #define BUS_8 1 88 #define BUS_UNKNOWN 0 89 90 /* --------------------------------------------------------------------------- */ 91 92 typedef enum { 93 buffer_write, 94 buffer_read 95 } buffer_rw_t; 96 97 /* 98 * ether3 read/write. Slow things down a bit... 99 * The SEEQ8005 doesn't like us writing to its registers 100 * too quickly. 101 */ 102 static inline void ether3_outb(int v, void __iomem *r) 103 { 104 writeb(v, r); 105 udelay(1); 106 } 107 108 static inline void ether3_outw(int v, void __iomem *r) 109 { 110 writew(v, r); 111 udelay(1); 112 } 113 #define ether3_inb(r) ({ unsigned int __v = readb((r)); udelay(1); __v; }) 114 #define ether3_inw(r) ({ unsigned int __v = readw((r)); udelay(1); __v; }) 115 116 static int 117 ether3_setbuffer(struct net_device *dev, buffer_rw_t read, int start) 118 { 119 int timeout = 1000; 120 121 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); 122 ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND); 123 124 while ((ether3_inw(REG_STATUS) & STAT_FIFOEMPTY) == 0) { 125 if (!timeout--) { 126 printk("%s: setbuffer broken\n", dev->name); 127 priv(dev)->broken = 1; 128 return 1; 129 } 130 udelay(1); 131 } 132 133 if (read == buffer_read) { 134 ether3_outw(start, REG_DMAADDR); 135 ether3_outw(priv(dev)->regs.command | CMD_FIFOREAD, REG_COMMAND); 136 } else { 137 ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND); 138 ether3_outw(start, REG_DMAADDR); 139 } 140 return 0; 141 } 142 143 /* 144 * write data to the buffer memory 145 */ 146 #define ether3_writebuffer(dev,data,length) \ 147 writesw(REG_BUFWIN, (data), (length) >> 1) 148 149 #define ether3_writeword(dev,data) \ 150 writew((data), REG_BUFWIN) 151 152 #define ether3_writelong(dev,data) { \ 153 void __iomem *reg_bufwin = REG_BUFWIN; \ 154 writew((data), reg_bufwin); \ 155 writew((data) >> 16, reg_bufwin); \ 156 } 157 158 /* 159 * read data from the buffer memory 160 */ 161 #define ether3_readbuffer(dev,data,length) \ 162 readsw(REG_BUFWIN, (data), (length) >> 1) 163 164 #define ether3_readword(dev) \ 165 readw(REG_BUFWIN) 166 167 #define ether3_readlong(dev) \ 168 readw(REG_BUFWIN) | (readw(REG_BUFWIN) << 16) 169 170 /* 171 * Switch LED off... 172 */ 173 static void ether3_ledoff(unsigned long data) 174 { 175 struct net_device *dev = (struct net_device *)data; 176 ether3_outw(priv(dev)->regs.config2 |= CFG2_CTRLO, REG_CONFIG2); 177 } 178 179 /* 180 * switch LED on... 181 */ 182 static inline void ether3_ledon(struct net_device *dev) 183 { 184 del_timer(&priv(dev)->timer); 185 priv(dev)->timer.expires = jiffies + HZ / 50; /* leave on for 1/50th second */ 186 priv(dev)->timer.data = (unsigned long)dev; 187 priv(dev)->timer.function = ether3_ledoff; 188 add_timer(&priv(dev)->timer); 189 if (priv(dev)->regs.config2 & CFG2_CTRLO) 190 ether3_outw(priv(dev)->regs.config2 &= ~CFG2_CTRLO, REG_CONFIG2); 191 } 192 193 /* 194 * Read the ethernet address string from the on board rom. 195 * This is an ascii string!!! 196 */ 197 static int 198 ether3_addr(char *addr, struct expansion_card *ec) 199 { 200 struct in_chunk_dir cd; 201 char *s; 202 203 if (ecard_readchunk(&cd, ec, 0xf5, 0) && (s = strchr(cd.d.string, '('))) { 204 int i; 205 for (i = 0; i<6; i++) { 206 addr[i] = simple_strtoul(s + 1, &s, 0x10); 207 if (*s != (i==5?')' : ':' )) 208 break; 209 } 210 if (i == 6) 211 return 0; 212 } 213 /* I wonder if we should even let the user continue in this case 214 * - no, it would be better to disable the device 215 */ 216 printk(KERN_ERR "ether3: Couldn't read a valid MAC address from card.\n"); 217 return -ENODEV; 218 } 219 220 /* --------------------------------------------------------------------------- */ 221 222 static int 223 ether3_ramtest(struct net_device *dev, unsigned char byte) 224 { 225 unsigned char *buffer = kmalloc(RX_END, GFP_KERNEL); 226 int i,ret = 0; 227 int max_errors = 4; 228 int bad = -1; 229 230 if (!buffer) 231 return 1; 232 233 memset(buffer, byte, RX_END); 234 ether3_setbuffer(dev, buffer_write, 0); 235 ether3_writebuffer(dev, buffer, TX_END); 236 ether3_setbuffer(dev, buffer_write, RX_START); 237 ether3_writebuffer(dev, buffer + RX_START, RX_LEN); 238 memset(buffer, byte ^ 0xff, RX_END); 239 ether3_setbuffer(dev, buffer_read, 0); 240 ether3_readbuffer(dev, buffer, TX_END); 241 ether3_setbuffer(dev, buffer_read, RX_START); 242 ether3_readbuffer(dev, buffer + RX_START, RX_LEN); 243 244 for (i = 0; i < RX_END; i++) { 245 if (buffer[i] != byte) { 246 if (max_errors > 0 && bad != buffer[i]) { 247 printk("%s: RAM failed with (%02X instead of %02X) at 0x%04X", 248 dev->name, buffer[i], byte, i); 249 ret = 2; 250 max_errors--; 251 bad = i; 252 } 253 } else { 254 if (bad != -1) { 255 if (bad != i - 1) 256 printk(" - 0x%04X\n", i - 1); 257 printk("\n"); 258 bad = -1; 259 } 260 } 261 } 262 if (bad != -1) 263 printk(" - 0xffff\n"); 264 kfree(buffer); 265 266 return ret; 267 } 268 269 /* ------------------------------------------------------------------------------- */ 270 271 static int ether3_init_2(struct net_device *dev) 272 { 273 int i; 274 275 priv(dev)->regs.config1 = CFG1_RECVCOMPSTAT0|CFG1_DMABURST8; 276 priv(dev)->regs.config2 = CFG2_CTRLO|CFG2_RECVCRC|CFG2_ERRENCRC; 277 priv(dev)->regs.command = 0; 278 279 /* 280 * Set up our hardware address 281 */ 282 ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1); 283 for (i = 0; i < 6; i++) 284 ether3_outb(dev->dev_addr[i], REG_BUFWIN); 285 286 if (dev->flags & IFF_PROMISC) 287 priv(dev)->regs.config1 |= CFG1_RECVPROMISC; 288 else if (dev->flags & IFF_MULTICAST) 289 priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI; 290 else 291 priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD; 292 293 /* 294 * There is a problem with the NQ8005 in that it occasionally loses the 295 * last two bytes. To get round this problem, we receive the CRC as 296 * well. That way, if we do lose the last two, then it doesn't matter. 297 */ 298 ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1); 299 ether3_outw((TX_END>>8) - 1, REG_BUFWIN); 300 ether3_outw(priv(dev)->rx_head, REG_RECVPTR); 301 ether3_outw(0, REG_TRANSMITPTR); 302 ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND); 303 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); 304 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); 305 ether3_outw(priv(dev)->regs.command, REG_COMMAND); 306 307 i = ether3_ramtest(dev, 0x5A); 308 if(i) 309 return i; 310 i = ether3_ramtest(dev, 0x1E); 311 if(i) 312 return i; 313 314 ether3_setbuffer(dev, buffer_write, 0); 315 ether3_writelong(dev, 0); 316 return 0; 317 } 318 319 static void 320 ether3_init_for_open(struct net_device *dev) 321 { 322 int i; 323 324 /* Reset the chip */ 325 ether3_outw(CFG2_RESET, REG_CONFIG2); 326 udelay(4); 327 328 priv(dev)->regs.command = 0; 329 ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND); 330 while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON)) 331 barrier(); 332 333 ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1); 334 for (i = 0; i < 6; i++) 335 ether3_outb(dev->dev_addr[i], REG_BUFWIN); 336 337 priv(dev)->tx_head = 0; 338 priv(dev)->tx_tail = 0; 339 priv(dev)->regs.config2 |= CFG2_CTRLO; 340 priv(dev)->rx_head = RX_START; 341 342 ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1); 343 ether3_outw((TX_END>>8) - 1, REG_BUFWIN); 344 ether3_outw(priv(dev)->rx_head, REG_RECVPTR); 345 ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND); 346 ether3_outw(0, REG_TRANSMITPTR); 347 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); 348 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); 349 350 ether3_setbuffer(dev, buffer_write, 0); 351 ether3_writelong(dev, 0); 352 353 priv(dev)->regs.command = CMD_ENINTRX | CMD_ENINTTX; 354 ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND); 355 } 356 357 static inline int 358 ether3_probe_bus_8(struct net_device *dev, int val) 359 { 360 int write_low, write_high, read_low, read_high; 361 362 write_low = val & 255; 363 write_high = val >> 8; 364 365 printk(KERN_DEBUG "ether3_probe: write8 [%02X:%02X]", write_high, write_low); 366 367 ether3_outb(write_low, REG_RECVPTR); 368 ether3_outb(write_high, REG_RECVPTR + 4); 369 370 read_low = ether3_inb(REG_RECVPTR); 371 read_high = ether3_inb(REG_RECVPTR + 4); 372 373 printk(", read8 [%02X:%02X]\n", read_high, read_low); 374 375 return read_low == write_low && read_high == write_high; 376 } 377 378 static inline int 379 ether3_probe_bus_16(struct net_device *dev, int val) 380 { 381 int read_val; 382 383 ether3_outw(val, REG_RECVPTR); 384 read_val = ether3_inw(REG_RECVPTR); 385 386 printk(KERN_DEBUG "ether3_probe: write16 [%04X], read16 [%04X]\n", val, read_val); 387 388 return read_val == val; 389 } 390 391 /* 392 * Open/initialize the board. This is called (in the current kernel) 393 * sometime after booting when the 'ifconfig' program is run. 394 * 395 * This routine should set everything up anew at each open, even 396 * registers that "should" only need to be set once at boot, so that 397 * there is non-reboot way to recover if something goes wrong. 398 */ 399 static int 400 ether3_open(struct net_device *dev) 401 { 402 if (request_irq(dev->irq, ether3_interrupt, 0, "ether3", dev)) 403 return -EAGAIN; 404 405 ether3_init_for_open(dev); 406 407 netif_start_queue(dev); 408 409 return 0; 410 } 411 412 /* 413 * The inverse routine to ether3_open(). 414 */ 415 static int 416 ether3_close(struct net_device *dev) 417 { 418 netif_stop_queue(dev); 419 420 disable_irq(dev->irq); 421 422 ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND); 423 priv(dev)->regs.command = 0; 424 while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON)) 425 barrier(); 426 ether3_outb(0x80, REG_CONFIG2 + 4); 427 ether3_outw(0, REG_COMMAND); 428 429 free_irq(dev->irq, dev); 430 431 return 0; 432 } 433 434 /* 435 * Set or clear promiscuous/multicast mode filter for this adaptor. 436 * 437 * We don't attempt any packet filtering. The card may have a SEEQ 8004 438 * in which does not have the other ethernet address registers present... 439 */ 440 static void ether3_setmulticastlist(struct net_device *dev) 441 { 442 priv(dev)->regs.config1 &= ~CFG1_RECVPROMISC; 443 444 if (dev->flags & IFF_PROMISC) { 445 /* promiscuous mode */ 446 priv(dev)->regs.config1 |= CFG1_RECVPROMISC; 447 } else if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) { 448 priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI; 449 } else 450 priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD; 451 452 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); 453 } 454 455 static void ether3_timeout(struct net_device *dev) 456 { 457 unsigned long flags; 458 459 del_timer(&priv(dev)->timer); 460 461 local_irq_save(flags); 462 printk(KERN_ERR "%s: transmit timed out, network cable problem?\n", dev->name); 463 printk(KERN_ERR "%s: state: { status=%04X cfg1=%04X cfg2=%04X }\n", dev->name, 464 ether3_inw(REG_STATUS), ether3_inw(REG_CONFIG1), ether3_inw(REG_CONFIG2)); 465 printk(KERN_ERR "%s: { rpr=%04X rea=%04X tpr=%04X }\n", dev->name, 466 ether3_inw(REG_RECVPTR), ether3_inw(REG_RECVEND), ether3_inw(REG_TRANSMITPTR)); 467 printk(KERN_ERR "%s: tx head=%X tx tail=%X\n", dev->name, 468 priv(dev)->tx_head, priv(dev)->tx_tail); 469 ether3_setbuffer(dev, buffer_read, priv(dev)->tx_tail); 470 printk(KERN_ERR "%s: packet status = %08X\n", dev->name, ether3_readlong(dev)); 471 local_irq_restore(flags); 472 473 priv(dev)->regs.config2 |= CFG2_CTRLO; 474 dev->stats.tx_errors += 1; 475 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); 476 priv(dev)->tx_head = priv(dev)->tx_tail = 0; 477 478 netif_wake_queue(dev); 479 } 480 481 /* 482 * Transmit a packet 483 */ 484 static int 485 ether3_sendpacket(struct sk_buff *skb, struct net_device *dev) 486 { 487 unsigned long flags; 488 unsigned int length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN; 489 unsigned int ptr, next_ptr; 490 491 if (priv(dev)->broken) { 492 dev_kfree_skb(skb); 493 dev->stats.tx_dropped++; 494 netif_start_queue(dev); 495 return NETDEV_TX_OK; 496 } 497 498 length = (length + 1) & ~1; 499 if (length != skb->len) { 500 if (skb_padto(skb, length)) 501 goto out; 502 } 503 504 next_ptr = (priv(dev)->tx_head + 1) & 15; 505 506 local_irq_save(flags); 507 508 if (priv(dev)->tx_tail == next_ptr) { 509 local_irq_restore(flags); 510 return NETDEV_TX_BUSY; /* unable to queue */ 511 } 512 513 ptr = 0x600 * priv(dev)->tx_head; 514 priv(dev)->tx_head = next_ptr; 515 next_ptr *= 0x600; 516 517 #define TXHDR_FLAGS (TXHDR_TRANSMIT|TXHDR_CHAINCONTINUE|TXHDR_DATAFOLLOWS|TXHDR_ENSUCCESS) 518 519 ether3_setbuffer(dev, buffer_write, next_ptr); 520 ether3_writelong(dev, 0); 521 ether3_setbuffer(dev, buffer_write, ptr); 522 ether3_writelong(dev, 0); 523 ether3_writebuffer(dev, skb->data, length); 524 ether3_writeword(dev, htons(next_ptr)); 525 ether3_writeword(dev, TXHDR_CHAINCONTINUE >> 16); 526 ether3_setbuffer(dev, buffer_write, ptr); 527 ether3_writeword(dev, htons((ptr + length + 4))); 528 ether3_writeword(dev, TXHDR_FLAGS >> 16); 529 ether3_ledon(dev); 530 531 if (!(ether3_inw(REG_STATUS) & STAT_TXON)) { 532 ether3_outw(ptr, REG_TRANSMITPTR); 533 ether3_outw(priv(dev)->regs.command | CMD_TXON, REG_COMMAND); 534 } 535 536 next_ptr = (priv(dev)->tx_head + 1) & 15; 537 local_irq_restore(flags); 538 539 dev_kfree_skb(skb); 540 541 if (priv(dev)->tx_tail == next_ptr) 542 netif_stop_queue(dev); 543 544 out: 545 return NETDEV_TX_OK; 546 } 547 548 static irqreturn_t 549 ether3_interrupt(int irq, void *dev_id) 550 { 551 struct net_device *dev = (struct net_device *)dev_id; 552 unsigned int status, handled = IRQ_NONE; 553 554 #if NET_DEBUG > 1 555 if(net_debug & DEBUG_INT) 556 printk("eth3irq: %d ", irq); 557 #endif 558 559 status = ether3_inw(REG_STATUS); 560 561 if (status & STAT_INTRX) { 562 ether3_outw(CMD_ACKINTRX | priv(dev)->regs.command, REG_COMMAND); 563 ether3_rx(dev, 12); 564 handled = IRQ_HANDLED; 565 } 566 567 if (status & STAT_INTTX) { 568 ether3_outw(CMD_ACKINTTX | priv(dev)->regs.command, REG_COMMAND); 569 ether3_tx(dev); 570 handled = IRQ_HANDLED; 571 } 572 573 #if NET_DEBUG > 1 574 if(net_debug & DEBUG_INT) 575 printk("done\n"); 576 #endif 577 return handled; 578 } 579 580 /* 581 * If we have a good packet(s), get it/them out of the buffers. 582 */ 583 static int ether3_rx(struct net_device *dev, unsigned int maxcnt) 584 { 585 unsigned int next_ptr = priv(dev)->rx_head, received = 0; 586 587 ether3_ledon(dev); 588 589 do { 590 unsigned int this_ptr, status; 591 unsigned char addrs[16]; 592 593 /* 594 * read the first 16 bytes from the buffer. 595 * This contains the status bytes etc and ethernet addresses, 596 * and we also check the source ethernet address to see if 597 * it originated from us. 598 */ 599 { 600 unsigned int temp_ptr; 601 ether3_setbuffer(dev, buffer_read, next_ptr); 602 temp_ptr = ether3_readword(dev); 603 status = ether3_readword(dev); 604 if ((status & (RXSTAT_DONE | RXHDR_CHAINCONTINUE | RXHDR_RECEIVE)) != 605 (RXSTAT_DONE | RXHDR_CHAINCONTINUE) || !temp_ptr) 606 break; 607 608 this_ptr = next_ptr + 4; 609 next_ptr = ntohs(temp_ptr); 610 } 611 ether3_setbuffer(dev, buffer_read, this_ptr); 612 ether3_readbuffer(dev, addrs+2, 12); 613 614 if (next_ptr < RX_START || next_ptr >= RX_END) { 615 int i; 616 printk("%s: bad next pointer @%04X: ", dev->name, priv(dev)->rx_head); 617 printk("%02X %02X %02X %02X ", next_ptr >> 8, next_ptr & 255, status & 255, status >> 8); 618 for (i = 2; i < 14; i++) 619 printk("%02X ", addrs[i]); 620 printk("\n"); 621 next_ptr = priv(dev)->rx_head; 622 break; 623 } 624 /* 625 * ignore our own packets... 626 */ 627 if (!(*(unsigned long *)&dev->dev_addr[0] ^ *(unsigned long *)&addrs[2+6]) && 628 !(*(unsigned short *)&dev->dev_addr[4] ^ *(unsigned short *)&addrs[2+10])) { 629 maxcnt ++; /* compensate for loopedback packet */ 630 ether3_outw(next_ptr >> 8, REG_RECVEND); 631 } else 632 if (!(status & (RXSTAT_OVERSIZE|RXSTAT_CRCERROR|RXSTAT_DRIBBLEERROR|RXSTAT_SHORTPACKET))) { 633 unsigned int length = next_ptr - this_ptr; 634 struct sk_buff *skb; 635 636 if (next_ptr <= this_ptr) 637 length += RX_END - RX_START; 638 639 skb = netdev_alloc_skb(dev, length + 2); 640 if (skb) { 641 unsigned char *buf; 642 643 skb_reserve(skb, 2); 644 buf = skb_put(skb, length); 645 ether3_readbuffer(dev, buf + 12, length - 12); 646 ether3_outw(next_ptr >> 8, REG_RECVEND); 647 *(unsigned short *)(buf + 0) = *(unsigned short *)(addrs + 2); 648 *(unsigned long *)(buf + 2) = *(unsigned long *)(addrs + 4); 649 *(unsigned long *)(buf + 6) = *(unsigned long *)(addrs + 8); 650 *(unsigned short *)(buf + 10) = *(unsigned short *)(addrs + 12); 651 skb->protocol = eth_type_trans(skb, dev); 652 netif_rx(skb); 653 received ++; 654 } else { 655 ether3_outw(next_ptr >> 8, REG_RECVEND); 656 dev->stats.rx_dropped++; 657 goto done; 658 } 659 } else { 660 struct net_device_stats *stats = &dev->stats; 661 ether3_outw(next_ptr >> 8, REG_RECVEND); 662 if (status & RXSTAT_OVERSIZE) stats->rx_over_errors ++; 663 if (status & RXSTAT_CRCERROR) stats->rx_crc_errors ++; 664 if (status & RXSTAT_DRIBBLEERROR) stats->rx_fifo_errors ++; 665 if (status & RXSTAT_SHORTPACKET) stats->rx_length_errors ++; 666 stats->rx_errors++; 667 } 668 } 669 while (-- maxcnt); 670 671 done: 672 dev->stats.rx_packets += received; 673 priv(dev)->rx_head = next_ptr; 674 /* 675 * If rx went off line, then that means that the buffer may be full. We 676 * have dropped at least one packet. 677 */ 678 if (!(ether3_inw(REG_STATUS) & STAT_RXON)) { 679 dev->stats.rx_dropped++; 680 ether3_outw(next_ptr, REG_RECVPTR); 681 ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND); 682 } 683 684 return maxcnt; 685 } 686 687 /* 688 * Update stats for the transmitted packet(s) 689 */ 690 static void ether3_tx(struct net_device *dev) 691 { 692 unsigned int tx_tail = priv(dev)->tx_tail; 693 int max_work = 14; 694 695 do { 696 unsigned long status; 697 698 /* 699 * Read the packet header 700 */ 701 ether3_setbuffer(dev, buffer_read, tx_tail * 0x600); 702 status = ether3_readlong(dev); 703 704 /* 705 * Check to see if this packet has been transmitted 706 */ 707 if ((status & (TXSTAT_DONE | TXHDR_TRANSMIT)) != 708 (TXSTAT_DONE | TXHDR_TRANSMIT)) 709 break; 710 711 /* 712 * Update errors 713 */ 714 if (!(status & (TXSTAT_BABBLED | TXSTAT_16COLLISIONS))) 715 dev->stats.tx_packets++; 716 else { 717 dev->stats.tx_errors++; 718 if (status & TXSTAT_16COLLISIONS) 719 dev->stats.collisions += 16; 720 if (status & TXSTAT_BABBLED) 721 dev->stats.tx_fifo_errors++; 722 } 723 724 tx_tail = (tx_tail + 1) & 15; 725 } while (--max_work); 726 727 if (priv(dev)->tx_tail != tx_tail) { 728 priv(dev)->tx_tail = tx_tail; 729 netif_wake_queue(dev); 730 } 731 } 732 733 static void ether3_banner(void) 734 { 735 static unsigned version_printed = 0; 736 737 if (net_debug && version_printed++ == 0) 738 printk(KERN_INFO "%s", version); 739 } 740 741 static const struct net_device_ops ether3_netdev_ops = { 742 .ndo_open = ether3_open, 743 .ndo_stop = ether3_close, 744 .ndo_start_xmit = ether3_sendpacket, 745 .ndo_set_rx_mode = ether3_setmulticastlist, 746 .ndo_tx_timeout = ether3_timeout, 747 .ndo_validate_addr = eth_validate_addr, 748 .ndo_change_mtu = eth_change_mtu, 749 .ndo_set_mac_address = eth_mac_addr, 750 }; 751 752 static int 753 ether3_probe(struct expansion_card *ec, const struct ecard_id *id) 754 { 755 const struct ether3_data *data = id->data; 756 struct net_device *dev; 757 int bus_type, ret; 758 759 ether3_banner(); 760 761 ret = ecard_request_resources(ec); 762 if (ret) 763 goto out; 764 765 dev = alloc_etherdev(sizeof(struct dev_priv)); 766 if (!dev) { 767 ret = -ENOMEM; 768 goto release; 769 } 770 771 SET_NETDEV_DEV(dev, &ec->dev); 772 773 priv(dev)->base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0); 774 if (!priv(dev)->base) { 775 ret = -ENOMEM; 776 goto free; 777 } 778 779 ec->irqaddr = priv(dev)->base + data->base_offset; 780 ec->irqmask = 0xf0; 781 782 priv(dev)->seeq = priv(dev)->base + data->base_offset; 783 dev->irq = ec->irq; 784 785 ether3_addr(dev->dev_addr, ec); 786 787 init_timer(&priv(dev)->timer); 788 789 /* Reset card... 790 */ 791 ether3_outb(0x80, REG_CONFIG2 + 4); 792 bus_type = BUS_UNKNOWN; 793 udelay(4); 794 795 /* Test using Receive Pointer (16-bit register) to find out 796 * how the ether3 is connected to the bus... 797 */ 798 if (ether3_probe_bus_8(dev, 0x100) && 799 ether3_probe_bus_8(dev, 0x201)) 800 bus_type = BUS_8; 801 802 if (bus_type == BUS_UNKNOWN && 803 ether3_probe_bus_16(dev, 0x101) && 804 ether3_probe_bus_16(dev, 0x201)) 805 bus_type = BUS_16; 806 807 switch (bus_type) { 808 case BUS_UNKNOWN: 809 printk(KERN_ERR "%s: unable to identify bus width\n", dev->name); 810 ret = -ENODEV; 811 goto free; 812 813 case BUS_8: 814 printk(KERN_ERR "%s: %s found, but is an unsupported " 815 "8-bit card\n", dev->name, data->name); 816 ret = -ENODEV; 817 goto free; 818 819 default: 820 break; 821 } 822 823 if (ether3_init_2(dev)) { 824 ret = -ENODEV; 825 goto free; 826 } 827 828 dev->netdev_ops = ðer3_netdev_ops; 829 dev->watchdog_timeo = 5 * HZ / 100; 830 831 ret = register_netdev(dev); 832 if (ret) 833 goto free; 834 835 printk("%s: %s in slot %d, %pM\n", 836 dev->name, data->name, ec->slot_no, dev->dev_addr); 837 838 ecard_set_drvdata(ec, dev); 839 return 0; 840 841 free: 842 free_netdev(dev); 843 release: 844 ecard_release_resources(ec); 845 out: 846 return ret; 847 } 848 849 static void ether3_remove(struct expansion_card *ec) 850 { 851 struct net_device *dev = ecard_get_drvdata(ec); 852 853 ecard_set_drvdata(ec, NULL); 854 855 unregister_netdev(dev); 856 free_netdev(dev); 857 ecard_release_resources(ec); 858 } 859 860 static struct ether3_data ether3 = { 861 .name = "ether3", 862 .base_offset = 0, 863 }; 864 865 static struct ether3_data etherb = { 866 .name = "etherb", 867 .base_offset = 0x800, 868 }; 869 870 static const struct ecard_id ether3_ids[] = { 871 { MANU_ANT2, PROD_ANT_ETHER3, ðer3 }, 872 { MANU_ANT, PROD_ANT_ETHER3, ðer3 }, 873 { MANU_ANT, PROD_ANT_ETHERB, ðerb }, 874 { 0xffff, 0xffff } 875 }; 876 877 static struct ecard_driver ether3_driver = { 878 .probe = ether3_probe, 879 .remove = ether3_remove, 880 .id_table = ether3_ids, 881 .drv = { 882 .name = "ether3", 883 }, 884 }; 885 886 static int __init ether3_init(void) 887 { 888 return ecard_register_driver(ðer3_driver); 889 } 890 891 static void __exit ether3_exit(void) 892 { 893 ecard_remove_driver(ðer3_driver); 894 } 895 896 module_init(ether3_init); 897 module_exit(ether3_exit); 898 899 MODULE_LICENSE("GPL"); 900