1 /* 10G controller driver for Samsung SoCs
2  *
3  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
4  *		http://www.samsung.com
5  *
6  * Author: Siva Reddy Kallam <siva.kallam@samsung.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 #ifndef __SXGBE_MTL_H__
13 #define __SXGBE_MTL_H__
14 
15 #define SXGBE_MTL_OPMODE_ESTMASK	0x3
16 #define SXGBE_MTL_OPMODE_RAAMASK	0x1
17 #define SXGBE_MTL_FCMASK		0x7
18 #define SXGBE_MTL_TX_FIFO_DIV		256
19 #define SXGBE_MTL_RX_FIFO_DIV		256
20 
21 #define SXGBE_MTL_RXQ_OP_FEP		BIT(4)
22 #define SXGBE_MTL_RXQ_OP_FUP		BIT(3)
23 #define SXGBE_MTL_ENABLE_FC		0x80
24 
25 #define ETS_WRR				0xFFFFFF9F
26 #define ETS_RST				0xFFFFFF9F
27 #define ETS_WFQ				0x00000020
28 #define ETS_DWRR			0x00000040
29 #define RAA_SP				0xFFFFFFFB
30 #define RAA_WSP				0x00000004
31 
32 #define RX_QUEUE_DYNAMIC		0x80808080
33 #define RX_FC_ACTIVE			8
34 #define RX_FC_DEACTIVE			13
35 
36 enum ttc_control {
37 	MTL_CONTROL_TTC_64 = 0x00000000,
38 	MTL_CONTROL_TTC_96 = 0x00000020,
39 	MTL_CONTROL_TTC_128 = 0x00000030,
40 	MTL_CONTROL_TTC_192 = 0x00000040,
41 	MTL_CONTROL_TTC_256 = 0x00000050,
42 	MTL_CONTROL_TTC_384 = 0x00000060,
43 	MTL_CONTROL_TTC_512 = 0x00000070,
44 };
45 
46 enum rtc_control {
47 	MTL_CONTROL_RTC_64 = 0x00000000,
48 	MTL_CONTROL_RTC_96 = 0x00000002,
49 	MTL_CONTROL_RTC_128 = 0x00000003,
50 };
51 
52 enum flow_control_th {
53 	MTL_FC_FULL_1K = 0x00000000,
54 	MTL_FC_FULL_2K = 0x00000001,
55 	MTL_FC_FULL_4K = 0x00000002,
56 	MTL_FC_FULL_5K = 0x00000003,
57 	MTL_FC_FULL_6K = 0x00000004,
58 	MTL_FC_FULL_8K = 0x00000005,
59 	MTL_FC_FULL_16K = 0x00000006,
60 	MTL_FC_FULL_24K = 0x00000007,
61 };
62 
63 struct sxgbe_mtl_ops {
64 	void (*mtl_init)(void __iomem *ioaddr, unsigned int etsalg,
65 			 unsigned int raa);
66 
67 	void (*mtl_set_txfifosize)(void __iomem *ioaddr, int queue_num,
68 				   int mtl_fifo);
69 
70 	void (*mtl_set_rxfifosize)(void __iomem *ioaddr, int queue_num,
71 				   int queue_fifo);
72 
73 	void (*mtl_enable_txqueue)(void __iomem *ioaddr, int queue_num);
74 
75 	void (*mtl_disable_txqueue)(void __iomem *ioaddr, int queue_num);
76 
77 	void (*set_tx_mtl_mode)(void __iomem *ioaddr, int queue_num,
78 				int tx_mode);
79 
80 	void (*set_rx_mtl_mode)(void __iomem *ioaddr, int queue_num,
81 				int rx_mode);
82 
83 	void (*mtl_dynamic_dma_rxqueue)(void __iomem *ioaddr);
84 
85 	void (*mtl_fc_active)(void __iomem *ioaddr, int queue_num,
86 			      int threshold);
87 
88 	void (*mtl_fc_deactive)(void __iomem *ioaddr, int queue_num,
89 				int threshold);
90 
91 	void (*mtl_fc_enable)(void __iomem *ioaddr, int queue_num);
92 
93 	void (*mtl_fep_enable)(void __iomem *ioaddr, int queue_num);
94 
95 	void (*mtl_fep_disable)(void __iomem *ioaddr, int queue_num);
96 
97 	void (*mtl_fup_enable)(void __iomem *ioaddr, int queue_num);
98 
99 	void (*mtl_fup_disable)(void __iomem *ioaddr, int queue_num);
100 };
101 
102 const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);
103 
104 #endif /* __SXGBE_MTL_H__ */
105