1 /* 2 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc. 3 * Copyright (c) 2014, I2SE GmbH 4 * 5 * Permission to use, copy, modify, and/or distribute this software 6 * for any purpose with or without fee is hereby granted, provided 7 * that the above copyright notice and this permission notice appear 8 * in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL 13 * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR 14 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 15 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, 16 * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 17 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* This module implements the Qualcomm Atheros SPI protocol for 21 * kernel-based SPI device; it is essentially an Ethernet-to-SPI 22 * serial converter; 23 */ 24 25 #include <linux/errno.h> 26 #include <linux/etherdevice.h> 27 #include <linux/if_arp.h> 28 #include <linux/if_ether.h> 29 #include <linux/init.h> 30 #include <linux/interrupt.h> 31 #include <linux/jiffies.h> 32 #include <linux/kernel.h> 33 #include <linux/kthread.h> 34 #include <linux/module.h> 35 #include <linux/moduleparam.h> 36 #include <linux/netdevice.h> 37 #include <linux/of.h> 38 #include <linux/of_net.h> 39 #include <linux/sched.h> 40 #include <linux/skbuff.h> 41 #include <linux/spi/spi.h> 42 #include <linux/types.h> 43 44 #include "qca_7k.h" 45 #include "qca_7k_common.h" 46 #include "qca_debug.h" 47 #include "qca_spi.h" 48 49 #define MAX_DMA_BURST_LEN 5000 50 51 #define SPI_INTR 0 52 53 /* Modules parameters */ 54 #define QCASPI_CLK_SPEED_MIN 1000000 55 #define QCASPI_CLK_SPEED_MAX 16000000 56 #define QCASPI_CLK_SPEED 8000000 57 static int qcaspi_clkspeed; 58 module_param(qcaspi_clkspeed, int, 0); 59 MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000."); 60 61 #define QCASPI_BURST_LEN_MIN 1 62 #define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN 63 static int qcaspi_burst_len = MAX_DMA_BURST_LEN; 64 module_param(qcaspi_burst_len, int, 0); 65 MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000."); 66 67 #define QCASPI_PLUGGABLE_MIN 0 68 #define QCASPI_PLUGGABLE_MAX 1 69 static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN; 70 module_param(qcaspi_pluggable, int, 0); 71 MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no)."); 72 73 #define QCASPI_WRITE_VERIFY_MIN 0 74 #define QCASPI_WRITE_VERIFY_MAX 3 75 static int wr_verify = QCASPI_WRITE_VERIFY_MIN; 76 module_param(wr_verify, int, 0); 77 MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3."); 78 79 #define QCASPI_TX_TIMEOUT (1 * HZ) 80 #define QCASPI_QCA7K_REBOOT_TIME_MS 1000 81 82 static void 83 start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause) 84 { 85 *intr_cause = 0; 86 87 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 88 qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 89 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); 90 } 91 92 static void 93 end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause) 94 { 95 u16 intr_enable = (SPI_INT_CPU_ON | 96 SPI_INT_PKT_AVLBL | 97 SPI_INT_RDBUF_ERR | 98 SPI_INT_WRBUF_ERR); 99 100 qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0); 101 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify); 102 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); 103 } 104 105 static u32 106 qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len) 107 { 108 __be16 cmd; 109 struct spi_message msg; 110 struct spi_transfer transfer[2]; 111 int ret; 112 113 memset(&transfer, 0, sizeof(transfer)); 114 spi_message_init(&msg); 115 116 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 117 transfer[0].tx_buf = &cmd; 118 transfer[0].len = QCASPI_CMD_LEN; 119 transfer[1].tx_buf = src; 120 transfer[1].len = len; 121 122 spi_message_add_tail(&transfer[0], &msg); 123 spi_message_add_tail(&transfer[1], &msg); 124 ret = spi_sync(qca->spi_dev, &msg); 125 126 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 127 qcaspi_spi_error(qca); 128 return 0; 129 } 130 131 return len; 132 } 133 134 static u32 135 qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) 136 { 137 struct spi_message msg; 138 struct spi_transfer transfer; 139 int ret; 140 141 memset(&transfer, 0, sizeof(transfer)); 142 spi_message_init(&msg); 143 144 transfer.tx_buf = src; 145 transfer.len = len; 146 147 spi_message_add_tail(&transfer, &msg); 148 ret = spi_sync(qca->spi_dev, &msg); 149 150 if (ret || (msg.actual_length != len)) { 151 qcaspi_spi_error(qca); 152 return 0; 153 } 154 155 return len; 156 } 157 158 static u32 159 qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len) 160 { 161 struct spi_message msg; 162 __be16 cmd; 163 struct spi_transfer transfer[2]; 164 int ret; 165 166 memset(&transfer, 0, sizeof(transfer)); 167 spi_message_init(&msg); 168 169 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 170 transfer[0].tx_buf = &cmd; 171 transfer[0].len = QCASPI_CMD_LEN; 172 transfer[1].rx_buf = dst; 173 transfer[1].len = len; 174 175 spi_message_add_tail(&transfer[0], &msg); 176 spi_message_add_tail(&transfer[1], &msg); 177 ret = spi_sync(qca->spi_dev, &msg); 178 179 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 180 qcaspi_spi_error(qca); 181 return 0; 182 } 183 184 return len; 185 } 186 187 static u32 188 qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len) 189 { 190 struct spi_message msg; 191 struct spi_transfer transfer; 192 int ret; 193 194 memset(&transfer, 0, sizeof(transfer)); 195 spi_message_init(&msg); 196 197 transfer.rx_buf = dst; 198 transfer.len = len; 199 200 spi_message_add_tail(&transfer, &msg); 201 ret = spi_sync(qca->spi_dev, &msg); 202 203 if (ret || (msg.actual_length != len)) { 204 qcaspi_spi_error(qca); 205 return 0; 206 } 207 208 return len; 209 } 210 211 static int 212 qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd) 213 { 214 __be16 tx_data; 215 struct spi_message msg; 216 struct spi_transfer transfer; 217 int ret; 218 219 memset(&transfer, 0, sizeof(transfer)); 220 221 spi_message_init(&msg); 222 223 tx_data = cpu_to_be16(cmd); 224 transfer.len = sizeof(cmd); 225 transfer.tx_buf = &tx_data; 226 spi_message_add_tail(&transfer, &msg); 227 228 ret = spi_sync(qca->spi_dev, &msg); 229 230 if (!ret) 231 ret = msg.status; 232 233 if (ret) 234 qcaspi_spi_error(qca); 235 236 return ret; 237 } 238 239 static int 240 qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb) 241 { 242 u32 count; 243 u32 written; 244 u32 offset; 245 u32 len; 246 247 len = skb->len; 248 249 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify); 250 if (qca->legacy_mode) 251 qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 252 253 offset = 0; 254 while (len) { 255 count = len; 256 if (count > qca->burst_len) 257 count = qca->burst_len; 258 259 if (qca->legacy_mode) { 260 written = qcaspi_write_legacy(qca, 261 skb->data + offset, 262 count); 263 } else { 264 written = qcaspi_write_burst(qca, 265 skb->data + offset, 266 count); 267 } 268 269 if (written != count) 270 return -1; 271 272 offset += count; 273 len -= count; 274 } 275 276 return 0; 277 } 278 279 static int 280 qcaspi_transmit(struct qcaspi *qca) 281 { 282 struct net_device_stats *n_stats = &qca->net_dev->stats; 283 u16 available = 0; 284 u32 pkt_len; 285 u16 new_head; 286 u16 packets = 0; 287 288 if (qca->txr.skb[qca->txr.head] == NULL) 289 return 0; 290 291 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available); 292 293 if (available > QCASPI_HW_BUF_LEN) { 294 /* This could only happen by interferences on the SPI line. 295 * So retry later ... 296 */ 297 qca->stats.buf_avail_err++; 298 return -1; 299 } 300 301 while (qca->txr.skb[qca->txr.head]) { 302 pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN; 303 304 if (available < pkt_len) { 305 if (packets == 0) 306 qca->stats.write_buf_miss++; 307 break; 308 } 309 310 if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) { 311 qca->stats.write_err++; 312 return -1; 313 } 314 315 packets++; 316 n_stats->tx_packets++; 317 n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len; 318 available -= pkt_len; 319 320 /* remove the skb from the queue */ 321 /* XXX After inconsistent lock states netif_tx_lock() 322 * has been replaced by netif_tx_lock_bh() and so on. 323 */ 324 netif_tx_lock_bh(qca->net_dev); 325 dev_kfree_skb(qca->txr.skb[qca->txr.head]); 326 qca->txr.skb[qca->txr.head] = NULL; 327 qca->txr.size -= pkt_len; 328 new_head = qca->txr.head + 1; 329 if (new_head >= qca->txr.count) 330 new_head = 0; 331 qca->txr.head = new_head; 332 if (netif_queue_stopped(qca->net_dev)) 333 netif_wake_queue(qca->net_dev); 334 netif_tx_unlock_bh(qca->net_dev); 335 } 336 337 return 0; 338 } 339 340 static int 341 qcaspi_receive(struct qcaspi *qca) 342 { 343 struct net_device *net_dev = qca->net_dev; 344 struct net_device_stats *n_stats = &net_dev->stats; 345 u16 available = 0; 346 u32 bytes_read; 347 u8 *cp; 348 349 /* Allocate rx SKB if we don't have one available. */ 350 if (!qca->rx_skb) { 351 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 352 net_dev->mtu + 353 VLAN_ETH_HLEN); 354 if (!qca->rx_skb) { 355 netdev_dbg(net_dev, "out of RX resources\n"); 356 qca->stats.out_of_mem++; 357 return -1; 358 } 359 } 360 361 /* Read the packet size. */ 362 qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available); 363 364 netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n", 365 available); 366 367 if (available > QCASPI_HW_BUF_LEN + QCASPI_HW_PKT_LEN) { 368 /* This could only happen by interferences on the SPI line. 369 * So retry later ... 370 */ 371 qca->stats.buf_avail_err++; 372 return -1; 373 } else if (available == 0) { 374 netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n"); 375 return -1; 376 } 377 378 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify); 379 380 if (qca->legacy_mode) 381 qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 382 383 while (available) { 384 u32 count = available; 385 386 if (count > qca->burst_len) 387 count = qca->burst_len; 388 389 if (qca->legacy_mode) { 390 bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer, 391 count); 392 } else { 393 bytes_read = qcaspi_read_burst(qca, qca->rx_buffer, 394 count); 395 } 396 397 netdev_dbg(net_dev, "available: %d, byte read: %d\n", 398 available, bytes_read); 399 400 if (bytes_read) { 401 available -= bytes_read; 402 } else { 403 qca->stats.read_err++; 404 return -1; 405 } 406 407 cp = qca->rx_buffer; 408 409 while ((bytes_read--) && (qca->rx_skb)) { 410 s32 retcode; 411 412 retcode = qcafrm_fsm_decode(&qca->frm_handle, 413 qca->rx_skb->data, 414 skb_tailroom(qca->rx_skb), 415 *cp); 416 cp++; 417 switch (retcode) { 418 case QCAFRM_GATHER: 419 case QCAFRM_NOHEAD: 420 break; 421 case QCAFRM_NOTAIL: 422 netdev_dbg(net_dev, "no RX tail\n"); 423 n_stats->rx_errors++; 424 n_stats->rx_dropped++; 425 break; 426 case QCAFRM_INVLEN: 427 netdev_dbg(net_dev, "invalid RX length\n"); 428 n_stats->rx_errors++; 429 n_stats->rx_dropped++; 430 break; 431 default: 432 qca->rx_skb->dev = qca->net_dev; 433 n_stats->rx_packets++; 434 n_stats->rx_bytes += retcode; 435 skb_put(qca->rx_skb, retcode); 436 qca->rx_skb->protocol = eth_type_trans( 437 qca->rx_skb, qca->rx_skb->dev); 438 skb_checksum_none_assert(qca->rx_skb); 439 netif_rx(qca->rx_skb); 440 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 441 net_dev->mtu + VLAN_ETH_HLEN); 442 if (!qca->rx_skb) { 443 netdev_dbg(net_dev, "out of RX resources\n"); 444 n_stats->rx_errors++; 445 qca->stats.out_of_mem++; 446 break; 447 } 448 } 449 } 450 } 451 452 return 0; 453 } 454 455 /* Check that tx ring stores only so much bytes 456 * that fit into the internal QCA buffer. 457 */ 458 459 static int 460 qcaspi_tx_ring_has_space(struct tx_ring *txr) 461 { 462 if (txr->skb[txr->tail]) 463 return 0; 464 465 return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0; 466 } 467 468 /* Flush the tx ring. This function is only safe to 469 * call from the qcaspi_spi_thread. 470 */ 471 472 static void 473 qcaspi_flush_tx_ring(struct qcaspi *qca) 474 { 475 int i; 476 477 /* XXX After inconsistent lock states netif_tx_lock() 478 * has been replaced by netif_tx_lock_bh() and so on. 479 */ 480 netif_tx_lock_bh(qca->net_dev); 481 for (i = 0; i < TX_RING_MAX_LEN; i++) { 482 if (qca->txr.skb[i]) { 483 dev_kfree_skb(qca->txr.skb[i]); 484 qca->txr.skb[i] = NULL; 485 qca->net_dev->stats.tx_dropped++; 486 } 487 } 488 qca->txr.tail = 0; 489 qca->txr.head = 0; 490 qca->txr.size = 0; 491 netif_tx_unlock_bh(qca->net_dev); 492 } 493 494 static void 495 qcaspi_qca7k_sync(struct qcaspi *qca, int event) 496 { 497 u16 signature = 0; 498 u16 spi_config; 499 u16 wrbuf_space = 0; 500 501 if (event == QCASPI_EVENT_CPUON) { 502 /* Read signature twice, if not valid 503 * go back to unknown state. 504 */ 505 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 506 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 507 if (signature != QCASPI_GOOD_SIGNATURE) { 508 if (qca->sync == QCASPI_SYNC_READY) 509 qca->stats.bad_signature++; 510 511 qca->sync = QCASPI_SYNC_UNKNOWN; 512 netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n"); 513 return; 514 } else { 515 /* ensure that the WRBUF is empty */ 516 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, 517 &wrbuf_space); 518 if (wrbuf_space != QCASPI_HW_BUF_LEN) { 519 netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n"); 520 qca->sync = QCASPI_SYNC_UNKNOWN; 521 } else { 522 netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n"); 523 qca->sync = QCASPI_SYNC_READY; 524 return; 525 } 526 } 527 } 528 529 switch (qca->sync) { 530 case QCASPI_SYNC_READY: 531 /* Check signature twice, if not valid go to unknown state. */ 532 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 533 if (signature != QCASPI_GOOD_SIGNATURE) 534 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 535 536 if (signature != QCASPI_GOOD_SIGNATURE) { 537 qca->sync = QCASPI_SYNC_UNKNOWN; 538 qca->stats.bad_signature++; 539 netdev_dbg(qca->net_dev, "sync: bad signature, restart\n"); 540 /* don't reset right away */ 541 return; 542 } 543 break; 544 case QCASPI_SYNC_UNKNOWN: 545 /* Read signature, if not valid stay in unknown state */ 546 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 547 if (signature != QCASPI_GOOD_SIGNATURE) { 548 netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n"); 549 return; 550 } 551 552 /* TODO: use GPIO to reset QCA7000 in legacy mode*/ 553 netdev_dbg(qca->net_dev, "sync: resetting device.\n"); 554 qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config); 555 spi_config |= QCASPI_SLAVE_RESET_BIT; 556 qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0); 557 558 qca->sync = QCASPI_SYNC_RESET; 559 qca->stats.trig_reset++; 560 qca->reset_count = 0; 561 break; 562 case QCASPI_SYNC_RESET: 563 qca->reset_count++; 564 netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n", 565 qca->reset_count); 566 if (qca->reset_count >= QCASPI_RESET_TIMEOUT) { 567 /* reset did not seem to take place, try again */ 568 qca->sync = QCASPI_SYNC_UNKNOWN; 569 qca->stats.reset_timeout++; 570 netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n"); 571 } 572 break; 573 } 574 } 575 576 static int 577 qcaspi_spi_thread(void *data) 578 { 579 struct qcaspi *qca = data; 580 u16 intr_cause = 0; 581 582 netdev_info(qca->net_dev, "SPI thread created\n"); 583 while (!kthread_should_stop()) { 584 set_current_state(TASK_INTERRUPTIBLE); 585 if (kthread_should_park()) { 586 netif_tx_disable(qca->net_dev); 587 netif_carrier_off(qca->net_dev); 588 qcaspi_flush_tx_ring(qca); 589 kthread_parkme(); 590 if (qca->sync == QCASPI_SYNC_READY) { 591 netif_carrier_on(qca->net_dev); 592 netif_wake_queue(qca->net_dev); 593 } 594 continue; 595 } 596 597 if (!test_bit(SPI_INTR, &qca->intr) && 598 !qca->txr.skb[qca->txr.head]) 599 schedule(); 600 601 set_current_state(TASK_RUNNING); 602 603 netdev_dbg(qca->net_dev, "have work to do. int: %lu, tx_skb: %p\n", 604 qca->intr, 605 qca->txr.skb[qca->txr.head]); 606 607 qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE); 608 609 if (qca->sync != QCASPI_SYNC_READY) { 610 netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n", 611 (unsigned int)qca->sync); 612 netif_stop_queue(qca->net_dev); 613 netif_carrier_off(qca->net_dev); 614 qcaspi_flush_tx_ring(qca); 615 msleep(QCASPI_QCA7K_REBOOT_TIME_MS); 616 } 617 618 if (test_and_clear_bit(SPI_INTR, &qca->intr)) { 619 start_spi_intr_handling(qca, &intr_cause); 620 621 if (intr_cause & SPI_INT_CPU_ON) { 622 qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON); 623 624 /* Frame decoding in progress */ 625 if (qca->frm_handle.state != qca->frm_handle.init) 626 qca->net_dev->stats.rx_dropped++; 627 628 qcafrm_fsm_init_spi(&qca->frm_handle); 629 qca->stats.device_reset++; 630 631 /* not synced. */ 632 if (qca->sync != QCASPI_SYNC_READY) 633 continue; 634 635 netif_wake_queue(qca->net_dev); 636 netif_carrier_on(qca->net_dev); 637 } 638 639 if (intr_cause & SPI_INT_RDBUF_ERR) { 640 /* restart sync */ 641 netdev_dbg(qca->net_dev, "===> rdbuf error!\n"); 642 qca->stats.read_buf_err++; 643 qca->sync = QCASPI_SYNC_UNKNOWN; 644 continue; 645 } 646 647 if (intr_cause & SPI_INT_WRBUF_ERR) { 648 /* restart sync */ 649 netdev_dbg(qca->net_dev, "===> wrbuf error!\n"); 650 qca->stats.write_buf_err++; 651 qca->sync = QCASPI_SYNC_UNKNOWN; 652 continue; 653 } 654 655 /* can only handle other interrupts 656 * if sync has occurred 657 */ 658 if (qca->sync == QCASPI_SYNC_READY) { 659 if (intr_cause & SPI_INT_PKT_AVLBL) 660 qcaspi_receive(qca); 661 } 662 663 end_spi_intr_handling(qca, intr_cause); 664 } 665 666 if (qca->sync == QCASPI_SYNC_READY) 667 qcaspi_transmit(qca); 668 } 669 set_current_state(TASK_RUNNING); 670 netdev_info(qca->net_dev, "SPI thread exit\n"); 671 672 return 0; 673 } 674 675 static irqreturn_t 676 qcaspi_intr_handler(int irq, void *data) 677 { 678 struct qcaspi *qca = data; 679 680 set_bit(SPI_INTR, &qca->intr); 681 if (qca->spi_thread) 682 wake_up_process(qca->spi_thread); 683 684 return IRQ_HANDLED; 685 } 686 687 static int 688 qcaspi_netdev_open(struct net_device *dev) 689 { 690 struct qcaspi *qca = netdev_priv(dev); 691 int ret = 0; 692 693 if (!qca) 694 return -EINVAL; 695 696 set_bit(SPI_INTR, &qca->intr); 697 qca->sync = QCASPI_SYNC_UNKNOWN; 698 qcafrm_fsm_init_spi(&qca->frm_handle); 699 700 qca->spi_thread = kthread_run((void *)qcaspi_spi_thread, 701 qca, "%s", dev->name); 702 703 if (IS_ERR(qca->spi_thread)) { 704 netdev_err(dev, "%s: unable to start kernel thread.\n", 705 QCASPI_DRV_NAME); 706 return PTR_ERR(qca->spi_thread); 707 } 708 709 ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0, 710 dev->name, qca); 711 if (ret) { 712 netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n", 713 QCASPI_DRV_NAME, qca->spi_dev->irq, ret); 714 kthread_stop(qca->spi_thread); 715 return ret; 716 } 717 718 /* SPI thread takes care of TX queue */ 719 720 return 0; 721 } 722 723 static int 724 qcaspi_netdev_close(struct net_device *dev) 725 { 726 struct qcaspi *qca = netdev_priv(dev); 727 728 netif_stop_queue(dev); 729 730 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 731 free_irq(qca->spi_dev->irq, qca); 732 733 kthread_stop(qca->spi_thread); 734 qca->spi_thread = NULL; 735 qcaspi_flush_tx_ring(qca); 736 737 return 0; 738 } 739 740 static netdev_tx_t 741 qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev) 742 { 743 u32 frame_len; 744 u8 *ptmp; 745 struct qcaspi *qca = netdev_priv(dev); 746 u16 new_tail; 747 struct sk_buff *tskb; 748 u8 pad_len = 0; 749 750 if (skb->len < QCAFRM_MIN_LEN) 751 pad_len = QCAFRM_MIN_LEN - skb->len; 752 753 if (qca->txr.skb[qca->txr.tail]) { 754 netdev_warn(qca->net_dev, "queue was unexpectedly full!\n"); 755 netif_stop_queue(qca->net_dev); 756 qca->stats.ring_full++; 757 return NETDEV_TX_BUSY; 758 } 759 760 if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) || 761 (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) { 762 tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN, 763 QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC); 764 if (!tskb) { 765 qca->stats.out_of_mem++; 766 return NETDEV_TX_BUSY; 767 } 768 dev_kfree_skb(skb); 769 skb = tskb; 770 } 771 772 frame_len = skb->len + pad_len; 773 774 ptmp = skb_push(skb, QCAFRM_HEADER_LEN); 775 qcafrm_create_header(ptmp, frame_len); 776 777 if (pad_len) { 778 ptmp = skb_put_zero(skb, pad_len); 779 } 780 781 ptmp = skb_put(skb, QCAFRM_FOOTER_LEN); 782 qcafrm_create_footer(ptmp); 783 784 netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n", 785 skb->len); 786 787 qca->txr.size += skb->len + QCASPI_HW_PKT_LEN; 788 789 new_tail = qca->txr.tail + 1; 790 if (new_tail >= qca->txr.count) 791 new_tail = 0; 792 793 qca->txr.skb[qca->txr.tail] = skb; 794 qca->txr.tail = new_tail; 795 796 if (!qcaspi_tx_ring_has_space(&qca->txr)) { 797 netif_stop_queue(qca->net_dev); 798 qca->stats.ring_full++; 799 } 800 801 netif_trans_update(dev); 802 803 if (qca->spi_thread) 804 wake_up_process(qca->spi_thread); 805 806 return NETDEV_TX_OK; 807 } 808 809 static void 810 qcaspi_netdev_tx_timeout(struct net_device *dev, unsigned int txqueue) 811 { 812 struct qcaspi *qca = netdev_priv(dev); 813 814 netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n", 815 jiffies, jiffies - dev_trans_start(dev)); 816 qca->net_dev->stats.tx_errors++; 817 /* Trigger tx queue flush and QCA7000 reset */ 818 qca->sync = QCASPI_SYNC_UNKNOWN; 819 820 if (qca->spi_thread) 821 wake_up_process(qca->spi_thread); 822 } 823 824 static int 825 qcaspi_netdev_init(struct net_device *dev) 826 { 827 struct qcaspi *qca = netdev_priv(dev); 828 829 dev->mtu = QCAFRM_MAX_MTU; 830 dev->type = ARPHRD_ETHER; 831 qca->clkspeed = qcaspi_clkspeed; 832 qca->burst_len = qcaspi_burst_len; 833 qca->spi_thread = NULL; 834 qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN + 835 QCAFRM_FOOTER_LEN + 4) * 4; 836 837 memset(&qca->stats, 0, sizeof(struct qcaspi_stats)); 838 839 qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL); 840 if (!qca->rx_buffer) 841 return -ENOBUFS; 842 843 qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu + 844 VLAN_ETH_HLEN); 845 if (!qca->rx_skb) { 846 kfree(qca->rx_buffer); 847 netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n"); 848 return -ENOBUFS; 849 } 850 851 return 0; 852 } 853 854 static void 855 qcaspi_netdev_uninit(struct net_device *dev) 856 { 857 struct qcaspi *qca = netdev_priv(dev); 858 859 kfree(qca->rx_buffer); 860 qca->buffer_size = 0; 861 dev_kfree_skb(qca->rx_skb); 862 } 863 864 static const struct net_device_ops qcaspi_netdev_ops = { 865 .ndo_init = qcaspi_netdev_init, 866 .ndo_uninit = qcaspi_netdev_uninit, 867 .ndo_open = qcaspi_netdev_open, 868 .ndo_stop = qcaspi_netdev_close, 869 .ndo_start_xmit = qcaspi_netdev_xmit, 870 .ndo_set_mac_address = eth_mac_addr, 871 .ndo_tx_timeout = qcaspi_netdev_tx_timeout, 872 .ndo_validate_addr = eth_validate_addr, 873 }; 874 875 static void 876 qcaspi_netdev_setup(struct net_device *dev) 877 { 878 struct qcaspi *qca = NULL; 879 880 dev->netdev_ops = &qcaspi_netdev_ops; 881 qcaspi_set_ethtool_ops(dev); 882 dev->watchdog_timeo = QCASPI_TX_TIMEOUT; 883 dev->priv_flags &= ~IFF_TX_SKB_SHARING; 884 dev->tx_queue_len = 100; 885 886 /* MTU range: 46 - 1500 */ 887 dev->min_mtu = QCAFRM_MIN_MTU; 888 dev->max_mtu = QCAFRM_MAX_MTU; 889 890 qca = netdev_priv(dev); 891 memset(qca, 0, sizeof(struct qcaspi)); 892 893 memset(&qca->txr, 0, sizeof(qca->txr)); 894 qca->txr.count = TX_RING_MAX_LEN; 895 } 896 897 static const struct of_device_id qca_spi_of_match[] = { 898 { .compatible = "qca,qca7000" }, 899 { /* sentinel */ } 900 }; 901 MODULE_DEVICE_TABLE(of, qca_spi_of_match); 902 903 static int 904 qca_spi_probe(struct spi_device *spi) 905 { 906 struct qcaspi *qca = NULL; 907 struct net_device *qcaspi_devs = NULL; 908 u8 legacy_mode = 0; 909 u16 signature; 910 int ret; 911 912 if (!spi->dev.of_node) { 913 dev_err(&spi->dev, "Missing device tree\n"); 914 return -EINVAL; 915 } 916 917 legacy_mode = of_property_read_bool(spi->dev.of_node, 918 "qca,legacy-mode"); 919 920 if (qcaspi_clkspeed == 0) { 921 if (spi->max_speed_hz) 922 qcaspi_clkspeed = spi->max_speed_hz; 923 else 924 qcaspi_clkspeed = QCASPI_CLK_SPEED; 925 } 926 927 if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) || 928 (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) { 929 dev_err(&spi->dev, "Invalid clkspeed: %d\n", 930 qcaspi_clkspeed); 931 return -EINVAL; 932 } 933 934 if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) || 935 (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) { 936 dev_err(&spi->dev, "Invalid burst len: %d\n", 937 qcaspi_burst_len); 938 return -EINVAL; 939 } 940 941 if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) || 942 (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) { 943 dev_err(&spi->dev, "Invalid pluggable: %d\n", 944 qcaspi_pluggable); 945 return -EINVAL; 946 } 947 948 if (wr_verify < QCASPI_WRITE_VERIFY_MIN || 949 wr_verify > QCASPI_WRITE_VERIFY_MAX) { 950 dev_err(&spi->dev, "Invalid write verify: %d\n", 951 wr_verify); 952 return -EINVAL; 953 } 954 955 dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n", 956 QCASPI_DRV_VERSION, 957 qcaspi_clkspeed, 958 qcaspi_burst_len, 959 qcaspi_pluggable); 960 961 spi->mode = SPI_MODE_3; 962 spi->max_speed_hz = qcaspi_clkspeed; 963 if (spi_setup(spi) < 0) { 964 dev_err(&spi->dev, "Unable to setup SPI device\n"); 965 return -EFAULT; 966 } 967 968 qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi)); 969 if (!qcaspi_devs) 970 return -ENOMEM; 971 972 qcaspi_netdev_setup(qcaspi_devs); 973 SET_NETDEV_DEV(qcaspi_devs, &spi->dev); 974 975 qca = netdev_priv(qcaspi_devs); 976 if (!qca) { 977 free_netdev(qcaspi_devs); 978 dev_err(&spi->dev, "Fail to retrieve private structure\n"); 979 return -ENOMEM; 980 } 981 qca->net_dev = qcaspi_devs; 982 qca->spi_dev = spi; 983 qca->legacy_mode = legacy_mode; 984 985 spi_set_drvdata(spi, qcaspi_devs); 986 987 ret = of_get_ethdev_address(spi->dev.of_node, qca->net_dev); 988 if (ret) { 989 eth_hw_addr_random(qca->net_dev); 990 dev_info(&spi->dev, "Using random MAC address: %pM\n", 991 qca->net_dev->dev_addr); 992 } 993 994 netif_carrier_off(qca->net_dev); 995 996 if (!qcaspi_pluggable) { 997 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 998 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 999 1000 if (signature != QCASPI_GOOD_SIGNATURE) { 1001 dev_err(&spi->dev, "Invalid signature (0x%04X)\n", 1002 signature); 1003 free_netdev(qcaspi_devs); 1004 return -EFAULT; 1005 } 1006 } 1007 1008 if (register_netdev(qcaspi_devs)) { 1009 dev_err(&spi->dev, "Unable to register net device %s\n", 1010 qcaspi_devs->name); 1011 free_netdev(qcaspi_devs); 1012 return -EFAULT; 1013 } 1014 1015 qcaspi_init_device_debugfs(qca); 1016 1017 return 0; 1018 } 1019 1020 static void 1021 qca_spi_remove(struct spi_device *spi) 1022 { 1023 struct net_device *qcaspi_devs = spi_get_drvdata(spi); 1024 struct qcaspi *qca = netdev_priv(qcaspi_devs); 1025 1026 qcaspi_remove_device_debugfs(qca); 1027 1028 unregister_netdev(qcaspi_devs); 1029 free_netdev(qcaspi_devs); 1030 } 1031 1032 static const struct spi_device_id qca_spi_id[] = { 1033 { "qca7000", 0 }, 1034 { /* sentinel */ } 1035 }; 1036 MODULE_DEVICE_TABLE(spi, qca_spi_id); 1037 1038 static struct spi_driver qca_spi_driver = { 1039 .driver = { 1040 .name = QCASPI_DRV_NAME, 1041 .of_match_table = qca_spi_of_match, 1042 }, 1043 .id_table = qca_spi_id, 1044 .probe = qca_spi_probe, 1045 .remove = qca_spi_remove, 1046 }; 1047 module_spi_driver(qca_spi_driver); 1048 1049 MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver"); 1050 MODULE_AUTHOR("Qualcomm Atheros Communications"); 1051 MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>"); 1052 MODULE_LICENSE("Dual BSD/GPL"); 1053 MODULE_VERSION(QCASPI_DRV_VERSION); 1054