1 /* 2 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc. 3 * Copyright (c) 2014, I2SE GmbH 4 * 5 * Permission to use, copy, modify, and/or distribute this software 6 * for any purpose with or without fee is hereby granted, provided 7 * that the above copyright notice and this permission notice appear 8 * in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL 13 * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR 14 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 15 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, 16 * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 17 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* This module implements the Qualcomm Atheros SPI protocol for 21 * kernel-based SPI device; it is essentially an Ethernet-to-SPI 22 * serial converter; 23 */ 24 25 #include <linux/errno.h> 26 #include <linux/etherdevice.h> 27 #include <linux/if_arp.h> 28 #include <linux/if_ether.h> 29 #include <linux/init.h> 30 #include <linux/interrupt.h> 31 #include <linux/jiffies.h> 32 #include <linux/kernel.h> 33 #include <linux/kthread.h> 34 #include <linux/module.h> 35 #include <linux/moduleparam.h> 36 #include <linux/netdevice.h> 37 #include <linux/of.h> 38 #include <linux/of_device.h> 39 #include <linux/of_net.h> 40 #include <linux/sched.h> 41 #include <linux/skbuff.h> 42 #include <linux/spi/spi.h> 43 #include <linux/types.h> 44 45 #include "qca_7k.h" 46 #include "qca_7k_common.h" 47 #include "qca_debug.h" 48 #include "qca_spi.h" 49 50 #define MAX_DMA_BURST_LEN 5000 51 52 /* Modules parameters */ 53 #define QCASPI_CLK_SPEED_MIN 1000000 54 #define QCASPI_CLK_SPEED_MAX 16000000 55 #define QCASPI_CLK_SPEED 8000000 56 static int qcaspi_clkspeed; 57 module_param(qcaspi_clkspeed, int, 0); 58 MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000."); 59 60 #define QCASPI_BURST_LEN_MIN 1 61 #define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN 62 static int qcaspi_burst_len = MAX_DMA_BURST_LEN; 63 module_param(qcaspi_burst_len, int, 0); 64 MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000."); 65 66 #define QCASPI_PLUGGABLE_MIN 0 67 #define QCASPI_PLUGGABLE_MAX 1 68 static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN; 69 module_param(qcaspi_pluggable, int, 0); 70 MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no)."); 71 72 #define QCASPI_WRITE_VERIFY_MIN 0 73 #define QCASPI_WRITE_VERIFY_MAX 3 74 static int wr_verify = QCASPI_WRITE_VERIFY_MIN; 75 module_param(wr_verify, int, 0); 76 MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3."); 77 78 #define QCASPI_TX_TIMEOUT (1 * HZ) 79 #define QCASPI_QCA7K_REBOOT_TIME_MS 1000 80 81 static void 82 start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause) 83 { 84 *intr_cause = 0; 85 86 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 87 qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 88 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); 89 } 90 91 static void 92 end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause) 93 { 94 u16 intr_enable = (SPI_INT_CPU_ON | 95 SPI_INT_PKT_AVLBL | 96 SPI_INT_RDBUF_ERR | 97 SPI_INT_WRBUF_ERR); 98 99 qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0); 100 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify); 101 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); 102 } 103 104 static u32 105 qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len) 106 { 107 __be16 cmd; 108 struct spi_message msg; 109 struct spi_transfer transfer[2]; 110 int ret; 111 112 memset(&transfer, 0, sizeof(transfer)); 113 spi_message_init(&msg); 114 115 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 116 transfer[0].tx_buf = &cmd; 117 transfer[0].len = QCASPI_CMD_LEN; 118 transfer[1].tx_buf = src; 119 transfer[1].len = len; 120 121 spi_message_add_tail(&transfer[0], &msg); 122 spi_message_add_tail(&transfer[1], &msg); 123 ret = spi_sync(qca->spi_dev, &msg); 124 125 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 126 qcaspi_spi_error(qca); 127 return 0; 128 } 129 130 return len; 131 } 132 133 static u32 134 qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) 135 { 136 struct spi_message msg; 137 struct spi_transfer transfer; 138 int ret; 139 140 memset(&transfer, 0, sizeof(transfer)); 141 spi_message_init(&msg); 142 143 transfer.tx_buf = src; 144 transfer.len = len; 145 146 spi_message_add_tail(&transfer, &msg); 147 ret = spi_sync(qca->spi_dev, &msg); 148 149 if (ret || (msg.actual_length != len)) { 150 qcaspi_spi_error(qca); 151 return 0; 152 } 153 154 return len; 155 } 156 157 static u32 158 qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len) 159 { 160 struct spi_message msg; 161 __be16 cmd; 162 struct spi_transfer transfer[2]; 163 int ret; 164 165 memset(&transfer, 0, sizeof(transfer)); 166 spi_message_init(&msg); 167 168 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 169 transfer[0].tx_buf = &cmd; 170 transfer[0].len = QCASPI_CMD_LEN; 171 transfer[1].rx_buf = dst; 172 transfer[1].len = len; 173 174 spi_message_add_tail(&transfer[0], &msg); 175 spi_message_add_tail(&transfer[1], &msg); 176 ret = spi_sync(qca->spi_dev, &msg); 177 178 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 179 qcaspi_spi_error(qca); 180 return 0; 181 } 182 183 return len; 184 } 185 186 static u32 187 qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len) 188 { 189 struct spi_message msg; 190 struct spi_transfer transfer; 191 int ret; 192 193 memset(&transfer, 0, sizeof(transfer)); 194 spi_message_init(&msg); 195 196 transfer.rx_buf = dst; 197 transfer.len = len; 198 199 spi_message_add_tail(&transfer, &msg); 200 ret = spi_sync(qca->spi_dev, &msg); 201 202 if (ret || (msg.actual_length != len)) { 203 qcaspi_spi_error(qca); 204 return 0; 205 } 206 207 return len; 208 } 209 210 static int 211 qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd) 212 { 213 __be16 tx_data; 214 struct spi_message msg; 215 struct spi_transfer transfer; 216 int ret; 217 218 memset(&transfer, 0, sizeof(transfer)); 219 220 spi_message_init(&msg); 221 222 tx_data = cpu_to_be16(cmd); 223 transfer.len = sizeof(cmd); 224 transfer.tx_buf = &tx_data; 225 spi_message_add_tail(&transfer, &msg); 226 227 ret = spi_sync(qca->spi_dev, &msg); 228 229 if (!ret) 230 ret = msg.status; 231 232 if (ret) 233 qcaspi_spi_error(qca); 234 235 return ret; 236 } 237 238 static int 239 qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb) 240 { 241 u32 count; 242 u32 written; 243 u32 offset; 244 u32 len; 245 246 len = skb->len; 247 248 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify); 249 if (qca->legacy_mode) 250 qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 251 252 offset = 0; 253 while (len) { 254 count = len; 255 if (count > qca->burst_len) 256 count = qca->burst_len; 257 258 if (qca->legacy_mode) { 259 written = qcaspi_write_legacy(qca, 260 skb->data + offset, 261 count); 262 } else { 263 written = qcaspi_write_burst(qca, 264 skb->data + offset, 265 count); 266 } 267 268 if (written != count) 269 return -1; 270 271 offset += count; 272 len -= count; 273 } 274 275 return 0; 276 } 277 278 static int 279 qcaspi_transmit(struct qcaspi *qca) 280 { 281 struct net_device_stats *n_stats = &qca->net_dev->stats; 282 u16 available = 0; 283 u32 pkt_len; 284 u16 new_head; 285 u16 packets = 0; 286 287 if (qca->txr.skb[qca->txr.head] == NULL) 288 return 0; 289 290 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available); 291 292 while (qca->txr.skb[qca->txr.head]) { 293 pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN; 294 295 if (available < pkt_len) { 296 if (packets == 0) 297 qca->stats.write_buf_miss++; 298 break; 299 } 300 301 if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) { 302 qca->stats.write_err++; 303 return -1; 304 } 305 306 packets++; 307 n_stats->tx_packets++; 308 n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len; 309 available -= pkt_len; 310 311 /* remove the skb from the queue */ 312 /* XXX After inconsistent lock states netif_tx_lock() 313 * has been replaced by netif_tx_lock_bh() and so on. 314 */ 315 netif_tx_lock_bh(qca->net_dev); 316 dev_kfree_skb(qca->txr.skb[qca->txr.head]); 317 qca->txr.skb[qca->txr.head] = NULL; 318 qca->txr.size -= pkt_len; 319 new_head = qca->txr.head + 1; 320 if (new_head >= qca->txr.count) 321 new_head = 0; 322 qca->txr.head = new_head; 323 if (netif_queue_stopped(qca->net_dev)) 324 netif_wake_queue(qca->net_dev); 325 netif_tx_unlock_bh(qca->net_dev); 326 } 327 328 return 0; 329 } 330 331 static int 332 qcaspi_receive(struct qcaspi *qca) 333 { 334 struct net_device *net_dev = qca->net_dev; 335 struct net_device_stats *n_stats = &net_dev->stats; 336 u16 available = 0; 337 u32 bytes_read; 338 u8 *cp; 339 340 /* Allocate rx SKB if we don't have one available. */ 341 if (!qca->rx_skb) { 342 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 343 net_dev->mtu + 344 VLAN_ETH_HLEN); 345 if (!qca->rx_skb) { 346 netdev_dbg(net_dev, "out of RX resources\n"); 347 qca->stats.out_of_mem++; 348 return -1; 349 } 350 } 351 352 /* Read the packet size. */ 353 qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available); 354 355 netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n", 356 available); 357 358 if (available == 0) { 359 netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n"); 360 return -1; 361 } 362 363 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify); 364 365 if (qca->legacy_mode) 366 qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 367 368 while (available) { 369 u32 count = available; 370 371 if (count > qca->burst_len) 372 count = qca->burst_len; 373 374 if (qca->legacy_mode) { 375 bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer, 376 count); 377 } else { 378 bytes_read = qcaspi_read_burst(qca, qca->rx_buffer, 379 count); 380 } 381 382 netdev_dbg(net_dev, "available: %d, byte read: %d\n", 383 available, bytes_read); 384 385 if (bytes_read) { 386 available -= bytes_read; 387 } else { 388 qca->stats.read_err++; 389 return -1; 390 } 391 392 cp = qca->rx_buffer; 393 394 while ((bytes_read--) && (qca->rx_skb)) { 395 s32 retcode; 396 397 retcode = qcafrm_fsm_decode(&qca->frm_handle, 398 qca->rx_skb->data, 399 skb_tailroom(qca->rx_skb), 400 *cp); 401 cp++; 402 switch (retcode) { 403 case QCAFRM_GATHER: 404 case QCAFRM_NOHEAD: 405 break; 406 case QCAFRM_NOTAIL: 407 netdev_dbg(net_dev, "no RX tail\n"); 408 n_stats->rx_errors++; 409 n_stats->rx_dropped++; 410 break; 411 case QCAFRM_INVLEN: 412 netdev_dbg(net_dev, "invalid RX length\n"); 413 n_stats->rx_errors++; 414 n_stats->rx_dropped++; 415 break; 416 default: 417 qca->rx_skb->dev = qca->net_dev; 418 n_stats->rx_packets++; 419 n_stats->rx_bytes += retcode; 420 skb_put(qca->rx_skb, retcode); 421 qca->rx_skb->protocol = eth_type_trans( 422 qca->rx_skb, qca->rx_skb->dev); 423 qca->rx_skb->ip_summed = CHECKSUM_UNNECESSARY; 424 netif_rx_ni(qca->rx_skb); 425 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 426 net_dev->mtu + VLAN_ETH_HLEN); 427 if (!qca->rx_skb) { 428 netdev_dbg(net_dev, "out of RX resources\n"); 429 n_stats->rx_errors++; 430 qca->stats.out_of_mem++; 431 break; 432 } 433 } 434 } 435 } 436 437 return 0; 438 } 439 440 /* Check that tx ring stores only so much bytes 441 * that fit into the internal QCA buffer. 442 */ 443 444 static int 445 qcaspi_tx_ring_has_space(struct tx_ring *txr) 446 { 447 if (txr->skb[txr->tail]) 448 return 0; 449 450 return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0; 451 } 452 453 /* Flush the tx ring. This function is only safe to 454 * call from the qcaspi_spi_thread. 455 */ 456 457 static void 458 qcaspi_flush_tx_ring(struct qcaspi *qca) 459 { 460 int i; 461 462 /* XXX After inconsistent lock states netif_tx_lock() 463 * has been replaced by netif_tx_lock_bh() and so on. 464 */ 465 netif_tx_lock_bh(qca->net_dev); 466 for (i = 0; i < TX_RING_MAX_LEN; i++) { 467 if (qca->txr.skb[i]) { 468 dev_kfree_skb(qca->txr.skb[i]); 469 qca->txr.skb[i] = NULL; 470 qca->net_dev->stats.tx_dropped++; 471 } 472 } 473 qca->txr.tail = 0; 474 qca->txr.head = 0; 475 qca->txr.size = 0; 476 netif_tx_unlock_bh(qca->net_dev); 477 } 478 479 static void 480 qcaspi_qca7k_sync(struct qcaspi *qca, int event) 481 { 482 u16 signature = 0; 483 u16 spi_config; 484 u16 wrbuf_space = 0; 485 static u16 reset_count; 486 487 if (event == QCASPI_EVENT_CPUON) { 488 /* Read signature twice, if not valid 489 * go back to unknown state. 490 */ 491 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 492 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 493 if (signature != QCASPI_GOOD_SIGNATURE) { 494 qca->sync = QCASPI_SYNC_UNKNOWN; 495 netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n"); 496 } else { 497 /* ensure that the WRBUF is empty */ 498 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, 499 &wrbuf_space); 500 if (wrbuf_space != QCASPI_HW_BUF_LEN) { 501 netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n"); 502 qca->sync = QCASPI_SYNC_UNKNOWN; 503 } else { 504 netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n"); 505 qca->sync = QCASPI_SYNC_READY; 506 return; 507 } 508 } 509 } 510 511 switch (qca->sync) { 512 case QCASPI_SYNC_READY: 513 /* Read signature, if not valid go to unknown state. */ 514 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 515 if (signature != QCASPI_GOOD_SIGNATURE) { 516 qca->sync = QCASPI_SYNC_UNKNOWN; 517 netdev_dbg(qca->net_dev, "sync: bad signature, restart\n"); 518 /* don't reset right away */ 519 return; 520 } 521 break; 522 case QCASPI_SYNC_UNKNOWN: 523 /* Read signature, if not valid stay in unknown state */ 524 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 525 if (signature != QCASPI_GOOD_SIGNATURE) { 526 netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n"); 527 return; 528 } 529 530 /* TODO: use GPIO to reset QCA7000 in legacy mode*/ 531 netdev_dbg(qca->net_dev, "sync: resetting device.\n"); 532 qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config); 533 spi_config |= QCASPI_SLAVE_RESET_BIT; 534 qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0); 535 536 qca->sync = QCASPI_SYNC_RESET; 537 qca->stats.trig_reset++; 538 reset_count = 0; 539 break; 540 case QCASPI_SYNC_RESET: 541 reset_count++; 542 netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n", 543 reset_count); 544 if (reset_count >= QCASPI_RESET_TIMEOUT) { 545 /* reset did not seem to take place, try again */ 546 qca->sync = QCASPI_SYNC_UNKNOWN; 547 qca->stats.reset_timeout++; 548 netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n"); 549 } 550 break; 551 } 552 } 553 554 static int 555 qcaspi_spi_thread(void *data) 556 { 557 struct qcaspi *qca = data; 558 u16 intr_cause = 0; 559 560 netdev_info(qca->net_dev, "SPI thread created\n"); 561 while (!kthread_should_stop()) { 562 set_current_state(TASK_INTERRUPTIBLE); 563 if ((qca->intr_req == qca->intr_svc) && 564 (qca->txr.skb[qca->txr.head] == NULL) && 565 (qca->sync == QCASPI_SYNC_READY)) 566 schedule(); 567 568 set_current_state(TASK_RUNNING); 569 570 netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n", 571 qca->intr_req - qca->intr_svc, 572 qca->txr.skb[qca->txr.head]); 573 574 qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE); 575 576 if (qca->sync != QCASPI_SYNC_READY) { 577 netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n", 578 (unsigned int)qca->sync); 579 netif_stop_queue(qca->net_dev); 580 netif_carrier_off(qca->net_dev); 581 qcaspi_flush_tx_ring(qca); 582 msleep(QCASPI_QCA7K_REBOOT_TIME_MS); 583 } 584 585 if (qca->intr_svc != qca->intr_req) { 586 qca->intr_svc = qca->intr_req; 587 start_spi_intr_handling(qca, &intr_cause); 588 589 if (intr_cause & SPI_INT_CPU_ON) { 590 qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON); 591 592 /* not synced. */ 593 if (qca->sync != QCASPI_SYNC_READY) 594 continue; 595 596 qca->stats.device_reset++; 597 netif_wake_queue(qca->net_dev); 598 netif_carrier_on(qca->net_dev); 599 } 600 601 if (intr_cause & SPI_INT_RDBUF_ERR) { 602 /* restart sync */ 603 netdev_dbg(qca->net_dev, "===> rdbuf error!\n"); 604 qca->stats.read_buf_err++; 605 qca->sync = QCASPI_SYNC_UNKNOWN; 606 continue; 607 } 608 609 if (intr_cause & SPI_INT_WRBUF_ERR) { 610 /* restart sync */ 611 netdev_dbg(qca->net_dev, "===> wrbuf error!\n"); 612 qca->stats.write_buf_err++; 613 qca->sync = QCASPI_SYNC_UNKNOWN; 614 continue; 615 } 616 617 /* can only handle other interrupts 618 * if sync has occurred 619 */ 620 if (qca->sync == QCASPI_SYNC_READY) { 621 if (intr_cause & SPI_INT_PKT_AVLBL) 622 qcaspi_receive(qca); 623 } 624 625 end_spi_intr_handling(qca, intr_cause); 626 } 627 628 if (qca->sync == QCASPI_SYNC_READY) 629 qcaspi_transmit(qca); 630 } 631 set_current_state(TASK_RUNNING); 632 netdev_info(qca->net_dev, "SPI thread exit\n"); 633 634 return 0; 635 } 636 637 static irqreturn_t 638 qcaspi_intr_handler(int irq, void *data) 639 { 640 struct qcaspi *qca = data; 641 642 qca->intr_req++; 643 if (qca->spi_thread && 644 qca->spi_thread->state != TASK_RUNNING) 645 wake_up_process(qca->spi_thread); 646 647 return IRQ_HANDLED; 648 } 649 650 static int 651 qcaspi_netdev_open(struct net_device *dev) 652 { 653 struct qcaspi *qca = netdev_priv(dev); 654 int ret = 0; 655 656 if (!qca) 657 return -EINVAL; 658 659 qca->intr_req = 1; 660 qca->intr_svc = 0; 661 qca->sync = QCASPI_SYNC_UNKNOWN; 662 qcafrm_fsm_init_spi(&qca->frm_handle); 663 664 qca->spi_thread = kthread_run((void *)qcaspi_spi_thread, 665 qca, "%s", dev->name); 666 667 if (IS_ERR(qca->spi_thread)) { 668 netdev_err(dev, "%s: unable to start kernel thread.\n", 669 QCASPI_DRV_NAME); 670 return PTR_ERR(qca->spi_thread); 671 } 672 673 ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0, 674 dev->name, qca); 675 if (ret) { 676 netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n", 677 QCASPI_DRV_NAME, qca->spi_dev->irq, ret); 678 kthread_stop(qca->spi_thread); 679 return ret; 680 } 681 682 /* SPI thread takes care of TX queue */ 683 684 return 0; 685 } 686 687 static int 688 qcaspi_netdev_close(struct net_device *dev) 689 { 690 struct qcaspi *qca = netdev_priv(dev); 691 692 netif_stop_queue(dev); 693 694 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 695 free_irq(qca->spi_dev->irq, qca); 696 697 kthread_stop(qca->spi_thread); 698 qca->spi_thread = NULL; 699 qcaspi_flush_tx_ring(qca); 700 701 return 0; 702 } 703 704 static netdev_tx_t 705 qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev) 706 { 707 u32 frame_len; 708 u8 *ptmp; 709 struct qcaspi *qca = netdev_priv(dev); 710 u16 new_tail; 711 struct sk_buff *tskb; 712 u8 pad_len = 0; 713 714 if (skb->len < QCAFRM_MIN_LEN) 715 pad_len = QCAFRM_MIN_LEN - skb->len; 716 717 if (qca->txr.skb[qca->txr.tail]) { 718 netdev_warn(qca->net_dev, "queue was unexpectedly full!\n"); 719 netif_stop_queue(qca->net_dev); 720 qca->stats.ring_full++; 721 return NETDEV_TX_BUSY; 722 } 723 724 if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) || 725 (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) { 726 tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN, 727 QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC); 728 if (!tskb) { 729 qca->stats.out_of_mem++; 730 return NETDEV_TX_BUSY; 731 } 732 dev_kfree_skb(skb); 733 skb = tskb; 734 } 735 736 frame_len = skb->len + pad_len; 737 738 ptmp = skb_push(skb, QCAFRM_HEADER_LEN); 739 qcafrm_create_header(ptmp, frame_len); 740 741 if (pad_len) { 742 ptmp = skb_put_zero(skb, pad_len); 743 } 744 745 ptmp = skb_put(skb, QCAFRM_FOOTER_LEN); 746 qcafrm_create_footer(ptmp); 747 748 netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n", 749 skb->len); 750 751 qca->txr.size += skb->len + QCASPI_HW_PKT_LEN; 752 753 new_tail = qca->txr.tail + 1; 754 if (new_tail >= qca->txr.count) 755 new_tail = 0; 756 757 qca->txr.skb[qca->txr.tail] = skb; 758 qca->txr.tail = new_tail; 759 760 if (!qcaspi_tx_ring_has_space(&qca->txr)) { 761 netif_stop_queue(qca->net_dev); 762 qca->stats.ring_full++; 763 } 764 765 netif_trans_update(dev); 766 767 if (qca->spi_thread && 768 qca->spi_thread->state != TASK_RUNNING) 769 wake_up_process(qca->spi_thread); 770 771 return NETDEV_TX_OK; 772 } 773 774 static void 775 qcaspi_netdev_tx_timeout(struct net_device *dev) 776 { 777 struct qcaspi *qca = netdev_priv(dev); 778 779 netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n", 780 jiffies, jiffies - dev_trans_start(dev)); 781 qca->net_dev->stats.tx_errors++; 782 /* Trigger tx queue flush and QCA7000 reset */ 783 qca->sync = QCASPI_SYNC_UNKNOWN; 784 785 if (qca->spi_thread) 786 wake_up_process(qca->spi_thread); 787 } 788 789 static int 790 qcaspi_netdev_init(struct net_device *dev) 791 { 792 struct qcaspi *qca = netdev_priv(dev); 793 794 dev->mtu = QCAFRM_MAX_MTU; 795 dev->type = ARPHRD_ETHER; 796 qca->clkspeed = qcaspi_clkspeed; 797 qca->burst_len = qcaspi_burst_len; 798 qca->spi_thread = NULL; 799 qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN + 800 QCAFRM_FOOTER_LEN + 4) * 4; 801 802 memset(&qca->stats, 0, sizeof(struct qcaspi_stats)); 803 804 qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL); 805 if (!qca->rx_buffer) 806 return -ENOBUFS; 807 808 qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu + 809 VLAN_ETH_HLEN); 810 if (!qca->rx_skb) { 811 kfree(qca->rx_buffer); 812 netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n"); 813 return -ENOBUFS; 814 } 815 816 return 0; 817 } 818 819 static void 820 qcaspi_netdev_uninit(struct net_device *dev) 821 { 822 struct qcaspi *qca = netdev_priv(dev); 823 824 kfree(qca->rx_buffer); 825 qca->buffer_size = 0; 826 if (qca->rx_skb) 827 dev_kfree_skb(qca->rx_skb); 828 } 829 830 static const struct net_device_ops qcaspi_netdev_ops = { 831 .ndo_init = qcaspi_netdev_init, 832 .ndo_uninit = qcaspi_netdev_uninit, 833 .ndo_open = qcaspi_netdev_open, 834 .ndo_stop = qcaspi_netdev_close, 835 .ndo_start_xmit = qcaspi_netdev_xmit, 836 .ndo_set_mac_address = eth_mac_addr, 837 .ndo_tx_timeout = qcaspi_netdev_tx_timeout, 838 .ndo_validate_addr = eth_validate_addr, 839 }; 840 841 static void 842 qcaspi_netdev_setup(struct net_device *dev) 843 { 844 struct qcaspi *qca = NULL; 845 846 dev->netdev_ops = &qcaspi_netdev_ops; 847 qcaspi_set_ethtool_ops(dev); 848 dev->watchdog_timeo = QCASPI_TX_TIMEOUT; 849 dev->priv_flags &= ~IFF_TX_SKB_SHARING; 850 dev->tx_queue_len = 100; 851 852 /* MTU range: 46 - 1500 */ 853 dev->min_mtu = QCAFRM_MIN_MTU; 854 dev->max_mtu = QCAFRM_MAX_MTU; 855 856 qca = netdev_priv(dev); 857 memset(qca, 0, sizeof(struct qcaspi)); 858 859 memset(&qca->txr, 0, sizeof(qca->txr)); 860 qca->txr.count = TX_RING_MAX_LEN; 861 } 862 863 static const struct of_device_id qca_spi_of_match[] = { 864 { .compatible = "qca,qca7000" }, 865 { /* sentinel */ } 866 }; 867 MODULE_DEVICE_TABLE(of, qca_spi_of_match); 868 869 static int 870 qca_spi_probe(struct spi_device *spi) 871 { 872 struct qcaspi *qca = NULL; 873 struct net_device *qcaspi_devs = NULL; 874 u8 legacy_mode = 0; 875 u16 signature; 876 const char *mac; 877 878 if (!spi->dev.of_node) { 879 dev_err(&spi->dev, "Missing device tree\n"); 880 return -EINVAL; 881 } 882 883 legacy_mode = of_property_read_bool(spi->dev.of_node, 884 "qca,legacy-mode"); 885 886 if (qcaspi_clkspeed == 0) { 887 if (spi->max_speed_hz) 888 qcaspi_clkspeed = spi->max_speed_hz; 889 else 890 qcaspi_clkspeed = QCASPI_CLK_SPEED; 891 } 892 893 if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) || 894 (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) { 895 dev_err(&spi->dev, "Invalid clkspeed: %d\n", 896 qcaspi_clkspeed); 897 return -EINVAL; 898 } 899 900 if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) || 901 (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) { 902 dev_err(&spi->dev, "Invalid burst len: %d\n", 903 qcaspi_burst_len); 904 return -EINVAL; 905 } 906 907 if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) || 908 (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) { 909 dev_err(&spi->dev, "Invalid pluggable: %d\n", 910 qcaspi_pluggable); 911 return -EINVAL; 912 } 913 914 if (wr_verify < QCASPI_WRITE_VERIFY_MIN || 915 wr_verify > QCASPI_WRITE_VERIFY_MAX) { 916 dev_err(&spi->dev, "Invalid write verify: %d\n", 917 wr_verify); 918 return -EINVAL; 919 } 920 921 dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n", 922 QCASPI_DRV_VERSION, 923 qcaspi_clkspeed, 924 qcaspi_burst_len, 925 qcaspi_pluggable); 926 927 spi->mode = SPI_MODE_3; 928 spi->max_speed_hz = qcaspi_clkspeed; 929 if (spi_setup(spi) < 0) { 930 dev_err(&spi->dev, "Unable to setup SPI device\n"); 931 return -EFAULT; 932 } 933 934 qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi)); 935 if (!qcaspi_devs) 936 return -ENOMEM; 937 938 qcaspi_netdev_setup(qcaspi_devs); 939 SET_NETDEV_DEV(qcaspi_devs, &spi->dev); 940 941 qca = netdev_priv(qcaspi_devs); 942 if (!qca) { 943 free_netdev(qcaspi_devs); 944 dev_err(&spi->dev, "Fail to retrieve private structure\n"); 945 return -ENOMEM; 946 } 947 qca->net_dev = qcaspi_devs; 948 qca->spi_dev = spi; 949 qca->legacy_mode = legacy_mode; 950 951 spi_set_drvdata(spi, qcaspi_devs); 952 953 mac = of_get_mac_address(spi->dev.of_node); 954 955 if (mac) 956 ether_addr_copy(qca->net_dev->dev_addr, mac); 957 958 if (!is_valid_ether_addr(qca->net_dev->dev_addr)) { 959 eth_hw_addr_random(qca->net_dev); 960 dev_info(&spi->dev, "Using random MAC address: %pM\n", 961 qca->net_dev->dev_addr); 962 } 963 964 netif_carrier_off(qca->net_dev); 965 966 if (!qcaspi_pluggable) { 967 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 968 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 969 970 if (signature != QCASPI_GOOD_SIGNATURE) { 971 dev_err(&spi->dev, "Invalid signature (0x%04X)\n", 972 signature); 973 free_netdev(qcaspi_devs); 974 return -EFAULT; 975 } 976 } 977 978 if (register_netdev(qcaspi_devs)) { 979 dev_err(&spi->dev, "Unable to register net device %s\n", 980 qcaspi_devs->name); 981 free_netdev(qcaspi_devs); 982 return -EFAULT; 983 } 984 985 qcaspi_init_device_debugfs(qca); 986 987 return 0; 988 } 989 990 static int 991 qca_spi_remove(struct spi_device *spi) 992 { 993 struct net_device *qcaspi_devs = spi_get_drvdata(spi); 994 struct qcaspi *qca = netdev_priv(qcaspi_devs); 995 996 qcaspi_remove_device_debugfs(qca); 997 998 unregister_netdev(qcaspi_devs); 999 free_netdev(qcaspi_devs); 1000 1001 return 0; 1002 } 1003 1004 static const struct spi_device_id qca_spi_id[] = { 1005 { "qca7000", 0 }, 1006 { /* sentinel */ } 1007 }; 1008 MODULE_DEVICE_TABLE(spi, qca_spi_id); 1009 1010 static struct spi_driver qca_spi_driver = { 1011 .driver = { 1012 .name = QCASPI_DRV_NAME, 1013 .of_match_table = qca_spi_of_match, 1014 }, 1015 .id_table = qca_spi_id, 1016 .probe = qca_spi_probe, 1017 .remove = qca_spi_remove, 1018 }; 1019 module_spi_driver(qca_spi_driver); 1020 1021 MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver"); 1022 MODULE_AUTHOR("Qualcomm Atheros Communications"); 1023 MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>"); 1024 MODULE_LICENSE("Dual BSD/GPL"); 1025 MODULE_VERSION(QCASPI_DRV_VERSION); 1026