1 /*
2  *   Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
3  *   Copyright (c) 2014, I2SE GmbH
4  *
5  *   Permission to use, copy, modify, and/or distribute this software
6  *   for any purpose with or without fee is hereby granted, provided
7  *   that the above copyright notice and this permission notice appear
8  *   in all copies.
9  *
10  *   THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  *   WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  *   WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
13  *   THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
14  *   CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
15  *   LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
16  *   NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
17  *   CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 /*   This module implements the Qualcomm Atheros SPI protocol for
21  *   kernel-based SPI device; it is essentially an Ethernet-to-SPI
22  *   serial converter;
23  */
24 
25 #include <linux/errno.h>
26 #include <linux/etherdevice.h>
27 #include <linux/if_arp.h>
28 #include <linux/if_ether.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/jiffies.h>
32 #include <linux/kernel.h>
33 #include <linux/kthread.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/netdevice.h>
37 #include <linux/of.h>
38 #include <linux/of_device.h>
39 #include <linux/of_net.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/spi/spi.h>
43 #include <linux/types.h>
44 
45 #include "qca_7k.h"
46 #include "qca_7k_common.h"
47 #include "qca_debug.h"
48 #include "qca_spi.h"
49 
50 #define MAX_DMA_BURST_LEN 5000
51 
52 /*   Modules parameters     */
53 #define QCASPI_CLK_SPEED_MIN 1000000
54 #define QCASPI_CLK_SPEED_MAX 16000000
55 #define QCASPI_CLK_SPEED     8000000
56 static int qcaspi_clkspeed;
57 module_param(qcaspi_clkspeed, int, 0);
58 MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000.");
59 
60 #define QCASPI_BURST_LEN_MIN 1
61 #define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN
62 static int qcaspi_burst_len = MAX_DMA_BURST_LEN;
63 module_param(qcaspi_burst_len, int, 0);
64 MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000.");
65 
66 #define QCASPI_PLUGGABLE_MIN 0
67 #define QCASPI_PLUGGABLE_MAX 1
68 static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN;
69 module_param(qcaspi_pluggable, int, 0);
70 MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no).");
71 
72 #define QCASPI_WRITE_VERIFY_MIN 0
73 #define QCASPI_WRITE_VERIFY_MAX 3
74 static int wr_verify = QCASPI_WRITE_VERIFY_MIN;
75 module_param(wr_verify, int, 0);
76 MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3.");
77 
78 #define QCASPI_TX_TIMEOUT (1 * HZ)
79 #define QCASPI_QCA7K_REBOOT_TIME_MS 1000
80 
81 static void
82 start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause)
83 {
84 	*intr_cause = 0;
85 
86 	qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify);
87 	qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause);
88 	netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause);
89 }
90 
91 static void
92 end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause)
93 {
94 	u16 intr_enable = (SPI_INT_CPU_ON |
95 			   SPI_INT_PKT_AVLBL |
96 			   SPI_INT_RDBUF_ERR |
97 			   SPI_INT_WRBUF_ERR);
98 
99 	qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0);
100 	qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify);
101 	netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause);
102 }
103 
104 static u32
105 qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len)
106 {
107 	__be16 cmd;
108 	struct spi_message msg;
109 	struct spi_transfer transfer[2];
110 	int ret;
111 
112 	memset(&transfer, 0, sizeof(transfer));
113 	spi_message_init(&msg);
114 
115 	cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
116 	transfer[0].tx_buf = &cmd;
117 	transfer[0].len = QCASPI_CMD_LEN;
118 	transfer[1].tx_buf = src;
119 	transfer[1].len = len;
120 
121 	spi_message_add_tail(&transfer[0], &msg);
122 	spi_message_add_tail(&transfer[1], &msg);
123 	ret = spi_sync(qca->spi_dev, &msg);
124 
125 	if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) {
126 		qcaspi_spi_error(qca);
127 		return 0;
128 	}
129 
130 	return len;
131 }
132 
133 static u32
134 qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len)
135 {
136 	struct spi_message msg;
137 	struct spi_transfer transfer;
138 	int ret;
139 
140 	memset(&transfer, 0, sizeof(transfer));
141 	spi_message_init(&msg);
142 
143 	transfer.tx_buf = src;
144 	transfer.len = len;
145 
146 	spi_message_add_tail(&transfer, &msg);
147 	ret = spi_sync(qca->spi_dev, &msg);
148 
149 	if (ret || (msg.actual_length != len)) {
150 		qcaspi_spi_error(qca);
151 		return 0;
152 	}
153 
154 	return len;
155 }
156 
157 static u32
158 qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len)
159 {
160 	struct spi_message msg;
161 	__be16 cmd;
162 	struct spi_transfer transfer[2];
163 	int ret;
164 
165 	memset(&transfer, 0, sizeof(transfer));
166 	spi_message_init(&msg);
167 
168 	cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
169 	transfer[0].tx_buf = &cmd;
170 	transfer[0].len = QCASPI_CMD_LEN;
171 	transfer[1].rx_buf = dst;
172 	transfer[1].len = len;
173 
174 	spi_message_add_tail(&transfer[0], &msg);
175 	spi_message_add_tail(&transfer[1], &msg);
176 	ret = spi_sync(qca->spi_dev, &msg);
177 
178 	if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) {
179 		qcaspi_spi_error(qca);
180 		return 0;
181 	}
182 
183 	return len;
184 }
185 
186 static u32
187 qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len)
188 {
189 	struct spi_message msg;
190 	struct spi_transfer transfer;
191 	int ret;
192 
193 	memset(&transfer, 0, sizeof(transfer));
194 	spi_message_init(&msg);
195 
196 	transfer.rx_buf = dst;
197 	transfer.len = len;
198 
199 	spi_message_add_tail(&transfer, &msg);
200 	ret = spi_sync(qca->spi_dev, &msg);
201 
202 	if (ret || (msg.actual_length != len)) {
203 		qcaspi_spi_error(qca);
204 		return 0;
205 	}
206 
207 	return len;
208 }
209 
210 static int
211 qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd)
212 {
213 	__be16 tx_data;
214 	struct spi_message msg;
215 	struct spi_transfer transfer;
216 	int ret;
217 
218 	memset(&transfer, 0, sizeof(transfer));
219 
220 	spi_message_init(&msg);
221 
222 	tx_data = cpu_to_be16(cmd);
223 	transfer.len = sizeof(cmd);
224 	transfer.tx_buf = &tx_data;
225 	spi_message_add_tail(&transfer, &msg);
226 
227 	ret = spi_sync(qca->spi_dev, &msg);
228 
229 	if (!ret)
230 		ret = msg.status;
231 
232 	if (ret)
233 		qcaspi_spi_error(qca);
234 
235 	return ret;
236 }
237 
238 static int
239 qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb)
240 {
241 	u32 count;
242 	u32 written;
243 	u32 offset;
244 	u32 len;
245 
246 	len = skb->len;
247 
248 	qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify);
249 	if (qca->legacy_mode)
250 		qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
251 
252 	offset = 0;
253 	while (len) {
254 		count = len;
255 		if (count > qca->burst_len)
256 			count = qca->burst_len;
257 
258 		if (qca->legacy_mode) {
259 			written = qcaspi_write_legacy(qca,
260 						      skb->data + offset,
261 						      count);
262 		} else {
263 			written = qcaspi_write_burst(qca,
264 						     skb->data + offset,
265 						     count);
266 		}
267 
268 		if (written != count)
269 			return -1;
270 
271 		offset += count;
272 		len -= count;
273 	}
274 
275 	return 0;
276 }
277 
278 static int
279 qcaspi_transmit(struct qcaspi *qca)
280 {
281 	struct net_device_stats *n_stats = &qca->net_dev->stats;
282 	u16 available = 0;
283 	u32 pkt_len;
284 	u16 new_head;
285 	u16 packets = 0;
286 
287 	if (qca->txr.skb[qca->txr.head] == NULL)
288 		return 0;
289 
290 	qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available);
291 
292 	if (available > QCASPI_HW_BUF_LEN) {
293 		/* This could only happen by interferences on the SPI line.
294 		 * So retry later ...
295 		 */
296 		qca->stats.buf_avail_err++;
297 		return -1;
298 	}
299 
300 	while (qca->txr.skb[qca->txr.head]) {
301 		pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN;
302 
303 		if (available < pkt_len) {
304 			if (packets == 0)
305 				qca->stats.write_buf_miss++;
306 			break;
307 		}
308 
309 		if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) {
310 			qca->stats.write_err++;
311 			return -1;
312 		}
313 
314 		packets++;
315 		n_stats->tx_packets++;
316 		n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len;
317 		available -= pkt_len;
318 
319 		/* remove the skb from the queue */
320 		/* XXX After inconsistent lock states netif_tx_lock()
321 		 * has been replaced by netif_tx_lock_bh() and so on.
322 		 */
323 		netif_tx_lock_bh(qca->net_dev);
324 		dev_kfree_skb(qca->txr.skb[qca->txr.head]);
325 		qca->txr.skb[qca->txr.head] = NULL;
326 		qca->txr.size -= pkt_len;
327 		new_head = qca->txr.head + 1;
328 		if (new_head >= qca->txr.count)
329 			new_head = 0;
330 		qca->txr.head = new_head;
331 		if (netif_queue_stopped(qca->net_dev))
332 			netif_wake_queue(qca->net_dev);
333 		netif_tx_unlock_bh(qca->net_dev);
334 	}
335 
336 	return 0;
337 }
338 
339 static int
340 qcaspi_receive(struct qcaspi *qca)
341 {
342 	struct net_device *net_dev = qca->net_dev;
343 	struct net_device_stats *n_stats = &net_dev->stats;
344 	u16 available = 0;
345 	u32 bytes_read;
346 	u8 *cp;
347 
348 	/* Allocate rx SKB if we don't have one available. */
349 	if (!qca->rx_skb) {
350 		qca->rx_skb = netdev_alloc_skb_ip_align(net_dev,
351 							net_dev->mtu +
352 							VLAN_ETH_HLEN);
353 		if (!qca->rx_skb) {
354 			netdev_dbg(net_dev, "out of RX resources\n");
355 			qca->stats.out_of_mem++;
356 			return -1;
357 		}
358 	}
359 
360 	/* Read the packet size. */
361 	qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available);
362 
363 	netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n",
364 		   available);
365 
366 	if (available > QCASPI_HW_BUF_LEN) {
367 		/* This could only happen by interferences on the SPI line.
368 		 * So retry later ...
369 		 */
370 		qca->stats.buf_avail_err++;
371 		return -1;
372 	} else if (available == 0) {
373 		netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n");
374 		return -1;
375 	}
376 
377 	qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify);
378 
379 	if (qca->legacy_mode)
380 		qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
381 
382 	while (available) {
383 		u32 count = available;
384 
385 		if (count > qca->burst_len)
386 			count = qca->burst_len;
387 
388 		if (qca->legacy_mode) {
389 			bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer,
390 							count);
391 		} else {
392 			bytes_read = qcaspi_read_burst(qca, qca->rx_buffer,
393 						       count);
394 		}
395 
396 		netdev_dbg(net_dev, "available: %d, byte read: %d\n",
397 			   available, bytes_read);
398 
399 		if (bytes_read) {
400 			available -= bytes_read;
401 		} else {
402 			qca->stats.read_err++;
403 			return -1;
404 		}
405 
406 		cp = qca->rx_buffer;
407 
408 		while ((bytes_read--) && (qca->rx_skb)) {
409 			s32 retcode;
410 
411 			retcode = qcafrm_fsm_decode(&qca->frm_handle,
412 						    qca->rx_skb->data,
413 						    skb_tailroom(qca->rx_skb),
414 						    *cp);
415 			cp++;
416 			switch (retcode) {
417 			case QCAFRM_GATHER:
418 			case QCAFRM_NOHEAD:
419 				break;
420 			case QCAFRM_NOTAIL:
421 				netdev_dbg(net_dev, "no RX tail\n");
422 				n_stats->rx_errors++;
423 				n_stats->rx_dropped++;
424 				break;
425 			case QCAFRM_INVLEN:
426 				netdev_dbg(net_dev, "invalid RX length\n");
427 				n_stats->rx_errors++;
428 				n_stats->rx_dropped++;
429 				break;
430 			default:
431 				qca->rx_skb->dev = qca->net_dev;
432 				n_stats->rx_packets++;
433 				n_stats->rx_bytes += retcode;
434 				skb_put(qca->rx_skb, retcode);
435 				qca->rx_skb->protocol = eth_type_trans(
436 					qca->rx_skb, qca->rx_skb->dev);
437 				qca->rx_skb->ip_summed = CHECKSUM_UNNECESSARY;
438 				netif_rx_ni(qca->rx_skb);
439 				qca->rx_skb = netdev_alloc_skb_ip_align(net_dev,
440 					net_dev->mtu + VLAN_ETH_HLEN);
441 				if (!qca->rx_skb) {
442 					netdev_dbg(net_dev, "out of RX resources\n");
443 					n_stats->rx_errors++;
444 					qca->stats.out_of_mem++;
445 					break;
446 				}
447 			}
448 		}
449 	}
450 
451 	return 0;
452 }
453 
454 /*   Check that tx ring stores only so much bytes
455  *   that fit into the internal QCA buffer.
456  */
457 
458 static int
459 qcaspi_tx_ring_has_space(struct tx_ring *txr)
460 {
461 	if (txr->skb[txr->tail])
462 		return 0;
463 
464 	return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0;
465 }
466 
467 /*   Flush the tx ring. This function is only safe to
468  *   call from the qcaspi_spi_thread.
469  */
470 
471 static void
472 qcaspi_flush_tx_ring(struct qcaspi *qca)
473 {
474 	int i;
475 
476 	/* XXX After inconsistent lock states netif_tx_lock()
477 	 * has been replaced by netif_tx_lock_bh() and so on.
478 	 */
479 	netif_tx_lock_bh(qca->net_dev);
480 	for (i = 0; i < TX_RING_MAX_LEN; i++) {
481 		if (qca->txr.skb[i]) {
482 			dev_kfree_skb(qca->txr.skb[i]);
483 			qca->txr.skb[i] = NULL;
484 			qca->net_dev->stats.tx_dropped++;
485 		}
486 	}
487 	qca->txr.tail = 0;
488 	qca->txr.head = 0;
489 	qca->txr.size = 0;
490 	netif_tx_unlock_bh(qca->net_dev);
491 }
492 
493 static void
494 qcaspi_qca7k_sync(struct qcaspi *qca, int event)
495 {
496 	u16 signature = 0;
497 	u16 spi_config;
498 	u16 wrbuf_space = 0;
499 	static u16 reset_count;
500 
501 	if (event == QCASPI_EVENT_CPUON) {
502 		/* Read signature twice, if not valid
503 		 * go back to unknown state.
504 		 */
505 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
506 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
507 		if (signature != QCASPI_GOOD_SIGNATURE) {
508 			qca->sync = QCASPI_SYNC_UNKNOWN;
509 			netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n");
510 		} else {
511 			/* ensure that the WRBUF is empty */
512 			qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA,
513 					     &wrbuf_space);
514 			if (wrbuf_space != QCASPI_HW_BUF_LEN) {
515 				netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n");
516 				qca->sync = QCASPI_SYNC_UNKNOWN;
517 			} else {
518 				netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n");
519 				qca->sync = QCASPI_SYNC_READY;
520 				return;
521 			}
522 		}
523 	}
524 
525 	switch (qca->sync) {
526 	case QCASPI_SYNC_READY:
527 		/* Read signature, if not valid go to unknown state. */
528 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
529 		if (signature != QCASPI_GOOD_SIGNATURE) {
530 			qca->sync = QCASPI_SYNC_UNKNOWN;
531 			netdev_dbg(qca->net_dev, "sync: bad signature, restart\n");
532 			/* don't reset right away */
533 			return;
534 		}
535 		break;
536 	case QCASPI_SYNC_UNKNOWN:
537 		/* Read signature, if not valid stay in unknown state */
538 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
539 		if (signature != QCASPI_GOOD_SIGNATURE) {
540 			netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n");
541 			return;
542 		}
543 
544 		/* TODO: use GPIO to reset QCA7000 in legacy mode*/
545 		netdev_dbg(qca->net_dev, "sync: resetting device.\n");
546 		qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config);
547 		spi_config |= QCASPI_SLAVE_RESET_BIT;
548 		qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0);
549 
550 		qca->sync = QCASPI_SYNC_RESET;
551 		qca->stats.trig_reset++;
552 		reset_count = 0;
553 		break;
554 	case QCASPI_SYNC_RESET:
555 		reset_count++;
556 		netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n",
557 			   reset_count);
558 		if (reset_count >= QCASPI_RESET_TIMEOUT) {
559 			/* reset did not seem to take place, try again */
560 			qca->sync = QCASPI_SYNC_UNKNOWN;
561 			qca->stats.reset_timeout++;
562 			netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n");
563 		}
564 		break;
565 	}
566 }
567 
568 static int
569 qcaspi_spi_thread(void *data)
570 {
571 	struct qcaspi *qca = data;
572 	u16 intr_cause = 0;
573 
574 	netdev_info(qca->net_dev, "SPI thread created\n");
575 	while (!kthread_should_stop()) {
576 		set_current_state(TASK_INTERRUPTIBLE);
577 		if ((qca->intr_req == qca->intr_svc) &&
578 		    (qca->txr.skb[qca->txr.head] == NULL) &&
579 		    (qca->sync == QCASPI_SYNC_READY))
580 			schedule();
581 
582 		set_current_state(TASK_RUNNING);
583 
584 		netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n",
585 			   qca->intr_req - qca->intr_svc,
586 			   qca->txr.skb[qca->txr.head]);
587 
588 		qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE);
589 
590 		if (qca->sync != QCASPI_SYNC_READY) {
591 			netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n",
592 				   (unsigned int)qca->sync);
593 			netif_stop_queue(qca->net_dev);
594 			netif_carrier_off(qca->net_dev);
595 			qcaspi_flush_tx_ring(qca);
596 			msleep(QCASPI_QCA7K_REBOOT_TIME_MS);
597 		}
598 
599 		if (qca->intr_svc != qca->intr_req) {
600 			qca->intr_svc = qca->intr_req;
601 			start_spi_intr_handling(qca, &intr_cause);
602 
603 			if (intr_cause & SPI_INT_CPU_ON) {
604 				qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON);
605 
606 				/* not synced. */
607 				if (qca->sync != QCASPI_SYNC_READY)
608 					continue;
609 
610 				qca->stats.device_reset++;
611 				netif_wake_queue(qca->net_dev);
612 				netif_carrier_on(qca->net_dev);
613 			}
614 
615 			if (intr_cause & SPI_INT_RDBUF_ERR) {
616 				/* restart sync */
617 				netdev_dbg(qca->net_dev, "===> rdbuf error!\n");
618 				qca->stats.read_buf_err++;
619 				qca->sync = QCASPI_SYNC_UNKNOWN;
620 				continue;
621 			}
622 
623 			if (intr_cause & SPI_INT_WRBUF_ERR) {
624 				/* restart sync */
625 				netdev_dbg(qca->net_dev, "===> wrbuf error!\n");
626 				qca->stats.write_buf_err++;
627 				qca->sync = QCASPI_SYNC_UNKNOWN;
628 				continue;
629 			}
630 
631 			/* can only handle other interrupts
632 			 * if sync has occurred
633 			 */
634 			if (qca->sync == QCASPI_SYNC_READY) {
635 				if (intr_cause & SPI_INT_PKT_AVLBL)
636 					qcaspi_receive(qca);
637 			}
638 
639 			end_spi_intr_handling(qca, intr_cause);
640 		}
641 
642 		if (qca->sync == QCASPI_SYNC_READY)
643 			qcaspi_transmit(qca);
644 	}
645 	set_current_state(TASK_RUNNING);
646 	netdev_info(qca->net_dev, "SPI thread exit\n");
647 
648 	return 0;
649 }
650 
651 static irqreturn_t
652 qcaspi_intr_handler(int irq, void *data)
653 {
654 	struct qcaspi *qca = data;
655 
656 	qca->intr_req++;
657 	if (qca->spi_thread &&
658 	    qca->spi_thread->state != TASK_RUNNING)
659 		wake_up_process(qca->spi_thread);
660 
661 	return IRQ_HANDLED;
662 }
663 
664 static int
665 qcaspi_netdev_open(struct net_device *dev)
666 {
667 	struct qcaspi *qca = netdev_priv(dev);
668 	int ret = 0;
669 
670 	if (!qca)
671 		return -EINVAL;
672 
673 	qca->intr_req = 1;
674 	qca->intr_svc = 0;
675 	qca->sync = QCASPI_SYNC_UNKNOWN;
676 	qcafrm_fsm_init_spi(&qca->frm_handle);
677 
678 	qca->spi_thread = kthread_run((void *)qcaspi_spi_thread,
679 				      qca, "%s", dev->name);
680 
681 	if (IS_ERR(qca->spi_thread)) {
682 		netdev_err(dev, "%s: unable to start kernel thread.\n",
683 			   QCASPI_DRV_NAME);
684 		return PTR_ERR(qca->spi_thread);
685 	}
686 
687 	ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0,
688 			  dev->name, qca);
689 	if (ret) {
690 		netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n",
691 			   QCASPI_DRV_NAME, qca->spi_dev->irq, ret);
692 		kthread_stop(qca->spi_thread);
693 		return ret;
694 	}
695 
696 	/* SPI thread takes care of TX queue */
697 
698 	return 0;
699 }
700 
701 static int
702 qcaspi_netdev_close(struct net_device *dev)
703 {
704 	struct qcaspi *qca = netdev_priv(dev);
705 
706 	netif_stop_queue(dev);
707 
708 	qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify);
709 	free_irq(qca->spi_dev->irq, qca);
710 
711 	kthread_stop(qca->spi_thread);
712 	qca->spi_thread = NULL;
713 	qcaspi_flush_tx_ring(qca);
714 
715 	return 0;
716 }
717 
718 static netdev_tx_t
719 qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev)
720 {
721 	u32 frame_len;
722 	u8 *ptmp;
723 	struct qcaspi *qca = netdev_priv(dev);
724 	u16 new_tail;
725 	struct sk_buff *tskb;
726 	u8 pad_len = 0;
727 
728 	if (skb->len < QCAFRM_MIN_LEN)
729 		pad_len = QCAFRM_MIN_LEN - skb->len;
730 
731 	if (qca->txr.skb[qca->txr.tail]) {
732 		netdev_warn(qca->net_dev, "queue was unexpectedly full!\n");
733 		netif_stop_queue(qca->net_dev);
734 		qca->stats.ring_full++;
735 		return NETDEV_TX_BUSY;
736 	}
737 
738 	if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) ||
739 	    (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) {
740 		tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN,
741 				       QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC);
742 		if (!tskb) {
743 			qca->stats.out_of_mem++;
744 			return NETDEV_TX_BUSY;
745 		}
746 		dev_kfree_skb(skb);
747 		skb = tskb;
748 	}
749 
750 	frame_len = skb->len + pad_len;
751 
752 	ptmp = skb_push(skb, QCAFRM_HEADER_LEN);
753 	qcafrm_create_header(ptmp, frame_len);
754 
755 	if (pad_len) {
756 		ptmp = skb_put_zero(skb, pad_len);
757 	}
758 
759 	ptmp = skb_put(skb, QCAFRM_FOOTER_LEN);
760 	qcafrm_create_footer(ptmp);
761 
762 	netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n",
763 		   skb->len);
764 
765 	qca->txr.size += skb->len + QCASPI_HW_PKT_LEN;
766 
767 	new_tail = qca->txr.tail + 1;
768 	if (new_tail >= qca->txr.count)
769 		new_tail = 0;
770 
771 	qca->txr.skb[qca->txr.tail] = skb;
772 	qca->txr.tail = new_tail;
773 
774 	if (!qcaspi_tx_ring_has_space(&qca->txr)) {
775 		netif_stop_queue(qca->net_dev);
776 		qca->stats.ring_full++;
777 	}
778 
779 	netif_trans_update(dev);
780 
781 	if (qca->spi_thread &&
782 	    qca->spi_thread->state != TASK_RUNNING)
783 		wake_up_process(qca->spi_thread);
784 
785 	return NETDEV_TX_OK;
786 }
787 
788 static void
789 qcaspi_netdev_tx_timeout(struct net_device *dev)
790 {
791 	struct qcaspi *qca = netdev_priv(dev);
792 
793 	netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n",
794 		    jiffies, jiffies - dev_trans_start(dev));
795 	qca->net_dev->stats.tx_errors++;
796 	/* Trigger tx queue flush and QCA7000 reset */
797 	qca->sync = QCASPI_SYNC_UNKNOWN;
798 
799 	if (qca->spi_thread)
800 		wake_up_process(qca->spi_thread);
801 }
802 
803 static int
804 qcaspi_netdev_init(struct net_device *dev)
805 {
806 	struct qcaspi *qca = netdev_priv(dev);
807 
808 	dev->mtu = QCAFRM_MAX_MTU;
809 	dev->type = ARPHRD_ETHER;
810 	qca->clkspeed = qcaspi_clkspeed;
811 	qca->burst_len = qcaspi_burst_len;
812 	qca->spi_thread = NULL;
813 	qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN +
814 		QCAFRM_FOOTER_LEN + 4) * 4;
815 
816 	memset(&qca->stats, 0, sizeof(struct qcaspi_stats));
817 
818 	qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL);
819 	if (!qca->rx_buffer)
820 		return -ENOBUFS;
821 
822 	qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu +
823 						VLAN_ETH_HLEN);
824 	if (!qca->rx_skb) {
825 		kfree(qca->rx_buffer);
826 		netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n");
827 		return -ENOBUFS;
828 	}
829 
830 	return 0;
831 }
832 
833 static void
834 qcaspi_netdev_uninit(struct net_device *dev)
835 {
836 	struct qcaspi *qca = netdev_priv(dev);
837 
838 	kfree(qca->rx_buffer);
839 	qca->buffer_size = 0;
840 	dev_kfree_skb(qca->rx_skb);
841 }
842 
843 static const struct net_device_ops qcaspi_netdev_ops = {
844 	.ndo_init = qcaspi_netdev_init,
845 	.ndo_uninit = qcaspi_netdev_uninit,
846 	.ndo_open = qcaspi_netdev_open,
847 	.ndo_stop = qcaspi_netdev_close,
848 	.ndo_start_xmit = qcaspi_netdev_xmit,
849 	.ndo_set_mac_address = eth_mac_addr,
850 	.ndo_tx_timeout = qcaspi_netdev_tx_timeout,
851 	.ndo_validate_addr = eth_validate_addr,
852 };
853 
854 static void
855 qcaspi_netdev_setup(struct net_device *dev)
856 {
857 	struct qcaspi *qca = NULL;
858 
859 	dev->netdev_ops = &qcaspi_netdev_ops;
860 	qcaspi_set_ethtool_ops(dev);
861 	dev->watchdog_timeo = QCASPI_TX_TIMEOUT;
862 	dev->priv_flags &= ~IFF_TX_SKB_SHARING;
863 	dev->tx_queue_len = 100;
864 
865 	/* MTU range: 46 - 1500 */
866 	dev->min_mtu = QCAFRM_MIN_MTU;
867 	dev->max_mtu = QCAFRM_MAX_MTU;
868 
869 	qca = netdev_priv(dev);
870 	memset(qca, 0, sizeof(struct qcaspi));
871 
872 	memset(&qca->txr, 0, sizeof(qca->txr));
873 	qca->txr.count = TX_RING_MAX_LEN;
874 }
875 
876 static const struct of_device_id qca_spi_of_match[] = {
877 	{ .compatible = "qca,qca7000" },
878 	{ /* sentinel */ }
879 };
880 MODULE_DEVICE_TABLE(of, qca_spi_of_match);
881 
882 static int
883 qca_spi_probe(struct spi_device *spi)
884 {
885 	struct qcaspi *qca = NULL;
886 	struct net_device *qcaspi_devs = NULL;
887 	u8 legacy_mode = 0;
888 	u16 signature;
889 	const char *mac;
890 
891 	if (!spi->dev.of_node) {
892 		dev_err(&spi->dev, "Missing device tree\n");
893 		return -EINVAL;
894 	}
895 
896 	legacy_mode = of_property_read_bool(spi->dev.of_node,
897 					    "qca,legacy-mode");
898 
899 	if (qcaspi_clkspeed == 0) {
900 		if (spi->max_speed_hz)
901 			qcaspi_clkspeed = spi->max_speed_hz;
902 		else
903 			qcaspi_clkspeed = QCASPI_CLK_SPEED;
904 	}
905 
906 	if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) ||
907 	    (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) {
908 		dev_err(&spi->dev, "Invalid clkspeed: %d\n",
909 			qcaspi_clkspeed);
910 		return -EINVAL;
911 	}
912 
913 	if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) ||
914 	    (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) {
915 		dev_err(&spi->dev, "Invalid burst len: %d\n",
916 			qcaspi_burst_len);
917 		return -EINVAL;
918 	}
919 
920 	if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) ||
921 	    (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) {
922 		dev_err(&spi->dev, "Invalid pluggable: %d\n",
923 			qcaspi_pluggable);
924 		return -EINVAL;
925 	}
926 
927 	if (wr_verify < QCASPI_WRITE_VERIFY_MIN ||
928 	    wr_verify > QCASPI_WRITE_VERIFY_MAX) {
929 		dev_err(&spi->dev, "Invalid write verify: %d\n",
930 			wr_verify);
931 		return -EINVAL;
932 	}
933 
934 	dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n",
935 		 QCASPI_DRV_VERSION,
936 		 qcaspi_clkspeed,
937 		 qcaspi_burst_len,
938 		 qcaspi_pluggable);
939 
940 	spi->mode = SPI_MODE_3;
941 	spi->max_speed_hz = qcaspi_clkspeed;
942 	if (spi_setup(spi) < 0) {
943 		dev_err(&spi->dev, "Unable to setup SPI device\n");
944 		return -EFAULT;
945 	}
946 
947 	qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi));
948 	if (!qcaspi_devs)
949 		return -ENOMEM;
950 
951 	qcaspi_netdev_setup(qcaspi_devs);
952 	SET_NETDEV_DEV(qcaspi_devs, &spi->dev);
953 
954 	qca = netdev_priv(qcaspi_devs);
955 	if (!qca) {
956 		free_netdev(qcaspi_devs);
957 		dev_err(&spi->dev, "Fail to retrieve private structure\n");
958 		return -ENOMEM;
959 	}
960 	qca->net_dev = qcaspi_devs;
961 	qca->spi_dev = spi;
962 	qca->legacy_mode = legacy_mode;
963 
964 	spi_set_drvdata(spi, qcaspi_devs);
965 
966 	mac = of_get_mac_address(spi->dev.of_node);
967 
968 	if (!IS_ERR(mac))
969 		ether_addr_copy(qca->net_dev->dev_addr, mac);
970 
971 	if (!is_valid_ether_addr(qca->net_dev->dev_addr)) {
972 		eth_hw_addr_random(qca->net_dev);
973 		dev_info(&spi->dev, "Using random MAC address: %pM\n",
974 			 qca->net_dev->dev_addr);
975 	}
976 
977 	netif_carrier_off(qca->net_dev);
978 
979 	if (!qcaspi_pluggable) {
980 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
981 		qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
982 
983 		if (signature != QCASPI_GOOD_SIGNATURE) {
984 			dev_err(&spi->dev, "Invalid signature (0x%04X)\n",
985 				signature);
986 			free_netdev(qcaspi_devs);
987 			return -EFAULT;
988 		}
989 	}
990 
991 	if (register_netdev(qcaspi_devs)) {
992 		dev_err(&spi->dev, "Unable to register net device %s\n",
993 			qcaspi_devs->name);
994 		free_netdev(qcaspi_devs);
995 		return -EFAULT;
996 	}
997 
998 	qcaspi_init_device_debugfs(qca);
999 
1000 	return 0;
1001 }
1002 
1003 static int
1004 qca_spi_remove(struct spi_device *spi)
1005 {
1006 	struct net_device *qcaspi_devs = spi_get_drvdata(spi);
1007 	struct qcaspi *qca = netdev_priv(qcaspi_devs);
1008 
1009 	qcaspi_remove_device_debugfs(qca);
1010 
1011 	unregister_netdev(qcaspi_devs);
1012 	free_netdev(qcaspi_devs);
1013 
1014 	return 0;
1015 }
1016 
1017 static const struct spi_device_id qca_spi_id[] = {
1018 	{ "qca7000", 0 },
1019 	{ /* sentinel */ }
1020 };
1021 MODULE_DEVICE_TABLE(spi, qca_spi_id);
1022 
1023 static struct spi_driver qca_spi_driver = {
1024 	.driver	= {
1025 		.name	= QCASPI_DRV_NAME,
1026 		.of_match_table = qca_spi_of_match,
1027 	},
1028 	.id_table = qca_spi_id,
1029 	.probe    = qca_spi_probe,
1030 	.remove   = qca_spi_remove,
1031 };
1032 module_spi_driver(qca_spi_driver);
1033 
1034 MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver");
1035 MODULE_AUTHOR("Qualcomm Atheros Communications");
1036 MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
1037 MODULE_LICENSE("Dual BSD/GPL");
1038 MODULE_VERSION(QCASPI_DRV_VERSION);
1039