1 /* 2 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc. 3 * Copyright (c) 2014, I2SE GmbH 4 * 5 * Permission to use, copy, modify, and/or distribute this software 6 * for any purpose with or without fee is hereby granted, provided 7 * that the above copyright notice and this permission notice appear 8 * in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL 13 * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR 14 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 15 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, 16 * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 17 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* This module implements the Qualcomm Atheros SPI protocol for 21 * kernel-based SPI device; it is essentially an Ethernet-to-SPI 22 * serial converter; 23 */ 24 25 #include <linux/errno.h> 26 #include <linux/etherdevice.h> 27 #include <linux/if_arp.h> 28 #include <linux/if_ether.h> 29 #include <linux/init.h> 30 #include <linux/interrupt.h> 31 #include <linux/jiffies.h> 32 #include <linux/kernel.h> 33 #include <linux/kthread.h> 34 #include <linux/module.h> 35 #include <linux/moduleparam.h> 36 #include <linux/netdevice.h> 37 #include <linux/of.h> 38 #include <linux/of_device.h> 39 #include <linux/of_net.h> 40 #include <linux/sched.h> 41 #include <linux/skbuff.h> 42 #include <linux/spi/spi.h> 43 #include <linux/types.h> 44 45 #include "qca_7k.h" 46 #include "qca_7k_common.h" 47 #include "qca_debug.h" 48 #include "qca_spi.h" 49 50 #define MAX_DMA_BURST_LEN 5000 51 52 /* Modules parameters */ 53 #define QCASPI_CLK_SPEED_MIN 1000000 54 #define QCASPI_CLK_SPEED_MAX 16000000 55 #define QCASPI_CLK_SPEED 8000000 56 static int qcaspi_clkspeed; 57 module_param(qcaspi_clkspeed, int, 0); 58 MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000."); 59 60 #define QCASPI_BURST_LEN_MIN 1 61 #define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN 62 static int qcaspi_burst_len = MAX_DMA_BURST_LEN; 63 module_param(qcaspi_burst_len, int, 0); 64 MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000."); 65 66 #define QCASPI_PLUGGABLE_MIN 0 67 #define QCASPI_PLUGGABLE_MAX 1 68 static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN; 69 module_param(qcaspi_pluggable, int, 0); 70 MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no)."); 71 72 #define QCASPI_TX_TIMEOUT (1 * HZ) 73 #define QCASPI_QCA7K_REBOOT_TIME_MS 1000 74 75 static void 76 start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause) 77 { 78 *intr_cause = 0; 79 80 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0); 81 qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 82 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); 83 } 84 85 static void 86 end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause) 87 { 88 u16 intr_enable = (SPI_INT_CPU_ON | 89 SPI_INT_PKT_AVLBL | 90 SPI_INT_RDBUF_ERR | 91 SPI_INT_WRBUF_ERR); 92 93 qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 94 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable); 95 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); 96 } 97 98 static u32 99 qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len) 100 { 101 __be16 cmd; 102 struct spi_message msg; 103 struct spi_transfer transfer[2]; 104 int ret; 105 106 memset(&transfer, 0, sizeof(transfer)); 107 spi_message_init(&msg); 108 109 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 110 transfer[0].tx_buf = &cmd; 111 transfer[0].len = QCASPI_CMD_LEN; 112 transfer[1].tx_buf = src; 113 transfer[1].len = len; 114 115 spi_message_add_tail(&transfer[0], &msg); 116 spi_message_add_tail(&transfer[1], &msg); 117 ret = spi_sync(qca->spi_dev, &msg); 118 119 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 120 qcaspi_spi_error(qca); 121 return 0; 122 } 123 124 return len; 125 } 126 127 static u32 128 qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) 129 { 130 struct spi_message msg; 131 struct spi_transfer transfer; 132 int ret; 133 134 memset(&transfer, 0, sizeof(transfer)); 135 spi_message_init(&msg); 136 137 transfer.tx_buf = src; 138 transfer.len = len; 139 140 spi_message_add_tail(&transfer, &msg); 141 ret = spi_sync(qca->spi_dev, &msg); 142 143 if (ret || (msg.actual_length != len)) { 144 qcaspi_spi_error(qca); 145 return 0; 146 } 147 148 return len; 149 } 150 151 static u32 152 qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len) 153 { 154 struct spi_message msg; 155 __be16 cmd; 156 struct spi_transfer transfer[2]; 157 int ret; 158 159 memset(&transfer, 0, sizeof(transfer)); 160 spi_message_init(&msg); 161 162 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 163 transfer[0].tx_buf = &cmd; 164 transfer[0].len = QCASPI_CMD_LEN; 165 transfer[1].rx_buf = dst; 166 transfer[1].len = len; 167 168 spi_message_add_tail(&transfer[0], &msg); 169 spi_message_add_tail(&transfer[1], &msg); 170 ret = spi_sync(qca->spi_dev, &msg); 171 172 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 173 qcaspi_spi_error(qca); 174 return 0; 175 } 176 177 return len; 178 } 179 180 static u32 181 qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len) 182 { 183 struct spi_message msg; 184 struct spi_transfer transfer; 185 int ret; 186 187 memset(&transfer, 0, sizeof(transfer)); 188 spi_message_init(&msg); 189 190 transfer.rx_buf = dst; 191 transfer.len = len; 192 193 spi_message_add_tail(&transfer, &msg); 194 ret = spi_sync(qca->spi_dev, &msg); 195 196 if (ret || (msg.actual_length != len)) { 197 qcaspi_spi_error(qca); 198 return 0; 199 } 200 201 return len; 202 } 203 204 static int 205 qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd) 206 { 207 __be16 tx_data; 208 struct spi_message msg; 209 struct spi_transfer transfer; 210 int ret; 211 212 memset(&transfer, 0, sizeof(transfer)); 213 214 spi_message_init(&msg); 215 216 tx_data = cpu_to_be16(cmd); 217 transfer.len = sizeof(cmd); 218 transfer.tx_buf = &tx_data; 219 spi_message_add_tail(&transfer, &msg); 220 221 ret = spi_sync(qca->spi_dev, &msg); 222 223 if (!ret) 224 ret = msg.status; 225 226 if (ret) 227 qcaspi_spi_error(qca); 228 229 return ret; 230 } 231 232 static int 233 qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb) 234 { 235 u32 count; 236 u32 written; 237 u32 offset; 238 u32 len; 239 240 len = skb->len; 241 242 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len); 243 if (qca->legacy_mode) 244 qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 245 246 offset = 0; 247 while (len) { 248 count = len; 249 if (count > qca->burst_len) 250 count = qca->burst_len; 251 252 if (qca->legacy_mode) { 253 written = qcaspi_write_legacy(qca, 254 skb->data + offset, 255 count); 256 } else { 257 written = qcaspi_write_burst(qca, 258 skb->data + offset, 259 count); 260 } 261 262 if (written != count) 263 return -1; 264 265 offset += count; 266 len -= count; 267 } 268 269 return 0; 270 } 271 272 static int 273 qcaspi_transmit(struct qcaspi *qca) 274 { 275 struct net_device_stats *n_stats = &qca->net_dev->stats; 276 u16 available = 0; 277 u32 pkt_len; 278 u16 new_head; 279 u16 packets = 0; 280 281 if (qca->txr.skb[qca->txr.head] == NULL) 282 return 0; 283 284 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available); 285 286 while (qca->txr.skb[qca->txr.head]) { 287 pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN; 288 289 if (available < pkt_len) { 290 if (packets == 0) 291 qca->stats.write_buf_miss++; 292 break; 293 } 294 295 if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) { 296 qca->stats.write_err++; 297 return -1; 298 } 299 300 packets++; 301 n_stats->tx_packets++; 302 n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len; 303 available -= pkt_len; 304 305 /* remove the skb from the queue */ 306 /* XXX After inconsistent lock states netif_tx_lock() 307 * has been replaced by netif_tx_lock_bh() and so on. 308 */ 309 netif_tx_lock_bh(qca->net_dev); 310 dev_kfree_skb(qca->txr.skb[qca->txr.head]); 311 qca->txr.skb[qca->txr.head] = NULL; 312 qca->txr.size -= pkt_len; 313 new_head = qca->txr.head + 1; 314 if (new_head >= qca->txr.count) 315 new_head = 0; 316 qca->txr.head = new_head; 317 if (netif_queue_stopped(qca->net_dev)) 318 netif_wake_queue(qca->net_dev); 319 netif_tx_unlock_bh(qca->net_dev); 320 } 321 322 return 0; 323 } 324 325 static int 326 qcaspi_receive(struct qcaspi *qca) 327 { 328 struct net_device *net_dev = qca->net_dev; 329 struct net_device_stats *n_stats = &net_dev->stats; 330 u16 available = 0; 331 u32 bytes_read; 332 u8 *cp; 333 334 /* Allocate rx SKB if we don't have one available. */ 335 if (!qca->rx_skb) { 336 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 337 net_dev->mtu + 338 VLAN_ETH_HLEN); 339 if (!qca->rx_skb) { 340 netdev_dbg(net_dev, "out of RX resources\n"); 341 qca->stats.out_of_mem++; 342 return -1; 343 } 344 } 345 346 /* Read the packet size. */ 347 qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available); 348 netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n", 349 available); 350 351 if (available == 0) { 352 netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n"); 353 return -1; 354 } 355 356 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available); 357 358 if (qca->legacy_mode) 359 qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 360 361 while (available) { 362 u32 count = available; 363 364 if (count > qca->burst_len) 365 count = qca->burst_len; 366 367 if (qca->legacy_mode) { 368 bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer, 369 count); 370 } else { 371 bytes_read = qcaspi_read_burst(qca, qca->rx_buffer, 372 count); 373 } 374 375 netdev_dbg(net_dev, "available: %d, byte read: %d\n", 376 available, bytes_read); 377 378 if (bytes_read) { 379 available -= bytes_read; 380 } else { 381 qca->stats.read_err++; 382 return -1; 383 } 384 385 cp = qca->rx_buffer; 386 387 while ((bytes_read--) && (qca->rx_skb)) { 388 s32 retcode; 389 390 retcode = qcafrm_fsm_decode(&qca->frm_handle, 391 qca->rx_skb->data, 392 skb_tailroom(qca->rx_skb), 393 *cp); 394 cp++; 395 switch (retcode) { 396 case QCAFRM_GATHER: 397 case QCAFRM_NOHEAD: 398 break; 399 case QCAFRM_NOTAIL: 400 netdev_dbg(net_dev, "no RX tail\n"); 401 n_stats->rx_errors++; 402 n_stats->rx_dropped++; 403 break; 404 case QCAFRM_INVLEN: 405 netdev_dbg(net_dev, "invalid RX length\n"); 406 n_stats->rx_errors++; 407 n_stats->rx_dropped++; 408 break; 409 default: 410 qca->rx_skb->dev = qca->net_dev; 411 n_stats->rx_packets++; 412 n_stats->rx_bytes += retcode; 413 skb_put(qca->rx_skb, retcode); 414 qca->rx_skb->protocol = eth_type_trans( 415 qca->rx_skb, qca->rx_skb->dev); 416 qca->rx_skb->ip_summed = CHECKSUM_UNNECESSARY; 417 netif_rx_ni(qca->rx_skb); 418 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 419 net_dev->mtu + VLAN_ETH_HLEN); 420 if (!qca->rx_skb) { 421 netdev_dbg(net_dev, "out of RX resources\n"); 422 n_stats->rx_errors++; 423 qca->stats.out_of_mem++; 424 break; 425 } 426 } 427 } 428 } 429 430 return 0; 431 } 432 433 /* Check that tx ring stores only so much bytes 434 * that fit into the internal QCA buffer. 435 */ 436 437 static int 438 qcaspi_tx_ring_has_space(struct tx_ring *txr) 439 { 440 if (txr->skb[txr->tail]) 441 return 0; 442 443 return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0; 444 } 445 446 /* Flush the tx ring. This function is only safe to 447 * call from the qcaspi_spi_thread. 448 */ 449 450 static void 451 qcaspi_flush_tx_ring(struct qcaspi *qca) 452 { 453 int i; 454 455 /* XXX After inconsistent lock states netif_tx_lock() 456 * has been replaced by netif_tx_lock_bh() and so on. 457 */ 458 netif_tx_lock_bh(qca->net_dev); 459 for (i = 0; i < TX_RING_MAX_LEN; i++) { 460 if (qca->txr.skb[i]) { 461 dev_kfree_skb(qca->txr.skb[i]); 462 qca->txr.skb[i] = NULL; 463 qca->net_dev->stats.tx_dropped++; 464 } 465 } 466 qca->txr.tail = 0; 467 qca->txr.head = 0; 468 qca->txr.size = 0; 469 netif_tx_unlock_bh(qca->net_dev); 470 } 471 472 static void 473 qcaspi_qca7k_sync(struct qcaspi *qca, int event) 474 { 475 u16 signature = 0; 476 u16 spi_config; 477 u16 wrbuf_space = 0; 478 static u16 reset_count; 479 480 if (event == QCASPI_EVENT_CPUON) { 481 /* Read signature twice, if not valid 482 * go back to unknown state. 483 */ 484 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 485 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 486 if (signature != QCASPI_GOOD_SIGNATURE) { 487 qca->sync = QCASPI_SYNC_UNKNOWN; 488 netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n"); 489 } else { 490 /* ensure that the WRBUF is empty */ 491 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, 492 &wrbuf_space); 493 if (wrbuf_space != QCASPI_HW_BUF_LEN) { 494 netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n"); 495 qca->sync = QCASPI_SYNC_UNKNOWN; 496 } else { 497 netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n"); 498 qca->sync = QCASPI_SYNC_READY; 499 return; 500 } 501 } 502 } 503 504 switch (qca->sync) { 505 case QCASPI_SYNC_READY: 506 /* Read signature, if not valid go to unknown state. */ 507 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 508 if (signature != QCASPI_GOOD_SIGNATURE) { 509 qca->sync = QCASPI_SYNC_UNKNOWN; 510 netdev_dbg(qca->net_dev, "sync: bad signature, restart\n"); 511 /* don't reset right away */ 512 return; 513 } 514 break; 515 case QCASPI_SYNC_UNKNOWN: 516 /* Read signature, if not valid stay in unknown state */ 517 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 518 if (signature != QCASPI_GOOD_SIGNATURE) { 519 netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n"); 520 return; 521 } 522 523 /* TODO: use GPIO to reset QCA7000 in legacy mode*/ 524 netdev_dbg(qca->net_dev, "sync: resetting device.\n"); 525 qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config); 526 spi_config |= QCASPI_SLAVE_RESET_BIT; 527 qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config); 528 529 qca->sync = QCASPI_SYNC_RESET; 530 qca->stats.trig_reset++; 531 reset_count = 0; 532 break; 533 case QCASPI_SYNC_RESET: 534 reset_count++; 535 netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n", 536 reset_count); 537 if (reset_count >= QCASPI_RESET_TIMEOUT) { 538 /* reset did not seem to take place, try again */ 539 qca->sync = QCASPI_SYNC_UNKNOWN; 540 qca->stats.reset_timeout++; 541 netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n"); 542 } 543 break; 544 } 545 } 546 547 static int 548 qcaspi_spi_thread(void *data) 549 { 550 struct qcaspi *qca = data; 551 u16 intr_cause = 0; 552 553 netdev_info(qca->net_dev, "SPI thread created\n"); 554 while (!kthread_should_stop()) { 555 set_current_state(TASK_INTERRUPTIBLE); 556 if ((qca->intr_req == qca->intr_svc) && 557 (qca->txr.skb[qca->txr.head] == NULL) && 558 (qca->sync == QCASPI_SYNC_READY)) 559 schedule(); 560 561 set_current_state(TASK_RUNNING); 562 563 netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n", 564 qca->intr_req - qca->intr_svc, 565 qca->txr.skb[qca->txr.head]); 566 567 qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE); 568 569 if (qca->sync != QCASPI_SYNC_READY) { 570 netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n", 571 (unsigned int)qca->sync); 572 netif_stop_queue(qca->net_dev); 573 netif_carrier_off(qca->net_dev); 574 qcaspi_flush_tx_ring(qca); 575 msleep(QCASPI_QCA7K_REBOOT_TIME_MS); 576 } 577 578 if (qca->intr_svc != qca->intr_req) { 579 qca->intr_svc = qca->intr_req; 580 start_spi_intr_handling(qca, &intr_cause); 581 582 if (intr_cause & SPI_INT_CPU_ON) { 583 qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON); 584 585 /* not synced. */ 586 if (qca->sync != QCASPI_SYNC_READY) 587 continue; 588 589 qca->stats.device_reset++; 590 netif_wake_queue(qca->net_dev); 591 netif_carrier_on(qca->net_dev); 592 } 593 594 if (intr_cause & SPI_INT_RDBUF_ERR) { 595 /* restart sync */ 596 netdev_dbg(qca->net_dev, "===> rdbuf error!\n"); 597 qca->stats.read_buf_err++; 598 qca->sync = QCASPI_SYNC_UNKNOWN; 599 continue; 600 } 601 602 if (intr_cause & SPI_INT_WRBUF_ERR) { 603 /* restart sync */ 604 netdev_dbg(qca->net_dev, "===> wrbuf error!\n"); 605 qca->stats.write_buf_err++; 606 qca->sync = QCASPI_SYNC_UNKNOWN; 607 continue; 608 } 609 610 /* can only handle other interrupts 611 * if sync has occurred 612 */ 613 if (qca->sync == QCASPI_SYNC_READY) { 614 if (intr_cause & SPI_INT_PKT_AVLBL) 615 qcaspi_receive(qca); 616 } 617 618 end_spi_intr_handling(qca, intr_cause); 619 } 620 621 if (qca->sync == QCASPI_SYNC_READY) 622 qcaspi_transmit(qca); 623 } 624 set_current_state(TASK_RUNNING); 625 netdev_info(qca->net_dev, "SPI thread exit\n"); 626 627 return 0; 628 } 629 630 static irqreturn_t 631 qcaspi_intr_handler(int irq, void *data) 632 { 633 struct qcaspi *qca = data; 634 635 qca->intr_req++; 636 if (qca->spi_thread && 637 qca->spi_thread->state != TASK_RUNNING) 638 wake_up_process(qca->spi_thread); 639 640 return IRQ_HANDLED; 641 } 642 643 static int 644 qcaspi_netdev_open(struct net_device *dev) 645 { 646 struct qcaspi *qca = netdev_priv(dev); 647 int ret = 0; 648 649 if (!qca) 650 return -EINVAL; 651 652 qca->intr_req = 1; 653 qca->intr_svc = 0; 654 qca->sync = QCASPI_SYNC_UNKNOWN; 655 qcafrm_fsm_init_spi(&qca->frm_handle); 656 657 qca->spi_thread = kthread_run((void *)qcaspi_spi_thread, 658 qca, "%s", dev->name); 659 660 if (IS_ERR(qca->spi_thread)) { 661 netdev_err(dev, "%s: unable to start kernel thread.\n", 662 QCASPI_DRV_NAME); 663 return PTR_ERR(qca->spi_thread); 664 } 665 666 ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0, 667 dev->name, qca); 668 if (ret) { 669 netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n", 670 QCASPI_DRV_NAME, qca->spi_dev->irq, ret); 671 kthread_stop(qca->spi_thread); 672 return ret; 673 } 674 675 /* SPI thread takes care of TX queue */ 676 677 return 0; 678 } 679 680 static int 681 qcaspi_netdev_close(struct net_device *dev) 682 { 683 struct qcaspi *qca = netdev_priv(dev); 684 685 netif_stop_queue(dev); 686 687 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0); 688 free_irq(qca->spi_dev->irq, qca); 689 690 kthread_stop(qca->spi_thread); 691 qca->spi_thread = NULL; 692 qcaspi_flush_tx_ring(qca); 693 694 return 0; 695 } 696 697 static netdev_tx_t 698 qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev) 699 { 700 u32 frame_len; 701 u8 *ptmp; 702 struct qcaspi *qca = netdev_priv(dev); 703 u16 new_tail; 704 struct sk_buff *tskb; 705 u8 pad_len = 0; 706 707 if (skb->len < QCAFRM_MIN_LEN) 708 pad_len = QCAFRM_MIN_LEN - skb->len; 709 710 if (qca->txr.skb[qca->txr.tail]) { 711 netdev_warn(qca->net_dev, "queue was unexpectedly full!\n"); 712 netif_stop_queue(qca->net_dev); 713 qca->stats.ring_full++; 714 return NETDEV_TX_BUSY; 715 } 716 717 if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) || 718 (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) { 719 tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN, 720 QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC); 721 if (!tskb) { 722 qca->stats.out_of_mem++; 723 return NETDEV_TX_BUSY; 724 } 725 dev_kfree_skb(skb); 726 skb = tskb; 727 } 728 729 frame_len = skb->len + pad_len; 730 731 ptmp = skb_push(skb, QCAFRM_HEADER_LEN); 732 qcafrm_create_header(ptmp, frame_len); 733 734 if (pad_len) { 735 ptmp = skb_put_zero(skb, pad_len); 736 } 737 738 ptmp = skb_put(skb, QCAFRM_FOOTER_LEN); 739 qcafrm_create_footer(ptmp); 740 741 netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n", 742 skb->len); 743 744 qca->txr.size += skb->len + QCASPI_HW_PKT_LEN; 745 746 new_tail = qca->txr.tail + 1; 747 if (new_tail >= qca->txr.count) 748 new_tail = 0; 749 750 qca->txr.skb[qca->txr.tail] = skb; 751 qca->txr.tail = new_tail; 752 753 if (!qcaspi_tx_ring_has_space(&qca->txr)) { 754 netif_stop_queue(qca->net_dev); 755 qca->stats.ring_full++; 756 } 757 758 netif_trans_update(dev); 759 760 if (qca->spi_thread && 761 qca->spi_thread->state != TASK_RUNNING) 762 wake_up_process(qca->spi_thread); 763 764 return NETDEV_TX_OK; 765 } 766 767 static void 768 qcaspi_netdev_tx_timeout(struct net_device *dev) 769 { 770 struct qcaspi *qca = netdev_priv(dev); 771 772 netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n", 773 jiffies, jiffies - dev_trans_start(dev)); 774 qca->net_dev->stats.tx_errors++; 775 /* Trigger tx queue flush and QCA7000 reset */ 776 qca->sync = QCASPI_SYNC_UNKNOWN; 777 778 if (qca->spi_thread) 779 wake_up_process(qca->spi_thread); 780 } 781 782 static int 783 qcaspi_netdev_init(struct net_device *dev) 784 { 785 struct qcaspi *qca = netdev_priv(dev); 786 787 dev->mtu = QCAFRM_MAX_MTU; 788 dev->type = ARPHRD_ETHER; 789 qca->clkspeed = qcaspi_clkspeed; 790 qca->burst_len = qcaspi_burst_len; 791 qca->spi_thread = NULL; 792 qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN + 793 QCAFRM_FOOTER_LEN + 4) * 4; 794 795 memset(&qca->stats, 0, sizeof(struct qcaspi_stats)); 796 797 qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL); 798 if (!qca->rx_buffer) 799 return -ENOBUFS; 800 801 qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu + 802 VLAN_ETH_HLEN); 803 if (!qca->rx_skb) { 804 kfree(qca->rx_buffer); 805 netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n"); 806 return -ENOBUFS; 807 } 808 809 return 0; 810 } 811 812 static void 813 qcaspi_netdev_uninit(struct net_device *dev) 814 { 815 struct qcaspi *qca = netdev_priv(dev); 816 817 kfree(qca->rx_buffer); 818 qca->buffer_size = 0; 819 if (qca->rx_skb) 820 dev_kfree_skb(qca->rx_skb); 821 } 822 823 static const struct net_device_ops qcaspi_netdev_ops = { 824 .ndo_init = qcaspi_netdev_init, 825 .ndo_uninit = qcaspi_netdev_uninit, 826 .ndo_open = qcaspi_netdev_open, 827 .ndo_stop = qcaspi_netdev_close, 828 .ndo_start_xmit = qcaspi_netdev_xmit, 829 .ndo_set_mac_address = eth_mac_addr, 830 .ndo_tx_timeout = qcaspi_netdev_tx_timeout, 831 .ndo_validate_addr = eth_validate_addr, 832 }; 833 834 static void 835 qcaspi_netdev_setup(struct net_device *dev) 836 { 837 struct qcaspi *qca = NULL; 838 839 dev->netdev_ops = &qcaspi_netdev_ops; 840 qcaspi_set_ethtool_ops(dev); 841 dev->watchdog_timeo = QCASPI_TX_TIMEOUT; 842 dev->priv_flags &= ~IFF_TX_SKB_SHARING; 843 dev->tx_queue_len = 100; 844 845 /* MTU range: 46 - 1500 */ 846 dev->min_mtu = QCAFRM_MIN_MTU; 847 dev->max_mtu = QCAFRM_MAX_MTU; 848 849 qca = netdev_priv(dev); 850 memset(qca, 0, sizeof(struct qcaspi)); 851 852 memset(&qca->txr, 0, sizeof(qca->txr)); 853 qca->txr.count = TX_RING_MAX_LEN; 854 } 855 856 static const struct of_device_id qca_spi_of_match[] = { 857 { .compatible = "qca,qca7000" }, 858 { /* sentinel */ } 859 }; 860 MODULE_DEVICE_TABLE(of, qca_spi_of_match); 861 862 static int 863 qca_spi_probe(struct spi_device *spi) 864 { 865 struct qcaspi *qca = NULL; 866 struct net_device *qcaspi_devs = NULL; 867 u8 legacy_mode = 0; 868 u16 signature; 869 const char *mac; 870 871 if (!spi->dev.of_node) { 872 dev_err(&spi->dev, "Missing device tree\n"); 873 return -EINVAL; 874 } 875 876 legacy_mode = of_property_read_bool(spi->dev.of_node, 877 "qca,legacy-mode"); 878 879 if (qcaspi_clkspeed == 0) { 880 if (spi->max_speed_hz) 881 qcaspi_clkspeed = spi->max_speed_hz; 882 else 883 qcaspi_clkspeed = QCASPI_CLK_SPEED; 884 } 885 886 if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) || 887 (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) { 888 dev_err(&spi->dev, "Invalid clkspeed: %d\n", 889 qcaspi_clkspeed); 890 return -EINVAL; 891 } 892 893 if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) || 894 (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) { 895 dev_err(&spi->dev, "Invalid burst len: %d\n", 896 qcaspi_burst_len); 897 return -EINVAL; 898 } 899 900 if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) || 901 (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) { 902 dev_err(&spi->dev, "Invalid pluggable: %d\n", 903 qcaspi_pluggable); 904 return -EINVAL; 905 } 906 907 dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n", 908 QCASPI_DRV_VERSION, 909 qcaspi_clkspeed, 910 qcaspi_burst_len, 911 qcaspi_pluggable); 912 913 spi->mode = SPI_MODE_3; 914 spi->max_speed_hz = qcaspi_clkspeed; 915 if (spi_setup(spi) < 0) { 916 dev_err(&spi->dev, "Unable to setup SPI device\n"); 917 return -EFAULT; 918 } 919 920 qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi)); 921 if (!qcaspi_devs) 922 return -ENOMEM; 923 924 qcaspi_netdev_setup(qcaspi_devs); 925 SET_NETDEV_DEV(qcaspi_devs, &spi->dev); 926 927 qca = netdev_priv(qcaspi_devs); 928 if (!qca) { 929 free_netdev(qcaspi_devs); 930 dev_err(&spi->dev, "Fail to retrieve private structure\n"); 931 return -ENOMEM; 932 } 933 qca->net_dev = qcaspi_devs; 934 qca->spi_dev = spi; 935 qca->legacy_mode = legacy_mode; 936 937 spi_set_drvdata(spi, qcaspi_devs); 938 939 mac = of_get_mac_address(spi->dev.of_node); 940 941 if (mac) 942 ether_addr_copy(qca->net_dev->dev_addr, mac); 943 944 if (!is_valid_ether_addr(qca->net_dev->dev_addr)) { 945 eth_hw_addr_random(qca->net_dev); 946 dev_info(&spi->dev, "Using random MAC address: %pM\n", 947 qca->net_dev->dev_addr); 948 } 949 950 netif_carrier_off(qca->net_dev); 951 952 if (!qcaspi_pluggable) { 953 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 954 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 955 956 if (signature != QCASPI_GOOD_SIGNATURE) { 957 dev_err(&spi->dev, "Invalid signature (0x%04X)\n", 958 signature); 959 free_netdev(qcaspi_devs); 960 return -EFAULT; 961 } 962 } 963 964 if (register_netdev(qcaspi_devs)) { 965 dev_err(&spi->dev, "Unable to register net device %s\n", 966 qcaspi_devs->name); 967 free_netdev(qcaspi_devs); 968 return -EFAULT; 969 } 970 971 qcaspi_init_device_debugfs(qca); 972 973 return 0; 974 } 975 976 static int 977 qca_spi_remove(struct spi_device *spi) 978 { 979 struct net_device *qcaspi_devs = spi_get_drvdata(spi); 980 struct qcaspi *qca = netdev_priv(qcaspi_devs); 981 982 qcaspi_remove_device_debugfs(qca); 983 984 unregister_netdev(qcaspi_devs); 985 free_netdev(qcaspi_devs); 986 987 return 0; 988 } 989 990 static const struct spi_device_id qca_spi_id[] = { 991 { "qca7000", 0 }, 992 { /* sentinel */ } 993 }; 994 MODULE_DEVICE_TABLE(spi, qca_spi_id); 995 996 static struct spi_driver qca_spi_driver = { 997 .driver = { 998 .name = QCASPI_DRV_NAME, 999 .of_match_table = qca_spi_of_match, 1000 }, 1001 .id_table = qca_spi_id, 1002 .probe = qca_spi_probe, 1003 .remove = qca_spi_remove, 1004 }; 1005 module_spi_driver(qca_spi_driver); 1006 1007 MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver"); 1008 MODULE_AUTHOR("Qualcomm Atheros Communications"); 1009 MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>"); 1010 MODULE_LICENSE("Dual BSD/GPL"); 1011 MODULE_VERSION(QCASPI_DRV_VERSION); 1012