1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 3 */ 4 5 /* Qualcomm Technologies, Inc. EMAC Gigabit Ethernet Driver */ 6 7 #include <linux/if_ether.h> 8 #include <linux/if_vlan.h> 9 #include <linux/interrupt.h> 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_net.h> 14 #include <linux/of_device.h> 15 #include <linux/phy.h> 16 #include <linux/platform_device.h> 17 #include <linux/acpi.h> 18 #include "emac.h" 19 #include "emac-mac.h" 20 #include "emac-phy.h" 21 #include "emac-sgmii.h" 22 23 #define EMAC_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \ 24 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP) 25 26 #define EMAC_RRD_SIZE 4 27 /* The RRD size if timestamping is enabled: */ 28 #define EMAC_TS_RRD_SIZE 6 29 #define EMAC_TPD_SIZE 4 30 #define EMAC_RFD_SIZE 2 31 32 #define REG_MAC_RX_STATUS_BIN EMAC_RXMAC_STATC_REG0 33 #define REG_MAC_RX_STATUS_END EMAC_RXMAC_STATC_REG22 34 #define REG_MAC_TX_STATUS_BIN EMAC_TXMAC_STATC_REG0 35 #define REG_MAC_TX_STATUS_END EMAC_TXMAC_STATC_REG24 36 37 #define RXQ0_NUM_RFD_PREF_DEF 8 38 #define TXQ0_NUM_TPD_PREF_DEF 5 39 40 #define EMAC_PREAMBLE_DEF 7 41 42 #define DMAR_DLY_CNT_DEF 15 43 #define DMAW_DLY_CNT_DEF 4 44 45 #define IMR_NORMAL_MASK (ISR_ERROR | ISR_OVER | ISR_TX_PKT) 46 47 #define ISR_TX_PKT (\ 48 TX_PKT_INT |\ 49 TX_PKT_INT1 |\ 50 TX_PKT_INT2 |\ 51 TX_PKT_INT3) 52 53 #define ISR_OVER (\ 54 RFD0_UR_INT |\ 55 RFD1_UR_INT |\ 56 RFD2_UR_INT |\ 57 RFD3_UR_INT |\ 58 RFD4_UR_INT |\ 59 RXF_OF_INT |\ 60 TXF_UR_INT) 61 62 #define ISR_ERROR (\ 63 DMAR_TO_INT |\ 64 DMAW_TO_INT |\ 65 TXQ_TO_INT) 66 67 /* in sync with enum emac_clk_id */ 68 static const char * const emac_clk_name[] = { 69 "axi_clk", "cfg_ahb_clk", "high_speed_clk", "mdio_clk", "tx_clk", 70 "rx_clk", "sys_clk" 71 }; 72 73 void emac_reg_update32(void __iomem *addr, u32 mask, u32 val) 74 { 75 u32 data = readl(addr); 76 77 writel(((data & ~mask) | val), addr); 78 } 79 80 /* reinitialize */ 81 int emac_reinit_locked(struct emac_adapter *adpt) 82 { 83 int ret; 84 85 mutex_lock(&adpt->reset_lock); 86 87 emac_mac_down(adpt); 88 emac_sgmii_reset(adpt); 89 ret = emac_mac_up(adpt); 90 91 mutex_unlock(&adpt->reset_lock); 92 93 return ret; 94 } 95 96 /* NAPI */ 97 static int emac_napi_rtx(struct napi_struct *napi, int budget) 98 { 99 struct emac_rx_queue *rx_q = 100 container_of(napi, struct emac_rx_queue, napi); 101 struct emac_adapter *adpt = netdev_priv(rx_q->netdev); 102 struct emac_irq *irq = rx_q->irq; 103 int work_done = 0; 104 105 emac_mac_rx_process(adpt, rx_q, &work_done, budget); 106 107 if (work_done < budget) { 108 napi_complete_done(napi, work_done); 109 110 irq->mask |= rx_q->intr; 111 writel(irq->mask, adpt->base + EMAC_INT_MASK); 112 } 113 114 return work_done; 115 } 116 117 /* Transmit the packet */ 118 static int emac_start_xmit(struct sk_buff *skb, struct net_device *netdev) 119 { 120 struct emac_adapter *adpt = netdev_priv(netdev); 121 122 return emac_mac_tx_buf_send(adpt, &adpt->tx_q, skb); 123 } 124 125 static irqreturn_t emac_isr(int _irq, void *data) 126 { 127 struct emac_irq *irq = data; 128 struct emac_adapter *adpt = 129 container_of(irq, struct emac_adapter, irq); 130 struct emac_rx_queue *rx_q = &adpt->rx_q; 131 u32 isr, status; 132 133 /* disable the interrupt */ 134 writel(0, adpt->base + EMAC_INT_MASK); 135 136 isr = readl_relaxed(adpt->base + EMAC_INT_STATUS); 137 138 status = isr & irq->mask; 139 if (status == 0) 140 goto exit; 141 142 if (status & ISR_ERROR) { 143 net_err_ratelimited("%s: error interrupt 0x%lx\n", 144 adpt->netdev->name, status & ISR_ERROR); 145 /* reset MAC */ 146 schedule_work(&adpt->work_thread); 147 } 148 149 /* Schedule the napi for receive queue with interrupt 150 * status bit set 151 */ 152 if (status & rx_q->intr) { 153 if (napi_schedule_prep(&rx_q->napi)) { 154 irq->mask &= ~rx_q->intr; 155 __napi_schedule(&rx_q->napi); 156 } 157 } 158 159 if (status & TX_PKT_INT) 160 emac_mac_tx_process(adpt, &adpt->tx_q); 161 162 if (status & ISR_OVER) 163 net_warn_ratelimited("%s: TX/RX overflow interrupt\n", 164 adpt->netdev->name); 165 166 exit: 167 /* enable the interrupt */ 168 writel(irq->mask, adpt->base + EMAC_INT_MASK); 169 170 return IRQ_HANDLED; 171 } 172 173 /* Configure VLAN tag strip/insert feature */ 174 static int emac_set_features(struct net_device *netdev, 175 netdev_features_t features) 176 { 177 netdev_features_t changed = features ^ netdev->features; 178 struct emac_adapter *adpt = netdev_priv(netdev); 179 180 /* We only need to reprogram the hardware if the VLAN tag features 181 * have changed, and if it's already running. 182 */ 183 if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX))) 184 return 0; 185 186 if (!netif_running(netdev)) 187 return 0; 188 189 /* emac_mac_mode_config() uses netdev->features to configure the EMAC, 190 * so make sure it's set first. 191 */ 192 netdev->features = features; 193 194 return emac_reinit_locked(adpt); 195 } 196 197 /* Configure Multicast and Promiscuous modes */ 198 static void emac_rx_mode_set(struct net_device *netdev) 199 { 200 struct emac_adapter *adpt = netdev_priv(netdev); 201 struct netdev_hw_addr *ha; 202 203 emac_mac_mode_config(adpt); 204 205 /* update multicast address filtering */ 206 emac_mac_multicast_addr_clear(adpt); 207 netdev_for_each_mc_addr(ha, netdev) 208 emac_mac_multicast_addr_set(adpt, ha->addr); 209 } 210 211 /* Change the Maximum Transfer Unit (MTU) */ 212 static int emac_change_mtu(struct net_device *netdev, int new_mtu) 213 { 214 struct emac_adapter *adpt = netdev_priv(netdev); 215 216 netif_dbg(adpt, hw, adpt->netdev, 217 "changing MTU from %d to %d\n", netdev->mtu, 218 new_mtu); 219 netdev->mtu = new_mtu; 220 221 if (netif_running(netdev)) 222 return emac_reinit_locked(adpt); 223 224 return 0; 225 } 226 227 /* Called when the network interface is made active */ 228 static int emac_open(struct net_device *netdev) 229 { 230 struct emac_adapter *adpt = netdev_priv(netdev); 231 struct emac_irq *irq = &adpt->irq; 232 int ret; 233 234 ret = request_irq(irq->irq, emac_isr, 0, "emac-core0", irq); 235 if (ret) { 236 netdev_err(adpt->netdev, "could not request emac-core0 irq\n"); 237 return ret; 238 } 239 240 /* allocate rx/tx dma buffer & descriptors */ 241 ret = emac_mac_rx_tx_rings_alloc_all(adpt); 242 if (ret) { 243 netdev_err(adpt->netdev, "error allocating rx/tx rings\n"); 244 free_irq(irq->irq, irq); 245 return ret; 246 } 247 248 ret = emac_sgmii_open(adpt); 249 if (ret) { 250 emac_mac_rx_tx_rings_free_all(adpt); 251 free_irq(irq->irq, irq); 252 return ret; 253 } 254 255 ret = emac_mac_up(adpt); 256 if (ret) { 257 emac_mac_rx_tx_rings_free_all(adpt); 258 free_irq(irq->irq, irq); 259 emac_sgmii_close(adpt); 260 return ret; 261 } 262 263 return 0; 264 } 265 266 /* Called when the network interface is disabled */ 267 static int emac_close(struct net_device *netdev) 268 { 269 struct emac_adapter *adpt = netdev_priv(netdev); 270 271 mutex_lock(&adpt->reset_lock); 272 273 emac_sgmii_close(adpt); 274 emac_mac_down(adpt); 275 emac_mac_rx_tx_rings_free_all(adpt); 276 277 free_irq(adpt->irq.irq, &adpt->irq); 278 279 mutex_unlock(&adpt->reset_lock); 280 281 return 0; 282 } 283 284 /* Respond to a TX hang */ 285 static void emac_tx_timeout(struct net_device *netdev, unsigned int txqueue) 286 { 287 struct emac_adapter *adpt = netdev_priv(netdev); 288 289 schedule_work(&adpt->work_thread); 290 } 291 292 /** 293 * emac_update_hw_stats - read the EMAC stat registers 294 * 295 * Reads the stats registers and write the values to adpt->stats. 296 * 297 * adpt->stats.lock must be held while calling this function, 298 * and while reading from adpt->stats. 299 */ 300 void emac_update_hw_stats(struct emac_adapter *adpt) 301 { 302 struct emac_stats *stats = &adpt->stats; 303 u64 *stats_itr = &adpt->stats.rx_ok; 304 void __iomem *base = adpt->base; 305 unsigned int addr; 306 307 addr = REG_MAC_RX_STATUS_BIN; 308 while (addr <= REG_MAC_RX_STATUS_END) { 309 *stats_itr += readl_relaxed(base + addr); 310 stats_itr++; 311 addr += sizeof(u32); 312 } 313 314 /* additional rx status */ 315 stats->rx_crc_align += readl_relaxed(base + EMAC_RXMAC_STATC_REG23); 316 stats->rx_jabbers += readl_relaxed(base + EMAC_RXMAC_STATC_REG24); 317 318 /* update tx status */ 319 addr = REG_MAC_TX_STATUS_BIN; 320 stats_itr = &stats->tx_ok; 321 322 while (addr <= REG_MAC_TX_STATUS_END) { 323 *stats_itr += readl_relaxed(base + addr); 324 stats_itr++; 325 addr += sizeof(u32); 326 } 327 328 /* additional tx status */ 329 stats->tx_col += readl_relaxed(base + EMAC_TXMAC_STATC_REG25); 330 } 331 332 /* Provide network statistics info for the interface */ 333 static void emac_get_stats64(struct net_device *netdev, 334 struct rtnl_link_stats64 *net_stats) 335 { 336 struct emac_adapter *adpt = netdev_priv(netdev); 337 struct emac_stats *stats = &adpt->stats; 338 339 spin_lock(&stats->lock); 340 341 emac_update_hw_stats(adpt); 342 343 /* return parsed statistics */ 344 net_stats->rx_packets = stats->rx_ok; 345 net_stats->tx_packets = stats->tx_ok; 346 net_stats->rx_bytes = stats->rx_byte_cnt; 347 net_stats->tx_bytes = stats->tx_byte_cnt; 348 net_stats->multicast = stats->rx_mcast; 349 net_stats->collisions = stats->tx_1_col + stats->tx_2_col * 2 + 350 stats->tx_late_col + stats->tx_abort_col; 351 352 net_stats->rx_errors = stats->rx_frag + stats->rx_fcs_err + 353 stats->rx_len_err + stats->rx_sz_ov + 354 stats->rx_align_err; 355 net_stats->rx_fifo_errors = stats->rx_rxf_ov; 356 net_stats->rx_length_errors = stats->rx_len_err; 357 net_stats->rx_crc_errors = stats->rx_fcs_err; 358 net_stats->rx_frame_errors = stats->rx_align_err; 359 net_stats->rx_over_errors = stats->rx_rxf_ov; 360 net_stats->rx_missed_errors = stats->rx_rxf_ov; 361 362 net_stats->tx_errors = stats->tx_late_col + stats->tx_abort_col + 363 stats->tx_underrun + stats->tx_trunc; 364 net_stats->tx_fifo_errors = stats->tx_underrun; 365 net_stats->tx_aborted_errors = stats->tx_abort_col; 366 net_stats->tx_window_errors = stats->tx_late_col; 367 368 spin_unlock(&stats->lock); 369 } 370 371 static const struct net_device_ops emac_netdev_ops = { 372 .ndo_open = emac_open, 373 .ndo_stop = emac_close, 374 .ndo_validate_addr = eth_validate_addr, 375 .ndo_start_xmit = emac_start_xmit, 376 .ndo_set_mac_address = eth_mac_addr, 377 .ndo_change_mtu = emac_change_mtu, 378 .ndo_do_ioctl = phy_do_ioctl_running, 379 .ndo_tx_timeout = emac_tx_timeout, 380 .ndo_get_stats64 = emac_get_stats64, 381 .ndo_set_features = emac_set_features, 382 .ndo_set_rx_mode = emac_rx_mode_set, 383 }; 384 385 /* Watchdog task routine, called to reinitialize the EMAC */ 386 static void emac_work_thread(struct work_struct *work) 387 { 388 struct emac_adapter *adpt = 389 container_of(work, struct emac_adapter, work_thread); 390 391 emac_reinit_locked(adpt); 392 } 393 394 /* Initialize various data structures */ 395 static void emac_init_adapter(struct emac_adapter *adpt) 396 { 397 u32 reg; 398 399 adpt->rrd_size = EMAC_RRD_SIZE; 400 adpt->tpd_size = EMAC_TPD_SIZE; 401 adpt->rfd_size = EMAC_RFD_SIZE; 402 403 /* descriptors */ 404 adpt->tx_desc_cnt = EMAC_DEF_TX_DESCS; 405 adpt->rx_desc_cnt = EMAC_DEF_RX_DESCS; 406 407 /* dma */ 408 adpt->dma_order = emac_dma_ord_out; 409 adpt->dmar_block = emac_dma_req_4096; 410 adpt->dmaw_block = emac_dma_req_128; 411 adpt->dmar_dly_cnt = DMAR_DLY_CNT_DEF; 412 adpt->dmaw_dly_cnt = DMAW_DLY_CNT_DEF; 413 adpt->tpd_burst = TXQ0_NUM_TPD_PREF_DEF; 414 adpt->rfd_burst = RXQ0_NUM_RFD_PREF_DEF; 415 416 /* irq moderator */ 417 reg = ((EMAC_DEF_RX_IRQ_MOD >> 1) << IRQ_MODERATOR2_INIT_SHFT) | 418 ((EMAC_DEF_TX_IRQ_MOD >> 1) << IRQ_MODERATOR_INIT_SHFT); 419 adpt->irq_mod = reg; 420 421 /* others */ 422 adpt->preamble = EMAC_PREAMBLE_DEF; 423 424 /* default to automatic flow control */ 425 adpt->automatic = true; 426 427 /* Disable single-pause-frame mode by default */ 428 adpt->single_pause_mode = false; 429 } 430 431 /* Get the clock */ 432 static int emac_clks_get(struct platform_device *pdev, 433 struct emac_adapter *adpt) 434 { 435 unsigned int i; 436 437 for (i = 0; i < EMAC_CLK_CNT; i++) { 438 struct clk *clk = devm_clk_get(&pdev->dev, emac_clk_name[i]); 439 440 if (IS_ERR(clk)) { 441 dev_err(&pdev->dev, 442 "could not claim clock %s (error=%li)\n", 443 emac_clk_name[i], PTR_ERR(clk)); 444 445 return PTR_ERR(clk); 446 } 447 448 adpt->clk[i] = clk; 449 } 450 451 return 0; 452 } 453 454 /* Initialize clocks */ 455 static int emac_clks_phase1_init(struct platform_device *pdev, 456 struct emac_adapter *adpt) 457 { 458 int ret; 459 460 /* On ACPI platforms, clocks are controlled by firmware and/or 461 * ACPI, not by drivers. 462 */ 463 if (has_acpi_companion(&pdev->dev)) 464 return 0; 465 466 ret = emac_clks_get(pdev, adpt); 467 if (ret) 468 return ret; 469 470 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_AXI]); 471 if (ret) 472 return ret; 473 474 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_CFG_AHB]); 475 if (ret) 476 return ret; 477 478 ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 19200000); 479 if (ret) 480 return ret; 481 482 return clk_prepare_enable(adpt->clk[EMAC_CLK_HIGH_SPEED]); 483 } 484 485 /* Enable clocks; needs emac_clks_phase1_init to be called before */ 486 static int emac_clks_phase2_init(struct platform_device *pdev, 487 struct emac_adapter *adpt) 488 { 489 int ret; 490 491 if (has_acpi_companion(&pdev->dev)) 492 return 0; 493 494 ret = clk_set_rate(adpt->clk[EMAC_CLK_TX], 125000000); 495 if (ret) 496 return ret; 497 498 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_TX]); 499 if (ret) 500 return ret; 501 502 ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 125000000); 503 if (ret) 504 return ret; 505 506 ret = clk_set_rate(adpt->clk[EMAC_CLK_MDIO], 25000000); 507 if (ret) 508 return ret; 509 510 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_MDIO]); 511 if (ret) 512 return ret; 513 514 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_RX]); 515 if (ret) 516 return ret; 517 518 return clk_prepare_enable(adpt->clk[EMAC_CLK_SYS]); 519 } 520 521 static void emac_clks_teardown(struct emac_adapter *adpt) 522 { 523 524 unsigned int i; 525 526 for (i = 0; i < EMAC_CLK_CNT; i++) 527 clk_disable_unprepare(adpt->clk[i]); 528 } 529 530 /* Get the resources */ 531 static int emac_probe_resources(struct platform_device *pdev, 532 struct emac_adapter *adpt) 533 { 534 struct net_device *netdev = adpt->netdev; 535 char maddr[ETH_ALEN]; 536 int ret = 0; 537 538 /* get mac address */ 539 if (device_get_mac_address(&pdev->dev, maddr, ETH_ALEN)) 540 ether_addr_copy(netdev->dev_addr, maddr); 541 else 542 eth_hw_addr_random(netdev); 543 544 /* Core 0 interrupt */ 545 ret = platform_get_irq(pdev, 0); 546 if (ret < 0) 547 return ret; 548 adpt->irq.irq = ret; 549 550 /* base register address */ 551 adpt->base = devm_platform_ioremap_resource(pdev, 0); 552 if (IS_ERR(adpt->base)) 553 return PTR_ERR(adpt->base); 554 555 /* CSR register address */ 556 adpt->csr = devm_platform_ioremap_resource(pdev, 1); 557 if (IS_ERR(adpt->csr)) 558 return PTR_ERR(adpt->csr); 559 560 netdev->base_addr = (unsigned long)adpt->base; 561 562 return 0; 563 } 564 565 static const struct of_device_id emac_dt_match[] = { 566 { 567 .compatible = "qcom,fsm9900-emac", 568 }, 569 {} 570 }; 571 MODULE_DEVICE_TABLE(of, emac_dt_match); 572 573 #if IS_ENABLED(CONFIG_ACPI) 574 static const struct acpi_device_id emac_acpi_match[] = { 575 { 576 .id = "QCOM8070", 577 }, 578 {} 579 }; 580 MODULE_DEVICE_TABLE(acpi, emac_acpi_match); 581 #endif 582 583 static int emac_probe(struct platform_device *pdev) 584 { 585 struct net_device *netdev; 586 struct emac_adapter *adpt; 587 struct emac_sgmii *phy; 588 u16 devid, revid; 589 u32 reg; 590 int ret; 591 592 /* The TPD buffer address is limited to: 593 * 1. PTP: 45bits. (Driver doesn't support yet.) 594 * 2. NON-PTP: 46bits. 595 */ 596 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(46)); 597 if (ret) { 598 dev_err(&pdev->dev, "could not set DMA mask\n"); 599 return ret; 600 } 601 602 netdev = alloc_etherdev(sizeof(struct emac_adapter)); 603 if (!netdev) 604 return -ENOMEM; 605 606 dev_set_drvdata(&pdev->dev, netdev); 607 SET_NETDEV_DEV(netdev, &pdev->dev); 608 emac_set_ethtool_ops(netdev); 609 610 adpt = netdev_priv(netdev); 611 adpt->netdev = netdev; 612 adpt->msg_enable = EMAC_MSG_DEFAULT; 613 614 phy = &adpt->phy; 615 atomic_set(&phy->decode_error_count, 0); 616 617 mutex_init(&adpt->reset_lock); 618 spin_lock_init(&adpt->stats.lock); 619 620 adpt->irq.mask = RX_PKT_INT0 | IMR_NORMAL_MASK; 621 622 ret = emac_probe_resources(pdev, adpt); 623 if (ret) 624 goto err_undo_netdev; 625 626 /* initialize clocks */ 627 ret = emac_clks_phase1_init(pdev, adpt); 628 if (ret) { 629 dev_err(&pdev->dev, "could not initialize clocks\n"); 630 goto err_undo_netdev; 631 } 632 633 netdev->watchdog_timeo = EMAC_WATCHDOG_TIME; 634 netdev->irq = adpt->irq.irq; 635 636 netdev->netdev_ops = &emac_netdev_ops; 637 638 emac_init_adapter(adpt); 639 640 /* init external phy */ 641 ret = emac_phy_config(pdev, adpt); 642 if (ret) 643 goto err_undo_clocks; 644 645 /* init internal sgmii phy */ 646 ret = emac_sgmii_config(pdev, adpt); 647 if (ret) 648 goto err_undo_mdiobus; 649 650 /* enable clocks */ 651 ret = emac_clks_phase2_init(pdev, adpt); 652 if (ret) { 653 dev_err(&pdev->dev, "could not initialize clocks\n"); 654 goto err_undo_mdiobus; 655 } 656 657 /* set hw features */ 658 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM | 659 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX | 660 NETIF_F_HW_VLAN_CTAG_TX; 661 netdev->hw_features = netdev->features; 662 663 netdev->vlan_features |= NETIF_F_SG | NETIF_F_HW_CSUM | 664 NETIF_F_TSO | NETIF_F_TSO6; 665 666 /* MTU range: 46 - 9194 */ 667 netdev->min_mtu = EMAC_MIN_ETH_FRAME_SIZE - 668 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 669 netdev->max_mtu = EMAC_MAX_ETH_FRAME_SIZE - 670 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 671 672 INIT_WORK(&adpt->work_thread, emac_work_thread); 673 674 /* Initialize queues */ 675 emac_mac_rx_tx_ring_init_all(pdev, adpt); 676 677 netif_napi_add(netdev, &adpt->rx_q.napi, emac_napi_rtx, 678 NAPI_POLL_WEIGHT); 679 680 ret = register_netdev(netdev); 681 if (ret) { 682 dev_err(&pdev->dev, "could not register net device\n"); 683 goto err_undo_napi; 684 } 685 686 reg = readl_relaxed(adpt->base + EMAC_DMA_MAS_CTRL); 687 devid = (reg & DEV_ID_NUM_BMSK) >> DEV_ID_NUM_SHFT; 688 revid = (reg & DEV_REV_NUM_BMSK) >> DEV_REV_NUM_SHFT; 689 reg = readl_relaxed(adpt->base + EMAC_CORE_HW_VERSION); 690 691 netif_info(adpt, probe, netdev, 692 "hardware id %d.%d, hardware version %d.%d.%d\n", 693 devid, revid, 694 (reg & MAJOR_BMSK) >> MAJOR_SHFT, 695 (reg & MINOR_BMSK) >> MINOR_SHFT, 696 (reg & STEP_BMSK) >> STEP_SHFT); 697 698 return 0; 699 700 err_undo_napi: 701 netif_napi_del(&adpt->rx_q.napi); 702 err_undo_mdiobus: 703 put_device(&adpt->phydev->mdio.dev); 704 mdiobus_unregister(adpt->mii_bus); 705 err_undo_clocks: 706 emac_clks_teardown(adpt); 707 err_undo_netdev: 708 free_netdev(netdev); 709 710 return ret; 711 } 712 713 static int emac_remove(struct platform_device *pdev) 714 { 715 struct net_device *netdev = dev_get_drvdata(&pdev->dev); 716 struct emac_adapter *adpt = netdev_priv(netdev); 717 718 unregister_netdev(netdev); 719 netif_napi_del(&adpt->rx_q.napi); 720 721 emac_clks_teardown(adpt); 722 723 put_device(&adpt->phydev->mdio.dev); 724 mdiobus_unregister(adpt->mii_bus); 725 free_netdev(netdev); 726 727 if (adpt->phy.digital) 728 iounmap(adpt->phy.digital); 729 iounmap(adpt->phy.base); 730 731 return 0; 732 } 733 734 static void emac_shutdown(struct platform_device *pdev) 735 { 736 struct net_device *netdev = dev_get_drvdata(&pdev->dev); 737 struct emac_adapter *adpt = netdev_priv(netdev); 738 739 if (netdev->flags & IFF_UP) { 740 /* Closing the SGMII turns off its interrupts */ 741 emac_sgmii_close(adpt); 742 743 /* Resetting the MAC turns off all DMA and its interrupts */ 744 emac_mac_reset(adpt); 745 } 746 } 747 748 static struct platform_driver emac_platform_driver = { 749 .probe = emac_probe, 750 .remove = emac_remove, 751 .driver = { 752 .name = "qcom-emac", 753 .of_match_table = emac_dt_match, 754 .acpi_match_table = ACPI_PTR(emac_acpi_match), 755 }, 756 .shutdown = emac_shutdown, 757 }; 758 759 module_platform_driver(emac_platform_driver); 760 761 MODULE_LICENSE("GPL v2"); 762 MODULE_ALIAS("platform:qcom-emac"); 763