1 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12 
13 /* Qualcomm Technologies, Inc. EMAC PHY Controller driver.
14  */
15 
16 #include <linux/module.h>
17 #include <linux/of.h>
18 #include <linux/of_net.h>
19 #include <linux/of_mdio.h>
20 #include <linux/phy.h>
21 #include <linux/iopoll.h>
22 #include <linux/acpi.h>
23 #include "emac.h"
24 #include "emac-mac.h"
25 
26 /* EMAC base register offsets */
27 #define EMAC_MDIO_CTRL                                        0x001414
28 #define EMAC_PHY_STS                                          0x001418
29 #define EMAC_MDIO_EX_CTRL                                     0x001440
30 
31 /* EMAC_MDIO_CTRL */
32 #define MDIO_MODE                                              BIT(30)
33 #define MDIO_PR                                                BIT(29)
34 #define MDIO_AP_EN                                             BIT(28)
35 #define MDIO_BUSY                                              BIT(27)
36 #define MDIO_CLK_SEL_BMSK                                    0x7000000
37 #define MDIO_CLK_SEL_SHFT                                           24
38 #define MDIO_START                                             BIT(23)
39 #define SUP_PREAMBLE                                           BIT(22)
40 #define MDIO_RD_NWR                                            BIT(21)
41 #define MDIO_REG_ADDR_BMSK                                    0x1f0000
42 #define MDIO_REG_ADDR_SHFT                                          16
43 #define MDIO_DATA_BMSK                                          0xffff
44 #define MDIO_DATA_SHFT                                               0
45 
46 /* EMAC_PHY_STS */
47 #define PHY_ADDR_BMSK                                         0x1f0000
48 #define PHY_ADDR_SHFT                                               16
49 
50 #define MDIO_CLK_25_4                                                0
51 #define MDIO_CLK_25_28                                               7
52 
53 #define MDIO_WAIT_TIMES                                           1000
54 
55 #define EMAC_LINK_SPEED_DEFAULT (\
56 		EMAC_LINK_SPEED_10_HALF  |\
57 		EMAC_LINK_SPEED_10_FULL  |\
58 		EMAC_LINK_SPEED_100_HALF |\
59 		EMAC_LINK_SPEED_100_FULL |\
60 		EMAC_LINK_SPEED_1GB_FULL)
61 
62 /**
63  * emac_phy_mdio_autopoll_disable() - disable mdio autopoll
64  * @adpt: the emac adapter
65  *
66  * The autopoll feature takes over the MDIO bus.  In order for
67  * the PHY driver to be able to talk to the PHY over the MDIO
68  * bus, we need to temporarily disable the autopoll feature.
69  */
70 static int emac_phy_mdio_autopoll_disable(struct emac_adapter *adpt)
71 {
72 	u32 val;
73 
74 	/* disable autopoll */
75 	emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, MDIO_AP_EN, 0);
76 
77 	/* wait for any mdio polling to complete */
78 	if (!readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, val,
79 				!(val & MDIO_BUSY), 100, MDIO_WAIT_TIMES * 100))
80 		return 0;
81 
82 	/* failed to disable; ensure it is enabled before returning */
83 	emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, 0, MDIO_AP_EN);
84 
85 	return -EBUSY;
86 }
87 
88 /**
89  * emac_phy_mdio_autopoll_disable() - disable mdio autopoll
90  * @adpt: the emac adapter
91  *
92  * The EMAC has the ability to poll the external PHY on the MDIO
93  * bus for link state changes.  This eliminates the need for the
94  * driver to poll the phy.  If if the link state does change,
95  * the EMAC issues an interrupt on behalf of the PHY.
96  */
97 static void emac_phy_mdio_autopoll_enable(struct emac_adapter *adpt)
98 {
99 	emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, 0, MDIO_AP_EN);
100 }
101 
102 static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum)
103 {
104 	struct emac_adapter *adpt = bus->priv;
105 	u32 reg;
106 	int ret;
107 
108 	ret = emac_phy_mdio_autopoll_disable(adpt);
109 	if (ret)
110 		return ret;
111 
112 	emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
113 			  (addr << PHY_ADDR_SHFT));
114 
115 	reg = SUP_PREAMBLE |
116 	      ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
117 	      ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
118 	      MDIO_START | MDIO_RD_NWR;
119 
120 	writel(reg, adpt->base + EMAC_MDIO_CTRL);
121 
122 	if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
123 			       !(reg & (MDIO_START | MDIO_BUSY)),
124 			       100, MDIO_WAIT_TIMES * 100))
125 		ret = -EIO;
126 	else
127 		ret = (reg >> MDIO_DATA_SHFT) & MDIO_DATA_BMSK;
128 
129 	emac_phy_mdio_autopoll_enable(adpt);
130 
131 	return ret;
132 }
133 
134 static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
135 {
136 	struct emac_adapter *adpt = bus->priv;
137 	u32 reg;
138 	int ret;
139 
140 	ret = emac_phy_mdio_autopoll_disable(adpt);
141 	if (ret)
142 		return ret;
143 
144 	emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
145 			  (addr << PHY_ADDR_SHFT));
146 
147 	reg = SUP_PREAMBLE |
148 		((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
149 		((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
150 		((val << MDIO_DATA_SHFT) & MDIO_DATA_BMSK) |
151 		MDIO_START;
152 
153 	writel(reg, adpt->base + EMAC_MDIO_CTRL);
154 
155 	if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
156 			       !(reg & (MDIO_START | MDIO_BUSY)), 100,
157 			       MDIO_WAIT_TIMES * 100))
158 		ret = -EIO;
159 
160 	emac_phy_mdio_autopoll_enable(adpt);
161 
162 	return ret;
163 }
164 
165 /* Configure the MDIO bus and connect the external PHY */
166 int emac_phy_config(struct platform_device *pdev, struct emac_adapter *adpt)
167 {
168 	struct device_node *np = pdev->dev.of_node;
169 	struct mii_bus *mii_bus;
170 	int ret;
171 
172 	/* Create the mii_bus object for talking to the MDIO bus */
173 	adpt->mii_bus = mii_bus = devm_mdiobus_alloc(&pdev->dev);
174 	if (!mii_bus)
175 		return -ENOMEM;
176 
177 	mii_bus->name = "emac-mdio";
178 	snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
179 	mii_bus->read = emac_mdio_read;
180 	mii_bus->write = emac_mdio_write;
181 	mii_bus->parent = &pdev->dev;
182 	mii_bus->priv = adpt;
183 
184 	if (has_acpi_companion(&pdev->dev)) {
185 		u32 phy_addr;
186 
187 		ret = mdiobus_register(mii_bus);
188 		if (ret) {
189 			dev_err(&pdev->dev, "could not register mdio bus\n");
190 			return ret;
191 		}
192 		ret = device_property_read_u32(&pdev->dev, "phy-channel",
193 					       &phy_addr);
194 		if (ret)
195 			/* If we can't read a valid phy address, then assume
196 			 * that there is only one phy on this mdio bus.
197 			 */
198 			adpt->phydev = phy_find_first(mii_bus);
199 		else
200 			adpt->phydev = mdiobus_get_phy(mii_bus, phy_addr);
201 
202 		/* of_phy_find_device() claims a reference to the phydev,
203 		 * so we do that here manually as well. When the driver
204 		 * later unloads, it can unilaterally drop the reference
205 		 * without worrying about ACPI vs DT.
206 		 */
207 		if (adpt->phydev)
208 			get_device(&adpt->phydev->mdio.dev);
209 	} else {
210 		struct device_node *phy_np;
211 
212 		ret = of_mdiobus_register(mii_bus, np);
213 		if (ret) {
214 			dev_err(&pdev->dev, "could not register mdio bus\n");
215 			return ret;
216 		}
217 
218 		phy_np = of_parse_phandle(np, "phy-handle", 0);
219 		adpt->phydev = of_phy_find_device(phy_np);
220 		of_node_put(phy_np);
221 	}
222 
223 	if (!adpt->phydev) {
224 		dev_err(&pdev->dev, "could not find external phy\n");
225 		mdiobus_unregister(mii_bus);
226 		return -ENODEV;
227 	}
228 
229 	return 0;
230 }
231