197fb5e8dSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2b9b17debSTimur Tabi /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
3b9b17debSTimur Tabi  */
4b9b17debSTimur Tabi 
5b9b17debSTimur Tabi /* EMAC DMA HW engine uses three rings:
6b9b17debSTimur Tabi  * Tx:
7b9b17debSTimur Tabi  *   TPD: Transmit Packet Descriptor ring.
8b9b17debSTimur Tabi  * Rx:
9b9b17debSTimur Tabi  *   RFD: Receive Free Descriptor ring.
10b9b17debSTimur Tabi  *     Ring of descriptors with empty buffers to be filled by Rx HW.
11b9b17debSTimur Tabi  *   RRD: Receive Return Descriptor ring.
12b9b17debSTimur Tabi  *     Ring of descriptors with buffers filled with received data.
13b9b17debSTimur Tabi  */
14b9b17debSTimur Tabi 
15b9b17debSTimur Tabi #ifndef _EMAC_HW_H_
16b9b17debSTimur Tabi #define _EMAC_HW_H_
17b9b17debSTimur Tabi 
18b9b17debSTimur Tabi /* EMAC_CSR register offsets */
19b9b17debSTimur Tabi #define EMAC_EMAC_WRAPPER_CSR1                                0x000000
20b9b17debSTimur Tabi #define EMAC_EMAC_WRAPPER_CSR2                                0x000004
21b9b17debSTimur Tabi #define EMAC_EMAC_WRAPPER_TX_TS_LO                            0x000104
22b9b17debSTimur Tabi #define EMAC_EMAC_WRAPPER_TX_TS_HI                            0x000108
23b9b17debSTimur Tabi #define EMAC_EMAC_WRAPPER_TX_TS_INX                           0x00010c
24b9b17debSTimur Tabi 
25b9b17debSTimur Tabi /* DMA Order Settings */
26b9b17debSTimur Tabi enum emac_dma_order {
27b9b17debSTimur Tabi 	emac_dma_ord_in = 1,
28b9b17debSTimur Tabi 	emac_dma_ord_enh = 2,
29b9b17debSTimur Tabi 	emac_dma_ord_out = 4
30b9b17debSTimur Tabi };
31b9b17debSTimur Tabi 
32b9b17debSTimur Tabi enum emac_dma_req_block {
33b9b17debSTimur Tabi 	emac_dma_req_128 = 0,
34b9b17debSTimur Tabi 	emac_dma_req_256 = 1,
35b9b17debSTimur Tabi 	emac_dma_req_512 = 2,
36b9b17debSTimur Tabi 	emac_dma_req_1024 = 3,
37b9b17debSTimur Tabi 	emac_dma_req_2048 = 4,
38b9b17debSTimur Tabi 	emac_dma_req_4096 = 5
39b9b17debSTimur Tabi };
40b9b17debSTimur Tabi 
41b9b17debSTimur Tabi /* Returns the value of bits idx...idx+n_bits */
42b9b17debSTimur Tabi #define BITS_GET(val, lo, hi) ((le32_to_cpu(val) & GENMASK((hi), (lo))) >> lo)
43b9b17debSTimur Tabi #define BITS_SET(val, lo, hi, new_val) \
44b9b17debSTimur Tabi 	val = cpu_to_le32((le32_to_cpu(val) & (~GENMASK((hi), (lo)))) |	\
45b9b17debSTimur Tabi 		(((new_val) << (lo)) & GENMASK((hi), (lo))))
46b9b17debSTimur Tabi 
47b9b17debSTimur Tabi /* RRD (Receive Return Descriptor) */
48b9b17debSTimur Tabi struct emac_rrd {
49b9b17debSTimur Tabi 	u32	word[6];
50b9b17debSTimur Tabi 
51b9b17debSTimur Tabi /* number of RFD */
52b9b17debSTimur Tabi #define RRD_NOR(rrd)			BITS_GET((rrd)->word[0], 16, 19)
53b9b17debSTimur Tabi /* start consumer index of rfd-ring */
54b9b17debSTimur Tabi #define RRD_SI(rrd)			BITS_GET((rrd)->word[0], 20, 31)
55b9b17debSTimur Tabi /* vlan-tag (CVID, CFI and PRI) */
56b9b17debSTimur Tabi #define RRD_CVALN_TAG(rrd)		BITS_GET((rrd)->word[2], 0, 15)
57b9b17debSTimur Tabi /* length of the packet */
58b9b17debSTimur Tabi #define RRD_PKT_SIZE(rrd)		BITS_GET((rrd)->word[3], 0, 13)
59b9b17debSTimur Tabi /* L4(TCP/UDP) checksum failed */
60b9b17debSTimur Tabi #define RRD_L4F(rrd)			BITS_GET((rrd)->word[3], 14, 14)
61b9b17debSTimur Tabi /* vlan tagged */
62b9b17debSTimur Tabi #define RRD_CVTAG(rrd)			BITS_GET((rrd)->word[3], 16, 16)
63b9b17debSTimur Tabi /* When set, indicates that the descriptor is updated by the IP core.
64b9b17debSTimur Tabi  * When cleared, indicates that the descriptor is invalid.
65b9b17debSTimur Tabi  */
66b9b17debSTimur Tabi #define RRD_UPDT(rrd)			BITS_GET((rrd)->word[3], 31, 31)
67b9b17debSTimur Tabi #define RRD_UPDT_SET(rrd, val)		BITS_SET((rrd)->word[3], 31, 31, val)
68b9b17debSTimur Tabi /* timestamp low */
69b9b17debSTimur Tabi #define RRD_TS_LOW(rrd)			BITS_GET((rrd)->word[4], 0, 29)
70b9b17debSTimur Tabi /* timestamp high */
71b9b17debSTimur Tabi #define RRD_TS_HI(rrd)			le32_to_cpu((rrd)->word[5])
72b9b17debSTimur Tabi };
73b9b17debSTimur Tabi 
74b9b17debSTimur Tabi /* TPD (Transmit Packet Descriptor) */
75b9b17debSTimur Tabi struct emac_tpd {
76b9b17debSTimur Tabi 	u32				word[4];
77b9b17debSTimur Tabi 
78b9b17debSTimur Tabi /* Number of bytes of the transmit packet. (include 4-byte CRC) */
79b9b17debSTimur Tabi #define TPD_BUF_LEN_SET(tpd, val)	BITS_SET((tpd)->word[0], 0, 15, val)
80b9b17debSTimur Tabi /* Custom Checksum Offload: When set, ask IP core to offload custom checksum */
81b9b17debSTimur Tabi #define TPD_CSX_SET(tpd, val)		BITS_SET((tpd)->word[1], 8, 8, val)
82b9b17debSTimur Tabi /* TCP Large Send Offload: When set, ask IP core to do offload TCP Large Send */
83b9b17debSTimur Tabi #define TPD_LSO(tpd)			BITS_GET((tpd)->word[1], 12, 12)
84b9b17debSTimur Tabi #define TPD_LSO_SET(tpd, val)		BITS_SET((tpd)->word[1], 12, 12, val)
85b9b17debSTimur Tabi /*  Large Send Offload Version: When set, indicates this is an LSOv2
86b9b17debSTimur Tabi  * (for both IPv4 and IPv6). When cleared, indicates this is an LSOv1
87b9b17debSTimur Tabi  * (only for IPv4).
88b9b17debSTimur Tabi  */
89b9b17debSTimur Tabi #define TPD_LSOV_SET(tpd, val)		BITS_SET((tpd)->word[1], 13, 13, val)
90b9b17debSTimur Tabi /* IPv4 packet: When set, indicates this is an  IPv4 packet, this bit is only
91b9b17debSTimur Tabi  * for LSOV2 format.
92b9b17debSTimur Tabi  */
93b9b17debSTimur Tabi #define TPD_IPV4_SET(tpd, val)		BITS_SET((tpd)->word[1], 16, 16, val)
94b9b17debSTimur Tabi /* 0: Ethernet   frame (DA+SA+TYPE+DATA+CRC)
95b9b17debSTimur Tabi  * 1: IEEE 802.3 frame (DA+SA+LEN+DSAP+SSAP+CTL+ORG+TYPE+DATA+CRC)
96b9b17debSTimur Tabi  */
97b9b17debSTimur Tabi #define TPD_TYP_SET(tpd, val)		BITS_SET((tpd)->word[1], 17, 17, val)
98b9b17debSTimur Tabi /* Low-32bit Buffer Address */
99b9b17debSTimur Tabi #define TPD_BUFFER_ADDR_L_SET(tpd, val)	((tpd)->word[2] = cpu_to_le32(val))
100b9b17debSTimur Tabi /* CVLAN Tag to be inserted if INS_VLAN_TAG is set, CVLAN TPID based on global
101b9b17debSTimur Tabi  * register configuration.
102b9b17debSTimur Tabi  */
103b9b17debSTimur Tabi #define TPD_CVLAN_TAG_SET(tpd, val)	BITS_SET((tpd)->word[3], 0, 15, val)
104b9b17debSTimur Tabi /*  Insert CVlan Tag: When set, ask MAC to insert CVLAN TAG to outgoing packet
105b9b17debSTimur Tabi  */
106b9b17debSTimur Tabi #define TPD_INSTC_SET(tpd, val)		BITS_SET((tpd)->word[3], 17, 17, val)
107b9b17debSTimur Tabi /* High-14bit Buffer Address, So, the 64b-bit address is
108b9b17debSTimur Tabi  * {DESC_CTRL_11_TX_DATA_HIADDR[17:0],(register) BUFFER_ADDR_H, BUFFER_ADDR_L}
109df262dbdSWang Dongsheng  * Extend TPD_BUFFER_ADDR_H to [31, 18], because we never enable timestamping.
110b9b17debSTimur Tabi  */
111df262dbdSWang Dongsheng #define TPD_BUFFER_ADDR_H_SET(tpd, val)	BITS_SET((tpd)->word[3], 18, 31, val)
112b9b17debSTimur Tabi /* Format D. Word offset from the 1st byte of this packet to start to calculate
113b9b17debSTimur Tabi  * the custom checksum.
114b9b17debSTimur Tabi  */
115b9b17debSTimur Tabi #define TPD_PAYLOAD_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 0, 7, val)
116b9b17debSTimur Tabi /*  Format D. Word offset from the 1st byte of this packet to fill the custom
117b9b17debSTimur Tabi  * checksum to
118b9b17debSTimur Tabi  */
119b9b17debSTimur Tabi #define TPD_CXSUM_OFFSET_SET(tpd, val)	BITS_SET((tpd)->word[1], 18, 25, val)
120b9b17debSTimur Tabi 
121b9b17debSTimur Tabi /* Format C. TCP Header offset from the 1st byte of this packet. (byte unit) */
122b9b17debSTimur Tabi #define TPD_TCPHDR_OFFSET_SET(tpd, val)	BITS_SET((tpd)->word[1], 0, 7, val)
123b9b17debSTimur Tabi /* Format C. MSS (Maximum Segment Size) got from the protocol layer. (byte unit)
124b9b17debSTimur Tabi  */
125b9b17debSTimur Tabi #define TPD_MSS_SET(tpd, val)		BITS_SET((tpd)->word[1], 18, 30, val)
126b9b17debSTimur Tabi /* packet length in ext tpd */
127b9b17debSTimur Tabi #define TPD_PKT_LEN_SET(tpd, val)	((tpd)->word[2] = cpu_to_le32(val))
128b9b17debSTimur Tabi };
129b9b17debSTimur Tabi 
130b9b17debSTimur Tabi /* emac_ring_header represents a single, contiguous block of DMA space
131b9b17debSTimur Tabi  * mapped for the three descriptor rings (tpd, rfd, rrd)
132b9b17debSTimur Tabi  */
133b9b17debSTimur Tabi struct emac_ring_header {
134b9b17debSTimur Tabi 	void			*v_addr;	/* virtual address */
135b9b17debSTimur Tabi 	dma_addr_t		dma_addr;	/* dma address */
136b9b17debSTimur Tabi 	size_t			size;		/* length in bytes */
137b9b17debSTimur Tabi 	size_t			used;
138b9b17debSTimur Tabi };
139b9b17debSTimur Tabi 
140b9b17debSTimur Tabi /* emac_buffer is wrapper around a pointer to a socket buffer
141b9b17debSTimur Tabi  * so a DMA handle can be stored along with the skb
142b9b17debSTimur Tabi  */
143b9b17debSTimur Tabi struct emac_buffer {
144b9b17debSTimur Tabi 	struct sk_buff		*skb;		/* socket buffer */
145b9b17debSTimur Tabi 	u16			length;		/* rx buffer length */
146b9b17debSTimur Tabi 	dma_addr_t		dma_addr;	/* dma address */
147b9b17debSTimur Tabi };
148b9b17debSTimur Tabi 
149b9b17debSTimur Tabi /* receive free descriptor (rfd) ring */
150b9b17debSTimur Tabi struct emac_rfd_ring {
151b9b17debSTimur Tabi 	struct emac_buffer	*rfbuff;
152b9b17debSTimur Tabi 	u32			*v_addr;	/* virtual address */
153b9b17debSTimur Tabi 	dma_addr_t		dma_addr;	/* dma address */
154b9b17debSTimur Tabi 	size_t			size;		/* length in bytes */
155b9b17debSTimur Tabi 	unsigned int		count;		/* number of desc in the ring */
156b9b17debSTimur Tabi 	unsigned int		produce_idx;
157b9b17debSTimur Tabi 	unsigned int		process_idx;
158b9b17debSTimur Tabi 	unsigned int		consume_idx;	/* unused */
159b9b17debSTimur Tabi };
160b9b17debSTimur Tabi 
161b9b17debSTimur Tabi /* Receive Return Desciptor (RRD) ring */
162b9b17debSTimur Tabi struct emac_rrd_ring {
163b9b17debSTimur Tabi 	u32			*v_addr;	/* virtual address */
164b9b17debSTimur Tabi 	dma_addr_t		dma_addr;	/* physical address */
165b9b17debSTimur Tabi 	size_t			size;		/* length in bytes */
166b9b17debSTimur Tabi 	unsigned int		count;		/* number of desc in the ring */
167b9b17debSTimur Tabi 	unsigned int		produce_idx;	/* unused */
168b9b17debSTimur Tabi 	unsigned int		consume_idx;
169b9b17debSTimur Tabi };
170b9b17debSTimur Tabi 
171b9b17debSTimur Tabi /* Rx queue */
172b9b17debSTimur Tabi struct emac_rx_queue {
173b9b17debSTimur Tabi 	struct net_device	*netdev;	/* netdev ring belongs to */
174b9b17debSTimur Tabi 	struct emac_rrd_ring	rrd;
175b9b17debSTimur Tabi 	struct emac_rfd_ring	rfd;
176b9b17debSTimur Tabi 	struct napi_struct	napi;
177b9b17debSTimur Tabi 	struct emac_irq		*irq;
178b9b17debSTimur Tabi 
179b9b17debSTimur Tabi 	u32			intr;
180b9b17debSTimur Tabi 	u32			produce_mask;
181b9b17debSTimur Tabi 	u32			process_mask;
182b9b17debSTimur Tabi 	u32			consume_mask;
183b9b17debSTimur Tabi 
184b9b17debSTimur Tabi 	u16			produce_reg;
185b9b17debSTimur Tabi 	u16			process_reg;
186b9b17debSTimur Tabi 	u16			consume_reg;
187b9b17debSTimur Tabi 
188b9b17debSTimur Tabi 	u8			produce_shift;
189b9b17debSTimur Tabi 	u8			process_shft;
190b9b17debSTimur Tabi 	u8			consume_shift;
191b9b17debSTimur Tabi };
192b9b17debSTimur Tabi 
193b9b17debSTimur Tabi /* Transimit Packet Descriptor (tpd) ring */
194b9b17debSTimur Tabi struct emac_tpd_ring {
195b9b17debSTimur Tabi 	struct emac_buffer	*tpbuff;
196b9b17debSTimur Tabi 	u32			*v_addr;	/* virtual address */
197b9b17debSTimur Tabi 	dma_addr_t		dma_addr;	/* dma address */
198b9b17debSTimur Tabi 
199b9b17debSTimur Tabi 	size_t			size;		/* length in bytes */
200b9b17debSTimur Tabi 	unsigned int		count;		/* number of desc in the ring */
201b9b17debSTimur Tabi 	unsigned int		produce_idx;
202b9b17debSTimur Tabi 	unsigned int		consume_idx;
203b9b17debSTimur Tabi 	unsigned int		last_produce_idx;
204b9b17debSTimur Tabi };
205b9b17debSTimur Tabi 
206b9b17debSTimur Tabi /* Tx queue */
207b9b17debSTimur Tabi struct emac_tx_queue {
208b9b17debSTimur Tabi 	struct emac_tpd_ring	tpd;
209b9b17debSTimur Tabi 
210b9b17debSTimur Tabi 	u32			produce_mask;
211b9b17debSTimur Tabi 	u32			consume_mask;
212b9b17debSTimur Tabi 
213b9b17debSTimur Tabi 	u16			max_packets;	/* max packets per interrupt */
214b9b17debSTimur Tabi 	u16			produce_reg;
215b9b17debSTimur Tabi 	u16			consume_reg;
216b9b17debSTimur Tabi 
217b9b17debSTimur Tabi 	u8			produce_shift;
218b9b17debSTimur Tabi 	u8			consume_shift;
219b9b17debSTimur Tabi };
220b9b17debSTimur Tabi 
221b9b17debSTimur Tabi struct emac_adapter;
222b9b17debSTimur Tabi 
223b9b17debSTimur Tabi int  emac_mac_up(struct emac_adapter *adpt);
224b9b17debSTimur Tabi void emac_mac_down(struct emac_adapter *adpt);
225b9b17debSTimur Tabi void emac_mac_reset(struct emac_adapter *adpt);
226b9b17debSTimur Tabi void emac_mac_stop(struct emac_adapter *adpt);
227b9b17debSTimur Tabi void emac_mac_mode_config(struct emac_adapter *adpt);
228b9b17debSTimur Tabi void emac_mac_rx_process(struct emac_adapter *adpt, struct emac_rx_queue *rx_q,
229b9b17debSTimur Tabi 			 int *num_pkts, int max_pkts);
2303e1853e4SYunjian Wang netdev_tx_t emac_mac_tx_buf_send(struct emac_adapter *adpt,
2313e1853e4SYunjian Wang 				 struct emac_tx_queue *tx_q,
232b9b17debSTimur Tabi 				 struct sk_buff *skb);
233b9b17debSTimur Tabi void emac_mac_tx_process(struct emac_adapter *adpt, struct emac_tx_queue *tx_q);
234b9b17debSTimur Tabi void emac_mac_rx_tx_ring_init_all(struct platform_device *pdev,
235b9b17debSTimur Tabi 				  struct emac_adapter *adpt);
236b9b17debSTimur Tabi int  emac_mac_rx_tx_rings_alloc_all(struct emac_adapter *adpt);
237b9b17debSTimur Tabi void emac_mac_rx_tx_rings_free_all(struct emac_adapter *adpt);
238b9b17debSTimur Tabi void emac_mac_multicast_addr_clear(struct emac_adapter *adpt);
239b9b17debSTimur Tabi void emac_mac_multicast_addr_set(struct emac_adapter *adpt, u8 *addr);
240b9b17debSTimur Tabi 
241b9b17debSTimur Tabi #endif /*_EMAC_HW_H_*/
242