1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic qlcnic NIC Driver 4 * Copyright (c) 2009-2013 QLogic Corporation 5 */ 6 7 #include "qlcnic.h" 8 #include "qlcnic_hw.h" 9 10 struct crb_addr_pair { 11 u32 addr; 12 u32 data; 13 }; 14 15 #define QLCNIC_MAX_CRB_XFORM 60 16 static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM]; 17 18 #define crb_addr_transform(name) \ 19 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \ 20 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20) 21 22 #define QLCNIC_ADDR_ERROR (0xffffffff) 23 24 static int 25 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter); 26 27 static void crb_addr_transform_setup(void) 28 { 29 crb_addr_transform(XDMA); 30 crb_addr_transform(TIMR); 31 crb_addr_transform(SRE); 32 crb_addr_transform(SQN3); 33 crb_addr_transform(SQN2); 34 crb_addr_transform(SQN1); 35 crb_addr_transform(SQN0); 36 crb_addr_transform(SQS3); 37 crb_addr_transform(SQS2); 38 crb_addr_transform(SQS1); 39 crb_addr_transform(SQS0); 40 crb_addr_transform(RPMX7); 41 crb_addr_transform(RPMX6); 42 crb_addr_transform(RPMX5); 43 crb_addr_transform(RPMX4); 44 crb_addr_transform(RPMX3); 45 crb_addr_transform(RPMX2); 46 crb_addr_transform(RPMX1); 47 crb_addr_transform(RPMX0); 48 crb_addr_transform(ROMUSB); 49 crb_addr_transform(SN); 50 crb_addr_transform(QMN); 51 crb_addr_transform(QMS); 52 crb_addr_transform(PGNI); 53 crb_addr_transform(PGND); 54 crb_addr_transform(PGN3); 55 crb_addr_transform(PGN2); 56 crb_addr_transform(PGN1); 57 crb_addr_transform(PGN0); 58 crb_addr_transform(PGSI); 59 crb_addr_transform(PGSD); 60 crb_addr_transform(PGS3); 61 crb_addr_transform(PGS2); 62 crb_addr_transform(PGS1); 63 crb_addr_transform(PGS0); 64 crb_addr_transform(PS); 65 crb_addr_transform(PH); 66 crb_addr_transform(NIU); 67 crb_addr_transform(I2Q); 68 crb_addr_transform(EG); 69 crb_addr_transform(MN); 70 crb_addr_transform(MS); 71 crb_addr_transform(CAS2); 72 crb_addr_transform(CAS1); 73 crb_addr_transform(CAS0); 74 crb_addr_transform(CAM); 75 crb_addr_transform(C2C1); 76 crb_addr_transform(C2C0); 77 crb_addr_transform(SMB); 78 crb_addr_transform(OCM0); 79 crb_addr_transform(I2C0); 80 } 81 82 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter) 83 { 84 struct qlcnic_recv_context *recv_ctx; 85 struct qlcnic_host_rds_ring *rds_ring; 86 struct qlcnic_rx_buffer *rx_buf; 87 int i, ring; 88 89 recv_ctx = adapter->recv_ctx; 90 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 91 rds_ring = &recv_ctx->rds_rings[ring]; 92 for (i = 0; i < rds_ring->num_desc; ++i) { 93 rx_buf = &(rds_ring->rx_buf_arr[i]); 94 if (rx_buf->skb == NULL) 95 continue; 96 97 dma_unmap_single(&adapter->pdev->dev, rx_buf->dma, 98 rds_ring->dma_size, DMA_FROM_DEVICE); 99 100 dev_kfree_skb_any(rx_buf->skb); 101 } 102 } 103 } 104 105 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter) 106 { 107 struct qlcnic_recv_context *recv_ctx; 108 struct qlcnic_host_rds_ring *rds_ring; 109 struct qlcnic_rx_buffer *rx_buf; 110 int i, ring; 111 112 recv_ctx = adapter->recv_ctx; 113 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 114 rds_ring = &recv_ctx->rds_rings[ring]; 115 116 INIT_LIST_HEAD(&rds_ring->free_list); 117 118 rx_buf = rds_ring->rx_buf_arr; 119 for (i = 0; i < rds_ring->num_desc; i++) { 120 list_add_tail(&rx_buf->list, 121 &rds_ring->free_list); 122 rx_buf++; 123 } 124 } 125 } 126 127 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter, 128 struct qlcnic_host_tx_ring *tx_ring) 129 { 130 struct qlcnic_cmd_buffer *cmd_buf; 131 struct qlcnic_skb_frag *buffrag; 132 int i, j; 133 134 spin_lock(&tx_ring->tx_clean_lock); 135 136 cmd_buf = tx_ring->cmd_buf_arr; 137 for (i = 0; i < tx_ring->num_desc; i++) { 138 buffrag = cmd_buf->frag_array; 139 if (buffrag->dma) { 140 dma_unmap_single(&adapter->pdev->dev, buffrag->dma, 141 buffrag->length, DMA_TO_DEVICE); 142 buffrag->dma = 0ULL; 143 } 144 for (j = 1; j < cmd_buf->frag_count; j++) { 145 buffrag++; 146 if (buffrag->dma) { 147 dma_unmap_page(&adapter->pdev->dev, 148 buffrag->dma, buffrag->length, 149 DMA_TO_DEVICE); 150 buffrag->dma = 0ULL; 151 } 152 } 153 if (cmd_buf->skb) { 154 dev_kfree_skb_any(cmd_buf->skb); 155 cmd_buf->skb = NULL; 156 } 157 cmd_buf++; 158 } 159 160 spin_unlock(&tx_ring->tx_clean_lock); 161 } 162 163 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter) 164 { 165 struct qlcnic_recv_context *recv_ctx; 166 struct qlcnic_host_rds_ring *rds_ring; 167 int ring; 168 169 recv_ctx = adapter->recv_ctx; 170 171 if (recv_ctx->rds_rings == NULL) 172 return; 173 174 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 175 rds_ring = &recv_ctx->rds_rings[ring]; 176 vfree(rds_ring->rx_buf_arr); 177 rds_ring->rx_buf_arr = NULL; 178 } 179 kfree(recv_ctx->rds_rings); 180 } 181 182 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter) 183 { 184 struct qlcnic_recv_context *recv_ctx; 185 struct qlcnic_host_rds_ring *rds_ring; 186 struct qlcnic_host_sds_ring *sds_ring; 187 struct qlcnic_rx_buffer *rx_buf; 188 int ring, i; 189 190 recv_ctx = adapter->recv_ctx; 191 192 rds_ring = kcalloc(adapter->max_rds_rings, 193 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL); 194 if (rds_ring == NULL) 195 goto err_out; 196 197 recv_ctx->rds_rings = rds_ring; 198 199 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 200 rds_ring = &recv_ctx->rds_rings[ring]; 201 switch (ring) { 202 case RCV_RING_NORMAL: 203 rds_ring->num_desc = adapter->num_rxd; 204 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN; 205 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 206 break; 207 208 case RCV_RING_JUMBO: 209 rds_ring->num_desc = adapter->num_jumbo_rxd; 210 rds_ring->dma_size = 211 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN; 212 213 if (adapter->ahw->capabilities & 214 QLCNIC_FW_CAPABILITY_HW_LRO) 215 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA; 216 217 rds_ring->skb_size = 218 rds_ring->dma_size + NET_IP_ALIGN; 219 break; 220 } 221 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring)); 222 if (rds_ring->rx_buf_arr == NULL) 223 goto err_out; 224 225 INIT_LIST_HEAD(&rds_ring->free_list); 226 /* 227 * Now go through all of them, set reference handles 228 * and put them in the queues. 229 */ 230 rx_buf = rds_ring->rx_buf_arr; 231 for (i = 0; i < rds_ring->num_desc; i++) { 232 list_add_tail(&rx_buf->list, 233 &rds_ring->free_list); 234 rx_buf->ref_handle = i; 235 rx_buf++; 236 } 237 spin_lock_init(&rds_ring->lock); 238 } 239 240 for (ring = 0; ring < adapter->drv_sds_rings; ring++) { 241 sds_ring = &recv_ctx->sds_rings[ring]; 242 sds_ring->irq = adapter->msix_entries[ring].vector; 243 sds_ring->adapter = adapter; 244 sds_ring->num_desc = adapter->num_rxd; 245 if (qlcnic_82xx_check(adapter)) { 246 if (qlcnic_check_multi_tx(adapter) && 247 !adapter->ahw->diag_test) 248 sds_ring->tx_ring = &adapter->tx_ring[ring]; 249 else 250 sds_ring->tx_ring = &adapter->tx_ring[0]; 251 } 252 for (i = 0; i < NUM_RCV_DESC_RINGS; i++) 253 INIT_LIST_HEAD(&sds_ring->free_list[i]); 254 } 255 256 return 0; 257 258 err_out: 259 qlcnic_free_sw_resources(adapter); 260 return -ENOMEM; 261 } 262 263 /* 264 * Utility to translate from internal Phantom CRB address 265 * to external PCI CRB address. 266 */ 267 static u32 qlcnic_decode_crb_addr(u32 addr) 268 { 269 int i; 270 u32 base_addr, offset, pci_base; 271 272 crb_addr_transform_setup(); 273 274 pci_base = QLCNIC_ADDR_ERROR; 275 base_addr = addr & 0xfff00000; 276 offset = addr & 0x000fffff; 277 278 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) { 279 if (crb_addr_xform[i] == base_addr) { 280 pci_base = i << 20; 281 break; 282 } 283 } 284 if (pci_base == QLCNIC_ADDR_ERROR) 285 return pci_base; 286 else 287 return pci_base + offset; 288 } 289 290 #define QLCNIC_MAX_ROM_WAIT_USEC 100 291 292 static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter) 293 { 294 long timeout = 0; 295 long done = 0; 296 int err = 0; 297 298 cond_resched(); 299 while (done == 0) { 300 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err); 301 done &= 2; 302 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) { 303 dev_err(&adapter->pdev->dev, 304 "Timeout reached waiting for rom done"); 305 return -EIO; 306 } 307 udelay(1); 308 } 309 return 0; 310 } 311 312 static int do_rom_fast_read(struct qlcnic_adapter *adapter, 313 u32 addr, u32 *valp) 314 { 315 int err = 0; 316 317 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr); 318 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 319 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3); 320 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb); 321 if (qlcnic_wait_rom_done(adapter)) { 322 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n"); 323 return -EIO; 324 } 325 /* reset abyte_cnt and dummy_byte_cnt */ 326 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0); 327 udelay(10); 328 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 329 330 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err); 331 if (err == -EIO) 332 return err; 333 return 0; 334 } 335 336 static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr, 337 u8 *bytes, size_t size) 338 { 339 int addridx; 340 int ret = 0; 341 342 for (addridx = addr; addridx < (addr + size); addridx += 4) { 343 int v; 344 ret = do_rom_fast_read(adapter, addridx, &v); 345 if (ret != 0) 346 break; 347 *(__le32 *)bytes = cpu_to_le32(v); 348 bytes += 4; 349 } 350 351 return ret; 352 } 353 354 int 355 qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr, 356 u8 *bytes, size_t size) 357 { 358 int ret; 359 360 ret = qlcnic_rom_lock(adapter); 361 if (ret < 0) 362 return ret; 363 364 ret = do_rom_fast_read_words(adapter, addr, bytes, size); 365 366 qlcnic_rom_unlock(adapter); 367 return ret; 368 } 369 370 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp) 371 { 372 int ret; 373 374 if (qlcnic_rom_lock(adapter) != 0) 375 return -EIO; 376 377 ret = do_rom_fast_read(adapter, addr, valp); 378 qlcnic_rom_unlock(adapter); 379 return ret; 380 } 381 382 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter) 383 { 384 int addr, err = 0; 385 int i, n, init_delay; 386 struct crb_addr_pair *buf; 387 unsigned offset; 388 u32 off, val; 389 struct pci_dev *pdev = adapter->pdev; 390 391 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0); 392 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0); 393 394 /* Halt all the indiviual PEGs and other blocks */ 395 /* disable all I2Q */ 396 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0); 397 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0); 398 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0); 399 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0); 400 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0); 401 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0); 402 403 /* disable all niu interrupts */ 404 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff); 405 /* disable xge rx/tx */ 406 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00); 407 /* disable xg1 rx/tx */ 408 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00); 409 /* disable sideband mac */ 410 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00); 411 /* disable ap0 mac */ 412 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00); 413 /* disable ap1 mac */ 414 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00); 415 416 /* halt sre */ 417 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err); 418 if (err == -EIO) 419 return err; 420 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1))); 421 422 /* halt epg */ 423 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1); 424 425 /* halt timers */ 426 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0); 427 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0); 428 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0); 429 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0); 430 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0); 431 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0); 432 /* halt pegs */ 433 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1); 434 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1); 435 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1); 436 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1); 437 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1); 438 msleep(20); 439 440 qlcnic_rom_unlock(adapter); 441 /* big hammer don't reset CAM block on reset */ 442 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff); 443 444 /* Init HW CRB block */ 445 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) || 446 qlcnic_rom_fast_read(adapter, 4, &n) != 0) { 447 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n); 448 return -EIO; 449 } 450 offset = n & 0xffffU; 451 n = (n >> 16) & 0xffffU; 452 453 if (n >= 1024) { 454 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n"); 455 return -EIO; 456 } 457 458 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 459 if (buf == NULL) 460 return -ENOMEM; 461 462 for (i = 0; i < n; i++) { 463 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || 464 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { 465 kfree(buf); 466 return -EIO; 467 } 468 469 buf[i].addr = addr; 470 buf[i].data = val; 471 } 472 473 for (i = 0; i < n; i++) { 474 475 off = qlcnic_decode_crb_addr(buf[i].addr); 476 if (off == QLCNIC_ADDR_ERROR) { 477 dev_err(&pdev->dev, "CRB init value out of range %x\n", 478 buf[i].addr); 479 continue; 480 } 481 off += QLCNIC_PCI_CRBSPACE; 482 483 if (off & 1) 484 continue; 485 486 /* skipping cold reboot MAGIC */ 487 if (off == QLCNIC_CAM_RAM(0x1fc)) 488 continue; 489 if (off == (QLCNIC_CRB_I2C0 + 0x1c)) 490 continue; 491 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */ 492 continue; 493 if (off == (ROMUSB_GLB + 0xa8)) 494 continue; 495 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ 496 continue; 497 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ 498 continue; 499 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ 500 continue; 501 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET) 502 continue; 503 /* skip the function enable register */ 504 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION)) 505 continue; 506 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2)) 507 continue; 508 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB) 509 continue; 510 511 init_delay = 1; 512 /* After writing this register, HW needs time for CRB */ 513 /* to quiet down (else crb_window returns 0xffffffff) */ 514 if (off == QLCNIC_ROMUSB_GLB_SW_RESET) 515 init_delay = 1000; 516 517 QLCWR32(adapter, off, buf[i].data); 518 519 msleep(init_delay); 520 } 521 kfree(buf); 522 523 /* Initialize protocol process engine */ 524 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e); 525 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8); 526 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8); 527 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0); 528 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0); 529 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0); 530 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0); 531 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0); 532 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0); 533 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0); 534 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0); 535 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0); 536 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0); 537 usleep_range(1000, 1500); 538 539 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0); 540 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0); 541 542 return 0; 543 } 544 545 static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter) 546 { 547 u32 val; 548 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT; 549 550 do { 551 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE); 552 553 switch (val) { 554 case PHAN_INITIALIZE_COMPLETE: 555 case PHAN_INITIALIZE_ACK: 556 return 0; 557 case PHAN_INITIALIZE_FAILED: 558 goto out_err; 559 default: 560 break; 561 } 562 563 msleep(QLCNIC_CMDPEG_CHECK_DELAY); 564 565 } while (--retries); 566 567 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 568 PHAN_INITIALIZE_FAILED); 569 570 out_err: 571 dev_err(&adapter->pdev->dev, "Command Peg initialization not " 572 "complete, state: 0x%x.\n", val); 573 return -EIO; 574 } 575 576 static int 577 qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter) 578 { 579 u32 val; 580 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT; 581 582 do { 583 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE); 584 585 if (val == PHAN_PEG_RCV_INITIALIZED) 586 return 0; 587 588 msleep(QLCNIC_RCVPEG_CHECK_DELAY); 589 590 } while (--retries); 591 592 dev_err(&adapter->pdev->dev, "Receive Peg initialization not complete, state: 0x%x.\n", 593 val); 594 return -EIO; 595 } 596 597 int 598 qlcnic_check_fw_status(struct qlcnic_adapter *adapter) 599 { 600 int err; 601 602 err = qlcnic_cmd_peg_ready(adapter); 603 if (err) 604 return err; 605 606 err = qlcnic_receive_peg_ready(adapter); 607 if (err) 608 return err; 609 610 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 611 612 return err; 613 } 614 615 int 616 qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) { 617 618 int timeo; 619 u32 val; 620 621 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO); 622 val = QLC_DEV_GET_DRV(val, adapter->portnum); 623 if ((val & 0x3) != QLCNIC_TYPE_NIC) { 624 dev_err(&adapter->pdev->dev, 625 "Not an Ethernet NIC func=%u\n", val); 626 return -EIO; 627 } 628 adapter->ahw->physical_port = (val >> 2); 629 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo)) 630 timeo = QLCNIC_INIT_TIMEOUT_SECS; 631 632 adapter->dev_init_timeo = timeo; 633 634 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo)) 635 timeo = QLCNIC_RESET_TIMEOUT_SECS; 636 637 adapter->reset_ack_timeo = timeo; 638 639 return 0; 640 } 641 642 static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region, 643 struct qlcnic_flt_entry *region_entry) 644 { 645 struct qlcnic_flt_header flt_hdr; 646 struct qlcnic_flt_entry *flt_entry; 647 int i = 0, ret; 648 u32 entry_size; 649 650 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry)); 651 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION, 652 (u8 *)&flt_hdr, 653 sizeof(struct qlcnic_flt_header)); 654 if (ret) { 655 dev_warn(&adapter->pdev->dev, 656 "error reading flash layout header\n"); 657 return -EIO; 658 } 659 660 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header); 661 flt_entry = vzalloc(entry_size); 662 if (flt_entry == NULL) 663 return -EIO; 664 665 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION + 666 sizeof(struct qlcnic_flt_header), 667 (u8 *)flt_entry, entry_size); 668 if (ret) { 669 dev_warn(&adapter->pdev->dev, 670 "error reading flash layout entries\n"); 671 goto err_out; 672 } 673 674 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) { 675 if (flt_entry[i].region == region) 676 break; 677 i++; 678 } 679 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) { 680 dev_warn(&adapter->pdev->dev, 681 "region=%x not found in %d regions\n", region, i); 682 ret = -EIO; 683 goto err_out; 684 } 685 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry)); 686 687 err_out: 688 vfree(flt_entry); 689 return ret; 690 } 691 692 int 693 qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter) 694 { 695 struct qlcnic_flt_entry fw_entry; 696 u32 ver = -1, min_ver; 697 int ret; 698 699 if (adapter->ahw->revision_id == QLCNIC_P3P_C0) 700 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION, 701 &fw_entry); 702 else 703 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION, 704 &fw_entry); 705 706 if (!ret) 707 /* 0-4:-signature, 4-8:-fw version */ 708 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4, 709 (int *)&ver); 710 else 711 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET, 712 (int *)&ver); 713 714 ver = QLCNIC_DECODE_VERSION(ver); 715 min_ver = QLCNIC_MIN_FW_VERSION; 716 717 if (ver < min_ver) { 718 dev_err(&adapter->pdev->dev, 719 "firmware version %d.%d.%d unsupported." 720 "Min supported version %d.%d.%d\n", 721 _major(ver), _minor(ver), _build(ver), 722 _major(min_ver), _minor(min_ver), _build(min_ver)); 723 return -EINVAL; 724 } 725 726 return 0; 727 } 728 729 static int 730 qlcnic_has_mn(struct qlcnic_adapter *adapter) 731 { 732 u32 capability = 0; 733 int err = 0; 734 735 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err); 736 if (err == -EIO) 737 return err; 738 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT) 739 return 1; 740 741 return 0; 742 } 743 744 static 745 struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section) 746 { 747 u32 i, entries; 748 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 749 entries = le32_to_cpu(directory->num_entries); 750 751 for (i = 0; i < entries; i++) { 752 753 u32 offs = le32_to_cpu(directory->findex) + 754 i * le32_to_cpu(directory->entry_size); 755 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8)); 756 757 if (tab_type == section) 758 return (struct uni_table_desc *) &unirom[offs]; 759 } 760 761 return NULL; 762 } 763 764 #define FILEHEADER_SIZE (14 * 4) 765 766 static int 767 qlcnic_validate_header(struct qlcnic_adapter *adapter) 768 { 769 const u8 *unirom = adapter->fw->data; 770 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 771 u32 entries, entry_size, tab_size, fw_file_size; 772 773 fw_file_size = adapter->fw->size; 774 775 if (fw_file_size < FILEHEADER_SIZE) 776 return -EINVAL; 777 778 entries = le32_to_cpu(directory->num_entries); 779 entry_size = le32_to_cpu(directory->entry_size); 780 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size); 781 782 if (fw_file_size < tab_size) 783 return -EINVAL; 784 785 return 0; 786 } 787 788 static int 789 qlcnic_validate_bootld(struct qlcnic_adapter *adapter) 790 { 791 struct uni_table_desc *tab_desc; 792 struct uni_data_desc *descr; 793 u32 offs, tab_size, data_size, idx; 794 const u8 *unirom = adapter->fw->data; 795 __le32 temp; 796 797 temp = *((__le32 *)&unirom[adapter->file_prd_off] + 798 QLCNIC_UNI_BOOTLD_IDX_OFF); 799 idx = le32_to_cpu(temp); 800 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD); 801 802 if (!tab_desc) 803 return -EINVAL; 804 805 tab_size = le32_to_cpu(tab_desc->findex) + 806 le32_to_cpu(tab_desc->entry_size) * (idx + 1); 807 808 if (adapter->fw->size < tab_size) 809 return -EINVAL; 810 811 offs = le32_to_cpu(tab_desc->findex) + 812 le32_to_cpu(tab_desc->entry_size) * idx; 813 descr = (struct uni_data_desc *)&unirom[offs]; 814 815 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size); 816 817 if (adapter->fw->size < data_size) 818 return -EINVAL; 819 820 return 0; 821 } 822 823 static int 824 qlcnic_validate_fw(struct qlcnic_adapter *adapter) 825 { 826 struct uni_table_desc *tab_desc; 827 struct uni_data_desc *descr; 828 const u8 *unirom = adapter->fw->data; 829 u32 offs, tab_size, data_size, idx; 830 __le32 temp; 831 832 temp = *((__le32 *)&unirom[adapter->file_prd_off] + 833 QLCNIC_UNI_FIRMWARE_IDX_OFF); 834 idx = le32_to_cpu(temp); 835 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW); 836 837 if (!tab_desc) 838 return -EINVAL; 839 840 tab_size = le32_to_cpu(tab_desc->findex) + 841 le32_to_cpu(tab_desc->entry_size) * (idx + 1); 842 843 if (adapter->fw->size < tab_size) 844 return -EINVAL; 845 846 offs = le32_to_cpu(tab_desc->findex) + 847 le32_to_cpu(tab_desc->entry_size) * idx; 848 descr = (struct uni_data_desc *)&unirom[offs]; 849 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size); 850 851 if (adapter->fw->size < data_size) 852 return -EINVAL; 853 854 return 0; 855 } 856 857 static int 858 qlcnic_validate_product_offs(struct qlcnic_adapter *adapter) 859 { 860 struct uni_table_desc *ptab_descr; 861 const u8 *unirom = adapter->fw->data; 862 int mn_present = qlcnic_has_mn(adapter); 863 u32 entries, entry_size, tab_size, i; 864 __le32 temp; 865 866 ptab_descr = qlcnic_get_table_desc(unirom, 867 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL); 868 if (!ptab_descr) 869 return -EINVAL; 870 871 entries = le32_to_cpu(ptab_descr->num_entries); 872 entry_size = le32_to_cpu(ptab_descr->entry_size); 873 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size); 874 875 if (adapter->fw->size < tab_size) 876 return -EINVAL; 877 878 nomn: 879 for (i = 0; i < entries; i++) { 880 881 u32 flags, file_chiprev, offs; 882 u8 chiprev = adapter->ahw->revision_id; 883 u32 flagbit; 884 885 offs = le32_to_cpu(ptab_descr->findex) + 886 i * le32_to_cpu(ptab_descr->entry_size); 887 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF); 888 flags = le32_to_cpu(temp); 889 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF); 890 file_chiprev = le32_to_cpu(temp); 891 892 flagbit = mn_present ? 1 : 2; 893 894 if ((chiprev == file_chiprev) && 895 ((1ULL << flagbit) & flags)) { 896 adapter->file_prd_off = offs; 897 return 0; 898 } 899 } 900 if (mn_present) { 901 mn_present = 0; 902 goto nomn; 903 } 904 return -EINVAL; 905 } 906 907 static int 908 qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter) 909 { 910 if (qlcnic_validate_header(adapter)) { 911 dev_err(&adapter->pdev->dev, 912 "unified image: header validation failed\n"); 913 return -EINVAL; 914 } 915 916 if (qlcnic_validate_product_offs(adapter)) { 917 dev_err(&adapter->pdev->dev, 918 "unified image: product validation failed\n"); 919 return -EINVAL; 920 } 921 922 if (qlcnic_validate_bootld(adapter)) { 923 dev_err(&adapter->pdev->dev, 924 "unified image: bootld validation failed\n"); 925 return -EINVAL; 926 } 927 928 if (qlcnic_validate_fw(adapter)) { 929 dev_err(&adapter->pdev->dev, 930 "unified image: firmware validation failed\n"); 931 return -EINVAL; 932 } 933 934 return 0; 935 } 936 937 static 938 struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter, 939 u32 section, u32 idx_offset) 940 { 941 const u8 *unirom = adapter->fw->data; 942 struct uni_table_desc *tab_desc; 943 u32 offs, idx; 944 __le32 temp; 945 946 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset); 947 idx = le32_to_cpu(temp); 948 949 tab_desc = qlcnic_get_table_desc(unirom, section); 950 951 if (tab_desc == NULL) 952 return NULL; 953 954 offs = le32_to_cpu(tab_desc->findex) + 955 le32_to_cpu(tab_desc->entry_size) * idx; 956 957 return (struct uni_data_desc *)&unirom[offs]; 958 } 959 960 static u8 * 961 qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter) 962 { 963 u32 offs = QLCNIC_BOOTLD_START; 964 struct uni_data_desc *data_desc; 965 966 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD, 967 QLCNIC_UNI_BOOTLD_IDX_OFF); 968 969 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE) 970 offs = le32_to_cpu(data_desc->findex); 971 972 return (u8 *)&adapter->fw->data[offs]; 973 } 974 975 static u8 * 976 qlcnic_get_fw_offs(struct qlcnic_adapter *adapter) 977 { 978 u32 offs = QLCNIC_IMAGE_START; 979 struct uni_data_desc *data_desc; 980 981 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW, 982 QLCNIC_UNI_FIRMWARE_IDX_OFF); 983 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE) 984 offs = le32_to_cpu(data_desc->findex); 985 986 return (u8 *)&adapter->fw->data[offs]; 987 } 988 989 static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter) 990 { 991 struct uni_data_desc *data_desc; 992 const u8 *unirom = adapter->fw->data; 993 994 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW, 995 QLCNIC_UNI_FIRMWARE_IDX_OFF); 996 997 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE) 998 return le32_to_cpu(data_desc->size); 999 else 1000 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]); 1001 } 1002 1003 static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter) 1004 { 1005 struct uni_data_desc *fw_data_desc; 1006 const struct firmware *fw = adapter->fw; 1007 u32 major, minor, sub; 1008 __le32 version_offset; 1009 const u8 *ver_str; 1010 int i, ret; 1011 1012 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) { 1013 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]; 1014 return le32_to_cpu(version_offset); 1015 } 1016 1017 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW, 1018 QLCNIC_UNI_FIRMWARE_IDX_OFF); 1019 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) + 1020 le32_to_cpu(fw_data_desc->size) - 17; 1021 1022 for (i = 0; i < 12; i++) { 1023 if (!strncmp(&ver_str[i], "REV=", 4)) { 1024 ret = sscanf(&ver_str[i+4], "%u.%u.%u ", 1025 &major, &minor, &sub); 1026 if (ret != 3) 1027 return 0; 1028 else 1029 return major + (minor << 8) + (sub << 16); 1030 } 1031 } 1032 1033 return 0; 1034 } 1035 1036 static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter) 1037 { 1038 const struct firmware *fw = adapter->fw; 1039 u32 bios_ver, prd_off = adapter->file_prd_off; 1040 u8 *version_offset; 1041 __le32 temp; 1042 1043 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) { 1044 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]; 1045 return le32_to_cpu(*(__le32 *)version_offset); 1046 } 1047 1048 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF); 1049 bios_ver = le32_to_cpu(temp); 1050 1051 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24); 1052 } 1053 1054 static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter) 1055 { 1056 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID)) 1057 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n"); 1058 1059 qlcnic_pcie_sem_unlock(adapter, 2); 1060 } 1061 1062 static int 1063 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter) 1064 { 1065 u32 heartbeat, ret = -EIO; 1066 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT; 1067 1068 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter, 1069 QLCNIC_PEG_ALIVE_COUNTER); 1070 1071 do { 1072 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS); 1073 heartbeat = QLC_SHARED_REG_RD32(adapter, 1074 QLCNIC_PEG_ALIVE_COUNTER); 1075 if (heartbeat != adapter->heartbeat) { 1076 ret = QLCNIC_RCODE_SUCCESS; 1077 break; 1078 } 1079 } while (--retries); 1080 1081 return ret; 1082 } 1083 1084 int 1085 qlcnic_need_fw_reset(struct qlcnic_adapter *adapter) 1086 { 1087 if ((adapter->flags & QLCNIC_FW_HANG) || 1088 qlcnic_check_fw_hearbeat(adapter)) { 1089 qlcnic_rom_lock_recovery(adapter); 1090 return 1; 1091 } 1092 1093 if (adapter->need_fw_reset) 1094 return 1; 1095 1096 if (adapter->fw) 1097 return 1; 1098 1099 return 0; 1100 } 1101 1102 static const char *fw_name[] = { 1103 QLCNIC_UNIFIED_ROMIMAGE_NAME, 1104 QLCNIC_FLASH_ROMIMAGE_NAME, 1105 }; 1106 1107 int 1108 qlcnic_load_firmware(struct qlcnic_adapter *adapter) 1109 { 1110 __le64 *ptr64; 1111 u32 i, flashaddr, size; 1112 const struct firmware *fw = adapter->fw; 1113 struct pci_dev *pdev = adapter->pdev; 1114 1115 dev_info(&pdev->dev, "loading firmware from %s\n", 1116 fw_name[adapter->ahw->fw_type]); 1117 1118 if (fw) { 1119 u64 data; 1120 1121 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8; 1122 1123 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter); 1124 flashaddr = QLCNIC_BOOTLD_START; 1125 1126 for (i = 0; i < size; i++) { 1127 data = le64_to_cpu(ptr64[i]); 1128 1129 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data)) 1130 return -EIO; 1131 1132 flashaddr += 8; 1133 } 1134 1135 size = qlcnic_get_fw_size(adapter) / 8; 1136 1137 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter); 1138 flashaddr = QLCNIC_IMAGE_START; 1139 1140 for (i = 0; i < size; i++) { 1141 data = le64_to_cpu(ptr64[i]); 1142 1143 if (qlcnic_pci_mem_write_2M(adapter, 1144 flashaddr, data)) 1145 return -EIO; 1146 1147 flashaddr += 8; 1148 } 1149 1150 size = qlcnic_get_fw_size(adapter) % 8; 1151 if (size) { 1152 data = le64_to_cpu(ptr64[i]); 1153 1154 if (qlcnic_pci_mem_write_2M(adapter, 1155 flashaddr, data)) 1156 return -EIO; 1157 } 1158 1159 } else { 1160 u64 data; 1161 u32 hi, lo; 1162 int ret; 1163 struct qlcnic_flt_entry bootld_entry; 1164 1165 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION, 1166 &bootld_entry); 1167 if (!ret) { 1168 size = bootld_entry.size / 8; 1169 flashaddr = bootld_entry.start_addr; 1170 } else { 1171 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8; 1172 flashaddr = QLCNIC_BOOTLD_START; 1173 dev_info(&pdev->dev, 1174 "using legacy method to get flash fw region"); 1175 } 1176 1177 for (i = 0; i < size; i++) { 1178 if (qlcnic_rom_fast_read(adapter, 1179 flashaddr, (int *)&lo) != 0) 1180 return -EIO; 1181 if (qlcnic_rom_fast_read(adapter, 1182 flashaddr + 4, (int *)&hi) != 0) 1183 return -EIO; 1184 1185 data = (((u64)hi << 32) | lo); 1186 1187 if (qlcnic_pci_mem_write_2M(adapter, 1188 flashaddr, data)) 1189 return -EIO; 1190 1191 flashaddr += 8; 1192 } 1193 } 1194 usleep_range(1000, 1500); 1195 1196 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020); 1197 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e); 1198 return 0; 1199 } 1200 1201 static int 1202 qlcnic_validate_firmware(struct qlcnic_adapter *adapter) 1203 { 1204 u32 val; 1205 u32 ver, bios, min_size; 1206 struct pci_dev *pdev = adapter->pdev; 1207 const struct firmware *fw = adapter->fw; 1208 u8 fw_type = adapter->ahw->fw_type; 1209 1210 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) { 1211 if (qlcnic_validate_unified_romimage(adapter)) 1212 return -EINVAL; 1213 1214 min_size = QLCNIC_UNI_FW_MIN_SIZE; 1215 } else { 1216 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]); 1217 if (val != QLCNIC_BDINFO_MAGIC) 1218 return -EINVAL; 1219 1220 min_size = QLCNIC_FW_MIN_SIZE; 1221 } 1222 1223 if (fw->size < min_size) 1224 return -EINVAL; 1225 1226 val = qlcnic_get_fw_version(adapter); 1227 ver = QLCNIC_DECODE_VERSION(val); 1228 1229 if (ver < QLCNIC_MIN_FW_VERSION) { 1230 dev_err(&pdev->dev, 1231 "%s: firmware version %d.%d.%d unsupported\n", 1232 fw_name[fw_type], _major(ver), _minor(ver), _build(ver)); 1233 return -EINVAL; 1234 } 1235 1236 val = qlcnic_get_bios_version(adapter); 1237 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios); 1238 if (val != bios) { 1239 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", 1240 fw_name[fw_type]); 1241 return -EINVAL; 1242 } 1243 1244 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC); 1245 return 0; 1246 } 1247 1248 static void 1249 qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter) 1250 { 1251 u8 fw_type; 1252 1253 switch (adapter->ahw->fw_type) { 1254 case QLCNIC_UNKNOWN_ROMIMAGE: 1255 fw_type = QLCNIC_UNIFIED_ROMIMAGE; 1256 break; 1257 1258 case QLCNIC_UNIFIED_ROMIMAGE: 1259 default: 1260 fw_type = QLCNIC_FLASH_ROMIMAGE; 1261 break; 1262 } 1263 1264 adapter->ahw->fw_type = fw_type; 1265 } 1266 1267 1268 1269 void qlcnic_request_firmware(struct qlcnic_adapter *adapter) 1270 { 1271 struct pci_dev *pdev = adapter->pdev; 1272 int rc; 1273 1274 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE; 1275 1276 next: 1277 qlcnic_get_next_fwtype(adapter); 1278 1279 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) { 1280 adapter->fw = NULL; 1281 } else { 1282 rc = request_firmware(&adapter->fw, 1283 fw_name[adapter->ahw->fw_type], 1284 &pdev->dev); 1285 if (rc != 0) 1286 goto next; 1287 1288 rc = qlcnic_validate_firmware(adapter); 1289 if (rc != 0) { 1290 release_firmware(adapter->fw); 1291 usleep_range(1000, 1500); 1292 goto next; 1293 } 1294 } 1295 } 1296 1297 1298 void 1299 qlcnic_release_firmware(struct qlcnic_adapter *adapter) 1300 { 1301 release_firmware(adapter->fw); 1302 adapter->fw = NULL; 1303 } 1304