1 /* 2 * QLogic qlcnic NIC Driver 3 * Copyright (c) 2009-2013 QLogic Corporation 4 * 5 * See LICENSE.qlcnic for copyright and licensing details. 6 */ 7 8 #include "qlcnic.h" 9 10 static const struct qlcnic_mailbox_metadata qlcnic_mbx_tbl[] = { 11 {QLCNIC_CMD_CREATE_RX_CTX, 4, 1}, 12 {QLCNIC_CMD_DESTROY_RX_CTX, 2, 1}, 13 {QLCNIC_CMD_CREATE_TX_CTX, 4, 1}, 14 {QLCNIC_CMD_DESTROY_TX_CTX, 3, 1}, 15 {QLCNIC_CMD_INTRPT_TEST, 4, 1}, 16 {QLCNIC_CMD_SET_MTU, 4, 1}, 17 {QLCNIC_CMD_READ_PHY, 4, 2}, 18 {QLCNIC_CMD_WRITE_PHY, 5, 1}, 19 {QLCNIC_CMD_READ_HW_REG, 4, 1}, 20 {QLCNIC_CMD_GET_FLOW_CTL, 4, 2}, 21 {QLCNIC_CMD_SET_FLOW_CTL, 4, 1}, 22 {QLCNIC_CMD_READ_MAX_MTU, 4, 2}, 23 {QLCNIC_CMD_READ_MAX_LRO, 4, 2}, 24 {QLCNIC_CMD_MAC_ADDRESS, 4, 3}, 25 {QLCNIC_CMD_GET_PCI_INFO, 4, 1}, 26 {QLCNIC_CMD_GET_NIC_INFO, 4, 1}, 27 {QLCNIC_CMD_SET_NIC_INFO, 4, 1}, 28 {QLCNIC_CMD_GET_ESWITCH_CAPABILITY, 4, 3}, 29 {QLCNIC_CMD_TOGGLE_ESWITCH, 4, 1}, 30 {QLCNIC_CMD_GET_ESWITCH_STATUS, 4, 3}, 31 {QLCNIC_CMD_SET_PORTMIRRORING, 4, 1}, 32 {QLCNIC_CMD_CONFIGURE_ESWITCH, 4, 1}, 33 {QLCNIC_CMD_GET_MAC_STATS, 4, 1}, 34 {QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG, 4, 3}, 35 {QLCNIC_CMD_GET_ESWITCH_STATS, 4, 1}, 36 {QLCNIC_CMD_CONFIG_PORT, 4, 1}, 37 {QLCNIC_CMD_TEMP_SIZE, 4, 4}, 38 {QLCNIC_CMD_GET_TEMP_HDR, 4, 1}, 39 {QLCNIC_CMD_82XX_SET_DRV_VER, 4, 1}, 40 {QLCNIC_CMD_GET_LED_STATUS, 4, 2}, 41 {QLCNIC_CMD_MQ_TX_CONFIG_INTR, 2, 3}, 42 {QLCNIC_CMD_DCB_QUERY_CAP, 1, 2}, 43 {QLCNIC_CMD_DCB_QUERY_PARAM, 4, 1}, 44 }; 45 46 static inline u32 qlcnic_get_cmd_signature(struct qlcnic_hardware_context *ahw) 47 { 48 return (ahw->pci_func & 0xff) | ((ahw->fw_hal_version & 0xff) << 8) | 49 (0xcafe << 16); 50 } 51 52 /* Allocate mailbox registers */ 53 int qlcnic_82xx_alloc_mbx_args(struct qlcnic_cmd_args *mbx, 54 struct qlcnic_adapter *adapter, u32 type) 55 { 56 int i, size; 57 const struct qlcnic_mailbox_metadata *mbx_tbl; 58 59 mbx_tbl = qlcnic_mbx_tbl; 60 size = ARRAY_SIZE(qlcnic_mbx_tbl); 61 for (i = 0; i < size; i++) { 62 if (type == mbx_tbl[i].cmd) { 63 mbx->req.num = mbx_tbl[i].in_args; 64 mbx->rsp.num = mbx_tbl[i].out_args; 65 mbx->req.arg = kcalloc(mbx->req.num, 66 sizeof(u32), GFP_ATOMIC); 67 if (!mbx->req.arg) 68 return -ENOMEM; 69 mbx->rsp.arg = kcalloc(mbx->rsp.num, 70 sizeof(u32), GFP_ATOMIC); 71 if (!mbx->rsp.arg) { 72 kfree(mbx->req.arg); 73 mbx->req.arg = NULL; 74 return -ENOMEM; 75 } 76 mbx->req.arg[0] = type; 77 break; 78 } 79 } 80 return 0; 81 } 82 83 /* Free up mailbox registers */ 84 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd) 85 { 86 kfree(cmd->req.arg); 87 cmd->req.arg = NULL; 88 kfree(cmd->rsp.arg); 89 cmd->rsp.arg = NULL; 90 } 91 92 static u32 93 qlcnic_poll_rsp(struct qlcnic_adapter *adapter) 94 { 95 u32 rsp; 96 int timeout = 0, err = 0; 97 98 do { 99 /* give atleast 1ms for firmware to respond */ 100 mdelay(1); 101 102 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT) 103 return QLCNIC_CDRP_RSP_TIMEOUT; 104 105 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET, &err); 106 } while (!QLCNIC_CDRP_IS_RSP(rsp)); 107 108 return rsp; 109 } 110 111 int qlcnic_82xx_issue_cmd(struct qlcnic_adapter *adapter, 112 struct qlcnic_cmd_args *cmd) 113 { 114 int i, err = 0; 115 u32 rsp; 116 u32 signature; 117 struct pci_dev *pdev = adapter->pdev; 118 struct qlcnic_hardware_context *ahw = adapter->ahw; 119 const char *fmt; 120 121 signature = qlcnic_get_cmd_signature(ahw); 122 123 /* Acquire semaphore before accessing CRB */ 124 if (qlcnic_api_lock(adapter)) { 125 cmd->rsp.arg[0] = QLCNIC_RCODE_TIMEOUT; 126 return cmd->rsp.arg[0]; 127 } 128 129 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature); 130 for (i = 1; i < cmd->req.num; i++) 131 QLCWR32(adapter, QLCNIC_CDRP_ARG(i), cmd->req.arg[i]); 132 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, 133 QLCNIC_CDRP_FORM_CMD(cmd->req.arg[0])); 134 rsp = qlcnic_poll_rsp(adapter); 135 136 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) { 137 dev_err(&pdev->dev, "command timeout, response = 0x%x\n", rsp); 138 cmd->rsp.arg[0] = QLCNIC_RCODE_TIMEOUT; 139 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) { 140 cmd->rsp.arg[0] = QLCRD32(adapter, QLCNIC_CDRP_ARG(1), &err); 141 switch (cmd->rsp.arg[0]) { 142 case QLCNIC_RCODE_INVALID_ARGS: 143 fmt = "CDRP invalid args: [%d]\n"; 144 break; 145 case QLCNIC_RCODE_NOT_SUPPORTED: 146 case QLCNIC_RCODE_NOT_IMPL: 147 fmt = "CDRP command not supported: [%d]\n"; 148 break; 149 case QLCNIC_RCODE_NOT_PERMITTED: 150 fmt = "CDRP requested action not permitted: [%d]\n"; 151 break; 152 case QLCNIC_RCODE_INVALID: 153 fmt = "CDRP invalid or unknown cmd received: [%d]\n"; 154 break; 155 case QLCNIC_RCODE_TIMEOUT: 156 fmt = "CDRP command timeout: [%d]\n"; 157 break; 158 default: 159 fmt = "CDRP command failed: [%d]\n"; 160 break; 161 } 162 dev_err(&pdev->dev, fmt, cmd->rsp.arg[0]); 163 qlcnic_dump_mbx(adapter, cmd); 164 } else if (rsp == QLCNIC_CDRP_RSP_OK) 165 cmd->rsp.arg[0] = QLCNIC_RCODE_SUCCESS; 166 167 for (i = 1; i < cmd->rsp.num; i++) 168 cmd->rsp.arg[i] = QLCRD32(adapter, QLCNIC_CDRP_ARG(i), &err); 169 170 /* Release semaphore */ 171 qlcnic_api_unlock(adapter); 172 return cmd->rsp.arg[0]; 173 } 174 175 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *adapter, u32 fw_cmd) 176 { 177 struct qlcnic_cmd_args cmd; 178 u32 arg1, arg2, arg3; 179 char drv_string[12]; 180 int err = 0; 181 182 memset(drv_string, 0, sizeof(drv_string)); 183 snprintf(drv_string, sizeof(drv_string), "%d"".""%d"".""%d", 184 _QLCNIC_LINUX_MAJOR, _QLCNIC_LINUX_MINOR, 185 _QLCNIC_LINUX_SUBVERSION); 186 187 err = qlcnic_alloc_mbx_args(&cmd, adapter, fw_cmd); 188 if (err) 189 return err; 190 191 memcpy(&arg1, drv_string, sizeof(u32)); 192 memcpy(&arg2, drv_string + 4, sizeof(u32)); 193 memcpy(&arg3, drv_string + 8, sizeof(u32)); 194 195 cmd.req.arg[1] = arg1; 196 cmd.req.arg[2] = arg2; 197 cmd.req.arg[3] = arg3; 198 199 err = qlcnic_issue_cmd(adapter, &cmd); 200 if (err) { 201 dev_info(&adapter->pdev->dev, 202 "Failed to set driver version in firmware\n"); 203 err = -EIO; 204 } 205 qlcnic_free_mbx_args(&cmd); 206 return err; 207 } 208 209 int 210 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu) 211 { 212 int err = 0; 213 struct qlcnic_cmd_args cmd; 214 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx; 215 216 if (recv_ctx->state != QLCNIC_HOST_CTX_STATE_ACTIVE) 217 return err; 218 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_MTU); 219 if (err) 220 return err; 221 222 cmd.req.arg[1] = recv_ctx->context_id; 223 cmd.req.arg[2] = mtu; 224 225 err = qlcnic_issue_cmd(adapter, &cmd); 226 if (err) { 227 dev_err(&adapter->pdev->dev, "Failed to set mtu\n"); 228 err = -EIO; 229 } 230 qlcnic_free_mbx_args(&cmd); 231 return err; 232 } 233 234 int qlcnic_82xx_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter) 235 { 236 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx; 237 struct qlcnic_hardware_context *ahw = adapter->ahw; 238 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr; 239 struct net_device *netdev = adapter->netdev; 240 u32 temp_intr_crb_mode, temp_rds_crb_mode; 241 struct qlcnic_cardrsp_rds_ring *prsp_rds; 242 struct qlcnic_cardrsp_sds_ring *prsp_sds; 243 struct qlcnic_hostrq_rds_ring *prq_rds; 244 struct qlcnic_hostrq_sds_ring *prq_sds; 245 struct qlcnic_host_rds_ring *rds_ring; 246 struct qlcnic_host_sds_ring *sds_ring; 247 struct qlcnic_cardrsp_rx_ctx *prsp; 248 struct qlcnic_hostrq_rx_ctx *prq; 249 u8 i, nrds_rings, nsds_rings; 250 struct qlcnic_cmd_args cmd; 251 size_t rq_size, rsp_size; 252 u32 cap, reg, val, reg2; 253 u64 phys_addr; 254 u16 temp_u16; 255 void *addr; 256 int err; 257 258 nrds_rings = adapter->max_rds_rings; 259 nsds_rings = adapter->drv_sds_rings; 260 261 rq_size = SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings, 262 nsds_rings); 263 rsp_size = SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings, 264 nsds_rings); 265 266 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size, 267 &hostrq_phys_addr, GFP_KERNEL); 268 if (addr == NULL) 269 return -ENOMEM; 270 prq = addr; 271 272 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size, 273 &cardrsp_phys_addr, GFP_KERNEL); 274 if (addr == NULL) { 275 err = -ENOMEM; 276 goto out_free_rq; 277 } 278 prsp = addr; 279 280 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr); 281 282 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN 283 | QLCNIC_CAP0_VALIDOFF); 284 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS); 285 286 if (qlcnic_check_multi_tx(adapter) && 287 !adapter->ahw->diag_test) { 288 cap |= QLCNIC_CAP0_TX_MULTI; 289 } else { 290 temp_u16 = offsetof(struct qlcnic_hostrq_rx_ctx, msix_handler); 291 prq->valid_field_offset = cpu_to_le16(temp_u16); 292 prq->txrx_sds_binding = nsds_rings - 1; 293 temp_intr_crb_mode = QLCNIC_HOST_INT_CRB_MODE_SHARED; 294 prq->host_int_crb_mode = cpu_to_le32(temp_intr_crb_mode); 295 temp_rds_crb_mode = QLCNIC_HOST_RDS_CRB_MODE_UNIQUE; 296 prq->host_rds_crb_mode = cpu_to_le32(temp_rds_crb_mode); 297 } 298 299 prq->capabilities[0] = cpu_to_le32(cap); 300 301 prq->num_rds_rings = cpu_to_le16(nrds_rings); 302 prq->num_sds_rings = cpu_to_le16(nsds_rings); 303 prq->rds_ring_offset = 0; 304 305 val = le32_to_cpu(prq->rds_ring_offset) + 306 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings); 307 prq->sds_ring_offset = cpu_to_le32(val); 308 309 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data + 310 le32_to_cpu(prq->rds_ring_offset)); 311 312 for (i = 0; i < nrds_rings; i++) { 313 rds_ring = &recv_ctx->rds_rings[i]; 314 rds_ring->producer = 0; 315 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr); 316 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc); 317 prq_rds[i].ring_kind = cpu_to_le32(i); 318 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size); 319 } 320 321 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data + 322 le32_to_cpu(prq->sds_ring_offset)); 323 324 for (i = 0; i < nsds_rings; i++) { 325 sds_ring = &recv_ctx->sds_rings[i]; 326 sds_ring->consumer = 0; 327 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring)); 328 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr); 329 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc); 330 if (qlcnic_check_multi_tx(adapter) && 331 !adapter->ahw->diag_test) 332 prq_sds[i].msi_index = cpu_to_le16(ahw->intr_tbl[i].id); 333 else 334 prq_sds[i].msi_index = cpu_to_le16(i); 335 } 336 337 phys_addr = hostrq_phys_addr; 338 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CREATE_RX_CTX); 339 if (err) 340 goto out_free_rsp; 341 342 cmd.req.arg[1] = MSD(phys_addr); 343 cmd.req.arg[2] = LSD(phys_addr); 344 cmd.req.arg[3] = rq_size; 345 err = qlcnic_issue_cmd(adapter, &cmd); 346 if (err) { 347 dev_err(&adapter->pdev->dev, 348 "Failed to create rx ctx in firmware%d\n", err); 349 goto out_free_rsp; 350 } 351 352 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *) 353 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]); 354 355 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) { 356 rds_ring = &recv_ctx->rds_rings[i]; 357 reg = le32_to_cpu(prsp_rds[i].host_producer_crb); 358 rds_ring->crb_rcv_producer = ahw->pci_base0 + reg; 359 } 360 361 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *) 362 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]); 363 364 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) { 365 sds_ring = &recv_ctx->sds_rings[i]; 366 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb); 367 if (qlcnic_check_multi_tx(adapter) && !adapter->ahw->diag_test) 368 reg2 = ahw->intr_tbl[i].src; 369 else 370 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb); 371 372 sds_ring->crb_intr_mask = ahw->pci_base0 + reg2; 373 sds_ring->crb_sts_consumer = ahw->pci_base0 + reg; 374 } 375 376 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state); 377 recv_ctx->context_id = le16_to_cpu(prsp->context_id); 378 recv_ctx->virt_port = prsp->virt_port; 379 380 netdev_info(netdev, "Rx Context[%d] Created, state 0x%x\n", 381 recv_ctx->context_id, recv_ctx->state); 382 qlcnic_free_mbx_args(&cmd); 383 384 out_free_rsp: 385 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp, 386 cardrsp_phys_addr); 387 out_free_rq: 388 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr); 389 390 return err; 391 } 392 393 void qlcnic_82xx_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter) 394 { 395 int err; 396 struct qlcnic_cmd_args cmd; 397 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx; 398 399 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DESTROY_RX_CTX); 400 if (err) 401 return; 402 403 cmd.req.arg[1] = recv_ctx->context_id; 404 err = qlcnic_issue_cmd(adapter, &cmd); 405 if (err) 406 dev_err(&adapter->pdev->dev, 407 "Failed to destroy rx ctx in firmware\n"); 408 409 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED; 410 qlcnic_free_mbx_args(&cmd); 411 } 412 413 int qlcnic_82xx_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter, 414 struct qlcnic_host_tx_ring *tx_ring, 415 int ring) 416 { 417 struct qlcnic_hardware_context *ahw = adapter->ahw; 418 struct net_device *netdev = adapter->netdev; 419 struct qlcnic_hostrq_tx_ctx *prq; 420 struct qlcnic_hostrq_cds_ring *prq_cds; 421 struct qlcnic_cardrsp_tx_ctx *prsp; 422 struct qlcnic_cmd_args cmd; 423 u32 temp, intr_mask, temp_int_crb_mode; 424 dma_addr_t rq_phys_addr, rsp_phys_addr; 425 int temp_nsds_rings, index, err; 426 void *rq_addr, *rsp_addr; 427 size_t rq_size, rsp_size; 428 u64 phys_addr; 429 u16 msix_id; 430 431 /* reset host resources */ 432 tx_ring->producer = 0; 433 tx_ring->sw_consumer = 0; 434 *(tx_ring->hw_consumer) = 0; 435 436 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx); 437 rq_addr = dma_zalloc_coherent(&adapter->pdev->dev, rq_size, 438 &rq_phys_addr, GFP_KERNEL); 439 if (!rq_addr) 440 return -ENOMEM; 441 442 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx); 443 rsp_addr = dma_zalloc_coherent(&adapter->pdev->dev, rsp_size, 444 &rsp_phys_addr, GFP_KERNEL); 445 if (!rsp_addr) { 446 err = -ENOMEM; 447 goto out_free_rq; 448 } 449 450 prq = rq_addr; 451 prsp = rsp_addr; 452 453 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr); 454 455 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN | 456 QLCNIC_CAP0_LSO); 457 if (qlcnic_check_multi_tx(adapter) && !adapter->ahw->diag_test) 458 temp |= QLCNIC_CAP0_TX_MULTI; 459 460 prq->capabilities[0] = cpu_to_le32(temp); 461 462 if (qlcnic_check_multi_tx(adapter) && 463 !adapter->ahw->diag_test) { 464 temp_nsds_rings = adapter->drv_sds_rings; 465 index = temp_nsds_rings + ring; 466 msix_id = ahw->intr_tbl[index].id; 467 prq->msi_index = cpu_to_le16(msix_id); 468 } else { 469 temp_int_crb_mode = QLCNIC_HOST_INT_CRB_MODE_SHARED; 470 prq->host_int_crb_mode = cpu_to_le32(temp_int_crb_mode); 471 prq->msi_index = 0; 472 } 473 474 prq->interrupt_ctl = 0; 475 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr); 476 477 prq_cds = &prq->cds_ring; 478 479 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr); 480 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc); 481 482 phys_addr = rq_phys_addr; 483 484 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CREATE_TX_CTX); 485 if (err) 486 goto out_free_rsp; 487 488 cmd.req.arg[1] = MSD(phys_addr); 489 cmd.req.arg[2] = LSD(phys_addr); 490 cmd.req.arg[3] = rq_size; 491 err = qlcnic_issue_cmd(adapter, &cmd); 492 493 if (err == QLCNIC_RCODE_SUCCESS) { 494 tx_ring->state = le32_to_cpu(prsp->host_ctx_state); 495 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb); 496 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp; 497 tx_ring->ctx_id = le16_to_cpu(prsp->context_id); 498 if (qlcnic_check_multi_tx(adapter) && 499 !adapter->ahw->diag_test && 500 (adapter->flags & QLCNIC_MSIX_ENABLED)) { 501 index = adapter->drv_sds_rings + ring; 502 intr_mask = ahw->intr_tbl[index].src; 503 tx_ring->crb_intr_mask = ahw->pci_base0 + intr_mask; 504 } 505 506 netdev_info(netdev, "Tx Context[0x%x] Created, state 0x%x\n", 507 tx_ring->ctx_id, tx_ring->state); 508 } else { 509 netdev_err(netdev, "Failed to create tx ctx in firmware%d\n", 510 err); 511 err = -EIO; 512 } 513 qlcnic_free_mbx_args(&cmd); 514 515 out_free_rsp: 516 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr, 517 rsp_phys_addr); 518 out_free_rq: 519 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr); 520 521 return err; 522 } 523 524 void qlcnic_82xx_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter, 525 struct qlcnic_host_tx_ring *tx_ring) 526 { 527 struct qlcnic_cmd_args cmd; 528 int ret; 529 530 ret = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DESTROY_TX_CTX); 531 if (ret) 532 return; 533 534 cmd.req.arg[1] = tx_ring->ctx_id; 535 if (qlcnic_issue_cmd(adapter, &cmd)) 536 dev_err(&adapter->pdev->dev, 537 "Failed to destroy tx ctx in firmware\n"); 538 qlcnic_free_mbx_args(&cmd); 539 } 540 541 int 542 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config) 543 { 544 int err; 545 struct qlcnic_cmd_args cmd; 546 547 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIG_PORT); 548 if (err) 549 return err; 550 551 cmd.req.arg[1] = config; 552 err = qlcnic_issue_cmd(adapter, &cmd); 553 qlcnic_free_mbx_args(&cmd); 554 return err; 555 } 556 557 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter) 558 { 559 void *addr; 560 int err, ring; 561 struct qlcnic_recv_context *recv_ctx; 562 struct qlcnic_host_rds_ring *rds_ring; 563 struct qlcnic_host_sds_ring *sds_ring; 564 struct qlcnic_host_tx_ring *tx_ring; 565 __le32 *ptr; 566 567 struct pci_dev *pdev = adapter->pdev; 568 569 recv_ctx = adapter->recv_ctx; 570 571 for (ring = 0; ring < adapter->drv_tx_rings; ring++) { 572 tx_ring = &adapter->tx_ring[ring]; 573 ptr = (__le32 *)dma_alloc_coherent(&pdev->dev, sizeof(u32), 574 &tx_ring->hw_cons_phys_addr, 575 GFP_KERNEL); 576 if (ptr == NULL) 577 return -ENOMEM; 578 579 tx_ring->hw_consumer = ptr; 580 /* cmd desc ring */ 581 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring), 582 &tx_ring->phys_addr, 583 GFP_KERNEL); 584 if (addr == NULL) { 585 err = -ENOMEM; 586 goto err_out_free; 587 } 588 589 tx_ring->desc_head = addr; 590 } 591 592 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 593 rds_ring = &recv_ctx->rds_rings[ring]; 594 addr = dma_alloc_coherent(&adapter->pdev->dev, 595 RCV_DESC_RINGSIZE(rds_ring), 596 &rds_ring->phys_addr, GFP_KERNEL); 597 if (addr == NULL) { 598 err = -ENOMEM; 599 goto err_out_free; 600 } 601 rds_ring->desc_head = addr; 602 603 } 604 605 for (ring = 0; ring < adapter->drv_sds_rings; ring++) { 606 sds_ring = &recv_ctx->sds_rings[ring]; 607 608 addr = dma_alloc_coherent(&adapter->pdev->dev, 609 STATUS_DESC_RINGSIZE(sds_ring), 610 &sds_ring->phys_addr, GFP_KERNEL); 611 if (addr == NULL) { 612 err = -ENOMEM; 613 goto err_out_free; 614 } 615 sds_ring->desc_head = addr; 616 } 617 618 return 0; 619 620 err_out_free: 621 qlcnic_free_hw_resources(adapter); 622 return err; 623 } 624 625 int qlcnic_fw_create_ctx(struct qlcnic_adapter *dev) 626 { 627 int i, err, ring; 628 629 if (dev->flags & QLCNIC_NEED_FLR) { 630 pci_reset_function(dev->pdev); 631 dev->flags &= ~QLCNIC_NEED_FLR; 632 } 633 634 if (qlcnic_83xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED)) { 635 if (dev->ahw->diag_test != QLCNIC_LOOPBACK_TEST) { 636 err = qlcnic_83xx_config_intrpt(dev, 1); 637 if (err) 638 return err; 639 } 640 } 641 642 if (qlcnic_82xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED) && 643 qlcnic_check_multi_tx(dev) && !dev->ahw->diag_test) { 644 err = qlcnic_82xx_mq_intrpt(dev, 1); 645 if (err) 646 return err; 647 } 648 649 err = qlcnic_fw_cmd_create_rx_ctx(dev); 650 if (err) 651 goto err_out; 652 653 for (ring = 0; ring < dev->drv_tx_rings; ring++) { 654 err = qlcnic_fw_cmd_create_tx_ctx(dev, 655 &dev->tx_ring[ring], 656 ring); 657 if (err) { 658 qlcnic_fw_cmd_del_rx_ctx(dev); 659 if (ring == 0) 660 goto err_out; 661 662 for (i = 0; i < ring; i++) 663 qlcnic_fw_cmd_del_tx_ctx(dev, &dev->tx_ring[i]); 664 665 goto err_out; 666 } 667 } 668 669 set_bit(__QLCNIC_FW_ATTACHED, &dev->state); 670 671 return 0; 672 673 err_out: 674 if (qlcnic_82xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED) && 675 qlcnic_check_multi_tx(dev) && !dev->ahw->diag_test) 676 qlcnic_82xx_config_intrpt(dev, 0); 677 678 if (qlcnic_83xx_check(dev) && (dev->flags & QLCNIC_MSIX_ENABLED)) { 679 if (dev->ahw->diag_test != QLCNIC_LOOPBACK_TEST) 680 qlcnic_83xx_config_intrpt(dev, 0); 681 } 682 683 return err; 684 } 685 686 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter) 687 { 688 int ring; 689 690 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) { 691 qlcnic_fw_cmd_del_rx_ctx(adapter); 692 for (ring = 0; ring < adapter->drv_tx_rings; ring++) 693 qlcnic_fw_cmd_del_tx_ctx(adapter, 694 &adapter->tx_ring[ring]); 695 696 if (qlcnic_82xx_check(adapter) && 697 (adapter->flags & QLCNIC_MSIX_ENABLED) && 698 qlcnic_check_multi_tx(adapter) && 699 !adapter->ahw->diag_test) 700 qlcnic_82xx_config_intrpt(adapter, 0); 701 702 if (qlcnic_83xx_check(adapter) && 703 (adapter->flags & QLCNIC_MSIX_ENABLED)) { 704 if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST) 705 qlcnic_83xx_config_intrpt(adapter, 0); 706 } 707 /* Allow dma queues to drain after context reset */ 708 mdelay(20); 709 } 710 } 711 712 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter) 713 { 714 struct qlcnic_recv_context *recv_ctx; 715 struct qlcnic_host_rds_ring *rds_ring; 716 struct qlcnic_host_sds_ring *sds_ring; 717 struct qlcnic_host_tx_ring *tx_ring; 718 int ring; 719 720 recv_ctx = adapter->recv_ctx; 721 722 for (ring = 0; ring < adapter->drv_tx_rings; ring++) { 723 tx_ring = &adapter->tx_ring[ring]; 724 if (tx_ring->hw_consumer != NULL) { 725 dma_free_coherent(&adapter->pdev->dev, sizeof(u32), 726 tx_ring->hw_consumer, 727 tx_ring->hw_cons_phys_addr); 728 729 tx_ring->hw_consumer = NULL; 730 } 731 732 if (tx_ring->desc_head != NULL) { 733 dma_free_coherent(&adapter->pdev->dev, 734 TX_DESC_RINGSIZE(tx_ring), 735 tx_ring->desc_head, 736 tx_ring->phys_addr); 737 tx_ring->desc_head = NULL; 738 } 739 } 740 741 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 742 rds_ring = &recv_ctx->rds_rings[ring]; 743 744 if (rds_ring->desc_head != NULL) { 745 dma_free_coherent(&adapter->pdev->dev, 746 RCV_DESC_RINGSIZE(rds_ring), 747 rds_ring->desc_head, 748 rds_ring->phys_addr); 749 rds_ring->desc_head = NULL; 750 } 751 } 752 753 for (ring = 0; ring < adapter->drv_sds_rings; ring++) { 754 sds_ring = &recv_ctx->sds_rings[ring]; 755 756 if (sds_ring->desc_head != NULL) { 757 dma_free_coherent(&adapter->pdev->dev, 758 STATUS_DESC_RINGSIZE(sds_ring), 759 sds_ring->desc_head, 760 sds_ring->phys_addr); 761 sds_ring->desc_head = NULL; 762 } 763 } 764 } 765 766 int qlcnic_82xx_config_intrpt(struct qlcnic_adapter *adapter, u8 op_type) 767 { 768 struct qlcnic_hardware_context *ahw = adapter->ahw; 769 struct net_device *netdev = adapter->netdev; 770 struct qlcnic_cmd_args cmd; 771 u32 type, val; 772 int i, err = 0; 773 774 for (i = 0; i < ahw->num_msix; i++) { 775 qlcnic_alloc_mbx_args(&cmd, adapter, 776 QLCNIC_CMD_MQ_TX_CONFIG_INTR); 777 type = op_type ? QLCNIC_INTRPT_ADD : QLCNIC_INTRPT_DEL; 778 val = type | (ahw->intr_tbl[i].type << 4); 779 if (ahw->intr_tbl[i].type == QLCNIC_INTRPT_MSIX) 780 val |= (ahw->intr_tbl[i].id << 16); 781 cmd.req.arg[1] = val; 782 err = qlcnic_issue_cmd(adapter, &cmd); 783 if (err) { 784 netdev_err(netdev, "Failed to %s interrupts %d\n", 785 op_type == QLCNIC_INTRPT_ADD ? "Add" : 786 "Delete", err); 787 qlcnic_free_mbx_args(&cmd); 788 return err; 789 } 790 val = cmd.rsp.arg[1]; 791 if (LSB(val)) { 792 netdev_info(netdev, 793 "failed to configure interrupt for %d\n", 794 ahw->intr_tbl[i].id); 795 continue; 796 } 797 if (op_type) { 798 ahw->intr_tbl[i].id = MSW(val); 799 ahw->intr_tbl[i].enabled = 1; 800 ahw->intr_tbl[i].src = cmd.rsp.arg[2]; 801 } else { 802 ahw->intr_tbl[i].id = i; 803 ahw->intr_tbl[i].enabled = 0; 804 ahw->intr_tbl[i].src = 0; 805 } 806 qlcnic_free_mbx_args(&cmd); 807 } 808 809 return err; 810 } 811 812 int qlcnic_82xx_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac, 813 u8 function) 814 { 815 int err, i; 816 struct qlcnic_cmd_args cmd; 817 u32 mac_low, mac_high; 818 819 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_MAC_ADDRESS); 820 if (err) 821 return err; 822 823 cmd.req.arg[1] = function | BIT_8; 824 err = qlcnic_issue_cmd(adapter, &cmd); 825 826 if (err == QLCNIC_RCODE_SUCCESS) { 827 mac_low = cmd.rsp.arg[1]; 828 mac_high = cmd.rsp.arg[2]; 829 830 for (i = 0; i < 2; i++) 831 mac[i] = (u8) (mac_high >> ((1 - i) * 8)); 832 for (i = 2; i < 6; i++) 833 mac[i] = (u8) (mac_low >> ((5 - i) * 8)); 834 } else { 835 dev_err(&adapter->pdev->dev, 836 "Failed to get mac address%d\n", err); 837 err = -EIO; 838 } 839 qlcnic_free_mbx_args(&cmd); 840 return err; 841 } 842 843 /* Get info of a NIC partition */ 844 int qlcnic_82xx_get_nic_info(struct qlcnic_adapter *adapter, 845 struct qlcnic_info *npar_info, u8 func_id) 846 { 847 int err; 848 dma_addr_t nic_dma_t; 849 const struct qlcnic_info_le *nic_info; 850 void *nic_info_addr; 851 struct qlcnic_cmd_args cmd; 852 size_t nic_size = sizeof(struct qlcnic_info_le); 853 854 nic_info_addr = dma_zalloc_coherent(&adapter->pdev->dev, nic_size, 855 &nic_dma_t, GFP_KERNEL); 856 if (!nic_info_addr) 857 return -ENOMEM; 858 859 nic_info = nic_info_addr; 860 861 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO); 862 if (err) 863 goto out_free_dma; 864 865 cmd.req.arg[1] = MSD(nic_dma_t); 866 cmd.req.arg[2] = LSD(nic_dma_t); 867 cmd.req.arg[3] = (func_id << 16 | nic_size); 868 err = qlcnic_issue_cmd(adapter, &cmd); 869 if (err != QLCNIC_RCODE_SUCCESS) { 870 dev_err(&adapter->pdev->dev, 871 "Failed to get nic info%d\n", err); 872 err = -EIO; 873 } else { 874 npar_info->pci_func = le16_to_cpu(nic_info->pci_func); 875 npar_info->op_mode = le16_to_cpu(nic_info->op_mode); 876 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw); 877 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw); 878 npar_info->phys_port = le16_to_cpu(nic_info->phys_port); 879 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode); 880 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques); 881 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques); 882 npar_info->capabilities = le32_to_cpu(nic_info->capabilities); 883 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu); 884 } 885 886 qlcnic_free_mbx_args(&cmd); 887 out_free_dma: 888 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr, 889 nic_dma_t); 890 891 return err; 892 } 893 894 /* Configure a NIC partition */ 895 int qlcnic_82xx_set_nic_info(struct qlcnic_adapter *adapter, 896 struct qlcnic_info *nic) 897 { 898 int err = -EIO; 899 dma_addr_t nic_dma_t; 900 void *nic_info_addr; 901 struct qlcnic_cmd_args cmd; 902 struct qlcnic_info_le *nic_info; 903 size_t nic_size = sizeof(struct qlcnic_info_le); 904 905 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) 906 return err; 907 908 nic_info_addr = dma_zalloc_coherent(&adapter->pdev->dev, nic_size, 909 &nic_dma_t, GFP_KERNEL); 910 if (!nic_info_addr) 911 return -ENOMEM; 912 913 nic_info = nic_info_addr; 914 915 nic_info->pci_func = cpu_to_le16(nic->pci_func); 916 nic_info->op_mode = cpu_to_le16(nic->op_mode); 917 nic_info->phys_port = cpu_to_le16(nic->phys_port); 918 nic_info->switch_mode = cpu_to_le16(nic->switch_mode); 919 nic_info->capabilities = cpu_to_le32(nic->capabilities); 920 nic_info->max_mac_filters = nic->max_mac_filters; 921 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques); 922 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques); 923 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw); 924 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw); 925 926 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_SET_NIC_INFO); 927 if (err) 928 goto out_free_dma; 929 930 cmd.req.arg[1] = MSD(nic_dma_t); 931 cmd.req.arg[2] = LSD(nic_dma_t); 932 cmd.req.arg[3] = ((nic->pci_func << 16) | nic_size); 933 err = qlcnic_issue_cmd(adapter, &cmd); 934 935 if (err != QLCNIC_RCODE_SUCCESS) { 936 dev_err(&adapter->pdev->dev, 937 "Failed to set nic info%d\n", err); 938 err = -EIO; 939 } 940 941 qlcnic_free_mbx_args(&cmd); 942 out_free_dma: 943 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr, 944 nic_dma_t); 945 946 return err; 947 } 948 949 /* Get PCI Info of a partition */ 950 int qlcnic_82xx_get_pci_info(struct qlcnic_adapter *adapter, 951 struct qlcnic_pci_info *pci_info) 952 { 953 struct qlcnic_hardware_context *ahw = adapter->ahw; 954 size_t npar_size = sizeof(struct qlcnic_pci_info_le); 955 size_t pci_size = npar_size * ahw->max_vnic_func; 956 u16 nic = 0, fcoe = 0, iscsi = 0; 957 struct qlcnic_pci_info_le *npar; 958 struct qlcnic_cmd_args cmd; 959 dma_addr_t pci_info_dma_t; 960 void *pci_info_addr; 961 int err = 0, i; 962 963 pci_info_addr = dma_zalloc_coherent(&adapter->pdev->dev, pci_size, 964 &pci_info_dma_t, GFP_KERNEL); 965 if (!pci_info_addr) 966 return -ENOMEM; 967 968 npar = pci_info_addr; 969 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_PCI_INFO); 970 if (err) 971 goto out_free_dma; 972 973 cmd.req.arg[1] = MSD(pci_info_dma_t); 974 cmd.req.arg[2] = LSD(pci_info_dma_t); 975 cmd.req.arg[3] = pci_size; 976 err = qlcnic_issue_cmd(adapter, &cmd); 977 978 ahw->total_nic_func = 0; 979 if (err == QLCNIC_RCODE_SUCCESS) { 980 for (i = 0; i < ahw->max_vnic_func; i++, npar++, pci_info++) { 981 pci_info->id = le16_to_cpu(npar->id); 982 pci_info->active = le16_to_cpu(npar->active); 983 if (!pci_info->active) 984 continue; 985 pci_info->type = le16_to_cpu(npar->type); 986 err = qlcnic_get_pci_func_type(adapter, pci_info->type, 987 &nic, &fcoe, &iscsi); 988 pci_info->default_port = 989 le16_to_cpu(npar->default_port); 990 pci_info->tx_min_bw = 991 le16_to_cpu(npar->tx_min_bw); 992 pci_info->tx_max_bw = 993 le16_to_cpu(npar->tx_max_bw); 994 memcpy(pci_info->mac, npar->mac, ETH_ALEN); 995 } 996 } else { 997 dev_err(&adapter->pdev->dev, 998 "Failed to get PCI Info%d\n", err); 999 err = -EIO; 1000 } 1001 1002 ahw->total_nic_func = nic; 1003 ahw->total_pci_func = nic + fcoe + iscsi; 1004 if (ahw->total_nic_func == 0 || ahw->total_pci_func == 0) { 1005 dev_err(&adapter->pdev->dev, 1006 "%s: Invalid function count: total nic func[%x], total pci func[%x]\n", 1007 __func__, ahw->total_nic_func, ahw->total_pci_func); 1008 err = -EIO; 1009 } 1010 qlcnic_free_mbx_args(&cmd); 1011 out_free_dma: 1012 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr, 1013 pci_info_dma_t); 1014 1015 return err; 1016 } 1017 1018 /* Configure eSwitch for port mirroring */ 1019 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id, 1020 u8 enable_mirroring, u8 pci_func) 1021 { 1022 struct device *dev = &adapter->pdev->dev; 1023 struct qlcnic_cmd_args cmd; 1024 int err = -EIO; 1025 u32 arg1; 1026 1027 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC || 1028 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE)) { 1029 dev_err(&adapter->pdev->dev, "%s: Not a management function\n", 1030 __func__); 1031 return err; 1032 } 1033 1034 arg1 = id | (enable_mirroring ? BIT_4 : 0); 1035 arg1 |= pci_func << 8; 1036 1037 err = qlcnic_alloc_mbx_args(&cmd, adapter, 1038 QLCNIC_CMD_SET_PORTMIRRORING); 1039 if (err) 1040 return err; 1041 1042 cmd.req.arg[1] = arg1; 1043 err = qlcnic_issue_cmd(adapter, &cmd); 1044 1045 if (err != QLCNIC_RCODE_SUCCESS) 1046 dev_err(dev, "Failed to configure port mirroring for vNIC function %d on eSwitch %d\n", 1047 pci_func, id); 1048 else 1049 dev_info(dev, "Configured port mirroring for vNIC function %d on eSwitch %d\n", 1050 pci_func, id); 1051 qlcnic_free_mbx_args(&cmd); 1052 1053 return err; 1054 } 1055 1056 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func, 1057 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) { 1058 1059 size_t stats_size = sizeof(struct qlcnic_esw_stats_le); 1060 struct qlcnic_esw_stats_le *stats; 1061 dma_addr_t stats_dma_t; 1062 void *stats_addr; 1063 u32 arg1; 1064 struct qlcnic_cmd_args cmd; 1065 int err; 1066 1067 if (esw_stats == NULL) 1068 return -ENOMEM; 1069 1070 if ((adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) && 1071 (func != adapter->ahw->pci_func)) { 1072 dev_err(&adapter->pdev->dev, 1073 "Not privilege to query stats for func=%d", func); 1074 return -EIO; 1075 } 1076 1077 stats_addr = dma_zalloc_coherent(&adapter->pdev->dev, stats_size, 1078 &stats_dma_t, GFP_KERNEL); 1079 if (!stats_addr) 1080 return -ENOMEM; 1081 1082 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12; 1083 arg1 |= rx_tx << 15 | stats_size << 16; 1084 1085 err = qlcnic_alloc_mbx_args(&cmd, adapter, 1086 QLCNIC_CMD_GET_ESWITCH_STATS); 1087 if (err) 1088 goto out_free_dma; 1089 1090 cmd.req.arg[1] = arg1; 1091 cmd.req.arg[2] = MSD(stats_dma_t); 1092 cmd.req.arg[3] = LSD(stats_dma_t); 1093 err = qlcnic_issue_cmd(adapter, &cmd); 1094 1095 if (!err) { 1096 stats = stats_addr; 1097 esw_stats->context_id = le16_to_cpu(stats->context_id); 1098 esw_stats->version = le16_to_cpu(stats->version); 1099 esw_stats->size = le16_to_cpu(stats->size); 1100 esw_stats->multicast_frames = 1101 le64_to_cpu(stats->multicast_frames); 1102 esw_stats->broadcast_frames = 1103 le64_to_cpu(stats->broadcast_frames); 1104 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames); 1105 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames); 1106 esw_stats->local_frames = le64_to_cpu(stats->local_frames); 1107 esw_stats->errors = le64_to_cpu(stats->errors); 1108 esw_stats->numbytes = le64_to_cpu(stats->numbytes); 1109 } 1110 1111 qlcnic_free_mbx_args(&cmd); 1112 out_free_dma: 1113 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr, 1114 stats_dma_t); 1115 1116 return err; 1117 } 1118 1119 /* This routine will retrieve the MAC statistics from firmware */ 1120 int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter, 1121 struct qlcnic_mac_statistics *mac_stats) 1122 { 1123 struct qlcnic_mac_statistics_le *stats; 1124 struct qlcnic_cmd_args cmd; 1125 size_t stats_size = sizeof(struct qlcnic_mac_statistics_le); 1126 dma_addr_t stats_dma_t; 1127 void *stats_addr; 1128 int err; 1129 1130 if (mac_stats == NULL) 1131 return -ENOMEM; 1132 1133 stats_addr = dma_zalloc_coherent(&adapter->pdev->dev, stats_size, 1134 &stats_dma_t, GFP_KERNEL); 1135 if (!stats_addr) 1136 return -ENOMEM; 1137 1138 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_MAC_STATS); 1139 if (err) 1140 goto out_free_dma; 1141 1142 cmd.req.arg[1] = stats_size << 16; 1143 cmd.req.arg[2] = MSD(stats_dma_t); 1144 cmd.req.arg[3] = LSD(stats_dma_t); 1145 err = qlcnic_issue_cmd(adapter, &cmd); 1146 if (!err) { 1147 stats = stats_addr; 1148 mac_stats->mac_tx_frames = le64_to_cpu(stats->mac_tx_frames); 1149 mac_stats->mac_tx_bytes = le64_to_cpu(stats->mac_tx_bytes); 1150 mac_stats->mac_tx_mcast_pkts = 1151 le64_to_cpu(stats->mac_tx_mcast_pkts); 1152 mac_stats->mac_tx_bcast_pkts = 1153 le64_to_cpu(stats->mac_tx_bcast_pkts); 1154 mac_stats->mac_rx_frames = le64_to_cpu(stats->mac_rx_frames); 1155 mac_stats->mac_rx_bytes = le64_to_cpu(stats->mac_rx_bytes); 1156 mac_stats->mac_rx_mcast_pkts = 1157 le64_to_cpu(stats->mac_rx_mcast_pkts); 1158 mac_stats->mac_rx_length_error = 1159 le64_to_cpu(stats->mac_rx_length_error); 1160 mac_stats->mac_rx_length_small = 1161 le64_to_cpu(stats->mac_rx_length_small); 1162 mac_stats->mac_rx_length_large = 1163 le64_to_cpu(stats->mac_rx_length_large); 1164 mac_stats->mac_rx_jabber = le64_to_cpu(stats->mac_rx_jabber); 1165 mac_stats->mac_rx_dropped = le64_to_cpu(stats->mac_rx_dropped); 1166 mac_stats->mac_rx_crc_error = le64_to_cpu(stats->mac_rx_crc_error); 1167 } else { 1168 dev_err(&adapter->pdev->dev, 1169 "%s: Get mac stats failed, err=%d.\n", __func__, err); 1170 } 1171 1172 qlcnic_free_mbx_args(&cmd); 1173 1174 out_free_dma: 1175 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr, 1176 stats_dma_t); 1177 1178 return err; 1179 } 1180 1181 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch, 1182 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) { 1183 1184 struct __qlcnic_esw_statistics port_stats; 1185 u8 i; 1186 int ret = -EIO; 1187 1188 if (esw_stats == NULL) 1189 return -ENOMEM; 1190 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) 1191 return -EIO; 1192 if (adapter->npars == NULL) 1193 return -EIO; 1194 1195 memset(esw_stats, 0, sizeof(u64)); 1196 esw_stats->unicast_frames = QLCNIC_STATS_NOT_AVAIL; 1197 esw_stats->multicast_frames = QLCNIC_STATS_NOT_AVAIL; 1198 esw_stats->broadcast_frames = QLCNIC_STATS_NOT_AVAIL; 1199 esw_stats->dropped_frames = QLCNIC_STATS_NOT_AVAIL; 1200 esw_stats->errors = QLCNIC_STATS_NOT_AVAIL; 1201 esw_stats->local_frames = QLCNIC_STATS_NOT_AVAIL; 1202 esw_stats->numbytes = QLCNIC_STATS_NOT_AVAIL; 1203 esw_stats->context_id = eswitch; 1204 1205 for (i = 0; i < adapter->ahw->total_nic_func; i++) { 1206 if (adapter->npars[i].phy_port != eswitch) 1207 continue; 1208 1209 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics)); 1210 if (qlcnic_get_port_stats(adapter, adapter->npars[i].pci_func, 1211 rx_tx, &port_stats)) 1212 continue; 1213 1214 esw_stats->size = port_stats.size; 1215 esw_stats->version = port_stats.version; 1216 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames, 1217 port_stats.unicast_frames); 1218 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames, 1219 port_stats.multicast_frames); 1220 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames, 1221 port_stats.broadcast_frames); 1222 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames, 1223 port_stats.dropped_frames); 1224 QLCNIC_ADD_ESW_STATS(esw_stats->errors, 1225 port_stats.errors); 1226 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames, 1227 port_stats.local_frames); 1228 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes, 1229 port_stats.numbytes); 1230 ret = 0; 1231 } 1232 return ret; 1233 } 1234 1235 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw, 1236 const u8 port, const u8 rx_tx) 1237 { 1238 struct qlcnic_hardware_context *ahw = adapter->ahw; 1239 struct qlcnic_cmd_args cmd; 1240 int err; 1241 u32 arg1; 1242 1243 if (ahw->op_mode != QLCNIC_MGMT_FUNC) 1244 return -EIO; 1245 1246 if (func_esw == QLCNIC_STATS_PORT) { 1247 if (port >= ahw->max_vnic_func) 1248 goto err_ret; 1249 } else if (func_esw == QLCNIC_STATS_ESWITCH) { 1250 if (port >= QLCNIC_NIU_MAX_XG_PORTS) 1251 goto err_ret; 1252 } else { 1253 goto err_ret; 1254 } 1255 1256 if (rx_tx > QLCNIC_QUERY_TX_COUNTER) 1257 goto err_ret; 1258 1259 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12; 1260 arg1 |= BIT_14 | rx_tx << 15; 1261 1262 err = qlcnic_alloc_mbx_args(&cmd, adapter, 1263 QLCNIC_CMD_GET_ESWITCH_STATS); 1264 if (err) 1265 return err; 1266 1267 cmd.req.arg[1] = arg1; 1268 err = qlcnic_issue_cmd(adapter, &cmd); 1269 qlcnic_free_mbx_args(&cmd); 1270 return err; 1271 1272 err_ret: 1273 dev_err(&adapter->pdev->dev, 1274 "Invalid args func_esw %d port %d rx_ctx %d\n", 1275 func_esw, port, rx_tx); 1276 return -EIO; 1277 } 1278 1279 static int __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter, 1280 u32 *arg1, u32 *arg2) 1281 { 1282 struct device *dev = &adapter->pdev->dev; 1283 struct qlcnic_cmd_args cmd; 1284 u8 pci_func = *arg1 >> 8; 1285 int err; 1286 1287 err = qlcnic_alloc_mbx_args(&cmd, adapter, 1288 QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG); 1289 if (err) 1290 return err; 1291 1292 cmd.req.arg[1] = *arg1; 1293 err = qlcnic_issue_cmd(adapter, &cmd); 1294 *arg1 = cmd.rsp.arg[1]; 1295 *arg2 = cmd.rsp.arg[2]; 1296 qlcnic_free_mbx_args(&cmd); 1297 1298 if (err == QLCNIC_RCODE_SUCCESS) 1299 dev_info(dev, "Get eSwitch port config for vNIC function %d\n", 1300 pci_func); 1301 else 1302 dev_err(dev, "Failed to get eswitch port config for vNIC function %d\n", 1303 pci_func); 1304 return err; 1305 } 1306 /* Configure eSwitch port 1307 op_mode = 0 for setting default port behavior 1308 op_mode = 1 for setting vlan id 1309 op_mode = 2 for deleting vlan id 1310 op_type = 0 for vlan_id 1311 op_type = 1 for port vlan_id 1312 */ 1313 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter, 1314 struct qlcnic_esw_func_cfg *esw_cfg) 1315 { 1316 struct device *dev = &adapter->pdev->dev; 1317 struct qlcnic_cmd_args cmd; 1318 int err = -EIO, index; 1319 u32 arg1, arg2 = 0; 1320 u8 pci_func; 1321 1322 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) { 1323 dev_err(&adapter->pdev->dev, "%s: Not a management function\n", 1324 __func__); 1325 return err; 1326 } 1327 1328 pci_func = esw_cfg->pci_func; 1329 index = qlcnic_is_valid_nic_func(adapter, pci_func); 1330 if (index < 0) 1331 return err; 1332 arg1 = (adapter->npars[index].phy_port & BIT_0); 1333 arg1 |= (pci_func << 8); 1334 1335 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2)) 1336 return err; 1337 arg1 &= ~(0x0ff << 8); 1338 arg1 |= (pci_func << 8); 1339 arg1 &= ~(BIT_2 | BIT_3); 1340 switch (esw_cfg->op_mode) { 1341 case QLCNIC_PORT_DEFAULTS: 1342 arg1 |= (BIT_4 | BIT_6 | BIT_7); 1343 arg2 |= (BIT_0 | BIT_1); 1344 if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO) 1345 arg2 |= (BIT_2 | BIT_3); 1346 if (!(esw_cfg->discard_tagged)) 1347 arg1 &= ~BIT_4; 1348 if (!(esw_cfg->promisc_mode)) 1349 arg1 &= ~BIT_6; 1350 if (!(esw_cfg->mac_override)) 1351 arg1 &= ~BIT_7; 1352 if (!(esw_cfg->mac_anti_spoof)) 1353 arg2 &= ~BIT_0; 1354 if (!(esw_cfg->offload_flags & BIT_0)) 1355 arg2 &= ~(BIT_1 | BIT_2 | BIT_3); 1356 if (!(esw_cfg->offload_flags & BIT_1)) 1357 arg2 &= ~BIT_2; 1358 if (!(esw_cfg->offload_flags & BIT_2)) 1359 arg2 &= ~BIT_3; 1360 break; 1361 case QLCNIC_ADD_VLAN: 1362 arg1 &= ~(0x0ffff << 16); 1363 arg1 |= (BIT_2 | BIT_5); 1364 arg1 |= (esw_cfg->vlan_id << 16); 1365 break; 1366 case QLCNIC_DEL_VLAN: 1367 arg1 |= (BIT_3 | BIT_5); 1368 arg1 &= ~(0x0ffff << 16); 1369 break; 1370 default: 1371 dev_err(&adapter->pdev->dev, "%s: Invalid opmode 0x%x\n", 1372 __func__, esw_cfg->op_mode); 1373 return err; 1374 } 1375 1376 err = qlcnic_alloc_mbx_args(&cmd, adapter, 1377 QLCNIC_CMD_CONFIGURE_ESWITCH); 1378 if (err) 1379 return err; 1380 1381 cmd.req.arg[1] = arg1; 1382 cmd.req.arg[2] = arg2; 1383 err = qlcnic_issue_cmd(adapter, &cmd); 1384 qlcnic_free_mbx_args(&cmd); 1385 1386 if (err != QLCNIC_RCODE_SUCCESS) 1387 dev_err(dev, "Failed to configure eswitch for vNIC function %d\n", 1388 pci_func); 1389 else 1390 dev_info(dev, "Configured eSwitch for vNIC function %d\n", 1391 pci_func); 1392 1393 return err; 1394 } 1395 1396 int 1397 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter, 1398 struct qlcnic_esw_func_cfg *esw_cfg) 1399 { 1400 u32 arg1, arg2; 1401 int index; 1402 u8 phy_port; 1403 1404 if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC) { 1405 index = qlcnic_is_valid_nic_func(adapter, esw_cfg->pci_func); 1406 if (index < 0) 1407 return -EIO; 1408 phy_port = adapter->npars[index].phy_port; 1409 } else { 1410 phy_port = adapter->ahw->physical_port; 1411 } 1412 arg1 = phy_port; 1413 arg1 |= (esw_cfg->pci_func << 8); 1414 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2)) 1415 return -EIO; 1416 1417 esw_cfg->discard_tagged = !!(arg1 & BIT_4); 1418 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5); 1419 esw_cfg->promisc_mode = !!(arg1 & BIT_6); 1420 esw_cfg->mac_override = !!(arg1 & BIT_7); 1421 esw_cfg->vlan_id = LSW(arg1 >> 16); 1422 esw_cfg->mac_anti_spoof = (arg2 & 0x1); 1423 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7); 1424 1425 return 0; 1426 } 1427