1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015 QLogic Corporation 3 * 4 * This software is available under the terms of the GNU General Public License 5 * (GPL) Version 2, available from the file COPYING in the main directory of 6 * this source tree. 7 */ 8 9 #include <linux/module.h> 10 #include <linux/pci.h> 11 #include <linux/version.h> 12 #include <linux/device.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/errno.h> 17 #include <linux/list.h> 18 #include <linux/string.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/interrupt.h> 21 #include <asm/byteorder.h> 22 #include <asm/param.h> 23 #include <linux/io.h> 24 #include <linux/netdev_features.h> 25 #include <linux/udp.h> 26 #include <linux/tcp.h> 27 #include <net/udp_tunnel.h> 28 #include <linux/ip.h> 29 #include <net/ipv6.h> 30 #include <net/tcp.h> 31 #include <linux/if_ether.h> 32 #include <linux/if_vlan.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/ethtool.h> 35 #include <linux/in.h> 36 #include <linux/random.h> 37 #include <net/ip6_checksum.h> 38 #include <linux/bitops.h> 39 #include <linux/qed/qede_roce.h> 40 #include "qede.h" 41 42 static char version[] = 43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 44 45 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 46 MODULE_LICENSE("GPL"); 47 MODULE_VERSION(DRV_MODULE_VERSION); 48 49 static uint debug; 50 module_param(debug, uint, 0); 51 MODULE_PARM_DESC(debug, " Default debug msglevel"); 52 53 static const struct qed_eth_ops *qed_ops; 54 55 #define CHIP_NUM_57980S_40 0x1634 56 #define CHIP_NUM_57980S_10 0x1666 57 #define CHIP_NUM_57980S_MF 0x1636 58 #define CHIP_NUM_57980S_100 0x1644 59 #define CHIP_NUM_57980S_50 0x1654 60 #define CHIP_NUM_57980S_25 0x1656 61 #define CHIP_NUM_57980S_IOV 0x1664 62 63 #ifndef PCI_DEVICE_ID_NX2_57980E 64 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 65 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 66 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 67 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 68 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 69 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 70 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 71 #endif 72 73 enum qede_pci_private { 74 QEDE_PRIVATE_PF, 75 QEDE_PRIVATE_VF 76 }; 77 78 static const struct pci_device_id qede_pci_tbl[] = { 79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 85 #ifdef CONFIG_QED_SRIOV 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 87 #endif 88 { 0 } 89 }; 90 91 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 92 93 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 94 95 #define TX_TIMEOUT (5 * HZ) 96 97 static void qede_remove(struct pci_dev *pdev); 98 static int qede_alloc_rx_buffer(struct qede_dev *edev, 99 struct qede_rx_queue *rxq); 100 static void qede_link_update(void *dev, struct qed_link_output *link); 101 102 #ifdef CONFIG_QED_SRIOV 103 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 104 __be16 vlan_proto) 105 { 106 struct qede_dev *edev = netdev_priv(ndev); 107 108 if (vlan > 4095) { 109 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 110 return -EINVAL; 111 } 112 113 if (vlan_proto != htons(ETH_P_8021Q)) 114 return -EPROTONOSUPPORT; 115 116 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 117 vlan, vf); 118 119 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 120 } 121 122 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 123 { 124 struct qede_dev *edev = netdev_priv(ndev); 125 126 DP_VERBOSE(edev, QED_MSG_IOV, 127 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", 128 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); 129 130 if (!is_valid_ether_addr(mac)) { 131 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 132 return -EINVAL; 133 } 134 135 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 136 } 137 138 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 139 { 140 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 141 struct qed_dev_info *qed_info = &edev->dev_info.common; 142 int rc; 143 144 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 145 146 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 147 148 /* Enable/Disable Tx switching for PF */ 149 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 150 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) { 151 struct qed_update_vport_params params; 152 153 memset(¶ms, 0, sizeof(params)); 154 params.vport_id = 0; 155 params.update_tx_switching_flg = 1; 156 params.tx_switching_flg = num_vfs_param ? 1 : 0; 157 edev->ops->vport_update(edev->cdev, ¶ms); 158 } 159 160 return rc; 161 } 162 #endif 163 164 static struct pci_driver qede_pci_driver = { 165 .name = "qede", 166 .id_table = qede_pci_tbl, 167 .probe = qede_probe, 168 .remove = qede_remove, 169 #ifdef CONFIG_QED_SRIOV 170 .sriov_configure = qede_sriov_configure, 171 #endif 172 }; 173 174 static void qede_force_mac(void *dev, u8 *mac) 175 { 176 struct qede_dev *edev = dev; 177 178 ether_addr_copy(edev->ndev->dev_addr, mac); 179 ether_addr_copy(edev->primary_mac, mac); 180 } 181 182 static struct qed_eth_cb_ops qede_ll_ops = { 183 { 184 .link_update = qede_link_update, 185 }, 186 .force_mac = qede_force_mac, 187 }; 188 189 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 190 void *ptr) 191 { 192 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 193 struct ethtool_drvinfo drvinfo; 194 struct qede_dev *edev; 195 196 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 197 goto done; 198 199 /* Check whether this is a qede device */ 200 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 201 goto done; 202 203 memset(&drvinfo, 0, sizeof(drvinfo)); 204 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 205 if (strcmp(drvinfo.driver, "qede")) 206 goto done; 207 edev = netdev_priv(ndev); 208 209 switch (event) { 210 case NETDEV_CHANGENAME: 211 /* Notify qed of the name change */ 212 if (!edev->ops || !edev->ops->common) 213 goto done; 214 edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede"); 215 break; 216 case NETDEV_CHANGEADDR: 217 edev = netdev_priv(ndev); 218 qede_roce_event_changeaddr(edev); 219 break; 220 } 221 222 done: 223 return NOTIFY_DONE; 224 } 225 226 static struct notifier_block qede_netdev_notifier = { 227 .notifier_call = qede_netdev_event, 228 }; 229 230 static 231 int __init qede_init(void) 232 { 233 int ret; 234 235 pr_info("qede_init: %s\n", version); 236 237 qed_ops = qed_get_eth_ops(); 238 if (!qed_ops) { 239 pr_notice("Failed to get qed ethtool operations\n"); 240 return -EINVAL; 241 } 242 243 /* Must register notifier before pci ops, since we might miss 244 * interface rename after pci probe and netdev registeration. 245 */ 246 ret = register_netdevice_notifier(&qede_netdev_notifier); 247 if (ret) { 248 pr_notice("Failed to register netdevice_notifier\n"); 249 qed_put_eth_ops(); 250 return -EINVAL; 251 } 252 253 ret = pci_register_driver(&qede_pci_driver); 254 if (ret) { 255 pr_notice("Failed to register driver\n"); 256 unregister_netdevice_notifier(&qede_netdev_notifier); 257 qed_put_eth_ops(); 258 return -EINVAL; 259 } 260 261 return 0; 262 } 263 264 static void __exit qede_cleanup(void) 265 { 266 if (debug & QED_LOG_INFO_MASK) 267 pr_info("qede_cleanup called\n"); 268 269 unregister_netdevice_notifier(&qede_netdev_notifier); 270 pci_unregister_driver(&qede_pci_driver); 271 qed_put_eth_ops(); 272 } 273 274 module_init(qede_init); 275 module_exit(qede_cleanup); 276 277 /* ------------------------------------------------------------------------- 278 * START OF FAST-PATH 279 * ------------------------------------------------------------------------- 280 */ 281 282 /* Unmap the data and free skb */ 283 static int qede_free_tx_pkt(struct qede_dev *edev, 284 struct qede_tx_queue *txq, int *len) 285 { 286 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX; 287 struct sk_buff *skb = txq->sw_tx_ring[idx].skb; 288 struct eth_tx_1st_bd *first_bd; 289 struct eth_tx_bd *tx_data_bd; 290 int bds_consumed = 0; 291 int nbds; 292 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD; 293 int i, split_bd_len = 0; 294 295 if (unlikely(!skb)) { 296 DP_ERR(edev, 297 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n", 298 idx, txq->sw_tx_cons, txq->sw_tx_prod); 299 return -1; 300 } 301 302 *len = skb->len; 303 304 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 305 306 bds_consumed++; 307 308 nbds = first_bd->data.nbds; 309 310 if (data_split) { 311 struct eth_tx_bd *split = (struct eth_tx_bd *) 312 qed_chain_consume(&txq->tx_pbl); 313 split_bd_len = BD_UNMAP_LEN(split); 314 bds_consumed++; 315 } 316 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 317 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); 318 319 /* Unmap the data of the skb frags */ 320 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) { 321 tx_data_bd = (struct eth_tx_bd *) 322 qed_chain_consume(&txq->tx_pbl); 323 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd), 324 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); 325 } 326 327 while (bds_consumed++ < nbds) 328 qed_chain_consume(&txq->tx_pbl); 329 330 /* Free skb */ 331 dev_kfree_skb_any(skb); 332 txq->sw_tx_ring[idx].skb = NULL; 333 txq->sw_tx_ring[idx].flags = 0; 334 335 return 0; 336 } 337 338 /* Unmap the data and free skb when mapping failed during start_xmit */ 339 static void qede_free_failed_tx_pkt(struct qede_dev *edev, 340 struct qede_tx_queue *txq, 341 struct eth_tx_1st_bd *first_bd, 342 int nbd, bool data_split) 343 { 344 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; 345 struct sk_buff *skb = txq->sw_tx_ring[idx].skb; 346 struct eth_tx_bd *tx_data_bd; 347 int i, split_bd_len = 0; 348 349 /* Return prod to its position before this skb was handled */ 350 qed_chain_set_prod(&txq->tx_pbl, 351 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd); 352 353 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl); 354 355 if (data_split) { 356 struct eth_tx_bd *split = (struct eth_tx_bd *) 357 qed_chain_produce(&txq->tx_pbl); 358 split_bd_len = BD_UNMAP_LEN(split); 359 nbd--; 360 } 361 362 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 363 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); 364 365 /* Unmap the data of the skb frags */ 366 for (i = 0; i < nbd; i++) { 367 tx_data_bd = (struct eth_tx_bd *) 368 qed_chain_produce(&txq->tx_pbl); 369 if (tx_data_bd->nbytes) 370 dma_unmap_page(&edev->pdev->dev, 371 BD_UNMAP_ADDR(tx_data_bd), 372 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); 373 } 374 375 /* Return again prod to its position before this skb was handled */ 376 qed_chain_set_prod(&txq->tx_pbl, 377 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd); 378 379 /* Free skb */ 380 dev_kfree_skb_any(skb); 381 txq->sw_tx_ring[idx].skb = NULL; 382 txq->sw_tx_ring[idx].flags = 0; 383 } 384 385 static u32 qede_xmit_type(struct qede_dev *edev, 386 struct sk_buff *skb, int *ipv6_ext) 387 { 388 u32 rc = XMIT_L4_CSUM; 389 __be16 l3_proto; 390 391 if (skb->ip_summed != CHECKSUM_PARTIAL) 392 return XMIT_PLAIN; 393 394 l3_proto = vlan_get_protocol(skb); 395 if (l3_proto == htons(ETH_P_IPV6) && 396 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 397 *ipv6_ext = 1; 398 399 if (skb->encapsulation) 400 rc |= XMIT_ENC; 401 402 if (skb_is_gso(skb)) 403 rc |= XMIT_LSO; 404 405 return rc; 406 } 407 408 static void qede_set_params_for_ipv6_ext(struct sk_buff *skb, 409 struct eth_tx_2nd_bd *second_bd, 410 struct eth_tx_3rd_bd *third_bd) 411 { 412 u8 l4_proto; 413 u16 bd2_bits1 = 0, bd2_bits2 = 0; 414 415 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT); 416 417 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) & 418 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK) 419 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT; 420 421 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH << 422 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT); 423 424 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) 425 l4_proto = ipv6_hdr(skb)->nexthdr; 426 else 427 l4_proto = ip_hdr(skb)->protocol; 428 429 if (l4_proto == IPPROTO_UDP) 430 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT; 431 432 if (third_bd) 433 third_bd->data.bitfields |= 434 cpu_to_le16(((tcp_hdrlen(skb) / 4) & 435 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) << 436 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT); 437 438 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1); 439 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2); 440 } 441 442 static int map_frag_to_bd(struct qede_dev *edev, 443 skb_frag_t *frag, struct eth_tx_bd *bd) 444 { 445 dma_addr_t mapping; 446 447 /* Map skb non-linear frag data for DMA */ 448 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0, 449 skb_frag_size(frag), DMA_TO_DEVICE); 450 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 451 DP_NOTICE(edev, "Unable to map frag - dropping packet\n"); 452 return -ENOMEM; 453 } 454 455 /* Setup the data pointer of the frag data */ 456 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag)); 457 458 return 0; 459 } 460 461 static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt) 462 { 463 if (is_encap_pkt) 464 return (skb_inner_transport_header(skb) + 465 inner_tcp_hdrlen(skb) - skb->data); 466 else 467 return (skb_transport_header(skb) + 468 tcp_hdrlen(skb) - skb->data); 469 } 470 471 /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */ 472 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) 473 static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb, 474 u8 xmit_type) 475 { 476 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1; 477 478 if (xmit_type & XMIT_LSO) { 479 int hlen; 480 481 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC); 482 483 /* linear payload would require its own BD */ 484 if (skb_headlen(skb) > hlen) 485 allowed_frags--; 486 } 487 488 return (skb_shinfo(skb)->nr_frags > allowed_frags); 489 } 490 #endif 491 492 static inline void qede_update_tx_producer(struct qede_tx_queue *txq) 493 { 494 /* wmb makes sure that the BDs data is updated before updating the 495 * producer, otherwise FW may read old data from the BDs. 496 */ 497 wmb(); 498 barrier(); 499 writel(txq->tx_db.raw, txq->doorbell_addr); 500 501 /* mmiowb is needed to synchronize doorbell writes from more than one 502 * processor. It guarantees that the write arrives to the device before 503 * the queue lock is released and another start_xmit is called (possibly 504 * on another CPU). Without this barrier, the next doorbell can bypass 505 * this doorbell. This is applicable to IA64/Altix systems. 506 */ 507 mmiowb(); 508 } 509 510 /* Main transmit function */ 511 static netdev_tx_t qede_start_xmit(struct sk_buff *skb, 512 struct net_device *ndev) 513 { 514 struct qede_dev *edev = netdev_priv(ndev); 515 struct netdev_queue *netdev_txq; 516 struct qede_tx_queue *txq; 517 struct eth_tx_1st_bd *first_bd; 518 struct eth_tx_2nd_bd *second_bd = NULL; 519 struct eth_tx_3rd_bd *third_bd = NULL; 520 struct eth_tx_bd *tx_data_bd = NULL; 521 u16 txq_index; 522 u8 nbd = 0; 523 dma_addr_t mapping; 524 int rc, frag_idx = 0, ipv6_ext = 0; 525 u8 xmit_type; 526 u16 idx; 527 u16 hlen; 528 bool data_split = false; 529 530 /* Get tx-queue context and netdev index */ 531 txq_index = skb_get_queue_mapping(skb); 532 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev)); 533 txq = QEDE_TX_QUEUE(edev, txq_index); 534 netdev_txq = netdev_get_tx_queue(ndev, txq_index); 535 536 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1)); 537 538 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext); 539 540 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) 541 if (qede_pkt_req_lin(edev, skb, xmit_type)) { 542 if (skb_linearize(skb)) { 543 DP_NOTICE(edev, 544 "SKB linearization failed - silently dropping this SKB\n"); 545 dev_kfree_skb_any(skb); 546 return NETDEV_TX_OK; 547 } 548 } 549 #endif 550 551 /* Fill the entry in the SW ring and the BDs in the FW ring */ 552 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; 553 txq->sw_tx_ring[idx].skb = skb; 554 first_bd = (struct eth_tx_1st_bd *) 555 qed_chain_produce(&txq->tx_pbl); 556 memset(first_bd, 0, sizeof(*first_bd)); 557 first_bd->data.bd_flags.bitfields = 558 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 559 560 /* Map skb linear data for DMA and set in the first BD */ 561 mapping = dma_map_single(&edev->pdev->dev, skb->data, 562 skb_headlen(skb), DMA_TO_DEVICE); 563 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 564 DP_NOTICE(edev, "SKB mapping failed\n"); 565 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false); 566 qede_update_tx_producer(txq); 567 return NETDEV_TX_OK; 568 } 569 nbd++; 570 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 571 572 /* In case there is IPv6 with extension headers or LSO we need 2nd and 573 * 3rd BDs. 574 */ 575 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) { 576 second_bd = (struct eth_tx_2nd_bd *) 577 qed_chain_produce(&txq->tx_pbl); 578 memset(second_bd, 0, sizeof(*second_bd)); 579 580 nbd++; 581 third_bd = (struct eth_tx_3rd_bd *) 582 qed_chain_produce(&txq->tx_pbl); 583 memset(third_bd, 0, sizeof(*third_bd)); 584 585 nbd++; 586 /* We need to fill in additional data in second_bd... */ 587 tx_data_bd = (struct eth_tx_bd *)second_bd; 588 } 589 590 if (skb_vlan_tag_present(skb)) { 591 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb)); 592 first_bd->data.bd_flags.bitfields |= 593 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT; 594 } 595 596 /* Fill the parsing flags & params according to the requested offload */ 597 if (xmit_type & XMIT_L4_CSUM) { 598 /* We don't re-calculate IP checksum as it is already done by 599 * the upper stack 600 */ 601 first_bd->data.bd_flags.bitfields |= 602 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT; 603 604 if (xmit_type & XMIT_ENC) { 605 first_bd->data.bd_flags.bitfields |= 606 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; 607 first_bd->data.bitfields |= 608 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT; 609 } 610 611 /* Legacy FW had flipped behavior in regard to this bit - 612 * I.e., needed to set to prevent FW from touching encapsulated 613 * packets when it didn't need to. 614 */ 615 if (unlikely(txq->is_legacy)) 616 first_bd->data.bitfields ^= 617 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT; 618 619 /* If the packet is IPv6 with extension header, indicate that 620 * to FW and pass few params, since the device cracker doesn't 621 * support parsing IPv6 with extension header/s. 622 */ 623 if (unlikely(ipv6_ext)) 624 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd); 625 } 626 627 if (xmit_type & XMIT_LSO) { 628 first_bd->data.bd_flags.bitfields |= 629 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT); 630 third_bd->data.lso_mss = 631 cpu_to_le16(skb_shinfo(skb)->gso_size); 632 633 if (unlikely(xmit_type & XMIT_ENC)) { 634 first_bd->data.bd_flags.bitfields |= 635 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT; 636 hlen = qede_get_skb_hlen(skb, true); 637 } else { 638 first_bd->data.bd_flags.bitfields |= 639 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; 640 hlen = qede_get_skb_hlen(skb, false); 641 } 642 643 /* @@@TBD - if will not be removed need to check */ 644 third_bd->data.bitfields |= 645 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT)); 646 647 /* Make life easier for FW guys who can't deal with header and 648 * data on same BD. If we need to split, use the second bd... 649 */ 650 if (unlikely(skb_headlen(skb) > hlen)) { 651 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 652 "TSO split header size is %d (%x:%x)\n", 653 first_bd->nbytes, first_bd->addr.hi, 654 first_bd->addr.lo); 655 656 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi), 657 le32_to_cpu(first_bd->addr.lo)) + 658 hlen; 659 660 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping, 661 le16_to_cpu(first_bd->nbytes) - 662 hlen); 663 664 /* this marks the BD as one that has no 665 * individual mapping 666 */ 667 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD; 668 669 first_bd->nbytes = cpu_to_le16(hlen); 670 671 tx_data_bd = (struct eth_tx_bd *)third_bd; 672 data_split = true; 673 } 674 } else { 675 first_bd->data.bitfields |= 676 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) << 677 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 678 } 679 680 /* Handle fragmented skb */ 681 /* special handle for frags inside 2nd and 3rd bds.. */ 682 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) { 683 rc = map_frag_to_bd(edev, 684 &skb_shinfo(skb)->frags[frag_idx], 685 tx_data_bd); 686 if (rc) { 687 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, 688 data_split); 689 qede_update_tx_producer(txq); 690 return NETDEV_TX_OK; 691 } 692 693 if (tx_data_bd == (struct eth_tx_bd *)second_bd) 694 tx_data_bd = (struct eth_tx_bd *)third_bd; 695 else 696 tx_data_bd = NULL; 697 698 frag_idx++; 699 } 700 701 /* map last frags into 4th, 5th .... */ 702 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) { 703 tx_data_bd = (struct eth_tx_bd *) 704 qed_chain_produce(&txq->tx_pbl); 705 706 memset(tx_data_bd, 0, sizeof(*tx_data_bd)); 707 708 rc = map_frag_to_bd(edev, 709 &skb_shinfo(skb)->frags[frag_idx], 710 tx_data_bd); 711 if (rc) { 712 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, 713 data_split); 714 qede_update_tx_producer(txq); 715 return NETDEV_TX_OK; 716 } 717 } 718 719 /* update the first BD with the actual num BDs */ 720 first_bd->data.nbds = nbd; 721 722 netdev_tx_sent_queue(netdev_txq, skb->len); 723 724 skb_tx_timestamp(skb); 725 726 /* Advance packet producer only before sending the packet since mapping 727 * of pages may fail. 728 */ 729 txq->sw_tx_prod++; 730 731 /* 'next page' entries are counted in the producer value */ 732 txq->tx_db.data.bd_prod = 733 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl)); 734 735 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq)) 736 qede_update_tx_producer(txq); 737 738 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl) 739 < (MAX_SKB_FRAGS + 1))) { 740 if (skb->xmit_more) 741 qede_update_tx_producer(txq); 742 743 netif_tx_stop_queue(netdev_txq); 744 txq->stopped_cnt++; 745 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 746 "Stop queue was called\n"); 747 /* paired memory barrier is in qede_tx_int(), we have to keep 748 * ordering of set_bit() in netif_tx_stop_queue() and read of 749 * fp->bd_tx_cons 750 */ 751 smp_mb(); 752 753 if (qed_chain_get_elem_left(&txq->tx_pbl) 754 >= (MAX_SKB_FRAGS + 1) && 755 (edev->state == QEDE_STATE_OPEN)) { 756 netif_tx_wake_queue(netdev_txq); 757 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 758 "Wake queue was called\n"); 759 } 760 } 761 762 return NETDEV_TX_OK; 763 } 764 765 int qede_txq_has_work(struct qede_tx_queue *txq) 766 { 767 u16 hw_bd_cons; 768 769 /* Tell compiler that consumer and producer can change */ 770 barrier(); 771 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); 772 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1) 773 return 0; 774 775 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl); 776 } 777 778 static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq) 779 { 780 struct netdev_queue *netdev_txq; 781 u16 hw_bd_cons; 782 unsigned int pkts_compl = 0, bytes_compl = 0; 783 int rc; 784 785 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index); 786 787 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); 788 barrier(); 789 790 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) { 791 int len = 0; 792 793 rc = qede_free_tx_pkt(edev, txq, &len); 794 if (rc) { 795 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n", 796 hw_bd_cons, 797 qed_chain_get_cons_idx(&txq->tx_pbl)); 798 break; 799 } 800 801 bytes_compl += len; 802 pkts_compl++; 803 txq->sw_tx_cons++; 804 txq->xmit_pkts++; 805 } 806 807 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 808 809 /* Need to make the tx_bd_cons update visible to start_xmit() 810 * before checking for netif_tx_queue_stopped(). Without the 811 * memory barrier, there is a small possibility that 812 * start_xmit() will miss it and cause the queue to be stopped 813 * forever. 814 * On the other hand we need an rmb() here to ensure the proper 815 * ordering of bit testing in the following 816 * netif_tx_queue_stopped(txq) call. 817 */ 818 smp_mb(); 819 820 if (unlikely(netif_tx_queue_stopped(netdev_txq))) { 821 /* Taking tx_lock is needed to prevent reenabling the queue 822 * while it's empty. This could have happen if rx_action() gets 823 * suspended in qede_tx_int() after the condition before 824 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()): 825 * 826 * stops the queue->sees fresh tx_bd_cons->releases the queue-> 827 * sends some packets consuming the whole queue again-> 828 * stops the queue 829 */ 830 831 __netif_tx_lock(netdev_txq, smp_processor_id()); 832 833 if ((netif_tx_queue_stopped(netdev_txq)) && 834 (edev->state == QEDE_STATE_OPEN) && 835 (qed_chain_get_elem_left(&txq->tx_pbl) 836 >= (MAX_SKB_FRAGS + 1))) { 837 netif_tx_wake_queue(netdev_txq); 838 DP_VERBOSE(edev, NETIF_MSG_TX_DONE, 839 "Wake queue was called\n"); 840 } 841 842 __netif_tx_unlock(netdev_txq); 843 } 844 845 return 0; 846 } 847 848 bool qede_has_rx_work(struct qede_rx_queue *rxq) 849 { 850 u16 hw_comp_cons, sw_comp_cons; 851 852 /* Tell compiler that status block fields can change */ 853 barrier(); 854 855 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 856 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 857 858 return hw_comp_cons != sw_comp_cons; 859 } 860 861 static bool qede_has_tx_work(struct qede_fastpath *fp) 862 { 863 u8 tc; 864 865 for (tc = 0; tc < fp->edev->num_tc; tc++) 866 if (qede_txq_has_work(&fp->txqs[tc])) 867 return true; 868 return false; 869 } 870 871 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq) 872 { 873 qed_chain_consume(&rxq->rx_bd_ring); 874 rxq->sw_rx_cons++; 875 } 876 877 /* This function reuses the buffer(from an offset) from 878 * consumer index to producer index in the bd ring 879 */ 880 static inline void qede_reuse_page(struct qede_dev *edev, 881 struct qede_rx_queue *rxq, 882 struct sw_rx_data *curr_cons) 883 { 884 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); 885 struct sw_rx_data *curr_prod; 886 dma_addr_t new_mapping; 887 888 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 889 *curr_prod = *curr_cons; 890 891 new_mapping = curr_prod->mapping + curr_prod->page_offset; 892 893 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping)); 894 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping)); 895 896 rxq->sw_rx_prod++; 897 curr_cons->data = NULL; 898 } 899 900 /* In case of allocation failures reuse buffers 901 * from consumer index to produce buffers for firmware 902 */ 903 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, 904 struct qede_dev *edev, u8 count) 905 { 906 struct sw_rx_data *curr_cons; 907 908 for (; count > 0; count--) { 909 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; 910 qede_reuse_page(edev, rxq, curr_cons); 911 qede_rx_bd_ring_consume(rxq); 912 } 913 } 914 915 static inline int qede_realloc_rx_buffer(struct qede_dev *edev, 916 struct qede_rx_queue *rxq, 917 struct sw_rx_data *curr_cons) 918 { 919 /* Move to the next segment in the page */ 920 curr_cons->page_offset += rxq->rx_buf_seg_size; 921 922 if (curr_cons->page_offset == PAGE_SIZE) { 923 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { 924 /* Since we failed to allocate new buffer 925 * current buffer can be used again. 926 */ 927 curr_cons->page_offset -= rxq->rx_buf_seg_size; 928 929 return -ENOMEM; 930 } 931 932 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping, 933 PAGE_SIZE, DMA_FROM_DEVICE); 934 } else { 935 /* Increment refcount of the page as we don't want 936 * network stack to take the ownership of the page 937 * which can be recycled multiple times by the driver. 938 */ 939 page_ref_inc(curr_cons->data); 940 qede_reuse_page(edev, rxq, curr_cons); 941 } 942 943 return 0; 944 } 945 946 static inline void qede_update_rx_prod(struct qede_dev *edev, 947 struct qede_rx_queue *rxq) 948 { 949 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring); 950 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring); 951 struct eth_rx_prod_data rx_prods = {0}; 952 953 /* Update producers */ 954 rx_prods.bd_prod = cpu_to_le16(bd_prod); 955 rx_prods.cqe_prod = cpu_to_le16(cqe_prod); 956 957 /* Make sure that the BD and SGE data is updated before updating the 958 * producers since FW might read the BD/SGE right after the producer 959 * is updated. 960 */ 961 wmb(); 962 963 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods), 964 (u32 *)&rx_prods); 965 966 /* mmiowb is needed to synchronize doorbell writes from more than one 967 * processor. It guarantees that the write arrives to the device before 968 * the napi lock is released and another qede_poll is called (possibly 969 * on another CPU). Without this barrier, the next doorbell can bypass 970 * this doorbell. This is applicable to IA64/Altix systems. 971 */ 972 mmiowb(); 973 } 974 975 static u32 qede_get_rxhash(struct qede_dev *edev, 976 u8 bitfields, 977 __le32 rss_hash, enum pkt_hash_types *rxhash_type) 978 { 979 enum rss_hash_type htype; 980 981 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE); 982 983 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) { 984 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) || 985 (htype == RSS_HASH_TYPE_IPV6)) ? 986 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4; 987 return le32_to_cpu(rss_hash); 988 } 989 *rxhash_type = PKT_HASH_TYPE_NONE; 990 return 0; 991 } 992 993 static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag) 994 { 995 skb_checksum_none_assert(skb); 996 997 if (csum_flag & QEDE_CSUM_UNNECESSARY) 998 skb->ip_summed = CHECKSUM_UNNECESSARY; 999 1000 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) 1001 skb->csum_level = 1; 1002 } 1003 1004 static inline void qede_skb_receive(struct qede_dev *edev, 1005 struct qede_fastpath *fp, 1006 struct sk_buff *skb, u16 vlan_tag) 1007 { 1008 if (vlan_tag) 1009 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); 1010 1011 napi_gro_receive(&fp->napi, skb); 1012 } 1013 1014 static void qede_set_gro_params(struct qede_dev *edev, 1015 struct sk_buff *skb, 1016 struct eth_fast_path_rx_tpa_start_cqe *cqe) 1017 { 1018 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags); 1019 1020 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) & 1021 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2) 1022 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6; 1023 else 1024 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; 1025 1026 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) - 1027 cqe->header_len; 1028 } 1029 1030 static int qede_fill_frag_skb(struct qede_dev *edev, 1031 struct qede_rx_queue *rxq, 1032 u8 tpa_agg_index, u16 len_on_bd) 1033 { 1034 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons & 1035 NUM_RX_BDS_MAX]; 1036 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index]; 1037 struct sk_buff *skb = tpa_info->skb; 1038 1039 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) 1040 goto out; 1041 1042 /* Add one frag and update the appropriate fields in the skb */ 1043 skb_fill_page_desc(skb, tpa_info->frag_id++, 1044 current_bd->data, current_bd->page_offset, 1045 len_on_bd); 1046 1047 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) { 1048 /* Incr page ref count to reuse on allocation failure 1049 * so that it doesn't get freed while freeing SKB. 1050 */ 1051 page_ref_inc(current_bd->data); 1052 goto out; 1053 } 1054 1055 qed_chain_consume(&rxq->rx_bd_ring); 1056 rxq->sw_rx_cons++; 1057 1058 skb->data_len += len_on_bd; 1059 skb->truesize += rxq->rx_buf_seg_size; 1060 skb->len += len_on_bd; 1061 1062 return 0; 1063 1064 out: 1065 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1066 qede_recycle_rx_bd_ring(rxq, edev, 1); 1067 return -ENOMEM; 1068 } 1069 1070 static void qede_tpa_start(struct qede_dev *edev, 1071 struct qede_rx_queue *rxq, 1072 struct eth_fast_path_rx_tpa_start_cqe *cqe) 1073 { 1074 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; 1075 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring); 1076 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); 1077 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 1078 dma_addr_t mapping = tpa_info->replace_buf_mapping; 1079 struct sw_rx_data *sw_rx_data_cons; 1080 struct sw_rx_data *sw_rx_data_prod; 1081 enum pkt_hash_types rxhash_type; 1082 u32 rxhash; 1083 1084 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; 1085 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 1086 1087 /* Use pre-allocated replacement buffer - we can't release the agg. 1088 * start until its over and we don't want to risk allocation failing 1089 * here, so re-allocate when aggregation will be over. 1090 */ 1091 sw_rx_data_prod->mapping = replace_buf->mapping; 1092 1093 sw_rx_data_prod->data = replace_buf->data; 1094 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping)); 1095 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping)); 1096 sw_rx_data_prod->page_offset = replace_buf->page_offset; 1097 1098 rxq->sw_rx_prod++; 1099 1100 /* move partial skb from cons to pool (don't unmap yet) 1101 * save mapping, incase we drop the packet later on. 1102 */ 1103 tpa_info->start_buf = *sw_rx_data_cons; 1104 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi), 1105 le32_to_cpu(rx_bd_cons->addr.lo)); 1106 1107 tpa_info->start_buf_mapping = mapping; 1108 rxq->sw_rx_cons++; 1109 1110 /* set tpa state to start only if we are able to allocate skb 1111 * for this aggregation, otherwise mark as error and aggregation will 1112 * be dropped 1113 */ 1114 tpa_info->skb = netdev_alloc_skb(edev->ndev, 1115 le16_to_cpu(cqe->len_on_first_bd)); 1116 if (unlikely(!tpa_info->skb)) { 1117 DP_NOTICE(edev, "Failed to allocate SKB for gro\n"); 1118 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1119 goto cons_buf; 1120 } 1121 1122 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd)); 1123 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe)); 1124 1125 /* Start filling in the aggregation info */ 1126 tpa_info->frag_id = 0; 1127 tpa_info->agg_state = QEDE_AGG_STATE_START; 1128 1129 rxhash = qede_get_rxhash(edev, cqe->bitfields, 1130 cqe->rss_hash, &rxhash_type); 1131 skb_set_hash(tpa_info->skb, rxhash, rxhash_type); 1132 if ((le16_to_cpu(cqe->pars_flags.flags) >> 1133 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) & 1134 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK) 1135 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag); 1136 else 1137 tpa_info->vlan_tag = 0; 1138 1139 /* This is needed in order to enable forwarding support */ 1140 qede_set_gro_params(edev, tpa_info->skb, cqe); 1141 1142 cons_buf: /* We still need to handle bd_len_list to consume buffers */ 1143 if (likely(cqe->ext_bd_len_list[0])) 1144 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1145 le16_to_cpu(cqe->ext_bd_len_list[0])); 1146 1147 if (unlikely(cqe->ext_bd_len_list[1])) { 1148 DP_ERR(edev, 1149 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n"); 1150 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1151 } 1152 } 1153 1154 #ifdef CONFIG_INET 1155 static void qede_gro_ip_csum(struct sk_buff *skb) 1156 { 1157 const struct iphdr *iph = ip_hdr(skb); 1158 struct tcphdr *th; 1159 1160 skb_set_transport_header(skb, sizeof(struct iphdr)); 1161 th = tcp_hdr(skb); 1162 1163 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb), 1164 iph->saddr, iph->daddr, 0); 1165 1166 tcp_gro_complete(skb); 1167 } 1168 1169 static void qede_gro_ipv6_csum(struct sk_buff *skb) 1170 { 1171 struct ipv6hdr *iph = ipv6_hdr(skb); 1172 struct tcphdr *th; 1173 1174 skb_set_transport_header(skb, sizeof(struct ipv6hdr)); 1175 th = tcp_hdr(skb); 1176 1177 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb), 1178 &iph->saddr, &iph->daddr, 0); 1179 tcp_gro_complete(skb); 1180 } 1181 #endif 1182 1183 static void qede_gro_receive(struct qede_dev *edev, 1184 struct qede_fastpath *fp, 1185 struct sk_buff *skb, 1186 u16 vlan_tag) 1187 { 1188 /* FW can send a single MTU sized packet from gro flow 1189 * due to aggregation timeout/last segment etc. which 1190 * is not expected to be a gro packet. If a skb has zero 1191 * frags then simply push it in the stack as non gso skb. 1192 */ 1193 if (unlikely(!skb->data_len)) { 1194 skb_shinfo(skb)->gso_type = 0; 1195 skb_shinfo(skb)->gso_size = 0; 1196 goto send_skb; 1197 } 1198 1199 #ifdef CONFIG_INET 1200 if (skb_shinfo(skb)->gso_size) { 1201 skb_set_network_header(skb, 0); 1202 1203 switch (skb->protocol) { 1204 case htons(ETH_P_IP): 1205 qede_gro_ip_csum(skb); 1206 break; 1207 case htons(ETH_P_IPV6): 1208 qede_gro_ipv6_csum(skb); 1209 break; 1210 default: 1211 DP_ERR(edev, 1212 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n", 1213 ntohs(skb->protocol)); 1214 } 1215 } 1216 #endif 1217 1218 send_skb: 1219 skb_record_rx_queue(skb, fp->rxq->rxq_id); 1220 qede_skb_receive(edev, fp, skb, vlan_tag); 1221 } 1222 1223 static inline void qede_tpa_cont(struct qede_dev *edev, 1224 struct qede_rx_queue *rxq, 1225 struct eth_fast_path_rx_tpa_cont_cqe *cqe) 1226 { 1227 int i; 1228 1229 for (i = 0; cqe->len_list[i]; i++) 1230 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1231 le16_to_cpu(cqe->len_list[i])); 1232 1233 if (unlikely(i > 1)) 1234 DP_ERR(edev, 1235 "Strange - TPA cont with more than a single len_list entry\n"); 1236 } 1237 1238 static void qede_tpa_end(struct qede_dev *edev, 1239 struct qede_fastpath *fp, 1240 struct eth_fast_path_rx_tpa_end_cqe *cqe) 1241 { 1242 struct qede_rx_queue *rxq = fp->rxq; 1243 struct qede_agg_info *tpa_info; 1244 struct sk_buff *skb; 1245 int i; 1246 1247 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; 1248 skb = tpa_info->skb; 1249 1250 for (i = 0; cqe->len_list[i]; i++) 1251 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1252 le16_to_cpu(cqe->len_list[i])); 1253 if (unlikely(i > 1)) 1254 DP_ERR(edev, 1255 "Strange - TPA emd with more than a single len_list entry\n"); 1256 1257 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) 1258 goto err; 1259 1260 /* Sanity */ 1261 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1)) 1262 DP_ERR(edev, 1263 "Strange - TPA had %02x BDs, but SKB has only %d frags\n", 1264 cqe->num_of_bds, tpa_info->frag_id); 1265 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len))) 1266 DP_ERR(edev, 1267 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n", 1268 le16_to_cpu(cqe->total_packet_len), skb->len); 1269 1270 memcpy(skb->data, 1271 page_address(tpa_info->start_buf.data) + 1272 tpa_info->start_cqe.placement_offset + 1273 tpa_info->start_buf.page_offset, 1274 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd)); 1275 1276 /* Recycle [mapped] start buffer for the next replacement */ 1277 tpa_info->replace_buf = tpa_info->start_buf; 1278 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; 1279 1280 /* Finalize the SKB */ 1281 skb->protocol = eth_type_trans(skb, edev->ndev); 1282 skb->ip_summed = CHECKSUM_UNNECESSARY; 1283 1284 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count 1285 * to skb_shinfo(skb)->gso_segs 1286 */ 1287 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs); 1288 1289 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag); 1290 1291 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 1292 1293 return; 1294 err: 1295 /* The BD starting the aggregation is still mapped; Re-use it for 1296 * future aggregations [as replacement buffer] 1297 */ 1298 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf, 1299 sizeof(struct sw_rx_data)); 1300 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; 1301 tpa_info->start_buf.data = NULL; 1302 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 1303 dev_kfree_skb_any(tpa_info->skb); 1304 tpa_info->skb = NULL; 1305 } 1306 1307 static bool qede_tunn_exist(u16 flag) 1308 { 1309 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK << 1310 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT)); 1311 } 1312 1313 static u8 qede_check_tunn_csum(u16 flag) 1314 { 1315 u16 csum_flag = 0; 1316 u8 tcsum = 0; 1317 1318 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK << 1319 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT)) 1320 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK << 1321 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT; 1322 1323 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << 1324 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { 1325 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << 1326 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; 1327 tcsum = QEDE_TUNN_CSUM_UNNECESSARY; 1328 } 1329 1330 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK << 1331 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT | 1332 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << 1333 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; 1334 1335 if (csum_flag & flag) 1336 return QEDE_CSUM_ERROR; 1337 1338 return QEDE_CSUM_UNNECESSARY | tcsum; 1339 } 1340 1341 static u8 qede_check_notunn_csum(u16 flag) 1342 { 1343 u16 csum_flag = 0; 1344 u8 csum = 0; 1345 1346 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << 1347 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { 1348 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << 1349 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; 1350 csum = QEDE_CSUM_UNNECESSARY; 1351 } 1352 1353 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << 1354 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; 1355 1356 if (csum_flag & flag) 1357 return QEDE_CSUM_ERROR; 1358 1359 return csum; 1360 } 1361 1362 static u8 qede_check_csum(u16 flag) 1363 { 1364 if (!qede_tunn_exist(flag)) 1365 return qede_check_notunn_csum(flag); 1366 else 1367 return qede_check_tunn_csum(flag); 1368 } 1369 1370 static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe, 1371 u16 flag) 1372 { 1373 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags; 1374 1375 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK << 1376 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) || 1377 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK << 1378 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT))) 1379 return true; 1380 1381 return false; 1382 } 1383 1384 static int qede_rx_int(struct qede_fastpath *fp, int budget) 1385 { 1386 struct qede_dev *edev = fp->edev; 1387 struct qede_rx_queue *rxq = fp->rxq; 1388 1389 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag; 1390 int rx_pkt = 0; 1391 u8 csum_flag; 1392 1393 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1394 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1395 1396 /* Memory barrier to prevent the CPU from doing speculative reads of CQE 1397 * / BD in the while-loop before reading hw_comp_cons. If the CQE is 1398 * read before it is written by FW, then FW writes CQE and SB, and then 1399 * the CPU reads the hw_comp_cons, it will use an old CQE. 1400 */ 1401 rmb(); 1402 1403 /* Loop to complete all indicated BDs */ 1404 while (sw_comp_cons != hw_comp_cons) { 1405 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1406 enum pkt_hash_types rxhash_type; 1407 enum eth_rx_cqe_type cqe_type; 1408 struct sw_rx_data *sw_rx_data; 1409 union eth_rx_cqe *cqe; 1410 struct sk_buff *skb; 1411 struct page *data; 1412 __le16 flags; 1413 u16 len, pad; 1414 u32 rx_hash; 1415 1416 /* Get the CQE from the completion ring */ 1417 cqe = (union eth_rx_cqe *) 1418 qed_chain_consume(&rxq->rx_comp_ring); 1419 cqe_type = cqe->fast_path_regular.type; 1420 1421 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) { 1422 edev->ops->eth_cqe_completion( 1423 edev->cdev, fp->id, 1424 (struct eth_slow_path_rx_cqe *)cqe); 1425 goto next_cqe; 1426 } 1427 1428 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) { 1429 switch (cqe_type) { 1430 case ETH_RX_CQE_TYPE_TPA_START: 1431 qede_tpa_start(edev, rxq, 1432 &cqe->fast_path_tpa_start); 1433 goto next_cqe; 1434 case ETH_RX_CQE_TYPE_TPA_CONT: 1435 qede_tpa_cont(edev, rxq, 1436 &cqe->fast_path_tpa_cont); 1437 goto next_cqe; 1438 case ETH_RX_CQE_TYPE_TPA_END: 1439 qede_tpa_end(edev, fp, 1440 &cqe->fast_path_tpa_end); 1441 goto next_rx_only; 1442 default: 1443 break; 1444 } 1445 } 1446 1447 /* Get the data from the SW ring */ 1448 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1449 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1450 data = sw_rx_data->data; 1451 1452 fp_cqe = &cqe->fast_path_regular; 1453 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1454 pad = fp_cqe->placement_offset; 1455 flags = cqe->fast_path_regular.pars_flags.flags; 1456 1457 /* If this is an error packet then drop it */ 1458 parse_flag = le16_to_cpu(flags); 1459 1460 csum_flag = qede_check_csum(parse_flag); 1461 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) { 1462 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular, 1463 parse_flag)) { 1464 rxq->rx_ip_frags++; 1465 goto alloc_skb; 1466 } 1467 1468 DP_NOTICE(edev, 1469 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n", 1470 sw_comp_cons, parse_flag); 1471 rxq->rx_hw_errors++; 1472 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); 1473 goto next_cqe; 1474 } 1475 1476 alloc_skb: 1477 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE); 1478 if (unlikely(!skb)) { 1479 DP_NOTICE(edev, 1480 "skb allocation failed, dropping incoming packet\n"); 1481 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); 1482 rxq->rx_alloc_errors++; 1483 goto next_cqe; 1484 } 1485 1486 /* Copy data into SKB */ 1487 if (len + pad <= edev->rx_copybreak) { 1488 memcpy(skb_put(skb, len), 1489 page_address(data) + pad + 1490 sw_rx_data->page_offset, len); 1491 qede_reuse_page(edev, rxq, sw_rx_data); 1492 } else { 1493 struct skb_frag_struct *frag; 1494 unsigned int pull_len; 1495 unsigned char *va; 1496 1497 frag = &skb_shinfo(skb)->frags[0]; 1498 1499 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data, 1500 pad + sw_rx_data->page_offset, 1501 len, rxq->rx_buf_seg_size); 1502 1503 va = skb_frag_address(frag); 1504 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE); 1505 1506 /* Align the pull_len to optimize memcpy */ 1507 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long))); 1508 1509 skb_frag_size_sub(frag, pull_len); 1510 frag->page_offset += pull_len; 1511 skb->data_len -= pull_len; 1512 skb->tail += pull_len; 1513 1514 if (unlikely(qede_realloc_rx_buffer(edev, rxq, 1515 sw_rx_data))) { 1516 DP_ERR(edev, "Failed to allocate rx buffer\n"); 1517 /* Incr page ref count to reuse on allocation 1518 * failure so that it doesn't get freed while 1519 * freeing SKB. 1520 */ 1521 1522 page_ref_inc(sw_rx_data->data); 1523 rxq->rx_alloc_errors++; 1524 qede_recycle_rx_bd_ring(rxq, edev, 1525 fp_cqe->bd_num); 1526 dev_kfree_skb_any(skb); 1527 goto next_cqe; 1528 } 1529 } 1530 1531 qede_rx_bd_ring_consume(rxq); 1532 1533 if (fp_cqe->bd_num != 1) { 1534 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len); 1535 u8 num_frags; 1536 1537 pkt_len -= len; 1538 1539 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0; 1540 num_frags--) { 1541 u16 cur_size = pkt_len > rxq->rx_buf_size ? 1542 rxq->rx_buf_size : pkt_len; 1543 if (unlikely(!cur_size)) { 1544 DP_ERR(edev, 1545 "Still got %d BDs for mapping jumbo, but length became 0\n", 1546 num_frags); 1547 qede_recycle_rx_bd_ring(rxq, edev, 1548 num_frags); 1549 dev_kfree_skb_any(skb); 1550 goto next_cqe; 1551 } 1552 1553 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { 1554 qede_recycle_rx_bd_ring(rxq, edev, 1555 num_frags); 1556 dev_kfree_skb_any(skb); 1557 goto next_cqe; 1558 } 1559 1560 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1561 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1562 qede_rx_bd_ring_consume(rxq); 1563 1564 dma_unmap_page(&edev->pdev->dev, 1565 sw_rx_data->mapping, 1566 PAGE_SIZE, DMA_FROM_DEVICE); 1567 1568 skb_fill_page_desc(skb, 1569 skb_shinfo(skb)->nr_frags++, 1570 sw_rx_data->data, 0, 1571 cur_size); 1572 1573 skb->truesize += PAGE_SIZE; 1574 skb->data_len += cur_size; 1575 skb->len += cur_size; 1576 pkt_len -= cur_size; 1577 } 1578 1579 if (unlikely(pkt_len)) 1580 DP_ERR(edev, 1581 "Mapped all BDs of jumbo, but still have %d bytes\n", 1582 pkt_len); 1583 } 1584 1585 skb->protocol = eth_type_trans(skb, edev->ndev); 1586 1587 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields, 1588 fp_cqe->rss_hash, &rxhash_type); 1589 1590 skb_set_hash(skb, rx_hash, rxhash_type); 1591 1592 qede_set_skb_csum(skb, csum_flag); 1593 1594 skb_record_rx_queue(skb, fp->rxq->rxq_id); 1595 1596 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag)); 1597 next_rx_only: 1598 rx_pkt++; 1599 1600 next_cqe: /* don't consume bd rx buffer */ 1601 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1602 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1603 /* CR TPA - revisit how to handle budget in TPA perhaps 1604 * increase on "end" 1605 */ 1606 if (rx_pkt == budget) 1607 break; 1608 } /* repeat while sw_comp_cons != hw_comp_cons... */ 1609 1610 /* Update producers */ 1611 qede_update_rx_prod(edev, rxq); 1612 1613 rxq->rcv_pkts += rx_pkt; 1614 1615 return rx_pkt; 1616 } 1617 1618 static int qede_poll(struct napi_struct *napi, int budget) 1619 { 1620 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath, 1621 napi); 1622 struct qede_dev *edev = fp->edev; 1623 int rx_work_done = 0; 1624 u8 tc; 1625 1626 for (tc = 0; tc < edev->num_tc; tc++) 1627 if (likely(fp->type & QEDE_FASTPATH_TX) && 1628 qede_txq_has_work(&fp->txqs[tc])) 1629 qede_tx_int(edev, &fp->txqs[tc]); 1630 1631 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) && 1632 qede_has_rx_work(fp->rxq)) ? 1633 qede_rx_int(fp, budget) : 0; 1634 if (rx_work_done < budget) { 1635 qed_sb_update_sb_idx(fp->sb_info); 1636 /* *_has_*_work() reads the status block, 1637 * thus we need to ensure that status block indices 1638 * have been actually read (qed_sb_update_sb_idx) 1639 * prior to this check (*_has_*_work) so that 1640 * we won't write the "newer" value of the status block 1641 * to HW (if there was a DMA right after 1642 * qede_has_rx_work and if there is no rmb, the memory 1643 * reading (qed_sb_update_sb_idx) may be postponed 1644 * to right before *_ack_sb). In this case there 1645 * will never be another interrupt until there is 1646 * another update of the status block, while there 1647 * is still unhandled work. 1648 */ 1649 rmb(); 1650 1651 /* Fall out from the NAPI loop if needed */ 1652 if (!((likely(fp->type & QEDE_FASTPATH_RX) && 1653 qede_has_rx_work(fp->rxq)) || 1654 (likely(fp->type & QEDE_FASTPATH_TX) && 1655 qede_has_tx_work(fp)))) { 1656 napi_complete(napi); 1657 1658 /* Update and reenable interrupts */ 1659 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1660 1 /*update*/); 1661 } else { 1662 rx_work_done = budget; 1663 } 1664 } 1665 1666 return rx_work_done; 1667 } 1668 1669 static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie) 1670 { 1671 struct qede_fastpath *fp = fp_cookie; 1672 1673 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/); 1674 1675 napi_schedule_irqoff(&fp->napi); 1676 return IRQ_HANDLED; 1677 } 1678 1679 /* ------------------------------------------------------------------------- 1680 * END OF FAST-PATH 1681 * ------------------------------------------------------------------------- 1682 */ 1683 1684 static int qede_open(struct net_device *ndev); 1685 static int qede_close(struct net_device *ndev); 1686 static int qede_set_mac_addr(struct net_device *ndev, void *p); 1687 static void qede_set_rx_mode(struct net_device *ndev); 1688 static void qede_config_rx_mode(struct net_device *ndev); 1689 1690 static int qede_set_ucast_rx_mac(struct qede_dev *edev, 1691 enum qed_filter_xcast_params_type opcode, 1692 unsigned char mac[ETH_ALEN]) 1693 { 1694 struct qed_filter_params filter_cmd; 1695 1696 memset(&filter_cmd, 0, sizeof(filter_cmd)); 1697 filter_cmd.type = QED_FILTER_TYPE_UCAST; 1698 filter_cmd.filter.ucast.type = opcode; 1699 filter_cmd.filter.ucast.mac_valid = 1; 1700 ether_addr_copy(filter_cmd.filter.ucast.mac, mac); 1701 1702 return edev->ops->filter_config(edev->cdev, &filter_cmd); 1703 } 1704 1705 static int qede_set_ucast_rx_vlan(struct qede_dev *edev, 1706 enum qed_filter_xcast_params_type opcode, 1707 u16 vid) 1708 { 1709 struct qed_filter_params filter_cmd; 1710 1711 memset(&filter_cmd, 0, sizeof(filter_cmd)); 1712 filter_cmd.type = QED_FILTER_TYPE_UCAST; 1713 filter_cmd.filter.ucast.type = opcode; 1714 filter_cmd.filter.ucast.vlan_valid = 1; 1715 filter_cmd.filter.ucast.vlan = vid; 1716 1717 return edev->ops->filter_config(edev->cdev, &filter_cmd); 1718 } 1719 1720 void qede_fill_by_demand_stats(struct qede_dev *edev) 1721 { 1722 struct qed_eth_stats stats; 1723 1724 edev->ops->get_vport_stats(edev->cdev, &stats); 1725 edev->stats.no_buff_discards = stats.no_buff_discards; 1726 edev->stats.packet_too_big_discard = stats.packet_too_big_discard; 1727 edev->stats.ttl0_discard = stats.ttl0_discard; 1728 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes; 1729 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes; 1730 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes; 1731 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts; 1732 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts; 1733 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts; 1734 edev->stats.mftag_filter_discards = stats.mftag_filter_discards; 1735 edev->stats.mac_filter_discards = stats.mac_filter_discards; 1736 1737 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes; 1738 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes; 1739 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes; 1740 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts; 1741 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts; 1742 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts; 1743 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts; 1744 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts; 1745 edev->stats.coalesced_events = stats.tpa_coalesced_events; 1746 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num; 1747 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts; 1748 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes; 1749 1750 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets; 1751 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets; 1752 edev->stats.rx_128_to_255_byte_packets = 1753 stats.rx_128_to_255_byte_packets; 1754 edev->stats.rx_256_to_511_byte_packets = 1755 stats.rx_256_to_511_byte_packets; 1756 edev->stats.rx_512_to_1023_byte_packets = 1757 stats.rx_512_to_1023_byte_packets; 1758 edev->stats.rx_1024_to_1518_byte_packets = 1759 stats.rx_1024_to_1518_byte_packets; 1760 edev->stats.rx_1519_to_1522_byte_packets = 1761 stats.rx_1519_to_1522_byte_packets; 1762 edev->stats.rx_1519_to_2047_byte_packets = 1763 stats.rx_1519_to_2047_byte_packets; 1764 edev->stats.rx_2048_to_4095_byte_packets = 1765 stats.rx_2048_to_4095_byte_packets; 1766 edev->stats.rx_4096_to_9216_byte_packets = 1767 stats.rx_4096_to_9216_byte_packets; 1768 edev->stats.rx_9217_to_16383_byte_packets = 1769 stats.rx_9217_to_16383_byte_packets; 1770 edev->stats.rx_crc_errors = stats.rx_crc_errors; 1771 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames; 1772 edev->stats.rx_pause_frames = stats.rx_pause_frames; 1773 edev->stats.rx_pfc_frames = stats.rx_pfc_frames; 1774 edev->stats.rx_align_errors = stats.rx_align_errors; 1775 edev->stats.rx_carrier_errors = stats.rx_carrier_errors; 1776 edev->stats.rx_oversize_packets = stats.rx_oversize_packets; 1777 edev->stats.rx_jabbers = stats.rx_jabbers; 1778 edev->stats.rx_undersize_packets = stats.rx_undersize_packets; 1779 edev->stats.rx_fragments = stats.rx_fragments; 1780 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets; 1781 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets; 1782 edev->stats.tx_128_to_255_byte_packets = 1783 stats.tx_128_to_255_byte_packets; 1784 edev->stats.tx_256_to_511_byte_packets = 1785 stats.tx_256_to_511_byte_packets; 1786 edev->stats.tx_512_to_1023_byte_packets = 1787 stats.tx_512_to_1023_byte_packets; 1788 edev->stats.tx_1024_to_1518_byte_packets = 1789 stats.tx_1024_to_1518_byte_packets; 1790 edev->stats.tx_1519_to_2047_byte_packets = 1791 stats.tx_1519_to_2047_byte_packets; 1792 edev->stats.tx_2048_to_4095_byte_packets = 1793 stats.tx_2048_to_4095_byte_packets; 1794 edev->stats.tx_4096_to_9216_byte_packets = 1795 stats.tx_4096_to_9216_byte_packets; 1796 edev->stats.tx_9217_to_16383_byte_packets = 1797 stats.tx_9217_to_16383_byte_packets; 1798 edev->stats.tx_pause_frames = stats.tx_pause_frames; 1799 edev->stats.tx_pfc_frames = stats.tx_pfc_frames; 1800 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count; 1801 edev->stats.tx_total_collisions = stats.tx_total_collisions; 1802 edev->stats.brb_truncates = stats.brb_truncates; 1803 edev->stats.brb_discards = stats.brb_discards; 1804 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames; 1805 } 1806 1807 static 1808 struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev, 1809 struct rtnl_link_stats64 *stats) 1810 { 1811 struct qede_dev *edev = netdev_priv(dev); 1812 1813 qede_fill_by_demand_stats(edev); 1814 1815 stats->rx_packets = edev->stats.rx_ucast_pkts + 1816 edev->stats.rx_mcast_pkts + 1817 edev->stats.rx_bcast_pkts; 1818 stats->tx_packets = edev->stats.tx_ucast_pkts + 1819 edev->stats.tx_mcast_pkts + 1820 edev->stats.tx_bcast_pkts; 1821 1822 stats->rx_bytes = edev->stats.rx_ucast_bytes + 1823 edev->stats.rx_mcast_bytes + 1824 edev->stats.rx_bcast_bytes; 1825 1826 stats->tx_bytes = edev->stats.tx_ucast_bytes + 1827 edev->stats.tx_mcast_bytes + 1828 edev->stats.tx_bcast_bytes; 1829 1830 stats->tx_errors = edev->stats.tx_err_drop_pkts; 1831 stats->multicast = edev->stats.rx_mcast_pkts + 1832 edev->stats.rx_bcast_pkts; 1833 1834 stats->rx_fifo_errors = edev->stats.no_buff_discards; 1835 1836 stats->collisions = edev->stats.tx_total_collisions; 1837 stats->rx_crc_errors = edev->stats.rx_crc_errors; 1838 stats->rx_frame_errors = edev->stats.rx_align_errors; 1839 1840 return stats; 1841 } 1842 1843 #ifdef CONFIG_QED_SRIOV 1844 static int qede_get_vf_config(struct net_device *dev, int vfidx, 1845 struct ifla_vf_info *ivi) 1846 { 1847 struct qede_dev *edev = netdev_priv(dev); 1848 1849 if (!edev->ops) 1850 return -EINVAL; 1851 1852 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 1853 } 1854 1855 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 1856 int min_tx_rate, int max_tx_rate) 1857 { 1858 struct qede_dev *edev = netdev_priv(dev); 1859 1860 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 1861 max_tx_rate); 1862 } 1863 1864 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 1865 { 1866 struct qede_dev *edev = netdev_priv(dev); 1867 1868 if (!edev->ops) 1869 return -EINVAL; 1870 1871 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 1872 } 1873 1874 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 1875 int link_state) 1876 { 1877 struct qede_dev *edev = netdev_priv(dev); 1878 1879 if (!edev->ops) 1880 return -EINVAL; 1881 1882 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 1883 } 1884 #endif 1885 1886 static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action) 1887 { 1888 struct qed_update_vport_params params; 1889 int rc; 1890 1891 /* Proceed only if action actually needs to be performed */ 1892 if (edev->accept_any_vlan == action) 1893 return; 1894 1895 memset(¶ms, 0, sizeof(params)); 1896 1897 params.vport_id = 0; 1898 params.accept_any_vlan = action; 1899 params.update_accept_any_vlan_flg = 1; 1900 1901 rc = edev->ops->vport_update(edev->cdev, ¶ms); 1902 if (rc) { 1903 DP_ERR(edev, "Failed to %s accept-any-vlan\n", 1904 action ? "enable" : "disable"); 1905 } else { 1906 DP_INFO(edev, "%s accept-any-vlan\n", 1907 action ? "enabled" : "disabled"); 1908 edev->accept_any_vlan = action; 1909 } 1910 } 1911 1912 static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) 1913 { 1914 struct qede_dev *edev = netdev_priv(dev); 1915 struct qede_vlan *vlan, *tmp; 1916 int rc; 1917 1918 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid); 1919 1920 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL); 1921 if (!vlan) { 1922 DP_INFO(edev, "Failed to allocate struct for vlan\n"); 1923 return -ENOMEM; 1924 } 1925 INIT_LIST_HEAD(&vlan->list); 1926 vlan->vid = vid; 1927 vlan->configured = false; 1928 1929 /* Verify vlan isn't already configured */ 1930 list_for_each_entry(tmp, &edev->vlan_list, list) { 1931 if (tmp->vid == vlan->vid) { 1932 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1933 "vlan already configured\n"); 1934 kfree(vlan); 1935 return -EEXIST; 1936 } 1937 } 1938 1939 /* If interface is down, cache this VLAN ID and return */ 1940 if (edev->state != QEDE_STATE_OPEN) { 1941 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1942 "Interface is down, VLAN %d will be configured when interface is up\n", 1943 vid); 1944 if (vid != 0) 1945 edev->non_configured_vlans++; 1946 list_add(&vlan->list, &edev->vlan_list); 1947 1948 return 0; 1949 } 1950 1951 /* Check for the filter limit. 1952 * Note - vlan0 has a reserved filter and can be added without 1953 * worrying about quota 1954 */ 1955 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) || 1956 (vlan->vid == 0)) { 1957 rc = qede_set_ucast_rx_vlan(edev, 1958 QED_FILTER_XCAST_TYPE_ADD, 1959 vlan->vid); 1960 if (rc) { 1961 DP_ERR(edev, "Failed to configure VLAN %d\n", 1962 vlan->vid); 1963 kfree(vlan); 1964 return -EINVAL; 1965 } 1966 vlan->configured = true; 1967 1968 /* vlan0 filter isn't consuming out of our quota */ 1969 if (vlan->vid != 0) 1970 edev->configured_vlans++; 1971 } else { 1972 /* Out of quota; Activate accept-any-VLAN mode */ 1973 if (!edev->non_configured_vlans) 1974 qede_config_accept_any_vlan(edev, true); 1975 1976 edev->non_configured_vlans++; 1977 } 1978 1979 list_add(&vlan->list, &edev->vlan_list); 1980 1981 return 0; 1982 } 1983 1984 static void qede_del_vlan_from_list(struct qede_dev *edev, 1985 struct qede_vlan *vlan) 1986 { 1987 /* vlan0 filter isn't consuming out of our quota */ 1988 if (vlan->vid != 0) { 1989 if (vlan->configured) 1990 edev->configured_vlans--; 1991 else 1992 edev->non_configured_vlans--; 1993 } 1994 1995 list_del(&vlan->list); 1996 kfree(vlan); 1997 } 1998 1999 static int qede_configure_vlan_filters(struct qede_dev *edev) 2000 { 2001 int rc = 0, real_rc = 0, accept_any_vlan = 0; 2002 struct qed_dev_eth_info *dev_info; 2003 struct qede_vlan *vlan = NULL; 2004 2005 if (list_empty(&edev->vlan_list)) 2006 return 0; 2007 2008 dev_info = &edev->dev_info; 2009 2010 /* Configure non-configured vlans */ 2011 list_for_each_entry(vlan, &edev->vlan_list, list) { 2012 if (vlan->configured) 2013 continue; 2014 2015 /* We have used all our credits, now enable accept_any_vlan */ 2016 if ((vlan->vid != 0) && 2017 (edev->configured_vlans == dev_info->num_vlan_filters)) { 2018 accept_any_vlan = 1; 2019 continue; 2020 } 2021 2022 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid); 2023 2024 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD, 2025 vlan->vid); 2026 if (rc) { 2027 DP_ERR(edev, "Failed to configure VLAN %u\n", 2028 vlan->vid); 2029 real_rc = rc; 2030 continue; 2031 } 2032 2033 vlan->configured = true; 2034 /* vlan0 filter doesn't consume our VLAN filter's quota */ 2035 if (vlan->vid != 0) { 2036 edev->non_configured_vlans--; 2037 edev->configured_vlans++; 2038 } 2039 } 2040 2041 /* enable accept_any_vlan mode if we have more VLANs than credits, 2042 * or remove accept_any_vlan mode if we've actually removed 2043 * a non-configured vlan, and all remaining vlans are truly configured. 2044 */ 2045 2046 if (accept_any_vlan) 2047 qede_config_accept_any_vlan(edev, true); 2048 else if (!edev->non_configured_vlans) 2049 qede_config_accept_any_vlan(edev, false); 2050 2051 return real_rc; 2052 } 2053 2054 static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid) 2055 { 2056 struct qede_dev *edev = netdev_priv(dev); 2057 struct qede_vlan *vlan = NULL; 2058 int rc; 2059 2060 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid); 2061 2062 /* Find whether entry exists */ 2063 list_for_each_entry(vlan, &edev->vlan_list, list) 2064 if (vlan->vid == vid) 2065 break; 2066 2067 if (!vlan || (vlan->vid != vid)) { 2068 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 2069 "Vlan isn't configured\n"); 2070 return 0; 2071 } 2072 2073 if (edev->state != QEDE_STATE_OPEN) { 2074 /* As interface is already down, we don't have a VPORT 2075 * instance to remove vlan filter. So just update vlan list 2076 */ 2077 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 2078 "Interface is down, removing VLAN from list only\n"); 2079 qede_del_vlan_from_list(edev, vlan); 2080 return 0; 2081 } 2082 2083 /* Remove vlan */ 2084 if (vlan->configured) { 2085 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, 2086 vid); 2087 if (rc) { 2088 DP_ERR(edev, "Failed to remove VLAN %d\n", vid); 2089 return -EINVAL; 2090 } 2091 } 2092 2093 qede_del_vlan_from_list(edev, vlan); 2094 2095 /* We have removed a VLAN - try to see if we can 2096 * configure non-configured VLAN from the list. 2097 */ 2098 rc = qede_configure_vlan_filters(edev); 2099 2100 return rc; 2101 } 2102 2103 static void qede_vlan_mark_nonconfigured(struct qede_dev *edev) 2104 { 2105 struct qede_vlan *vlan = NULL; 2106 2107 if (list_empty(&edev->vlan_list)) 2108 return; 2109 2110 list_for_each_entry(vlan, &edev->vlan_list, list) { 2111 if (!vlan->configured) 2112 continue; 2113 2114 vlan->configured = false; 2115 2116 /* vlan0 filter isn't consuming out of our quota */ 2117 if (vlan->vid != 0) { 2118 edev->non_configured_vlans++; 2119 edev->configured_vlans--; 2120 } 2121 2122 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 2123 "marked vlan %d as non-configured\n", vlan->vid); 2124 } 2125 2126 edev->accept_any_vlan = false; 2127 } 2128 2129 static int qede_set_features(struct net_device *dev, netdev_features_t features) 2130 { 2131 struct qede_dev *edev = netdev_priv(dev); 2132 netdev_features_t changes = features ^ dev->features; 2133 bool need_reload = false; 2134 2135 /* No action needed if hardware GRO is disabled during driver load */ 2136 if (changes & NETIF_F_GRO) { 2137 if (dev->features & NETIF_F_GRO) 2138 need_reload = !edev->gro_disable; 2139 else 2140 need_reload = edev->gro_disable; 2141 } 2142 2143 if (need_reload && netif_running(edev->ndev)) { 2144 dev->features = features; 2145 qede_reload(edev, NULL, NULL); 2146 return 1; 2147 } 2148 2149 return 0; 2150 } 2151 2152 static void qede_udp_tunnel_add(struct net_device *dev, 2153 struct udp_tunnel_info *ti) 2154 { 2155 struct qede_dev *edev = netdev_priv(dev); 2156 u16 t_port = ntohs(ti->port); 2157 2158 switch (ti->type) { 2159 case UDP_TUNNEL_TYPE_VXLAN: 2160 if (edev->vxlan_dst_port) 2161 return; 2162 2163 edev->vxlan_dst_port = t_port; 2164 2165 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n", 2166 t_port); 2167 2168 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); 2169 break; 2170 case UDP_TUNNEL_TYPE_GENEVE: 2171 if (edev->geneve_dst_port) 2172 return; 2173 2174 edev->geneve_dst_port = t_port; 2175 2176 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n", 2177 t_port); 2178 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); 2179 break; 2180 default: 2181 return; 2182 } 2183 2184 schedule_delayed_work(&edev->sp_task, 0); 2185 } 2186 2187 static void qede_udp_tunnel_del(struct net_device *dev, 2188 struct udp_tunnel_info *ti) 2189 { 2190 struct qede_dev *edev = netdev_priv(dev); 2191 u16 t_port = ntohs(ti->port); 2192 2193 switch (ti->type) { 2194 case UDP_TUNNEL_TYPE_VXLAN: 2195 if (t_port != edev->vxlan_dst_port) 2196 return; 2197 2198 edev->vxlan_dst_port = 0; 2199 2200 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n", 2201 t_port); 2202 2203 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); 2204 break; 2205 case UDP_TUNNEL_TYPE_GENEVE: 2206 if (t_port != edev->geneve_dst_port) 2207 return; 2208 2209 edev->geneve_dst_port = 0; 2210 2211 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n", 2212 t_port); 2213 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); 2214 break; 2215 default: 2216 return; 2217 } 2218 2219 schedule_delayed_work(&edev->sp_task, 0); 2220 } 2221 2222 static const struct net_device_ops qede_netdev_ops = { 2223 .ndo_open = qede_open, 2224 .ndo_stop = qede_close, 2225 .ndo_start_xmit = qede_start_xmit, 2226 .ndo_set_rx_mode = qede_set_rx_mode, 2227 .ndo_set_mac_address = qede_set_mac_addr, 2228 .ndo_validate_addr = eth_validate_addr, 2229 .ndo_change_mtu = qede_change_mtu, 2230 #ifdef CONFIG_QED_SRIOV 2231 .ndo_set_vf_mac = qede_set_vf_mac, 2232 .ndo_set_vf_vlan = qede_set_vf_vlan, 2233 #endif 2234 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 2235 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 2236 .ndo_set_features = qede_set_features, 2237 .ndo_get_stats64 = qede_get_stats64, 2238 #ifdef CONFIG_QED_SRIOV 2239 .ndo_set_vf_link_state = qede_set_vf_link_state, 2240 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 2241 .ndo_get_vf_config = qede_get_vf_config, 2242 .ndo_set_vf_rate = qede_set_vf_rate, 2243 #endif 2244 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 2245 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 2246 }; 2247 2248 /* ------------------------------------------------------------------------- 2249 * START OF PROBE / REMOVE 2250 * ------------------------------------------------------------------------- 2251 */ 2252 2253 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 2254 struct pci_dev *pdev, 2255 struct qed_dev_eth_info *info, 2256 u32 dp_module, u8 dp_level) 2257 { 2258 struct net_device *ndev; 2259 struct qede_dev *edev; 2260 2261 ndev = alloc_etherdev_mqs(sizeof(*edev), 2262 info->num_queues, info->num_queues); 2263 if (!ndev) { 2264 pr_err("etherdev allocation failed\n"); 2265 return NULL; 2266 } 2267 2268 edev = netdev_priv(ndev); 2269 edev->ndev = ndev; 2270 edev->cdev = cdev; 2271 edev->pdev = pdev; 2272 edev->dp_module = dp_module; 2273 edev->dp_level = dp_level; 2274 edev->ops = qed_ops; 2275 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 2276 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 2277 2278 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 2279 info->num_queues, info->num_queues); 2280 2281 SET_NETDEV_DEV(ndev, &pdev->dev); 2282 2283 memset(&edev->stats, 0, sizeof(edev->stats)); 2284 memcpy(&edev->dev_info, info, sizeof(*info)); 2285 2286 edev->num_tc = edev->dev_info.num_tc; 2287 2288 INIT_LIST_HEAD(&edev->vlan_list); 2289 2290 return edev; 2291 } 2292 2293 static void qede_init_ndev(struct qede_dev *edev) 2294 { 2295 struct net_device *ndev = edev->ndev; 2296 struct pci_dev *pdev = edev->pdev; 2297 u32 hw_features; 2298 2299 pci_set_drvdata(pdev, ndev); 2300 2301 ndev->mem_start = edev->dev_info.common.pci_mem_start; 2302 ndev->base_addr = ndev->mem_start; 2303 ndev->mem_end = edev->dev_info.common.pci_mem_end; 2304 ndev->irq = edev->dev_info.common.pci_irq; 2305 2306 ndev->watchdog_timeo = TX_TIMEOUT; 2307 2308 ndev->netdev_ops = &qede_netdev_ops; 2309 2310 qede_set_ethtool_ops(ndev); 2311 2312 /* user-changeble features */ 2313 hw_features = NETIF_F_GRO | NETIF_F_SG | 2314 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2315 NETIF_F_TSO | NETIF_F_TSO6; 2316 2317 /* Encap features*/ 2318 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL | 2319 NETIF_F_TSO_ECN; 2320 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2321 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN | 2322 NETIF_F_TSO6 | NETIF_F_GSO_GRE | 2323 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM; 2324 2325 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 2326 NETIF_F_HIGHDMA; 2327 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 2328 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 2329 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 2330 2331 ndev->hw_features = hw_features; 2332 2333 /* Set network device HW mac */ 2334 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 2335 } 2336 2337 /* This function converts from 32b param to two params of level and module 2338 * Input 32b decoding: 2339 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 2340 * 'happy' flow, e.g. memory allocation failed. 2341 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 2342 * and provide important parameters. 2343 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 2344 * module. VERBOSE prints are for tracking the specific flow in low level. 2345 * 2346 * Notice that the level should be that of the lowest required logs. 2347 */ 2348 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 2349 { 2350 *p_dp_level = QED_LEVEL_NOTICE; 2351 *p_dp_module = 0; 2352 2353 if (debug & QED_LOG_VERBOSE_MASK) { 2354 *p_dp_level = QED_LEVEL_VERBOSE; 2355 *p_dp_module = (debug & 0x3FFFFFFF); 2356 } else if (debug & QED_LOG_INFO_MASK) { 2357 *p_dp_level = QED_LEVEL_INFO; 2358 } else if (debug & QED_LOG_NOTICE_MASK) { 2359 *p_dp_level = QED_LEVEL_NOTICE; 2360 } 2361 } 2362 2363 static void qede_free_fp_array(struct qede_dev *edev) 2364 { 2365 if (edev->fp_array) { 2366 struct qede_fastpath *fp; 2367 int i; 2368 2369 for_each_queue(i) { 2370 fp = &edev->fp_array[i]; 2371 2372 kfree(fp->sb_info); 2373 kfree(fp->rxq); 2374 kfree(fp->txqs); 2375 } 2376 kfree(edev->fp_array); 2377 } 2378 2379 edev->num_queues = 0; 2380 edev->fp_num_tx = 0; 2381 edev->fp_num_rx = 0; 2382 } 2383 2384 static int qede_alloc_fp_array(struct qede_dev *edev) 2385 { 2386 u8 fp_combined, fp_rx = edev->fp_num_rx; 2387 struct qede_fastpath *fp; 2388 int i; 2389 2390 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 2391 sizeof(*edev->fp_array), GFP_KERNEL); 2392 if (!edev->fp_array) { 2393 DP_NOTICE(edev, "fp array allocation failed\n"); 2394 goto err; 2395 } 2396 2397 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 2398 2399 /* Allocate the FP elements for Rx queues followed by combined and then 2400 * the Tx. This ordering should be maintained so that the respective 2401 * queues (Rx or Tx) will be together in the fastpath array and the 2402 * associated ids will be sequential. 2403 */ 2404 for_each_queue(i) { 2405 fp = &edev->fp_array[i]; 2406 2407 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL); 2408 if (!fp->sb_info) { 2409 DP_NOTICE(edev, "sb info struct allocation failed\n"); 2410 goto err; 2411 } 2412 2413 if (fp_rx) { 2414 fp->type = QEDE_FASTPATH_RX; 2415 fp_rx--; 2416 } else if (fp_combined) { 2417 fp->type = QEDE_FASTPATH_COMBINED; 2418 fp_combined--; 2419 } else { 2420 fp->type = QEDE_FASTPATH_TX; 2421 } 2422 2423 if (fp->type & QEDE_FASTPATH_TX) { 2424 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), 2425 GFP_KERNEL); 2426 if (!fp->txqs) { 2427 DP_NOTICE(edev, 2428 "TXQ array allocation failed\n"); 2429 goto err; 2430 } 2431 } 2432 2433 if (fp->type & QEDE_FASTPATH_RX) { 2434 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL); 2435 if (!fp->rxq) { 2436 DP_NOTICE(edev, 2437 "RXQ struct allocation failed\n"); 2438 goto err; 2439 } 2440 } 2441 } 2442 2443 return 0; 2444 err: 2445 qede_free_fp_array(edev); 2446 return -ENOMEM; 2447 } 2448 2449 static void qede_sp_task(struct work_struct *work) 2450 { 2451 struct qede_dev *edev = container_of(work, struct qede_dev, 2452 sp_task.work); 2453 struct qed_dev *cdev = edev->cdev; 2454 2455 mutex_lock(&edev->qede_lock); 2456 2457 if (edev->state == QEDE_STATE_OPEN) { 2458 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 2459 qede_config_rx_mode(edev->ndev); 2460 } 2461 2462 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) { 2463 struct qed_tunn_params tunn_params; 2464 2465 memset(&tunn_params, 0, sizeof(tunn_params)); 2466 tunn_params.update_vxlan_port = 1; 2467 tunn_params.vxlan_port = edev->vxlan_dst_port; 2468 qed_ops->tunn_config(cdev, &tunn_params); 2469 } 2470 2471 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) { 2472 struct qed_tunn_params tunn_params; 2473 2474 memset(&tunn_params, 0, sizeof(tunn_params)); 2475 tunn_params.update_geneve_port = 1; 2476 tunn_params.geneve_port = edev->geneve_dst_port; 2477 qed_ops->tunn_config(cdev, &tunn_params); 2478 } 2479 2480 mutex_unlock(&edev->qede_lock); 2481 } 2482 2483 static void qede_update_pf_params(struct qed_dev *cdev) 2484 { 2485 struct qed_pf_params pf_params; 2486 2487 /* 64 rx + 64 tx */ 2488 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 2489 pf_params.eth_pf_params.num_cons = 128; 2490 qed_ops->common->update_pf_params(cdev, &pf_params); 2491 } 2492 2493 enum qede_probe_mode { 2494 QEDE_PROBE_NORMAL, 2495 }; 2496 2497 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 2498 bool is_vf, enum qede_probe_mode mode) 2499 { 2500 struct qed_probe_params probe_params; 2501 struct qed_slowpath_params sp_params; 2502 struct qed_dev_eth_info dev_info; 2503 struct qede_dev *edev; 2504 struct qed_dev *cdev; 2505 int rc; 2506 2507 if (unlikely(dp_level & QED_LEVEL_INFO)) 2508 pr_notice("Starting qede probe\n"); 2509 2510 memset(&probe_params, 0, sizeof(probe_params)); 2511 probe_params.protocol = QED_PROTOCOL_ETH; 2512 probe_params.dp_module = dp_module; 2513 probe_params.dp_level = dp_level; 2514 probe_params.is_vf = is_vf; 2515 cdev = qed_ops->common->probe(pdev, &probe_params); 2516 if (!cdev) { 2517 rc = -ENODEV; 2518 goto err0; 2519 } 2520 2521 qede_update_pf_params(cdev); 2522 2523 /* Start the Slowpath-process */ 2524 memset(&sp_params, 0, sizeof(sp_params)); 2525 sp_params.int_mode = QED_INT_MODE_MSIX; 2526 sp_params.drv_major = QEDE_MAJOR_VERSION; 2527 sp_params.drv_minor = QEDE_MINOR_VERSION; 2528 sp_params.drv_rev = QEDE_REVISION_VERSION; 2529 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 2530 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 2531 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 2532 if (rc) { 2533 pr_notice("Cannot start slowpath\n"); 2534 goto err1; 2535 } 2536 2537 /* Learn information crucial for qede to progress */ 2538 rc = qed_ops->fill_dev_info(cdev, &dev_info); 2539 if (rc) 2540 goto err2; 2541 2542 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 2543 dp_level); 2544 if (!edev) { 2545 rc = -ENOMEM; 2546 goto err2; 2547 } 2548 2549 if (is_vf) 2550 edev->flags |= QEDE_FLAG_IS_VF; 2551 2552 qede_init_ndev(edev); 2553 2554 rc = qede_roce_dev_add(edev); 2555 if (rc) 2556 goto err3; 2557 2558 rc = register_netdev(edev->ndev); 2559 if (rc) { 2560 DP_NOTICE(edev, "Cannot register net-device\n"); 2561 goto err4; 2562 } 2563 2564 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION); 2565 2566 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 2567 2568 #ifdef CONFIG_DCB 2569 if (!IS_VF(edev)) 2570 qede_set_dcbnl_ops(edev->ndev); 2571 #endif 2572 2573 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 2574 mutex_init(&edev->qede_lock); 2575 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 2576 2577 DP_INFO(edev, "Ending successfully qede probe\n"); 2578 2579 return 0; 2580 2581 err4: 2582 qede_roce_dev_remove(edev); 2583 err3: 2584 free_netdev(edev->ndev); 2585 err2: 2586 qed_ops->common->slowpath_stop(cdev); 2587 err1: 2588 qed_ops->common->remove(cdev); 2589 err0: 2590 return rc; 2591 } 2592 2593 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 2594 { 2595 bool is_vf = false; 2596 u32 dp_module = 0; 2597 u8 dp_level = 0; 2598 2599 switch ((enum qede_pci_private)id->driver_data) { 2600 case QEDE_PRIVATE_VF: 2601 if (debug & QED_LOG_VERBOSE_MASK) 2602 dev_err(&pdev->dev, "Probing a VF\n"); 2603 is_vf = true; 2604 break; 2605 default: 2606 if (debug & QED_LOG_VERBOSE_MASK) 2607 dev_err(&pdev->dev, "Probing a PF\n"); 2608 } 2609 2610 qede_config_debug(debug, &dp_module, &dp_level); 2611 2612 return __qede_probe(pdev, dp_module, dp_level, is_vf, 2613 QEDE_PROBE_NORMAL); 2614 } 2615 2616 enum qede_remove_mode { 2617 QEDE_REMOVE_NORMAL, 2618 }; 2619 2620 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 2621 { 2622 struct net_device *ndev = pci_get_drvdata(pdev); 2623 struct qede_dev *edev = netdev_priv(ndev); 2624 struct qed_dev *cdev = edev->cdev; 2625 2626 DP_INFO(edev, "Starting qede_remove\n"); 2627 2628 cancel_delayed_work_sync(&edev->sp_task); 2629 2630 unregister_netdev(ndev); 2631 2632 qede_roce_dev_remove(edev); 2633 2634 edev->ops->common->set_power_state(cdev, PCI_D0); 2635 2636 pci_set_drvdata(pdev, NULL); 2637 2638 free_netdev(ndev); 2639 2640 /* Use global ops since we've freed edev */ 2641 qed_ops->common->slowpath_stop(cdev); 2642 qed_ops->common->remove(cdev); 2643 2644 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 2645 } 2646 2647 static void qede_remove(struct pci_dev *pdev) 2648 { 2649 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 2650 } 2651 2652 /* ------------------------------------------------------------------------- 2653 * START OF LOAD / UNLOAD 2654 * ------------------------------------------------------------------------- 2655 */ 2656 2657 static int qede_set_num_queues(struct qede_dev *edev) 2658 { 2659 int rc; 2660 u16 rss_num; 2661 2662 /* Setup queues according to possible resources*/ 2663 if (edev->req_queues) 2664 rss_num = edev->req_queues; 2665 else 2666 rss_num = netif_get_num_default_rss_queues() * 2667 edev->dev_info.common.num_hwfns; 2668 2669 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 2670 2671 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 2672 if (rc > 0) { 2673 /* Managed to request interrupts for our queues */ 2674 edev->num_queues = rc; 2675 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 2676 QEDE_QUEUE_CNT(edev), rss_num); 2677 rc = 0; 2678 } 2679 2680 edev->fp_num_tx = edev->req_num_tx; 2681 edev->fp_num_rx = edev->req_num_rx; 2682 2683 return rc; 2684 } 2685 2686 static void qede_free_mem_sb(struct qede_dev *edev, 2687 struct qed_sb_info *sb_info) 2688 { 2689 if (sb_info->sb_virt) 2690 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 2691 (void *)sb_info->sb_virt, sb_info->sb_phys); 2692 } 2693 2694 /* This function allocates fast-path status block memory */ 2695 static int qede_alloc_mem_sb(struct qede_dev *edev, 2696 struct qed_sb_info *sb_info, u16 sb_id) 2697 { 2698 struct status_block *sb_virt; 2699 dma_addr_t sb_phys; 2700 int rc; 2701 2702 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 2703 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 2704 if (!sb_virt) { 2705 DP_ERR(edev, "Status block allocation failed\n"); 2706 return -ENOMEM; 2707 } 2708 2709 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 2710 sb_virt, sb_phys, sb_id, 2711 QED_SB_TYPE_L2_QUEUE); 2712 if (rc) { 2713 DP_ERR(edev, "Status block initialization failed\n"); 2714 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 2715 sb_virt, sb_phys); 2716 return rc; 2717 } 2718 2719 return 0; 2720 } 2721 2722 static void qede_free_rx_buffers(struct qede_dev *edev, 2723 struct qede_rx_queue *rxq) 2724 { 2725 u16 i; 2726 2727 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 2728 struct sw_rx_data *rx_buf; 2729 struct page *data; 2730 2731 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 2732 data = rx_buf->data; 2733 2734 dma_unmap_page(&edev->pdev->dev, 2735 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE); 2736 2737 rx_buf->data = NULL; 2738 __free_page(data); 2739 } 2740 } 2741 2742 static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq) 2743 { 2744 int i; 2745 2746 if (edev->gro_disable) 2747 return; 2748 2749 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 2750 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 2751 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 2752 2753 if (replace_buf->data) { 2754 dma_unmap_page(&edev->pdev->dev, 2755 replace_buf->mapping, 2756 PAGE_SIZE, DMA_FROM_DEVICE); 2757 __free_page(replace_buf->data); 2758 } 2759 } 2760 } 2761 2762 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 2763 { 2764 qede_free_sge_mem(edev, rxq); 2765 2766 /* Free rx buffers */ 2767 qede_free_rx_buffers(edev, rxq); 2768 2769 /* Free the parallel SW ring */ 2770 kfree(rxq->sw_rx_ring); 2771 2772 /* Free the real RQ ring used by FW */ 2773 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 2774 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 2775 } 2776 2777 static int qede_alloc_rx_buffer(struct qede_dev *edev, 2778 struct qede_rx_queue *rxq) 2779 { 2780 struct sw_rx_data *sw_rx_data; 2781 struct eth_rx_bd *rx_bd; 2782 dma_addr_t mapping; 2783 struct page *data; 2784 2785 data = alloc_pages(GFP_ATOMIC, 0); 2786 if (unlikely(!data)) { 2787 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n"); 2788 return -ENOMEM; 2789 } 2790 2791 /* Map the entire page as it would be used 2792 * for multiple RX buffer segment size mapping. 2793 */ 2794 mapping = dma_map_page(&edev->pdev->dev, data, 0, 2795 PAGE_SIZE, DMA_FROM_DEVICE); 2796 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 2797 __free_page(data); 2798 DP_NOTICE(edev, "Failed to map Rx buffer\n"); 2799 return -ENOMEM; 2800 } 2801 2802 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 2803 sw_rx_data->page_offset = 0; 2804 sw_rx_data->data = data; 2805 sw_rx_data->mapping = mapping; 2806 2807 /* Advance PROD and get BD pointer */ 2808 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring); 2809 WARN_ON(!rx_bd); 2810 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping)); 2811 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping)); 2812 2813 rxq->sw_rx_prod++; 2814 2815 return 0; 2816 } 2817 2818 static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq) 2819 { 2820 dma_addr_t mapping; 2821 int i; 2822 2823 if (edev->gro_disable) 2824 return 0; 2825 2826 if (edev->ndev->mtu > PAGE_SIZE) { 2827 edev->gro_disable = 1; 2828 return 0; 2829 } 2830 2831 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 2832 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 2833 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 2834 2835 replace_buf->data = alloc_pages(GFP_ATOMIC, 0); 2836 if (unlikely(!replace_buf->data)) { 2837 DP_NOTICE(edev, 2838 "Failed to allocate TPA skb pool [replacement buffer]\n"); 2839 goto err; 2840 } 2841 2842 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0, 2843 rxq->rx_buf_size, DMA_FROM_DEVICE); 2844 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 2845 DP_NOTICE(edev, 2846 "Failed to map TPA replacement buffer\n"); 2847 goto err; 2848 } 2849 2850 replace_buf->mapping = mapping; 2851 tpa_info->replace_buf.page_offset = 0; 2852 2853 tpa_info->replace_buf_mapping = mapping; 2854 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 2855 } 2856 2857 return 0; 2858 err: 2859 qede_free_sge_mem(edev, rxq); 2860 edev->gro_disable = 1; 2861 return -ENOMEM; 2862 } 2863 2864 /* This function allocates all memory needed per Rx queue */ 2865 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 2866 { 2867 int i, rc, size; 2868 2869 rxq->num_rx_buffers = edev->q_num_rx_buffers; 2870 2871 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 2872 2873 if (rxq->rx_buf_size > PAGE_SIZE) 2874 rxq->rx_buf_size = PAGE_SIZE; 2875 2876 /* Segment size to spilt a page in multiple equal parts */ 2877 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size); 2878 2879 /* Allocate the parallel driver ring for Rx buffers */ 2880 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 2881 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 2882 if (!rxq->sw_rx_ring) { 2883 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 2884 rc = -ENOMEM; 2885 goto err; 2886 } 2887 2888 /* Allocate FW Rx ring */ 2889 rc = edev->ops->common->chain_alloc(edev->cdev, 2890 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 2891 QED_CHAIN_MODE_NEXT_PTR, 2892 QED_CHAIN_CNT_TYPE_U16, 2893 RX_RING_SIZE, 2894 sizeof(struct eth_rx_bd), 2895 &rxq->rx_bd_ring); 2896 2897 if (rc) 2898 goto err; 2899 2900 /* Allocate FW completion ring */ 2901 rc = edev->ops->common->chain_alloc(edev->cdev, 2902 QED_CHAIN_USE_TO_CONSUME, 2903 QED_CHAIN_MODE_PBL, 2904 QED_CHAIN_CNT_TYPE_U16, 2905 RX_RING_SIZE, 2906 sizeof(union eth_rx_cqe), 2907 &rxq->rx_comp_ring); 2908 if (rc) 2909 goto err; 2910 2911 /* Allocate buffers for the Rx ring */ 2912 for (i = 0; i < rxq->num_rx_buffers; i++) { 2913 rc = qede_alloc_rx_buffer(edev, rxq); 2914 if (rc) { 2915 DP_ERR(edev, 2916 "Rx buffers allocation failed at index %d\n", i); 2917 goto err; 2918 } 2919 } 2920 2921 rc = qede_alloc_sge_mem(edev, rxq); 2922 err: 2923 return rc; 2924 } 2925 2926 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 2927 { 2928 /* Free the parallel SW ring */ 2929 kfree(txq->sw_tx_ring); 2930 2931 /* Free the real RQ ring used by FW */ 2932 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 2933 } 2934 2935 /* This function allocates all memory needed per Tx queue */ 2936 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 2937 { 2938 int size, rc; 2939 union eth_tx_bd_types *p_virt; 2940 2941 txq->num_tx_buffers = edev->q_num_tx_buffers; 2942 2943 /* Allocate the parallel driver ring for Tx buffers */ 2944 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX; 2945 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL); 2946 if (!txq->sw_tx_ring) { 2947 DP_NOTICE(edev, "Tx buffers ring allocation failed\n"); 2948 goto err; 2949 } 2950 2951 rc = edev->ops->common->chain_alloc(edev->cdev, 2952 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 2953 QED_CHAIN_MODE_PBL, 2954 QED_CHAIN_CNT_TYPE_U16, 2955 NUM_TX_BDS_MAX, 2956 sizeof(*p_virt), &txq->tx_pbl); 2957 if (rc) 2958 goto err; 2959 2960 return 0; 2961 2962 err: 2963 qede_free_mem_txq(edev, txq); 2964 return -ENOMEM; 2965 } 2966 2967 /* This function frees all memory of a single fp */ 2968 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 2969 { 2970 int tc; 2971 2972 qede_free_mem_sb(edev, fp->sb_info); 2973 2974 if (fp->type & QEDE_FASTPATH_RX) 2975 qede_free_mem_rxq(edev, fp->rxq); 2976 2977 if (fp->type & QEDE_FASTPATH_TX) 2978 for (tc = 0; tc < edev->num_tc; tc++) 2979 qede_free_mem_txq(edev, &fp->txqs[tc]); 2980 } 2981 2982 /* This function allocates all memory needed for a single fp (i.e. an entity 2983 * which contains status block, one rx queue and/or multiple per-TC tx queues. 2984 */ 2985 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 2986 { 2987 int rc, tc; 2988 2989 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 2990 if (rc) 2991 goto err; 2992 2993 if (fp->type & QEDE_FASTPATH_RX) { 2994 rc = qede_alloc_mem_rxq(edev, fp->rxq); 2995 if (rc) 2996 goto err; 2997 } 2998 2999 if (fp->type & QEDE_FASTPATH_TX) { 3000 for (tc = 0; tc < edev->num_tc; tc++) { 3001 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]); 3002 if (rc) 3003 goto err; 3004 } 3005 } 3006 3007 return 0; 3008 err: 3009 return rc; 3010 } 3011 3012 static void qede_free_mem_load(struct qede_dev *edev) 3013 { 3014 int i; 3015 3016 for_each_queue(i) { 3017 struct qede_fastpath *fp = &edev->fp_array[i]; 3018 3019 qede_free_mem_fp(edev, fp); 3020 } 3021 } 3022 3023 /* This function allocates all qede memory at NIC load. */ 3024 static int qede_alloc_mem_load(struct qede_dev *edev) 3025 { 3026 int rc = 0, queue_id; 3027 3028 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 3029 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 3030 3031 rc = qede_alloc_mem_fp(edev, fp); 3032 if (rc) { 3033 DP_ERR(edev, 3034 "Failed to allocate memory for fastpath - rss id = %d\n", 3035 queue_id); 3036 qede_free_mem_load(edev); 3037 return rc; 3038 } 3039 } 3040 3041 return 0; 3042 } 3043 3044 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 3045 static void qede_init_fp(struct qede_dev *edev) 3046 { 3047 int queue_id, rxq_index = 0, txq_index = 0, tc; 3048 struct qede_fastpath *fp; 3049 3050 for_each_queue(queue_id) { 3051 fp = &edev->fp_array[queue_id]; 3052 3053 fp->edev = edev; 3054 fp->id = queue_id; 3055 3056 memset((void *)&fp->napi, 0, sizeof(fp->napi)); 3057 3058 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info)); 3059 3060 if (fp->type & QEDE_FASTPATH_RX) { 3061 memset((void *)fp->rxq, 0, sizeof(*fp->rxq)); 3062 fp->rxq->rxq_id = rxq_index++; 3063 } 3064 3065 if (fp->type & QEDE_FASTPATH_TX) { 3066 memset((void *)fp->txqs, 0, 3067 (edev->num_tc * sizeof(*fp->txqs))); 3068 for (tc = 0; tc < edev->num_tc; tc++) { 3069 fp->txqs[tc].index = txq_index + 3070 tc * QEDE_TSS_COUNT(edev); 3071 if (edev->dev_info.is_legacy) 3072 fp->txqs[tc].is_legacy = true; 3073 } 3074 txq_index++; 3075 } 3076 3077 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 3078 edev->ndev->name, queue_id); 3079 } 3080 3081 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO); 3082 } 3083 3084 static int qede_set_real_num_queues(struct qede_dev *edev) 3085 { 3086 int rc = 0; 3087 3088 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev)); 3089 if (rc) { 3090 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 3091 return rc; 3092 } 3093 3094 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 3095 if (rc) { 3096 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 3097 return rc; 3098 } 3099 3100 return 0; 3101 } 3102 3103 static void qede_napi_disable_remove(struct qede_dev *edev) 3104 { 3105 int i; 3106 3107 for_each_queue(i) { 3108 napi_disable(&edev->fp_array[i].napi); 3109 3110 netif_napi_del(&edev->fp_array[i].napi); 3111 } 3112 } 3113 3114 static void qede_napi_add_enable(struct qede_dev *edev) 3115 { 3116 int i; 3117 3118 /* Add NAPI objects */ 3119 for_each_queue(i) { 3120 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 3121 qede_poll, NAPI_POLL_WEIGHT); 3122 napi_enable(&edev->fp_array[i].napi); 3123 } 3124 } 3125 3126 static void qede_sync_free_irqs(struct qede_dev *edev) 3127 { 3128 int i; 3129 3130 for (i = 0; i < edev->int_info.used_cnt; i++) { 3131 if (edev->int_info.msix_cnt) { 3132 synchronize_irq(edev->int_info.msix[i].vector); 3133 free_irq(edev->int_info.msix[i].vector, 3134 &edev->fp_array[i]); 3135 } else { 3136 edev->ops->common->simd_handler_clean(edev->cdev, i); 3137 } 3138 } 3139 3140 edev->int_info.used_cnt = 0; 3141 } 3142 3143 static int qede_req_msix_irqs(struct qede_dev *edev) 3144 { 3145 int i, rc; 3146 3147 /* Sanitize number of interrupts == number of prepared RSS queues */ 3148 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 3149 DP_ERR(edev, 3150 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 3151 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 3152 return -EINVAL; 3153 } 3154 3155 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 3156 rc = request_irq(edev->int_info.msix[i].vector, 3157 qede_msix_fp_int, 0, edev->fp_array[i].name, 3158 &edev->fp_array[i]); 3159 if (rc) { 3160 DP_ERR(edev, "Request fp %d irq failed\n", i); 3161 qede_sync_free_irqs(edev); 3162 return rc; 3163 } 3164 DP_VERBOSE(edev, NETIF_MSG_INTR, 3165 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 3166 edev->fp_array[i].name, i, 3167 &edev->fp_array[i]); 3168 edev->int_info.used_cnt++; 3169 } 3170 3171 return 0; 3172 } 3173 3174 static void qede_simd_fp_handler(void *cookie) 3175 { 3176 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 3177 3178 napi_schedule_irqoff(&fp->napi); 3179 } 3180 3181 static int qede_setup_irqs(struct qede_dev *edev) 3182 { 3183 int i, rc = 0; 3184 3185 /* Learn Interrupt configuration */ 3186 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 3187 if (rc) 3188 return rc; 3189 3190 if (edev->int_info.msix_cnt) { 3191 rc = qede_req_msix_irqs(edev); 3192 if (rc) 3193 return rc; 3194 edev->ndev->irq = edev->int_info.msix[0].vector; 3195 } else { 3196 const struct qed_common_ops *ops; 3197 3198 /* qed should learn receive the RSS ids and callbacks */ 3199 ops = edev->ops->common; 3200 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 3201 ops->simd_handler_config(edev->cdev, 3202 &edev->fp_array[i], i, 3203 qede_simd_fp_handler); 3204 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 3205 } 3206 return 0; 3207 } 3208 3209 static int qede_drain_txq(struct qede_dev *edev, 3210 struct qede_tx_queue *txq, bool allow_drain) 3211 { 3212 int rc, cnt = 1000; 3213 3214 while (txq->sw_tx_cons != txq->sw_tx_prod) { 3215 if (!cnt) { 3216 if (allow_drain) { 3217 DP_NOTICE(edev, 3218 "Tx queue[%d] is stuck, requesting MCP to drain\n", 3219 txq->index); 3220 rc = edev->ops->common->drain(edev->cdev); 3221 if (rc) 3222 return rc; 3223 return qede_drain_txq(edev, txq, false); 3224 } 3225 DP_NOTICE(edev, 3226 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 3227 txq->index, txq->sw_tx_prod, 3228 txq->sw_tx_cons); 3229 return -ENODEV; 3230 } 3231 cnt--; 3232 usleep_range(1000, 2000); 3233 barrier(); 3234 } 3235 3236 /* FW finished processing, wait for HW to transmit all tx packets */ 3237 usleep_range(1000, 2000); 3238 3239 return 0; 3240 } 3241 3242 static int qede_stop_queues(struct qede_dev *edev) 3243 { 3244 struct qed_update_vport_params vport_update_params; 3245 struct qed_dev *cdev = edev->cdev; 3246 int rc, tc, i; 3247 3248 /* Disable the vport */ 3249 memset(&vport_update_params, 0, sizeof(vport_update_params)); 3250 vport_update_params.vport_id = 0; 3251 vport_update_params.update_vport_active_flg = 1; 3252 vport_update_params.vport_active_flg = 0; 3253 vport_update_params.update_rss_flg = 0; 3254 3255 rc = edev->ops->vport_update(cdev, &vport_update_params); 3256 if (rc) { 3257 DP_ERR(edev, "Failed to update vport\n"); 3258 return rc; 3259 } 3260 3261 /* Flush Tx queues. If needed, request drain from MCP */ 3262 for_each_queue(i) { 3263 struct qede_fastpath *fp = &edev->fp_array[i]; 3264 3265 if (fp->type & QEDE_FASTPATH_TX) { 3266 for (tc = 0; tc < edev->num_tc; tc++) { 3267 struct qede_tx_queue *txq = &fp->txqs[tc]; 3268 3269 rc = qede_drain_txq(edev, txq, true); 3270 if (rc) 3271 return rc; 3272 } 3273 } 3274 } 3275 3276 /* Stop all Queues in reverse order */ 3277 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 3278 struct qed_stop_rxq_params rx_params; 3279 3280 /* Stop the Tx Queue(s) */ 3281 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 3282 for (tc = 0; tc < edev->num_tc; tc++) { 3283 struct qed_stop_txq_params tx_params; 3284 u8 val; 3285 3286 tx_params.rss_id = i; 3287 val = edev->fp_array[i].txqs[tc].index; 3288 tx_params.tx_queue_id = val; 3289 rc = edev->ops->q_tx_stop(cdev, &tx_params); 3290 if (rc) { 3291 DP_ERR(edev, "Failed to stop TXQ #%d\n", 3292 tx_params.tx_queue_id); 3293 return rc; 3294 } 3295 } 3296 } 3297 3298 /* Stop the Rx Queue */ 3299 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 3300 memset(&rx_params, 0, sizeof(rx_params)); 3301 rx_params.rss_id = i; 3302 rx_params.rx_queue_id = edev->fp_array[i].rxq->rxq_id; 3303 3304 rc = edev->ops->q_rx_stop(cdev, &rx_params); 3305 if (rc) { 3306 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 3307 return rc; 3308 } 3309 } 3310 } 3311 3312 /* Stop the vport */ 3313 rc = edev->ops->vport_stop(cdev, 0); 3314 if (rc) 3315 DP_ERR(edev, "Failed to stop VPORT\n"); 3316 3317 return rc; 3318 } 3319 3320 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 3321 { 3322 int rc, tc, i; 3323 int vlan_removal_en = 1; 3324 struct qed_dev *cdev = edev->cdev; 3325 struct qed_update_vport_params vport_update_params; 3326 struct qed_queue_start_common_params q_params; 3327 struct qed_dev_info *qed_info = &edev->dev_info.common; 3328 struct qed_start_vport_params start = {0}; 3329 bool reset_rss_indir = false; 3330 3331 if (!edev->num_queues) { 3332 DP_ERR(edev, 3333 "Cannot update V-VPORT as active as there are no Rx queues\n"); 3334 return -EINVAL; 3335 } 3336 3337 start.gro_enable = !edev->gro_disable; 3338 start.mtu = edev->ndev->mtu; 3339 start.vport_id = 0; 3340 start.drop_ttl0 = true; 3341 start.remove_inner_vlan = vlan_removal_en; 3342 start.clear_stats = clear_stats; 3343 3344 rc = edev->ops->vport_start(cdev, &start); 3345 3346 if (rc) { 3347 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 3348 return rc; 3349 } 3350 3351 DP_VERBOSE(edev, NETIF_MSG_IFUP, 3352 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 3353 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 3354 3355 for_each_queue(i) { 3356 struct qede_fastpath *fp = &edev->fp_array[i]; 3357 dma_addr_t p_phys_table; 3358 u32 page_cnt; 3359 3360 if (fp->type & QEDE_FASTPATH_RX) { 3361 struct qede_rx_queue *rxq = fp->rxq; 3362 __le16 *val; 3363 3364 memset(&q_params, 0, sizeof(q_params)); 3365 q_params.rss_id = i; 3366 q_params.queue_id = rxq->rxq_id; 3367 q_params.vport_id = 0; 3368 q_params.sb = fp->sb_info->igu_sb_id; 3369 q_params.sb_idx = RX_PI; 3370 3371 p_phys_table = 3372 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 3373 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 3374 3375 rc = edev->ops->q_rx_start(cdev, &q_params, 3376 rxq->rx_buf_size, 3377 rxq->rx_bd_ring.p_phys_addr, 3378 p_phys_table, 3379 page_cnt, 3380 &rxq->hw_rxq_prod_addr); 3381 if (rc) { 3382 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 3383 rc); 3384 return rc; 3385 } 3386 3387 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 3388 rxq->hw_cons_ptr = val; 3389 3390 qede_update_rx_prod(edev, rxq); 3391 } 3392 3393 if (!(fp->type & QEDE_FASTPATH_TX)) 3394 continue; 3395 3396 for (tc = 0; tc < edev->num_tc; tc++) { 3397 struct qede_tx_queue *txq = &fp->txqs[tc]; 3398 3399 p_phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 3400 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 3401 3402 memset(&q_params, 0, sizeof(q_params)); 3403 q_params.rss_id = i; 3404 q_params.queue_id = txq->index; 3405 q_params.vport_id = 0; 3406 q_params.sb = fp->sb_info->igu_sb_id; 3407 q_params.sb_idx = TX_PI(tc); 3408 3409 rc = edev->ops->q_tx_start(cdev, &q_params, 3410 p_phys_table, page_cnt, 3411 &txq->doorbell_addr); 3412 if (rc) { 3413 DP_ERR(edev, "Start TXQ #%d failed %d\n", 3414 txq->index, rc); 3415 return rc; 3416 } 3417 3418 txq->hw_cons_ptr = 3419 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)]; 3420 SET_FIELD(txq->tx_db.data.params, 3421 ETH_DB_DATA_DEST, DB_DEST_XCM); 3422 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, 3423 DB_AGG_CMD_SET); 3424 SET_FIELD(txq->tx_db.data.params, 3425 ETH_DB_DATA_AGG_VAL_SEL, 3426 DQ_XCM_ETH_TX_BD_PROD_CMD); 3427 3428 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 3429 } 3430 } 3431 3432 /* Prepare and send the vport enable */ 3433 memset(&vport_update_params, 0, sizeof(vport_update_params)); 3434 vport_update_params.vport_id = start.vport_id; 3435 vport_update_params.update_vport_active_flg = 1; 3436 vport_update_params.vport_active_flg = 1; 3437 3438 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) && 3439 qed_info->tx_switching) { 3440 vport_update_params.update_tx_switching_flg = 1; 3441 vport_update_params.tx_switching_flg = 1; 3442 } 3443 3444 /* Fill struct with RSS params */ 3445 if (QEDE_RSS_COUNT(edev) > 1) { 3446 vport_update_params.update_rss_flg = 1; 3447 3448 /* Need to validate current RSS config uses valid entries */ 3449 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 3450 if (edev->rss_params.rss_ind_table[i] >= 3451 QEDE_RSS_COUNT(edev)) { 3452 reset_rss_indir = true; 3453 break; 3454 } 3455 } 3456 3457 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) || 3458 reset_rss_indir) { 3459 u16 val; 3460 3461 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 3462 u16 indir_val; 3463 3464 val = QEDE_RSS_COUNT(edev); 3465 indir_val = ethtool_rxfh_indir_default(i, val); 3466 edev->rss_params.rss_ind_table[i] = indir_val; 3467 } 3468 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 3469 } 3470 3471 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) { 3472 netdev_rss_key_fill(edev->rss_params.rss_key, 3473 sizeof(edev->rss_params.rss_key)); 3474 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 3475 } 3476 3477 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) { 3478 edev->rss_params.rss_caps = QED_RSS_IPV4 | 3479 QED_RSS_IPV6 | 3480 QED_RSS_IPV4_TCP | 3481 QED_RSS_IPV6_TCP; 3482 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 3483 } 3484 3485 memcpy(&vport_update_params.rss_params, &edev->rss_params, 3486 sizeof(vport_update_params.rss_params)); 3487 } else { 3488 memset(&vport_update_params.rss_params, 0, 3489 sizeof(vport_update_params.rss_params)); 3490 } 3491 3492 rc = edev->ops->vport_update(cdev, &vport_update_params); 3493 if (rc) { 3494 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 3495 return rc; 3496 } 3497 3498 return 0; 3499 } 3500 3501 static int qede_set_mcast_rx_mac(struct qede_dev *edev, 3502 enum qed_filter_xcast_params_type opcode, 3503 unsigned char *mac, int num_macs) 3504 { 3505 struct qed_filter_params filter_cmd; 3506 int i; 3507 3508 memset(&filter_cmd, 0, sizeof(filter_cmd)); 3509 filter_cmd.type = QED_FILTER_TYPE_MCAST; 3510 filter_cmd.filter.mcast.type = opcode; 3511 filter_cmd.filter.mcast.num = num_macs; 3512 3513 for (i = 0; i < num_macs; i++, mac += ETH_ALEN) 3514 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac); 3515 3516 return edev->ops->filter_config(edev->cdev, &filter_cmd); 3517 } 3518 3519 enum qede_unload_mode { 3520 QEDE_UNLOAD_NORMAL, 3521 }; 3522 3523 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode) 3524 { 3525 struct qed_link_params link_params; 3526 int rc; 3527 3528 DP_INFO(edev, "Starting qede unload\n"); 3529 3530 qede_roce_dev_event_close(edev); 3531 mutex_lock(&edev->qede_lock); 3532 edev->state = QEDE_STATE_CLOSED; 3533 3534 /* Close OS Tx */ 3535 netif_tx_disable(edev->ndev); 3536 netif_carrier_off(edev->ndev); 3537 3538 /* Reset the link */ 3539 memset(&link_params, 0, sizeof(link_params)); 3540 link_params.link_up = false; 3541 edev->ops->common->set_link(edev->cdev, &link_params); 3542 rc = qede_stop_queues(edev); 3543 if (rc) { 3544 qede_sync_free_irqs(edev); 3545 goto out; 3546 } 3547 3548 DP_INFO(edev, "Stopped Queues\n"); 3549 3550 qede_vlan_mark_nonconfigured(edev); 3551 edev->ops->fastpath_stop(edev->cdev); 3552 3553 /* Release the interrupts */ 3554 qede_sync_free_irqs(edev); 3555 edev->ops->common->set_fp_int(edev->cdev, 0); 3556 3557 qede_napi_disable_remove(edev); 3558 3559 qede_free_mem_load(edev); 3560 qede_free_fp_array(edev); 3561 3562 out: 3563 mutex_unlock(&edev->qede_lock); 3564 DP_INFO(edev, "Ending qede unload\n"); 3565 } 3566 3567 enum qede_load_mode { 3568 QEDE_LOAD_NORMAL, 3569 QEDE_LOAD_RELOAD, 3570 }; 3571 3572 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode) 3573 { 3574 struct qed_link_params link_params; 3575 struct qed_link_output link_output; 3576 int rc; 3577 3578 DP_INFO(edev, "Starting qede load\n"); 3579 3580 rc = qede_set_num_queues(edev); 3581 if (rc) 3582 goto err0; 3583 3584 rc = qede_alloc_fp_array(edev); 3585 if (rc) 3586 goto err0; 3587 3588 qede_init_fp(edev); 3589 3590 rc = qede_alloc_mem_load(edev); 3591 if (rc) 3592 goto err1; 3593 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n", 3594 QEDE_QUEUE_CNT(edev), edev->num_tc); 3595 3596 rc = qede_set_real_num_queues(edev); 3597 if (rc) 3598 goto err2; 3599 3600 qede_napi_add_enable(edev); 3601 DP_INFO(edev, "Napi added and enabled\n"); 3602 3603 rc = qede_setup_irqs(edev); 3604 if (rc) 3605 goto err3; 3606 DP_INFO(edev, "Setup IRQs succeeded\n"); 3607 3608 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 3609 if (rc) 3610 goto err4; 3611 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 3612 3613 /* Add primary mac and set Rx filters */ 3614 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr); 3615 3616 mutex_lock(&edev->qede_lock); 3617 edev->state = QEDE_STATE_OPEN; 3618 mutex_unlock(&edev->qede_lock); 3619 3620 /* Program un-configured VLANs */ 3621 qede_configure_vlan_filters(edev); 3622 3623 /* Ask for link-up using current configuration */ 3624 memset(&link_params, 0, sizeof(link_params)); 3625 link_params.link_up = true; 3626 edev->ops->common->set_link(edev->cdev, &link_params); 3627 3628 /* Query whether link is already-up */ 3629 memset(&link_output, 0, sizeof(link_output)); 3630 edev->ops->common->get_link(edev->cdev, &link_output); 3631 qede_roce_dev_event_open(edev); 3632 qede_link_update(edev, &link_output); 3633 3634 DP_INFO(edev, "Ending successfully qede load\n"); 3635 3636 return 0; 3637 3638 err4: 3639 qede_sync_free_irqs(edev); 3640 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 3641 err3: 3642 qede_napi_disable_remove(edev); 3643 err2: 3644 qede_free_mem_load(edev); 3645 err1: 3646 edev->ops->common->set_fp_int(edev->cdev, 0); 3647 qede_free_fp_array(edev); 3648 edev->num_queues = 0; 3649 edev->fp_num_tx = 0; 3650 edev->fp_num_rx = 0; 3651 err0: 3652 return rc; 3653 } 3654 3655 void qede_reload(struct qede_dev *edev, 3656 void (*func)(struct qede_dev *, union qede_reload_args *), 3657 union qede_reload_args *args) 3658 { 3659 qede_unload(edev, QEDE_UNLOAD_NORMAL); 3660 /* Call function handler to update parameters 3661 * needed for function load. 3662 */ 3663 if (func) 3664 func(edev, args); 3665 3666 qede_load(edev, QEDE_LOAD_RELOAD); 3667 3668 mutex_lock(&edev->qede_lock); 3669 qede_config_rx_mode(edev->ndev); 3670 mutex_unlock(&edev->qede_lock); 3671 } 3672 3673 /* called with rtnl_lock */ 3674 static int qede_open(struct net_device *ndev) 3675 { 3676 struct qede_dev *edev = netdev_priv(ndev); 3677 int rc; 3678 3679 netif_carrier_off(ndev); 3680 3681 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 3682 3683 rc = qede_load(edev, QEDE_LOAD_NORMAL); 3684 3685 if (rc) 3686 return rc; 3687 3688 udp_tunnel_get_rx_info(ndev); 3689 3690 return 0; 3691 } 3692 3693 static int qede_close(struct net_device *ndev) 3694 { 3695 struct qede_dev *edev = netdev_priv(ndev); 3696 3697 qede_unload(edev, QEDE_UNLOAD_NORMAL); 3698 3699 return 0; 3700 } 3701 3702 static void qede_link_update(void *dev, struct qed_link_output *link) 3703 { 3704 struct qede_dev *edev = dev; 3705 3706 if (!netif_running(edev->ndev)) { 3707 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n"); 3708 return; 3709 } 3710 3711 if (link->link_up) { 3712 if (!netif_carrier_ok(edev->ndev)) { 3713 DP_NOTICE(edev, "Link is up\n"); 3714 netif_tx_start_all_queues(edev->ndev); 3715 netif_carrier_on(edev->ndev); 3716 } 3717 } else { 3718 if (netif_carrier_ok(edev->ndev)) { 3719 DP_NOTICE(edev, "Link is down\n"); 3720 netif_tx_disable(edev->ndev); 3721 netif_carrier_off(edev->ndev); 3722 } 3723 } 3724 } 3725 3726 static int qede_set_mac_addr(struct net_device *ndev, void *p) 3727 { 3728 struct qede_dev *edev = netdev_priv(ndev); 3729 struct sockaddr *addr = p; 3730 int rc; 3731 3732 ASSERT_RTNL(); /* @@@TBD To be removed */ 3733 3734 DP_INFO(edev, "Set_mac_addr called\n"); 3735 3736 if (!is_valid_ether_addr(addr->sa_data)) { 3737 DP_NOTICE(edev, "The MAC address is not valid\n"); 3738 return -EFAULT; 3739 } 3740 3741 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) { 3742 DP_NOTICE(edev, "qed prevents setting MAC\n"); 3743 return -EINVAL; 3744 } 3745 3746 ether_addr_copy(ndev->dev_addr, addr->sa_data); 3747 3748 if (!netif_running(ndev)) { 3749 DP_NOTICE(edev, "The device is currently down\n"); 3750 return 0; 3751 } 3752 3753 /* Remove the previous primary mac */ 3754 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, 3755 edev->primary_mac); 3756 if (rc) 3757 return rc; 3758 3759 /* Add MAC filter according to the new unicast HW MAC address */ 3760 ether_addr_copy(edev->primary_mac, ndev->dev_addr); 3761 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, 3762 edev->primary_mac); 3763 } 3764 3765 static int 3766 qede_configure_mcast_filtering(struct net_device *ndev, 3767 enum qed_filter_rx_mode_type *accept_flags) 3768 { 3769 struct qede_dev *edev = netdev_priv(ndev); 3770 unsigned char *mc_macs, *temp; 3771 struct netdev_hw_addr *ha; 3772 int rc = 0, mc_count; 3773 size_t size; 3774 3775 size = 64 * ETH_ALEN; 3776 3777 mc_macs = kzalloc(size, GFP_KERNEL); 3778 if (!mc_macs) { 3779 DP_NOTICE(edev, 3780 "Failed to allocate memory for multicast MACs\n"); 3781 rc = -ENOMEM; 3782 goto exit; 3783 } 3784 3785 temp = mc_macs; 3786 3787 /* Remove all previously configured MAC filters */ 3788 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, 3789 mc_macs, 1); 3790 if (rc) 3791 goto exit; 3792 3793 netif_addr_lock_bh(ndev); 3794 3795 mc_count = netdev_mc_count(ndev); 3796 if (mc_count < 64) { 3797 netdev_for_each_mc_addr(ha, ndev) { 3798 ether_addr_copy(temp, ha->addr); 3799 temp += ETH_ALEN; 3800 } 3801 } 3802 3803 netif_addr_unlock_bh(ndev); 3804 3805 /* Check for all multicast @@@TBD resource allocation */ 3806 if ((ndev->flags & IFF_ALLMULTI) || 3807 (mc_count > 64)) { 3808 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR) 3809 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC; 3810 } else { 3811 /* Add all multicast MAC filters */ 3812 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, 3813 mc_macs, mc_count); 3814 } 3815 3816 exit: 3817 kfree(mc_macs); 3818 return rc; 3819 } 3820 3821 static void qede_set_rx_mode(struct net_device *ndev) 3822 { 3823 struct qede_dev *edev = netdev_priv(ndev); 3824 3825 DP_INFO(edev, "qede_set_rx_mode called\n"); 3826 3827 if (edev->state != QEDE_STATE_OPEN) { 3828 DP_INFO(edev, 3829 "qede_set_rx_mode called while interface is down\n"); 3830 } else { 3831 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags); 3832 schedule_delayed_work(&edev->sp_task, 0); 3833 } 3834 } 3835 3836 /* Must be called with qede_lock held */ 3837 static void qede_config_rx_mode(struct net_device *ndev) 3838 { 3839 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST; 3840 struct qede_dev *edev = netdev_priv(ndev); 3841 struct qed_filter_params rx_mode; 3842 unsigned char *uc_macs, *temp; 3843 struct netdev_hw_addr *ha; 3844 int rc, uc_count; 3845 size_t size; 3846 3847 netif_addr_lock_bh(ndev); 3848 3849 uc_count = netdev_uc_count(ndev); 3850 size = uc_count * ETH_ALEN; 3851 3852 uc_macs = kzalloc(size, GFP_ATOMIC); 3853 if (!uc_macs) { 3854 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n"); 3855 netif_addr_unlock_bh(ndev); 3856 return; 3857 } 3858 3859 temp = uc_macs; 3860 netdev_for_each_uc_addr(ha, ndev) { 3861 ether_addr_copy(temp, ha->addr); 3862 temp += ETH_ALEN; 3863 } 3864 3865 netif_addr_unlock_bh(ndev); 3866 3867 /* Configure the struct for the Rx mode */ 3868 memset(&rx_mode, 0, sizeof(struct qed_filter_params)); 3869 rx_mode.type = QED_FILTER_TYPE_RX_MODE; 3870 3871 /* Remove all previous unicast secondary macs and multicast macs 3872 * (configrue / leave the primary mac) 3873 */ 3874 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE, 3875 edev->primary_mac); 3876 if (rc) 3877 goto out; 3878 3879 /* Check for promiscuous */ 3880 if ((ndev->flags & IFF_PROMISC) || 3881 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */ 3882 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC; 3883 } else { 3884 /* Add MAC filters according to the unicast secondary macs */ 3885 int i; 3886 3887 temp = uc_macs; 3888 for (i = 0; i < uc_count; i++) { 3889 rc = qede_set_ucast_rx_mac(edev, 3890 QED_FILTER_XCAST_TYPE_ADD, 3891 temp); 3892 if (rc) 3893 goto out; 3894 3895 temp += ETH_ALEN; 3896 } 3897 3898 rc = qede_configure_mcast_filtering(ndev, &accept_flags); 3899 if (rc) 3900 goto out; 3901 } 3902 3903 /* take care of VLAN mode */ 3904 if (ndev->flags & IFF_PROMISC) { 3905 qede_config_accept_any_vlan(edev, true); 3906 } else if (!edev->non_configured_vlans) { 3907 /* It's possible that accept_any_vlan mode is set due to a 3908 * previous setting of IFF_PROMISC. If vlan credits are 3909 * sufficient, disable accept_any_vlan. 3910 */ 3911 qede_config_accept_any_vlan(edev, false); 3912 } 3913 3914 rx_mode.filter.accept_flags = accept_flags; 3915 edev->ops->filter_config(edev->cdev, &rx_mode); 3916 out: 3917 kfree(uc_macs); 3918 } 3919