1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/crash_dump.h> 8 #include <linux/module.h> 9 #include <linux/pci.h> 10 #include <linux/device.h> 11 #include <linux/netdevice.h> 12 #include <linux/etherdevice.h> 13 #include <linux/skbuff.h> 14 #include <linux/errno.h> 15 #include <linux/list.h> 16 #include <linux/string.h> 17 #include <linux/dma-mapping.h> 18 #include <linux/interrupt.h> 19 #include <asm/byteorder.h> 20 #include <asm/param.h> 21 #include <linux/io.h> 22 #include <linux/netdev_features.h> 23 #include <linux/udp.h> 24 #include <linux/tcp.h> 25 #include <net/udp_tunnel.h> 26 #include <linux/ip.h> 27 #include <net/ipv6.h> 28 #include <net/tcp.h> 29 #include <linux/if_ether.h> 30 #include <linux/if_vlan.h> 31 #include <linux/pkt_sched.h> 32 #include <linux/ethtool.h> 33 #include <linux/in.h> 34 #include <linux/random.h> 35 #include <net/ip6_checksum.h> 36 #include <linux/bitops.h> 37 #include <linux/vmalloc.h> 38 #include <linux/aer.h> 39 #include "qede.h" 40 #include "qede_ptp.h" 41 42 static char version[] = 43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 44 45 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 46 MODULE_LICENSE("GPL"); 47 MODULE_VERSION(DRV_MODULE_VERSION); 48 49 static uint debug; 50 module_param(debug, uint, 0); 51 MODULE_PARM_DESC(debug, " Default debug msglevel"); 52 53 static const struct qed_eth_ops *qed_ops; 54 55 #define CHIP_NUM_57980S_40 0x1634 56 #define CHIP_NUM_57980S_10 0x1666 57 #define CHIP_NUM_57980S_MF 0x1636 58 #define CHIP_NUM_57980S_100 0x1644 59 #define CHIP_NUM_57980S_50 0x1654 60 #define CHIP_NUM_57980S_25 0x1656 61 #define CHIP_NUM_57980S_IOV 0x1664 62 #define CHIP_NUM_AH 0x8070 63 #define CHIP_NUM_AH_IOV 0x8090 64 65 #ifndef PCI_DEVICE_ID_NX2_57980E 66 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 67 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 68 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 69 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 70 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 71 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 72 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 73 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 74 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 75 76 #endif 77 78 enum qede_pci_private { 79 QEDE_PRIVATE_PF, 80 QEDE_PRIVATE_VF 81 }; 82 83 static const struct pci_device_id qede_pci_tbl[] = { 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 90 #ifdef CONFIG_QED_SRIOV 91 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 92 #endif 93 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 94 #ifdef CONFIG_QED_SRIOV 95 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 96 #endif 97 { 0 } 98 }; 99 100 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 101 102 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 103 static pci_ers_result_t 104 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 105 106 #define TX_TIMEOUT (5 * HZ) 107 108 /* Utilize last protocol index for XDP */ 109 #define XDP_PI 11 110 111 static void qede_remove(struct pci_dev *pdev); 112 static void qede_shutdown(struct pci_dev *pdev); 113 static void qede_link_update(void *dev, struct qed_link_output *link); 114 static void qede_schedule_recovery_handler(void *dev); 115 static void qede_recovery_handler(struct qede_dev *edev); 116 static void qede_schedule_hw_err_handler(void *dev, 117 enum qed_hw_err_type err_type); 118 static void qede_get_eth_tlv_data(void *edev, void *data); 119 static void qede_get_generic_tlv_data(void *edev, 120 struct qed_generic_tlvs *data); 121 static void qede_generic_hw_err_handler(struct qede_dev *edev); 122 #ifdef CONFIG_QED_SRIOV 123 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 124 __be16 vlan_proto) 125 { 126 struct qede_dev *edev = netdev_priv(ndev); 127 128 if (vlan > 4095) { 129 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 130 return -EINVAL; 131 } 132 133 if (vlan_proto != htons(ETH_P_8021Q)) 134 return -EPROTONOSUPPORT; 135 136 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 137 vlan, vf); 138 139 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 140 } 141 142 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 143 { 144 struct qede_dev *edev = netdev_priv(ndev); 145 146 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx); 147 148 if (!is_valid_ether_addr(mac)) { 149 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 150 return -EINVAL; 151 } 152 153 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 154 } 155 156 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 157 { 158 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 159 struct qed_dev_info *qed_info = &edev->dev_info.common; 160 struct qed_update_vport_params *vport_params; 161 int rc; 162 163 vport_params = vzalloc(sizeof(*vport_params)); 164 if (!vport_params) 165 return -ENOMEM; 166 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 167 168 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 169 170 /* Enable/Disable Tx switching for PF */ 171 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 172 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 173 vport_params->vport_id = 0; 174 vport_params->update_tx_switching_flg = 1; 175 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 176 edev->ops->vport_update(edev->cdev, vport_params); 177 } 178 179 vfree(vport_params); 180 return rc; 181 } 182 #endif 183 184 static const struct pci_error_handlers qede_err_handler = { 185 .error_detected = qede_io_error_detected, 186 }; 187 188 static struct pci_driver qede_pci_driver = { 189 .name = "qede", 190 .id_table = qede_pci_tbl, 191 .probe = qede_probe, 192 .remove = qede_remove, 193 .shutdown = qede_shutdown, 194 #ifdef CONFIG_QED_SRIOV 195 .sriov_configure = qede_sriov_configure, 196 #endif 197 .err_handler = &qede_err_handler, 198 }; 199 200 static struct qed_eth_cb_ops qede_ll_ops = { 201 { 202 #ifdef CONFIG_RFS_ACCEL 203 .arfs_filter_op = qede_arfs_filter_op, 204 #endif 205 .link_update = qede_link_update, 206 .schedule_recovery_handler = qede_schedule_recovery_handler, 207 .schedule_hw_err_handler = qede_schedule_hw_err_handler, 208 .get_generic_tlv_data = qede_get_generic_tlv_data, 209 .get_protocol_tlv_data = qede_get_eth_tlv_data, 210 }, 211 .force_mac = qede_force_mac, 212 .ports_update = qede_udp_ports_update, 213 }; 214 215 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 216 void *ptr) 217 { 218 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 219 struct ethtool_drvinfo drvinfo; 220 struct qede_dev *edev; 221 222 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 223 goto done; 224 225 /* Check whether this is a qede device */ 226 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 227 goto done; 228 229 memset(&drvinfo, 0, sizeof(drvinfo)); 230 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 231 if (strcmp(drvinfo.driver, "qede")) 232 goto done; 233 edev = netdev_priv(ndev); 234 235 switch (event) { 236 case NETDEV_CHANGENAME: 237 /* Notify qed of the name change */ 238 if (!edev->ops || !edev->ops->common) 239 goto done; 240 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 241 break; 242 case NETDEV_CHANGEADDR: 243 edev = netdev_priv(ndev); 244 qede_rdma_event_changeaddr(edev); 245 break; 246 } 247 248 done: 249 return NOTIFY_DONE; 250 } 251 252 static struct notifier_block qede_netdev_notifier = { 253 .notifier_call = qede_netdev_event, 254 }; 255 256 static 257 int __init qede_init(void) 258 { 259 int ret; 260 261 pr_info("qede_init: %s\n", version); 262 263 qede_forced_speed_maps_init(); 264 265 qed_ops = qed_get_eth_ops(); 266 if (!qed_ops) { 267 pr_notice("Failed to get qed ethtool operations\n"); 268 return -EINVAL; 269 } 270 271 /* Must register notifier before pci ops, since we might miss 272 * interface rename after pci probe and netdev registration. 273 */ 274 ret = register_netdevice_notifier(&qede_netdev_notifier); 275 if (ret) { 276 pr_notice("Failed to register netdevice_notifier\n"); 277 qed_put_eth_ops(); 278 return -EINVAL; 279 } 280 281 ret = pci_register_driver(&qede_pci_driver); 282 if (ret) { 283 pr_notice("Failed to register driver\n"); 284 unregister_netdevice_notifier(&qede_netdev_notifier); 285 qed_put_eth_ops(); 286 return -EINVAL; 287 } 288 289 return 0; 290 } 291 292 static void __exit qede_cleanup(void) 293 { 294 if (debug & QED_LOG_INFO_MASK) 295 pr_info("qede_cleanup called\n"); 296 297 unregister_netdevice_notifier(&qede_netdev_notifier); 298 pci_unregister_driver(&qede_pci_driver); 299 qed_put_eth_ops(); 300 } 301 302 module_init(qede_init); 303 module_exit(qede_cleanup); 304 305 static int qede_open(struct net_device *ndev); 306 static int qede_close(struct net_device *ndev); 307 308 void qede_fill_by_demand_stats(struct qede_dev *edev) 309 { 310 struct qede_stats_common *p_common = &edev->stats.common; 311 struct qed_eth_stats stats; 312 313 edev->ops->get_vport_stats(edev->cdev, &stats); 314 315 p_common->no_buff_discards = stats.common.no_buff_discards; 316 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 317 p_common->ttl0_discard = stats.common.ttl0_discard; 318 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 319 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 320 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 321 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 322 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 323 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 324 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 325 p_common->mac_filter_discards = stats.common.mac_filter_discards; 326 p_common->gft_filter_drop = stats.common.gft_filter_drop; 327 328 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 329 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 330 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 331 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 332 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 333 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 334 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 335 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 336 p_common->coalesced_events = stats.common.tpa_coalesced_events; 337 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 338 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 339 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 340 341 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 342 p_common->rx_65_to_127_byte_packets = 343 stats.common.rx_65_to_127_byte_packets; 344 p_common->rx_128_to_255_byte_packets = 345 stats.common.rx_128_to_255_byte_packets; 346 p_common->rx_256_to_511_byte_packets = 347 stats.common.rx_256_to_511_byte_packets; 348 p_common->rx_512_to_1023_byte_packets = 349 stats.common.rx_512_to_1023_byte_packets; 350 p_common->rx_1024_to_1518_byte_packets = 351 stats.common.rx_1024_to_1518_byte_packets; 352 p_common->rx_crc_errors = stats.common.rx_crc_errors; 353 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 354 p_common->rx_pause_frames = stats.common.rx_pause_frames; 355 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 356 p_common->rx_align_errors = stats.common.rx_align_errors; 357 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 358 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 359 p_common->rx_jabbers = stats.common.rx_jabbers; 360 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 361 p_common->rx_fragments = stats.common.rx_fragments; 362 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 363 p_common->tx_65_to_127_byte_packets = 364 stats.common.tx_65_to_127_byte_packets; 365 p_common->tx_128_to_255_byte_packets = 366 stats.common.tx_128_to_255_byte_packets; 367 p_common->tx_256_to_511_byte_packets = 368 stats.common.tx_256_to_511_byte_packets; 369 p_common->tx_512_to_1023_byte_packets = 370 stats.common.tx_512_to_1023_byte_packets; 371 p_common->tx_1024_to_1518_byte_packets = 372 stats.common.tx_1024_to_1518_byte_packets; 373 p_common->tx_pause_frames = stats.common.tx_pause_frames; 374 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 375 p_common->brb_truncates = stats.common.brb_truncates; 376 p_common->brb_discards = stats.common.brb_discards; 377 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 378 p_common->link_change_count = stats.common.link_change_count; 379 p_common->ptp_skip_txts = edev->ptp_skip_txts; 380 381 if (QEDE_IS_BB(edev)) { 382 struct qede_stats_bb *p_bb = &edev->stats.bb; 383 384 p_bb->rx_1519_to_1522_byte_packets = 385 stats.bb.rx_1519_to_1522_byte_packets; 386 p_bb->rx_1519_to_2047_byte_packets = 387 stats.bb.rx_1519_to_2047_byte_packets; 388 p_bb->rx_2048_to_4095_byte_packets = 389 stats.bb.rx_2048_to_4095_byte_packets; 390 p_bb->rx_4096_to_9216_byte_packets = 391 stats.bb.rx_4096_to_9216_byte_packets; 392 p_bb->rx_9217_to_16383_byte_packets = 393 stats.bb.rx_9217_to_16383_byte_packets; 394 p_bb->tx_1519_to_2047_byte_packets = 395 stats.bb.tx_1519_to_2047_byte_packets; 396 p_bb->tx_2048_to_4095_byte_packets = 397 stats.bb.tx_2048_to_4095_byte_packets; 398 p_bb->tx_4096_to_9216_byte_packets = 399 stats.bb.tx_4096_to_9216_byte_packets; 400 p_bb->tx_9217_to_16383_byte_packets = 401 stats.bb.tx_9217_to_16383_byte_packets; 402 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 403 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 404 } else { 405 struct qede_stats_ah *p_ah = &edev->stats.ah; 406 407 p_ah->rx_1519_to_max_byte_packets = 408 stats.ah.rx_1519_to_max_byte_packets; 409 p_ah->tx_1519_to_max_byte_packets = 410 stats.ah.tx_1519_to_max_byte_packets; 411 } 412 } 413 414 static void qede_get_stats64(struct net_device *dev, 415 struct rtnl_link_stats64 *stats) 416 { 417 struct qede_dev *edev = netdev_priv(dev); 418 struct qede_stats_common *p_common; 419 420 qede_fill_by_demand_stats(edev); 421 p_common = &edev->stats.common; 422 423 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 424 p_common->rx_bcast_pkts; 425 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 426 p_common->tx_bcast_pkts; 427 428 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 429 p_common->rx_bcast_bytes; 430 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 431 p_common->tx_bcast_bytes; 432 433 stats->tx_errors = p_common->tx_err_drop_pkts; 434 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 435 436 stats->rx_fifo_errors = p_common->no_buff_discards; 437 438 if (QEDE_IS_BB(edev)) 439 stats->collisions = edev->stats.bb.tx_total_collisions; 440 stats->rx_crc_errors = p_common->rx_crc_errors; 441 stats->rx_frame_errors = p_common->rx_align_errors; 442 } 443 444 #ifdef CONFIG_QED_SRIOV 445 static int qede_get_vf_config(struct net_device *dev, int vfidx, 446 struct ifla_vf_info *ivi) 447 { 448 struct qede_dev *edev = netdev_priv(dev); 449 450 if (!edev->ops) 451 return -EINVAL; 452 453 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 454 } 455 456 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 457 int min_tx_rate, int max_tx_rate) 458 { 459 struct qede_dev *edev = netdev_priv(dev); 460 461 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 462 max_tx_rate); 463 } 464 465 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 466 { 467 struct qede_dev *edev = netdev_priv(dev); 468 469 if (!edev->ops) 470 return -EINVAL; 471 472 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 473 } 474 475 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 476 int link_state) 477 { 478 struct qede_dev *edev = netdev_priv(dev); 479 480 if (!edev->ops) 481 return -EINVAL; 482 483 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 484 } 485 486 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 487 { 488 struct qede_dev *edev = netdev_priv(dev); 489 490 if (!edev->ops) 491 return -EINVAL; 492 493 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 494 } 495 #endif 496 497 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 498 { 499 struct qede_dev *edev = netdev_priv(dev); 500 501 if (!netif_running(dev)) 502 return -EAGAIN; 503 504 switch (cmd) { 505 case SIOCSHWTSTAMP: 506 return qede_ptp_hw_ts(edev, ifr); 507 default: 508 DP_VERBOSE(edev, QED_MSG_DEBUG, 509 "default IOCTL cmd 0x%x\n", cmd); 510 return -EOPNOTSUPP; 511 } 512 513 return 0; 514 } 515 516 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq) 517 { 518 DP_NOTICE(edev, 519 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n", 520 txq->index, le16_to_cpu(*txq->hw_cons_ptr), 521 qed_chain_get_cons_idx(&txq->tx_pbl), 522 qed_chain_get_prod_idx(&txq->tx_pbl), 523 jiffies); 524 } 525 526 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue) 527 { 528 struct qede_dev *edev = netdev_priv(dev); 529 struct qede_tx_queue *txq; 530 int cos; 531 532 netif_carrier_off(dev); 533 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue); 534 535 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX)) 536 return; 537 538 for_each_cos_in_txq(edev, cos) { 539 txq = &edev->fp_array[txqueue].txq[cos]; 540 541 if (qed_chain_get_cons_idx(&txq->tx_pbl) != 542 qed_chain_get_prod_idx(&txq->tx_pbl)) 543 qede_tx_log_print(edev, txq); 544 } 545 546 if (IS_VF(edev)) 547 return; 548 549 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 550 edev->state == QEDE_STATE_RECOVERY) { 551 DP_INFO(edev, 552 "Avoid handling a Tx timeout while another HW error is being handled\n"); 553 return; 554 } 555 556 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags); 557 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 558 schedule_delayed_work(&edev->sp_task, 0); 559 } 560 561 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 562 { 563 struct qede_dev *edev = netdev_priv(ndev); 564 int cos, count, offset; 565 566 if (num_tc > edev->dev_info.num_tc) 567 return -EINVAL; 568 569 netdev_reset_tc(ndev); 570 netdev_set_num_tc(ndev, num_tc); 571 572 for_each_cos_in_txq(edev, cos) { 573 count = QEDE_TSS_COUNT(edev); 574 offset = cos * QEDE_TSS_COUNT(edev); 575 netdev_set_tc_queue(ndev, cos, count, offset); 576 } 577 578 return 0; 579 } 580 581 static int 582 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 583 __be16 proto) 584 { 585 switch (f->command) { 586 case FLOW_CLS_REPLACE: 587 return qede_add_tc_flower_fltr(edev, proto, f); 588 case FLOW_CLS_DESTROY: 589 return qede_delete_flow_filter(edev, f->cookie); 590 default: 591 return -EOPNOTSUPP; 592 } 593 } 594 595 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 596 void *cb_priv) 597 { 598 struct flow_cls_offload *f; 599 struct qede_dev *edev = cb_priv; 600 601 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 602 return -EOPNOTSUPP; 603 604 switch (type) { 605 case TC_SETUP_CLSFLOWER: 606 f = type_data; 607 return qede_set_flower(edev, f, f->common.protocol); 608 default: 609 return -EOPNOTSUPP; 610 } 611 } 612 613 static LIST_HEAD(qede_block_cb_list); 614 615 static int 616 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 617 void *type_data) 618 { 619 struct qede_dev *edev = netdev_priv(dev); 620 struct tc_mqprio_qopt *mqprio; 621 622 switch (type) { 623 case TC_SETUP_BLOCK: 624 return flow_block_cb_setup_simple(type_data, 625 &qede_block_cb_list, 626 qede_setup_tc_block_cb, 627 edev, edev, true); 628 case TC_SETUP_QDISC_MQPRIO: 629 mqprio = type_data; 630 631 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 632 return qede_setup_tc(dev, mqprio->num_tc); 633 default: 634 return -EOPNOTSUPP; 635 } 636 } 637 638 static const struct net_device_ops qede_netdev_ops = { 639 .ndo_open = qede_open, 640 .ndo_stop = qede_close, 641 .ndo_start_xmit = qede_start_xmit, 642 .ndo_select_queue = qede_select_queue, 643 .ndo_set_rx_mode = qede_set_rx_mode, 644 .ndo_set_mac_address = qede_set_mac_addr, 645 .ndo_validate_addr = eth_validate_addr, 646 .ndo_change_mtu = qede_change_mtu, 647 .ndo_do_ioctl = qede_ioctl, 648 .ndo_tx_timeout = qede_tx_timeout, 649 #ifdef CONFIG_QED_SRIOV 650 .ndo_set_vf_mac = qede_set_vf_mac, 651 .ndo_set_vf_vlan = qede_set_vf_vlan, 652 .ndo_set_vf_trust = qede_set_vf_trust, 653 #endif 654 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 655 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 656 .ndo_fix_features = qede_fix_features, 657 .ndo_set_features = qede_set_features, 658 .ndo_get_stats64 = qede_get_stats64, 659 #ifdef CONFIG_QED_SRIOV 660 .ndo_set_vf_link_state = qede_set_vf_link_state, 661 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 662 .ndo_get_vf_config = qede_get_vf_config, 663 .ndo_set_vf_rate = qede_set_vf_rate, 664 #endif 665 .ndo_features_check = qede_features_check, 666 .ndo_bpf = qede_xdp, 667 #ifdef CONFIG_RFS_ACCEL 668 .ndo_rx_flow_steer = qede_rx_flow_steer, 669 #endif 670 .ndo_xdp_xmit = qede_xdp_transmit, 671 .ndo_setup_tc = qede_setup_tc_offload, 672 }; 673 674 static const struct net_device_ops qede_netdev_vf_ops = { 675 .ndo_open = qede_open, 676 .ndo_stop = qede_close, 677 .ndo_start_xmit = qede_start_xmit, 678 .ndo_select_queue = qede_select_queue, 679 .ndo_set_rx_mode = qede_set_rx_mode, 680 .ndo_set_mac_address = qede_set_mac_addr, 681 .ndo_validate_addr = eth_validate_addr, 682 .ndo_change_mtu = qede_change_mtu, 683 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 684 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 685 .ndo_fix_features = qede_fix_features, 686 .ndo_set_features = qede_set_features, 687 .ndo_get_stats64 = qede_get_stats64, 688 .ndo_features_check = qede_features_check, 689 }; 690 691 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 692 .ndo_open = qede_open, 693 .ndo_stop = qede_close, 694 .ndo_start_xmit = qede_start_xmit, 695 .ndo_select_queue = qede_select_queue, 696 .ndo_set_rx_mode = qede_set_rx_mode, 697 .ndo_set_mac_address = qede_set_mac_addr, 698 .ndo_validate_addr = eth_validate_addr, 699 .ndo_change_mtu = qede_change_mtu, 700 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 701 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 702 .ndo_fix_features = qede_fix_features, 703 .ndo_set_features = qede_set_features, 704 .ndo_get_stats64 = qede_get_stats64, 705 .ndo_features_check = qede_features_check, 706 .ndo_bpf = qede_xdp, 707 .ndo_xdp_xmit = qede_xdp_transmit, 708 }; 709 710 /* ------------------------------------------------------------------------- 711 * START OF PROBE / REMOVE 712 * ------------------------------------------------------------------------- 713 */ 714 715 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 716 struct pci_dev *pdev, 717 struct qed_dev_eth_info *info, 718 u32 dp_module, u8 dp_level) 719 { 720 struct net_device *ndev; 721 struct qede_dev *edev; 722 723 ndev = alloc_etherdev_mqs(sizeof(*edev), 724 info->num_queues * info->num_tc, 725 info->num_queues); 726 if (!ndev) { 727 pr_err("etherdev allocation failed\n"); 728 return NULL; 729 } 730 731 edev = netdev_priv(ndev); 732 edev->ndev = ndev; 733 edev->cdev = cdev; 734 edev->pdev = pdev; 735 edev->dp_module = dp_module; 736 edev->dp_level = dp_level; 737 edev->ops = qed_ops; 738 739 if (is_kdump_kernel()) { 740 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN; 741 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN; 742 } else { 743 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 744 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 745 } 746 747 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 748 info->num_queues, info->num_queues); 749 750 SET_NETDEV_DEV(ndev, &pdev->dev); 751 752 memset(&edev->stats, 0, sizeof(edev->stats)); 753 memcpy(&edev->dev_info, info, sizeof(*info)); 754 755 /* As ethtool doesn't have the ability to show WoL behavior as 756 * 'default', if device supports it declare it's enabled. 757 */ 758 if (edev->dev_info.common.wol_support) 759 edev->wol_enabled = true; 760 761 INIT_LIST_HEAD(&edev->vlan_list); 762 763 return edev; 764 } 765 766 static void qede_init_ndev(struct qede_dev *edev) 767 { 768 struct net_device *ndev = edev->ndev; 769 struct pci_dev *pdev = edev->pdev; 770 bool udp_tunnel_enable = false; 771 netdev_features_t hw_features; 772 773 pci_set_drvdata(pdev, ndev); 774 775 ndev->mem_start = edev->dev_info.common.pci_mem_start; 776 ndev->base_addr = ndev->mem_start; 777 ndev->mem_end = edev->dev_info.common.pci_mem_end; 778 ndev->irq = edev->dev_info.common.pci_irq; 779 780 ndev->watchdog_timeo = TX_TIMEOUT; 781 782 if (IS_VF(edev)) { 783 if (edev->dev_info.xdp_supported) 784 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 785 else 786 ndev->netdev_ops = &qede_netdev_vf_ops; 787 } else { 788 ndev->netdev_ops = &qede_netdev_ops; 789 } 790 791 qede_set_ethtool_ops(ndev); 792 793 ndev->priv_flags |= IFF_UNICAST_FLT; 794 795 /* user-changeble features */ 796 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 797 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 798 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 799 800 if (edev->dev_info.common.b_arfs_capable) 801 hw_features |= NETIF_F_NTUPLE; 802 803 if (edev->dev_info.common.vxlan_enable || 804 edev->dev_info.common.geneve_enable) 805 udp_tunnel_enable = true; 806 807 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 808 hw_features |= NETIF_F_TSO_ECN; 809 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 810 NETIF_F_SG | NETIF_F_TSO | 811 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 812 NETIF_F_RXCSUM; 813 } 814 815 if (udp_tunnel_enable) { 816 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 817 NETIF_F_GSO_UDP_TUNNEL_CSUM); 818 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 819 NETIF_F_GSO_UDP_TUNNEL_CSUM); 820 821 qede_set_udp_tunnels(edev); 822 } 823 824 if (edev->dev_info.common.gre_enable) { 825 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 826 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 827 NETIF_F_GSO_GRE_CSUM); 828 } 829 830 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 831 NETIF_F_HIGHDMA; 832 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 833 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 834 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 835 836 ndev->hw_features = hw_features; 837 838 /* MTU range: 46 - 9600 */ 839 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 840 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 841 842 /* Set network device HW mac */ 843 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 844 845 ndev->mtu = edev->dev_info.common.mtu; 846 } 847 848 /* This function converts from 32b param to two params of level and module 849 * Input 32b decoding: 850 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 851 * 'happy' flow, e.g. memory allocation failed. 852 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 853 * and provide important parameters. 854 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 855 * module. VERBOSE prints are for tracking the specific flow in low level. 856 * 857 * Notice that the level should be that of the lowest required logs. 858 */ 859 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 860 { 861 *p_dp_level = QED_LEVEL_NOTICE; 862 *p_dp_module = 0; 863 864 if (debug & QED_LOG_VERBOSE_MASK) { 865 *p_dp_level = QED_LEVEL_VERBOSE; 866 *p_dp_module = (debug & 0x3FFFFFFF); 867 } else if (debug & QED_LOG_INFO_MASK) { 868 *p_dp_level = QED_LEVEL_INFO; 869 } else if (debug & QED_LOG_NOTICE_MASK) { 870 *p_dp_level = QED_LEVEL_NOTICE; 871 } 872 } 873 874 static void qede_free_fp_array(struct qede_dev *edev) 875 { 876 if (edev->fp_array) { 877 struct qede_fastpath *fp; 878 int i; 879 880 for_each_queue(i) { 881 fp = &edev->fp_array[i]; 882 883 kfree(fp->sb_info); 884 /* Handle mem alloc failure case where qede_init_fp 885 * didn't register xdp_rxq_info yet. 886 * Implicit only (fp->type & QEDE_FASTPATH_RX) 887 */ 888 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 889 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 890 kfree(fp->rxq); 891 kfree(fp->xdp_tx); 892 kfree(fp->txq); 893 } 894 kfree(edev->fp_array); 895 } 896 897 edev->num_queues = 0; 898 edev->fp_num_tx = 0; 899 edev->fp_num_rx = 0; 900 } 901 902 static int qede_alloc_fp_array(struct qede_dev *edev) 903 { 904 u8 fp_combined, fp_rx = edev->fp_num_rx; 905 struct qede_fastpath *fp; 906 void *mem; 907 int i; 908 909 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 910 sizeof(*edev->fp_array), GFP_KERNEL); 911 if (!edev->fp_array) { 912 DP_NOTICE(edev, "fp array allocation failed\n"); 913 goto err; 914 } 915 916 mem = krealloc(edev->coal_entry, QEDE_QUEUE_CNT(edev) * 917 sizeof(*edev->coal_entry), GFP_KERNEL); 918 if (!mem) { 919 DP_ERR(edev, "coalesce entry allocation failed\n"); 920 kfree(edev->coal_entry); 921 goto err; 922 } 923 edev->coal_entry = mem; 924 925 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 926 927 /* Allocate the FP elements for Rx queues followed by combined and then 928 * the Tx. This ordering should be maintained so that the respective 929 * queues (Rx or Tx) will be together in the fastpath array and the 930 * associated ids will be sequential. 931 */ 932 for_each_queue(i) { 933 fp = &edev->fp_array[i]; 934 935 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 936 if (!fp->sb_info) { 937 DP_NOTICE(edev, "sb info struct allocation failed\n"); 938 goto err; 939 } 940 941 if (fp_rx) { 942 fp->type = QEDE_FASTPATH_RX; 943 fp_rx--; 944 } else if (fp_combined) { 945 fp->type = QEDE_FASTPATH_COMBINED; 946 fp_combined--; 947 } else { 948 fp->type = QEDE_FASTPATH_TX; 949 } 950 951 if (fp->type & QEDE_FASTPATH_TX) { 952 fp->txq = kcalloc(edev->dev_info.num_tc, 953 sizeof(*fp->txq), GFP_KERNEL); 954 if (!fp->txq) 955 goto err; 956 } 957 958 if (fp->type & QEDE_FASTPATH_RX) { 959 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 960 if (!fp->rxq) 961 goto err; 962 963 if (edev->xdp_prog) { 964 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 965 GFP_KERNEL); 966 if (!fp->xdp_tx) 967 goto err; 968 fp->type |= QEDE_FASTPATH_XDP; 969 } 970 } 971 } 972 973 return 0; 974 err: 975 qede_free_fp_array(edev); 976 return -ENOMEM; 977 } 978 979 /* The qede lock is used to protect driver state change and driver flows that 980 * are not reentrant. 981 */ 982 void __qede_lock(struct qede_dev *edev) 983 { 984 mutex_lock(&edev->qede_lock); 985 } 986 987 void __qede_unlock(struct qede_dev *edev) 988 { 989 mutex_unlock(&edev->qede_lock); 990 } 991 992 /* This version of the lock should be used when acquiring the RTNL lock is also 993 * needed in addition to the internal qede lock. 994 */ 995 static void qede_lock(struct qede_dev *edev) 996 { 997 rtnl_lock(); 998 __qede_lock(edev); 999 } 1000 1001 static void qede_unlock(struct qede_dev *edev) 1002 { 1003 __qede_unlock(edev); 1004 rtnl_unlock(); 1005 } 1006 1007 static void qede_sp_task(struct work_struct *work) 1008 { 1009 struct qede_dev *edev = container_of(work, struct qede_dev, 1010 sp_task.work); 1011 1012 /* The locking scheme depends on the specific flag: 1013 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 1014 * ensure that ongoing flows are ended and new ones are not started. 1015 * In other cases - only the internal qede lock should be acquired. 1016 */ 1017 1018 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 1019 #ifdef CONFIG_QED_SRIOV 1020 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1021 * The recovery of the active VFs is currently not supported. 1022 */ 1023 if (pci_num_vf(edev->pdev)) 1024 qede_sriov_configure(edev->pdev, 0); 1025 #endif 1026 qede_lock(edev); 1027 qede_recovery_handler(edev); 1028 qede_unlock(edev); 1029 } 1030 1031 __qede_lock(edev); 1032 1033 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 1034 if (edev->state == QEDE_STATE_OPEN) 1035 qede_config_rx_mode(edev->ndev); 1036 1037 #ifdef CONFIG_RFS_ACCEL 1038 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1039 if (edev->state == QEDE_STATE_OPEN) 1040 qede_process_arfs_filters(edev, false); 1041 } 1042 #endif 1043 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags)) 1044 qede_generic_hw_err_handler(edev); 1045 __qede_unlock(edev); 1046 1047 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1048 #ifdef CONFIG_QED_SRIOV 1049 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1050 * The recovery of the active VFs is currently not supported. 1051 */ 1052 if (pci_num_vf(edev->pdev)) 1053 qede_sriov_configure(edev->pdev, 0); 1054 #endif 1055 edev->ops->common->recovery_process(edev->cdev); 1056 } 1057 } 1058 1059 static void qede_update_pf_params(struct qed_dev *cdev) 1060 { 1061 struct qed_pf_params pf_params; 1062 u16 num_cons; 1063 1064 /* 64 rx + 64 tx + 64 XDP */ 1065 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1066 1067 /* 1 rx + 1 xdp + max tx cos */ 1068 num_cons = QED_MIN_L2_CONS; 1069 1070 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1071 1072 /* Same for VFs - make sure they'll have sufficient connections 1073 * to support XDP Tx queues. 1074 */ 1075 pf_params.eth_pf_params.num_vf_cons = 48; 1076 1077 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1078 qed_ops->common->update_pf_params(cdev, &pf_params); 1079 } 1080 1081 #define QEDE_FW_VER_STR_SIZE 80 1082 1083 static void qede_log_probe(struct qede_dev *edev) 1084 { 1085 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1086 u8 buf[QEDE_FW_VER_STR_SIZE]; 1087 size_t left_size; 1088 1089 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1090 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1091 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1092 p_dev_info->fw_eng, 1093 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1094 QED_MFW_VERSION_3_OFFSET, 1095 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1096 QED_MFW_VERSION_2_OFFSET, 1097 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1098 QED_MFW_VERSION_1_OFFSET, 1099 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1100 QED_MFW_VERSION_0_OFFSET); 1101 1102 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1103 if (p_dev_info->mbi_version && left_size) 1104 snprintf(buf + strlen(buf), left_size, 1105 " [MBI %d.%d.%d]", 1106 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1107 QED_MBI_VERSION_2_OFFSET, 1108 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1109 QED_MBI_VERSION_1_OFFSET, 1110 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1111 QED_MBI_VERSION_0_OFFSET); 1112 1113 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1114 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1115 buf, edev->ndev->name); 1116 } 1117 1118 enum qede_probe_mode { 1119 QEDE_PROBE_NORMAL, 1120 QEDE_PROBE_RECOVERY, 1121 }; 1122 1123 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1124 bool is_vf, enum qede_probe_mode mode) 1125 { 1126 struct qed_probe_params probe_params; 1127 struct qed_slowpath_params sp_params; 1128 struct qed_dev_eth_info dev_info; 1129 struct qede_dev *edev; 1130 struct qed_dev *cdev; 1131 int rc; 1132 1133 if (unlikely(dp_level & QED_LEVEL_INFO)) 1134 pr_notice("Starting qede probe\n"); 1135 1136 memset(&probe_params, 0, sizeof(probe_params)); 1137 probe_params.protocol = QED_PROTOCOL_ETH; 1138 probe_params.dp_module = dp_module; 1139 probe_params.dp_level = dp_level; 1140 probe_params.is_vf = is_vf; 1141 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1142 cdev = qed_ops->common->probe(pdev, &probe_params); 1143 if (!cdev) { 1144 rc = -ENODEV; 1145 goto err0; 1146 } 1147 1148 qede_update_pf_params(cdev); 1149 1150 /* Start the Slowpath-process */ 1151 memset(&sp_params, 0, sizeof(sp_params)); 1152 sp_params.int_mode = QED_INT_MODE_MSIX; 1153 sp_params.drv_major = QEDE_MAJOR_VERSION; 1154 sp_params.drv_minor = QEDE_MINOR_VERSION; 1155 sp_params.drv_rev = QEDE_REVISION_VERSION; 1156 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 1157 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1158 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1159 if (rc) { 1160 pr_notice("Cannot start slowpath\n"); 1161 goto err1; 1162 } 1163 1164 /* Learn information crucial for qede to progress */ 1165 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1166 if (rc) 1167 goto err2; 1168 1169 if (mode != QEDE_PROBE_RECOVERY) { 1170 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1171 dp_level); 1172 if (!edev) { 1173 rc = -ENOMEM; 1174 goto err2; 1175 } 1176 1177 edev->devlink = qed_ops->common->devlink_register(cdev); 1178 if (IS_ERR(edev->devlink)) { 1179 DP_NOTICE(edev, "Cannot register devlink\n"); 1180 edev->devlink = NULL; 1181 /* Go on, we can live without devlink */ 1182 } 1183 } else { 1184 struct net_device *ndev = pci_get_drvdata(pdev); 1185 1186 edev = netdev_priv(ndev); 1187 1188 if (edev->devlink) { 1189 struct qed_devlink *qdl = devlink_priv(edev->devlink); 1190 1191 qdl->cdev = cdev; 1192 } 1193 edev->cdev = cdev; 1194 memset(&edev->stats, 0, sizeof(edev->stats)); 1195 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1196 } 1197 1198 if (is_vf) 1199 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1200 1201 qede_init_ndev(edev); 1202 1203 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1204 if (rc) 1205 goto err3; 1206 1207 if (mode != QEDE_PROBE_RECOVERY) { 1208 /* Prepare the lock prior to the registration of the netdev, 1209 * as once it's registered we might reach flows requiring it 1210 * [it's even possible to reach a flow needing it directly 1211 * from there, although it's unlikely]. 1212 */ 1213 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1214 mutex_init(&edev->qede_lock); 1215 1216 rc = register_netdev(edev->ndev); 1217 if (rc) { 1218 DP_NOTICE(edev, "Cannot register net-device\n"); 1219 goto err4; 1220 } 1221 } 1222 1223 edev->ops->common->set_name(cdev, edev->ndev->name); 1224 1225 /* PTP not supported on VFs */ 1226 if (!is_vf) 1227 qede_ptp_enable(edev); 1228 1229 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1230 1231 #ifdef CONFIG_DCB 1232 if (!IS_VF(edev)) 1233 qede_set_dcbnl_ops(edev->ndev); 1234 #endif 1235 1236 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1237 1238 qede_log_probe(edev); 1239 return 0; 1240 1241 err4: 1242 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1243 err3: 1244 if (mode != QEDE_PROBE_RECOVERY) 1245 free_netdev(edev->ndev); 1246 else 1247 edev->cdev = NULL; 1248 err2: 1249 qed_ops->common->slowpath_stop(cdev); 1250 err1: 1251 qed_ops->common->remove(cdev); 1252 err0: 1253 return rc; 1254 } 1255 1256 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1257 { 1258 bool is_vf = false; 1259 u32 dp_module = 0; 1260 u8 dp_level = 0; 1261 1262 switch ((enum qede_pci_private)id->driver_data) { 1263 case QEDE_PRIVATE_VF: 1264 if (debug & QED_LOG_VERBOSE_MASK) 1265 dev_err(&pdev->dev, "Probing a VF\n"); 1266 is_vf = true; 1267 break; 1268 default: 1269 if (debug & QED_LOG_VERBOSE_MASK) 1270 dev_err(&pdev->dev, "Probing a PF\n"); 1271 } 1272 1273 qede_config_debug(debug, &dp_module, &dp_level); 1274 1275 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1276 QEDE_PROBE_NORMAL); 1277 } 1278 1279 enum qede_remove_mode { 1280 QEDE_REMOVE_NORMAL, 1281 QEDE_REMOVE_RECOVERY, 1282 }; 1283 1284 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1285 { 1286 struct net_device *ndev = pci_get_drvdata(pdev); 1287 struct qede_dev *edev; 1288 struct qed_dev *cdev; 1289 1290 if (!ndev) { 1291 dev_info(&pdev->dev, "Device has already been removed\n"); 1292 return; 1293 } 1294 1295 edev = netdev_priv(ndev); 1296 cdev = edev->cdev; 1297 1298 DP_INFO(edev, "Starting qede_remove\n"); 1299 1300 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1301 1302 if (mode != QEDE_REMOVE_RECOVERY) { 1303 unregister_netdev(ndev); 1304 1305 cancel_delayed_work_sync(&edev->sp_task); 1306 1307 edev->ops->common->set_power_state(cdev, PCI_D0); 1308 1309 pci_set_drvdata(pdev, NULL); 1310 } 1311 1312 qede_ptp_disable(edev); 1313 1314 /* Use global ops since we've freed edev */ 1315 qed_ops->common->slowpath_stop(cdev); 1316 if (system_state == SYSTEM_POWER_OFF) 1317 return; 1318 1319 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) { 1320 qed_ops->common->devlink_unregister(edev->devlink); 1321 edev->devlink = NULL; 1322 } 1323 qed_ops->common->remove(cdev); 1324 edev->cdev = NULL; 1325 1326 /* Since this can happen out-of-sync with other flows, 1327 * don't release the netdevice until after slowpath stop 1328 * has been called to guarantee various other contexts 1329 * [e.g., QED register callbacks] won't break anything when 1330 * accessing the netdevice. 1331 */ 1332 if (mode != QEDE_REMOVE_RECOVERY) { 1333 kfree(edev->coal_entry); 1334 free_netdev(ndev); 1335 } 1336 1337 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1338 } 1339 1340 static void qede_remove(struct pci_dev *pdev) 1341 { 1342 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1343 } 1344 1345 static void qede_shutdown(struct pci_dev *pdev) 1346 { 1347 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1348 } 1349 1350 /* ------------------------------------------------------------------------- 1351 * START OF LOAD / UNLOAD 1352 * ------------------------------------------------------------------------- 1353 */ 1354 1355 static int qede_set_num_queues(struct qede_dev *edev) 1356 { 1357 int rc; 1358 u16 rss_num; 1359 1360 /* Setup queues according to possible resources*/ 1361 if (edev->req_queues) 1362 rss_num = edev->req_queues; 1363 else 1364 rss_num = netif_get_num_default_rss_queues() * 1365 edev->dev_info.common.num_hwfns; 1366 1367 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1368 1369 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1370 if (rc > 0) { 1371 /* Managed to request interrupts for our queues */ 1372 edev->num_queues = rc; 1373 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1374 QEDE_QUEUE_CNT(edev), rss_num); 1375 rc = 0; 1376 } 1377 1378 edev->fp_num_tx = edev->req_num_tx; 1379 edev->fp_num_rx = edev->req_num_rx; 1380 1381 return rc; 1382 } 1383 1384 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1385 u16 sb_id) 1386 { 1387 if (sb_info->sb_virt) { 1388 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1389 QED_SB_TYPE_L2_QUEUE); 1390 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1391 (void *)sb_info->sb_virt, sb_info->sb_phys); 1392 memset(sb_info, 0, sizeof(*sb_info)); 1393 } 1394 } 1395 1396 /* This function allocates fast-path status block memory */ 1397 static int qede_alloc_mem_sb(struct qede_dev *edev, 1398 struct qed_sb_info *sb_info, u16 sb_id) 1399 { 1400 struct status_block_e4 *sb_virt; 1401 dma_addr_t sb_phys; 1402 int rc; 1403 1404 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1405 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1406 if (!sb_virt) { 1407 DP_ERR(edev, "Status block allocation failed\n"); 1408 return -ENOMEM; 1409 } 1410 1411 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1412 sb_virt, sb_phys, sb_id, 1413 QED_SB_TYPE_L2_QUEUE); 1414 if (rc) { 1415 DP_ERR(edev, "Status block initialization failed\n"); 1416 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1417 sb_virt, sb_phys); 1418 return rc; 1419 } 1420 1421 return 0; 1422 } 1423 1424 static void qede_free_rx_buffers(struct qede_dev *edev, 1425 struct qede_rx_queue *rxq) 1426 { 1427 u16 i; 1428 1429 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1430 struct sw_rx_data *rx_buf; 1431 struct page *data; 1432 1433 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1434 data = rx_buf->data; 1435 1436 dma_unmap_page(&edev->pdev->dev, 1437 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1438 1439 rx_buf->data = NULL; 1440 __free_page(data); 1441 } 1442 } 1443 1444 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1445 { 1446 /* Free rx buffers */ 1447 qede_free_rx_buffers(edev, rxq); 1448 1449 /* Free the parallel SW ring */ 1450 kfree(rxq->sw_rx_ring); 1451 1452 /* Free the real RQ ring used by FW */ 1453 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1454 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1455 } 1456 1457 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1458 { 1459 int i; 1460 1461 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1462 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1463 1464 tpa_info->state = QEDE_AGG_STATE_NONE; 1465 } 1466 } 1467 1468 /* This function allocates all memory needed per Rx queue */ 1469 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1470 { 1471 struct qed_chain_init_params params = { 1472 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1473 .num_elems = RX_RING_SIZE, 1474 }; 1475 struct qed_dev *cdev = edev->cdev; 1476 int i, rc, size; 1477 1478 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1479 1480 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1481 1482 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1483 size = rxq->rx_headroom + 1484 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1485 1486 /* Make sure that the headroom and payload fit in a single page */ 1487 if (rxq->rx_buf_size + size > PAGE_SIZE) 1488 rxq->rx_buf_size = PAGE_SIZE - size; 1489 1490 /* Segment size to split a page in multiple equal parts, 1491 * unless XDP is used in which case we'd use the entire page. 1492 */ 1493 if (!edev->xdp_prog) { 1494 size = size + rxq->rx_buf_size; 1495 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1496 } else { 1497 rxq->rx_buf_seg_size = PAGE_SIZE; 1498 edev->ndev->features &= ~NETIF_F_GRO_HW; 1499 } 1500 1501 /* Allocate the parallel driver ring for Rx buffers */ 1502 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1503 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1504 if (!rxq->sw_rx_ring) { 1505 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1506 rc = -ENOMEM; 1507 goto err; 1508 } 1509 1510 /* Allocate FW Rx ring */ 1511 params.mode = QED_CHAIN_MODE_NEXT_PTR; 1512 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE; 1513 params.elem_size = sizeof(struct eth_rx_bd); 1514 1515 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms); 1516 if (rc) 1517 goto err; 1518 1519 /* Allocate FW completion ring */ 1520 params.mode = QED_CHAIN_MODE_PBL; 1521 params.intended_use = QED_CHAIN_USE_TO_CONSUME; 1522 params.elem_size = sizeof(union eth_rx_cqe); 1523 1524 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms); 1525 if (rc) 1526 goto err; 1527 1528 /* Allocate buffers for the Rx ring */ 1529 rxq->filled_buffers = 0; 1530 for (i = 0; i < rxq->num_rx_buffers; i++) { 1531 rc = qede_alloc_rx_buffer(rxq, false); 1532 if (rc) { 1533 DP_ERR(edev, 1534 "Rx buffers allocation failed at index %d\n", i); 1535 goto err; 1536 } 1537 } 1538 1539 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1540 if (!edev->gro_disable) 1541 qede_set_tpa_param(rxq); 1542 err: 1543 return rc; 1544 } 1545 1546 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1547 { 1548 /* Free the parallel SW ring */ 1549 if (txq->is_xdp) 1550 kfree(txq->sw_tx_ring.xdp); 1551 else 1552 kfree(txq->sw_tx_ring.skbs); 1553 1554 /* Free the real RQ ring used by FW */ 1555 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1556 } 1557 1558 /* This function allocates all memory needed per Tx queue */ 1559 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1560 { 1561 struct qed_chain_init_params params = { 1562 .mode = QED_CHAIN_MODE_PBL, 1563 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1564 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1565 .num_elems = edev->q_num_tx_buffers, 1566 .elem_size = sizeof(union eth_tx_bd_types), 1567 }; 1568 int size, rc; 1569 1570 txq->num_tx_buffers = edev->q_num_tx_buffers; 1571 1572 /* Allocate the parallel driver ring for Tx buffers */ 1573 if (txq->is_xdp) { 1574 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1575 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1576 if (!txq->sw_tx_ring.xdp) 1577 goto err; 1578 } else { 1579 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1580 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1581 if (!txq->sw_tx_ring.skbs) 1582 goto err; 1583 } 1584 1585 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms); 1586 if (rc) 1587 goto err; 1588 1589 return 0; 1590 1591 err: 1592 qede_free_mem_txq(edev, txq); 1593 return -ENOMEM; 1594 } 1595 1596 /* This function frees all memory of a single fp */ 1597 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1598 { 1599 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1600 1601 if (fp->type & QEDE_FASTPATH_RX) 1602 qede_free_mem_rxq(edev, fp->rxq); 1603 1604 if (fp->type & QEDE_FASTPATH_XDP) 1605 qede_free_mem_txq(edev, fp->xdp_tx); 1606 1607 if (fp->type & QEDE_FASTPATH_TX) { 1608 int cos; 1609 1610 for_each_cos_in_txq(edev, cos) 1611 qede_free_mem_txq(edev, &fp->txq[cos]); 1612 } 1613 } 1614 1615 /* This function allocates all memory needed for a single fp (i.e. an entity 1616 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1617 */ 1618 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1619 { 1620 int rc = 0; 1621 1622 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1623 if (rc) 1624 goto out; 1625 1626 if (fp->type & QEDE_FASTPATH_RX) { 1627 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1628 if (rc) 1629 goto out; 1630 } 1631 1632 if (fp->type & QEDE_FASTPATH_XDP) { 1633 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1634 if (rc) 1635 goto out; 1636 } 1637 1638 if (fp->type & QEDE_FASTPATH_TX) { 1639 int cos; 1640 1641 for_each_cos_in_txq(edev, cos) { 1642 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1643 if (rc) 1644 goto out; 1645 } 1646 } 1647 1648 out: 1649 return rc; 1650 } 1651 1652 static void qede_free_mem_load(struct qede_dev *edev) 1653 { 1654 int i; 1655 1656 for_each_queue(i) { 1657 struct qede_fastpath *fp = &edev->fp_array[i]; 1658 1659 qede_free_mem_fp(edev, fp); 1660 } 1661 } 1662 1663 /* This function allocates all qede memory at NIC load. */ 1664 static int qede_alloc_mem_load(struct qede_dev *edev) 1665 { 1666 int rc = 0, queue_id; 1667 1668 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1669 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1670 1671 rc = qede_alloc_mem_fp(edev, fp); 1672 if (rc) { 1673 DP_ERR(edev, 1674 "Failed to allocate memory for fastpath - rss id = %d\n", 1675 queue_id); 1676 qede_free_mem_load(edev); 1677 return rc; 1678 } 1679 } 1680 1681 return 0; 1682 } 1683 1684 static void qede_empty_tx_queue(struct qede_dev *edev, 1685 struct qede_tx_queue *txq) 1686 { 1687 unsigned int pkts_compl = 0, bytes_compl = 0; 1688 struct netdev_queue *netdev_txq; 1689 int rc, len = 0; 1690 1691 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1692 1693 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1694 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1695 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1696 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1697 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1698 qed_chain_get_prod_idx(&txq->tx_pbl)); 1699 1700 rc = qede_free_tx_pkt(edev, txq, &len); 1701 if (rc) { 1702 DP_NOTICE(edev, 1703 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1704 txq->index, 1705 qed_chain_get_cons_idx(&txq->tx_pbl), 1706 qed_chain_get_prod_idx(&txq->tx_pbl)); 1707 break; 1708 } 1709 1710 bytes_compl += len; 1711 pkts_compl++; 1712 txq->sw_tx_cons++; 1713 } 1714 1715 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1716 } 1717 1718 static void qede_empty_tx_queues(struct qede_dev *edev) 1719 { 1720 int i; 1721 1722 for_each_queue(i) 1723 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1724 int cos; 1725 1726 for_each_cos_in_txq(edev, cos) { 1727 struct qede_fastpath *fp; 1728 1729 fp = &edev->fp_array[i]; 1730 qede_empty_tx_queue(edev, 1731 &fp->txq[cos]); 1732 } 1733 } 1734 } 1735 1736 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1737 static void qede_init_fp(struct qede_dev *edev) 1738 { 1739 int queue_id, rxq_index = 0, txq_index = 0; 1740 struct qede_fastpath *fp; 1741 bool init_xdp = false; 1742 1743 for_each_queue(queue_id) { 1744 fp = &edev->fp_array[queue_id]; 1745 1746 fp->edev = edev; 1747 fp->id = queue_id; 1748 1749 if (fp->type & QEDE_FASTPATH_XDP) { 1750 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1751 rxq_index); 1752 fp->xdp_tx->is_xdp = 1; 1753 1754 spin_lock_init(&fp->xdp_tx->xdp_tx_lock); 1755 init_xdp = true; 1756 } 1757 1758 if (fp->type & QEDE_FASTPATH_RX) { 1759 fp->rxq->rxq_id = rxq_index++; 1760 1761 /* Determine how to map buffers for this queue */ 1762 if (fp->type & QEDE_FASTPATH_XDP) 1763 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1764 else 1765 fp->rxq->data_direction = DMA_FROM_DEVICE; 1766 fp->rxq->dev = &edev->pdev->dev; 1767 1768 /* Driver have no error path from here */ 1769 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1770 fp->rxq->rxq_id, 0) < 0); 1771 1772 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq, 1773 MEM_TYPE_PAGE_ORDER0, 1774 NULL)) { 1775 DP_NOTICE(edev, 1776 "Failed to register XDP memory model\n"); 1777 } 1778 } 1779 1780 if (fp->type & QEDE_FASTPATH_TX) { 1781 int cos; 1782 1783 for_each_cos_in_txq(edev, cos) { 1784 struct qede_tx_queue *txq = &fp->txq[cos]; 1785 u16 ndev_tx_id; 1786 1787 txq->cos = cos; 1788 txq->index = txq_index; 1789 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1790 txq->ndev_txq_id = ndev_tx_id; 1791 1792 if (edev->dev_info.is_legacy) 1793 txq->is_legacy = true; 1794 txq->dev = &edev->pdev->dev; 1795 } 1796 1797 txq_index++; 1798 } 1799 1800 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1801 edev->ndev->name, queue_id); 1802 } 1803 1804 if (init_xdp) { 1805 edev->total_xdp_queues = QEDE_RSS_COUNT(edev); 1806 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues); 1807 } 1808 } 1809 1810 static int qede_set_real_num_queues(struct qede_dev *edev) 1811 { 1812 int rc = 0; 1813 1814 rc = netif_set_real_num_tx_queues(edev->ndev, 1815 QEDE_TSS_COUNT(edev) * 1816 edev->dev_info.num_tc); 1817 if (rc) { 1818 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1819 return rc; 1820 } 1821 1822 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1823 if (rc) { 1824 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1825 return rc; 1826 } 1827 1828 return 0; 1829 } 1830 1831 static void qede_napi_disable_remove(struct qede_dev *edev) 1832 { 1833 int i; 1834 1835 for_each_queue(i) { 1836 napi_disable(&edev->fp_array[i].napi); 1837 1838 netif_napi_del(&edev->fp_array[i].napi); 1839 } 1840 } 1841 1842 static void qede_napi_add_enable(struct qede_dev *edev) 1843 { 1844 int i; 1845 1846 /* Add NAPI objects */ 1847 for_each_queue(i) { 1848 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1849 qede_poll, NAPI_POLL_WEIGHT); 1850 napi_enable(&edev->fp_array[i].napi); 1851 } 1852 } 1853 1854 static void qede_sync_free_irqs(struct qede_dev *edev) 1855 { 1856 int i; 1857 1858 for (i = 0; i < edev->int_info.used_cnt; i++) { 1859 if (edev->int_info.msix_cnt) { 1860 synchronize_irq(edev->int_info.msix[i].vector); 1861 free_irq(edev->int_info.msix[i].vector, 1862 &edev->fp_array[i]); 1863 } else { 1864 edev->ops->common->simd_handler_clean(edev->cdev, i); 1865 } 1866 } 1867 1868 edev->int_info.used_cnt = 0; 1869 } 1870 1871 static int qede_req_msix_irqs(struct qede_dev *edev) 1872 { 1873 int i, rc; 1874 1875 /* Sanitize number of interrupts == number of prepared RSS queues */ 1876 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1877 DP_ERR(edev, 1878 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1879 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1880 return -EINVAL; 1881 } 1882 1883 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1884 #ifdef CONFIG_RFS_ACCEL 1885 struct qede_fastpath *fp = &edev->fp_array[i]; 1886 1887 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1888 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1889 edev->int_info.msix[i].vector); 1890 if (rc) { 1891 DP_ERR(edev, "Failed to add CPU rmap\n"); 1892 qede_free_arfs(edev); 1893 } 1894 } 1895 #endif 1896 rc = request_irq(edev->int_info.msix[i].vector, 1897 qede_msix_fp_int, 0, edev->fp_array[i].name, 1898 &edev->fp_array[i]); 1899 if (rc) { 1900 DP_ERR(edev, "Request fp %d irq failed\n", i); 1901 qede_sync_free_irqs(edev); 1902 return rc; 1903 } 1904 DP_VERBOSE(edev, NETIF_MSG_INTR, 1905 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1906 edev->fp_array[i].name, i, 1907 &edev->fp_array[i]); 1908 edev->int_info.used_cnt++; 1909 } 1910 1911 return 0; 1912 } 1913 1914 static void qede_simd_fp_handler(void *cookie) 1915 { 1916 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1917 1918 napi_schedule_irqoff(&fp->napi); 1919 } 1920 1921 static int qede_setup_irqs(struct qede_dev *edev) 1922 { 1923 int i, rc = 0; 1924 1925 /* Learn Interrupt configuration */ 1926 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1927 if (rc) 1928 return rc; 1929 1930 if (edev->int_info.msix_cnt) { 1931 rc = qede_req_msix_irqs(edev); 1932 if (rc) 1933 return rc; 1934 edev->ndev->irq = edev->int_info.msix[0].vector; 1935 } else { 1936 const struct qed_common_ops *ops; 1937 1938 /* qed should learn receive the RSS ids and callbacks */ 1939 ops = edev->ops->common; 1940 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1941 ops->simd_handler_config(edev->cdev, 1942 &edev->fp_array[i], i, 1943 qede_simd_fp_handler); 1944 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1945 } 1946 return 0; 1947 } 1948 1949 static int qede_drain_txq(struct qede_dev *edev, 1950 struct qede_tx_queue *txq, bool allow_drain) 1951 { 1952 int rc, cnt = 1000; 1953 1954 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1955 if (!cnt) { 1956 if (allow_drain) { 1957 DP_NOTICE(edev, 1958 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1959 txq->index); 1960 rc = edev->ops->common->drain(edev->cdev); 1961 if (rc) 1962 return rc; 1963 return qede_drain_txq(edev, txq, false); 1964 } 1965 DP_NOTICE(edev, 1966 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1967 txq->index, txq->sw_tx_prod, 1968 txq->sw_tx_cons); 1969 return -ENODEV; 1970 } 1971 cnt--; 1972 usleep_range(1000, 2000); 1973 barrier(); 1974 } 1975 1976 /* FW finished processing, wait for HW to transmit all tx packets */ 1977 usleep_range(1000, 2000); 1978 1979 return 0; 1980 } 1981 1982 static int qede_stop_txq(struct qede_dev *edev, 1983 struct qede_tx_queue *txq, int rss_id) 1984 { 1985 /* delete doorbell from doorbell recovery mechanism */ 1986 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1987 &txq->tx_db); 1988 1989 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1990 } 1991 1992 static int qede_stop_queues(struct qede_dev *edev) 1993 { 1994 struct qed_update_vport_params *vport_update_params; 1995 struct qed_dev *cdev = edev->cdev; 1996 struct qede_fastpath *fp; 1997 int rc, i; 1998 1999 /* Disable the vport */ 2000 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2001 if (!vport_update_params) 2002 return -ENOMEM; 2003 2004 vport_update_params->vport_id = 0; 2005 vport_update_params->update_vport_active_flg = 1; 2006 vport_update_params->vport_active_flg = 0; 2007 vport_update_params->update_rss_flg = 0; 2008 2009 rc = edev->ops->vport_update(cdev, vport_update_params); 2010 vfree(vport_update_params); 2011 2012 if (rc) { 2013 DP_ERR(edev, "Failed to update vport\n"); 2014 return rc; 2015 } 2016 2017 /* Flush Tx queues. If needed, request drain from MCP */ 2018 for_each_queue(i) { 2019 fp = &edev->fp_array[i]; 2020 2021 if (fp->type & QEDE_FASTPATH_TX) { 2022 int cos; 2023 2024 for_each_cos_in_txq(edev, cos) { 2025 rc = qede_drain_txq(edev, &fp->txq[cos], true); 2026 if (rc) 2027 return rc; 2028 } 2029 } 2030 2031 if (fp->type & QEDE_FASTPATH_XDP) { 2032 rc = qede_drain_txq(edev, fp->xdp_tx, true); 2033 if (rc) 2034 return rc; 2035 } 2036 } 2037 2038 /* Stop all Queues in reverse order */ 2039 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 2040 fp = &edev->fp_array[i]; 2041 2042 /* Stop the Tx Queue(s) */ 2043 if (fp->type & QEDE_FASTPATH_TX) { 2044 int cos; 2045 2046 for_each_cos_in_txq(edev, cos) { 2047 rc = qede_stop_txq(edev, &fp->txq[cos], i); 2048 if (rc) 2049 return rc; 2050 } 2051 } 2052 2053 /* Stop the Rx Queue */ 2054 if (fp->type & QEDE_FASTPATH_RX) { 2055 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 2056 if (rc) { 2057 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 2058 return rc; 2059 } 2060 } 2061 2062 /* Stop the XDP forwarding queue */ 2063 if (fp->type & QEDE_FASTPATH_XDP) { 2064 rc = qede_stop_txq(edev, fp->xdp_tx, i); 2065 if (rc) 2066 return rc; 2067 2068 bpf_prog_put(fp->rxq->xdp_prog); 2069 } 2070 } 2071 2072 /* Stop the vport */ 2073 rc = edev->ops->vport_stop(cdev, 0); 2074 if (rc) 2075 DP_ERR(edev, "Failed to stop VPORT\n"); 2076 2077 return rc; 2078 } 2079 2080 static int qede_start_txq(struct qede_dev *edev, 2081 struct qede_fastpath *fp, 2082 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2083 { 2084 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2085 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2086 struct qed_queue_start_common_params params; 2087 struct qed_txq_start_ret_params ret_params; 2088 int rc; 2089 2090 memset(¶ms, 0, sizeof(params)); 2091 memset(&ret_params, 0, sizeof(ret_params)); 2092 2093 /* Let the XDP queue share the queue-zone with one of the regular txq. 2094 * We don't really care about its coalescing. 2095 */ 2096 if (txq->is_xdp) 2097 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2098 else 2099 params.queue_id = txq->index; 2100 2101 params.p_sb = fp->sb_info; 2102 params.sb_idx = sb_idx; 2103 params.tc = txq->cos; 2104 2105 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2106 page_cnt, &ret_params); 2107 if (rc) { 2108 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2109 return rc; 2110 } 2111 2112 txq->doorbell_addr = ret_params.p_doorbell; 2113 txq->handle = ret_params.p_handle; 2114 2115 /* Determine the FW consumer address associated */ 2116 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2117 2118 /* Prepare the doorbell parameters */ 2119 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2120 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2121 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2122 DQ_XCM_ETH_TX_BD_PROD_CMD); 2123 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2124 2125 /* register doorbell with doorbell recovery mechanism */ 2126 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2127 &txq->tx_db, DB_REC_WIDTH_32B, 2128 DB_REC_KERNEL); 2129 2130 return rc; 2131 } 2132 2133 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2134 { 2135 int vlan_removal_en = 1; 2136 struct qed_dev *cdev = edev->cdev; 2137 struct qed_dev_info *qed_info = &edev->dev_info.common; 2138 struct qed_update_vport_params *vport_update_params; 2139 struct qed_queue_start_common_params q_params; 2140 struct qed_start_vport_params start = {0}; 2141 int rc, i; 2142 2143 if (!edev->num_queues) { 2144 DP_ERR(edev, 2145 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2146 return -EINVAL; 2147 } 2148 2149 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2150 if (!vport_update_params) 2151 return -ENOMEM; 2152 2153 start.handle_ptp_pkts = !!(edev->ptp); 2154 start.gro_enable = !edev->gro_disable; 2155 start.mtu = edev->ndev->mtu; 2156 start.vport_id = 0; 2157 start.drop_ttl0 = true; 2158 start.remove_inner_vlan = vlan_removal_en; 2159 start.clear_stats = clear_stats; 2160 2161 rc = edev->ops->vport_start(cdev, &start); 2162 2163 if (rc) { 2164 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2165 goto out; 2166 } 2167 2168 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2169 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2170 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2171 2172 for_each_queue(i) { 2173 struct qede_fastpath *fp = &edev->fp_array[i]; 2174 dma_addr_t p_phys_table; 2175 u32 page_cnt; 2176 2177 if (fp->type & QEDE_FASTPATH_RX) { 2178 struct qed_rxq_start_ret_params ret_params; 2179 struct qede_rx_queue *rxq = fp->rxq; 2180 __le16 *val; 2181 2182 memset(&ret_params, 0, sizeof(ret_params)); 2183 memset(&q_params, 0, sizeof(q_params)); 2184 q_params.queue_id = rxq->rxq_id; 2185 q_params.vport_id = 0; 2186 q_params.p_sb = fp->sb_info; 2187 q_params.sb_idx = RX_PI; 2188 2189 p_phys_table = 2190 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2191 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2192 2193 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2194 rxq->rx_buf_size, 2195 rxq->rx_bd_ring.p_phys_addr, 2196 p_phys_table, 2197 page_cnt, &ret_params); 2198 if (rc) { 2199 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2200 rc); 2201 goto out; 2202 } 2203 2204 /* Use the return parameters */ 2205 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2206 rxq->handle = ret_params.p_handle; 2207 2208 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2209 rxq->hw_cons_ptr = val; 2210 2211 qede_update_rx_prod(edev, rxq); 2212 } 2213 2214 if (fp->type & QEDE_FASTPATH_XDP) { 2215 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2216 if (rc) 2217 goto out; 2218 2219 bpf_prog_add(edev->xdp_prog, 1); 2220 fp->rxq->xdp_prog = edev->xdp_prog; 2221 } 2222 2223 if (fp->type & QEDE_FASTPATH_TX) { 2224 int cos; 2225 2226 for_each_cos_in_txq(edev, cos) { 2227 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2228 TX_PI(cos)); 2229 if (rc) 2230 goto out; 2231 } 2232 } 2233 } 2234 2235 /* Prepare and send the vport enable */ 2236 vport_update_params->vport_id = start.vport_id; 2237 vport_update_params->update_vport_active_flg = 1; 2238 vport_update_params->vport_active_flg = 1; 2239 2240 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2241 qed_info->tx_switching) { 2242 vport_update_params->update_tx_switching_flg = 1; 2243 vport_update_params->tx_switching_flg = 1; 2244 } 2245 2246 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2247 &vport_update_params->update_rss_flg); 2248 2249 rc = edev->ops->vport_update(cdev, vport_update_params); 2250 if (rc) 2251 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2252 2253 out: 2254 vfree(vport_update_params); 2255 return rc; 2256 } 2257 2258 enum qede_unload_mode { 2259 QEDE_UNLOAD_NORMAL, 2260 QEDE_UNLOAD_RECOVERY, 2261 }; 2262 2263 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2264 bool is_locked) 2265 { 2266 struct qed_link_params link_params; 2267 int rc; 2268 2269 DP_INFO(edev, "Starting qede unload\n"); 2270 2271 if (!is_locked) 2272 __qede_lock(edev); 2273 2274 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2275 2276 if (mode != QEDE_UNLOAD_RECOVERY) 2277 edev->state = QEDE_STATE_CLOSED; 2278 2279 qede_rdma_dev_event_close(edev); 2280 2281 /* Close OS Tx */ 2282 netif_tx_disable(edev->ndev); 2283 netif_carrier_off(edev->ndev); 2284 2285 if (mode != QEDE_UNLOAD_RECOVERY) { 2286 /* Reset the link */ 2287 memset(&link_params, 0, sizeof(link_params)); 2288 link_params.link_up = false; 2289 edev->ops->common->set_link(edev->cdev, &link_params); 2290 2291 rc = qede_stop_queues(edev); 2292 if (rc) { 2293 qede_sync_free_irqs(edev); 2294 goto out; 2295 } 2296 2297 DP_INFO(edev, "Stopped Queues\n"); 2298 } 2299 2300 qede_vlan_mark_nonconfigured(edev); 2301 edev->ops->fastpath_stop(edev->cdev); 2302 2303 if (edev->dev_info.common.b_arfs_capable) { 2304 qede_poll_for_freeing_arfs_filters(edev); 2305 qede_free_arfs(edev); 2306 } 2307 2308 /* Release the interrupts */ 2309 qede_sync_free_irqs(edev); 2310 edev->ops->common->set_fp_int(edev->cdev, 0); 2311 2312 qede_napi_disable_remove(edev); 2313 2314 if (mode == QEDE_UNLOAD_RECOVERY) 2315 qede_empty_tx_queues(edev); 2316 2317 qede_free_mem_load(edev); 2318 qede_free_fp_array(edev); 2319 2320 out: 2321 if (!is_locked) 2322 __qede_unlock(edev); 2323 2324 if (mode != QEDE_UNLOAD_RECOVERY) 2325 DP_NOTICE(edev, "Link is down\n"); 2326 2327 edev->ptp_skip_txts = 0; 2328 2329 DP_INFO(edev, "Ending qede unload\n"); 2330 } 2331 2332 enum qede_load_mode { 2333 QEDE_LOAD_NORMAL, 2334 QEDE_LOAD_RELOAD, 2335 QEDE_LOAD_RECOVERY, 2336 }; 2337 2338 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2339 bool is_locked) 2340 { 2341 struct qed_link_params link_params; 2342 struct ethtool_coalesce coal = {}; 2343 u8 num_tc; 2344 int rc, i; 2345 2346 DP_INFO(edev, "Starting qede load\n"); 2347 2348 if (!is_locked) 2349 __qede_lock(edev); 2350 2351 rc = qede_set_num_queues(edev); 2352 if (rc) 2353 goto out; 2354 2355 rc = qede_alloc_fp_array(edev); 2356 if (rc) 2357 goto out; 2358 2359 qede_init_fp(edev); 2360 2361 rc = qede_alloc_mem_load(edev); 2362 if (rc) 2363 goto err1; 2364 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2365 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2366 2367 rc = qede_set_real_num_queues(edev); 2368 if (rc) 2369 goto err2; 2370 2371 if (qede_alloc_arfs(edev)) { 2372 edev->ndev->features &= ~NETIF_F_NTUPLE; 2373 edev->dev_info.common.b_arfs_capable = false; 2374 } 2375 2376 qede_napi_add_enable(edev); 2377 DP_INFO(edev, "Napi added and enabled\n"); 2378 2379 rc = qede_setup_irqs(edev); 2380 if (rc) 2381 goto err3; 2382 DP_INFO(edev, "Setup IRQs succeeded\n"); 2383 2384 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2385 if (rc) 2386 goto err4; 2387 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2388 2389 num_tc = netdev_get_num_tc(edev->ndev); 2390 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2391 qede_setup_tc(edev->ndev, num_tc); 2392 2393 /* Program un-configured VLANs */ 2394 qede_configure_vlan_filters(edev); 2395 2396 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2397 2398 /* Ask for link-up using current configuration */ 2399 memset(&link_params, 0, sizeof(link_params)); 2400 link_params.link_up = true; 2401 edev->ops->common->set_link(edev->cdev, &link_params); 2402 2403 edev->state = QEDE_STATE_OPEN; 2404 2405 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS; 2406 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS; 2407 2408 for_each_queue(i) { 2409 if (edev->coal_entry[i].isvalid) { 2410 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc; 2411 coal.tx_coalesce_usecs = edev->coal_entry[i].txc; 2412 } 2413 __qede_unlock(edev); 2414 qede_set_per_coalesce(edev->ndev, i, &coal); 2415 __qede_lock(edev); 2416 } 2417 DP_INFO(edev, "Ending successfully qede load\n"); 2418 2419 goto out; 2420 err4: 2421 qede_sync_free_irqs(edev); 2422 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 2423 err3: 2424 qede_napi_disable_remove(edev); 2425 err2: 2426 qede_free_mem_load(edev); 2427 err1: 2428 edev->ops->common->set_fp_int(edev->cdev, 0); 2429 qede_free_fp_array(edev); 2430 edev->num_queues = 0; 2431 edev->fp_num_tx = 0; 2432 edev->fp_num_rx = 0; 2433 out: 2434 if (!is_locked) 2435 __qede_unlock(edev); 2436 2437 return rc; 2438 } 2439 2440 /* 'func' should be able to run between unload and reload assuming interface 2441 * is actually running, or afterwards in case it's currently DOWN. 2442 */ 2443 void qede_reload(struct qede_dev *edev, 2444 struct qede_reload_args *args, bool is_locked) 2445 { 2446 if (!is_locked) 2447 __qede_lock(edev); 2448 2449 /* Since qede_lock is held, internal state wouldn't change even 2450 * if netdev state would start transitioning. Check whether current 2451 * internal configuration indicates device is up, then reload. 2452 */ 2453 if (edev->state == QEDE_STATE_OPEN) { 2454 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2455 if (args) 2456 args->func(edev, args); 2457 qede_load(edev, QEDE_LOAD_RELOAD, true); 2458 2459 /* Since no one is going to do it for us, re-configure */ 2460 qede_config_rx_mode(edev->ndev); 2461 } else if (args) { 2462 args->func(edev, args); 2463 } 2464 2465 if (!is_locked) 2466 __qede_unlock(edev); 2467 } 2468 2469 /* called with rtnl_lock */ 2470 static int qede_open(struct net_device *ndev) 2471 { 2472 struct qede_dev *edev = netdev_priv(ndev); 2473 int rc; 2474 2475 netif_carrier_off(ndev); 2476 2477 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2478 2479 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2480 if (rc) 2481 return rc; 2482 2483 udp_tunnel_nic_reset_ntf(ndev); 2484 2485 edev->ops->common->update_drv_state(edev->cdev, true); 2486 2487 return 0; 2488 } 2489 2490 static int qede_close(struct net_device *ndev) 2491 { 2492 struct qede_dev *edev = netdev_priv(ndev); 2493 2494 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2495 2496 if (edev->cdev) 2497 edev->ops->common->update_drv_state(edev->cdev, false); 2498 2499 return 0; 2500 } 2501 2502 static void qede_link_update(void *dev, struct qed_link_output *link) 2503 { 2504 struct qede_dev *edev = dev; 2505 2506 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2507 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2508 return; 2509 } 2510 2511 if (link->link_up) { 2512 if (!netif_carrier_ok(edev->ndev)) { 2513 DP_NOTICE(edev, "Link is up\n"); 2514 netif_tx_start_all_queues(edev->ndev); 2515 netif_carrier_on(edev->ndev); 2516 qede_rdma_dev_event_open(edev); 2517 } 2518 } else { 2519 if (netif_carrier_ok(edev->ndev)) { 2520 DP_NOTICE(edev, "Link is down\n"); 2521 netif_tx_disable(edev->ndev); 2522 netif_carrier_off(edev->ndev); 2523 qede_rdma_dev_event_close(edev); 2524 } 2525 } 2526 } 2527 2528 static void qede_schedule_recovery_handler(void *dev) 2529 { 2530 struct qede_dev *edev = dev; 2531 2532 if (edev->state == QEDE_STATE_RECOVERY) { 2533 DP_NOTICE(edev, 2534 "Avoid scheduling a recovery handling since already in recovery state\n"); 2535 return; 2536 } 2537 2538 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2539 schedule_delayed_work(&edev->sp_task, 0); 2540 2541 DP_INFO(edev, "Scheduled a recovery handler\n"); 2542 } 2543 2544 static void qede_recovery_failed(struct qede_dev *edev) 2545 { 2546 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2547 2548 netif_device_detach(edev->ndev); 2549 2550 if (edev->cdev) 2551 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2552 } 2553 2554 static void qede_recovery_handler(struct qede_dev *edev) 2555 { 2556 u32 curr_state = edev->state; 2557 int rc; 2558 2559 DP_NOTICE(edev, "Starting a recovery process\n"); 2560 2561 /* No need to acquire first the qede_lock since is done by qede_sp_task 2562 * before calling this function. 2563 */ 2564 edev->state = QEDE_STATE_RECOVERY; 2565 2566 edev->ops->common->recovery_prolog(edev->cdev); 2567 2568 if (curr_state == QEDE_STATE_OPEN) 2569 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2570 2571 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2572 2573 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2574 IS_VF(edev), QEDE_PROBE_RECOVERY); 2575 if (rc) { 2576 edev->cdev = NULL; 2577 goto err; 2578 } 2579 2580 if (curr_state == QEDE_STATE_OPEN) { 2581 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2582 if (rc) 2583 goto err; 2584 2585 qede_config_rx_mode(edev->ndev); 2586 udp_tunnel_nic_reset_ntf(edev->ndev); 2587 } 2588 2589 edev->state = curr_state; 2590 2591 DP_NOTICE(edev, "Recovery handling is done\n"); 2592 2593 return; 2594 2595 err: 2596 qede_recovery_failed(edev); 2597 } 2598 2599 static void qede_atomic_hw_err_handler(struct qede_dev *edev) 2600 { 2601 struct qed_dev *cdev = edev->cdev; 2602 2603 DP_NOTICE(edev, 2604 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n", 2605 edev->err_flags); 2606 2607 /* Get a call trace of the flow that led to the error */ 2608 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags)); 2609 2610 /* Prevent HW attentions from being reasserted */ 2611 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags)) 2612 edev->ops->common->attn_clr_enable(cdev, true); 2613 2614 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n"); 2615 } 2616 2617 static void qede_generic_hw_err_handler(struct qede_dev *edev) 2618 { 2619 DP_NOTICE(edev, 2620 "Generic sleepable HW error handling started - err_flags 0x%lx\n", 2621 edev->err_flags); 2622 2623 if (edev->devlink) 2624 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type); 2625 2626 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2627 2628 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n"); 2629 } 2630 2631 static void qede_set_hw_err_flags(struct qede_dev *edev, 2632 enum qed_hw_err_type err_type) 2633 { 2634 unsigned long err_flags = 0; 2635 2636 switch (err_type) { 2637 case QED_HW_ERR_DMAE_FAIL: 2638 set_bit(QEDE_ERR_WARN, &err_flags); 2639 fallthrough; 2640 case QED_HW_ERR_MFW_RESP_FAIL: 2641 case QED_HW_ERR_HW_ATTN: 2642 case QED_HW_ERR_RAMROD_FAIL: 2643 case QED_HW_ERR_FW_ASSERT: 2644 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags); 2645 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags); 2646 break; 2647 2648 default: 2649 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type); 2650 break; 2651 } 2652 2653 edev->err_flags |= err_flags; 2654 } 2655 2656 static void qede_schedule_hw_err_handler(void *dev, 2657 enum qed_hw_err_type err_type) 2658 { 2659 struct qede_dev *edev = dev; 2660 2661 /* Fan failure cannot be masked by handling of another HW error or by a 2662 * concurrent recovery process. 2663 */ 2664 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 2665 edev->state == QEDE_STATE_RECOVERY) && 2666 err_type != QED_HW_ERR_FAN_FAIL) { 2667 DP_INFO(edev, 2668 "Avoid scheduling an error handling while another HW error is being handled\n"); 2669 return; 2670 } 2671 2672 if (err_type >= QED_HW_ERR_LAST) { 2673 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type); 2674 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2675 return; 2676 } 2677 2678 edev->last_err_type = err_type; 2679 qede_set_hw_err_flags(edev, err_type); 2680 qede_atomic_hw_err_handler(edev); 2681 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 2682 schedule_delayed_work(&edev->sp_task, 0); 2683 2684 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type); 2685 } 2686 2687 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2688 { 2689 struct netdev_queue *netdev_txq; 2690 2691 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2692 if (netif_xmit_stopped(netdev_txq)) 2693 return true; 2694 2695 return false; 2696 } 2697 2698 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2699 { 2700 struct qede_dev *edev = dev; 2701 struct netdev_hw_addr *ha; 2702 int i; 2703 2704 if (edev->ndev->features & NETIF_F_IP_CSUM) 2705 data->feat_flags |= QED_TLV_IP_CSUM; 2706 if (edev->ndev->features & NETIF_F_TSO) 2707 data->feat_flags |= QED_TLV_LSO; 2708 2709 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2710 eth_zero_addr(data->mac[1]); 2711 eth_zero_addr(data->mac[2]); 2712 /* Copy the first two UC macs */ 2713 netif_addr_lock_bh(edev->ndev); 2714 i = 1; 2715 netdev_for_each_uc_addr(ha, edev->ndev) { 2716 ether_addr_copy(data->mac[i++], ha->addr); 2717 if (i == QED_TLV_MAC_COUNT) 2718 break; 2719 } 2720 2721 netif_addr_unlock_bh(edev->ndev); 2722 } 2723 2724 static void qede_get_eth_tlv_data(void *dev, void *data) 2725 { 2726 struct qed_mfw_tlv_eth *etlv = data; 2727 struct qede_dev *edev = dev; 2728 struct qede_fastpath *fp; 2729 int i; 2730 2731 etlv->lso_maxoff_size = 0XFFFF; 2732 etlv->lso_maxoff_size_set = true; 2733 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2734 etlv->lso_minseg_size_set = true; 2735 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2736 etlv->prom_mode_set = true; 2737 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2738 etlv->tx_descr_size_set = true; 2739 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2740 etlv->rx_descr_size_set = true; 2741 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2742 etlv->iov_offload_set = true; 2743 2744 /* Fill information regarding queues; Should be done under the qede 2745 * lock to guarantee those don't change beneath our feet. 2746 */ 2747 etlv->txqs_empty = true; 2748 etlv->rxqs_empty = true; 2749 etlv->num_txqs_full = 0; 2750 etlv->num_rxqs_full = 0; 2751 2752 __qede_lock(edev); 2753 for_each_queue(i) { 2754 fp = &edev->fp_array[i]; 2755 if (fp->type & QEDE_FASTPATH_TX) { 2756 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2757 2758 if (txq->sw_tx_cons != txq->sw_tx_prod) 2759 etlv->txqs_empty = false; 2760 if (qede_is_txq_full(edev, txq)) 2761 etlv->num_txqs_full++; 2762 } 2763 if (fp->type & QEDE_FASTPATH_RX) { 2764 if (qede_has_rx_work(fp->rxq)) 2765 etlv->rxqs_empty = false; 2766 2767 /* This one is a bit tricky; Firmware might stop 2768 * placing packets if ring is not yet full. 2769 * Give an approximation. 2770 */ 2771 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2772 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2773 RX_RING_SIZE - 100) 2774 etlv->num_rxqs_full++; 2775 } 2776 } 2777 __qede_unlock(edev); 2778 2779 etlv->txqs_empty_set = true; 2780 etlv->rxqs_empty_set = true; 2781 etlv->num_txqs_full_set = true; 2782 etlv->num_rxqs_full_set = true; 2783 } 2784 2785 /** 2786 * qede_io_error_detected - called when PCI error is detected 2787 * @pdev: Pointer to PCI device 2788 * @state: The current pci connection state 2789 * 2790 * This function is called after a PCI bus error affecting 2791 * this device has been detected. 2792 */ 2793 static pci_ers_result_t 2794 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2795 { 2796 struct net_device *dev = pci_get_drvdata(pdev); 2797 struct qede_dev *edev = netdev_priv(dev); 2798 2799 if (!edev) 2800 return PCI_ERS_RESULT_NONE; 2801 2802 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2803 2804 __qede_lock(edev); 2805 if (edev->state == QEDE_STATE_RECOVERY) { 2806 DP_NOTICE(edev, "Device already in the recovery state\n"); 2807 __qede_unlock(edev); 2808 return PCI_ERS_RESULT_NONE; 2809 } 2810 2811 /* PF handles the recovery of its VFs */ 2812 if (IS_VF(edev)) { 2813 DP_VERBOSE(edev, QED_MSG_IOV, 2814 "VF recovery is handled by its PF\n"); 2815 __qede_unlock(edev); 2816 return PCI_ERS_RESULT_RECOVERED; 2817 } 2818 2819 /* Close OS Tx */ 2820 netif_tx_disable(edev->ndev); 2821 netif_carrier_off(edev->ndev); 2822 2823 set_bit(QEDE_SP_AER, &edev->sp_flags); 2824 schedule_delayed_work(&edev->sp_task, 0); 2825 2826 __qede_unlock(edev); 2827 2828 return PCI_ERS_RESULT_CAN_RECOVER; 2829 } 2830