1 /* QLogic qede NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
3 *
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
6 * this source tree.
7 */
8 
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/version.h>
12 #include <linux/device.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/errno.h>
17 #include <linux/list.h>
18 #include <linux/string.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/interrupt.h>
21 #include <asm/byteorder.h>
22 #include <asm/param.h>
23 #include <linux/io.h>
24 #include <linux/netdev_features.h>
25 #include <linux/udp.h>
26 #include <linux/tcp.h>
27 #ifdef CONFIG_QEDE_VXLAN
28 #include <net/vxlan.h>
29 #endif
30 #ifdef CONFIG_QEDE_GENEVE
31 #include <net/geneve.h>
32 #endif
33 #include <linux/ip.h>
34 #include <net/ipv6.h>
35 #include <net/tcp.h>
36 #include <linux/if_ether.h>
37 #include <linux/if_vlan.h>
38 #include <linux/pkt_sched.h>
39 #include <linux/ethtool.h>
40 #include <linux/in.h>
41 #include <linux/random.h>
42 #include <net/ip6_checksum.h>
43 #include <linux/bitops.h>
44 
45 #include "qede.h"
46 
47 static char version[] =
48 	"QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
49 
50 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
51 MODULE_LICENSE("GPL");
52 MODULE_VERSION(DRV_MODULE_VERSION);
53 
54 static uint debug;
55 module_param(debug, uint, 0);
56 MODULE_PARM_DESC(debug, " Default debug msglevel");
57 
58 static const struct qed_eth_ops *qed_ops;
59 
60 #define CHIP_NUM_57980S_40		0x1634
61 #define CHIP_NUM_57980S_10		0x1666
62 #define CHIP_NUM_57980S_MF		0x1636
63 #define CHIP_NUM_57980S_100		0x1644
64 #define CHIP_NUM_57980S_50		0x1654
65 #define CHIP_NUM_57980S_25		0x1656
66 #define CHIP_NUM_57980S_IOV		0x1664
67 
68 #ifndef PCI_DEVICE_ID_NX2_57980E
69 #define PCI_DEVICE_ID_57980S_40		CHIP_NUM_57980S_40
70 #define PCI_DEVICE_ID_57980S_10		CHIP_NUM_57980S_10
71 #define PCI_DEVICE_ID_57980S_MF		CHIP_NUM_57980S_MF
72 #define PCI_DEVICE_ID_57980S_100	CHIP_NUM_57980S_100
73 #define PCI_DEVICE_ID_57980S_50		CHIP_NUM_57980S_50
74 #define PCI_DEVICE_ID_57980S_25		CHIP_NUM_57980S_25
75 #define PCI_DEVICE_ID_57980S_IOV	CHIP_NUM_57980S_IOV
76 #endif
77 
78 enum qede_pci_private {
79 	QEDE_PRIVATE_PF,
80 	QEDE_PRIVATE_VF
81 };
82 
83 static const struct pci_device_id qede_pci_tbl[] = {
84 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
85 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
86 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
87 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
88 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
89 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
90 #ifdef CONFIG_QED_SRIOV
91 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
92 #endif
93 	{ 0 }
94 };
95 
96 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
97 
98 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
99 
100 #define TX_TIMEOUT		(5 * HZ)
101 
102 static void qede_remove(struct pci_dev *pdev);
103 static int qede_alloc_rx_buffer(struct qede_dev *edev,
104 				struct qede_rx_queue *rxq);
105 static void qede_link_update(void *dev, struct qed_link_output *link);
106 
107 #ifdef CONFIG_QED_SRIOV
108 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
109 {
110 	struct qede_dev *edev = netdev_priv(ndev);
111 
112 	if (vlan > 4095) {
113 		DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
114 		return -EINVAL;
115 	}
116 
117 	DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
118 		   vlan, vf);
119 
120 	return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
121 }
122 
123 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
124 {
125 	struct qede_dev *edev = netdev_priv(ndev);
126 
127 	DP_VERBOSE(edev, QED_MSG_IOV,
128 		   "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
129 		   mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
130 
131 	if (!is_valid_ether_addr(mac)) {
132 		DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
133 		return -EINVAL;
134 	}
135 
136 	return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
137 }
138 
139 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
140 {
141 	struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
142 	struct qed_dev_info *qed_info = &edev->dev_info.common;
143 	int rc;
144 
145 	DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
146 
147 	rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
148 
149 	/* Enable/Disable Tx switching for PF */
150 	if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
151 	    qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
152 		struct qed_update_vport_params params;
153 
154 		memset(&params, 0, sizeof(params));
155 		params.vport_id = 0;
156 		params.update_tx_switching_flg = 1;
157 		params.tx_switching_flg = num_vfs_param ? 1 : 0;
158 		edev->ops->vport_update(edev->cdev, &params);
159 	}
160 
161 	return rc;
162 }
163 #endif
164 
165 static struct pci_driver qede_pci_driver = {
166 	.name = "qede",
167 	.id_table = qede_pci_tbl,
168 	.probe = qede_probe,
169 	.remove = qede_remove,
170 #ifdef CONFIG_QED_SRIOV
171 	.sriov_configure = qede_sriov_configure,
172 #endif
173 };
174 
175 static void qede_force_mac(void *dev, u8 *mac)
176 {
177 	struct qede_dev *edev = dev;
178 
179 	ether_addr_copy(edev->ndev->dev_addr, mac);
180 	ether_addr_copy(edev->primary_mac, mac);
181 }
182 
183 static struct qed_eth_cb_ops qede_ll_ops = {
184 	{
185 		.link_update = qede_link_update,
186 	},
187 	.force_mac = qede_force_mac,
188 };
189 
190 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
191 			     void *ptr)
192 {
193 	struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
194 	struct ethtool_drvinfo drvinfo;
195 	struct qede_dev *edev;
196 
197 	/* Currently only support name change */
198 	if (event != NETDEV_CHANGENAME)
199 		goto done;
200 
201 	/* Check whether this is a qede device */
202 	if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
203 		goto done;
204 
205 	memset(&drvinfo, 0, sizeof(drvinfo));
206 	ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
207 	if (strcmp(drvinfo.driver, "qede"))
208 		goto done;
209 	edev = netdev_priv(ndev);
210 
211 	/* Notify qed of the name change */
212 	if (!edev->ops || !edev->ops->common)
213 		goto done;
214 	edev->ops->common->set_id(edev->cdev, edev->ndev->name,
215 				  "qede");
216 
217 done:
218 	return NOTIFY_DONE;
219 }
220 
221 static struct notifier_block qede_netdev_notifier = {
222 	.notifier_call = qede_netdev_event,
223 };
224 
225 static
226 int __init qede_init(void)
227 {
228 	int ret;
229 
230 	pr_notice("qede_init: %s\n", version);
231 
232 	qed_ops = qed_get_eth_ops();
233 	if (!qed_ops) {
234 		pr_notice("Failed to get qed ethtool operations\n");
235 		return -EINVAL;
236 	}
237 
238 	/* Must register notifier before pci ops, since we might miss
239 	 * interface rename after pci probe and netdev registeration.
240 	 */
241 	ret = register_netdevice_notifier(&qede_netdev_notifier);
242 	if (ret) {
243 		pr_notice("Failed to register netdevice_notifier\n");
244 		qed_put_eth_ops();
245 		return -EINVAL;
246 	}
247 
248 	ret = pci_register_driver(&qede_pci_driver);
249 	if (ret) {
250 		pr_notice("Failed to register driver\n");
251 		unregister_netdevice_notifier(&qede_netdev_notifier);
252 		qed_put_eth_ops();
253 		return -EINVAL;
254 	}
255 
256 	return 0;
257 }
258 
259 static void __exit qede_cleanup(void)
260 {
261 	pr_notice("qede_cleanup called\n");
262 
263 	unregister_netdevice_notifier(&qede_netdev_notifier);
264 	pci_unregister_driver(&qede_pci_driver);
265 	qed_put_eth_ops();
266 }
267 
268 module_init(qede_init);
269 module_exit(qede_cleanup);
270 
271 /* -------------------------------------------------------------------------
272  * START OF FAST-PATH
273  * -------------------------------------------------------------------------
274  */
275 
276 /* Unmap the data and free skb */
277 static int qede_free_tx_pkt(struct qede_dev *edev,
278 			    struct qede_tx_queue *txq,
279 			    int *len)
280 {
281 	u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
282 	struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
283 	struct eth_tx_1st_bd *first_bd;
284 	struct eth_tx_bd *tx_data_bd;
285 	int bds_consumed = 0;
286 	int nbds;
287 	bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
288 	int i, split_bd_len = 0;
289 
290 	if (unlikely(!skb)) {
291 		DP_ERR(edev,
292 		       "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
293 		       idx, txq->sw_tx_cons, txq->sw_tx_prod);
294 		return -1;
295 	}
296 
297 	*len = skb->len;
298 
299 	first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
300 
301 	bds_consumed++;
302 
303 	nbds = first_bd->data.nbds;
304 
305 	if (data_split) {
306 		struct eth_tx_bd *split = (struct eth_tx_bd *)
307 			qed_chain_consume(&txq->tx_pbl);
308 		split_bd_len = BD_UNMAP_LEN(split);
309 		bds_consumed++;
310 	}
311 	dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
312 		       BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
313 
314 	/* Unmap the data of the skb frags */
315 	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
316 		tx_data_bd = (struct eth_tx_bd *)
317 			qed_chain_consume(&txq->tx_pbl);
318 		dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
319 			       BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
320 	}
321 
322 	while (bds_consumed++ < nbds)
323 		qed_chain_consume(&txq->tx_pbl);
324 
325 	/* Free skb */
326 	dev_kfree_skb_any(skb);
327 	txq->sw_tx_ring[idx].skb = NULL;
328 	txq->sw_tx_ring[idx].flags = 0;
329 
330 	return 0;
331 }
332 
333 /* Unmap the data and free skb when mapping failed during start_xmit */
334 static void qede_free_failed_tx_pkt(struct qede_dev *edev,
335 				    struct qede_tx_queue *txq,
336 				    struct eth_tx_1st_bd *first_bd,
337 				    int nbd,
338 				    bool data_split)
339 {
340 	u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
341 	struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
342 	struct eth_tx_bd *tx_data_bd;
343 	int i, split_bd_len = 0;
344 
345 	/* Return prod to its position before this skb was handled */
346 	qed_chain_set_prod(&txq->tx_pbl,
347 			   le16_to_cpu(txq->tx_db.data.bd_prod),
348 			   first_bd);
349 
350 	first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
351 
352 	if (data_split) {
353 		struct eth_tx_bd *split = (struct eth_tx_bd *)
354 					  qed_chain_produce(&txq->tx_pbl);
355 		split_bd_len = BD_UNMAP_LEN(split);
356 		nbd--;
357 	}
358 
359 	dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
360 		       BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
361 
362 	/* Unmap the data of the skb frags */
363 	for (i = 0; i < nbd; i++) {
364 		tx_data_bd = (struct eth_tx_bd *)
365 			qed_chain_produce(&txq->tx_pbl);
366 		if (tx_data_bd->nbytes)
367 			dma_unmap_page(&edev->pdev->dev,
368 				       BD_UNMAP_ADDR(tx_data_bd),
369 				       BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
370 	}
371 
372 	/* Return again prod to its position before this skb was handled */
373 	qed_chain_set_prod(&txq->tx_pbl,
374 			   le16_to_cpu(txq->tx_db.data.bd_prod),
375 			   first_bd);
376 
377 	/* Free skb */
378 	dev_kfree_skb_any(skb);
379 	txq->sw_tx_ring[idx].skb = NULL;
380 	txq->sw_tx_ring[idx].flags = 0;
381 }
382 
383 static u32 qede_xmit_type(struct qede_dev *edev,
384 			  struct sk_buff *skb,
385 			  int *ipv6_ext)
386 {
387 	u32 rc = XMIT_L4_CSUM;
388 	__be16 l3_proto;
389 
390 	if (skb->ip_summed != CHECKSUM_PARTIAL)
391 		return XMIT_PLAIN;
392 
393 	l3_proto = vlan_get_protocol(skb);
394 	if (l3_proto == htons(ETH_P_IPV6) &&
395 	    (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
396 		*ipv6_ext = 1;
397 
398 	if (skb->encapsulation)
399 		rc |= XMIT_ENC;
400 
401 	if (skb_is_gso(skb))
402 		rc |= XMIT_LSO;
403 
404 	return rc;
405 }
406 
407 static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
408 					 struct eth_tx_2nd_bd *second_bd,
409 					 struct eth_tx_3rd_bd *third_bd)
410 {
411 	u8 l4_proto;
412 	u16 bd2_bits1 = 0, bd2_bits2 = 0;
413 
414 	bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
415 
416 	bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
417 		     ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
418 		    << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
419 
420 	bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
421 		      ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
422 
423 	if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
424 		l4_proto = ipv6_hdr(skb)->nexthdr;
425 	else
426 		l4_proto = ip_hdr(skb)->protocol;
427 
428 	if (l4_proto == IPPROTO_UDP)
429 		bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
430 
431 	if (third_bd)
432 		third_bd->data.bitfields |=
433 			cpu_to_le16(((tcp_hdrlen(skb) / 4) &
434 				ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
435 				ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
436 
437 	second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
438 	second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
439 }
440 
441 static int map_frag_to_bd(struct qede_dev *edev,
442 			  skb_frag_t *frag,
443 			  struct eth_tx_bd *bd)
444 {
445 	dma_addr_t mapping;
446 
447 	/* Map skb non-linear frag data for DMA */
448 	mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
449 				   skb_frag_size(frag),
450 				   DMA_TO_DEVICE);
451 	if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
452 		DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
453 		return -ENOMEM;
454 	}
455 
456 	/* Setup the data pointer of the frag data */
457 	BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
458 
459 	return 0;
460 }
461 
462 static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
463 {
464 	if (is_encap_pkt)
465 		return (skb_inner_transport_header(skb) +
466 			inner_tcp_hdrlen(skb) - skb->data);
467 	else
468 		return (skb_transport_header(skb) +
469 			tcp_hdrlen(skb) - skb->data);
470 }
471 
472 /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
473 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
474 static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
475 			     u8 xmit_type)
476 {
477 	int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
478 
479 	if (xmit_type & XMIT_LSO) {
480 		int hlen;
481 
482 		hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
483 
484 		/* linear payload would require its own BD */
485 		if (skb_headlen(skb) > hlen)
486 			allowed_frags--;
487 	}
488 
489 	return (skb_shinfo(skb)->nr_frags > allowed_frags);
490 }
491 #endif
492 
493 /* Main transmit function */
494 static
495 netdev_tx_t qede_start_xmit(struct sk_buff *skb,
496 			    struct net_device *ndev)
497 {
498 	struct qede_dev *edev = netdev_priv(ndev);
499 	struct netdev_queue *netdev_txq;
500 	struct qede_tx_queue *txq;
501 	struct eth_tx_1st_bd *first_bd;
502 	struct eth_tx_2nd_bd *second_bd = NULL;
503 	struct eth_tx_3rd_bd *third_bd = NULL;
504 	struct eth_tx_bd *tx_data_bd = NULL;
505 	u16 txq_index;
506 	u8 nbd = 0;
507 	dma_addr_t mapping;
508 	int rc, frag_idx = 0, ipv6_ext = 0;
509 	u8 xmit_type;
510 	u16 idx;
511 	u16 hlen;
512 	bool data_split = false;
513 
514 	/* Get tx-queue context and netdev index */
515 	txq_index = skb_get_queue_mapping(skb);
516 	WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
517 	txq = QEDE_TX_QUEUE(edev, txq_index);
518 	netdev_txq = netdev_get_tx_queue(ndev, txq_index);
519 
520 	WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
521 			       (MAX_SKB_FRAGS + 1));
522 
523 	xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
524 
525 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
526 	if (qede_pkt_req_lin(edev, skb, xmit_type)) {
527 		if (skb_linearize(skb)) {
528 			DP_NOTICE(edev,
529 				  "SKB linearization failed - silently dropping this SKB\n");
530 			dev_kfree_skb_any(skb);
531 			return NETDEV_TX_OK;
532 		}
533 	}
534 #endif
535 
536 	/* Fill the entry in the SW ring and the BDs in the FW ring */
537 	idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
538 	txq->sw_tx_ring[idx].skb = skb;
539 	first_bd = (struct eth_tx_1st_bd *)
540 		   qed_chain_produce(&txq->tx_pbl);
541 	memset(first_bd, 0, sizeof(*first_bd));
542 	first_bd->data.bd_flags.bitfields =
543 		1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
544 
545 	/* Map skb linear data for DMA and set in the first BD */
546 	mapping = dma_map_single(&edev->pdev->dev, skb->data,
547 				 skb_headlen(skb), DMA_TO_DEVICE);
548 	if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
549 		DP_NOTICE(edev, "SKB mapping failed\n");
550 		qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
551 		return NETDEV_TX_OK;
552 	}
553 	nbd++;
554 	BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
555 
556 	/* In case there is IPv6 with extension headers or LSO we need 2nd and
557 	 * 3rd BDs.
558 	 */
559 	if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
560 		second_bd = (struct eth_tx_2nd_bd *)
561 			qed_chain_produce(&txq->tx_pbl);
562 		memset(second_bd, 0, sizeof(*second_bd));
563 
564 		nbd++;
565 		third_bd = (struct eth_tx_3rd_bd *)
566 			qed_chain_produce(&txq->tx_pbl);
567 		memset(third_bd, 0, sizeof(*third_bd));
568 
569 		nbd++;
570 		/* We need to fill in additional data in second_bd... */
571 		tx_data_bd = (struct eth_tx_bd *)second_bd;
572 	}
573 
574 	if (skb_vlan_tag_present(skb)) {
575 		first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
576 		first_bd->data.bd_flags.bitfields |=
577 			1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
578 	}
579 
580 	/* Fill the parsing flags & params according to the requested offload */
581 	if (xmit_type & XMIT_L4_CSUM) {
582 		u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
583 
584 		/* We don't re-calculate IP checksum as it is already done by
585 		 * the upper stack
586 		 */
587 		first_bd->data.bd_flags.bitfields |=
588 			1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
589 
590 		if (xmit_type & XMIT_ENC) {
591 			first_bd->data.bd_flags.bitfields |=
592 				1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
593 		} else {
594 			/* In cases when OS doesn't indicate for inner offloads
595 			 * when packet is tunnelled, we need to override the HW
596 			 * tunnel configuration so that packets are treated as
597 			 * regular non tunnelled packets and no inner offloads
598 			 * are done by the hardware.
599 			 */
600 			first_bd->data.bitfields |= cpu_to_le16(temp);
601 		}
602 
603 		/* If the packet is IPv6 with extension header, indicate that
604 		 * to FW and pass few params, since the device cracker doesn't
605 		 * support parsing IPv6 with extension header/s.
606 		 */
607 		if (unlikely(ipv6_ext))
608 			qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
609 	}
610 
611 	if (xmit_type & XMIT_LSO) {
612 		first_bd->data.bd_flags.bitfields |=
613 			(1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
614 		third_bd->data.lso_mss =
615 			cpu_to_le16(skb_shinfo(skb)->gso_size);
616 
617 		if (unlikely(xmit_type & XMIT_ENC)) {
618 			first_bd->data.bd_flags.bitfields |=
619 				1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
620 			hlen = qede_get_skb_hlen(skb, true);
621 		} else {
622 			first_bd->data.bd_flags.bitfields |=
623 				1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
624 			hlen = qede_get_skb_hlen(skb, false);
625 		}
626 
627 		/* @@@TBD - if will not be removed need to check */
628 		third_bd->data.bitfields |=
629 			cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
630 
631 		/* Make life easier for FW guys who can't deal with header and
632 		 * data on same BD. If we need to split, use the second bd...
633 		 */
634 		if (unlikely(skb_headlen(skb) > hlen)) {
635 			DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
636 				   "TSO split header size is %d (%x:%x)\n",
637 				   first_bd->nbytes, first_bd->addr.hi,
638 				   first_bd->addr.lo);
639 
640 			mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
641 					   le32_to_cpu(first_bd->addr.lo)) +
642 					   hlen;
643 
644 			BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
645 					      le16_to_cpu(first_bd->nbytes) -
646 					      hlen);
647 
648 			/* this marks the BD as one that has no
649 			 * individual mapping
650 			 */
651 			txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
652 
653 			first_bd->nbytes = cpu_to_le16(hlen);
654 
655 			tx_data_bd = (struct eth_tx_bd *)third_bd;
656 			data_split = true;
657 		}
658 	}
659 
660 	/* Handle fragmented skb */
661 	/* special handle for frags inside 2nd and 3rd bds.. */
662 	while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
663 		rc = map_frag_to_bd(edev,
664 				    &skb_shinfo(skb)->frags[frag_idx],
665 				    tx_data_bd);
666 		if (rc) {
667 			qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
668 						data_split);
669 			return NETDEV_TX_OK;
670 		}
671 
672 		if (tx_data_bd == (struct eth_tx_bd *)second_bd)
673 			tx_data_bd = (struct eth_tx_bd *)third_bd;
674 		else
675 			tx_data_bd = NULL;
676 
677 		frag_idx++;
678 	}
679 
680 	/* map last frags into 4th, 5th .... */
681 	for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
682 		tx_data_bd = (struct eth_tx_bd *)
683 			     qed_chain_produce(&txq->tx_pbl);
684 
685 		memset(tx_data_bd, 0, sizeof(*tx_data_bd));
686 
687 		rc = map_frag_to_bd(edev,
688 				    &skb_shinfo(skb)->frags[frag_idx],
689 				    tx_data_bd);
690 		if (rc) {
691 			qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
692 						data_split);
693 			return NETDEV_TX_OK;
694 		}
695 	}
696 
697 	/* update the first BD with the actual num BDs */
698 	first_bd->data.nbds = nbd;
699 
700 	netdev_tx_sent_queue(netdev_txq, skb->len);
701 
702 	skb_tx_timestamp(skb);
703 
704 	/* Advance packet producer only before sending the packet since mapping
705 	 * of pages may fail.
706 	 */
707 	txq->sw_tx_prod++;
708 
709 	/* 'next page' entries are counted in the producer value */
710 	txq->tx_db.data.bd_prod =
711 		cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
712 
713 	/* wmb makes sure that the BDs data is updated before updating the
714 	 * producer, otherwise FW may read old data from the BDs.
715 	 */
716 	wmb();
717 	barrier();
718 	writel(txq->tx_db.raw, txq->doorbell_addr);
719 
720 	/* mmiowb is needed to synchronize doorbell writes from more than one
721 	 * processor. It guarantees that the write arrives to the device before
722 	 * the queue lock is released and another start_xmit is called (possibly
723 	 * on another CPU). Without this barrier, the next doorbell can bypass
724 	 * this doorbell. This is applicable to IA64/Altix systems.
725 	 */
726 	mmiowb();
727 
728 	if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
729 		      < (MAX_SKB_FRAGS + 1))) {
730 		netif_tx_stop_queue(netdev_txq);
731 		DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
732 			   "Stop queue was called\n");
733 		/* paired memory barrier is in qede_tx_int(), we have to keep
734 		 * ordering of set_bit() in netif_tx_stop_queue() and read of
735 		 * fp->bd_tx_cons
736 		 */
737 		smp_mb();
738 
739 		if (qed_chain_get_elem_left(&txq->tx_pbl)
740 		     >= (MAX_SKB_FRAGS + 1) &&
741 		    (edev->state == QEDE_STATE_OPEN)) {
742 			netif_tx_wake_queue(netdev_txq);
743 			DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
744 				   "Wake queue was called\n");
745 		}
746 	}
747 
748 	return NETDEV_TX_OK;
749 }
750 
751 int qede_txq_has_work(struct qede_tx_queue *txq)
752 {
753 	u16 hw_bd_cons;
754 
755 	/* Tell compiler that consumer and producer can change */
756 	barrier();
757 	hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
758 	if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
759 		return 0;
760 
761 	return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
762 }
763 
764 static int qede_tx_int(struct qede_dev *edev,
765 		       struct qede_tx_queue *txq)
766 {
767 	struct netdev_queue *netdev_txq;
768 	u16 hw_bd_cons;
769 	unsigned int pkts_compl = 0, bytes_compl = 0;
770 	int rc;
771 
772 	netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
773 
774 	hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
775 	barrier();
776 
777 	while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
778 		int len = 0;
779 
780 		rc = qede_free_tx_pkt(edev, txq, &len);
781 		if (rc) {
782 			DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
783 				  hw_bd_cons,
784 				  qed_chain_get_cons_idx(&txq->tx_pbl));
785 			break;
786 		}
787 
788 		bytes_compl += len;
789 		pkts_compl++;
790 		txq->sw_tx_cons++;
791 	}
792 
793 	netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
794 
795 	/* Need to make the tx_bd_cons update visible to start_xmit()
796 	 * before checking for netif_tx_queue_stopped().  Without the
797 	 * memory barrier, there is a small possibility that
798 	 * start_xmit() will miss it and cause the queue to be stopped
799 	 * forever.
800 	 * On the other hand we need an rmb() here to ensure the proper
801 	 * ordering of bit testing in the following
802 	 * netif_tx_queue_stopped(txq) call.
803 	 */
804 	smp_mb();
805 
806 	if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
807 		/* Taking tx_lock is needed to prevent reenabling the queue
808 		 * while it's empty. This could have happen if rx_action() gets
809 		 * suspended in qede_tx_int() after the condition before
810 		 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
811 		 *
812 		 * stops the queue->sees fresh tx_bd_cons->releases the queue->
813 		 * sends some packets consuming the whole queue again->
814 		 * stops the queue
815 		 */
816 
817 		__netif_tx_lock(netdev_txq, smp_processor_id());
818 
819 		if ((netif_tx_queue_stopped(netdev_txq)) &&
820 		    (edev->state == QEDE_STATE_OPEN) &&
821 		    (qed_chain_get_elem_left(&txq->tx_pbl)
822 		      >= (MAX_SKB_FRAGS + 1))) {
823 			netif_tx_wake_queue(netdev_txq);
824 			DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
825 				   "Wake queue was called\n");
826 		}
827 
828 		__netif_tx_unlock(netdev_txq);
829 	}
830 
831 	return 0;
832 }
833 
834 bool qede_has_rx_work(struct qede_rx_queue *rxq)
835 {
836 	u16 hw_comp_cons, sw_comp_cons;
837 
838 	/* Tell compiler that status block fields can change */
839 	barrier();
840 
841 	hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
842 	sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
843 
844 	return hw_comp_cons != sw_comp_cons;
845 }
846 
847 static bool qede_has_tx_work(struct qede_fastpath *fp)
848 {
849 	u8 tc;
850 
851 	for (tc = 0; tc < fp->edev->num_tc; tc++)
852 		if (qede_txq_has_work(&fp->txqs[tc]))
853 			return true;
854 	return false;
855 }
856 
857 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
858 {
859 	qed_chain_consume(&rxq->rx_bd_ring);
860 	rxq->sw_rx_cons++;
861 }
862 
863 /* This function reuses the buffer(from an offset) from
864  * consumer index to producer index in the bd ring
865  */
866 static inline void qede_reuse_page(struct qede_dev *edev,
867 				   struct qede_rx_queue *rxq,
868 				   struct sw_rx_data *curr_cons)
869 {
870 	struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
871 	struct sw_rx_data *curr_prod;
872 	dma_addr_t new_mapping;
873 
874 	curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
875 	*curr_prod = *curr_cons;
876 
877 	new_mapping = curr_prod->mapping + curr_prod->page_offset;
878 
879 	rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
880 	rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
881 
882 	rxq->sw_rx_prod++;
883 	curr_cons->data = NULL;
884 }
885 
886 /* In case of allocation failures reuse buffers
887  * from consumer index to produce buffers for firmware
888  */
889 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
890 			     struct qede_dev *edev, u8 count)
891 {
892 	struct sw_rx_data *curr_cons;
893 
894 	for (; count > 0; count--) {
895 		curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
896 		qede_reuse_page(edev, rxq, curr_cons);
897 		qede_rx_bd_ring_consume(rxq);
898 	}
899 }
900 
901 static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
902 					 struct qede_rx_queue *rxq,
903 					 struct sw_rx_data *curr_cons)
904 {
905 	/* Move to the next segment in the page */
906 	curr_cons->page_offset += rxq->rx_buf_seg_size;
907 
908 	if (curr_cons->page_offset == PAGE_SIZE) {
909 		if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
910 			/* Since we failed to allocate new buffer
911 			 * current buffer can be used again.
912 			 */
913 			curr_cons->page_offset -= rxq->rx_buf_seg_size;
914 
915 			return -ENOMEM;
916 		}
917 
918 		dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
919 			       PAGE_SIZE, DMA_FROM_DEVICE);
920 	} else {
921 		/* Increment refcount of the page as we don't want
922 		 * network stack to take the ownership of the page
923 		 * which can be recycled multiple times by the driver.
924 		 */
925 		page_ref_inc(curr_cons->data);
926 		qede_reuse_page(edev, rxq, curr_cons);
927 	}
928 
929 	return 0;
930 }
931 
932 static inline void qede_update_rx_prod(struct qede_dev *edev,
933 				       struct qede_rx_queue *rxq)
934 {
935 	u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
936 	u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
937 	struct eth_rx_prod_data rx_prods = {0};
938 
939 	/* Update producers */
940 	rx_prods.bd_prod = cpu_to_le16(bd_prod);
941 	rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
942 
943 	/* Make sure that the BD and SGE data is updated before updating the
944 	 * producers since FW might read the BD/SGE right after the producer
945 	 * is updated.
946 	 */
947 	wmb();
948 
949 	internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
950 			(u32 *)&rx_prods);
951 
952 	/* mmiowb is needed to synchronize doorbell writes from more than one
953 	 * processor. It guarantees that the write arrives to the device before
954 	 * the napi lock is released and another qede_poll is called (possibly
955 	 * on another CPU). Without this barrier, the next doorbell can bypass
956 	 * this doorbell. This is applicable to IA64/Altix systems.
957 	 */
958 	mmiowb();
959 }
960 
961 static u32 qede_get_rxhash(struct qede_dev *edev,
962 			   u8 bitfields,
963 			   __le32 rss_hash,
964 			   enum pkt_hash_types *rxhash_type)
965 {
966 	enum rss_hash_type htype;
967 
968 	htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
969 
970 	if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
971 		*rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
972 				(htype == RSS_HASH_TYPE_IPV6)) ?
973 				PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
974 		return le32_to_cpu(rss_hash);
975 	}
976 	*rxhash_type = PKT_HASH_TYPE_NONE;
977 	return 0;
978 }
979 
980 static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
981 {
982 	skb_checksum_none_assert(skb);
983 
984 	if (csum_flag & QEDE_CSUM_UNNECESSARY)
985 		skb->ip_summed = CHECKSUM_UNNECESSARY;
986 
987 	if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
988 		skb->csum_level = 1;
989 }
990 
991 static inline void qede_skb_receive(struct qede_dev *edev,
992 				    struct qede_fastpath *fp,
993 				    struct sk_buff *skb,
994 				    u16 vlan_tag)
995 {
996 	if (vlan_tag)
997 		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
998 				       vlan_tag);
999 
1000 	napi_gro_receive(&fp->napi, skb);
1001 }
1002 
1003 static void qede_set_gro_params(struct qede_dev *edev,
1004 				struct sk_buff *skb,
1005 				struct eth_fast_path_rx_tpa_start_cqe *cqe)
1006 {
1007 	u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1008 
1009 	if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1010 	    PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1011 		skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1012 	else
1013 		skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1014 
1015 	skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1016 					cqe->header_len;
1017 }
1018 
1019 static int qede_fill_frag_skb(struct qede_dev *edev,
1020 			      struct qede_rx_queue *rxq,
1021 			      u8 tpa_agg_index,
1022 			      u16 len_on_bd)
1023 {
1024 	struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1025 							 NUM_RX_BDS_MAX];
1026 	struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1027 	struct sk_buff *skb = tpa_info->skb;
1028 
1029 	if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1030 		goto out;
1031 
1032 	/* Add one frag and update the appropriate fields in the skb */
1033 	skb_fill_page_desc(skb, tpa_info->frag_id++,
1034 			   current_bd->data, current_bd->page_offset,
1035 			   len_on_bd);
1036 
1037 	if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
1038 		/* Incr page ref count to reuse on allocation failure
1039 		 * so that it doesn't get freed while freeing SKB.
1040 		 */
1041 		page_ref_inc(current_bd->data);
1042 		goto out;
1043 	}
1044 
1045 	qed_chain_consume(&rxq->rx_bd_ring);
1046 	rxq->sw_rx_cons++;
1047 
1048 	skb->data_len += len_on_bd;
1049 	skb->truesize += rxq->rx_buf_seg_size;
1050 	skb->len += len_on_bd;
1051 
1052 	return 0;
1053 
1054 out:
1055 	tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1056 	qede_recycle_rx_bd_ring(rxq, edev, 1);
1057 	return -ENOMEM;
1058 }
1059 
1060 static void qede_tpa_start(struct qede_dev *edev,
1061 			   struct qede_rx_queue *rxq,
1062 			   struct eth_fast_path_rx_tpa_start_cqe *cqe)
1063 {
1064 	struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1065 	struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1066 	struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1067 	struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1068 	dma_addr_t mapping = tpa_info->replace_buf_mapping;
1069 	struct sw_rx_data *sw_rx_data_cons;
1070 	struct sw_rx_data *sw_rx_data_prod;
1071 	enum pkt_hash_types rxhash_type;
1072 	u32 rxhash;
1073 
1074 	sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1075 	sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1076 
1077 	/* Use pre-allocated replacement buffer - we can't release the agg.
1078 	 * start until its over and we don't want to risk allocation failing
1079 	 * here, so re-allocate when aggregation will be over.
1080 	 */
1081 	sw_rx_data_prod->mapping = replace_buf->mapping;
1082 
1083 	sw_rx_data_prod->data = replace_buf->data;
1084 	rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1085 	rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1086 	sw_rx_data_prod->page_offset = replace_buf->page_offset;
1087 
1088 	rxq->sw_rx_prod++;
1089 
1090 	/* move partial skb from cons to pool (don't unmap yet)
1091 	 * save mapping, incase we drop the packet later on.
1092 	 */
1093 	tpa_info->start_buf = *sw_rx_data_cons;
1094 	mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1095 			   le32_to_cpu(rx_bd_cons->addr.lo));
1096 
1097 	tpa_info->start_buf_mapping = mapping;
1098 	rxq->sw_rx_cons++;
1099 
1100 	/* set tpa state to start only if we are able to allocate skb
1101 	 * for this aggregation, otherwise mark as error and aggregation will
1102 	 * be dropped
1103 	 */
1104 	tpa_info->skb = netdev_alloc_skb(edev->ndev,
1105 					 le16_to_cpu(cqe->len_on_first_bd));
1106 	if (unlikely(!tpa_info->skb)) {
1107 		DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
1108 		tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1109 		goto cons_buf;
1110 	}
1111 
1112 	skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1113 	memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1114 
1115 	/* Start filling in the aggregation info */
1116 	tpa_info->frag_id = 0;
1117 	tpa_info->agg_state = QEDE_AGG_STATE_START;
1118 
1119 	rxhash = qede_get_rxhash(edev, cqe->bitfields,
1120 				 cqe->rss_hash, &rxhash_type);
1121 	skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1122 	if ((le16_to_cpu(cqe->pars_flags.flags) >>
1123 	     PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1124 		    PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1125 		tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1126 	else
1127 		tpa_info->vlan_tag = 0;
1128 
1129 	/* This is needed in order to enable forwarding support */
1130 	qede_set_gro_params(edev, tpa_info->skb, cqe);
1131 
1132 cons_buf: /* We still need to handle bd_len_list to consume buffers */
1133 	if (likely(cqe->ext_bd_len_list[0]))
1134 		qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1135 				   le16_to_cpu(cqe->ext_bd_len_list[0]));
1136 
1137 	if (unlikely(cqe->ext_bd_len_list[1])) {
1138 		DP_ERR(edev,
1139 		       "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1140 		tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1141 	}
1142 }
1143 
1144 #ifdef CONFIG_INET
1145 static void qede_gro_ip_csum(struct sk_buff *skb)
1146 {
1147 	const struct iphdr *iph = ip_hdr(skb);
1148 	struct tcphdr *th;
1149 
1150 	skb_set_transport_header(skb, sizeof(struct iphdr));
1151 	th = tcp_hdr(skb);
1152 
1153 	th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1154 				  iph->saddr, iph->daddr, 0);
1155 
1156 	tcp_gro_complete(skb);
1157 }
1158 
1159 static void qede_gro_ipv6_csum(struct sk_buff *skb)
1160 {
1161 	struct ipv6hdr *iph = ipv6_hdr(skb);
1162 	struct tcphdr *th;
1163 
1164 	skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1165 	th = tcp_hdr(skb);
1166 
1167 	th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1168 				  &iph->saddr, &iph->daddr, 0);
1169 	tcp_gro_complete(skb);
1170 }
1171 #endif
1172 
1173 static void qede_gro_receive(struct qede_dev *edev,
1174 			     struct qede_fastpath *fp,
1175 			     struct sk_buff *skb,
1176 			     u16 vlan_tag)
1177 {
1178 	/* FW can send a single MTU sized packet from gro flow
1179 	 * due to aggregation timeout/last segment etc. which
1180 	 * is not expected to be a gro packet. If a skb has zero
1181 	 * frags then simply push it in the stack as non gso skb.
1182 	 */
1183 	if (unlikely(!skb->data_len)) {
1184 		skb_shinfo(skb)->gso_type = 0;
1185 		skb_shinfo(skb)->gso_size = 0;
1186 		goto send_skb;
1187 	}
1188 
1189 #ifdef CONFIG_INET
1190 	if (skb_shinfo(skb)->gso_size) {
1191 		skb_set_network_header(skb, 0);
1192 
1193 		switch (skb->protocol) {
1194 		case htons(ETH_P_IP):
1195 			qede_gro_ip_csum(skb);
1196 			break;
1197 		case htons(ETH_P_IPV6):
1198 			qede_gro_ipv6_csum(skb);
1199 			break;
1200 		default:
1201 			DP_ERR(edev,
1202 			       "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1203 			       ntohs(skb->protocol));
1204 		}
1205 	}
1206 #endif
1207 
1208 send_skb:
1209 	skb_record_rx_queue(skb, fp->rss_id);
1210 	qede_skb_receive(edev, fp, skb, vlan_tag);
1211 }
1212 
1213 static inline void qede_tpa_cont(struct qede_dev *edev,
1214 				 struct qede_rx_queue *rxq,
1215 				 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1216 {
1217 	int i;
1218 
1219 	for (i = 0; cqe->len_list[i]; i++)
1220 		qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1221 				   le16_to_cpu(cqe->len_list[i]));
1222 
1223 	if (unlikely(i > 1))
1224 		DP_ERR(edev,
1225 		       "Strange - TPA cont with more than a single len_list entry\n");
1226 }
1227 
1228 static void qede_tpa_end(struct qede_dev *edev,
1229 			 struct qede_fastpath *fp,
1230 			 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1231 {
1232 	struct qede_rx_queue *rxq = fp->rxq;
1233 	struct qede_agg_info *tpa_info;
1234 	struct sk_buff *skb;
1235 	int i;
1236 
1237 	tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1238 	skb = tpa_info->skb;
1239 
1240 	for (i = 0; cqe->len_list[i]; i++)
1241 		qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1242 				   le16_to_cpu(cqe->len_list[i]));
1243 	if (unlikely(i > 1))
1244 		DP_ERR(edev,
1245 		       "Strange - TPA emd with more than a single len_list entry\n");
1246 
1247 	if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1248 		goto err;
1249 
1250 	/* Sanity */
1251 	if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1252 		DP_ERR(edev,
1253 		       "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1254 		       cqe->num_of_bds, tpa_info->frag_id);
1255 	if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1256 		DP_ERR(edev,
1257 		       "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1258 		       le16_to_cpu(cqe->total_packet_len), skb->len);
1259 
1260 	memcpy(skb->data,
1261 	       page_address(tpa_info->start_buf.data) +
1262 		tpa_info->start_cqe.placement_offset +
1263 		tpa_info->start_buf.page_offset,
1264 	       le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1265 
1266 	/* Recycle [mapped] start buffer for the next replacement */
1267 	tpa_info->replace_buf = tpa_info->start_buf;
1268 	tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1269 
1270 	/* Finalize the SKB */
1271 	skb->protocol = eth_type_trans(skb, edev->ndev);
1272 	skb->ip_summed = CHECKSUM_UNNECESSARY;
1273 
1274 	/* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1275 	 * to skb_shinfo(skb)->gso_segs
1276 	 */
1277 	NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1278 
1279 	qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1280 
1281 	tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1282 
1283 	return;
1284 err:
1285 	/* The BD starting the aggregation is still mapped; Re-use it for
1286 	 * future aggregations [as replacement buffer]
1287 	 */
1288 	memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1289 	       sizeof(struct sw_rx_data));
1290 	tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1291 	tpa_info->start_buf.data = NULL;
1292 	tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1293 	dev_kfree_skb_any(tpa_info->skb);
1294 	tpa_info->skb = NULL;
1295 }
1296 
1297 static bool qede_tunn_exist(u16 flag)
1298 {
1299 	return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1300 			  PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1301 }
1302 
1303 static u8 qede_check_tunn_csum(u16 flag)
1304 {
1305 	u16 csum_flag = 0;
1306 	u8 tcsum = 0;
1307 
1308 	if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1309 		    PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1310 		csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1311 			     PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1312 
1313 	if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1314 		    PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1315 		csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1316 			     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1317 		tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1318 	}
1319 
1320 	csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1321 		     PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1322 		     PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1323 		     PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1324 
1325 	if (csum_flag & flag)
1326 		return QEDE_CSUM_ERROR;
1327 
1328 	return QEDE_CSUM_UNNECESSARY | tcsum;
1329 }
1330 
1331 static u8 qede_check_notunn_csum(u16 flag)
1332 {
1333 	u16 csum_flag = 0;
1334 	u8 csum = 0;
1335 
1336 	if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1337 		    PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1338 		csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1339 			     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1340 		csum = QEDE_CSUM_UNNECESSARY;
1341 	}
1342 
1343 	csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1344 		     PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1345 
1346 	if (csum_flag & flag)
1347 		return QEDE_CSUM_ERROR;
1348 
1349 	return csum;
1350 }
1351 
1352 static u8 qede_check_csum(u16 flag)
1353 {
1354 	if (!qede_tunn_exist(flag))
1355 		return qede_check_notunn_csum(flag);
1356 	else
1357 		return qede_check_tunn_csum(flag);
1358 }
1359 
1360 static int qede_rx_int(struct qede_fastpath *fp, int budget)
1361 {
1362 	struct qede_dev *edev = fp->edev;
1363 	struct qede_rx_queue *rxq = fp->rxq;
1364 
1365 	u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1366 	int rx_pkt = 0;
1367 	u8 csum_flag;
1368 
1369 	hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1370 	sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1371 
1372 	/* Memory barrier to prevent the CPU from doing speculative reads of CQE
1373 	 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1374 	 * read before it is written by FW, then FW writes CQE and SB, and then
1375 	 * the CPU reads the hw_comp_cons, it will use an old CQE.
1376 	 */
1377 	rmb();
1378 
1379 	/* Loop to complete all indicated BDs */
1380 	while (sw_comp_cons != hw_comp_cons) {
1381 		struct eth_fast_path_rx_reg_cqe *fp_cqe;
1382 		enum pkt_hash_types rxhash_type;
1383 		enum eth_rx_cqe_type cqe_type;
1384 		struct sw_rx_data *sw_rx_data;
1385 		union eth_rx_cqe *cqe;
1386 		struct sk_buff *skb;
1387 		struct page *data;
1388 		__le16 flags;
1389 		u16 len, pad;
1390 		u32 rx_hash;
1391 
1392 		/* Get the CQE from the completion ring */
1393 		cqe = (union eth_rx_cqe *)
1394 			qed_chain_consume(&rxq->rx_comp_ring);
1395 		cqe_type = cqe->fast_path_regular.type;
1396 
1397 		if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1398 			edev->ops->eth_cqe_completion(
1399 					edev->cdev, fp->rss_id,
1400 					(struct eth_slow_path_rx_cqe *)cqe);
1401 			goto next_cqe;
1402 		}
1403 
1404 		if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1405 			switch (cqe_type) {
1406 			case ETH_RX_CQE_TYPE_TPA_START:
1407 				qede_tpa_start(edev, rxq,
1408 					       &cqe->fast_path_tpa_start);
1409 				goto next_cqe;
1410 			case ETH_RX_CQE_TYPE_TPA_CONT:
1411 				qede_tpa_cont(edev, rxq,
1412 					      &cqe->fast_path_tpa_cont);
1413 				goto next_cqe;
1414 			case ETH_RX_CQE_TYPE_TPA_END:
1415 				qede_tpa_end(edev, fp,
1416 					     &cqe->fast_path_tpa_end);
1417 				goto next_rx_only;
1418 			default:
1419 				break;
1420 			}
1421 		}
1422 
1423 		/* Get the data from the SW ring */
1424 		sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1425 		sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1426 		data = sw_rx_data->data;
1427 
1428 		fp_cqe = &cqe->fast_path_regular;
1429 		len =  le16_to_cpu(fp_cqe->len_on_first_bd);
1430 		pad = fp_cqe->placement_offset;
1431 		flags = cqe->fast_path_regular.pars_flags.flags;
1432 
1433 		/* If this is an error packet then drop it */
1434 		parse_flag = le16_to_cpu(flags);
1435 
1436 		csum_flag = qede_check_csum(parse_flag);
1437 		if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1438 			DP_NOTICE(edev,
1439 				  "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1440 				  sw_comp_cons, parse_flag);
1441 			rxq->rx_hw_errors++;
1442 			qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1443 			goto next_cqe;
1444 		}
1445 
1446 		skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1447 		if (unlikely(!skb)) {
1448 			DP_NOTICE(edev,
1449 				  "Build_skb failed, dropping incoming packet\n");
1450 			qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1451 			rxq->rx_alloc_errors++;
1452 			goto next_cqe;
1453 		}
1454 
1455 		/* Copy data into SKB */
1456 		if (len + pad <= QEDE_RX_HDR_SIZE) {
1457 			memcpy(skb_put(skb, len),
1458 			       page_address(data) + pad +
1459 				sw_rx_data->page_offset, len);
1460 			qede_reuse_page(edev, rxq, sw_rx_data);
1461 		} else {
1462 			struct skb_frag_struct *frag;
1463 			unsigned int pull_len;
1464 			unsigned char *va;
1465 
1466 			frag = &skb_shinfo(skb)->frags[0];
1467 
1468 			skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1469 					pad + sw_rx_data->page_offset,
1470 					len, rxq->rx_buf_seg_size);
1471 
1472 			va = skb_frag_address(frag);
1473 			pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1474 
1475 			/* Align the pull_len to optimize memcpy */
1476 			memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1477 
1478 			skb_frag_size_sub(frag, pull_len);
1479 			frag->page_offset += pull_len;
1480 			skb->data_len -= pull_len;
1481 			skb->tail += pull_len;
1482 
1483 			if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1484 							    sw_rx_data))) {
1485 				DP_ERR(edev, "Failed to allocate rx buffer\n");
1486 				/* Incr page ref count to reuse on allocation
1487 				 * failure so that it doesn't get freed while
1488 				 * freeing SKB.
1489 				 */
1490 
1491 				page_ref_inc(sw_rx_data->data);
1492 				rxq->rx_alloc_errors++;
1493 				qede_recycle_rx_bd_ring(rxq, edev,
1494 							fp_cqe->bd_num);
1495 				dev_kfree_skb_any(skb);
1496 				goto next_cqe;
1497 			}
1498 		}
1499 
1500 		qede_rx_bd_ring_consume(rxq);
1501 
1502 		if (fp_cqe->bd_num != 1) {
1503 			u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1504 			u8 num_frags;
1505 
1506 			pkt_len -= len;
1507 
1508 			for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1509 			     num_frags--) {
1510 				u16 cur_size = pkt_len > rxq->rx_buf_size ?
1511 						rxq->rx_buf_size : pkt_len;
1512 				if (unlikely(!cur_size)) {
1513 					DP_ERR(edev,
1514 					       "Still got %d BDs for mapping jumbo, but length became 0\n",
1515 					       num_frags);
1516 					qede_recycle_rx_bd_ring(rxq, edev,
1517 								num_frags);
1518 					dev_kfree_skb_any(skb);
1519 					goto next_cqe;
1520 				}
1521 
1522 				if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1523 					qede_recycle_rx_bd_ring(rxq, edev,
1524 								num_frags);
1525 					dev_kfree_skb_any(skb);
1526 					goto next_cqe;
1527 				}
1528 
1529 				sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1530 				sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1531 				qede_rx_bd_ring_consume(rxq);
1532 
1533 				dma_unmap_page(&edev->pdev->dev,
1534 					       sw_rx_data->mapping,
1535 					       PAGE_SIZE, DMA_FROM_DEVICE);
1536 
1537 				skb_fill_page_desc(skb,
1538 						   skb_shinfo(skb)->nr_frags++,
1539 						   sw_rx_data->data, 0,
1540 						   cur_size);
1541 
1542 				skb->truesize += PAGE_SIZE;
1543 				skb->data_len += cur_size;
1544 				skb->len += cur_size;
1545 				pkt_len -= cur_size;
1546 			}
1547 
1548 			if (unlikely(pkt_len))
1549 				DP_ERR(edev,
1550 				       "Mapped all BDs of jumbo, but still have %d bytes\n",
1551 				       pkt_len);
1552 		}
1553 
1554 		skb->protocol = eth_type_trans(skb, edev->ndev);
1555 
1556 		rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1557 					  fp_cqe->rss_hash,
1558 					  &rxhash_type);
1559 
1560 		skb_set_hash(skb, rx_hash, rxhash_type);
1561 
1562 		qede_set_skb_csum(skb, csum_flag);
1563 
1564 		skb_record_rx_queue(skb, fp->rss_id);
1565 
1566 		qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1567 next_rx_only:
1568 		rx_pkt++;
1569 
1570 next_cqe: /* don't consume bd rx buffer */
1571 		qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1572 		sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1573 		/* CR TPA - revisit how to handle budget in TPA perhaps
1574 		 * increase on "end"
1575 		 */
1576 		if (rx_pkt == budget)
1577 			break;
1578 	} /* repeat while sw_comp_cons != hw_comp_cons... */
1579 
1580 	/* Update producers */
1581 	qede_update_rx_prod(edev, rxq);
1582 
1583 	return rx_pkt;
1584 }
1585 
1586 static int qede_poll(struct napi_struct *napi, int budget)
1587 {
1588 	int work_done = 0;
1589 	struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1590 						 napi);
1591 	struct qede_dev *edev = fp->edev;
1592 
1593 	while (1) {
1594 		u8 tc;
1595 
1596 		for (tc = 0; tc < edev->num_tc; tc++)
1597 			if (qede_txq_has_work(&fp->txqs[tc]))
1598 				qede_tx_int(edev, &fp->txqs[tc]);
1599 
1600 		if (qede_has_rx_work(fp->rxq)) {
1601 			work_done += qede_rx_int(fp, budget - work_done);
1602 
1603 			/* must not complete if we consumed full budget */
1604 			if (work_done >= budget)
1605 				break;
1606 		}
1607 
1608 		/* Fall out from the NAPI loop if needed */
1609 		if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1610 			qed_sb_update_sb_idx(fp->sb_info);
1611 			/* *_has_*_work() reads the status block,
1612 			 * thus we need to ensure that status block indices
1613 			 * have been actually read (qed_sb_update_sb_idx)
1614 			 * prior to this check (*_has_*_work) so that
1615 			 * we won't write the "newer" value of the status block
1616 			 * to HW (if there was a DMA right after
1617 			 * qede_has_rx_work and if there is no rmb, the memory
1618 			 * reading (qed_sb_update_sb_idx) may be postponed
1619 			 * to right before *_ack_sb). In this case there
1620 			 * will never be another interrupt until there is
1621 			 * another update of the status block, while there
1622 			 * is still unhandled work.
1623 			 */
1624 			rmb();
1625 
1626 			if (!(qede_has_rx_work(fp->rxq) ||
1627 			      qede_has_tx_work(fp))) {
1628 				napi_complete(napi);
1629 				/* Update and reenable interrupts */
1630 				qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1631 					   1 /*update*/);
1632 				break;
1633 			}
1634 		}
1635 	}
1636 
1637 	return work_done;
1638 }
1639 
1640 static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1641 {
1642 	struct qede_fastpath *fp = fp_cookie;
1643 
1644 	qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1645 
1646 	napi_schedule_irqoff(&fp->napi);
1647 	return IRQ_HANDLED;
1648 }
1649 
1650 /* -------------------------------------------------------------------------
1651  * END OF FAST-PATH
1652  * -------------------------------------------------------------------------
1653  */
1654 
1655 static int qede_open(struct net_device *ndev);
1656 static int qede_close(struct net_device *ndev);
1657 static int qede_set_mac_addr(struct net_device *ndev, void *p);
1658 static void qede_set_rx_mode(struct net_device *ndev);
1659 static void qede_config_rx_mode(struct net_device *ndev);
1660 
1661 static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1662 				 enum qed_filter_xcast_params_type opcode,
1663 				 unsigned char mac[ETH_ALEN])
1664 {
1665 	struct qed_filter_params filter_cmd;
1666 
1667 	memset(&filter_cmd, 0, sizeof(filter_cmd));
1668 	filter_cmd.type = QED_FILTER_TYPE_UCAST;
1669 	filter_cmd.filter.ucast.type = opcode;
1670 	filter_cmd.filter.ucast.mac_valid = 1;
1671 	ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1672 
1673 	return edev->ops->filter_config(edev->cdev, &filter_cmd);
1674 }
1675 
1676 static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1677 				  enum qed_filter_xcast_params_type opcode,
1678 				  u16 vid)
1679 {
1680 	struct qed_filter_params filter_cmd;
1681 
1682 	memset(&filter_cmd, 0, sizeof(filter_cmd));
1683 	filter_cmd.type = QED_FILTER_TYPE_UCAST;
1684 	filter_cmd.filter.ucast.type = opcode;
1685 	filter_cmd.filter.ucast.vlan_valid = 1;
1686 	filter_cmd.filter.ucast.vlan = vid;
1687 
1688 	return edev->ops->filter_config(edev->cdev, &filter_cmd);
1689 }
1690 
1691 void qede_fill_by_demand_stats(struct qede_dev *edev)
1692 {
1693 	struct qed_eth_stats stats;
1694 
1695 	edev->ops->get_vport_stats(edev->cdev, &stats);
1696 	edev->stats.no_buff_discards = stats.no_buff_discards;
1697 	edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1698 	edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1699 	edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1700 	edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1701 	edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1702 	edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1703 	edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1704 	edev->stats.mac_filter_discards = stats.mac_filter_discards;
1705 
1706 	edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1707 	edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1708 	edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1709 	edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1710 	edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1711 	edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1712 	edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1713 	edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1714 	edev->stats.coalesced_events = stats.tpa_coalesced_events;
1715 	edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1716 	edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1717 	edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1718 
1719 	edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1720 	edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1721 	edev->stats.rx_128_to_255_byte_packets =
1722 				stats.rx_128_to_255_byte_packets;
1723 	edev->stats.rx_256_to_511_byte_packets =
1724 				stats.rx_256_to_511_byte_packets;
1725 	edev->stats.rx_512_to_1023_byte_packets =
1726 				stats.rx_512_to_1023_byte_packets;
1727 	edev->stats.rx_1024_to_1518_byte_packets =
1728 				stats.rx_1024_to_1518_byte_packets;
1729 	edev->stats.rx_1519_to_1522_byte_packets =
1730 				stats.rx_1519_to_1522_byte_packets;
1731 	edev->stats.rx_1519_to_2047_byte_packets =
1732 				stats.rx_1519_to_2047_byte_packets;
1733 	edev->stats.rx_2048_to_4095_byte_packets =
1734 				stats.rx_2048_to_4095_byte_packets;
1735 	edev->stats.rx_4096_to_9216_byte_packets =
1736 				stats.rx_4096_to_9216_byte_packets;
1737 	edev->stats.rx_9217_to_16383_byte_packets =
1738 				stats.rx_9217_to_16383_byte_packets;
1739 	edev->stats.rx_crc_errors = stats.rx_crc_errors;
1740 	edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1741 	edev->stats.rx_pause_frames = stats.rx_pause_frames;
1742 	edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1743 	edev->stats.rx_align_errors = stats.rx_align_errors;
1744 	edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1745 	edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1746 	edev->stats.rx_jabbers = stats.rx_jabbers;
1747 	edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1748 	edev->stats.rx_fragments = stats.rx_fragments;
1749 	edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1750 	edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1751 	edev->stats.tx_128_to_255_byte_packets =
1752 				stats.tx_128_to_255_byte_packets;
1753 	edev->stats.tx_256_to_511_byte_packets =
1754 				stats.tx_256_to_511_byte_packets;
1755 	edev->stats.tx_512_to_1023_byte_packets =
1756 				stats.tx_512_to_1023_byte_packets;
1757 	edev->stats.tx_1024_to_1518_byte_packets =
1758 				stats.tx_1024_to_1518_byte_packets;
1759 	edev->stats.tx_1519_to_2047_byte_packets =
1760 				stats.tx_1519_to_2047_byte_packets;
1761 	edev->stats.tx_2048_to_4095_byte_packets =
1762 				stats.tx_2048_to_4095_byte_packets;
1763 	edev->stats.tx_4096_to_9216_byte_packets =
1764 				stats.tx_4096_to_9216_byte_packets;
1765 	edev->stats.tx_9217_to_16383_byte_packets =
1766 				stats.tx_9217_to_16383_byte_packets;
1767 	edev->stats.tx_pause_frames = stats.tx_pause_frames;
1768 	edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1769 	edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1770 	edev->stats.tx_total_collisions = stats.tx_total_collisions;
1771 	edev->stats.brb_truncates = stats.brb_truncates;
1772 	edev->stats.brb_discards = stats.brb_discards;
1773 	edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1774 }
1775 
1776 static struct rtnl_link_stats64 *qede_get_stats64(
1777 			    struct net_device *dev,
1778 			    struct rtnl_link_stats64 *stats)
1779 {
1780 	struct qede_dev *edev = netdev_priv(dev);
1781 
1782 	qede_fill_by_demand_stats(edev);
1783 
1784 	stats->rx_packets = edev->stats.rx_ucast_pkts +
1785 			    edev->stats.rx_mcast_pkts +
1786 			    edev->stats.rx_bcast_pkts;
1787 	stats->tx_packets = edev->stats.tx_ucast_pkts +
1788 			    edev->stats.tx_mcast_pkts +
1789 			    edev->stats.tx_bcast_pkts;
1790 
1791 	stats->rx_bytes = edev->stats.rx_ucast_bytes +
1792 			  edev->stats.rx_mcast_bytes +
1793 			  edev->stats.rx_bcast_bytes;
1794 
1795 	stats->tx_bytes = edev->stats.tx_ucast_bytes +
1796 			  edev->stats.tx_mcast_bytes +
1797 			  edev->stats.tx_bcast_bytes;
1798 
1799 	stats->tx_errors = edev->stats.tx_err_drop_pkts;
1800 	stats->multicast = edev->stats.rx_mcast_pkts +
1801 			   edev->stats.rx_bcast_pkts;
1802 
1803 	stats->rx_fifo_errors = edev->stats.no_buff_discards;
1804 
1805 	stats->collisions = edev->stats.tx_total_collisions;
1806 	stats->rx_crc_errors = edev->stats.rx_crc_errors;
1807 	stats->rx_frame_errors = edev->stats.rx_align_errors;
1808 
1809 	return stats;
1810 }
1811 
1812 #ifdef CONFIG_QED_SRIOV
1813 static int qede_get_vf_config(struct net_device *dev, int vfidx,
1814 			      struct ifla_vf_info *ivi)
1815 {
1816 	struct qede_dev *edev = netdev_priv(dev);
1817 
1818 	if (!edev->ops)
1819 		return -EINVAL;
1820 
1821 	return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1822 }
1823 
1824 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1825 			    int min_tx_rate, int max_tx_rate)
1826 {
1827 	struct qede_dev *edev = netdev_priv(dev);
1828 
1829 	return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
1830 					max_tx_rate);
1831 }
1832 
1833 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1834 {
1835 	struct qede_dev *edev = netdev_priv(dev);
1836 
1837 	if (!edev->ops)
1838 		return -EINVAL;
1839 
1840 	return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1841 }
1842 
1843 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1844 				  int link_state)
1845 {
1846 	struct qede_dev *edev = netdev_priv(dev);
1847 
1848 	if (!edev->ops)
1849 		return -EINVAL;
1850 
1851 	return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1852 }
1853 #endif
1854 
1855 static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1856 {
1857 	struct qed_update_vport_params params;
1858 	int rc;
1859 
1860 	/* Proceed only if action actually needs to be performed */
1861 	if (edev->accept_any_vlan == action)
1862 		return;
1863 
1864 	memset(&params, 0, sizeof(params));
1865 
1866 	params.vport_id = 0;
1867 	params.accept_any_vlan = action;
1868 	params.update_accept_any_vlan_flg = 1;
1869 
1870 	rc = edev->ops->vport_update(edev->cdev, &params);
1871 	if (rc) {
1872 		DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1873 		       action ? "enable" : "disable");
1874 	} else {
1875 		DP_INFO(edev, "%s accept-any-vlan\n",
1876 			action ? "enabled" : "disabled");
1877 		edev->accept_any_vlan = action;
1878 	}
1879 }
1880 
1881 static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1882 {
1883 	struct qede_dev *edev = netdev_priv(dev);
1884 	struct qede_vlan *vlan, *tmp;
1885 	int rc;
1886 
1887 	DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1888 
1889 	vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1890 	if (!vlan) {
1891 		DP_INFO(edev, "Failed to allocate struct for vlan\n");
1892 		return -ENOMEM;
1893 	}
1894 	INIT_LIST_HEAD(&vlan->list);
1895 	vlan->vid = vid;
1896 	vlan->configured = false;
1897 
1898 	/* Verify vlan isn't already configured */
1899 	list_for_each_entry(tmp, &edev->vlan_list, list) {
1900 		if (tmp->vid == vlan->vid) {
1901 			DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1902 				   "vlan already configured\n");
1903 			kfree(vlan);
1904 			return -EEXIST;
1905 		}
1906 	}
1907 
1908 	/* If interface is down, cache this VLAN ID and return */
1909 	if (edev->state != QEDE_STATE_OPEN) {
1910 		DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1911 			   "Interface is down, VLAN %d will be configured when interface is up\n",
1912 			   vid);
1913 		if (vid != 0)
1914 			edev->non_configured_vlans++;
1915 		list_add(&vlan->list, &edev->vlan_list);
1916 
1917 		return 0;
1918 	}
1919 
1920 	/* Check for the filter limit.
1921 	 * Note - vlan0 has a reserved filter and can be added without
1922 	 * worrying about quota
1923 	 */
1924 	if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1925 	    (vlan->vid == 0)) {
1926 		rc = qede_set_ucast_rx_vlan(edev,
1927 					    QED_FILTER_XCAST_TYPE_ADD,
1928 					    vlan->vid);
1929 		if (rc) {
1930 			DP_ERR(edev, "Failed to configure VLAN %d\n",
1931 			       vlan->vid);
1932 			kfree(vlan);
1933 			return -EINVAL;
1934 		}
1935 		vlan->configured = true;
1936 
1937 		/* vlan0 filter isn't consuming out of our quota */
1938 		if (vlan->vid != 0)
1939 			edev->configured_vlans++;
1940 	} else {
1941 		/* Out of quota; Activate accept-any-VLAN mode */
1942 		if (!edev->non_configured_vlans)
1943 			qede_config_accept_any_vlan(edev, true);
1944 
1945 		edev->non_configured_vlans++;
1946 	}
1947 
1948 	list_add(&vlan->list, &edev->vlan_list);
1949 
1950 	return 0;
1951 }
1952 
1953 static void qede_del_vlan_from_list(struct qede_dev *edev,
1954 				    struct qede_vlan *vlan)
1955 {
1956 	/* vlan0 filter isn't consuming out of our quota */
1957 	if (vlan->vid != 0) {
1958 		if (vlan->configured)
1959 			edev->configured_vlans--;
1960 		else
1961 			edev->non_configured_vlans--;
1962 	}
1963 
1964 	list_del(&vlan->list);
1965 	kfree(vlan);
1966 }
1967 
1968 static int qede_configure_vlan_filters(struct qede_dev *edev)
1969 {
1970 	int rc = 0, real_rc = 0, accept_any_vlan = 0;
1971 	struct qed_dev_eth_info *dev_info;
1972 	struct qede_vlan *vlan = NULL;
1973 
1974 	if (list_empty(&edev->vlan_list))
1975 		return 0;
1976 
1977 	dev_info = &edev->dev_info;
1978 
1979 	/* Configure non-configured vlans */
1980 	list_for_each_entry(vlan, &edev->vlan_list, list) {
1981 		if (vlan->configured)
1982 			continue;
1983 
1984 		/* We have used all our credits, now enable accept_any_vlan */
1985 		if ((vlan->vid != 0) &&
1986 		    (edev->configured_vlans == dev_info->num_vlan_filters)) {
1987 			accept_any_vlan = 1;
1988 			continue;
1989 		}
1990 
1991 		DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1992 
1993 		rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1994 					    vlan->vid);
1995 		if (rc) {
1996 			DP_ERR(edev, "Failed to configure VLAN %u\n",
1997 			       vlan->vid);
1998 			real_rc = rc;
1999 			continue;
2000 		}
2001 
2002 		vlan->configured = true;
2003 		/* vlan0 filter doesn't consume our VLAN filter's quota */
2004 		if (vlan->vid != 0) {
2005 			edev->non_configured_vlans--;
2006 			edev->configured_vlans++;
2007 		}
2008 	}
2009 
2010 	/* enable accept_any_vlan mode if we have more VLANs than credits,
2011 	 * or remove accept_any_vlan mode if we've actually removed
2012 	 * a non-configured vlan, and all remaining vlans are truly configured.
2013 	 */
2014 
2015 	if (accept_any_vlan)
2016 		qede_config_accept_any_vlan(edev, true);
2017 	else if (!edev->non_configured_vlans)
2018 		qede_config_accept_any_vlan(edev, false);
2019 
2020 	return real_rc;
2021 }
2022 
2023 static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2024 {
2025 	struct qede_dev *edev = netdev_priv(dev);
2026 	struct qede_vlan *vlan = NULL;
2027 	int rc;
2028 
2029 	DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2030 
2031 	/* Find whether entry exists */
2032 	list_for_each_entry(vlan, &edev->vlan_list, list)
2033 		if (vlan->vid == vid)
2034 			break;
2035 
2036 	if (!vlan || (vlan->vid != vid)) {
2037 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2038 			   "Vlan isn't configured\n");
2039 		return 0;
2040 	}
2041 
2042 	if (edev->state != QEDE_STATE_OPEN) {
2043 		/* As interface is already down, we don't have a VPORT
2044 		 * instance to remove vlan filter. So just update vlan list
2045 		 */
2046 		DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2047 			   "Interface is down, removing VLAN from list only\n");
2048 		qede_del_vlan_from_list(edev, vlan);
2049 		return 0;
2050 	}
2051 
2052 	/* Remove vlan */
2053 	rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
2054 	if (rc) {
2055 		DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2056 		return -EINVAL;
2057 	}
2058 
2059 	qede_del_vlan_from_list(edev, vlan);
2060 
2061 	/* We have removed a VLAN - try to see if we can
2062 	 * configure non-configured VLAN from the list.
2063 	 */
2064 	rc = qede_configure_vlan_filters(edev);
2065 
2066 	return rc;
2067 }
2068 
2069 static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2070 {
2071 	struct qede_vlan *vlan = NULL;
2072 
2073 	if (list_empty(&edev->vlan_list))
2074 		return;
2075 
2076 	list_for_each_entry(vlan, &edev->vlan_list, list) {
2077 		if (!vlan->configured)
2078 			continue;
2079 
2080 		vlan->configured = false;
2081 
2082 		/* vlan0 filter isn't consuming out of our quota */
2083 		if (vlan->vid != 0) {
2084 			edev->non_configured_vlans++;
2085 			edev->configured_vlans--;
2086 		}
2087 
2088 		DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2089 			   "marked vlan %d as non-configured\n",
2090 			   vlan->vid);
2091 	}
2092 
2093 	edev->accept_any_vlan = false;
2094 }
2095 
2096 int qede_set_features(struct net_device *dev, netdev_features_t features)
2097 {
2098 	struct qede_dev *edev = netdev_priv(dev);
2099 	netdev_features_t changes = features ^ dev->features;
2100 	bool need_reload = false;
2101 
2102 	/* No action needed if hardware GRO is disabled during driver load */
2103 	if (changes & NETIF_F_GRO) {
2104 		if (dev->features & NETIF_F_GRO)
2105 			need_reload = !edev->gro_disable;
2106 		else
2107 			need_reload = edev->gro_disable;
2108 	}
2109 
2110 	if (need_reload && netif_running(edev->ndev)) {
2111 		dev->features = features;
2112 		qede_reload(edev, NULL, NULL);
2113 		return 1;
2114 	}
2115 
2116 	return 0;
2117 }
2118 
2119 #ifdef CONFIG_QEDE_VXLAN
2120 static void qede_add_vxlan_port(struct net_device *dev,
2121 				sa_family_t sa_family, __be16 port)
2122 {
2123 	struct qede_dev *edev = netdev_priv(dev);
2124 	u16 t_port = ntohs(port);
2125 
2126 	if (edev->vxlan_dst_port)
2127 		return;
2128 
2129 	edev->vxlan_dst_port = t_port;
2130 
2131 	DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port);
2132 
2133 	set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2134 	schedule_delayed_work(&edev->sp_task, 0);
2135 }
2136 
2137 static void qede_del_vxlan_port(struct net_device *dev,
2138 				sa_family_t sa_family, __be16 port)
2139 {
2140 	struct qede_dev *edev = netdev_priv(dev);
2141 	u16 t_port = ntohs(port);
2142 
2143 	if (t_port != edev->vxlan_dst_port)
2144 		return;
2145 
2146 	edev->vxlan_dst_port = 0;
2147 
2148 	DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port);
2149 
2150 	set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2151 	schedule_delayed_work(&edev->sp_task, 0);
2152 }
2153 #endif
2154 
2155 #ifdef CONFIG_QEDE_GENEVE
2156 static void qede_add_geneve_port(struct net_device *dev,
2157 				 sa_family_t sa_family, __be16 port)
2158 {
2159 	struct qede_dev *edev = netdev_priv(dev);
2160 	u16 t_port = ntohs(port);
2161 
2162 	if (edev->geneve_dst_port)
2163 		return;
2164 
2165 	edev->geneve_dst_port = t_port;
2166 
2167 	DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port);
2168 	set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2169 	schedule_delayed_work(&edev->sp_task, 0);
2170 }
2171 
2172 static void qede_del_geneve_port(struct net_device *dev,
2173 				 sa_family_t sa_family, __be16 port)
2174 {
2175 	struct qede_dev *edev = netdev_priv(dev);
2176 	u16 t_port = ntohs(port);
2177 
2178 	if (t_port != edev->geneve_dst_port)
2179 		return;
2180 
2181 	edev->geneve_dst_port = 0;
2182 
2183 	DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port);
2184 	set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2185 	schedule_delayed_work(&edev->sp_task, 0);
2186 }
2187 #endif
2188 
2189 static const struct net_device_ops qede_netdev_ops = {
2190 	.ndo_open = qede_open,
2191 	.ndo_stop = qede_close,
2192 	.ndo_start_xmit = qede_start_xmit,
2193 	.ndo_set_rx_mode = qede_set_rx_mode,
2194 	.ndo_set_mac_address = qede_set_mac_addr,
2195 	.ndo_validate_addr = eth_validate_addr,
2196 	.ndo_change_mtu = qede_change_mtu,
2197 #ifdef CONFIG_QED_SRIOV
2198 	.ndo_set_vf_mac = qede_set_vf_mac,
2199 	.ndo_set_vf_vlan = qede_set_vf_vlan,
2200 #endif
2201 	.ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2202 	.ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
2203 	.ndo_set_features = qede_set_features,
2204 	.ndo_get_stats64 = qede_get_stats64,
2205 #ifdef CONFIG_QED_SRIOV
2206 	.ndo_set_vf_link_state = qede_set_vf_link_state,
2207 	.ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
2208 	.ndo_get_vf_config = qede_get_vf_config,
2209 	.ndo_set_vf_rate = qede_set_vf_rate,
2210 #endif
2211 #ifdef CONFIG_QEDE_VXLAN
2212 	.ndo_add_vxlan_port = qede_add_vxlan_port,
2213 	.ndo_del_vxlan_port = qede_del_vxlan_port,
2214 #endif
2215 #ifdef CONFIG_QEDE_GENEVE
2216 	.ndo_add_geneve_port = qede_add_geneve_port,
2217 	.ndo_del_geneve_port = qede_del_geneve_port,
2218 #endif
2219 };
2220 
2221 /* -------------------------------------------------------------------------
2222  * START OF PROBE / REMOVE
2223  * -------------------------------------------------------------------------
2224  */
2225 
2226 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2227 					    struct pci_dev *pdev,
2228 					    struct qed_dev_eth_info *info,
2229 					    u32 dp_module,
2230 					    u8 dp_level)
2231 {
2232 	struct net_device *ndev;
2233 	struct qede_dev *edev;
2234 
2235 	ndev = alloc_etherdev_mqs(sizeof(*edev),
2236 				  info->num_queues,
2237 				  info->num_queues);
2238 	if (!ndev) {
2239 		pr_err("etherdev allocation failed\n");
2240 		return NULL;
2241 	}
2242 
2243 	edev = netdev_priv(ndev);
2244 	edev->ndev = ndev;
2245 	edev->cdev = cdev;
2246 	edev->pdev = pdev;
2247 	edev->dp_module = dp_module;
2248 	edev->dp_level = dp_level;
2249 	edev->ops = qed_ops;
2250 	edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2251 	edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
2252 
2253 	SET_NETDEV_DEV(ndev, &pdev->dev);
2254 
2255 	memset(&edev->stats, 0, sizeof(edev->stats));
2256 	memcpy(&edev->dev_info, info, sizeof(*info));
2257 
2258 	edev->num_tc = edev->dev_info.num_tc;
2259 
2260 	INIT_LIST_HEAD(&edev->vlan_list);
2261 
2262 	return edev;
2263 }
2264 
2265 static void qede_init_ndev(struct qede_dev *edev)
2266 {
2267 	struct net_device *ndev = edev->ndev;
2268 	struct pci_dev *pdev = edev->pdev;
2269 	u32 hw_features;
2270 
2271 	pci_set_drvdata(pdev, ndev);
2272 
2273 	ndev->mem_start = edev->dev_info.common.pci_mem_start;
2274 	ndev->base_addr = ndev->mem_start;
2275 	ndev->mem_end = edev->dev_info.common.pci_mem_end;
2276 	ndev->irq = edev->dev_info.common.pci_irq;
2277 
2278 	ndev->watchdog_timeo = TX_TIMEOUT;
2279 
2280 	ndev->netdev_ops = &qede_netdev_ops;
2281 
2282 	qede_set_ethtool_ops(ndev);
2283 
2284 	/* user-changeble features */
2285 	hw_features = NETIF_F_GRO | NETIF_F_SG |
2286 		      NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2287 		      NETIF_F_TSO | NETIF_F_TSO6;
2288 
2289 	/* Encap features*/
2290 	hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2291 		       NETIF_F_TSO_ECN;
2292 	ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2293 				NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2294 				NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2295 				NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2296 
2297 	ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2298 			      NETIF_F_HIGHDMA;
2299 	ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2300 			 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
2301 			 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
2302 
2303 	ndev->hw_features = hw_features;
2304 
2305 	/* Set network device HW mac */
2306 	ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2307 }
2308 
2309 /* This function converts from 32b param to two params of level and module
2310  * Input 32b decoding:
2311  * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2312  * 'happy' flow, e.g. memory allocation failed.
2313  * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2314  * and provide important parameters.
2315  * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2316  * module. VERBOSE prints are for tracking the specific flow in low level.
2317  *
2318  * Notice that the level should be that of the lowest required logs.
2319  */
2320 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
2321 {
2322 	*p_dp_level = QED_LEVEL_NOTICE;
2323 	*p_dp_module = 0;
2324 
2325 	if (debug & QED_LOG_VERBOSE_MASK) {
2326 		*p_dp_level = QED_LEVEL_VERBOSE;
2327 		*p_dp_module = (debug & 0x3FFFFFFF);
2328 	} else if (debug & QED_LOG_INFO_MASK) {
2329 		*p_dp_level = QED_LEVEL_INFO;
2330 	} else if (debug & QED_LOG_NOTICE_MASK) {
2331 		*p_dp_level = QED_LEVEL_NOTICE;
2332 	}
2333 }
2334 
2335 static void qede_free_fp_array(struct qede_dev *edev)
2336 {
2337 	if (edev->fp_array) {
2338 		struct qede_fastpath *fp;
2339 		int i;
2340 
2341 		for_each_rss(i) {
2342 			fp = &edev->fp_array[i];
2343 
2344 			kfree(fp->sb_info);
2345 			kfree(fp->rxq);
2346 			kfree(fp->txqs);
2347 		}
2348 		kfree(edev->fp_array);
2349 	}
2350 	edev->num_rss = 0;
2351 }
2352 
2353 static int qede_alloc_fp_array(struct qede_dev *edev)
2354 {
2355 	struct qede_fastpath *fp;
2356 	int i;
2357 
2358 	edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2359 				 sizeof(*edev->fp_array), GFP_KERNEL);
2360 	if (!edev->fp_array) {
2361 		DP_NOTICE(edev, "fp array allocation failed\n");
2362 		goto err;
2363 	}
2364 
2365 	for_each_rss(i) {
2366 		fp = &edev->fp_array[i];
2367 
2368 		fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2369 		if (!fp->sb_info) {
2370 			DP_NOTICE(edev, "sb info struct allocation failed\n");
2371 			goto err;
2372 		}
2373 
2374 		fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2375 		if (!fp->rxq) {
2376 			DP_NOTICE(edev, "RXQ struct allocation failed\n");
2377 			goto err;
2378 		}
2379 
2380 		fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2381 		if (!fp->txqs) {
2382 			DP_NOTICE(edev, "TXQ array allocation failed\n");
2383 			goto err;
2384 		}
2385 	}
2386 
2387 	return 0;
2388 err:
2389 	qede_free_fp_array(edev);
2390 	return -ENOMEM;
2391 }
2392 
2393 static void qede_sp_task(struct work_struct *work)
2394 {
2395 	struct qede_dev *edev = container_of(work, struct qede_dev,
2396 					     sp_task.work);
2397 	struct qed_dev *cdev = edev->cdev;
2398 
2399 	mutex_lock(&edev->qede_lock);
2400 
2401 	if (edev->state == QEDE_STATE_OPEN) {
2402 		if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2403 			qede_config_rx_mode(edev->ndev);
2404 	}
2405 
2406 	if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2407 		struct qed_tunn_params tunn_params;
2408 
2409 		memset(&tunn_params, 0, sizeof(tunn_params));
2410 		tunn_params.update_vxlan_port = 1;
2411 		tunn_params.vxlan_port = edev->vxlan_dst_port;
2412 		qed_ops->tunn_config(cdev, &tunn_params);
2413 	}
2414 
2415 	if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2416 		struct qed_tunn_params tunn_params;
2417 
2418 		memset(&tunn_params, 0, sizeof(tunn_params));
2419 		tunn_params.update_geneve_port = 1;
2420 		tunn_params.geneve_port = edev->geneve_dst_port;
2421 		qed_ops->tunn_config(cdev, &tunn_params);
2422 	}
2423 
2424 	mutex_unlock(&edev->qede_lock);
2425 }
2426 
2427 static void qede_update_pf_params(struct qed_dev *cdev)
2428 {
2429 	struct qed_pf_params pf_params;
2430 
2431 	/* 64 rx + 64 tx */
2432 	memset(&pf_params, 0, sizeof(struct qed_pf_params));
2433 	pf_params.eth_pf_params.num_cons = 128;
2434 	qed_ops->common->update_pf_params(cdev, &pf_params);
2435 }
2436 
2437 enum qede_probe_mode {
2438 	QEDE_PROBE_NORMAL,
2439 };
2440 
2441 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2442 			bool is_vf, enum qede_probe_mode mode)
2443 {
2444 	struct qed_probe_params probe_params;
2445 	struct qed_slowpath_params params;
2446 	struct qed_dev_eth_info dev_info;
2447 	struct qede_dev *edev;
2448 	struct qed_dev *cdev;
2449 	int rc;
2450 
2451 	if (unlikely(dp_level & QED_LEVEL_INFO))
2452 		pr_notice("Starting qede probe\n");
2453 
2454 	memset(&probe_params, 0, sizeof(probe_params));
2455 	probe_params.protocol = QED_PROTOCOL_ETH;
2456 	probe_params.dp_module = dp_module;
2457 	probe_params.dp_level = dp_level;
2458 	probe_params.is_vf = is_vf;
2459 	cdev = qed_ops->common->probe(pdev, &probe_params);
2460 	if (!cdev) {
2461 		rc = -ENODEV;
2462 		goto err0;
2463 	}
2464 
2465 	qede_update_pf_params(cdev);
2466 
2467 	/* Start the Slowpath-process */
2468 	memset(&params, 0, sizeof(struct qed_slowpath_params));
2469 	params.int_mode = QED_INT_MODE_MSIX;
2470 	params.drv_major = QEDE_MAJOR_VERSION;
2471 	params.drv_minor = QEDE_MINOR_VERSION;
2472 	params.drv_rev = QEDE_REVISION_VERSION;
2473 	params.drv_eng = QEDE_ENGINEERING_VERSION;
2474 	strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2475 	rc = qed_ops->common->slowpath_start(cdev, &params);
2476 	if (rc) {
2477 		pr_notice("Cannot start slowpath\n");
2478 		goto err1;
2479 	}
2480 
2481 	/* Learn information crucial for qede to progress */
2482 	rc = qed_ops->fill_dev_info(cdev, &dev_info);
2483 	if (rc)
2484 		goto err2;
2485 
2486 	edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2487 				   dp_level);
2488 	if (!edev) {
2489 		rc = -ENOMEM;
2490 		goto err2;
2491 	}
2492 
2493 	if (is_vf)
2494 		edev->flags |= QEDE_FLAG_IS_VF;
2495 
2496 	qede_init_ndev(edev);
2497 
2498 	rc = register_netdev(edev->ndev);
2499 	if (rc) {
2500 		DP_NOTICE(edev, "Cannot register net-device\n");
2501 		goto err3;
2502 	}
2503 
2504 	edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2505 
2506 	edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2507 
2508 	INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2509 	mutex_init(&edev->qede_lock);
2510 
2511 	DP_INFO(edev, "Ending successfully qede probe\n");
2512 
2513 	return 0;
2514 
2515 err3:
2516 	free_netdev(edev->ndev);
2517 err2:
2518 	qed_ops->common->slowpath_stop(cdev);
2519 err1:
2520 	qed_ops->common->remove(cdev);
2521 err0:
2522 	return rc;
2523 }
2524 
2525 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2526 {
2527 	bool is_vf = false;
2528 	u32 dp_module = 0;
2529 	u8 dp_level = 0;
2530 
2531 	switch ((enum qede_pci_private)id->driver_data) {
2532 	case QEDE_PRIVATE_VF:
2533 		if (debug & QED_LOG_VERBOSE_MASK)
2534 			dev_err(&pdev->dev, "Probing a VF\n");
2535 		is_vf = true;
2536 		break;
2537 	default:
2538 		if (debug & QED_LOG_VERBOSE_MASK)
2539 			dev_err(&pdev->dev, "Probing a PF\n");
2540 	}
2541 
2542 	qede_config_debug(debug, &dp_module, &dp_level);
2543 
2544 	return __qede_probe(pdev, dp_module, dp_level, is_vf,
2545 			    QEDE_PROBE_NORMAL);
2546 }
2547 
2548 enum qede_remove_mode {
2549 	QEDE_REMOVE_NORMAL,
2550 };
2551 
2552 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2553 {
2554 	struct net_device *ndev = pci_get_drvdata(pdev);
2555 	struct qede_dev *edev = netdev_priv(ndev);
2556 	struct qed_dev *cdev = edev->cdev;
2557 
2558 	DP_INFO(edev, "Starting qede_remove\n");
2559 
2560 	cancel_delayed_work_sync(&edev->sp_task);
2561 	unregister_netdev(ndev);
2562 
2563 	edev->ops->common->set_power_state(cdev, PCI_D0);
2564 
2565 	pci_set_drvdata(pdev, NULL);
2566 
2567 	free_netdev(ndev);
2568 
2569 	/* Use global ops since we've freed edev */
2570 	qed_ops->common->slowpath_stop(cdev);
2571 	qed_ops->common->remove(cdev);
2572 
2573 	pr_notice("Ending successfully qede_remove\n");
2574 }
2575 
2576 static void qede_remove(struct pci_dev *pdev)
2577 {
2578 	__qede_remove(pdev, QEDE_REMOVE_NORMAL);
2579 }
2580 
2581 /* -------------------------------------------------------------------------
2582  * START OF LOAD / UNLOAD
2583  * -------------------------------------------------------------------------
2584  */
2585 
2586 static int qede_set_num_queues(struct qede_dev *edev)
2587 {
2588 	int rc;
2589 	u16 rss_num;
2590 
2591 	/* Setup queues according to possible resources*/
2592 	if (edev->req_rss)
2593 		rss_num = edev->req_rss;
2594 	else
2595 		rss_num = netif_get_num_default_rss_queues() *
2596 			  edev->dev_info.common.num_hwfns;
2597 
2598 	rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2599 
2600 	rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2601 	if (rc > 0) {
2602 		/* Managed to request interrupts for our queues */
2603 		edev->num_rss = rc;
2604 		DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2605 			QEDE_RSS_CNT(edev), rss_num);
2606 		rc = 0;
2607 	}
2608 	return rc;
2609 }
2610 
2611 static void qede_free_mem_sb(struct qede_dev *edev,
2612 			     struct qed_sb_info *sb_info)
2613 {
2614 	if (sb_info->sb_virt)
2615 		dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2616 				  (void *)sb_info->sb_virt, sb_info->sb_phys);
2617 }
2618 
2619 /* This function allocates fast-path status block memory */
2620 static int qede_alloc_mem_sb(struct qede_dev *edev,
2621 			     struct qed_sb_info *sb_info,
2622 			     u16 sb_id)
2623 {
2624 	struct status_block *sb_virt;
2625 	dma_addr_t sb_phys;
2626 	int rc;
2627 
2628 	sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2629 				     sizeof(*sb_virt),
2630 				     &sb_phys, GFP_KERNEL);
2631 	if (!sb_virt) {
2632 		DP_ERR(edev, "Status block allocation failed\n");
2633 		return -ENOMEM;
2634 	}
2635 
2636 	rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2637 					sb_virt, sb_phys, sb_id,
2638 					QED_SB_TYPE_L2_QUEUE);
2639 	if (rc) {
2640 		DP_ERR(edev, "Status block initialization failed\n");
2641 		dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2642 				  sb_virt, sb_phys);
2643 		return rc;
2644 	}
2645 
2646 	return 0;
2647 }
2648 
2649 static void qede_free_rx_buffers(struct qede_dev *edev,
2650 				 struct qede_rx_queue *rxq)
2651 {
2652 	u16 i;
2653 
2654 	for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2655 		struct sw_rx_data *rx_buf;
2656 		struct page *data;
2657 
2658 		rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2659 		data = rx_buf->data;
2660 
2661 		dma_unmap_page(&edev->pdev->dev,
2662 			       rx_buf->mapping,
2663 			       PAGE_SIZE, DMA_FROM_DEVICE);
2664 
2665 		rx_buf->data = NULL;
2666 		__free_page(data);
2667 	}
2668 }
2669 
2670 static void qede_free_sge_mem(struct qede_dev *edev,
2671 			      struct qede_rx_queue *rxq) {
2672 	int i;
2673 
2674 	if (edev->gro_disable)
2675 		return;
2676 
2677 	for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2678 		struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2679 		struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2680 
2681 		if (replace_buf->data) {
2682 			dma_unmap_page(&edev->pdev->dev,
2683 				       replace_buf->mapping,
2684 				       PAGE_SIZE, DMA_FROM_DEVICE);
2685 			__free_page(replace_buf->data);
2686 		}
2687 	}
2688 }
2689 
2690 static void qede_free_mem_rxq(struct qede_dev *edev,
2691 			      struct qede_rx_queue *rxq)
2692 {
2693 	qede_free_sge_mem(edev, rxq);
2694 
2695 	/* Free rx buffers */
2696 	qede_free_rx_buffers(edev, rxq);
2697 
2698 	/* Free the parallel SW ring */
2699 	kfree(rxq->sw_rx_ring);
2700 
2701 	/* Free the real RQ ring used by FW */
2702 	edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2703 	edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2704 }
2705 
2706 static int qede_alloc_rx_buffer(struct qede_dev *edev,
2707 				struct qede_rx_queue *rxq)
2708 {
2709 	struct sw_rx_data *sw_rx_data;
2710 	struct eth_rx_bd *rx_bd;
2711 	dma_addr_t mapping;
2712 	struct page *data;
2713 	u16 rx_buf_size;
2714 
2715 	rx_buf_size = rxq->rx_buf_size;
2716 
2717 	data = alloc_pages(GFP_ATOMIC, 0);
2718 	if (unlikely(!data)) {
2719 		DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2720 		return -ENOMEM;
2721 	}
2722 
2723 	/* Map the entire page as it would be used
2724 	 * for multiple RX buffer segment size mapping.
2725 	 */
2726 	mapping = dma_map_page(&edev->pdev->dev, data, 0,
2727 			       PAGE_SIZE, DMA_FROM_DEVICE);
2728 	if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2729 		__free_page(data);
2730 		DP_NOTICE(edev, "Failed to map Rx buffer\n");
2731 		return -ENOMEM;
2732 	}
2733 
2734 	sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
2735 	sw_rx_data->page_offset = 0;
2736 	sw_rx_data->data = data;
2737 	sw_rx_data->mapping = mapping;
2738 
2739 	/* Advance PROD and get BD pointer */
2740 	rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2741 	WARN_ON(!rx_bd);
2742 	rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2743 	rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2744 
2745 	rxq->sw_rx_prod++;
2746 
2747 	return 0;
2748 }
2749 
2750 static int qede_alloc_sge_mem(struct qede_dev *edev,
2751 			      struct qede_rx_queue *rxq)
2752 {
2753 	dma_addr_t mapping;
2754 	int i;
2755 
2756 	if (edev->gro_disable)
2757 		return 0;
2758 
2759 	if (edev->ndev->mtu > PAGE_SIZE) {
2760 		edev->gro_disable = 1;
2761 		return 0;
2762 	}
2763 
2764 	for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2765 		struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2766 		struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2767 
2768 		replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2769 		if (unlikely(!replace_buf->data)) {
2770 			DP_NOTICE(edev,
2771 				  "Failed to allocate TPA skb pool [replacement buffer]\n");
2772 			goto err;
2773 		}
2774 
2775 		mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2776 				       rxq->rx_buf_size, DMA_FROM_DEVICE);
2777 		if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2778 			DP_NOTICE(edev,
2779 				  "Failed to map TPA replacement buffer\n");
2780 			goto err;
2781 		}
2782 
2783 		replace_buf->mapping = mapping;
2784 		tpa_info->replace_buf.page_offset = 0;
2785 
2786 		tpa_info->replace_buf_mapping = mapping;
2787 		tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2788 	}
2789 
2790 	return 0;
2791 err:
2792 	qede_free_sge_mem(edev, rxq);
2793 	edev->gro_disable = 1;
2794 	return -ENOMEM;
2795 }
2796 
2797 /* This function allocates all memory needed per Rx queue */
2798 static int qede_alloc_mem_rxq(struct qede_dev *edev,
2799 			      struct qede_rx_queue *rxq)
2800 {
2801 	int i, rc, size;
2802 
2803 	rxq->num_rx_buffers = edev->q_num_rx_buffers;
2804 
2805 	rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2806 			   edev->ndev->mtu;
2807 	if (rxq->rx_buf_size > PAGE_SIZE)
2808 		rxq->rx_buf_size = PAGE_SIZE;
2809 
2810 	/* Segment size to spilt a page in multiple equal parts */
2811 	rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2812 
2813 	/* Allocate the parallel driver ring for Rx buffers */
2814 	size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2815 	rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2816 	if (!rxq->sw_rx_ring) {
2817 		DP_ERR(edev, "Rx buffers ring allocation failed\n");
2818 		rc = -ENOMEM;
2819 		goto err;
2820 	}
2821 
2822 	/* Allocate FW Rx ring  */
2823 	rc = edev->ops->common->chain_alloc(edev->cdev,
2824 					    QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2825 					    QED_CHAIN_MODE_NEXT_PTR,
2826 					    RX_RING_SIZE,
2827 					    sizeof(struct eth_rx_bd),
2828 					    &rxq->rx_bd_ring);
2829 
2830 	if (rc)
2831 		goto err;
2832 
2833 	/* Allocate FW completion ring */
2834 	rc = edev->ops->common->chain_alloc(edev->cdev,
2835 					    QED_CHAIN_USE_TO_CONSUME,
2836 					    QED_CHAIN_MODE_PBL,
2837 					    RX_RING_SIZE,
2838 					    sizeof(union eth_rx_cqe),
2839 					    &rxq->rx_comp_ring);
2840 	if (rc)
2841 		goto err;
2842 
2843 	/* Allocate buffers for the Rx ring */
2844 	for (i = 0; i < rxq->num_rx_buffers; i++) {
2845 		rc = qede_alloc_rx_buffer(edev, rxq);
2846 		if (rc) {
2847 			DP_ERR(edev,
2848 			       "Rx buffers allocation failed at index %d\n", i);
2849 			goto err;
2850 		}
2851 	}
2852 
2853 	rc = qede_alloc_sge_mem(edev, rxq);
2854 err:
2855 	return rc;
2856 }
2857 
2858 static void qede_free_mem_txq(struct qede_dev *edev,
2859 			      struct qede_tx_queue *txq)
2860 {
2861 	/* Free the parallel SW ring */
2862 	kfree(txq->sw_tx_ring);
2863 
2864 	/* Free the real RQ ring used by FW */
2865 	edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2866 }
2867 
2868 /* This function allocates all memory needed per Tx queue */
2869 static int qede_alloc_mem_txq(struct qede_dev *edev,
2870 			      struct qede_tx_queue *txq)
2871 {
2872 	int size, rc;
2873 	union eth_tx_bd_types *p_virt;
2874 
2875 	txq->num_tx_buffers = edev->q_num_tx_buffers;
2876 
2877 	/* Allocate the parallel driver ring for Tx buffers */
2878 	size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2879 	txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2880 	if (!txq->sw_tx_ring) {
2881 		DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2882 		goto err;
2883 	}
2884 
2885 	rc = edev->ops->common->chain_alloc(edev->cdev,
2886 					    QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2887 					    QED_CHAIN_MODE_PBL,
2888 					    NUM_TX_BDS_MAX,
2889 					    sizeof(*p_virt),
2890 					    &txq->tx_pbl);
2891 	if (rc)
2892 		goto err;
2893 
2894 	return 0;
2895 
2896 err:
2897 	qede_free_mem_txq(edev, txq);
2898 	return -ENOMEM;
2899 }
2900 
2901 /* This function frees all memory of a single fp */
2902 static void qede_free_mem_fp(struct qede_dev *edev,
2903 			     struct qede_fastpath *fp)
2904 {
2905 	int tc;
2906 
2907 	qede_free_mem_sb(edev, fp->sb_info);
2908 
2909 	qede_free_mem_rxq(edev, fp->rxq);
2910 
2911 	for (tc = 0; tc < edev->num_tc; tc++)
2912 		qede_free_mem_txq(edev, &fp->txqs[tc]);
2913 }
2914 
2915 /* This function allocates all memory needed for a single fp (i.e. an entity
2916  * which contains status block, one rx queue and multiple per-TC tx queues.
2917  */
2918 static int qede_alloc_mem_fp(struct qede_dev *edev,
2919 			     struct qede_fastpath *fp)
2920 {
2921 	int rc, tc;
2922 
2923 	rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2924 	if (rc)
2925 		goto err;
2926 
2927 	rc = qede_alloc_mem_rxq(edev, fp->rxq);
2928 	if (rc)
2929 		goto err;
2930 
2931 	for (tc = 0; tc < edev->num_tc; tc++) {
2932 		rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2933 		if (rc)
2934 			goto err;
2935 	}
2936 
2937 	return 0;
2938 err:
2939 	return rc;
2940 }
2941 
2942 static void qede_free_mem_load(struct qede_dev *edev)
2943 {
2944 	int i;
2945 
2946 	for_each_rss(i) {
2947 		struct qede_fastpath *fp = &edev->fp_array[i];
2948 
2949 		qede_free_mem_fp(edev, fp);
2950 	}
2951 }
2952 
2953 /* This function allocates all qede memory at NIC load. */
2954 static int qede_alloc_mem_load(struct qede_dev *edev)
2955 {
2956 	int rc = 0, rss_id;
2957 
2958 	for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2959 		struct qede_fastpath *fp = &edev->fp_array[rss_id];
2960 
2961 		rc = qede_alloc_mem_fp(edev, fp);
2962 		if (rc) {
2963 			DP_ERR(edev,
2964 			       "Failed to allocate memory for fastpath - rss id = %d\n",
2965 			       rss_id);
2966 			qede_free_mem_load(edev);
2967 			return rc;
2968 		}
2969 	}
2970 
2971 	return 0;
2972 }
2973 
2974 /* This function inits fp content and resets the SB, RXQ and TXQ structures */
2975 static void qede_init_fp(struct qede_dev *edev)
2976 {
2977 	int rss_id, txq_index, tc;
2978 	struct qede_fastpath *fp;
2979 
2980 	for_each_rss(rss_id) {
2981 		fp = &edev->fp_array[rss_id];
2982 
2983 		fp->edev = edev;
2984 		fp->rss_id = rss_id;
2985 
2986 		memset((void *)&fp->napi, 0, sizeof(fp->napi));
2987 
2988 		memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2989 
2990 		memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2991 		fp->rxq->rxq_id = rss_id;
2992 
2993 		memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2994 		for (tc = 0; tc < edev->num_tc; tc++) {
2995 			txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2996 			fp->txqs[tc].index = txq_index;
2997 		}
2998 
2999 		snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
3000 			 edev->ndev->name, rss_id);
3001 	}
3002 
3003 	edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
3004 }
3005 
3006 static int qede_set_real_num_queues(struct qede_dev *edev)
3007 {
3008 	int rc = 0;
3009 
3010 	rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3011 	if (rc) {
3012 		DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3013 		return rc;
3014 	}
3015 	rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3016 	if (rc) {
3017 		DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3018 		return rc;
3019 	}
3020 
3021 	return 0;
3022 }
3023 
3024 static void qede_napi_disable_remove(struct qede_dev *edev)
3025 {
3026 	int i;
3027 
3028 	for_each_rss(i) {
3029 		napi_disable(&edev->fp_array[i].napi);
3030 
3031 		netif_napi_del(&edev->fp_array[i].napi);
3032 	}
3033 }
3034 
3035 static void qede_napi_add_enable(struct qede_dev *edev)
3036 {
3037 	int i;
3038 
3039 	/* Add NAPI objects */
3040 	for_each_rss(i) {
3041 		netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3042 			       qede_poll, NAPI_POLL_WEIGHT);
3043 		napi_enable(&edev->fp_array[i].napi);
3044 	}
3045 }
3046 
3047 static void qede_sync_free_irqs(struct qede_dev *edev)
3048 {
3049 	int i;
3050 
3051 	for (i = 0; i < edev->int_info.used_cnt; i++) {
3052 		if (edev->int_info.msix_cnt) {
3053 			synchronize_irq(edev->int_info.msix[i].vector);
3054 			free_irq(edev->int_info.msix[i].vector,
3055 				 &edev->fp_array[i]);
3056 		} else {
3057 			edev->ops->common->simd_handler_clean(edev->cdev, i);
3058 		}
3059 	}
3060 
3061 	edev->int_info.used_cnt = 0;
3062 }
3063 
3064 static int qede_req_msix_irqs(struct qede_dev *edev)
3065 {
3066 	int i, rc;
3067 
3068 	/* Sanitize number of interrupts == number of prepared RSS queues */
3069 	if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3070 		DP_ERR(edev,
3071 		       "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3072 		       QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3073 		return -EINVAL;
3074 	}
3075 
3076 	for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3077 		rc = request_irq(edev->int_info.msix[i].vector,
3078 				 qede_msix_fp_int, 0, edev->fp_array[i].name,
3079 				 &edev->fp_array[i]);
3080 		if (rc) {
3081 			DP_ERR(edev, "Request fp %d irq failed\n", i);
3082 			qede_sync_free_irqs(edev);
3083 			return rc;
3084 		}
3085 		DP_VERBOSE(edev, NETIF_MSG_INTR,
3086 			   "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3087 			   edev->fp_array[i].name, i,
3088 			   &edev->fp_array[i]);
3089 		edev->int_info.used_cnt++;
3090 	}
3091 
3092 	return 0;
3093 }
3094 
3095 static void qede_simd_fp_handler(void *cookie)
3096 {
3097 	struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3098 
3099 	napi_schedule_irqoff(&fp->napi);
3100 }
3101 
3102 static int qede_setup_irqs(struct qede_dev *edev)
3103 {
3104 	int i, rc = 0;
3105 
3106 	/* Learn Interrupt configuration */
3107 	rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3108 	if (rc)
3109 		return rc;
3110 
3111 	if (edev->int_info.msix_cnt) {
3112 		rc = qede_req_msix_irqs(edev);
3113 		if (rc)
3114 			return rc;
3115 		edev->ndev->irq = edev->int_info.msix[0].vector;
3116 	} else {
3117 		const struct qed_common_ops *ops;
3118 
3119 		/* qed should learn receive the RSS ids and callbacks */
3120 		ops = edev->ops->common;
3121 		for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3122 			ops->simd_handler_config(edev->cdev,
3123 						 &edev->fp_array[i], i,
3124 						 qede_simd_fp_handler);
3125 		edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3126 	}
3127 	return 0;
3128 }
3129 
3130 static int qede_drain_txq(struct qede_dev *edev,
3131 			  struct qede_tx_queue *txq,
3132 			  bool allow_drain)
3133 {
3134 	int rc, cnt = 1000;
3135 
3136 	while (txq->sw_tx_cons != txq->sw_tx_prod) {
3137 		if (!cnt) {
3138 			if (allow_drain) {
3139 				DP_NOTICE(edev,
3140 					  "Tx queue[%d] is stuck, requesting MCP to drain\n",
3141 					  txq->index);
3142 				rc = edev->ops->common->drain(edev->cdev);
3143 				if (rc)
3144 					return rc;
3145 				return qede_drain_txq(edev, txq, false);
3146 			}
3147 			DP_NOTICE(edev,
3148 				  "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3149 				  txq->index, txq->sw_tx_prod,
3150 				  txq->sw_tx_cons);
3151 			return -ENODEV;
3152 		}
3153 		cnt--;
3154 		usleep_range(1000, 2000);
3155 		barrier();
3156 	}
3157 
3158 	/* FW finished processing, wait for HW to transmit all tx packets */
3159 	usleep_range(1000, 2000);
3160 
3161 	return 0;
3162 }
3163 
3164 static int qede_stop_queues(struct qede_dev *edev)
3165 {
3166 	struct qed_update_vport_params vport_update_params;
3167 	struct qed_dev *cdev = edev->cdev;
3168 	int rc, tc, i;
3169 
3170 	/* Disable the vport */
3171 	memset(&vport_update_params, 0, sizeof(vport_update_params));
3172 	vport_update_params.vport_id = 0;
3173 	vport_update_params.update_vport_active_flg = 1;
3174 	vport_update_params.vport_active_flg = 0;
3175 	vport_update_params.update_rss_flg = 0;
3176 
3177 	rc = edev->ops->vport_update(cdev, &vport_update_params);
3178 	if (rc) {
3179 		DP_ERR(edev, "Failed to update vport\n");
3180 		return rc;
3181 	}
3182 
3183 	/* Flush Tx queues. If needed, request drain from MCP */
3184 	for_each_rss(i) {
3185 		struct qede_fastpath *fp = &edev->fp_array[i];
3186 
3187 		for (tc = 0; tc < edev->num_tc; tc++) {
3188 			struct qede_tx_queue *txq = &fp->txqs[tc];
3189 
3190 			rc = qede_drain_txq(edev, txq, true);
3191 			if (rc)
3192 				return rc;
3193 		}
3194 	}
3195 
3196 	/* Stop all Queues in reverse order*/
3197 	for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3198 		struct qed_stop_rxq_params rx_params;
3199 
3200 		/* Stop the Tx Queue(s)*/
3201 		for (tc = 0; tc < edev->num_tc; tc++) {
3202 			struct qed_stop_txq_params tx_params;
3203 
3204 			tx_params.rss_id = i;
3205 			tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3206 			rc = edev->ops->q_tx_stop(cdev, &tx_params);
3207 			if (rc) {
3208 				DP_ERR(edev, "Failed to stop TXQ #%d\n",
3209 				       tx_params.tx_queue_id);
3210 				return rc;
3211 			}
3212 		}
3213 
3214 		/* Stop the Rx Queue*/
3215 		memset(&rx_params, 0, sizeof(rx_params));
3216 		rx_params.rss_id = i;
3217 		rx_params.rx_queue_id = i;
3218 
3219 		rc = edev->ops->q_rx_stop(cdev, &rx_params);
3220 		if (rc) {
3221 			DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3222 			return rc;
3223 		}
3224 	}
3225 
3226 	/* Stop the vport */
3227 	rc = edev->ops->vport_stop(cdev, 0);
3228 	if (rc)
3229 		DP_ERR(edev, "Failed to stop VPORT\n");
3230 
3231 	return rc;
3232 }
3233 
3234 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
3235 {
3236 	int rc, tc, i;
3237 	int vlan_removal_en = 1;
3238 	struct qed_dev *cdev = edev->cdev;
3239 	struct qed_update_vport_params vport_update_params;
3240 	struct qed_queue_start_common_params q_params;
3241 	struct qed_dev_info *qed_info = &edev->dev_info.common;
3242 	struct qed_start_vport_params start = {0};
3243 	bool reset_rss_indir = false;
3244 
3245 	if (!edev->num_rss) {
3246 		DP_ERR(edev,
3247 		       "Cannot update V-VPORT as active as there are no Rx queues\n");
3248 		return -EINVAL;
3249 	}
3250 
3251 	start.gro_enable = !edev->gro_disable;
3252 	start.mtu = edev->ndev->mtu;
3253 	start.vport_id = 0;
3254 	start.drop_ttl0 = true;
3255 	start.remove_inner_vlan = vlan_removal_en;
3256 
3257 	rc = edev->ops->vport_start(cdev, &start);
3258 
3259 	if (rc) {
3260 		DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3261 		return rc;
3262 	}
3263 
3264 	DP_VERBOSE(edev, NETIF_MSG_IFUP,
3265 		   "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
3266 		   start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
3267 
3268 	for_each_rss(i) {
3269 		struct qede_fastpath *fp = &edev->fp_array[i];
3270 		dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3271 
3272 		memset(&q_params, 0, sizeof(q_params));
3273 		q_params.rss_id = i;
3274 		q_params.queue_id = i;
3275 		q_params.vport_id = 0;
3276 		q_params.sb = fp->sb_info->igu_sb_id;
3277 		q_params.sb_idx = RX_PI;
3278 
3279 		rc = edev->ops->q_rx_start(cdev, &q_params,
3280 					   fp->rxq->rx_buf_size,
3281 					   fp->rxq->rx_bd_ring.p_phys_addr,
3282 					   phys_table,
3283 					   fp->rxq->rx_comp_ring.page_cnt,
3284 					   &fp->rxq->hw_rxq_prod_addr);
3285 		if (rc) {
3286 			DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3287 			return rc;
3288 		}
3289 
3290 		fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3291 
3292 		qede_update_rx_prod(edev, fp->rxq);
3293 
3294 		for (tc = 0; tc < edev->num_tc; tc++) {
3295 			struct qede_tx_queue *txq = &fp->txqs[tc];
3296 			int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3297 
3298 			memset(&q_params, 0, sizeof(q_params));
3299 			q_params.rss_id = i;
3300 			q_params.queue_id = txq_index;
3301 			q_params.vport_id = 0;
3302 			q_params.sb = fp->sb_info->igu_sb_id;
3303 			q_params.sb_idx = TX_PI(tc);
3304 
3305 			rc = edev->ops->q_tx_start(cdev, &q_params,
3306 						   txq->tx_pbl.pbl.p_phys_table,
3307 						   txq->tx_pbl.page_cnt,
3308 						   &txq->doorbell_addr);
3309 			if (rc) {
3310 				DP_ERR(edev, "Start TXQ #%d failed %d\n",
3311 				       txq_index, rc);
3312 				return rc;
3313 			}
3314 
3315 			txq->hw_cons_ptr =
3316 				&fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3317 			SET_FIELD(txq->tx_db.data.params,
3318 				  ETH_DB_DATA_DEST, DB_DEST_XCM);
3319 			SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3320 				  DB_AGG_CMD_SET);
3321 			SET_FIELD(txq->tx_db.data.params,
3322 				  ETH_DB_DATA_AGG_VAL_SEL,
3323 				  DQ_XCM_ETH_TX_BD_PROD_CMD);
3324 
3325 			txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3326 		}
3327 	}
3328 
3329 	/* Prepare and send the vport enable */
3330 	memset(&vport_update_params, 0, sizeof(vport_update_params));
3331 	vport_update_params.vport_id = start.vport_id;
3332 	vport_update_params.update_vport_active_flg = 1;
3333 	vport_update_params.vport_active_flg = 1;
3334 
3335 	if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3336 	    qed_info->tx_switching) {
3337 		vport_update_params.update_tx_switching_flg = 1;
3338 		vport_update_params.tx_switching_flg = 1;
3339 	}
3340 
3341 	/* Fill struct with RSS params */
3342 	if (QEDE_RSS_CNT(edev) > 1) {
3343 		vport_update_params.update_rss_flg = 1;
3344 
3345 		/* Need to validate current RSS config uses valid entries */
3346 		for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3347 			if (edev->rss_params.rss_ind_table[i] >=
3348 			    edev->num_rss) {
3349 				reset_rss_indir = true;
3350 				break;
3351 			}
3352 		}
3353 
3354 		if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3355 		    reset_rss_indir) {
3356 			u16 val;
3357 
3358 			for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3359 				u16 indir_val;
3360 
3361 				val = QEDE_RSS_CNT(edev);
3362 				indir_val = ethtool_rxfh_indir_default(i, val);
3363 				edev->rss_params.rss_ind_table[i] = indir_val;
3364 			}
3365 			edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3366 		}
3367 
3368 		if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3369 			netdev_rss_key_fill(edev->rss_params.rss_key,
3370 					    sizeof(edev->rss_params.rss_key));
3371 			edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3372 		}
3373 
3374 		if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3375 			edev->rss_params.rss_caps = QED_RSS_IPV4 |
3376 						    QED_RSS_IPV6 |
3377 						    QED_RSS_IPV4_TCP |
3378 						    QED_RSS_IPV6_TCP;
3379 			edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3380 		}
3381 
3382 		memcpy(&vport_update_params.rss_params, &edev->rss_params,
3383 		       sizeof(vport_update_params.rss_params));
3384 	} else {
3385 		memset(&vport_update_params.rss_params, 0,
3386 		       sizeof(vport_update_params.rss_params));
3387 	}
3388 
3389 	rc = edev->ops->vport_update(cdev, &vport_update_params);
3390 	if (rc) {
3391 		DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3392 		return rc;
3393 	}
3394 
3395 	return 0;
3396 }
3397 
3398 static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3399 				 enum qed_filter_xcast_params_type opcode,
3400 				 unsigned char *mac, int num_macs)
3401 {
3402 	struct qed_filter_params filter_cmd;
3403 	int i;
3404 
3405 	memset(&filter_cmd, 0, sizeof(filter_cmd));
3406 	filter_cmd.type = QED_FILTER_TYPE_MCAST;
3407 	filter_cmd.filter.mcast.type = opcode;
3408 	filter_cmd.filter.mcast.num = num_macs;
3409 
3410 	for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3411 		ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3412 
3413 	return edev->ops->filter_config(edev->cdev, &filter_cmd);
3414 }
3415 
3416 enum qede_unload_mode {
3417 	QEDE_UNLOAD_NORMAL,
3418 };
3419 
3420 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3421 {
3422 	struct qed_link_params link_params;
3423 	int rc;
3424 
3425 	DP_INFO(edev, "Starting qede unload\n");
3426 
3427 	mutex_lock(&edev->qede_lock);
3428 	edev->state = QEDE_STATE_CLOSED;
3429 
3430 	/* Close OS Tx */
3431 	netif_tx_disable(edev->ndev);
3432 	netif_carrier_off(edev->ndev);
3433 
3434 	/* Reset the link */
3435 	memset(&link_params, 0, sizeof(link_params));
3436 	link_params.link_up = false;
3437 	edev->ops->common->set_link(edev->cdev, &link_params);
3438 	rc = qede_stop_queues(edev);
3439 	if (rc) {
3440 		qede_sync_free_irqs(edev);
3441 		goto out;
3442 	}
3443 
3444 	DP_INFO(edev, "Stopped Queues\n");
3445 
3446 	qede_vlan_mark_nonconfigured(edev);
3447 	edev->ops->fastpath_stop(edev->cdev);
3448 
3449 	/* Release the interrupts */
3450 	qede_sync_free_irqs(edev);
3451 	edev->ops->common->set_fp_int(edev->cdev, 0);
3452 
3453 	qede_napi_disable_remove(edev);
3454 
3455 	qede_free_mem_load(edev);
3456 	qede_free_fp_array(edev);
3457 
3458 out:
3459 	mutex_unlock(&edev->qede_lock);
3460 	DP_INFO(edev, "Ending qede unload\n");
3461 }
3462 
3463 enum qede_load_mode {
3464 	QEDE_LOAD_NORMAL,
3465 	QEDE_LOAD_RELOAD,
3466 };
3467 
3468 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3469 {
3470 	struct qed_link_params link_params;
3471 	struct qed_link_output link_output;
3472 	int rc;
3473 
3474 	DP_INFO(edev, "Starting qede load\n");
3475 
3476 	rc = qede_set_num_queues(edev);
3477 	if (rc)
3478 		goto err0;
3479 
3480 	rc = qede_alloc_fp_array(edev);
3481 	if (rc)
3482 		goto err0;
3483 
3484 	qede_init_fp(edev);
3485 
3486 	rc = qede_alloc_mem_load(edev);
3487 	if (rc)
3488 		goto err1;
3489 	DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3490 		QEDE_RSS_CNT(edev), edev->num_tc);
3491 
3492 	rc = qede_set_real_num_queues(edev);
3493 	if (rc)
3494 		goto err2;
3495 
3496 	qede_napi_add_enable(edev);
3497 	DP_INFO(edev, "Napi added and enabled\n");
3498 
3499 	rc = qede_setup_irqs(edev);
3500 	if (rc)
3501 		goto err3;
3502 	DP_INFO(edev, "Setup IRQs succeeded\n");
3503 
3504 	rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
3505 	if (rc)
3506 		goto err4;
3507 	DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3508 
3509 	/* Add primary mac and set Rx filters */
3510 	ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3511 
3512 	mutex_lock(&edev->qede_lock);
3513 	edev->state = QEDE_STATE_OPEN;
3514 	mutex_unlock(&edev->qede_lock);
3515 
3516 	/* Program un-configured VLANs */
3517 	qede_configure_vlan_filters(edev);
3518 
3519 	/* Ask for link-up using current configuration */
3520 	memset(&link_params, 0, sizeof(link_params));
3521 	link_params.link_up = true;
3522 	edev->ops->common->set_link(edev->cdev, &link_params);
3523 
3524 	/* Query whether link is already-up */
3525 	memset(&link_output, 0, sizeof(link_output));
3526 	edev->ops->common->get_link(edev->cdev, &link_output);
3527 	qede_link_update(edev, &link_output);
3528 
3529 	DP_INFO(edev, "Ending successfully qede load\n");
3530 
3531 	return 0;
3532 
3533 err4:
3534 	qede_sync_free_irqs(edev);
3535 	memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3536 err3:
3537 	qede_napi_disable_remove(edev);
3538 err2:
3539 	qede_free_mem_load(edev);
3540 err1:
3541 	edev->ops->common->set_fp_int(edev->cdev, 0);
3542 	qede_free_fp_array(edev);
3543 	edev->num_rss = 0;
3544 err0:
3545 	return rc;
3546 }
3547 
3548 void qede_reload(struct qede_dev *edev,
3549 		 void (*func)(struct qede_dev *, union qede_reload_args *),
3550 		 union qede_reload_args *args)
3551 {
3552 	qede_unload(edev, QEDE_UNLOAD_NORMAL);
3553 	/* Call function handler to update parameters
3554 	 * needed for function load.
3555 	 */
3556 	if (func)
3557 		func(edev, args);
3558 
3559 	qede_load(edev, QEDE_LOAD_RELOAD);
3560 
3561 	mutex_lock(&edev->qede_lock);
3562 	qede_config_rx_mode(edev->ndev);
3563 	mutex_unlock(&edev->qede_lock);
3564 }
3565 
3566 /* called with rtnl_lock */
3567 static int qede_open(struct net_device *ndev)
3568 {
3569 	struct qede_dev *edev = netdev_priv(ndev);
3570 	int rc;
3571 
3572 	netif_carrier_off(ndev);
3573 
3574 	edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3575 
3576 	rc = qede_load(edev, QEDE_LOAD_NORMAL);
3577 
3578 	if (rc)
3579 		return rc;
3580 
3581 #ifdef CONFIG_QEDE_VXLAN
3582 	vxlan_get_rx_port(ndev);
3583 #endif
3584 #ifdef CONFIG_QEDE_GENEVE
3585 	geneve_get_rx_port(ndev);
3586 #endif
3587 	return 0;
3588 }
3589 
3590 static int qede_close(struct net_device *ndev)
3591 {
3592 	struct qede_dev *edev = netdev_priv(ndev);
3593 
3594 	qede_unload(edev, QEDE_UNLOAD_NORMAL);
3595 
3596 	return 0;
3597 }
3598 
3599 static void qede_link_update(void *dev, struct qed_link_output *link)
3600 {
3601 	struct qede_dev *edev = dev;
3602 
3603 	if (!netif_running(edev->ndev)) {
3604 		DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3605 		return;
3606 	}
3607 
3608 	if (link->link_up) {
3609 		if (!netif_carrier_ok(edev->ndev)) {
3610 			DP_NOTICE(edev, "Link is up\n");
3611 			netif_tx_start_all_queues(edev->ndev);
3612 			netif_carrier_on(edev->ndev);
3613 		}
3614 	} else {
3615 		if (netif_carrier_ok(edev->ndev)) {
3616 			DP_NOTICE(edev, "Link is down\n");
3617 			netif_tx_disable(edev->ndev);
3618 			netif_carrier_off(edev->ndev);
3619 		}
3620 	}
3621 }
3622 
3623 static int qede_set_mac_addr(struct net_device *ndev, void *p)
3624 {
3625 	struct qede_dev *edev = netdev_priv(ndev);
3626 	struct sockaddr *addr = p;
3627 	int rc;
3628 
3629 	ASSERT_RTNL(); /* @@@TBD To be removed */
3630 
3631 	DP_INFO(edev, "Set_mac_addr called\n");
3632 
3633 	if (!is_valid_ether_addr(addr->sa_data)) {
3634 		DP_NOTICE(edev, "The MAC address is not valid\n");
3635 		return -EFAULT;
3636 	}
3637 
3638 	if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3639 		DP_NOTICE(edev, "qed prevents setting MAC\n");
3640 		return -EINVAL;
3641 	}
3642 
3643 	ether_addr_copy(ndev->dev_addr, addr->sa_data);
3644 
3645 	if (!netif_running(ndev))  {
3646 		DP_NOTICE(edev, "The device is currently down\n");
3647 		return 0;
3648 	}
3649 
3650 	/* Remove the previous primary mac */
3651 	rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3652 				   edev->primary_mac);
3653 	if (rc)
3654 		return rc;
3655 
3656 	/* Add MAC filter according to the new unicast HW MAC address */
3657 	ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3658 	return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3659 				      edev->primary_mac);
3660 }
3661 
3662 static int
3663 qede_configure_mcast_filtering(struct net_device *ndev,
3664 			       enum qed_filter_rx_mode_type *accept_flags)
3665 {
3666 	struct qede_dev *edev = netdev_priv(ndev);
3667 	unsigned char *mc_macs, *temp;
3668 	struct netdev_hw_addr *ha;
3669 	int rc = 0, mc_count;
3670 	size_t size;
3671 
3672 	size = 64 * ETH_ALEN;
3673 
3674 	mc_macs = kzalloc(size, GFP_KERNEL);
3675 	if (!mc_macs) {
3676 		DP_NOTICE(edev,
3677 			  "Failed to allocate memory for multicast MACs\n");
3678 		rc = -ENOMEM;
3679 		goto exit;
3680 	}
3681 
3682 	temp = mc_macs;
3683 
3684 	/* Remove all previously configured MAC filters */
3685 	rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3686 				   mc_macs, 1);
3687 	if (rc)
3688 		goto exit;
3689 
3690 	netif_addr_lock_bh(ndev);
3691 
3692 	mc_count = netdev_mc_count(ndev);
3693 	if (mc_count < 64) {
3694 		netdev_for_each_mc_addr(ha, ndev) {
3695 			ether_addr_copy(temp, ha->addr);
3696 			temp += ETH_ALEN;
3697 		}
3698 	}
3699 
3700 	netif_addr_unlock_bh(ndev);
3701 
3702 	/* Check for all multicast @@@TBD resource allocation */
3703 	if ((ndev->flags & IFF_ALLMULTI) ||
3704 	    (mc_count > 64)) {
3705 		if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3706 			*accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3707 	} else {
3708 		/* Add all multicast MAC filters */
3709 		rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3710 					   mc_macs, mc_count);
3711 	}
3712 
3713 exit:
3714 	kfree(mc_macs);
3715 	return rc;
3716 }
3717 
3718 static void qede_set_rx_mode(struct net_device *ndev)
3719 {
3720 	struct qede_dev *edev = netdev_priv(ndev);
3721 
3722 	DP_INFO(edev, "qede_set_rx_mode called\n");
3723 
3724 	if (edev->state != QEDE_STATE_OPEN) {
3725 		DP_INFO(edev,
3726 			"qede_set_rx_mode called while interface is down\n");
3727 	} else {
3728 		set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3729 		schedule_delayed_work(&edev->sp_task, 0);
3730 	}
3731 }
3732 
3733 /* Must be called with qede_lock held */
3734 static void qede_config_rx_mode(struct net_device *ndev)
3735 {
3736 	enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3737 	struct qede_dev *edev = netdev_priv(ndev);
3738 	struct qed_filter_params rx_mode;
3739 	unsigned char *uc_macs, *temp;
3740 	struct netdev_hw_addr *ha;
3741 	int rc, uc_count;
3742 	size_t size;
3743 
3744 	netif_addr_lock_bh(ndev);
3745 
3746 	uc_count = netdev_uc_count(ndev);
3747 	size = uc_count * ETH_ALEN;
3748 
3749 	uc_macs = kzalloc(size, GFP_ATOMIC);
3750 	if (!uc_macs) {
3751 		DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3752 		netif_addr_unlock_bh(ndev);
3753 		return;
3754 	}
3755 
3756 	temp = uc_macs;
3757 	netdev_for_each_uc_addr(ha, ndev) {
3758 		ether_addr_copy(temp, ha->addr);
3759 		temp += ETH_ALEN;
3760 	}
3761 
3762 	netif_addr_unlock_bh(ndev);
3763 
3764 	/* Configure the struct for the Rx mode */
3765 	memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3766 	rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3767 
3768 	/* Remove all previous unicast secondary macs and multicast macs
3769 	 * (configrue / leave the primary mac)
3770 	 */
3771 	rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3772 				   edev->primary_mac);
3773 	if (rc)
3774 		goto out;
3775 
3776 	/* Check for promiscuous */
3777 	if ((ndev->flags & IFF_PROMISC) ||
3778 	    (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3779 		accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3780 	} else {
3781 		/* Add MAC filters according to the unicast secondary macs */
3782 		int i;
3783 
3784 		temp = uc_macs;
3785 		for (i = 0; i < uc_count; i++) {
3786 			rc = qede_set_ucast_rx_mac(edev,
3787 						   QED_FILTER_XCAST_TYPE_ADD,
3788 						   temp);
3789 			if (rc)
3790 				goto out;
3791 
3792 			temp += ETH_ALEN;
3793 		}
3794 
3795 		rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3796 		if (rc)
3797 			goto out;
3798 	}
3799 
3800 	/* take care of VLAN mode */
3801 	if (ndev->flags & IFF_PROMISC) {
3802 		qede_config_accept_any_vlan(edev, true);
3803 	} else if (!edev->non_configured_vlans) {
3804 		/* It's possible that accept_any_vlan mode is set due to a
3805 		 * previous setting of IFF_PROMISC. If vlan credits are
3806 		 * sufficient, disable accept_any_vlan.
3807 		 */
3808 		qede_config_accept_any_vlan(edev, false);
3809 	}
3810 
3811 	rx_mode.filter.accept_flags = accept_flags;
3812 	edev->ops->filter_config(edev->cdev, &rx_mode);
3813 out:
3814 	kfree(uc_macs);
3815 }
3816