1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/crash_dump.h> 8 #include <linux/module.h> 9 #include <linux/pci.h> 10 #include <linux/version.h> 11 #include <linux/device.h> 12 #include <linux/netdevice.h> 13 #include <linux/etherdevice.h> 14 #include <linux/skbuff.h> 15 #include <linux/errno.h> 16 #include <linux/list.h> 17 #include <linux/string.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/interrupt.h> 20 #include <asm/byteorder.h> 21 #include <asm/param.h> 22 #include <linux/io.h> 23 #include <linux/netdev_features.h> 24 #include <linux/udp.h> 25 #include <linux/tcp.h> 26 #include <net/udp_tunnel.h> 27 #include <linux/ip.h> 28 #include <net/ipv6.h> 29 #include <net/tcp.h> 30 #include <linux/if_ether.h> 31 #include <linux/if_vlan.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/ethtool.h> 34 #include <linux/in.h> 35 #include <linux/random.h> 36 #include <net/ip6_checksum.h> 37 #include <linux/bitops.h> 38 #include <linux/vmalloc.h> 39 #include <linux/aer.h> 40 #include "qede.h" 41 #include "qede_ptp.h" 42 43 static char version[] = 44 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 45 46 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 47 MODULE_LICENSE("GPL"); 48 MODULE_VERSION(DRV_MODULE_VERSION); 49 50 static uint debug; 51 module_param(debug, uint, 0); 52 MODULE_PARM_DESC(debug, " Default debug msglevel"); 53 54 static const struct qed_eth_ops *qed_ops; 55 56 #define CHIP_NUM_57980S_40 0x1634 57 #define CHIP_NUM_57980S_10 0x1666 58 #define CHIP_NUM_57980S_MF 0x1636 59 #define CHIP_NUM_57980S_100 0x1644 60 #define CHIP_NUM_57980S_50 0x1654 61 #define CHIP_NUM_57980S_25 0x1656 62 #define CHIP_NUM_57980S_IOV 0x1664 63 #define CHIP_NUM_AH 0x8070 64 #define CHIP_NUM_AH_IOV 0x8090 65 66 #ifndef PCI_DEVICE_ID_NX2_57980E 67 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 68 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 69 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 70 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 71 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 72 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 73 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 74 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 75 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 76 77 #endif 78 79 enum qede_pci_private { 80 QEDE_PRIVATE_PF, 81 QEDE_PRIVATE_VF 82 }; 83 84 static const struct pci_device_id qede_pci_tbl[] = { 85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 91 #ifdef CONFIG_QED_SRIOV 92 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 93 #endif 94 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 95 #ifdef CONFIG_QED_SRIOV 96 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 97 #endif 98 { 0 } 99 }; 100 101 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 102 103 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 104 static pci_ers_result_t 105 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 106 107 #define TX_TIMEOUT (5 * HZ) 108 109 /* Utilize last protocol index for XDP */ 110 #define XDP_PI 11 111 112 static void qede_remove(struct pci_dev *pdev); 113 static void qede_shutdown(struct pci_dev *pdev); 114 static void qede_link_update(void *dev, struct qed_link_output *link); 115 static void qede_schedule_recovery_handler(void *dev); 116 static void qede_recovery_handler(struct qede_dev *edev); 117 static void qede_schedule_hw_err_handler(void *dev, 118 enum qed_hw_err_type err_type); 119 static void qede_get_eth_tlv_data(void *edev, void *data); 120 static void qede_get_generic_tlv_data(void *edev, 121 struct qed_generic_tlvs *data); 122 static void qede_generic_hw_err_handler(struct qede_dev *edev); 123 #ifdef CONFIG_QED_SRIOV 124 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 125 __be16 vlan_proto) 126 { 127 struct qede_dev *edev = netdev_priv(ndev); 128 129 if (vlan > 4095) { 130 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 131 return -EINVAL; 132 } 133 134 if (vlan_proto != htons(ETH_P_8021Q)) 135 return -EPROTONOSUPPORT; 136 137 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 138 vlan, vf); 139 140 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 141 } 142 143 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 144 { 145 struct qede_dev *edev = netdev_priv(ndev); 146 147 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx); 148 149 if (!is_valid_ether_addr(mac)) { 150 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 151 return -EINVAL; 152 } 153 154 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 155 } 156 157 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 158 { 159 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 160 struct qed_dev_info *qed_info = &edev->dev_info.common; 161 struct qed_update_vport_params *vport_params; 162 int rc; 163 164 vport_params = vzalloc(sizeof(*vport_params)); 165 if (!vport_params) 166 return -ENOMEM; 167 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 168 169 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 170 171 /* Enable/Disable Tx switching for PF */ 172 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 173 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 174 vport_params->vport_id = 0; 175 vport_params->update_tx_switching_flg = 1; 176 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 177 edev->ops->vport_update(edev->cdev, vport_params); 178 } 179 180 vfree(vport_params); 181 return rc; 182 } 183 #endif 184 185 static const struct pci_error_handlers qede_err_handler = { 186 .error_detected = qede_io_error_detected, 187 }; 188 189 static struct pci_driver qede_pci_driver = { 190 .name = "qede", 191 .id_table = qede_pci_tbl, 192 .probe = qede_probe, 193 .remove = qede_remove, 194 .shutdown = qede_shutdown, 195 #ifdef CONFIG_QED_SRIOV 196 .sriov_configure = qede_sriov_configure, 197 #endif 198 .err_handler = &qede_err_handler, 199 }; 200 201 static struct qed_eth_cb_ops qede_ll_ops = { 202 { 203 #ifdef CONFIG_RFS_ACCEL 204 .arfs_filter_op = qede_arfs_filter_op, 205 #endif 206 .link_update = qede_link_update, 207 .schedule_recovery_handler = qede_schedule_recovery_handler, 208 .schedule_hw_err_handler = qede_schedule_hw_err_handler, 209 .get_generic_tlv_data = qede_get_generic_tlv_data, 210 .get_protocol_tlv_data = qede_get_eth_tlv_data, 211 }, 212 .force_mac = qede_force_mac, 213 .ports_update = qede_udp_ports_update, 214 }; 215 216 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 217 void *ptr) 218 { 219 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 220 struct ethtool_drvinfo drvinfo; 221 struct qede_dev *edev; 222 223 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 224 goto done; 225 226 /* Check whether this is a qede device */ 227 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 228 goto done; 229 230 memset(&drvinfo, 0, sizeof(drvinfo)); 231 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 232 if (strcmp(drvinfo.driver, "qede")) 233 goto done; 234 edev = netdev_priv(ndev); 235 236 switch (event) { 237 case NETDEV_CHANGENAME: 238 /* Notify qed of the name change */ 239 if (!edev->ops || !edev->ops->common) 240 goto done; 241 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 242 break; 243 case NETDEV_CHANGEADDR: 244 edev = netdev_priv(ndev); 245 qede_rdma_event_changeaddr(edev); 246 break; 247 } 248 249 done: 250 return NOTIFY_DONE; 251 } 252 253 static struct notifier_block qede_netdev_notifier = { 254 .notifier_call = qede_netdev_event, 255 }; 256 257 static 258 int __init qede_init(void) 259 { 260 int ret; 261 262 pr_info("qede_init: %s\n", version); 263 264 qede_forced_speed_maps_init(); 265 266 qed_ops = qed_get_eth_ops(); 267 if (!qed_ops) { 268 pr_notice("Failed to get qed ethtool operations\n"); 269 return -EINVAL; 270 } 271 272 /* Must register notifier before pci ops, since we might miss 273 * interface rename after pci probe and netdev registration. 274 */ 275 ret = register_netdevice_notifier(&qede_netdev_notifier); 276 if (ret) { 277 pr_notice("Failed to register netdevice_notifier\n"); 278 qed_put_eth_ops(); 279 return -EINVAL; 280 } 281 282 ret = pci_register_driver(&qede_pci_driver); 283 if (ret) { 284 pr_notice("Failed to register driver\n"); 285 unregister_netdevice_notifier(&qede_netdev_notifier); 286 qed_put_eth_ops(); 287 return -EINVAL; 288 } 289 290 return 0; 291 } 292 293 static void __exit qede_cleanup(void) 294 { 295 if (debug & QED_LOG_INFO_MASK) 296 pr_info("qede_cleanup called\n"); 297 298 unregister_netdevice_notifier(&qede_netdev_notifier); 299 pci_unregister_driver(&qede_pci_driver); 300 qed_put_eth_ops(); 301 } 302 303 module_init(qede_init); 304 module_exit(qede_cleanup); 305 306 static int qede_open(struct net_device *ndev); 307 static int qede_close(struct net_device *ndev); 308 309 void qede_fill_by_demand_stats(struct qede_dev *edev) 310 { 311 struct qede_stats_common *p_common = &edev->stats.common; 312 struct qed_eth_stats stats; 313 314 edev->ops->get_vport_stats(edev->cdev, &stats); 315 316 p_common->no_buff_discards = stats.common.no_buff_discards; 317 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 318 p_common->ttl0_discard = stats.common.ttl0_discard; 319 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 320 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 321 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 322 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 323 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 324 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 325 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 326 p_common->mac_filter_discards = stats.common.mac_filter_discards; 327 p_common->gft_filter_drop = stats.common.gft_filter_drop; 328 329 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 330 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 331 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 332 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 333 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 334 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 335 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 336 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 337 p_common->coalesced_events = stats.common.tpa_coalesced_events; 338 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 339 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 340 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 341 342 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 343 p_common->rx_65_to_127_byte_packets = 344 stats.common.rx_65_to_127_byte_packets; 345 p_common->rx_128_to_255_byte_packets = 346 stats.common.rx_128_to_255_byte_packets; 347 p_common->rx_256_to_511_byte_packets = 348 stats.common.rx_256_to_511_byte_packets; 349 p_common->rx_512_to_1023_byte_packets = 350 stats.common.rx_512_to_1023_byte_packets; 351 p_common->rx_1024_to_1518_byte_packets = 352 stats.common.rx_1024_to_1518_byte_packets; 353 p_common->rx_crc_errors = stats.common.rx_crc_errors; 354 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 355 p_common->rx_pause_frames = stats.common.rx_pause_frames; 356 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 357 p_common->rx_align_errors = stats.common.rx_align_errors; 358 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 359 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 360 p_common->rx_jabbers = stats.common.rx_jabbers; 361 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 362 p_common->rx_fragments = stats.common.rx_fragments; 363 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 364 p_common->tx_65_to_127_byte_packets = 365 stats.common.tx_65_to_127_byte_packets; 366 p_common->tx_128_to_255_byte_packets = 367 stats.common.tx_128_to_255_byte_packets; 368 p_common->tx_256_to_511_byte_packets = 369 stats.common.tx_256_to_511_byte_packets; 370 p_common->tx_512_to_1023_byte_packets = 371 stats.common.tx_512_to_1023_byte_packets; 372 p_common->tx_1024_to_1518_byte_packets = 373 stats.common.tx_1024_to_1518_byte_packets; 374 p_common->tx_pause_frames = stats.common.tx_pause_frames; 375 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 376 p_common->brb_truncates = stats.common.brb_truncates; 377 p_common->brb_discards = stats.common.brb_discards; 378 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 379 p_common->link_change_count = stats.common.link_change_count; 380 p_common->ptp_skip_txts = edev->ptp_skip_txts; 381 382 if (QEDE_IS_BB(edev)) { 383 struct qede_stats_bb *p_bb = &edev->stats.bb; 384 385 p_bb->rx_1519_to_1522_byte_packets = 386 stats.bb.rx_1519_to_1522_byte_packets; 387 p_bb->rx_1519_to_2047_byte_packets = 388 stats.bb.rx_1519_to_2047_byte_packets; 389 p_bb->rx_2048_to_4095_byte_packets = 390 stats.bb.rx_2048_to_4095_byte_packets; 391 p_bb->rx_4096_to_9216_byte_packets = 392 stats.bb.rx_4096_to_9216_byte_packets; 393 p_bb->rx_9217_to_16383_byte_packets = 394 stats.bb.rx_9217_to_16383_byte_packets; 395 p_bb->tx_1519_to_2047_byte_packets = 396 stats.bb.tx_1519_to_2047_byte_packets; 397 p_bb->tx_2048_to_4095_byte_packets = 398 stats.bb.tx_2048_to_4095_byte_packets; 399 p_bb->tx_4096_to_9216_byte_packets = 400 stats.bb.tx_4096_to_9216_byte_packets; 401 p_bb->tx_9217_to_16383_byte_packets = 402 stats.bb.tx_9217_to_16383_byte_packets; 403 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 404 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 405 } else { 406 struct qede_stats_ah *p_ah = &edev->stats.ah; 407 408 p_ah->rx_1519_to_max_byte_packets = 409 stats.ah.rx_1519_to_max_byte_packets; 410 p_ah->tx_1519_to_max_byte_packets = 411 stats.ah.tx_1519_to_max_byte_packets; 412 } 413 } 414 415 static void qede_get_stats64(struct net_device *dev, 416 struct rtnl_link_stats64 *stats) 417 { 418 struct qede_dev *edev = netdev_priv(dev); 419 struct qede_stats_common *p_common; 420 421 qede_fill_by_demand_stats(edev); 422 p_common = &edev->stats.common; 423 424 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 425 p_common->rx_bcast_pkts; 426 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 427 p_common->tx_bcast_pkts; 428 429 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 430 p_common->rx_bcast_bytes; 431 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 432 p_common->tx_bcast_bytes; 433 434 stats->tx_errors = p_common->tx_err_drop_pkts; 435 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 436 437 stats->rx_fifo_errors = p_common->no_buff_discards; 438 439 if (QEDE_IS_BB(edev)) 440 stats->collisions = edev->stats.bb.tx_total_collisions; 441 stats->rx_crc_errors = p_common->rx_crc_errors; 442 stats->rx_frame_errors = p_common->rx_align_errors; 443 } 444 445 #ifdef CONFIG_QED_SRIOV 446 static int qede_get_vf_config(struct net_device *dev, int vfidx, 447 struct ifla_vf_info *ivi) 448 { 449 struct qede_dev *edev = netdev_priv(dev); 450 451 if (!edev->ops) 452 return -EINVAL; 453 454 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 455 } 456 457 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 458 int min_tx_rate, int max_tx_rate) 459 { 460 struct qede_dev *edev = netdev_priv(dev); 461 462 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 463 max_tx_rate); 464 } 465 466 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 467 { 468 struct qede_dev *edev = netdev_priv(dev); 469 470 if (!edev->ops) 471 return -EINVAL; 472 473 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 474 } 475 476 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 477 int link_state) 478 { 479 struct qede_dev *edev = netdev_priv(dev); 480 481 if (!edev->ops) 482 return -EINVAL; 483 484 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 485 } 486 487 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 488 { 489 struct qede_dev *edev = netdev_priv(dev); 490 491 if (!edev->ops) 492 return -EINVAL; 493 494 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 495 } 496 #endif 497 498 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 499 { 500 struct qede_dev *edev = netdev_priv(dev); 501 502 if (!netif_running(dev)) 503 return -EAGAIN; 504 505 switch (cmd) { 506 case SIOCSHWTSTAMP: 507 return qede_ptp_hw_ts(edev, ifr); 508 default: 509 DP_VERBOSE(edev, QED_MSG_DEBUG, 510 "default IOCTL cmd 0x%x\n", cmd); 511 return -EOPNOTSUPP; 512 } 513 514 return 0; 515 } 516 517 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq) 518 { 519 DP_NOTICE(edev, 520 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n", 521 txq->index, le16_to_cpu(*txq->hw_cons_ptr), 522 qed_chain_get_cons_idx(&txq->tx_pbl), 523 qed_chain_get_prod_idx(&txq->tx_pbl), 524 jiffies); 525 } 526 527 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue) 528 { 529 struct qede_dev *edev = netdev_priv(dev); 530 struct qede_tx_queue *txq; 531 int cos; 532 533 netif_carrier_off(dev); 534 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue); 535 536 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX)) 537 return; 538 539 for_each_cos_in_txq(edev, cos) { 540 txq = &edev->fp_array[txqueue].txq[cos]; 541 542 if (qed_chain_get_cons_idx(&txq->tx_pbl) != 543 qed_chain_get_prod_idx(&txq->tx_pbl)) 544 qede_tx_log_print(edev, txq); 545 } 546 547 if (IS_VF(edev)) 548 return; 549 550 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 551 edev->state == QEDE_STATE_RECOVERY) { 552 DP_INFO(edev, 553 "Avoid handling a Tx timeout while another HW error is being handled\n"); 554 return; 555 } 556 557 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags); 558 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 559 schedule_delayed_work(&edev->sp_task, 0); 560 } 561 562 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 563 { 564 struct qede_dev *edev = netdev_priv(ndev); 565 int cos, count, offset; 566 567 if (num_tc > edev->dev_info.num_tc) 568 return -EINVAL; 569 570 netdev_reset_tc(ndev); 571 netdev_set_num_tc(ndev, num_tc); 572 573 for_each_cos_in_txq(edev, cos) { 574 count = QEDE_TSS_COUNT(edev); 575 offset = cos * QEDE_TSS_COUNT(edev); 576 netdev_set_tc_queue(ndev, cos, count, offset); 577 } 578 579 return 0; 580 } 581 582 static int 583 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 584 __be16 proto) 585 { 586 switch (f->command) { 587 case FLOW_CLS_REPLACE: 588 return qede_add_tc_flower_fltr(edev, proto, f); 589 case FLOW_CLS_DESTROY: 590 return qede_delete_flow_filter(edev, f->cookie); 591 default: 592 return -EOPNOTSUPP; 593 } 594 } 595 596 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 597 void *cb_priv) 598 { 599 struct flow_cls_offload *f; 600 struct qede_dev *edev = cb_priv; 601 602 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 603 return -EOPNOTSUPP; 604 605 switch (type) { 606 case TC_SETUP_CLSFLOWER: 607 f = type_data; 608 return qede_set_flower(edev, f, f->common.protocol); 609 default: 610 return -EOPNOTSUPP; 611 } 612 } 613 614 static LIST_HEAD(qede_block_cb_list); 615 616 static int 617 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 618 void *type_data) 619 { 620 struct qede_dev *edev = netdev_priv(dev); 621 struct tc_mqprio_qopt *mqprio; 622 623 switch (type) { 624 case TC_SETUP_BLOCK: 625 return flow_block_cb_setup_simple(type_data, 626 &qede_block_cb_list, 627 qede_setup_tc_block_cb, 628 edev, edev, true); 629 case TC_SETUP_QDISC_MQPRIO: 630 mqprio = type_data; 631 632 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 633 return qede_setup_tc(dev, mqprio->num_tc); 634 default: 635 return -EOPNOTSUPP; 636 } 637 } 638 639 static const struct net_device_ops qede_netdev_ops = { 640 .ndo_open = qede_open, 641 .ndo_stop = qede_close, 642 .ndo_start_xmit = qede_start_xmit, 643 .ndo_select_queue = qede_select_queue, 644 .ndo_set_rx_mode = qede_set_rx_mode, 645 .ndo_set_mac_address = qede_set_mac_addr, 646 .ndo_validate_addr = eth_validate_addr, 647 .ndo_change_mtu = qede_change_mtu, 648 .ndo_do_ioctl = qede_ioctl, 649 .ndo_tx_timeout = qede_tx_timeout, 650 #ifdef CONFIG_QED_SRIOV 651 .ndo_set_vf_mac = qede_set_vf_mac, 652 .ndo_set_vf_vlan = qede_set_vf_vlan, 653 .ndo_set_vf_trust = qede_set_vf_trust, 654 #endif 655 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 656 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 657 .ndo_fix_features = qede_fix_features, 658 .ndo_set_features = qede_set_features, 659 .ndo_get_stats64 = qede_get_stats64, 660 #ifdef CONFIG_QED_SRIOV 661 .ndo_set_vf_link_state = qede_set_vf_link_state, 662 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 663 .ndo_get_vf_config = qede_get_vf_config, 664 .ndo_set_vf_rate = qede_set_vf_rate, 665 #endif 666 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 667 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 668 .ndo_features_check = qede_features_check, 669 .ndo_bpf = qede_xdp, 670 #ifdef CONFIG_RFS_ACCEL 671 .ndo_rx_flow_steer = qede_rx_flow_steer, 672 #endif 673 .ndo_xdp_xmit = qede_xdp_transmit, 674 .ndo_setup_tc = qede_setup_tc_offload, 675 }; 676 677 static const struct net_device_ops qede_netdev_vf_ops = { 678 .ndo_open = qede_open, 679 .ndo_stop = qede_close, 680 .ndo_start_xmit = qede_start_xmit, 681 .ndo_select_queue = qede_select_queue, 682 .ndo_set_rx_mode = qede_set_rx_mode, 683 .ndo_set_mac_address = qede_set_mac_addr, 684 .ndo_validate_addr = eth_validate_addr, 685 .ndo_change_mtu = qede_change_mtu, 686 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 687 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 688 .ndo_fix_features = qede_fix_features, 689 .ndo_set_features = qede_set_features, 690 .ndo_get_stats64 = qede_get_stats64, 691 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 692 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 693 .ndo_features_check = qede_features_check, 694 }; 695 696 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 697 .ndo_open = qede_open, 698 .ndo_stop = qede_close, 699 .ndo_start_xmit = qede_start_xmit, 700 .ndo_select_queue = qede_select_queue, 701 .ndo_set_rx_mode = qede_set_rx_mode, 702 .ndo_set_mac_address = qede_set_mac_addr, 703 .ndo_validate_addr = eth_validate_addr, 704 .ndo_change_mtu = qede_change_mtu, 705 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 706 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 707 .ndo_fix_features = qede_fix_features, 708 .ndo_set_features = qede_set_features, 709 .ndo_get_stats64 = qede_get_stats64, 710 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 711 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 712 .ndo_features_check = qede_features_check, 713 .ndo_bpf = qede_xdp, 714 .ndo_xdp_xmit = qede_xdp_transmit, 715 }; 716 717 /* ------------------------------------------------------------------------- 718 * START OF PROBE / REMOVE 719 * ------------------------------------------------------------------------- 720 */ 721 722 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 723 struct pci_dev *pdev, 724 struct qed_dev_eth_info *info, 725 u32 dp_module, u8 dp_level) 726 { 727 struct net_device *ndev; 728 struct qede_dev *edev; 729 730 ndev = alloc_etherdev_mqs(sizeof(*edev), 731 info->num_queues * info->num_tc, 732 info->num_queues); 733 if (!ndev) { 734 pr_err("etherdev allocation failed\n"); 735 return NULL; 736 } 737 738 edev = netdev_priv(ndev); 739 edev->ndev = ndev; 740 edev->cdev = cdev; 741 edev->pdev = pdev; 742 edev->dp_module = dp_module; 743 edev->dp_level = dp_level; 744 edev->ops = qed_ops; 745 746 if (is_kdump_kernel()) { 747 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN; 748 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN; 749 } else { 750 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 751 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 752 } 753 754 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 755 info->num_queues, info->num_queues); 756 757 SET_NETDEV_DEV(ndev, &pdev->dev); 758 759 memset(&edev->stats, 0, sizeof(edev->stats)); 760 memcpy(&edev->dev_info, info, sizeof(*info)); 761 762 /* As ethtool doesn't have the ability to show WoL behavior as 763 * 'default', if device supports it declare it's enabled. 764 */ 765 if (edev->dev_info.common.wol_support) 766 edev->wol_enabled = true; 767 768 INIT_LIST_HEAD(&edev->vlan_list); 769 770 return edev; 771 } 772 773 static void qede_init_ndev(struct qede_dev *edev) 774 { 775 struct net_device *ndev = edev->ndev; 776 struct pci_dev *pdev = edev->pdev; 777 bool udp_tunnel_enable = false; 778 netdev_features_t hw_features; 779 780 pci_set_drvdata(pdev, ndev); 781 782 ndev->mem_start = edev->dev_info.common.pci_mem_start; 783 ndev->base_addr = ndev->mem_start; 784 ndev->mem_end = edev->dev_info.common.pci_mem_end; 785 ndev->irq = edev->dev_info.common.pci_irq; 786 787 ndev->watchdog_timeo = TX_TIMEOUT; 788 789 if (IS_VF(edev)) { 790 if (edev->dev_info.xdp_supported) 791 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 792 else 793 ndev->netdev_ops = &qede_netdev_vf_ops; 794 } else { 795 ndev->netdev_ops = &qede_netdev_ops; 796 } 797 798 qede_set_ethtool_ops(ndev); 799 800 ndev->priv_flags |= IFF_UNICAST_FLT; 801 802 /* user-changeble features */ 803 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 804 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 805 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 806 807 if (edev->dev_info.common.b_arfs_capable) 808 hw_features |= NETIF_F_NTUPLE; 809 810 if (edev->dev_info.common.vxlan_enable || 811 edev->dev_info.common.geneve_enable) 812 udp_tunnel_enable = true; 813 814 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 815 hw_features |= NETIF_F_TSO_ECN; 816 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 817 NETIF_F_SG | NETIF_F_TSO | 818 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 819 NETIF_F_RXCSUM; 820 } 821 822 if (udp_tunnel_enable) { 823 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 824 NETIF_F_GSO_UDP_TUNNEL_CSUM); 825 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 826 NETIF_F_GSO_UDP_TUNNEL_CSUM); 827 828 qede_set_udp_tunnels(edev); 829 } 830 831 if (edev->dev_info.common.gre_enable) { 832 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 833 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 834 NETIF_F_GSO_GRE_CSUM); 835 } 836 837 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 838 NETIF_F_HIGHDMA; 839 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 840 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 841 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 842 843 ndev->hw_features = hw_features; 844 845 /* MTU range: 46 - 9600 */ 846 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 847 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 848 849 /* Set network device HW mac */ 850 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 851 852 ndev->mtu = edev->dev_info.common.mtu; 853 } 854 855 /* This function converts from 32b param to two params of level and module 856 * Input 32b decoding: 857 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 858 * 'happy' flow, e.g. memory allocation failed. 859 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 860 * and provide important parameters. 861 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 862 * module. VERBOSE prints are for tracking the specific flow in low level. 863 * 864 * Notice that the level should be that of the lowest required logs. 865 */ 866 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 867 { 868 *p_dp_level = QED_LEVEL_NOTICE; 869 *p_dp_module = 0; 870 871 if (debug & QED_LOG_VERBOSE_MASK) { 872 *p_dp_level = QED_LEVEL_VERBOSE; 873 *p_dp_module = (debug & 0x3FFFFFFF); 874 } else if (debug & QED_LOG_INFO_MASK) { 875 *p_dp_level = QED_LEVEL_INFO; 876 } else if (debug & QED_LOG_NOTICE_MASK) { 877 *p_dp_level = QED_LEVEL_NOTICE; 878 } 879 } 880 881 static void qede_free_fp_array(struct qede_dev *edev) 882 { 883 if (edev->fp_array) { 884 struct qede_fastpath *fp; 885 int i; 886 887 for_each_queue(i) { 888 fp = &edev->fp_array[i]; 889 890 kfree(fp->sb_info); 891 /* Handle mem alloc failure case where qede_init_fp 892 * didn't register xdp_rxq_info yet. 893 * Implicit only (fp->type & QEDE_FASTPATH_RX) 894 */ 895 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 896 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 897 kfree(fp->rxq); 898 kfree(fp->xdp_tx); 899 kfree(fp->txq); 900 } 901 kfree(edev->fp_array); 902 } 903 904 edev->num_queues = 0; 905 edev->fp_num_tx = 0; 906 edev->fp_num_rx = 0; 907 } 908 909 static int qede_alloc_fp_array(struct qede_dev *edev) 910 { 911 u8 fp_combined, fp_rx = edev->fp_num_rx; 912 struct qede_fastpath *fp; 913 int i; 914 915 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 916 sizeof(*edev->fp_array), GFP_KERNEL); 917 if (!edev->fp_array) { 918 DP_NOTICE(edev, "fp array allocation failed\n"); 919 goto err; 920 } 921 922 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 923 924 /* Allocate the FP elements for Rx queues followed by combined and then 925 * the Tx. This ordering should be maintained so that the respective 926 * queues (Rx or Tx) will be together in the fastpath array and the 927 * associated ids will be sequential. 928 */ 929 for_each_queue(i) { 930 fp = &edev->fp_array[i]; 931 932 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 933 if (!fp->sb_info) { 934 DP_NOTICE(edev, "sb info struct allocation failed\n"); 935 goto err; 936 } 937 938 if (fp_rx) { 939 fp->type = QEDE_FASTPATH_RX; 940 fp_rx--; 941 } else if (fp_combined) { 942 fp->type = QEDE_FASTPATH_COMBINED; 943 fp_combined--; 944 } else { 945 fp->type = QEDE_FASTPATH_TX; 946 } 947 948 if (fp->type & QEDE_FASTPATH_TX) { 949 fp->txq = kcalloc(edev->dev_info.num_tc, 950 sizeof(*fp->txq), GFP_KERNEL); 951 if (!fp->txq) 952 goto err; 953 } 954 955 if (fp->type & QEDE_FASTPATH_RX) { 956 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 957 if (!fp->rxq) 958 goto err; 959 960 if (edev->xdp_prog) { 961 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 962 GFP_KERNEL); 963 if (!fp->xdp_tx) 964 goto err; 965 fp->type |= QEDE_FASTPATH_XDP; 966 } 967 } 968 } 969 970 return 0; 971 err: 972 qede_free_fp_array(edev); 973 return -ENOMEM; 974 } 975 976 /* The qede lock is used to protect driver state change and driver flows that 977 * are not reentrant. 978 */ 979 void __qede_lock(struct qede_dev *edev) 980 { 981 mutex_lock(&edev->qede_lock); 982 } 983 984 void __qede_unlock(struct qede_dev *edev) 985 { 986 mutex_unlock(&edev->qede_lock); 987 } 988 989 /* This version of the lock should be used when acquiring the RTNL lock is also 990 * needed in addition to the internal qede lock. 991 */ 992 static void qede_lock(struct qede_dev *edev) 993 { 994 rtnl_lock(); 995 __qede_lock(edev); 996 } 997 998 static void qede_unlock(struct qede_dev *edev) 999 { 1000 __qede_unlock(edev); 1001 rtnl_unlock(); 1002 } 1003 1004 static void qede_sp_task(struct work_struct *work) 1005 { 1006 struct qede_dev *edev = container_of(work, struct qede_dev, 1007 sp_task.work); 1008 1009 /* The locking scheme depends on the specific flag: 1010 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 1011 * ensure that ongoing flows are ended and new ones are not started. 1012 * In other cases - only the internal qede lock should be acquired. 1013 */ 1014 1015 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 1016 #ifdef CONFIG_QED_SRIOV 1017 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1018 * The recovery of the active VFs is currently not supported. 1019 */ 1020 if (pci_num_vf(edev->pdev)) 1021 qede_sriov_configure(edev->pdev, 0); 1022 #endif 1023 qede_lock(edev); 1024 qede_recovery_handler(edev); 1025 qede_unlock(edev); 1026 } 1027 1028 __qede_lock(edev); 1029 1030 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 1031 if (edev->state == QEDE_STATE_OPEN) 1032 qede_config_rx_mode(edev->ndev); 1033 1034 #ifdef CONFIG_RFS_ACCEL 1035 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1036 if (edev->state == QEDE_STATE_OPEN) 1037 qede_process_arfs_filters(edev, false); 1038 } 1039 #endif 1040 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags)) 1041 qede_generic_hw_err_handler(edev); 1042 __qede_unlock(edev); 1043 1044 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1045 #ifdef CONFIG_QED_SRIOV 1046 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1047 * The recovery of the active VFs is currently not supported. 1048 */ 1049 if (pci_num_vf(edev->pdev)) 1050 qede_sriov_configure(edev->pdev, 0); 1051 #endif 1052 edev->ops->common->recovery_process(edev->cdev); 1053 } 1054 } 1055 1056 static void qede_update_pf_params(struct qed_dev *cdev) 1057 { 1058 struct qed_pf_params pf_params; 1059 u16 num_cons; 1060 1061 /* 64 rx + 64 tx + 64 XDP */ 1062 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1063 1064 /* 1 rx + 1 xdp + max tx cos */ 1065 num_cons = QED_MIN_L2_CONS; 1066 1067 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1068 1069 /* Same for VFs - make sure they'll have sufficient connections 1070 * to support XDP Tx queues. 1071 */ 1072 pf_params.eth_pf_params.num_vf_cons = 48; 1073 1074 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1075 qed_ops->common->update_pf_params(cdev, &pf_params); 1076 } 1077 1078 #define QEDE_FW_VER_STR_SIZE 80 1079 1080 static void qede_log_probe(struct qede_dev *edev) 1081 { 1082 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1083 u8 buf[QEDE_FW_VER_STR_SIZE]; 1084 size_t left_size; 1085 1086 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1087 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1088 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1089 p_dev_info->fw_eng, 1090 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1091 QED_MFW_VERSION_3_OFFSET, 1092 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1093 QED_MFW_VERSION_2_OFFSET, 1094 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1095 QED_MFW_VERSION_1_OFFSET, 1096 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1097 QED_MFW_VERSION_0_OFFSET); 1098 1099 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1100 if (p_dev_info->mbi_version && left_size) 1101 snprintf(buf + strlen(buf), left_size, 1102 " [MBI %d.%d.%d]", 1103 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1104 QED_MBI_VERSION_2_OFFSET, 1105 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1106 QED_MBI_VERSION_1_OFFSET, 1107 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1108 QED_MBI_VERSION_0_OFFSET); 1109 1110 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1111 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1112 buf, edev->ndev->name); 1113 } 1114 1115 enum qede_probe_mode { 1116 QEDE_PROBE_NORMAL, 1117 QEDE_PROBE_RECOVERY, 1118 }; 1119 1120 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1121 bool is_vf, enum qede_probe_mode mode) 1122 { 1123 struct qed_probe_params probe_params; 1124 struct qed_slowpath_params sp_params; 1125 struct qed_dev_eth_info dev_info; 1126 struct qede_dev *edev; 1127 struct qed_dev *cdev; 1128 int rc; 1129 1130 if (unlikely(dp_level & QED_LEVEL_INFO)) 1131 pr_notice("Starting qede probe\n"); 1132 1133 memset(&probe_params, 0, sizeof(probe_params)); 1134 probe_params.protocol = QED_PROTOCOL_ETH; 1135 probe_params.dp_module = dp_module; 1136 probe_params.dp_level = dp_level; 1137 probe_params.is_vf = is_vf; 1138 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1139 cdev = qed_ops->common->probe(pdev, &probe_params); 1140 if (!cdev) { 1141 rc = -ENODEV; 1142 goto err0; 1143 } 1144 1145 qede_update_pf_params(cdev); 1146 1147 /* Start the Slowpath-process */ 1148 memset(&sp_params, 0, sizeof(sp_params)); 1149 sp_params.int_mode = QED_INT_MODE_MSIX; 1150 sp_params.drv_major = QEDE_MAJOR_VERSION; 1151 sp_params.drv_minor = QEDE_MINOR_VERSION; 1152 sp_params.drv_rev = QEDE_REVISION_VERSION; 1153 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 1154 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1155 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1156 if (rc) { 1157 pr_notice("Cannot start slowpath\n"); 1158 goto err1; 1159 } 1160 1161 /* Learn information crucial for qede to progress */ 1162 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1163 if (rc) 1164 goto err2; 1165 1166 if (mode != QEDE_PROBE_RECOVERY) { 1167 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1168 dp_level); 1169 if (!edev) { 1170 rc = -ENOMEM; 1171 goto err2; 1172 } 1173 1174 edev->devlink = qed_ops->common->devlink_register(cdev); 1175 if (IS_ERR(edev->devlink)) { 1176 DP_NOTICE(edev, "Cannot register devlink\n"); 1177 edev->devlink = NULL; 1178 /* Go on, we can live without devlink */ 1179 } 1180 } else { 1181 struct net_device *ndev = pci_get_drvdata(pdev); 1182 1183 edev = netdev_priv(ndev); 1184 1185 if (edev->devlink) { 1186 struct qed_devlink *qdl = devlink_priv(edev->devlink); 1187 1188 qdl->cdev = cdev; 1189 } 1190 edev->cdev = cdev; 1191 memset(&edev->stats, 0, sizeof(edev->stats)); 1192 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1193 } 1194 1195 if (is_vf) 1196 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1197 1198 qede_init_ndev(edev); 1199 1200 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1201 if (rc) 1202 goto err3; 1203 1204 if (mode != QEDE_PROBE_RECOVERY) { 1205 /* Prepare the lock prior to the registration of the netdev, 1206 * as once it's registered we might reach flows requiring it 1207 * [it's even possible to reach a flow needing it directly 1208 * from there, although it's unlikely]. 1209 */ 1210 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1211 mutex_init(&edev->qede_lock); 1212 1213 rc = register_netdev(edev->ndev); 1214 if (rc) { 1215 DP_NOTICE(edev, "Cannot register net-device\n"); 1216 goto err4; 1217 } 1218 } 1219 1220 edev->ops->common->set_name(cdev, edev->ndev->name); 1221 1222 /* PTP not supported on VFs */ 1223 if (!is_vf) 1224 qede_ptp_enable(edev); 1225 1226 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1227 1228 #ifdef CONFIG_DCB 1229 if (!IS_VF(edev)) 1230 qede_set_dcbnl_ops(edev->ndev); 1231 #endif 1232 1233 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1234 1235 qede_log_probe(edev); 1236 return 0; 1237 1238 err4: 1239 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1240 err3: 1241 if (mode != QEDE_PROBE_RECOVERY) 1242 free_netdev(edev->ndev); 1243 else 1244 edev->cdev = NULL; 1245 err2: 1246 qed_ops->common->slowpath_stop(cdev); 1247 err1: 1248 qed_ops->common->remove(cdev); 1249 err0: 1250 return rc; 1251 } 1252 1253 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1254 { 1255 bool is_vf = false; 1256 u32 dp_module = 0; 1257 u8 dp_level = 0; 1258 1259 switch ((enum qede_pci_private)id->driver_data) { 1260 case QEDE_PRIVATE_VF: 1261 if (debug & QED_LOG_VERBOSE_MASK) 1262 dev_err(&pdev->dev, "Probing a VF\n"); 1263 is_vf = true; 1264 break; 1265 default: 1266 if (debug & QED_LOG_VERBOSE_MASK) 1267 dev_err(&pdev->dev, "Probing a PF\n"); 1268 } 1269 1270 qede_config_debug(debug, &dp_module, &dp_level); 1271 1272 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1273 QEDE_PROBE_NORMAL); 1274 } 1275 1276 enum qede_remove_mode { 1277 QEDE_REMOVE_NORMAL, 1278 QEDE_REMOVE_RECOVERY, 1279 }; 1280 1281 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1282 { 1283 struct net_device *ndev = pci_get_drvdata(pdev); 1284 struct qede_dev *edev; 1285 struct qed_dev *cdev; 1286 1287 if (!ndev) { 1288 dev_info(&pdev->dev, "Device has already been removed\n"); 1289 return; 1290 } 1291 1292 edev = netdev_priv(ndev); 1293 cdev = edev->cdev; 1294 1295 DP_INFO(edev, "Starting qede_remove\n"); 1296 1297 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1298 1299 if (mode != QEDE_REMOVE_RECOVERY) { 1300 unregister_netdev(ndev); 1301 1302 cancel_delayed_work_sync(&edev->sp_task); 1303 1304 edev->ops->common->set_power_state(cdev, PCI_D0); 1305 1306 pci_set_drvdata(pdev, NULL); 1307 } 1308 1309 qede_ptp_disable(edev); 1310 1311 /* Use global ops since we've freed edev */ 1312 qed_ops->common->slowpath_stop(cdev); 1313 if (system_state == SYSTEM_POWER_OFF) 1314 return; 1315 1316 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) { 1317 qed_ops->common->devlink_unregister(edev->devlink); 1318 edev->devlink = NULL; 1319 } 1320 qed_ops->common->remove(cdev); 1321 edev->cdev = NULL; 1322 1323 /* Since this can happen out-of-sync with other flows, 1324 * don't release the netdevice until after slowpath stop 1325 * has been called to guarantee various other contexts 1326 * [e.g., QED register callbacks] won't break anything when 1327 * accessing the netdevice. 1328 */ 1329 if (mode != QEDE_REMOVE_RECOVERY) 1330 free_netdev(ndev); 1331 1332 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1333 } 1334 1335 static void qede_remove(struct pci_dev *pdev) 1336 { 1337 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1338 } 1339 1340 static void qede_shutdown(struct pci_dev *pdev) 1341 { 1342 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1343 } 1344 1345 /* ------------------------------------------------------------------------- 1346 * START OF LOAD / UNLOAD 1347 * ------------------------------------------------------------------------- 1348 */ 1349 1350 static int qede_set_num_queues(struct qede_dev *edev) 1351 { 1352 int rc; 1353 u16 rss_num; 1354 1355 /* Setup queues according to possible resources*/ 1356 if (edev->req_queues) 1357 rss_num = edev->req_queues; 1358 else 1359 rss_num = netif_get_num_default_rss_queues() * 1360 edev->dev_info.common.num_hwfns; 1361 1362 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1363 1364 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1365 if (rc > 0) { 1366 /* Managed to request interrupts for our queues */ 1367 edev->num_queues = rc; 1368 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1369 QEDE_QUEUE_CNT(edev), rss_num); 1370 rc = 0; 1371 } 1372 1373 edev->fp_num_tx = edev->req_num_tx; 1374 edev->fp_num_rx = edev->req_num_rx; 1375 1376 return rc; 1377 } 1378 1379 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1380 u16 sb_id) 1381 { 1382 if (sb_info->sb_virt) { 1383 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1384 QED_SB_TYPE_L2_QUEUE); 1385 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1386 (void *)sb_info->sb_virt, sb_info->sb_phys); 1387 memset(sb_info, 0, sizeof(*sb_info)); 1388 } 1389 } 1390 1391 /* This function allocates fast-path status block memory */ 1392 static int qede_alloc_mem_sb(struct qede_dev *edev, 1393 struct qed_sb_info *sb_info, u16 sb_id) 1394 { 1395 struct status_block_e4 *sb_virt; 1396 dma_addr_t sb_phys; 1397 int rc; 1398 1399 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1400 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1401 if (!sb_virt) { 1402 DP_ERR(edev, "Status block allocation failed\n"); 1403 return -ENOMEM; 1404 } 1405 1406 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1407 sb_virt, sb_phys, sb_id, 1408 QED_SB_TYPE_L2_QUEUE); 1409 if (rc) { 1410 DP_ERR(edev, "Status block initialization failed\n"); 1411 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1412 sb_virt, sb_phys); 1413 return rc; 1414 } 1415 1416 return 0; 1417 } 1418 1419 static void qede_free_rx_buffers(struct qede_dev *edev, 1420 struct qede_rx_queue *rxq) 1421 { 1422 u16 i; 1423 1424 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1425 struct sw_rx_data *rx_buf; 1426 struct page *data; 1427 1428 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1429 data = rx_buf->data; 1430 1431 dma_unmap_page(&edev->pdev->dev, 1432 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1433 1434 rx_buf->data = NULL; 1435 __free_page(data); 1436 } 1437 } 1438 1439 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1440 { 1441 /* Free rx buffers */ 1442 qede_free_rx_buffers(edev, rxq); 1443 1444 /* Free the parallel SW ring */ 1445 kfree(rxq->sw_rx_ring); 1446 1447 /* Free the real RQ ring used by FW */ 1448 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1449 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1450 } 1451 1452 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1453 { 1454 int i; 1455 1456 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1457 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1458 1459 tpa_info->state = QEDE_AGG_STATE_NONE; 1460 } 1461 } 1462 1463 /* This function allocates all memory needed per Rx queue */ 1464 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1465 { 1466 struct qed_chain_init_params params = { 1467 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1468 .num_elems = RX_RING_SIZE, 1469 }; 1470 struct qed_dev *cdev = edev->cdev; 1471 int i, rc, size; 1472 1473 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1474 1475 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1476 1477 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1478 size = rxq->rx_headroom + 1479 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1480 1481 /* Make sure that the headroom and payload fit in a single page */ 1482 if (rxq->rx_buf_size + size > PAGE_SIZE) 1483 rxq->rx_buf_size = PAGE_SIZE - size; 1484 1485 /* Segment size to split a page in multiple equal parts, 1486 * unless XDP is used in which case we'd use the entire page. 1487 */ 1488 if (!edev->xdp_prog) { 1489 size = size + rxq->rx_buf_size; 1490 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1491 } else { 1492 rxq->rx_buf_seg_size = PAGE_SIZE; 1493 edev->ndev->features &= ~NETIF_F_GRO_HW; 1494 } 1495 1496 /* Allocate the parallel driver ring for Rx buffers */ 1497 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1498 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1499 if (!rxq->sw_rx_ring) { 1500 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1501 rc = -ENOMEM; 1502 goto err; 1503 } 1504 1505 /* Allocate FW Rx ring */ 1506 params.mode = QED_CHAIN_MODE_NEXT_PTR; 1507 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE; 1508 params.elem_size = sizeof(struct eth_rx_bd); 1509 1510 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms); 1511 if (rc) 1512 goto err; 1513 1514 /* Allocate FW completion ring */ 1515 params.mode = QED_CHAIN_MODE_PBL; 1516 params.intended_use = QED_CHAIN_USE_TO_CONSUME; 1517 params.elem_size = sizeof(union eth_rx_cqe); 1518 1519 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms); 1520 if (rc) 1521 goto err; 1522 1523 /* Allocate buffers for the Rx ring */ 1524 rxq->filled_buffers = 0; 1525 for (i = 0; i < rxq->num_rx_buffers; i++) { 1526 rc = qede_alloc_rx_buffer(rxq, false); 1527 if (rc) { 1528 DP_ERR(edev, 1529 "Rx buffers allocation failed at index %d\n", i); 1530 goto err; 1531 } 1532 } 1533 1534 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1535 if (!edev->gro_disable) 1536 qede_set_tpa_param(rxq); 1537 err: 1538 return rc; 1539 } 1540 1541 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1542 { 1543 /* Free the parallel SW ring */ 1544 if (txq->is_xdp) 1545 kfree(txq->sw_tx_ring.xdp); 1546 else 1547 kfree(txq->sw_tx_ring.skbs); 1548 1549 /* Free the real RQ ring used by FW */ 1550 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1551 } 1552 1553 /* This function allocates all memory needed per Tx queue */ 1554 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1555 { 1556 struct qed_chain_init_params params = { 1557 .mode = QED_CHAIN_MODE_PBL, 1558 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1559 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1560 .num_elems = edev->q_num_tx_buffers, 1561 .elem_size = sizeof(union eth_tx_bd_types), 1562 }; 1563 int size, rc; 1564 1565 txq->num_tx_buffers = edev->q_num_tx_buffers; 1566 1567 /* Allocate the parallel driver ring for Tx buffers */ 1568 if (txq->is_xdp) { 1569 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1570 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1571 if (!txq->sw_tx_ring.xdp) 1572 goto err; 1573 } else { 1574 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1575 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1576 if (!txq->sw_tx_ring.skbs) 1577 goto err; 1578 } 1579 1580 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms); 1581 if (rc) 1582 goto err; 1583 1584 return 0; 1585 1586 err: 1587 qede_free_mem_txq(edev, txq); 1588 return -ENOMEM; 1589 } 1590 1591 /* This function frees all memory of a single fp */ 1592 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1593 { 1594 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1595 1596 if (fp->type & QEDE_FASTPATH_RX) 1597 qede_free_mem_rxq(edev, fp->rxq); 1598 1599 if (fp->type & QEDE_FASTPATH_XDP) 1600 qede_free_mem_txq(edev, fp->xdp_tx); 1601 1602 if (fp->type & QEDE_FASTPATH_TX) { 1603 int cos; 1604 1605 for_each_cos_in_txq(edev, cos) 1606 qede_free_mem_txq(edev, &fp->txq[cos]); 1607 } 1608 } 1609 1610 /* This function allocates all memory needed for a single fp (i.e. an entity 1611 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1612 */ 1613 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1614 { 1615 int rc = 0; 1616 1617 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1618 if (rc) 1619 goto out; 1620 1621 if (fp->type & QEDE_FASTPATH_RX) { 1622 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1623 if (rc) 1624 goto out; 1625 } 1626 1627 if (fp->type & QEDE_FASTPATH_XDP) { 1628 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1629 if (rc) 1630 goto out; 1631 } 1632 1633 if (fp->type & QEDE_FASTPATH_TX) { 1634 int cos; 1635 1636 for_each_cos_in_txq(edev, cos) { 1637 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1638 if (rc) 1639 goto out; 1640 } 1641 } 1642 1643 out: 1644 return rc; 1645 } 1646 1647 static void qede_free_mem_load(struct qede_dev *edev) 1648 { 1649 int i; 1650 1651 for_each_queue(i) { 1652 struct qede_fastpath *fp = &edev->fp_array[i]; 1653 1654 qede_free_mem_fp(edev, fp); 1655 } 1656 } 1657 1658 /* This function allocates all qede memory at NIC load. */ 1659 static int qede_alloc_mem_load(struct qede_dev *edev) 1660 { 1661 int rc = 0, queue_id; 1662 1663 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1664 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1665 1666 rc = qede_alloc_mem_fp(edev, fp); 1667 if (rc) { 1668 DP_ERR(edev, 1669 "Failed to allocate memory for fastpath - rss id = %d\n", 1670 queue_id); 1671 qede_free_mem_load(edev); 1672 return rc; 1673 } 1674 } 1675 1676 return 0; 1677 } 1678 1679 static void qede_empty_tx_queue(struct qede_dev *edev, 1680 struct qede_tx_queue *txq) 1681 { 1682 unsigned int pkts_compl = 0, bytes_compl = 0; 1683 struct netdev_queue *netdev_txq; 1684 int rc, len = 0; 1685 1686 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1687 1688 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1689 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1690 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1691 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1692 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1693 qed_chain_get_prod_idx(&txq->tx_pbl)); 1694 1695 rc = qede_free_tx_pkt(edev, txq, &len); 1696 if (rc) { 1697 DP_NOTICE(edev, 1698 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1699 txq->index, 1700 qed_chain_get_cons_idx(&txq->tx_pbl), 1701 qed_chain_get_prod_idx(&txq->tx_pbl)); 1702 break; 1703 } 1704 1705 bytes_compl += len; 1706 pkts_compl++; 1707 txq->sw_tx_cons++; 1708 } 1709 1710 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1711 } 1712 1713 static void qede_empty_tx_queues(struct qede_dev *edev) 1714 { 1715 int i; 1716 1717 for_each_queue(i) 1718 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1719 int cos; 1720 1721 for_each_cos_in_txq(edev, cos) { 1722 struct qede_fastpath *fp; 1723 1724 fp = &edev->fp_array[i]; 1725 qede_empty_tx_queue(edev, 1726 &fp->txq[cos]); 1727 } 1728 } 1729 } 1730 1731 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1732 static void qede_init_fp(struct qede_dev *edev) 1733 { 1734 int queue_id, rxq_index = 0, txq_index = 0; 1735 struct qede_fastpath *fp; 1736 bool init_xdp = false; 1737 1738 for_each_queue(queue_id) { 1739 fp = &edev->fp_array[queue_id]; 1740 1741 fp->edev = edev; 1742 fp->id = queue_id; 1743 1744 if (fp->type & QEDE_FASTPATH_XDP) { 1745 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1746 rxq_index); 1747 fp->xdp_tx->is_xdp = 1; 1748 1749 spin_lock_init(&fp->xdp_tx->xdp_tx_lock); 1750 init_xdp = true; 1751 } 1752 1753 if (fp->type & QEDE_FASTPATH_RX) { 1754 fp->rxq->rxq_id = rxq_index++; 1755 1756 /* Determine how to map buffers for this queue */ 1757 if (fp->type & QEDE_FASTPATH_XDP) 1758 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1759 else 1760 fp->rxq->data_direction = DMA_FROM_DEVICE; 1761 fp->rxq->dev = &edev->pdev->dev; 1762 1763 /* Driver have no error path from here */ 1764 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1765 fp->rxq->rxq_id, 0) < 0); 1766 1767 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq, 1768 MEM_TYPE_PAGE_ORDER0, 1769 NULL)) { 1770 DP_NOTICE(edev, 1771 "Failed to register XDP memory model\n"); 1772 } 1773 } 1774 1775 if (fp->type & QEDE_FASTPATH_TX) { 1776 int cos; 1777 1778 for_each_cos_in_txq(edev, cos) { 1779 struct qede_tx_queue *txq = &fp->txq[cos]; 1780 u16 ndev_tx_id; 1781 1782 txq->cos = cos; 1783 txq->index = txq_index; 1784 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1785 txq->ndev_txq_id = ndev_tx_id; 1786 1787 if (edev->dev_info.is_legacy) 1788 txq->is_legacy = true; 1789 txq->dev = &edev->pdev->dev; 1790 } 1791 1792 txq_index++; 1793 } 1794 1795 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1796 edev->ndev->name, queue_id); 1797 } 1798 1799 if (init_xdp) { 1800 edev->total_xdp_queues = QEDE_RSS_COUNT(edev); 1801 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues); 1802 } 1803 } 1804 1805 static int qede_set_real_num_queues(struct qede_dev *edev) 1806 { 1807 int rc = 0; 1808 1809 rc = netif_set_real_num_tx_queues(edev->ndev, 1810 QEDE_TSS_COUNT(edev) * 1811 edev->dev_info.num_tc); 1812 if (rc) { 1813 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1814 return rc; 1815 } 1816 1817 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1818 if (rc) { 1819 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1820 return rc; 1821 } 1822 1823 return 0; 1824 } 1825 1826 static void qede_napi_disable_remove(struct qede_dev *edev) 1827 { 1828 int i; 1829 1830 for_each_queue(i) { 1831 napi_disable(&edev->fp_array[i].napi); 1832 1833 netif_napi_del(&edev->fp_array[i].napi); 1834 } 1835 } 1836 1837 static void qede_napi_add_enable(struct qede_dev *edev) 1838 { 1839 int i; 1840 1841 /* Add NAPI objects */ 1842 for_each_queue(i) { 1843 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1844 qede_poll, NAPI_POLL_WEIGHT); 1845 napi_enable(&edev->fp_array[i].napi); 1846 } 1847 } 1848 1849 static void qede_sync_free_irqs(struct qede_dev *edev) 1850 { 1851 int i; 1852 1853 for (i = 0; i < edev->int_info.used_cnt; i++) { 1854 if (edev->int_info.msix_cnt) { 1855 synchronize_irq(edev->int_info.msix[i].vector); 1856 free_irq(edev->int_info.msix[i].vector, 1857 &edev->fp_array[i]); 1858 } else { 1859 edev->ops->common->simd_handler_clean(edev->cdev, i); 1860 } 1861 } 1862 1863 edev->int_info.used_cnt = 0; 1864 } 1865 1866 static int qede_req_msix_irqs(struct qede_dev *edev) 1867 { 1868 int i, rc; 1869 1870 /* Sanitize number of interrupts == number of prepared RSS queues */ 1871 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1872 DP_ERR(edev, 1873 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1874 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1875 return -EINVAL; 1876 } 1877 1878 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1879 #ifdef CONFIG_RFS_ACCEL 1880 struct qede_fastpath *fp = &edev->fp_array[i]; 1881 1882 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1883 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1884 edev->int_info.msix[i].vector); 1885 if (rc) { 1886 DP_ERR(edev, "Failed to add CPU rmap\n"); 1887 qede_free_arfs(edev); 1888 } 1889 } 1890 #endif 1891 rc = request_irq(edev->int_info.msix[i].vector, 1892 qede_msix_fp_int, 0, edev->fp_array[i].name, 1893 &edev->fp_array[i]); 1894 if (rc) { 1895 DP_ERR(edev, "Request fp %d irq failed\n", i); 1896 qede_sync_free_irqs(edev); 1897 return rc; 1898 } 1899 DP_VERBOSE(edev, NETIF_MSG_INTR, 1900 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1901 edev->fp_array[i].name, i, 1902 &edev->fp_array[i]); 1903 edev->int_info.used_cnt++; 1904 } 1905 1906 return 0; 1907 } 1908 1909 static void qede_simd_fp_handler(void *cookie) 1910 { 1911 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1912 1913 napi_schedule_irqoff(&fp->napi); 1914 } 1915 1916 static int qede_setup_irqs(struct qede_dev *edev) 1917 { 1918 int i, rc = 0; 1919 1920 /* Learn Interrupt configuration */ 1921 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1922 if (rc) 1923 return rc; 1924 1925 if (edev->int_info.msix_cnt) { 1926 rc = qede_req_msix_irqs(edev); 1927 if (rc) 1928 return rc; 1929 edev->ndev->irq = edev->int_info.msix[0].vector; 1930 } else { 1931 const struct qed_common_ops *ops; 1932 1933 /* qed should learn receive the RSS ids and callbacks */ 1934 ops = edev->ops->common; 1935 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1936 ops->simd_handler_config(edev->cdev, 1937 &edev->fp_array[i], i, 1938 qede_simd_fp_handler); 1939 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1940 } 1941 return 0; 1942 } 1943 1944 static int qede_drain_txq(struct qede_dev *edev, 1945 struct qede_tx_queue *txq, bool allow_drain) 1946 { 1947 int rc, cnt = 1000; 1948 1949 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1950 if (!cnt) { 1951 if (allow_drain) { 1952 DP_NOTICE(edev, 1953 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1954 txq->index); 1955 rc = edev->ops->common->drain(edev->cdev); 1956 if (rc) 1957 return rc; 1958 return qede_drain_txq(edev, txq, false); 1959 } 1960 DP_NOTICE(edev, 1961 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1962 txq->index, txq->sw_tx_prod, 1963 txq->sw_tx_cons); 1964 return -ENODEV; 1965 } 1966 cnt--; 1967 usleep_range(1000, 2000); 1968 barrier(); 1969 } 1970 1971 /* FW finished processing, wait for HW to transmit all tx packets */ 1972 usleep_range(1000, 2000); 1973 1974 return 0; 1975 } 1976 1977 static int qede_stop_txq(struct qede_dev *edev, 1978 struct qede_tx_queue *txq, int rss_id) 1979 { 1980 /* delete doorbell from doorbell recovery mechanism */ 1981 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1982 &txq->tx_db); 1983 1984 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1985 } 1986 1987 static int qede_stop_queues(struct qede_dev *edev) 1988 { 1989 struct qed_update_vport_params *vport_update_params; 1990 struct qed_dev *cdev = edev->cdev; 1991 struct qede_fastpath *fp; 1992 int rc, i; 1993 1994 /* Disable the vport */ 1995 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1996 if (!vport_update_params) 1997 return -ENOMEM; 1998 1999 vport_update_params->vport_id = 0; 2000 vport_update_params->update_vport_active_flg = 1; 2001 vport_update_params->vport_active_flg = 0; 2002 vport_update_params->update_rss_flg = 0; 2003 2004 rc = edev->ops->vport_update(cdev, vport_update_params); 2005 vfree(vport_update_params); 2006 2007 if (rc) { 2008 DP_ERR(edev, "Failed to update vport\n"); 2009 return rc; 2010 } 2011 2012 /* Flush Tx queues. If needed, request drain from MCP */ 2013 for_each_queue(i) { 2014 fp = &edev->fp_array[i]; 2015 2016 if (fp->type & QEDE_FASTPATH_TX) { 2017 int cos; 2018 2019 for_each_cos_in_txq(edev, cos) { 2020 rc = qede_drain_txq(edev, &fp->txq[cos], true); 2021 if (rc) 2022 return rc; 2023 } 2024 } 2025 2026 if (fp->type & QEDE_FASTPATH_XDP) { 2027 rc = qede_drain_txq(edev, fp->xdp_tx, true); 2028 if (rc) 2029 return rc; 2030 } 2031 } 2032 2033 /* Stop all Queues in reverse order */ 2034 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 2035 fp = &edev->fp_array[i]; 2036 2037 /* Stop the Tx Queue(s) */ 2038 if (fp->type & QEDE_FASTPATH_TX) { 2039 int cos; 2040 2041 for_each_cos_in_txq(edev, cos) { 2042 rc = qede_stop_txq(edev, &fp->txq[cos], i); 2043 if (rc) 2044 return rc; 2045 } 2046 } 2047 2048 /* Stop the Rx Queue */ 2049 if (fp->type & QEDE_FASTPATH_RX) { 2050 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 2051 if (rc) { 2052 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 2053 return rc; 2054 } 2055 } 2056 2057 /* Stop the XDP forwarding queue */ 2058 if (fp->type & QEDE_FASTPATH_XDP) { 2059 rc = qede_stop_txq(edev, fp->xdp_tx, i); 2060 if (rc) 2061 return rc; 2062 2063 bpf_prog_put(fp->rxq->xdp_prog); 2064 } 2065 } 2066 2067 /* Stop the vport */ 2068 rc = edev->ops->vport_stop(cdev, 0); 2069 if (rc) 2070 DP_ERR(edev, "Failed to stop VPORT\n"); 2071 2072 return rc; 2073 } 2074 2075 static int qede_start_txq(struct qede_dev *edev, 2076 struct qede_fastpath *fp, 2077 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2078 { 2079 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2080 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2081 struct qed_queue_start_common_params params; 2082 struct qed_txq_start_ret_params ret_params; 2083 int rc; 2084 2085 memset(¶ms, 0, sizeof(params)); 2086 memset(&ret_params, 0, sizeof(ret_params)); 2087 2088 /* Let the XDP queue share the queue-zone with one of the regular txq. 2089 * We don't really care about its coalescing. 2090 */ 2091 if (txq->is_xdp) 2092 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2093 else 2094 params.queue_id = txq->index; 2095 2096 params.p_sb = fp->sb_info; 2097 params.sb_idx = sb_idx; 2098 params.tc = txq->cos; 2099 2100 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2101 page_cnt, &ret_params); 2102 if (rc) { 2103 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2104 return rc; 2105 } 2106 2107 txq->doorbell_addr = ret_params.p_doorbell; 2108 txq->handle = ret_params.p_handle; 2109 2110 /* Determine the FW consumer address associated */ 2111 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2112 2113 /* Prepare the doorbell parameters */ 2114 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2115 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2116 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2117 DQ_XCM_ETH_TX_BD_PROD_CMD); 2118 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2119 2120 /* register doorbell with doorbell recovery mechanism */ 2121 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2122 &txq->tx_db, DB_REC_WIDTH_32B, 2123 DB_REC_KERNEL); 2124 2125 return rc; 2126 } 2127 2128 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2129 { 2130 int vlan_removal_en = 1; 2131 struct qed_dev *cdev = edev->cdev; 2132 struct qed_dev_info *qed_info = &edev->dev_info.common; 2133 struct qed_update_vport_params *vport_update_params; 2134 struct qed_queue_start_common_params q_params; 2135 struct qed_start_vport_params start = {0}; 2136 int rc, i; 2137 2138 if (!edev->num_queues) { 2139 DP_ERR(edev, 2140 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2141 return -EINVAL; 2142 } 2143 2144 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2145 if (!vport_update_params) 2146 return -ENOMEM; 2147 2148 start.handle_ptp_pkts = !!(edev->ptp); 2149 start.gro_enable = !edev->gro_disable; 2150 start.mtu = edev->ndev->mtu; 2151 start.vport_id = 0; 2152 start.drop_ttl0 = true; 2153 start.remove_inner_vlan = vlan_removal_en; 2154 start.clear_stats = clear_stats; 2155 2156 rc = edev->ops->vport_start(cdev, &start); 2157 2158 if (rc) { 2159 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2160 goto out; 2161 } 2162 2163 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2164 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2165 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2166 2167 for_each_queue(i) { 2168 struct qede_fastpath *fp = &edev->fp_array[i]; 2169 dma_addr_t p_phys_table; 2170 u32 page_cnt; 2171 2172 if (fp->type & QEDE_FASTPATH_RX) { 2173 struct qed_rxq_start_ret_params ret_params; 2174 struct qede_rx_queue *rxq = fp->rxq; 2175 __le16 *val; 2176 2177 memset(&ret_params, 0, sizeof(ret_params)); 2178 memset(&q_params, 0, sizeof(q_params)); 2179 q_params.queue_id = rxq->rxq_id; 2180 q_params.vport_id = 0; 2181 q_params.p_sb = fp->sb_info; 2182 q_params.sb_idx = RX_PI; 2183 2184 p_phys_table = 2185 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2186 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2187 2188 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2189 rxq->rx_buf_size, 2190 rxq->rx_bd_ring.p_phys_addr, 2191 p_phys_table, 2192 page_cnt, &ret_params); 2193 if (rc) { 2194 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2195 rc); 2196 goto out; 2197 } 2198 2199 /* Use the return parameters */ 2200 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2201 rxq->handle = ret_params.p_handle; 2202 2203 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2204 rxq->hw_cons_ptr = val; 2205 2206 qede_update_rx_prod(edev, rxq); 2207 } 2208 2209 if (fp->type & QEDE_FASTPATH_XDP) { 2210 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2211 if (rc) 2212 goto out; 2213 2214 bpf_prog_add(edev->xdp_prog, 1); 2215 fp->rxq->xdp_prog = edev->xdp_prog; 2216 } 2217 2218 if (fp->type & QEDE_FASTPATH_TX) { 2219 int cos; 2220 2221 for_each_cos_in_txq(edev, cos) { 2222 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2223 TX_PI(cos)); 2224 if (rc) 2225 goto out; 2226 } 2227 } 2228 } 2229 2230 /* Prepare and send the vport enable */ 2231 vport_update_params->vport_id = start.vport_id; 2232 vport_update_params->update_vport_active_flg = 1; 2233 vport_update_params->vport_active_flg = 1; 2234 2235 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2236 qed_info->tx_switching) { 2237 vport_update_params->update_tx_switching_flg = 1; 2238 vport_update_params->tx_switching_flg = 1; 2239 } 2240 2241 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2242 &vport_update_params->update_rss_flg); 2243 2244 rc = edev->ops->vport_update(cdev, vport_update_params); 2245 if (rc) 2246 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2247 2248 out: 2249 vfree(vport_update_params); 2250 return rc; 2251 } 2252 2253 enum qede_unload_mode { 2254 QEDE_UNLOAD_NORMAL, 2255 QEDE_UNLOAD_RECOVERY, 2256 }; 2257 2258 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2259 bool is_locked) 2260 { 2261 struct qed_link_params link_params; 2262 int rc; 2263 2264 DP_INFO(edev, "Starting qede unload\n"); 2265 2266 if (!is_locked) 2267 __qede_lock(edev); 2268 2269 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2270 2271 if (mode != QEDE_UNLOAD_RECOVERY) 2272 edev->state = QEDE_STATE_CLOSED; 2273 2274 qede_rdma_dev_event_close(edev); 2275 2276 /* Close OS Tx */ 2277 netif_tx_disable(edev->ndev); 2278 netif_carrier_off(edev->ndev); 2279 2280 if (mode != QEDE_UNLOAD_RECOVERY) { 2281 /* Reset the link */ 2282 memset(&link_params, 0, sizeof(link_params)); 2283 link_params.link_up = false; 2284 edev->ops->common->set_link(edev->cdev, &link_params); 2285 2286 rc = qede_stop_queues(edev); 2287 if (rc) { 2288 qede_sync_free_irqs(edev); 2289 goto out; 2290 } 2291 2292 DP_INFO(edev, "Stopped Queues\n"); 2293 } 2294 2295 qede_vlan_mark_nonconfigured(edev); 2296 edev->ops->fastpath_stop(edev->cdev); 2297 2298 if (edev->dev_info.common.b_arfs_capable) { 2299 qede_poll_for_freeing_arfs_filters(edev); 2300 qede_free_arfs(edev); 2301 } 2302 2303 /* Release the interrupts */ 2304 qede_sync_free_irqs(edev); 2305 edev->ops->common->set_fp_int(edev->cdev, 0); 2306 2307 qede_napi_disable_remove(edev); 2308 2309 if (mode == QEDE_UNLOAD_RECOVERY) 2310 qede_empty_tx_queues(edev); 2311 2312 qede_free_mem_load(edev); 2313 qede_free_fp_array(edev); 2314 2315 out: 2316 if (!is_locked) 2317 __qede_unlock(edev); 2318 2319 if (mode != QEDE_UNLOAD_RECOVERY) 2320 DP_NOTICE(edev, "Link is down\n"); 2321 2322 edev->ptp_skip_txts = 0; 2323 2324 DP_INFO(edev, "Ending qede unload\n"); 2325 } 2326 2327 enum qede_load_mode { 2328 QEDE_LOAD_NORMAL, 2329 QEDE_LOAD_RELOAD, 2330 QEDE_LOAD_RECOVERY, 2331 }; 2332 2333 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2334 bool is_locked) 2335 { 2336 struct qed_link_params link_params; 2337 u8 num_tc; 2338 int rc; 2339 2340 DP_INFO(edev, "Starting qede load\n"); 2341 2342 if (!is_locked) 2343 __qede_lock(edev); 2344 2345 rc = qede_set_num_queues(edev); 2346 if (rc) 2347 goto out; 2348 2349 rc = qede_alloc_fp_array(edev); 2350 if (rc) 2351 goto out; 2352 2353 qede_init_fp(edev); 2354 2355 rc = qede_alloc_mem_load(edev); 2356 if (rc) 2357 goto err1; 2358 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2359 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2360 2361 rc = qede_set_real_num_queues(edev); 2362 if (rc) 2363 goto err2; 2364 2365 if (qede_alloc_arfs(edev)) { 2366 edev->ndev->features &= ~NETIF_F_NTUPLE; 2367 edev->dev_info.common.b_arfs_capable = false; 2368 } 2369 2370 qede_napi_add_enable(edev); 2371 DP_INFO(edev, "Napi added and enabled\n"); 2372 2373 rc = qede_setup_irqs(edev); 2374 if (rc) 2375 goto err3; 2376 DP_INFO(edev, "Setup IRQs succeeded\n"); 2377 2378 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2379 if (rc) 2380 goto err4; 2381 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2382 2383 num_tc = netdev_get_num_tc(edev->ndev); 2384 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2385 qede_setup_tc(edev->ndev, num_tc); 2386 2387 /* Program un-configured VLANs */ 2388 qede_configure_vlan_filters(edev); 2389 2390 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2391 2392 /* Ask for link-up using current configuration */ 2393 memset(&link_params, 0, sizeof(link_params)); 2394 link_params.link_up = true; 2395 edev->ops->common->set_link(edev->cdev, &link_params); 2396 2397 edev->state = QEDE_STATE_OPEN; 2398 2399 DP_INFO(edev, "Ending successfully qede load\n"); 2400 2401 goto out; 2402 err4: 2403 qede_sync_free_irqs(edev); 2404 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 2405 err3: 2406 qede_napi_disable_remove(edev); 2407 err2: 2408 qede_free_mem_load(edev); 2409 err1: 2410 edev->ops->common->set_fp_int(edev->cdev, 0); 2411 qede_free_fp_array(edev); 2412 edev->num_queues = 0; 2413 edev->fp_num_tx = 0; 2414 edev->fp_num_rx = 0; 2415 out: 2416 if (!is_locked) 2417 __qede_unlock(edev); 2418 2419 return rc; 2420 } 2421 2422 /* 'func' should be able to run between unload and reload assuming interface 2423 * is actually running, or afterwards in case it's currently DOWN. 2424 */ 2425 void qede_reload(struct qede_dev *edev, 2426 struct qede_reload_args *args, bool is_locked) 2427 { 2428 if (!is_locked) 2429 __qede_lock(edev); 2430 2431 /* Since qede_lock is held, internal state wouldn't change even 2432 * if netdev state would start transitioning. Check whether current 2433 * internal configuration indicates device is up, then reload. 2434 */ 2435 if (edev->state == QEDE_STATE_OPEN) { 2436 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2437 if (args) 2438 args->func(edev, args); 2439 qede_load(edev, QEDE_LOAD_RELOAD, true); 2440 2441 /* Since no one is going to do it for us, re-configure */ 2442 qede_config_rx_mode(edev->ndev); 2443 } else if (args) { 2444 args->func(edev, args); 2445 } 2446 2447 if (!is_locked) 2448 __qede_unlock(edev); 2449 } 2450 2451 /* called with rtnl_lock */ 2452 static int qede_open(struct net_device *ndev) 2453 { 2454 struct qede_dev *edev = netdev_priv(ndev); 2455 int rc; 2456 2457 netif_carrier_off(ndev); 2458 2459 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2460 2461 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2462 if (rc) 2463 return rc; 2464 2465 udp_tunnel_nic_reset_ntf(ndev); 2466 2467 edev->ops->common->update_drv_state(edev->cdev, true); 2468 2469 return 0; 2470 } 2471 2472 static int qede_close(struct net_device *ndev) 2473 { 2474 struct qede_dev *edev = netdev_priv(ndev); 2475 2476 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2477 2478 if (edev->cdev) 2479 edev->ops->common->update_drv_state(edev->cdev, false); 2480 2481 return 0; 2482 } 2483 2484 static void qede_link_update(void *dev, struct qed_link_output *link) 2485 { 2486 struct qede_dev *edev = dev; 2487 2488 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2489 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2490 return; 2491 } 2492 2493 if (link->link_up) { 2494 if (!netif_carrier_ok(edev->ndev)) { 2495 DP_NOTICE(edev, "Link is up\n"); 2496 netif_tx_start_all_queues(edev->ndev); 2497 netif_carrier_on(edev->ndev); 2498 qede_rdma_dev_event_open(edev); 2499 } 2500 } else { 2501 if (netif_carrier_ok(edev->ndev)) { 2502 DP_NOTICE(edev, "Link is down\n"); 2503 netif_tx_disable(edev->ndev); 2504 netif_carrier_off(edev->ndev); 2505 qede_rdma_dev_event_close(edev); 2506 } 2507 } 2508 } 2509 2510 static void qede_schedule_recovery_handler(void *dev) 2511 { 2512 struct qede_dev *edev = dev; 2513 2514 if (edev->state == QEDE_STATE_RECOVERY) { 2515 DP_NOTICE(edev, 2516 "Avoid scheduling a recovery handling since already in recovery state\n"); 2517 return; 2518 } 2519 2520 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2521 schedule_delayed_work(&edev->sp_task, 0); 2522 2523 DP_INFO(edev, "Scheduled a recovery handler\n"); 2524 } 2525 2526 static void qede_recovery_failed(struct qede_dev *edev) 2527 { 2528 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2529 2530 netif_device_detach(edev->ndev); 2531 2532 if (edev->cdev) 2533 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2534 } 2535 2536 static void qede_recovery_handler(struct qede_dev *edev) 2537 { 2538 u32 curr_state = edev->state; 2539 int rc; 2540 2541 DP_NOTICE(edev, "Starting a recovery process\n"); 2542 2543 /* No need to acquire first the qede_lock since is done by qede_sp_task 2544 * before calling this function. 2545 */ 2546 edev->state = QEDE_STATE_RECOVERY; 2547 2548 edev->ops->common->recovery_prolog(edev->cdev); 2549 2550 if (curr_state == QEDE_STATE_OPEN) 2551 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2552 2553 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2554 2555 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2556 IS_VF(edev), QEDE_PROBE_RECOVERY); 2557 if (rc) { 2558 edev->cdev = NULL; 2559 goto err; 2560 } 2561 2562 if (curr_state == QEDE_STATE_OPEN) { 2563 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2564 if (rc) 2565 goto err; 2566 2567 qede_config_rx_mode(edev->ndev); 2568 udp_tunnel_nic_reset_ntf(edev->ndev); 2569 } 2570 2571 edev->state = curr_state; 2572 2573 DP_NOTICE(edev, "Recovery handling is done\n"); 2574 2575 return; 2576 2577 err: 2578 qede_recovery_failed(edev); 2579 } 2580 2581 static void qede_atomic_hw_err_handler(struct qede_dev *edev) 2582 { 2583 struct qed_dev *cdev = edev->cdev; 2584 2585 DP_NOTICE(edev, 2586 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n", 2587 edev->err_flags); 2588 2589 /* Get a call trace of the flow that led to the error */ 2590 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags)); 2591 2592 /* Prevent HW attentions from being reasserted */ 2593 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags)) 2594 edev->ops->common->attn_clr_enable(cdev, true); 2595 2596 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n"); 2597 } 2598 2599 static void qede_generic_hw_err_handler(struct qede_dev *edev) 2600 { 2601 DP_NOTICE(edev, 2602 "Generic sleepable HW error handling started - err_flags 0x%lx\n", 2603 edev->err_flags); 2604 2605 if (edev->devlink) 2606 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type); 2607 2608 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2609 2610 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n"); 2611 } 2612 2613 static void qede_set_hw_err_flags(struct qede_dev *edev, 2614 enum qed_hw_err_type err_type) 2615 { 2616 unsigned long err_flags = 0; 2617 2618 switch (err_type) { 2619 case QED_HW_ERR_DMAE_FAIL: 2620 set_bit(QEDE_ERR_WARN, &err_flags); 2621 fallthrough; 2622 case QED_HW_ERR_MFW_RESP_FAIL: 2623 case QED_HW_ERR_HW_ATTN: 2624 case QED_HW_ERR_RAMROD_FAIL: 2625 case QED_HW_ERR_FW_ASSERT: 2626 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags); 2627 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags); 2628 break; 2629 2630 default: 2631 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type); 2632 break; 2633 } 2634 2635 edev->err_flags |= err_flags; 2636 } 2637 2638 static void qede_schedule_hw_err_handler(void *dev, 2639 enum qed_hw_err_type err_type) 2640 { 2641 struct qede_dev *edev = dev; 2642 2643 /* Fan failure cannot be masked by handling of another HW error or by a 2644 * concurrent recovery process. 2645 */ 2646 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 2647 edev->state == QEDE_STATE_RECOVERY) && 2648 err_type != QED_HW_ERR_FAN_FAIL) { 2649 DP_INFO(edev, 2650 "Avoid scheduling an error handling while another HW error is being handled\n"); 2651 return; 2652 } 2653 2654 if (err_type >= QED_HW_ERR_LAST) { 2655 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type); 2656 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2657 return; 2658 } 2659 2660 edev->last_err_type = err_type; 2661 qede_set_hw_err_flags(edev, err_type); 2662 qede_atomic_hw_err_handler(edev); 2663 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 2664 schedule_delayed_work(&edev->sp_task, 0); 2665 2666 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type); 2667 } 2668 2669 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2670 { 2671 struct netdev_queue *netdev_txq; 2672 2673 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2674 if (netif_xmit_stopped(netdev_txq)) 2675 return true; 2676 2677 return false; 2678 } 2679 2680 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2681 { 2682 struct qede_dev *edev = dev; 2683 struct netdev_hw_addr *ha; 2684 int i; 2685 2686 if (edev->ndev->features & NETIF_F_IP_CSUM) 2687 data->feat_flags |= QED_TLV_IP_CSUM; 2688 if (edev->ndev->features & NETIF_F_TSO) 2689 data->feat_flags |= QED_TLV_LSO; 2690 2691 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2692 eth_zero_addr(data->mac[1]); 2693 eth_zero_addr(data->mac[2]); 2694 /* Copy the first two UC macs */ 2695 netif_addr_lock_bh(edev->ndev); 2696 i = 1; 2697 netdev_for_each_uc_addr(ha, edev->ndev) { 2698 ether_addr_copy(data->mac[i++], ha->addr); 2699 if (i == QED_TLV_MAC_COUNT) 2700 break; 2701 } 2702 2703 netif_addr_unlock_bh(edev->ndev); 2704 } 2705 2706 static void qede_get_eth_tlv_data(void *dev, void *data) 2707 { 2708 struct qed_mfw_tlv_eth *etlv = data; 2709 struct qede_dev *edev = dev; 2710 struct qede_fastpath *fp; 2711 int i; 2712 2713 etlv->lso_maxoff_size = 0XFFFF; 2714 etlv->lso_maxoff_size_set = true; 2715 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2716 etlv->lso_minseg_size_set = true; 2717 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2718 etlv->prom_mode_set = true; 2719 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2720 etlv->tx_descr_size_set = true; 2721 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2722 etlv->rx_descr_size_set = true; 2723 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2724 etlv->iov_offload_set = true; 2725 2726 /* Fill information regarding queues; Should be done under the qede 2727 * lock to guarantee those don't change beneath our feet. 2728 */ 2729 etlv->txqs_empty = true; 2730 etlv->rxqs_empty = true; 2731 etlv->num_txqs_full = 0; 2732 etlv->num_rxqs_full = 0; 2733 2734 __qede_lock(edev); 2735 for_each_queue(i) { 2736 fp = &edev->fp_array[i]; 2737 if (fp->type & QEDE_FASTPATH_TX) { 2738 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2739 2740 if (txq->sw_tx_cons != txq->sw_tx_prod) 2741 etlv->txqs_empty = false; 2742 if (qede_is_txq_full(edev, txq)) 2743 etlv->num_txqs_full++; 2744 } 2745 if (fp->type & QEDE_FASTPATH_RX) { 2746 if (qede_has_rx_work(fp->rxq)) 2747 etlv->rxqs_empty = false; 2748 2749 /* This one is a bit tricky; Firmware might stop 2750 * placing packets if ring is not yet full. 2751 * Give an approximation. 2752 */ 2753 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2754 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2755 RX_RING_SIZE - 100) 2756 etlv->num_rxqs_full++; 2757 } 2758 } 2759 __qede_unlock(edev); 2760 2761 etlv->txqs_empty_set = true; 2762 etlv->rxqs_empty_set = true; 2763 etlv->num_txqs_full_set = true; 2764 etlv->num_rxqs_full_set = true; 2765 } 2766 2767 /** 2768 * qede_io_error_detected - called when PCI error is detected 2769 * @pdev: Pointer to PCI device 2770 * @state: The current pci connection state 2771 * 2772 * This function is called after a PCI bus error affecting 2773 * this device has been detected. 2774 */ 2775 static pci_ers_result_t 2776 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2777 { 2778 struct net_device *dev = pci_get_drvdata(pdev); 2779 struct qede_dev *edev = netdev_priv(dev); 2780 2781 if (!edev) 2782 return PCI_ERS_RESULT_NONE; 2783 2784 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2785 2786 __qede_lock(edev); 2787 if (edev->state == QEDE_STATE_RECOVERY) { 2788 DP_NOTICE(edev, "Device already in the recovery state\n"); 2789 __qede_unlock(edev); 2790 return PCI_ERS_RESULT_NONE; 2791 } 2792 2793 /* PF handles the recovery of its VFs */ 2794 if (IS_VF(edev)) { 2795 DP_VERBOSE(edev, QED_MSG_IOV, 2796 "VF recovery is handled by its PF\n"); 2797 __qede_unlock(edev); 2798 return PCI_ERS_RESULT_RECOVERED; 2799 } 2800 2801 /* Close OS Tx */ 2802 netif_tx_disable(edev->ndev); 2803 netif_carrier_off(edev->ndev); 2804 2805 set_bit(QEDE_SP_AER, &edev->sp_flags); 2806 schedule_delayed_work(&edev->sp_task, 0); 2807 2808 __qede_unlock(edev); 2809 2810 return PCI_ERS_RESULT_CAN_RECOVER; 2811 } 2812