1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/crash_dump.h> 8 #include <linux/module.h> 9 #include <linux/pci.h> 10 #include <linux/device.h> 11 #include <linux/netdevice.h> 12 #include <linux/etherdevice.h> 13 #include <linux/skbuff.h> 14 #include <linux/errno.h> 15 #include <linux/list.h> 16 #include <linux/string.h> 17 #include <linux/dma-mapping.h> 18 #include <linux/interrupt.h> 19 #include <asm/byteorder.h> 20 #include <asm/param.h> 21 #include <linux/io.h> 22 #include <linux/netdev_features.h> 23 #include <linux/udp.h> 24 #include <linux/tcp.h> 25 #include <net/udp_tunnel.h> 26 #include <linux/ip.h> 27 #include <net/ipv6.h> 28 #include <net/tcp.h> 29 #include <linux/if_ether.h> 30 #include <linux/if_vlan.h> 31 #include <linux/pkt_sched.h> 32 #include <linux/ethtool.h> 33 #include <linux/in.h> 34 #include <linux/random.h> 35 #include <net/ip6_checksum.h> 36 #include <linux/bitops.h> 37 #include <linux/vmalloc.h> 38 #include <linux/aer.h> 39 #include "qede.h" 40 #include "qede_ptp.h" 41 42 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 43 MODULE_LICENSE("GPL"); 44 45 static uint debug; 46 module_param(debug, uint, 0); 47 MODULE_PARM_DESC(debug, " Default debug msglevel"); 48 49 static const struct qed_eth_ops *qed_ops; 50 51 #define CHIP_NUM_57980S_40 0x1634 52 #define CHIP_NUM_57980S_10 0x1666 53 #define CHIP_NUM_57980S_MF 0x1636 54 #define CHIP_NUM_57980S_100 0x1644 55 #define CHIP_NUM_57980S_50 0x1654 56 #define CHIP_NUM_57980S_25 0x1656 57 #define CHIP_NUM_57980S_IOV 0x1664 58 #define CHIP_NUM_AH 0x8070 59 #define CHIP_NUM_AH_IOV 0x8090 60 61 #ifndef PCI_DEVICE_ID_NX2_57980E 62 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 63 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 64 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 65 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 66 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 67 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 68 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 69 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 70 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 71 72 #endif 73 74 enum qede_pci_private { 75 QEDE_PRIVATE_PF, 76 QEDE_PRIVATE_VF 77 }; 78 79 static const struct pci_device_id qede_pci_tbl[] = { 80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 86 #ifdef CONFIG_QED_SRIOV 87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 88 #endif 89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 90 #ifdef CONFIG_QED_SRIOV 91 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 92 #endif 93 { 0 } 94 }; 95 96 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 97 98 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 99 static pci_ers_result_t 100 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 101 102 #define TX_TIMEOUT (5 * HZ) 103 104 /* Utilize last protocol index for XDP */ 105 #define XDP_PI 11 106 107 static void qede_remove(struct pci_dev *pdev); 108 static void qede_shutdown(struct pci_dev *pdev); 109 static void qede_link_update(void *dev, struct qed_link_output *link); 110 static void qede_schedule_recovery_handler(void *dev); 111 static void qede_recovery_handler(struct qede_dev *edev); 112 static void qede_schedule_hw_err_handler(void *dev, 113 enum qed_hw_err_type err_type); 114 static void qede_get_eth_tlv_data(void *edev, void *data); 115 static void qede_get_generic_tlv_data(void *edev, 116 struct qed_generic_tlvs *data); 117 static void qede_generic_hw_err_handler(struct qede_dev *edev); 118 #ifdef CONFIG_QED_SRIOV 119 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 120 __be16 vlan_proto) 121 { 122 struct qede_dev *edev = netdev_priv(ndev); 123 124 if (vlan > 4095) { 125 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 126 return -EINVAL; 127 } 128 129 if (vlan_proto != htons(ETH_P_8021Q)) 130 return -EPROTONOSUPPORT; 131 132 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 133 vlan, vf); 134 135 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 136 } 137 138 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 139 { 140 struct qede_dev *edev = netdev_priv(ndev); 141 142 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx); 143 144 if (!is_valid_ether_addr(mac)) { 145 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 146 return -EINVAL; 147 } 148 149 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 150 } 151 152 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 153 { 154 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 155 struct qed_dev_info *qed_info = &edev->dev_info.common; 156 struct qed_update_vport_params *vport_params; 157 int rc; 158 159 vport_params = vzalloc(sizeof(*vport_params)); 160 if (!vport_params) 161 return -ENOMEM; 162 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 163 164 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 165 166 /* Enable/Disable Tx switching for PF */ 167 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 168 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 169 vport_params->vport_id = 0; 170 vport_params->update_tx_switching_flg = 1; 171 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 172 edev->ops->vport_update(edev->cdev, vport_params); 173 } 174 175 vfree(vport_params); 176 return rc; 177 } 178 #endif 179 180 static const struct pci_error_handlers qede_err_handler = { 181 .error_detected = qede_io_error_detected, 182 }; 183 184 static struct pci_driver qede_pci_driver = { 185 .name = "qede", 186 .id_table = qede_pci_tbl, 187 .probe = qede_probe, 188 .remove = qede_remove, 189 .shutdown = qede_shutdown, 190 #ifdef CONFIG_QED_SRIOV 191 .sriov_configure = qede_sriov_configure, 192 #endif 193 .err_handler = &qede_err_handler, 194 }; 195 196 static struct qed_eth_cb_ops qede_ll_ops = { 197 { 198 #ifdef CONFIG_RFS_ACCEL 199 .arfs_filter_op = qede_arfs_filter_op, 200 #endif 201 .link_update = qede_link_update, 202 .schedule_recovery_handler = qede_schedule_recovery_handler, 203 .schedule_hw_err_handler = qede_schedule_hw_err_handler, 204 .get_generic_tlv_data = qede_get_generic_tlv_data, 205 .get_protocol_tlv_data = qede_get_eth_tlv_data, 206 }, 207 .force_mac = qede_force_mac, 208 .ports_update = qede_udp_ports_update, 209 }; 210 211 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 212 void *ptr) 213 { 214 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 215 struct ethtool_drvinfo drvinfo; 216 struct qede_dev *edev; 217 218 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 219 goto done; 220 221 /* Check whether this is a qede device */ 222 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 223 goto done; 224 225 memset(&drvinfo, 0, sizeof(drvinfo)); 226 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 227 if (strcmp(drvinfo.driver, "qede")) 228 goto done; 229 edev = netdev_priv(ndev); 230 231 switch (event) { 232 case NETDEV_CHANGENAME: 233 /* Notify qed of the name change */ 234 if (!edev->ops || !edev->ops->common) 235 goto done; 236 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 237 break; 238 case NETDEV_CHANGEADDR: 239 edev = netdev_priv(ndev); 240 qede_rdma_event_changeaddr(edev); 241 break; 242 } 243 244 done: 245 return NOTIFY_DONE; 246 } 247 248 static struct notifier_block qede_netdev_notifier = { 249 .notifier_call = qede_netdev_event, 250 }; 251 252 static 253 int __init qede_init(void) 254 { 255 int ret; 256 257 pr_info("qede init: QLogic FastLinQ 4xxxx Ethernet Driver qede\n"); 258 259 qede_forced_speed_maps_init(); 260 261 qed_ops = qed_get_eth_ops(); 262 if (!qed_ops) { 263 pr_notice("Failed to get qed ethtool operations\n"); 264 return -EINVAL; 265 } 266 267 /* Must register notifier before pci ops, since we might miss 268 * interface rename after pci probe and netdev registration. 269 */ 270 ret = register_netdevice_notifier(&qede_netdev_notifier); 271 if (ret) { 272 pr_notice("Failed to register netdevice_notifier\n"); 273 qed_put_eth_ops(); 274 return -EINVAL; 275 } 276 277 ret = pci_register_driver(&qede_pci_driver); 278 if (ret) { 279 pr_notice("Failed to register driver\n"); 280 unregister_netdevice_notifier(&qede_netdev_notifier); 281 qed_put_eth_ops(); 282 return -EINVAL; 283 } 284 285 return 0; 286 } 287 288 static void __exit qede_cleanup(void) 289 { 290 if (debug & QED_LOG_INFO_MASK) 291 pr_info("qede_cleanup called\n"); 292 293 unregister_netdevice_notifier(&qede_netdev_notifier); 294 pci_unregister_driver(&qede_pci_driver); 295 qed_put_eth_ops(); 296 } 297 298 module_init(qede_init); 299 module_exit(qede_cleanup); 300 301 static int qede_open(struct net_device *ndev); 302 static int qede_close(struct net_device *ndev); 303 304 void qede_fill_by_demand_stats(struct qede_dev *edev) 305 { 306 struct qede_stats_common *p_common = &edev->stats.common; 307 struct qed_eth_stats stats; 308 309 edev->ops->get_vport_stats(edev->cdev, &stats); 310 311 p_common->no_buff_discards = stats.common.no_buff_discards; 312 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 313 p_common->ttl0_discard = stats.common.ttl0_discard; 314 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 315 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 316 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 317 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 318 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 319 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 320 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 321 p_common->mac_filter_discards = stats.common.mac_filter_discards; 322 p_common->gft_filter_drop = stats.common.gft_filter_drop; 323 324 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 325 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 326 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 327 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 328 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 329 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 330 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 331 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 332 p_common->coalesced_events = stats.common.tpa_coalesced_events; 333 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 334 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 335 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 336 337 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 338 p_common->rx_65_to_127_byte_packets = 339 stats.common.rx_65_to_127_byte_packets; 340 p_common->rx_128_to_255_byte_packets = 341 stats.common.rx_128_to_255_byte_packets; 342 p_common->rx_256_to_511_byte_packets = 343 stats.common.rx_256_to_511_byte_packets; 344 p_common->rx_512_to_1023_byte_packets = 345 stats.common.rx_512_to_1023_byte_packets; 346 p_common->rx_1024_to_1518_byte_packets = 347 stats.common.rx_1024_to_1518_byte_packets; 348 p_common->rx_crc_errors = stats.common.rx_crc_errors; 349 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 350 p_common->rx_pause_frames = stats.common.rx_pause_frames; 351 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 352 p_common->rx_align_errors = stats.common.rx_align_errors; 353 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 354 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 355 p_common->rx_jabbers = stats.common.rx_jabbers; 356 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 357 p_common->rx_fragments = stats.common.rx_fragments; 358 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 359 p_common->tx_65_to_127_byte_packets = 360 stats.common.tx_65_to_127_byte_packets; 361 p_common->tx_128_to_255_byte_packets = 362 stats.common.tx_128_to_255_byte_packets; 363 p_common->tx_256_to_511_byte_packets = 364 stats.common.tx_256_to_511_byte_packets; 365 p_common->tx_512_to_1023_byte_packets = 366 stats.common.tx_512_to_1023_byte_packets; 367 p_common->tx_1024_to_1518_byte_packets = 368 stats.common.tx_1024_to_1518_byte_packets; 369 p_common->tx_pause_frames = stats.common.tx_pause_frames; 370 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 371 p_common->brb_truncates = stats.common.brb_truncates; 372 p_common->brb_discards = stats.common.brb_discards; 373 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 374 p_common->link_change_count = stats.common.link_change_count; 375 p_common->ptp_skip_txts = edev->ptp_skip_txts; 376 377 if (QEDE_IS_BB(edev)) { 378 struct qede_stats_bb *p_bb = &edev->stats.bb; 379 380 p_bb->rx_1519_to_1522_byte_packets = 381 stats.bb.rx_1519_to_1522_byte_packets; 382 p_bb->rx_1519_to_2047_byte_packets = 383 stats.bb.rx_1519_to_2047_byte_packets; 384 p_bb->rx_2048_to_4095_byte_packets = 385 stats.bb.rx_2048_to_4095_byte_packets; 386 p_bb->rx_4096_to_9216_byte_packets = 387 stats.bb.rx_4096_to_9216_byte_packets; 388 p_bb->rx_9217_to_16383_byte_packets = 389 stats.bb.rx_9217_to_16383_byte_packets; 390 p_bb->tx_1519_to_2047_byte_packets = 391 stats.bb.tx_1519_to_2047_byte_packets; 392 p_bb->tx_2048_to_4095_byte_packets = 393 stats.bb.tx_2048_to_4095_byte_packets; 394 p_bb->tx_4096_to_9216_byte_packets = 395 stats.bb.tx_4096_to_9216_byte_packets; 396 p_bb->tx_9217_to_16383_byte_packets = 397 stats.bb.tx_9217_to_16383_byte_packets; 398 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 399 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 400 } else { 401 struct qede_stats_ah *p_ah = &edev->stats.ah; 402 403 p_ah->rx_1519_to_max_byte_packets = 404 stats.ah.rx_1519_to_max_byte_packets; 405 p_ah->tx_1519_to_max_byte_packets = 406 stats.ah.tx_1519_to_max_byte_packets; 407 } 408 } 409 410 static void qede_get_stats64(struct net_device *dev, 411 struct rtnl_link_stats64 *stats) 412 { 413 struct qede_dev *edev = netdev_priv(dev); 414 struct qede_stats_common *p_common; 415 416 qede_fill_by_demand_stats(edev); 417 p_common = &edev->stats.common; 418 419 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 420 p_common->rx_bcast_pkts; 421 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 422 p_common->tx_bcast_pkts; 423 424 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 425 p_common->rx_bcast_bytes; 426 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 427 p_common->tx_bcast_bytes; 428 429 stats->tx_errors = p_common->tx_err_drop_pkts; 430 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 431 432 stats->rx_fifo_errors = p_common->no_buff_discards; 433 434 if (QEDE_IS_BB(edev)) 435 stats->collisions = edev->stats.bb.tx_total_collisions; 436 stats->rx_crc_errors = p_common->rx_crc_errors; 437 stats->rx_frame_errors = p_common->rx_align_errors; 438 } 439 440 #ifdef CONFIG_QED_SRIOV 441 static int qede_get_vf_config(struct net_device *dev, int vfidx, 442 struct ifla_vf_info *ivi) 443 { 444 struct qede_dev *edev = netdev_priv(dev); 445 446 if (!edev->ops) 447 return -EINVAL; 448 449 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 450 } 451 452 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 453 int min_tx_rate, int max_tx_rate) 454 { 455 struct qede_dev *edev = netdev_priv(dev); 456 457 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 458 max_tx_rate); 459 } 460 461 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 462 { 463 struct qede_dev *edev = netdev_priv(dev); 464 465 if (!edev->ops) 466 return -EINVAL; 467 468 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 469 } 470 471 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 472 int link_state) 473 { 474 struct qede_dev *edev = netdev_priv(dev); 475 476 if (!edev->ops) 477 return -EINVAL; 478 479 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 480 } 481 482 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 483 { 484 struct qede_dev *edev = netdev_priv(dev); 485 486 if (!edev->ops) 487 return -EINVAL; 488 489 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 490 } 491 #endif 492 493 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 494 { 495 struct qede_dev *edev = netdev_priv(dev); 496 497 if (!netif_running(dev)) 498 return -EAGAIN; 499 500 switch (cmd) { 501 case SIOCSHWTSTAMP: 502 return qede_ptp_hw_ts(edev, ifr); 503 default: 504 DP_VERBOSE(edev, QED_MSG_DEBUG, 505 "default IOCTL cmd 0x%x\n", cmd); 506 return -EOPNOTSUPP; 507 } 508 509 return 0; 510 } 511 512 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq) 513 { 514 DP_NOTICE(edev, 515 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n", 516 txq->index, le16_to_cpu(*txq->hw_cons_ptr), 517 qed_chain_get_cons_idx(&txq->tx_pbl), 518 qed_chain_get_prod_idx(&txq->tx_pbl), 519 jiffies); 520 } 521 522 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue) 523 { 524 struct qede_dev *edev = netdev_priv(dev); 525 struct qede_tx_queue *txq; 526 int cos; 527 528 netif_carrier_off(dev); 529 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue); 530 531 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX)) 532 return; 533 534 for_each_cos_in_txq(edev, cos) { 535 txq = &edev->fp_array[txqueue].txq[cos]; 536 537 if (qed_chain_get_cons_idx(&txq->tx_pbl) != 538 qed_chain_get_prod_idx(&txq->tx_pbl)) 539 qede_tx_log_print(edev, txq); 540 } 541 542 if (IS_VF(edev)) 543 return; 544 545 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 546 edev->state == QEDE_STATE_RECOVERY) { 547 DP_INFO(edev, 548 "Avoid handling a Tx timeout while another HW error is being handled\n"); 549 return; 550 } 551 552 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags); 553 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 554 schedule_delayed_work(&edev->sp_task, 0); 555 } 556 557 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 558 { 559 struct qede_dev *edev = netdev_priv(ndev); 560 int cos, count, offset; 561 562 if (num_tc > edev->dev_info.num_tc) 563 return -EINVAL; 564 565 netdev_reset_tc(ndev); 566 netdev_set_num_tc(ndev, num_tc); 567 568 for_each_cos_in_txq(edev, cos) { 569 count = QEDE_TSS_COUNT(edev); 570 offset = cos * QEDE_TSS_COUNT(edev); 571 netdev_set_tc_queue(ndev, cos, count, offset); 572 } 573 574 return 0; 575 } 576 577 static int 578 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 579 __be16 proto) 580 { 581 switch (f->command) { 582 case FLOW_CLS_REPLACE: 583 return qede_add_tc_flower_fltr(edev, proto, f); 584 case FLOW_CLS_DESTROY: 585 return qede_delete_flow_filter(edev, f->cookie); 586 default: 587 return -EOPNOTSUPP; 588 } 589 } 590 591 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 592 void *cb_priv) 593 { 594 struct flow_cls_offload *f; 595 struct qede_dev *edev = cb_priv; 596 597 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 598 return -EOPNOTSUPP; 599 600 switch (type) { 601 case TC_SETUP_CLSFLOWER: 602 f = type_data; 603 return qede_set_flower(edev, f, f->common.protocol); 604 default: 605 return -EOPNOTSUPP; 606 } 607 } 608 609 static LIST_HEAD(qede_block_cb_list); 610 611 static int 612 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 613 void *type_data) 614 { 615 struct qede_dev *edev = netdev_priv(dev); 616 struct tc_mqprio_qopt *mqprio; 617 618 switch (type) { 619 case TC_SETUP_BLOCK: 620 return flow_block_cb_setup_simple(type_data, 621 &qede_block_cb_list, 622 qede_setup_tc_block_cb, 623 edev, edev, true); 624 case TC_SETUP_QDISC_MQPRIO: 625 mqprio = type_data; 626 627 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 628 return qede_setup_tc(dev, mqprio->num_tc); 629 default: 630 return -EOPNOTSUPP; 631 } 632 } 633 634 static const struct net_device_ops qede_netdev_ops = { 635 .ndo_open = qede_open, 636 .ndo_stop = qede_close, 637 .ndo_start_xmit = qede_start_xmit, 638 .ndo_select_queue = qede_select_queue, 639 .ndo_set_rx_mode = qede_set_rx_mode, 640 .ndo_set_mac_address = qede_set_mac_addr, 641 .ndo_validate_addr = eth_validate_addr, 642 .ndo_change_mtu = qede_change_mtu, 643 .ndo_eth_ioctl = qede_ioctl, 644 .ndo_tx_timeout = qede_tx_timeout, 645 #ifdef CONFIG_QED_SRIOV 646 .ndo_set_vf_mac = qede_set_vf_mac, 647 .ndo_set_vf_vlan = qede_set_vf_vlan, 648 .ndo_set_vf_trust = qede_set_vf_trust, 649 #endif 650 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 651 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 652 .ndo_fix_features = qede_fix_features, 653 .ndo_set_features = qede_set_features, 654 .ndo_get_stats64 = qede_get_stats64, 655 #ifdef CONFIG_QED_SRIOV 656 .ndo_set_vf_link_state = qede_set_vf_link_state, 657 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 658 .ndo_get_vf_config = qede_get_vf_config, 659 .ndo_set_vf_rate = qede_set_vf_rate, 660 #endif 661 .ndo_features_check = qede_features_check, 662 .ndo_bpf = qede_xdp, 663 #ifdef CONFIG_RFS_ACCEL 664 .ndo_rx_flow_steer = qede_rx_flow_steer, 665 #endif 666 .ndo_xdp_xmit = qede_xdp_transmit, 667 .ndo_setup_tc = qede_setup_tc_offload, 668 }; 669 670 static const struct net_device_ops qede_netdev_vf_ops = { 671 .ndo_open = qede_open, 672 .ndo_stop = qede_close, 673 .ndo_start_xmit = qede_start_xmit, 674 .ndo_select_queue = qede_select_queue, 675 .ndo_set_rx_mode = qede_set_rx_mode, 676 .ndo_set_mac_address = qede_set_mac_addr, 677 .ndo_validate_addr = eth_validate_addr, 678 .ndo_change_mtu = qede_change_mtu, 679 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 680 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 681 .ndo_fix_features = qede_fix_features, 682 .ndo_set_features = qede_set_features, 683 .ndo_get_stats64 = qede_get_stats64, 684 .ndo_features_check = qede_features_check, 685 }; 686 687 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 688 .ndo_open = qede_open, 689 .ndo_stop = qede_close, 690 .ndo_start_xmit = qede_start_xmit, 691 .ndo_select_queue = qede_select_queue, 692 .ndo_set_rx_mode = qede_set_rx_mode, 693 .ndo_set_mac_address = qede_set_mac_addr, 694 .ndo_validate_addr = eth_validate_addr, 695 .ndo_change_mtu = qede_change_mtu, 696 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 697 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 698 .ndo_fix_features = qede_fix_features, 699 .ndo_set_features = qede_set_features, 700 .ndo_get_stats64 = qede_get_stats64, 701 .ndo_features_check = qede_features_check, 702 .ndo_bpf = qede_xdp, 703 .ndo_xdp_xmit = qede_xdp_transmit, 704 }; 705 706 /* ------------------------------------------------------------------------- 707 * START OF PROBE / REMOVE 708 * ------------------------------------------------------------------------- 709 */ 710 711 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 712 struct pci_dev *pdev, 713 struct qed_dev_eth_info *info, 714 u32 dp_module, u8 dp_level) 715 { 716 struct net_device *ndev; 717 struct qede_dev *edev; 718 719 ndev = alloc_etherdev_mqs(sizeof(*edev), 720 info->num_queues * info->num_tc, 721 info->num_queues); 722 if (!ndev) { 723 pr_err("etherdev allocation failed\n"); 724 return NULL; 725 } 726 727 edev = netdev_priv(ndev); 728 edev->ndev = ndev; 729 edev->cdev = cdev; 730 edev->pdev = pdev; 731 edev->dp_module = dp_module; 732 edev->dp_level = dp_level; 733 edev->ops = qed_ops; 734 735 if (is_kdump_kernel()) { 736 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN; 737 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN; 738 } else { 739 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 740 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 741 } 742 743 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 744 info->num_queues, info->num_queues); 745 746 SET_NETDEV_DEV(ndev, &pdev->dev); 747 748 memset(&edev->stats, 0, sizeof(edev->stats)); 749 memcpy(&edev->dev_info, info, sizeof(*info)); 750 751 /* As ethtool doesn't have the ability to show WoL behavior as 752 * 'default', if device supports it declare it's enabled. 753 */ 754 if (edev->dev_info.common.wol_support) 755 edev->wol_enabled = true; 756 757 INIT_LIST_HEAD(&edev->vlan_list); 758 759 return edev; 760 } 761 762 static void qede_init_ndev(struct qede_dev *edev) 763 { 764 struct net_device *ndev = edev->ndev; 765 struct pci_dev *pdev = edev->pdev; 766 bool udp_tunnel_enable = false; 767 netdev_features_t hw_features; 768 769 pci_set_drvdata(pdev, ndev); 770 771 ndev->mem_start = edev->dev_info.common.pci_mem_start; 772 ndev->base_addr = ndev->mem_start; 773 ndev->mem_end = edev->dev_info.common.pci_mem_end; 774 ndev->irq = edev->dev_info.common.pci_irq; 775 776 ndev->watchdog_timeo = TX_TIMEOUT; 777 778 if (IS_VF(edev)) { 779 if (edev->dev_info.xdp_supported) 780 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 781 else 782 ndev->netdev_ops = &qede_netdev_vf_ops; 783 } else { 784 ndev->netdev_ops = &qede_netdev_ops; 785 } 786 787 qede_set_ethtool_ops(ndev); 788 789 ndev->priv_flags |= IFF_UNICAST_FLT; 790 791 /* user-changeble features */ 792 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 793 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 794 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 795 796 if (edev->dev_info.common.b_arfs_capable) 797 hw_features |= NETIF_F_NTUPLE; 798 799 if (edev->dev_info.common.vxlan_enable || 800 edev->dev_info.common.geneve_enable) 801 udp_tunnel_enable = true; 802 803 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 804 hw_features |= NETIF_F_TSO_ECN; 805 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 806 NETIF_F_SG | NETIF_F_TSO | 807 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 808 NETIF_F_RXCSUM; 809 } 810 811 if (udp_tunnel_enable) { 812 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 813 NETIF_F_GSO_UDP_TUNNEL_CSUM); 814 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 815 NETIF_F_GSO_UDP_TUNNEL_CSUM); 816 817 qede_set_udp_tunnels(edev); 818 } 819 820 if (edev->dev_info.common.gre_enable) { 821 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 822 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 823 NETIF_F_GSO_GRE_CSUM); 824 } 825 826 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 827 NETIF_F_HIGHDMA; 828 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 829 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 830 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 831 832 ndev->hw_features = hw_features; 833 834 /* MTU range: 46 - 9600 */ 835 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 836 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 837 838 /* Set network device HW mac */ 839 eth_hw_addr_set(edev->ndev, edev->dev_info.common.hw_mac); 840 841 ndev->mtu = edev->dev_info.common.mtu; 842 } 843 844 /* This function converts from 32b param to two params of level and module 845 * Input 32b decoding: 846 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 847 * 'happy' flow, e.g. memory allocation failed. 848 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 849 * and provide important parameters. 850 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 851 * module. VERBOSE prints are for tracking the specific flow in low level. 852 * 853 * Notice that the level should be that of the lowest required logs. 854 */ 855 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 856 { 857 *p_dp_level = QED_LEVEL_NOTICE; 858 *p_dp_module = 0; 859 860 if (debug & QED_LOG_VERBOSE_MASK) { 861 *p_dp_level = QED_LEVEL_VERBOSE; 862 *p_dp_module = (debug & 0x3FFFFFFF); 863 } else if (debug & QED_LOG_INFO_MASK) { 864 *p_dp_level = QED_LEVEL_INFO; 865 } else if (debug & QED_LOG_NOTICE_MASK) { 866 *p_dp_level = QED_LEVEL_NOTICE; 867 } 868 } 869 870 static void qede_free_fp_array(struct qede_dev *edev) 871 { 872 if (edev->fp_array) { 873 struct qede_fastpath *fp; 874 int i; 875 876 for_each_queue(i) { 877 fp = &edev->fp_array[i]; 878 879 kfree(fp->sb_info); 880 /* Handle mem alloc failure case where qede_init_fp 881 * didn't register xdp_rxq_info yet. 882 * Implicit only (fp->type & QEDE_FASTPATH_RX) 883 */ 884 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 885 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 886 kfree(fp->rxq); 887 kfree(fp->xdp_tx); 888 kfree(fp->txq); 889 } 890 kfree(edev->fp_array); 891 } 892 893 edev->num_queues = 0; 894 edev->fp_num_tx = 0; 895 edev->fp_num_rx = 0; 896 } 897 898 static int qede_alloc_fp_array(struct qede_dev *edev) 899 { 900 u8 fp_combined, fp_rx = edev->fp_num_rx; 901 struct qede_fastpath *fp; 902 void *mem; 903 int i; 904 905 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 906 sizeof(*edev->fp_array), GFP_KERNEL); 907 if (!edev->fp_array) { 908 DP_NOTICE(edev, "fp array allocation failed\n"); 909 goto err; 910 } 911 912 mem = krealloc(edev->coal_entry, QEDE_QUEUE_CNT(edev) * 913 sizeof(*edev->coal_entry), GFP_KERNEL); 914 if (!mem) { 915 DP_ERR(edev, "coalesce entry allocation failed\n"); 916 kfree(edev->coal_entry); 917 goto err; 918 } 919 edev->coal_entry = mem; 920 921 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 922 923 /* Allocate the FP elements for Rx queues followed by combined and then 924 * the Tx. This ordering should be maintained so that the respective 925 * queues (Rx or Tx) will be together in the fastpath array and the 926 * associated ids will be sequential. 927 */ 928 for_each_queue(i) { 929 fp = &edev->fp_array[i]; 930 931 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 932 if (!fp->sb_info) { 933 DP_NOTICE(edev, "sb info struct allocation failed\n"); 934 goto err; 935 } 936 937 if (fp_rx) { 938 fp->type = QEDE_FASTPATH_RX; 939 fp_rx--; 940 } else if (fp_combined) { 941 fp->type = QEDE_FASTPATH_COMBINED; 942 fp_combined--; 943 } else { 944 fp->type = QEDE_FASTPATH_TX; 945 } 946 947 if (fp->type & QEDE_FASTPATH_TX) { 948 fp->txq = kcalloc(edev->dev_info.num_tc, 949 sizeof(*fp->txq), GFP_KERNEL); 950 if (!fp->txq) 951 goto err; 952 } 953 954 if (fp->type & QEDE_FASTPATH_RX) { 955 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 956 if (!fp->rxq) 957 goto err; 958 959 if (edev->xdp_prog) { 960 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 961 GFP_KERNEL); 962 if (!fp->xdp_tx) 963 goto err; 964 fp->type |= QEDE_FASTPATH_XDP; 965 } 966 } 967 } 968 969 return 0; 970 err: 971 qede_free_fp_array(edev); 972 return -ENOMEM; 973 } 974 975 /* The qede lock is used to protect driver state change and driver flows that 976 * are not reentrant. 977 */ 978 void __qede_lock(struct qede_dev *edev) 979 { 980 mutex_lock(&edev->qede_lock); 981 } 982 983 void __qede_unlock(struct qede_dev *edev) 984 { 985 mutex_unlock(&edev->qede_lock); 986 } 987 988 /* This version of the lock should be used when acquiring the RTNL lock is also 989 * needed in addition to the internal qede lock. 990 */ 991 static void qede_lock(struct qede_dev *edev) 992 { 993 rtnl_lock(); 994 __qede_lock(edev); 995 } 996 997 static void qede_unlock(struct qede_dev *edev) 998 { 999 __qede_unlock(edev); 1000 rtnl_unlock(); 1001 } 1002 1003 static void qede_sp_task(struct work_struct *work) 1004 { 1005 struct qede_dev *edev = container_of(work, struct qede_dev, 1006 sp_task.work); 1007 1008 /* Disable execution of this deferred work once 1009 * qede removal is in progress, this stop any future 1010 * scheduling of sp_task. 1011 */ 1012 if (test_bit(QEDE_SP_DISABLE, &edev->sp_flags)) 1013 return; 1014 1015 /* The locking scheme depends on the specific flag: 1016 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 1017 * ensure that ongoing flows are ended and new ones are not started. 1018 * In other cases - only the internal qede lock should be acquired. 1019 */ 1020 1021 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 1022 #ifdef CONFIG_QED_SRIOV 1023 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1024 * The recovery of the active VFs is currently not supported. 1025 */ 1026 if (pci_num_vf(edev->pdev)) 1027 qede_sriov_configure(edev->pdev, 0); 1028 #endif 1029 qede_lock(edev); 1030 qede_recovery_handler(edev); 1031 qede_unlock(edev); 1032 } 1033 1034 __qede_lock(edev); 1035 1036 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 1037 if (edev->state == QEDE_STATE_OPEN) 1038 qede_config_rx_mode(edev->ndev); 1039 1040 #ifdef CONFIG_RFS_ACCEL 1041 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1042 if (edev->state == QEDE_STATE_OPEN) 1043 qede_process_arfs_filters(edev, false); 1044 } 1045 #endif 1046 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags)) 1047 qede_generic_hw_err_handler(edev); 1048 __qede_unlock(edev); 1049 1050 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1051 #ifdef CONFIG_QED_SRIOV 1052 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1053 * The recovery of the active VFs is currently not supported. 1054 */ 1055 if (pci_num_vf(edev->pdev)) 1056 qede_sriov_configure(edev->pdev, 0); 1057 #endif 1058 edev->ops->common->recovery_process(edev->cdev); 1059 } 1060 } 1061 1062 static void qede_update_pf_params(struct qed_dev *cdev) 1063 { 1064 struct qed_pf_params pf_params; 1065 u16 num_cons; 1066 1067 /* 64 rx + 64 tx + 64 XDP */ 1068 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1069 1070 /* 1 rx + 1 xdp + max tx cos */ 1071 num_cons = QED_MIN_L2_CONS; 1072 1073 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1074 1075 /* Same for VFs - make sure they'll have sufficient connections 1076 * to support XDP Tx queues. 1077 */ 1078 pf_params.eth_pf_params.num_vf_cons = 48; 1079 1080 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1081 qed_ops->common->update_pf_params(cdev, &pf_params); 1082 } 1083 1084 #define QEDE_FW_VER_STR_SIZE 80 1085 1086 static void qede_log_probe(struct qede_dev *edev) 1087 { 1088 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1089 u8 buf[QEDE_FW_VER_STR_SIZE]; 1090 size_t left_size; 1091 1092 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1093 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1094 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1095 p_dev_info->fw_eng, 1096 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1097 QED_MFW_VERSION_3_OFFSET, 1098 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1099 QED_MFW_VERSION_2_OFFSET, 1100 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1101 QED_MFW_VERSION_1_OFFSET, 1102 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1103 QED_MFW_VERSION_0_OFFSET); 1104 1105 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1106 if (p_dev_info->mbi_version && left_size) 1107 snprintf(buf + strlen(buf), left_size, 1108 " [MBI %d.%d.%d]", 1109 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1110 QED_MBI_VERSION_2_OFFSET, 1111 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1112 QED_MBI_VERSION_1_OFFSET, 1113 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1114 QED_MBI_VERSION_0_OFFSET); 1115 1116 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1117 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1118 buf, edev->ndev->name); 1119 } 1120 1121 enum qede_probe_mode { 1122 QEDE_PROBE_NORMAL, 1123 QEDE_PROBE_RECOVERY, 1124 }; 1125 1126 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1127 bool is_vf, enum qede_probe_mode mode) 1128 { 1129 struct qed_probe_params probe_params; 1130 struct qed_slowpath_params sp_params; 1131 struct qed_dev_eth_info dev_info; 1132 struct qede_dev *edev; 1133 struct qed_dev *cdev; 1134 int rc; 1135 1136 if (unlikely(dp_level & QED_LEVEL_INFO)) 1137 pr_notice("Starting qede probe\n"); 1138 1139 memset(&probe_params, 0, sizeof(probe_params)); 1140 probe_params.protocol = QED_PROTOCOL_ETH; 1141 probe_params.dp_module = dp_module; 1142 probe_params.dp_level = dp_level; 1143 probe_params.is_vf = is_vf; 1144 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1145 cdev = qed_ops->common->probe(pdev, &probe_params); 1146 if (!cdev) { 1147 rc = -ENODEV; 1148 goto err0; 1149 } 1150 1151 qede_update_pf_params(cdev); 1152 1153 /* Start the Slowpath-process */ 1154 memset(&sp_params, 0, sizeof(sp_params)); 1155 sp_params.int_mode = QED_INT_MODE_MSIX; 1156 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1157 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1158 if (rc) { 1159 pr_notice("Cannot start slowpath\n"); 1160 goto err1; 1161 } 1162 1163 /* Learn information crucial for qede to progress */ 1164 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1165 if (rc) 1166 goto err2; 1167 1168 if (mode != QEDE_PROBE_RECOVERY) { 1169 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1170 dp_level); 1171 if (!edev) { 1172 rc = -ENOMEM; 1173 goto err2; 1174 } 1175 1176 edev->devlink = qed_ops->common->devlink_register(cdev); 1177 if (IS_ERR(edev->devlink)) { 1178 DP_NOTICE(edev, "Cannot register devlink\n"); 1179 rc = PTR_ERR(edev->devlink); 1180 edev->devlink = NULL; 1181 goto err3; 1182 } 1183 } else { 1184 struct net_device *ndev = pci_get_drvdata(pdev); 1185 struct qed_devlink *qdl; 1186 1187 edev = netdev_priv(ndev); 1188 qdl = devlink_priv(edev->devlink); 1189 qdl->cdev = cdev; 1190 edev->cdev = cdev; 1191 memset(&edev->stats, 0, sizeof(edev->stats)); 1192 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1193 } 1194 1195 if (is_vf) 1196 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1197 1198 qede_init_ndev(edev); 1199 1200 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1201 if (rc) 1202 goto err3; 1203 1204 if (mode != QEDE_PROBE_RECOVERY) { 1205 /* Prepare the lock prior to the registration of the netdev, 1206 * as once it's registered we might reach flows requiring it 1207 * [it's even possible to reach a flow needing it directly 1208 * from there, although it's unlikely]. 1209 */ 1210 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1211 mutex_init(&edev->qede_lock); 1212 1213 rc = register_netdev(edev->ndev); 1214 if (rc) { 1215 DP_NOTICE(edev, "Cannot register net-device\n"); 1216 goto err4; 1217 } 1218 } 1219 1220 edev->ops->common->set_name(cdev, edev->ndev->name); 1221 1222 /* PTP not supported on VFs */ 1223 if (!is_vf) 1224 qede_ptp_enable(edev); 1225 1226 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1227 1228 #ifdef CONFIG_DCB 1229 if (!IS_VF(edev)) 1230 qede_set_dcbnl_ops(edev->ndev); 1231 #endif 1232 1233 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1234 1235 qede_log_probe(edev); 1236 return 0; 1237 1238 err4: 1239 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1240 err3: 1241 if (mode != QEDE_PROBE_RECOVERY) 1242 free_netdev(edev->ndev); 1243 else 1244 edev->cdev = NULL; 1245 err2: 1246 qed_ops->common->slowpath_stop(cdev); 1247 err1: 1248 qed_ops->common->remove(cdev); 1249 err0: 1250 return rc; 1251 } 1252 1253 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1254 { 1255 bool is_vf = false; 1256 u32 dp_module = 0; 1257 u8 dp_level = 0; 1258 1259 switch ((enum qede_pci_private)id->driver_data) { 1260 case QEDE_PRIVATE_VF: 1261 if (debug & QED_LOG_VERBOSE_MASK) 1262 dev_err(&pdev->dev, "Probing a VF\n"); 1263 is_vf = true; 1264 break; 1265 default: 1266 if (debug & QED_LOG_VERBOSE_MASK) 1267 dev_err(&pdev->dev, "Probing a PF\n"); 1268 } 1269 1270 qede_config_debug(debug, &dp_module, &dp_level); 1271 1272 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1273 QEDE_PROBE_NORMAL); 1274 } 1275 1276 enum qede_remove_mode { 1277 QEDE_REMOVE_NORMAL, 1278 QEDE_REMOVE_RECOVERY, 1279 }; 1280 1281 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1282 { 1283 struct net_device *ndev = pci_get_drvdata(pdev); 1284 struct qede_dev *edev; 1285 struct qed_dev *cdev; 1286 1287 if (!ndev) { 1288 dev_info(&pdev->dev, "Device has already been removed\n"); 1289 return; 1290 } 1291 1292 edev = netdev_priv(ndev); 1293 cdev = edev->cdev; 1294 1295 DP_INFO(edev, "Starting qede_remove\n"); 1296 1297 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1298 1299 if (mode != QEDE_REMOVE_RECOVERY) { 1300 set_bit(QEDE_SP_DISABLE, &edev->sp_flags); 1301 unregister_netdev(ndev); 1302 1303 cancel_delayed_work_sync(&edev->sp_task); 1304 1305 edev->ops->common->set_power_state(cdev, PCI_D0); 1306 1307 pci_set_drvdata(pdev, NULL); 1308 } 1309 1310 qede_ptp_disable(edev); 1311 1312 /* Use global ops since we've freed edev */ 1313 qed_ops->common->slowpath_stop(cdev); 1314 if (system_state == SYSTEM_POWER_OFF) 1315 return; 1316 1317 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) { 1318 qed_ops->common->devlink_unregister(edev->devlink); 1319 edev->devlink = NULL; 1320 } 1321 qed_ops->common->remove(cdev); 1322 edev->cdev = NULL; 1323 1324 /* Since this can happen out-of-sync with other flows, 1325 * don't release the netdevice until after slowpath stop 1326 * has been called to guarantee various other contexts 1327 * [e.g., QED register callbacks] won't break anything when 1328 * accessing the netdevice. 1329 */ 1330 if (mode != QEDE_REMOVE_RECOVERY) { 1331 kfree(edev->coal_entry); 1332 free_netdev(ndev); 1333 } 1334 1335 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1336 } 1337 1338 static void qede_remove(struct pci_dev *pdev) 1339 { 1340 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1341 } 1342 1343 static void qede_shutdown(struct pci_dev *pdev) 1344 { 1345 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1346 } 1347 1348 /* ------------------------------------------------------------------------- 1349 * START OF LOAD / UNLOAD 1350 * ------------------------------------------------------------------------- 1351 */ 1352 1353 static int qede_set_num_queues(struct qede_dev *edev) 1354 { 1355 int rc; 1356 u16 rss_num; 1357 1358 /* Setup queues according to possible resources*/ 1359 if (edev->req_queues) 1360 rss_num = edev->req_queues; 1361 else 1362 rss_num = netif_get_num_default_rss_queues() * 1363 edev->dev_info.common.num_hwfns; 1364 1365 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1366 1367 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1368 if (rc > 0) { 1369 /* Managed to request interrupts for our queues */ 1370 edev->num_queues = rc; 1371 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1372 QEDE_QUEUE_CNT(edev), rss_num); 1373 rc = 0; 1374 } 1375 1376 edev->fp_num_tx = edev->req_num_tx; 1377 edev->fp_num_rx = edev->req_num_rx; 1378 1379 return rc; 1380 } 1381 1382 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1383 u16 sb_id) 1384 { 1385 if (sb_info->sb_virt) { 1386 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1387 QED_SB_TYPE_L2_QUEUE); 1388 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1389 (void *)sb_info->sb_virt, sb_info->sb_phys); 1390 memset(sb_info, 0, sizeof(*sb_info)); 1391 } 1392 } 1393 1394 /* This function allocates fast-path status block memory */ 1395 static int qede_alloc_mem_sb(struct qede_dev *edev, 1396 struct qed_sb_info *sb_info, u16 sb_id) 1397 { 1398 struct status_block *sb_virt; 1399 dma_addr_t sb_phys; 1400 int rc; 1401 1402 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1403 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1404 if (!sb_virt) { 1405 DP_ERR(edev, "Status block allocation failed\n"); 1406 return -ENOMEM; 1407 } 1408 1409 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1410 sb_virt, sb_phys, sb_id, 1411 QED_SB_TYPE_L2_QUEUE); 1412 if (rc) { 1413 DP_ERR(edev, "Status block initialization failed\n"); 1414 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1415 sb_virt, sb_phys); 1416 return rc; 1417 } 1418 1419 return 0; 1420 } 1421 1422 static void qede_free_rx_buffers(struct qede_dev *edev, 1423 struct qede_rx_queue *rxq) 1424 { 1425 u16 i; 1426 1427 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1428 struct sw_rx_data *rx_buf; 1429 struct page *data; 1430 1431 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1432 data = rx_buf->data; 1433 1434 dma_unmap_page(&edev->pdev->dev, 1435 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1436 1437 rx_buf->data = NULL; 1438 __free_page(data); 1439 } 1440 } 1441 1442 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1443 { 1444 /* Free rx buffers */ 1445 qede_free_rx_buffers(edev, rxq); 1446 1447 /* Free the parallel SW ring */ 1448 kfree(rxq->sw_rx_ring); 1449 1450 /* Free the real RQ ring used by FW */ 1451 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1452 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1453 } 1454 1455 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1456 { 1457 int i; 1458 1459 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1460 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1461 1462 tpa_info->state = QEDE_AGG_STATE_NONE; 1463 } 1464 } 1465 1466 /* This function allocates all memory needed per Rx queue */ 1467 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1468 { 1469 struct qed_chain_init_params params = { 1470 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1471 .num_elems = RX_RING_SIZE, 1472 }; 1473 struct qed_dev *cdev = edev->cdev; 1474 int i, rc, size; 1475 1476 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1477 1478 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1479 1480 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1481 size = rxq->rx_headroom + 1482 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1483 1484 /* Make sure that the headroom and payload fit in a single page */ 1485 if (rxq->rx_buf_size + size > PAGE_SIZE) 1486 rxq->rx_buf_size = PAGE_SIZE - size; 1487 1488 /* Segment size to split a page in multiple equal parts, 1489 * unless XDP is used in which case we'd use the entire page. 1490 */ 1491 if (!edev->xdp_prog) { 1492 size = size + rxq->rx_buf_size; 1493 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1494 } else { 1495 rxq->rx_buf_seg_size = PAGE_SIZE; 1496 edev->ndev->features &= ~NETIF_F_GRO_HW; 1497 } 1498 1499 /* Allocate the parallel driver ring for Rx buffers */ 1500 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1501 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1502 if (!rxq->sw_rx_ring) { 1503 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1504 rc = -ENOMEM; 1505 goto err; 1506 } 1507 1508 /* Allocate FW Rx ring */ 1509 params.mode = QED_CHAIN_MODE_NEXT_PTR; 1510 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE; 1511 params.elem_size = sizeof(struct eth_rx_bd); 1512 1513 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms); 1514 if (rc) 1515 goto err; 1516 1517 /* Allocate FW completion ring */ 1518 params.mode = QED_CHAIN_MODE_PBL; 1519 params.intended_use = QED_CHAIN_USE_TO_CONSUME; 1520 params.elem_size = sizeof(union eth_rx_cqe); 1521 1522 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms); 1523 if (rc) 1524 goto err; 1525 1526 /* Allocate buffers for the Rx ring */ 1527 rxq->filled_buffers = 0; 1528 for (i = 0; i < rxq->num_rx_buffers; i++) { 1529 rc = qede_alloc_rx_buffer(rxq, false); 1530 if (rc) { 1531 DP_ERR(edev, 1532 "Rx buffers allocation failed at index %d\n", i); 1533 goto err; 1534 } 1535 } 1536 1537 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1538 if (!edev->gro_disable) 1539 qede_set_tpa_param(rxq); 1540 err: 1541 return rc; 1542 } 1543 1544 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1545 { 1546 /* Free the parallel SW ring */ 1547 if (txq->is_xdp) 1548 kfree(txq->sw_tx_ring.xdp); 1549 else 1550 kfree(txq->sw_tx_ring.skbs); 1551 1552 /* Free the real RQ ring used by FW */ 1553 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1554 } 1555 1556 /* This function allocates all memory needed per Tx queue */ 1557 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1558 { 1559 struct qed_chain_init_params params = { 1560 .mode = QED_CHAIN_MODE_PBL, 1561 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1562 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1563 .num_elems = edev->q_num_tx_buffers, 1564 .elem_size = sizeof(union eth_tx_bd_types), 1565 }; 1566 int size, rc; 1567 1568 txq->num_tx_buffers = edev->q_num_tx_buffers; 1569 1570 /* Allocate the parallel driver ring for Tx buffers */ 1571 if (txq->is_xdp) { 1572 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1573 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1574 if (!txq->sw_tx_ring.xdp) 1575 goto err; 1576 } else { 1577 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1578 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1579 if (!txq->sw_tx_ring.skbs) 1580 goto err; 1581 } 1582 1583 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms); 1584 if (rc) 1585 goto err; 1586 1587 return 0; 1588 1589 err: 1590 qede_free_mem_txq(edev, txq); 1591 return -ENOMEM; 1592 } 1593 1594 /* This function frees all memory of a single fp */ 1595 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1596 { 1597 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1598 1599 if (fp->type & QEDE_FASTPATH_RX) 1600 qede_free_mem_rxq(edev, fp->rxq); 1601 1602 if (fp->type & QEDE_FASTPATH_XDP) 1603 qede_free_mem_txq(edev, fp->xdp_tx); 1604 1605 if (fp->type & QEDE_FASTPATH_TX) { 1606 int cos; 1607 1608 for_each_cos_in_txq(edev, cos) 1609 qede_free_mem_txq(edev, &fp->txq[cos]); 1610 } 1611 } 1612 1613 /* This function allocates all memory needed for a single fp (i.e. an entity 1614 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1615 */ 1616 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1617 { 1618 int rc = 0; 1619 1620 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1621 if (rc) 1622 goto out; 1623 1624 if (fp->type & QEDE_FASTPATH_RX) { 1625 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1626 if (rc) 1627 goto out; 1628 } 1629 1630 if (fp->type & QEDE_FASTPATH_XDP) { 1631 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1632 if (rc) 1633 goto out; 1634 } 1635 1636 if (fp->type & QEDE_FASTPATH_TX) { 1637 int cos; 1638 1639 for_each_cos_in_txq(edev, cos) { 1640 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1641 if (rc) 1642 goto out; 1643 } 1644 } 1645 1646 out: 1647 return rc; 1648 } 1649 1650 static void qede_free_mem_load(struct qede_dev *edev) 1651 { 1652 int i; 1653 1654 for_each_queue(i) { 1655 struct qede_fastpath *fp = &edev->fp_array[i]; 1656 1657 qede_free_mem_fp(edev, fp); 1658 } 1659 } 1660 1661 /* This function allocates all qede memory at NIC load. */ 1662 static int qede_alloc_mem_load(struct qede_dev *edev) 1663 { 1664 int rc = 0, queue_id; 1665 1666 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1667 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1668 1669 rc = qede_alloc_mem_fp(edev, fp); 1670 if (rc) { 1671 DP_ERR(edev, 1672 "Failed to allocate memory for fastpath - rss id = %d\n", 1673 queue_id); 1674 qede_free_mem_load(edev); 1675 return rc; 1676 } 1677 } 1678 1679 return 0; 1680 } 1681 1682 static void qede_empty_tx_queue(struct qede_dev *edev, 1683 struct qede_tx_queue *txq) 1684 { 1685 unsigned int pkts_compl = 0, bytes_compl = 0; 1686 struct netdev_queue *netdev_txq; 1687 int rc, len = 0; 1688 1689 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1690 1691 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1692 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1693 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1694 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1695 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1696 qed_chain_get_prod_idx(&txq->tx_pbl)); 1697 1698 rc = qede_free_tx_pkt(edev, txq, &len); 1699 if (rc) { 1700 DP_NOTICE(edev, 1701 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1702 txq->index, 1703 qed_chain_get_cons_idx(&txq->tx_pbl), 1704 qed_chain_get_prod_idx(&txq->tx_pbl)); 1705 break; 1706 } 1707 1708 bytes_compl += len; 1709 pkts_compl++; 1710 txq->sw_tx_cons++; 1711 } 1712 1713 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1714 } 1715 1716 static void qede_empty_tx_queues(struct qede_dev *edev) 1717 { 1718 int i; 1719 1720 for_each_queue(i) 1721 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1722 int cos; 1723 1724 for_each_cos_in_txq(edev, cos) { 1725 struct qede_fastpath *fp; 1726 1727 fp = &edev->fp_array[i]; 1728 qede_empty_tx_queue(edev, 1729 &fp->txq[cos]); 1730 } 1731 } 1732 } 1733 1734 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1735 static void qede_init_fp(struct qede_dev *edev) 1736 { 1737 int queue_id, rxq_index = 0, txq_index = 0; 1738 struct qede_fastpath *fp; 1739 bool init_xdp = false; 1740 1741 for_each_queue(queue_id) { 1742 fp = &edev->fp_array[queue_id]; 1743 1744 fp->edev = edev; 1745 fp->id = queue_id; 1746 1747 if (fp->type & QEDE_FASTPATH_XDP) { 1748 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1749 rxq_index); 1750 fp->xdp_tx->is_xdp = 1; 1751 1752 spin_lock_init(&fp->xdp_tx->xdp_tx_lock); 1753 init_xdp = true; 1754 } 1755 1756 if (fp->type & QEDE_FASTPATH_RX) { 1757 fp->rxq->rxq_id = rxq_index++; 1758 1759 /* Determine how to map buffers for this queue */ 1760 if (fp->type & QEDE_FASTPATH_XDP) 1761 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1762 else 1763 fp->rxq->data_direction = DMA_FROM_DEVICE; 1764 fp->rxq->dev = &edev->pdev->dev; 1765 1766 /* Driver have no error path from here */ 1767 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1768 fp->rxq->rxq_id, 0) < 0); 1769 1770 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq, 1771 MEM_TYPE_PAGE_ORDER0, 1772 NULL)) { 1773 DP_NOTICE(edev, 1774 "Failed to register XDP memory model\n"); 1775 } 1776 } 1777 1778 if (fp->type & QEDE_FASTPATH_TX) { 1779 int cos; 1780 1781 for_each_cos_in_txq(edev, cos) { 1782 struct qede_tx_queue *txq = &fp->txq[cos]; 1783 u16 ndev_tx_id; 1784 1785 txq->cos = cos; 1786 txq->index = txq_index; 1787 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1788 txq->ndev_txq_id = ndev_tx_id; 1789 1790 if (edev->dev_info.is_legacy) 1791 txq->is_legacy = true; 1792 txq->dev = &edev->pdev->dev; 1793 } 1794 1795 txq_index++; 1796 } 1797 1798 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1799 edev->ndev->name, queue_id); 1800 } 1801 1802 if (init_xdp) { 1803 edev->total_xdp_queues = QEDE_RSS_COUNT(edev); 1804 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues); 1805 } 1806 } 1807 1808 static int qede_set_real_num_queues(struct qede_dev *edev) 1809 { 1810 int rc = 0; 1811 1812 rc = netif_set_real_num_tx_queues(edev->ndev, 1813 QEDE_TSS_COUNT(edev) * 1814 edev->dev_info.num_tc); 1815 if (rc) { 1816 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1817 return rc; 1818 } 1819 1820 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1821 if (rc) { 1822 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1823 return rc; 1824 } 1825 1826 return 0; 1827 } 1828 1829 static void qede_napi_disable_remove(struct qede_dev *edev) 1830 { 1831 int i; 1832 1833 for_each_queue(i) { 1834 napi_disable(&edev->fp_array[i].napi); 1835 1836 netif_napi_del(&edev->fp_array[i].napi); 1837 } 1838 } 1839 1840 static void qede_napi_add_enable(struct qede_dev *edev) 1841 { 1842 int i; 1843 1844 /* Add NAPI objects */ 1845 for_each_queue(i) { 1846 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1847 qede_poll, NAPI_POLL_WEIGHT); 1848 napi_enable(&edev->fp_array[i].napi); 1849 } 1850 } 1851 1852 static void qede_sync_free_irqs(struct qede_dev *edev) 1853 { 1854 int i; 1855 1856 for (i = 0; i < edev->int_info.used_cnt; i++) { 1857 if (edev->int_info.msix_cnt) { 1858 synchronize_irq(edev->int_info.msix[i].vector); 1859 free_irq(edev->int_info.msix[i].vector, 1860 &edev->fp_array[i]); 1861 } else { 1862 edev->ops->common->simd_handler_clean(edev->cdev, i); 1863 } 1864 } 1865 1866 edev->int_info.used_cnt = 0; 1867 edev->int_info.msix_cnt = 0; 1868 } 1869 1870 static int qede_req_msix_irqs(struct qede_dev *edev) 1871 { 1872 int i, rc; 1873 1874 /* Sanitize number of interrupts == number of prepared RSS queues */ 1875 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1876 DP_ERR(edev, 1877 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1878 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1879 return -EINVAL; 1880 } 1881 1882 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1883 #ifdef CONFIG_RFS_ACCEL 1884 struct qede_fastpath *fp = &edev->fp_array[i]; 1885 1886 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1887 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1888 edev->int_info.msix[i].vector); 1889 if (rc) { 1890 DP_ERR(edev, "Failed to add CPU rmap\n"); 1891 qede_free_arfs(edev); 1892 } 1893 } 1894 #endif 1895 rc = request_irq(edev->int_info.msix[i].vector, 1896 qede_msix_fp_int, 0, edev->fp_array[i].name, 1897 &edev->fp_array[i]); 1898 if (rc) { 1899 DP_ERR(edev, "Request fp %d irq failed\n", i); 1900 #ifdef CONFIG_RFS_ACCEL 1901 if (edev->ndev->rx_cpu_rmap) 1902 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap); 1903 1904 edev->ndev->rx_cpu_rmap = NULL; 1905 #endif 1906 qede_sync_free_irqs(edev); 1907 return rc; 1908 } 1909 DP_VERBOSE(edev, NETIF_MSG_INTR, 1910 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1911 edev->fp_array[i].name, i, 1912 &edev->fp_array[i]); 1913 edev->int_info.used_cnt++; 1914 } 1915 1916 return 0; 1917 } 1918 1919 static void qede_simd_fp_handler(void *cookie) 1920 { 1921 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1922 1923 napi_schedule_irqoff(&fp->napi); 1924 } 1925 1926 static int qede_setup_irqs(struct qede_dev *edev) 1927 { 1928 int i, rc = 0; 1929 1930 /* Learn Interrupt configuration */ 1931 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1932 if (rc) 1933 return rc; 1934 1935 if (edev->int_info.msix_cnt) { 1936 rc = qede_req_msix_irqs(edev); 1937 if (rc) 1938 return rc; 1939 edev->ndev->irq = edev->int_info.msix[0].vector; 1940 } else { 1941 const struct qed_common_ops *ops; 1942 1943 /* qed should learn receive the RSS ids and callbacks */ 1944 ops = edev->ops->common; 1945 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1946 ops->simd_handler_config(edev->cdev, 1947 &edev->fp_array[i], i, 1948 qede_simd_fp_handler); 1949 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1950 } 1951 return 0; 1952 } 1953 1954 static int qede_drain_txq(struct qede_dev *edev, 1955 struct qede_tx_queue *txq, bool allow_drain) 1956 { 1957 int rc, cnt = 1000; 1958 1959 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1960 if (!cnt) { 1961 if (allow_drain) { 1962 DP_NOTICE(edev, 1963 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1964 txq->index); 1965 rc = edev->ops->common->drain(edev->cdev); 1966 if (rc) 1967 return rc; 1968 return qede_drain_txq(edev, txq, false); 1969 } 1970 DP_NOTICE(edev, 1971 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1972 txq->index, txq->sw_tx_prod, 1973 txq->sw_tx_cons); 1974 return -ENODEV; 1975 } 1976 cnt--; 1977 usleep_range(1000, 2000); 1978 barrier(); 1979 } 1980 1981 /* FW finished processing, wait for HW to transmit all tx packets */ 1982 usleep_range(1000, 2000); 1983 1984 return 0; 1985 } 1986 1987 static int qede_stop_txq(struct qede_dev *edev, 1988 struct qede_tx_queue *txq, int rss_id) 1989 { 1990 /* delete doorbell from doorbell recovery mechanism */ 1991 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1992 &txq->tx_db); 1993 1994 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1995 } 1996 1997 static int qede_stop_queues(struct qede_dev *edev) 1998 { 1999 struct qed_update_vport_params *vport_update_params; 2000 struct qed_dev *cdev = edev->cdev; 2001 struct qede_fastpath *fp; 2002 int rc, i; 2003 2004 /* Disable the vport */ 2005 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2006 if (!vport_update_params) 2007 return -ENOMEM; 2008 2009 vport_update_params->vport_id = 0; 2010 vport_update_params->update_vport_active_flg = 1; 2011 vport_update_params->vport_active_flg = 0; 2012 vport_update_params->update_rss_flg = 0; 2013 2014 rc = edev->ops->vport_update(cdev, vport_update_params); 2015 vfree(vport_update_params); 2016 2017 if (rc) { 2018 DP_ERR(edev, "Failed to update vport\n"); 2019 return rc; 2020 } 2021 2022 /* Flush Tx queues. If needed, request drain from MCP */ 2023 for_each_queue(i) { 2024 fp = &edev->fp_array[i]; 2025 2026 if (fp->type & QEDE_FASTPATH_TX) { 2027 int cos; 2028 2029 for_each_cos_in_txq(edev, cos) { 2030 rc = qede_drain_txq(edev, &fp->txq[cos], true); 2031 if (rc) 2032 return rc; 2033 } 2034 } 2035 2036 if (fp->type & QEDE_FASTPATH_XDP) { 2037 rc = qede_drain_txq(edev, fp->xdp_tx, true); 2038 if (rc) 2039 return rc; 2040 } 2041 } 2042 2043 /* Stop all Queues in reverse order */ 2044 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 2045 fp = &edev->fp_array[i]; 2046 2047 /* Stop the Tx Queue(s) */ 2048 if (fp->type & QEDE_FASTPATH_TX) { 2049 int cos; 2050 2051 for_each_cos_in_txq(edev, cos) { 2052 rc = qede_stop_txq(edev, &fp->txq[cos], i); 2053 if (rc) 2054 return rc; 2055 } 2056 } 2057 2058 /* Stop the Rx Queue */ 2059 if (fp->type & QEDE_FASTPATH_RX) { 2060 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 2061 if (rc) { 2062 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 2063 return rc; 2064 } 2065 } 2066 2067 /* Stop the XDP forwarding queue */ 2068 if (fp->type & QEDE_FASTPATH_XDP) { 2069 rc = qede_stop_txq(edev, fp->xdp_tx, i); 2070 if (rc) 2071 return rc; 2072 2073 bpf_prog_put(fp->rxq->xdp_prog); 2074 } 2075 } 2076 2077 /* Stop the vport */ 2078 rc = edev->ops->vport_stop(cdev, 0); 2079 if (rc) 2080 DP_ERR(edev, "Failed to stop VPORT\n"); 2081 2082 return rc; 2083 } 2084 2085 static int qede_start_txq(struct qede_dev *edev, 2086 struct qede_fastpath *fp, 2087 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2088 { 2089 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2090 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2091 struct qed_queue_start_common_params params; 2092 struct qed_txq_start_ret_params ret_params; 2093 int rc; 2094 2095 memset(¶ms, 0, sizeof(params)); 2096 memset(&ret_params, 0, sizeof(ret_params)); 2097 2098 /* Let the XDP queue share the queue-zone with one of the regular txq. 2099 * We don't really care about its coalescing. 2100 */ 2101 if (txq->is_xdp) 2102 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2103 else 2104 params.queue_id = txq->index; 2105 2106 params.p_sb = fp->sb_info; 2107 params.sb_idx = sb_idx; 2108 params.tc = txq->cos; 2109 2110 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2111 page_cnt, &ret_params); 2112 if (rc) { 2113 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2114 return rc; 2115 } 2116 2117 txq->doorbell_addr = ret_params.p_doorbell; 2118 txq->handle = ret_params.p_handle; 2119 2120 /* Determine the FW consumer address associated */ 2121 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2122 2123 /* Prepare the doorbell parameters */ 2124 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2125 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2126 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2127 DQ_XCM_ETH_TX_BD_PROD_CMD); 2128 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2129 2130 /* register doorbell with doorbell recovery mechanism */ 2131 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2132 &txq->tx_db, DB_REC_WIDTH_32B, 2133 DB_REC_KERNEL); 2134 2135 return rc; 2136 } 2137 2138 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2139 { 2140 int vlan_removal_en = 1; 2141 struct qed_dev *cdev = edev->cdev; 2142 struct qed_dev_info *qed_info = &edev->dev_info.common; 2143 struct qed_update_vport_params *vport_update_params; 2144 struct qed_queue_start_common_params q_params; 2145 struct qed_start_vport_params start = {0}; 2146 int rc, i; 2147 2148 if (!edev->num_queues) { 2149 DP_ERR(edev, 2150 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2151 return -EINVAL; 2152 } 2153 2154 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2155 if (!vport_update_params) 2156 return -ENOMEM; 2157 2158 start.handle_ptp_pkts = !!(edev->ptp); 2159 start.gro_enable = !edev->gro_disable; 2160 start.mtu = edev->ndev->mtu; 2161 start.vport_id = 0; 2162 start.drop_ttl0 = true; 2163 start.remove_inner_vlan = vlan_removal_en; 2164 start.clear_stats = clear_stats; 2165 2166 rc = edev->ops->vport_start(cdev, &start); 2167 2168 if (rc) { 2169 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2170 goto out; 2171 } 2172 2173 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2174 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2175 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2176 2177 for_each_queue(i) { 2178 struct qede_fastpath *fp = &edev->fp_array[i]; 2179 dma_addr_t p_phys_table; 2180 u32 page_cnt; 2181 2182 if (fp->type & QEDE_FASTPATH_RX) { 2183 struct qed_rxq_start_ret_params ret_params; 2184 struct qede_rx_queue *rxq = fp->rxq; 2185 __le16 *val; 2186 2187 memset(&ret_params, 0, sizeof(ret_params)); 2188 memset(&q_params, 0, sizeof(q_params)); 2189 q_params.queue_id = rxq->rxq_id; 2190 q_params.vport_id = 0; 2191 q_params.p_sb = fp->sb_info; 2192 q_params.sb_idx = RX_PI; 2193 2194 p_phys_table = 2195 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2196 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2197 2198 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2199 rxq->rx_buf_size, 2200 rxq->rx_bd_ring.p_phys_addr, 2201 p_phys_table, 2202 page_cnt, &ret_params); 2203 if (rc) { 2204 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2205 rc); 2206 goto out; 2207 } 2208 2209 /* Use the return parameters */ 2210 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2211 rxq->handle = ret_params.p_handle; 2212 2213 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2214 rxq->hw_cons_ptr = val; 2215 2216 qede_update_rx_prod(edev, rxq); 2217 } 2218 2219 if (fp->type & QEDE_FASTPATH_XDP) { 2220 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2221 if (rc) 2222 goto out; 2223 2224 bpf_prog_add(edev->xdp_prog, 1); 2225 fp->rxq->xdp_prog = edev->xdp_prog; 2226 } 2227 2228 if (fp->type & QEDE_FASTPATH_TX) { 2229 int cos; 2230 2231 for_each_cos_in_txq(edev, cos) { 2232 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2233 TX_PI(cos)); 2234 if (rc) 2235 goto out; 2236 } 2237 } 2238 } 2239 2240 /* Prepare and send the vport enable */ 2241 vport_update_params->vport_id = start.vport_id; 2242 vport_update_params->update_vport_active_flg = 1; 2243 vport_update_params->vport_active_flg = 1; 2244 2245 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2246 qed_info->tx_switching) { 2247 vport_update_params->update_tx_switching_flg = 1; 2248 vport_update_params->tx_switching_flg = 1; 2249 } 2250 2251 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2252 &vport_update_params->update_rss_flg); 2253 2254 rc = edev->ops->vport_update(cdev, vport_update_params); 2255 if (rc) 2256 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2257 2258 out: 2259 vfree(vport_update_params); 2260 return rc; 2261 } 2262 2263 enum qede_unload_mode { 2264 QEDE_UNLOAD_NORMAL, 2265 QEDE_UNLOAD_RECOVERY, 2266 }; 2267 2268 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2269 bool is_locked) 2270 { 2271 struct qed_link_params link_params; 2272 int rc; 2273 2274 DP_INFO(edev, "Starting qede unload\n"); 2275 2276 if (!is_locked) 2277 __qede_lock(edev); 2278 2279 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2280 2281 if (mode != QEDE_UNLOAD_RECOVERY) 2282 edev->state = QEDE_STATE_CLOSED; 2283 2284 qede_rdma_dev_event_close(edev); 2285 2286 /* Close OS Tx */ 2287 netif_tx_disable(edev->ndev); 2288 netif_carrier_off(edev->ndev); 2289 2290 if (mode != QEDE_UNLOAD_RECOVERY) { 2291 /* Reset the link */ 2292 memset(&link_params, 0, sizeof(link_params)); 2293 link_params.link_up = false; 2294 edev->ops->common->set_link(edev->cdev, &link_params); 2295 2296 rc = qede_stop_queues(edev); 2297 if (rc) { 2298 #ifdef CONFIG_RFS_ACCEL 2299 if (edev->dev_info.common.b_arfs_capable) { 2300 qede_poll_for_freeing_arfs_filters(edev); 2301 if (edev->ndev->rx_cpu_rmap) 2302 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap); 2303 2304 edev->ndev->rx_cpu_rmap = NULL; 2305 } 2306 #endif 2307 qede_sync_free_irqs(edev); 2308 goto out; 2309 } 2310 2311 DP_INFO(edev, "Stopped Queues\n"); 2312 } 2313 2314 qede_vlan_mark_nonconfigured(edev); 2315 edev->ops->fastpath_stop(edev->cdev); 2316 2317 if (edev->dev_info.common.b_arfs_capable) { 2318 qede_poll_for_freeing_arfs_filters(edev); 2319 qede_free_arfs(edev); 2320 } 2321 2322 /* Release the interrupts */ 2323 qede_sync_free_irqs(edev); 2324 edev->ops->common->set_fp_int(edev->cdev, 0); 2325 2326 qede_napi_disable_remove(edev); 2327 2328 if (mode == QEDE_UNLOAD_RECOVERY) 2329 qede_empty_tx_queues(edev); 2330 2331 qede_free_mem_load(edev); 2332 qede_free_fp_array(edev); 2333 2334 out: 2335 if (!is_locked) 2336 __qede_unlock(edev); 2337 2338 if (mode != QEDE_UNLOAD_RECOVERY) 2339 DP_NOTICE(edev, "Link is down\n"); 2340 2341 edev->ptp_skip_txts = 0; 2342 2343 DP_INFO(edev, "Ending qede unload\n"); 2344 } 2345 2346 enum qede_load_mode { 2347 QEDE_LOAD_NORMAL, 2348 QEDE_LOAD_RELOAD, 2349 QEDE_LOAD_RECOVERY, 2350 }; 2351 2352 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2353 bool is_locked) 2354 { 2355 struct qed_link_params link_params; 2356 struct ethtool_coalesce coal = {}; 2357 u8 num_tc; 2358 int rc, i; 2359 2360 DP_INFO(edev, "Starting qede load\n"); 2361 2362 if (!is_locked) 2363 __qede_lock(edev); 2364 2365 rc = qede_set_num_queues(edev); 2366 if (rc) 2367 goto out; 2368 2369 rc = qede_alloc_fp_array(edev); 2370 if (rc) 2371 goto out; 2372 2373 qede_init_fp(edev); 2374 2375 rc = qede_alloc_mem_load(edev); 2376 if (rc) 2377 goto err1; 2378 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2379 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2380 2381 rc = qede_set_real_num_queues(edev); 2382 if (rc) 2383 goto err2; 2384 2385 if (qede_alloc_arfs(edev)) { 2386 edev->ndev->features &= ~NETIF_F_NTUPLE; 2387 edev->dev_info.common.b_arfs_capable = false; 2388 } 2389 2390 qede_napi_add_enable(edev); 2391 DP_INFO(edev, "Napi added and enabled\n"); 2392 2393 rc = qede_setup_irqs(edev); 2394 if (rc) 2395 goto err3; 2396 DP_INFO(edev, "Setup IRQs succeeded\n"); 2397 2398 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2399 if (rc) 2400 goto err4; 2401 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2402 2403 num_tc = netdev_get_num_tc(edev->ndev); 2404 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2405 qede_setup_tc(edev->ndev, num_tc); 2406 2407 /* Program un-configured VLANs */ 2408 qede_configure_vlan_filters(edev); 2409 2410 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2411 2412 /* Ask for link-up using current configuration */ 2413 memset(&link_params, 0, sizeof(link_params)); 2414 link_params.link_up = true; 2415 edev->ops->common->set_link(edev->cdev, &link_params); 2416 2417 edev->state = QEDE_STATE_OPEN; 2418 2419 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS; 2420 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS; 2421 2422 for_each_queue(i) { 2423 if (edev->coal_entry[i].isvalid) { 2424 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc; 2425 coal.tx_coalesce_usecs = edev->coal_entry[i].txc; 2426 } 2427 __qede_unlock(edev); 2428 qede_set_per_coalesce(edev->ndev, i, &coal); 2429 __qede_lock(edev); 2430 } 2431 DP_INFO(edev, "Ending successfully qede load\n"); 2432 2433 goto out; 2434 err4: 2435 qede_sync_free_irqs(edev); 2436 err3: 2437 qede_napi_disable_remove(edev); 2438 err2: 2439 qede_free_mem_load(edev); 2440 err1: 2441 edev->ops->common->set_fp_int(edev->cdev, 0); 2442 qede_free_fp_array(edev); 2443 edev->num_queues = 0; 2444 edev->fp_num_tx = 0; 2445 edev->fp_num_rx = 0; 2446 out: 2447 if (!is_locked) 2448 __qede_unlock(edev); 2449 2450 return rc; 2451 } 2452 2453 /* 'func' should be able to run between unload and reload assuming interface 2454 * is actually running, or afterwards in case it's currently DOWN. 2455 */ 2456 void qede_reload(struct qede_dev *edev, 2457 struct qede_reload_args *args, bool is_locked) 2458 { 2459 if (!is_locked) 2460 __qede_lock(edev); 2461 2462 /* Since qede_lock is held, internal state wouldn't change even 2463 * if netdev state would start transitioning. Check whether current 2464 * internal configuration indicates device is up, then reload. 2465 */ 2466 if (edev->state == QEDE_STATE_OPEN) { 2467 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2468 if (args) 2469 args->func(edev, args); 2470 qede_load(edev, QEDE_LOAD_RELOAD, true); 2471 2472 /* Since no one is going to do it for us, re-configure */ 2473 qede_config_rx_mode(edev->ndev); 2474 } else if (args) { 2475 args->func(edev, args); 2476 } 2477 2478 if (!is_locked) 2479 __qede_unlock(edev); 2480 } 2481 2482 /* called with rtnl_lock */ 2483 static int qede_open(struct net_device *ndev) 2484 { 2485 struct qede_dev *edev = netdev_priv(ndev); 2486 int rc; 2487 2488 netif_carrier_off(ndev); 2489 2490 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2491 2492 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2493 if (rc) 2494 return rc; 2495 2496 udp_tunnel_nic_reset_ntf(ndev); 2497 2498 edev->ops->common->update_drv_state(edev->cdev, true); 2499 2500 return 0; 2501 } 2502 2503 static int qede_close(struct net_device *ndev) 2504 { 2505 struct qede_dev *edev = netdev_priv(ndev); 2506 2507 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2508 2509 if (edev->cdev) 2510 edev->ops->common->update_drv_state(edev->cdev, false); 2511 2512 return 0; 2513 } 2514 2515 static void qede_link_update(void *dev, struct qed_link_output *link) 2516 { 2517 struct qede_dev *edev = dev; 2518 2519 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2520 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2521 return; 2522 } 2523 2524 if (link->link_up) { 2525 if (!netif_carrier_ok(edev->ndev)) { 2526 DP_NOTICE(edev, "Link is up\n"); 2527 netif_tx_start_all_queues(edev->ndev); 2528 netif_carrier_on(edev->ndev); 2529 qede_rdma_dev_event_open(edev); 2530 } 2531 } else { 2532 if (netif_carrier_ok(edev->ndev)) { 2533 DP_NOTICE(edev, "Link is down\n"); 2534 netif_tx_disable(edev->ndev); 2535 netif_carrier_off(edev->ndev); 2536 qede_rdma_dev_event_close(edev); 2537 } 2538 } 2539 } 2540 2541 static void qede_schedule_recovery_handler(void *dev) 2542 { 2543 struct qede_dev *edev = dev; 2544 2545 if (edev->state == QEDE_STATE_RECOVERY) { 2546 DP_NOTICE(edev, 2547 "Avoid scheduling a recovery handling since already in recovery state\n"); 2548 return; 2549 } 2550 2551 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2552 schedule_delayed_work(&edev->sp_task, 0); 2553 2554 DP_INFO(edev, "Scheduled a recovery handler\n"); 2555 } 2556 2557 static void qede_recovery_failed(struct qede_dev *edev) 2558 { 2559 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2560 2561 netif_device_detach(edev->ndev); 2562 2563 if (edev->cdev) 2564 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2565 } 2566 2567 static void qede_recovery_handler(struct qede_dev *edev) 2568 { 2569 u32 curr_state = edev->state; 2570 int rc; 2571 2572 DP_NOTICE(edev, "Starting a recovery process\n"); 2573 2574 /* No need to acquire first the qede_lock since is done by qede_sp_task 2575 * before calling this function. 2576 */ 2577 edev->state = QEDE_STATE_RECOVERY; 2578 2579 edev->ops->common->recovery_prolog(edev->cdev); 2580 2581 if (curr_state == QEDE_STATE_OPEN) 2582 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2583 2584 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2585 2586 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2587 IS_VF(edev), QEDE_PROBE_RECOVERY); 2588 if (rc) { 2589 edev->cdev = NULL; 2590 goto err; 2591 } 2592 2593 if (curr_state == QEDE_STATE_OPEN) { 2594 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2595 if (rc) 2596 goto err; 2597 2598 qede_config_rx_mode(edev->ndev); 2599 udp_tunnel_nic_reset_ntf(edev->ndev); 2600 } 2601 2602 edev->state = curr_state; 2603 2604 DP_NOTICE(edev, "Recovery handling is done\n"); 2605 2606 return; 2607 2608 err: 2609 qede_recovery_failed(edev); 2610 } 2611 2612 static void qede_atomic_hw_err_handler(struct qede_dev *edev) 2613 { 2614 struct qed_dev *cdev = edev->cdev; 2615 2616 DP_NOTICE(edev, 2617 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n", 2618 edev->err_flags); 2619 2620 /* Get a call trace of the flow that led to the error */ 2621 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags)); 2622 2623 /* Prevent HW attentions from being reasserted */ 2624 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags)) 2625 edev->ops->common->attn_clr_enable(cdev, true); 2626 2627 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n"); 2628 } 2629 2630 static void qede_generic_hw_err_handler(struct qede_dev *edev) 2631 { 2632 DP_NOTICE(edev, 2633 "Generic sleepable HW error handling started - err_flags 0x%lx\n", 2634 edev->err_flags); 2635 2636 if (edev->devlink) { 2637 DP_NOTICE(edev, "Reporting fatal error to devlink\n"); 2638 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type); 2639 } 2640 2641 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2642 2643 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n"); 2644 } 2645 2646 static void qede_set_hw_err_flags(struct qede_dev *edev, 2647 enum qed_hw_err_type err_type) 2648 { 2649 unsigned long err_flags = 0; 2650 2651 switch (err_type) { 2652 case QED_HW_ERR_DMAE_FAIL: 2653 set_bit(QEDE_ERR_WARN, &err_flags); 2654 fallthrough; 2655 case QED_HW_ERR_MFW_RESP_FAIL: 2656 case QED_HW_ERR_HW_ATTN: 2657 case QED_HW_ERR_RAMROD_FAIL: 2658 case QED_HW_ERR_FW_ASSERT: 2659 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags); 2660 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags); 2661 /* make this error as recoverable and start recovery*/ 2662 set_bit(QEDE_ERR_IS_RECOVERABLE, &err_flags); 2663 break; 2664 2665 default: 2666 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type); 2667 break; 2668 } 2669 2670 edev->err_flags |= err_flags; 2671 } 2672 2673 static void qede_schedule_hw_err_handler(void *dev, 2674 enum qed_hw_err_type err_type) 2675 { 2676 struct qede_dev *edev = dev; 2677 2678 /* Fan failure cannot be masked by handling of another HW error or by a 2679 * concurrent recovery process. 2680 */ 2681 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 2682 edev->state == QEDE_STATE_RECOVERY) && 2683 err_type != QED_HW_ERR_FAN_FAIL) { 2684 DP_INFO(edev, 2685 "Avoid scheduling an error handling while another HW error is being handled\n"); 2686 return; 2687 } 2688 2689 if (err_type >= QED_HW_ERR_LAST) { 2690 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type); 2691 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2692 return; 2693 } 2694 2695 edev->last_err_type = err_type; 2696 qede_set_hw_err_flags(edev, err_type); 2697 qede_atomic_hw_err_handler(edev); 2698 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 2699 schedule_delayed_work(&edev->sp_task, 0); 2700 2701 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type); 2702 } 2703 2704 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2705 { 2706 struct netdev_queue *netdev_txq; 2707 2708 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2709 if (netif_xmit_stopped(netdev_txq)) 2710 return true; 2711 2712 return false; 2713 } 2714 2715 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2716 { 2717 struct qede_dev *edev = dev; 2718 struct netdev_hw_addr *ha; 2719 int i; 2720 2721 if (edev->ndev->features & NETIF_F_IP_CSUM) 2722 data->feat_flags |= QED_TLV_IP_CSUM; 2723 if (edev->ndev->features & NETIF_F_TSO) 2724 data->feat_flags |= QED_TLV_LSO; 2725 2726 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2727 eth_zero_addr(data->mac[1]); 2728 eth_zero_addr(data->mac[2]); 2729 /* Copy the first two UC macs */ 2730 netif_addr_lock_bh(edev->ndev); 2731 i = 1; 2732 netdev_for_each_uc_addr(ha, edev->ndev) { 2733 ether_addr_copy(data->mac[i++], ha->addr); 2734 if (i == QED_TLV_MAC_COUNT) 2735 break; 2736 } 2737 2738 netif_addr_unlock_bh(edev->ndev); 2739 } 2740 2741 static void qede_get_eth_tlv_data(void *dev, void *data) 2742 { 2743 struct qed_mfw_tlv_eth *etlv = data; 2744 struct qede_dev *edev = dev; 2745 struct qede_fastpath *fp; 2746 int i; 2747 2748 etlv->lso_maxoff_size = 0XFFFF; 2749 etlv->lso_maxoff_size_set = true; 2750 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2751 etlv->lso_minseg_size_set = true; 2752 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2753 etlv->prom_mode_set = true; 2754 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2755 etlv->tx_descr_size_set = true; 2756 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2757 etlv->rx_descr_size_set = true; 2758 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2759 etlv->iov_offload_set = true; 2760 2761 /* Fill information regarding queues; Should be done under the qede 2762 * lock to guarantee those don't change beneath our feet. 2763 */ 2764 etlv->txqs_empty = true; 2765 etlv->rxqs_empty = true; 2766 etlv->num_txqs_full = 0; 2767 etlv->num_rxqs_full = 0; 2768 2769 __qede_lock(edev); 2770 for_each_queue(i) { 2771 fp = &edev->fp_array[i]; 2772 if (fp->type & QEDE_FASTPATH_TX) { 2773 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2774 2775 if (txq->sw_tx_cons != txq->sw_tx_prod) 2776 etlv->txqs_empty = false; 2777 if (qede_is_txq_full(edev, txq)) 2778 etlv->num_txqs_full++; 2779 } 2780 if (fp->type & QEDE_FASTPATH_RX) { 2781 if (qede_has_rx_work(fp->rxq)) 2782 etlv->rxqs_empty = false; 2783 2784 /* This one is a bit tricky; Firmware might stop 2785 * placing packets if ring is not yet full. 2786 * Give an approximation. 2787 */ 2788 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2789 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2790 RX_RING_SIZE - 100) 2791 etlv->num_rxqs_full++; 2792 } 2793 } 2794 __qede_unlock(edev); 2795 2796 etlv->txqs_empty_set = true; 2797 etlv->rxqs_empty_set = true; 2798 etlv->num_txqs_full_set = true; 2799 etlv->num_rxqs_full_set = true; 2800 } 2801 2802 /** 2803 * qede_io_error_detected(): Called when PCI error is detected 2804 * 2805 * @pdev: Pointer to PCI device 2806 * @state: The current pci connection state 2807 * 2808 *Return: pci_ers_result_t. 2809 * 2810 * This function is called after a PCI bus error affecting 2811 * this device has been detected. 2812 */ 2813 static pci_ers_result_t 2814 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2815 { 2816 struct net_device *dev = pci_get_drvdata(pdev); 2817 struct qede_dev *edev = netdev_priv(dev); 2818 2819 if (!edev) 2820 return PCI_ERS_RESULT_NONE; 2821 2822 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2823 2824 __qede_lock(edev); 2825 if (edev->state == QEDE_STATE_RECOVERY) { 2826 DP_NOTICE(edev, "Device already in the recovery state\n"); 2827 __qede_unlock(edev); 2828 return PCI_ERS_RESULT_NONE; 2829 } 2830 2831 /* PF handles the recovery of its VFs */ 2832 if (IS_VF(edev)) { 2833 DP_VERBOSE(edev, QED_MSG_IOV, 2834 "VF recovery is handled by its PF\n"); 2835 __qede_unlock(edev); 2836 return PCI_ERS_RESULT_RECOVERED; 2837 } 2838 2839 /* Close OS Tx */ 2840 netif_tx_disable(edev->ndev); 2841 netif_carrier_off(edev->ndev); 2842 2843 set_bit(QEDE_SP_AER, &edev->sp_flags); 2844 schedule_delayed_work(&edev->sp_task, 0); 2845 2846 __qede_unlock(edev); 2847 2848 return PCI_ERS_RESULT_CAN_RECOVER; 2849 } 2850