1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/crash_dump.h> 33 #include <linux/module.h> 34 #include <linux/pci.h> 35 #include <linux/version.h> 36 #include <linux/device.h> 37 #include <linux/netdevice.h> 38 #include <linux/etherdevice.h> 39 #include <linux/skbuff.h> 40 #include <linux/errno.h> 41 #include <linux/list.h> 42 #include <linux/string.h> 43 #include <linux/dma-mapping.h> 44 #include <linux/interrupt.h> 45 #include <asm/byteorder.h> 46 #include <asm/param.h> 47 #include <linux/io.h> 48 #include <linux/netdev_features.h> 49 #include <linux/udp.h> 50 #include <linux/tcp.h> 51 #include <net/udp_tunnel.h> 52 #include <linux/ip.h> 53 #include <net/ipv6.h> 54 #include <net/tcp.h> 55 #include <linux/if_ether.h> 56 #include <linux/if_vlan.h> 57 #include <linux/pkt_sched.h> 58 #include <linux/ethtool.h> 59 #include <linux/in.h> 60 #include <linux/random.h> 61 #include <net/ip6_checksum.h> 62 #include <linux/bitops.h> 63 #include <linux/vmalloc.h> 64 #include <linux/aer.h> 65 #include "qede.h" 66 #include "qede_ptp.h" 67 68 static char version[] = 69 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 70 71 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 72 MODULE_LICENSE("GPL"); 73 MODULE_VERSION(DRV_MODULE_VERSION); 74 75 static uint debug; 76 module_param(debug, uint, 0); 77 MODULE_PARM_DESC(debug, " Default debug msglevel"); 78 79 static const struct qed_eth_ops *qed_ops; 80 81 #define CHIP_NUM_57980S_40 0x1634 82 #define CHIP_NUM_57980S_10 0x1666 83 #define CHIP_NUM_57980S_MF 0x1636 84 #define CHIP_NUM_57980S_100 0x1644 85 #define CHIP_NUM_57980S_50 0x1654 86 #define CHIP_NUM_57980S_25 0x1656 87 #define CHIP_NUM_57980S_IOV 0x1664 88 #define CHIP_NUM_AH 0x8070 89 #define CHIP_NUM_AH_IOV 0x8090 90 91 #ifndef PCI_DEVICE_ID_NX2_57980E 92 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 93 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 94 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 95 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 96 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 97 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 98 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 99 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 100 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 101 102 #endif 103 104 enum qede_pci_private { 105 QEDE_PRIVATE_PF, 106 QEDE_PRIVATE_VF 107 }; 108 109 static const struct pci_device_id qede_pci_tbl[] = { 110 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 111 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 112 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 113 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 114 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 115 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 116 #ifdef CONFIG_QED_SRIOV 117 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 118 #endif 119 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 120 #ifdef CONFIG_QED_SRIOV 121 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 122 #endif 123 { 0 } 124 }; 125 126 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 127 128 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 129 static pci_ers_result_t 130 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 131 132 #define TX_TIMEOUT (5 * HZ) 133 134 /* Utilize last protocol index for XDP */ 135 #define XDP_PI 11 136 137 static void qede_remove(struct pci_dev *pdev); 138 static void qede_shutdown(struct pci_dev *pdev); 139 static void qede_link_update(void *dev, struct qed_link_output *link); 140 static void qede_schedule_recovery_handler(void *dev); 141 static void qede_recovery_handler(struct qede_dev *edev); 142 static void qede_schedule_hw_err_handler(void *dev, 143 enum qed_hw_err_type err_type); 144 static void qede_get_eth_tlv_data(void *edev, void *data); 145 static void qede_get_generic_tlv_data(void *edev, 146 struct qed_generic_tlvs *data); 147 static void qede_generic_hw_err_handler(struct qede_dev *edev); 148 #ifdef CONFIG_QED_SRIOV 149 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 150 __be16 vlan_proto) 151 { 152 struct qede_dev *edev = netdev_priv(ndev); 153 154 if (vlan > 4095) { 155 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 156 return -EINVAL; 157 } 158 159 if (vlan_proto != htons(ETH_P_8021Q)) 160 return -EPROTONOSUPPORT; 161 162 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 163 vlan, vf); 164 165 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 166 } 167 168 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 169 { 170 struct qede_dev *edev = netdev_priv(ndev); 171 172 DP_VERBOSE(edev, QED_MSG_IOV, 173 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", 174 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); 175 176 if (!is_valid_ether_addr(mac)) { 177 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 178 return -EINVAL; 179 } 180 181 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 182 } 183 184 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 185 { 186 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 187 struct qed_dev_info *qed_info = &edev->dev_info.common; 188 struct qed_update_vport_params *vport_params; 189 int rc; 190 191 vport_params = vzalloc(sizeof(*vport_params)); 192 if (!vport_params) 193 return -ENOMEM; 194 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 195 196 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 197 198 /* Enable/Disable Tx switching for PF */ 199 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 200 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 201 vport_params->vport_id = 0; 202 vport_params->update_tx_switching_flg = 1; 203 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 204 edev->ops->vport_update(edev->cdev, vport_params); 205 } 206 207 vfree(vport_params); 208 return rc; 209 } 210 #endif 211 212 static const struct pci_error_handlers qede_err_handler = { 213 .error_detected = qede_io_error_detected, 214 }; 215 216 static struct pci_driver qede_pci_driver = { 217 .name = "qede", 218 .id_table = qede_pci_tbl, 219 .probe = qede_probe, 220 .remove = qede_remove, 221 .shutdown = qede_shutdown, 222 #ifdef CONFIG_QED_SRIOV 223 .sriov_configure = qede_sriov_configure, 224 #endif 225 .err_handler = &qede_err_handler, 226 }; 227 228 static struct qed_eth_cb_ops qede_ll_ops = { 229 { 230 #ifdef CONFIG_RFS_ACCEL 231 .arfs_filter_op = qede_arfs_filter_op, 232 #endif 233 .link_update = qede_link_update, 234 .schedule_recovery_handler = qede_schedule_recovery_handler, 235 .schedule_hw_err_handler = qede_schedule_hw_err_handler, 236 .get_generic_tlv_data = qede_get_generic_tlv_data, 237 .get_protocol_tlv_data = qede_get_eth_tlv_data, 238 }, 239 .force_mac = qede_force_mac, 240 .ports_update = qede_udp_ports_update, 241 }; 242 243 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 244 void *ptr) 245 { 246 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 247 struct ethtool_drvinfo drvinfo; 248 struct qede_dev *edev; 249 250 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 251 goto done; 252 253 /* Check whether this is a qede device */ 254 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 255 goto done; 256 257 memset(&drvinfo, 0, sizeof(drvinfo)); 258 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 259 if (strcmp(drvinfo.driver, "qede")) 260 goto done; 261 edev = netdev_priv(ndev); 262 263 switch (event) { 264 case NETDEV_CHANGENAME: 265 /* Notify qed of the name change */ 266 if (!edev->ops || !edev->ops->common) 267 goto done; 268 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 269 break; 270 case NETDEV_CHANGEADDR: 271 edev = netdev_priv(ndev); 272 qede_rdma_event_changeaddr(edev); 273 break; 274 } 275 276 done: 277 return NOTIFY_DONE; 278 } 279 280 static struct notifier_block qede_netdev_notifier = { 281 .notifier_call = qede_netdev_event, 282 }; 283 284 static 285 int __init qede_init(void) 286 { 287 int ret; 288 289 pr_info("qede_init: %s\n", version); 290 291 qed_ops = qed_get_eth_ops(); 292 if (!qed_ops) { 293 pr_notice("Failed to get qed ethtool operations\n"); 294 return -EINVAL; 295 } 296 297 /* Must register notifier before pci ops, since we might miss 298 * interface rename after pci probe and netdev registration. 299 */ 300 ret = register_netdevice_notifier(&qede_netdev_notifier); 301 if (ret) { 302 pr_notice("Failed to register netdevice_notifier\n"); 303 qed_put_eth_ops(); 304 return -EINVAL; 305 } 306 307 ret = pci_register_driver(&qede_pci_driver); 308 if (ret) { 309 pr_notice("Failed to register driver\n"); 310 unregister_netdevice_notifier(&qede_netdev_notifier); 311 qed_put_eth_ops(); 312 return -EINVAL; 313 } 314 315 return 0; 316 } 317 318 static void __exit qede_cleanup(void) 319 { 320 if (debug & QED_LOG_INFO_MASK) 321 pr_info("qede_cleanup called\n"); 322 323 unregister_netdevice_notifier(&qede_netdev_notifier); 324 pci_unregister_driver(&qede_pci_driver); 325 qed_put_eth_ops(); 326 } 327 328 module_init(qede_init); 329 module_exit(qede_cleanup); 330 331 static int qede_open(struct net_device *ndev); 332 static int qede_close(struct net_device *ndev); 333 334 void qede_fill_by_demand_stats(struct qede_dev *edev) 335 { 336 struct qede_stats_common *p_common = &edev->stats.common; 337 struct qed_eth_stats stats; 338 339 edev->ops->get_vport_stats(edev->cdev, &stats); 340 341 p_common->no_buff_discards = stats.common.no_buff_discards; 342 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 343 p_common->ttl0_discard = stats.common.ttl0_discard; 344 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 345 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 346 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 347 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 348 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 349 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 350 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 351 p_common->mac_filter_discards = stats.common.mac_filter_discards; 352 p_common->gft_filter_drop = stats.common.gft_filter_drop; 353 354 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 355 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 356 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 357 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 358 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 359 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 360 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 361 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 362 p_common->coalesced_events = stats.common.tpa_coalesced_events; 363 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 364 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 365 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 366 367 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 368 p_common->rx_65_to_127_byte_packets = 369 stats.common.rx_65_to_127_byte_packets; 370 p_common->rx_128_to_255_byte_packets = 371 stats.common.rx_128_to_255_byte_packets; 372 p_common->rx_256_to_511_byte_packets = 373 stats.common.rx_256_to_511_byte_packets; 374 p_common->rx_512_to_1023_byte_packets = 375 stats.common.rx_512_to_1023_byte_packets; 376 p_common->rx_1024_to_1518_byte_packets = 377 stats.common.rx_1024_to_1518_byte_packets; 378 p_common->rx_crc_errors = stats.common.rx_crc_errors; 379 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 380 p_common->rx_pause_frames = stats.common.rx_pause_frames; 381 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 382 p_common->rx_align_errors = stats.common.rx_align_errors; 383 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 384 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 385 p_common->rx_jabbers = stats.common.rx_jabbers; 386 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 387 p_common->rx_fragments = stats.common.rx_fragments; 388 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 389 p_common->tx_65_to_127_byte_packets = 390 stats.common.tx_65_to_127_byte_packets; 391 p_common->tx_128_to_255_byte_packets = 392 stats.common.tx_128_to_255_byte_packets; 393 p_common->tx_256_to_511_byte_packets = 394 stats.common.tx_256_to_511_byte_packets; 395 p_common->tx_512_to_1023_byte_packets = 396 stats.common.tx_512_to_1023_byte_packets; 397 p_common->tx_1024_to_1518_byte_packets = 398 stats.common.tx_1024_to_1518_byte_packets; 399 p_common->tx_pause_frames = stats.common.tx_pause_frames; 400 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 401 p_common->brb_truncates = stats.common.brb_truncates; 402 p_common->brb_discards = stats.common.brb_discards; 403 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 404 p_common->link_change_count = stats.common.link_change_count; 405 p_common->ptp_skip_txts = edev->ptp_skip_txts; 406 407 if (QEDE_IS_BB(edev)) { 408 struct qede_stats_bb *p_bb = &edev->stats.bb; 409 410 p_bb->rx_1519_to_1522_byte_packets = 411 stats.bb.rx_1519_to_1522_byte_packets; 412 p_bb->rx_1519_to_2047_byte_packets = 413 stats.bb.rx_1519_to_2047_byte_packets; 414 p_bb->rx_2048_to_4095_byte_packets = 415 stats.bb.rx_2048_to_4095_byte_packets; 416 p_bb->rx_4096_to_9216_byte_packets = 417 stats.bb.rx_4096_to_9216_byte_packets; 418 p_bb->rx_9217_to_16383_byte_packets = 419 stats.bb.rx_9217_to_16383_byte_packets; 420 p_bb->tx_1519_to_2047_byte_packets = 421 stats.bb.tx_1519_to_2047_byte_packets; 422 p_bb->tx_2048_to_4095_byte_packets = 423 stats.bb.tx_2048_to_4095_byte_packets; 424 p_bb->tx_4096_to_9216_byte_packets = 425 stats.bb.tx_4096_to_9216_byte_packets; 426 p_bb->tx_9217_to_16383_byte_packets = 427 stats.bb.tx_9217_to_16383_byte_packets; 428 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 429 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 430 } else { 431 struct qede_stats_ah *p_ah = &edev->stats.ah; 432 433 p_ah->rx_1519_to_max_byte_packets = 434 stats.ah.rx_1519_to_max_byte_packets; 435 p_ah->tx_1519_to_max_byte_packets = 436 stats.ah.tx_1519_to_max_byte_packets; 437 } 438 } 439 440 static void qede_get_stats64(struct net_device *dev, 441 struct rtnl_link_stats64 *stats) 442 { 443 struct qede_dev *edev = netdev_priv(dev); 444 struct qede_stats_common *p_common; 445 446 qede_fill_by_demand_stats(edev); 447 p_common = &edev->stats.common; 448 449 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 450 p_common->rx_bcast_pkts; 451 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 452 p_common->tx_bcast_pkts; 453 454 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 455 p_common->rx_bcast_bytes; 456 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 457 p_common->tx_bcast_bytes; 458 459 stats->tx_errors = p_common->tx_err_drop_pkts; 460 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 461 462 stats->rx_fifo_errors = p_common->no_buff_discards; 463 464 if (QEDE_IS_BB(edev)) 465 stats->collisions = edev->stats.bb.tx_total_collisions; 466 stats->rx_crc_errors = p_common->rx_crc_errors; 467 stats->rx_frame_errors = p_common->rx_align_errors; 468 } 469 470 #ifdef CONFIG_QED_SRIOV 471 static int qede_get_vf_config(struct net_device *dev, int vfidx, 472 struct ifla_vf_info *ivi) 473 { 474 struct qede_dev *edev = netdev_priv(dev); 475 476 if (!edev->ops) 477 return -EINVAL; 478 479 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 480 } 481 482 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 483 int min_tx_rate, int max_tx_rate) 484 { 485 struct qede_dev *edev = netdev_priv(dev); 486 487 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 488 max_tx_rate); 489 } 490 491 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 492 { 493 struct qede_dev *edev = netdev_priv(dev); 494 495 if (!edev->ops) 496 return -EINVAL; 497 498 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 499 } 500 501 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 502 int link_state) 503 { 504 struct qede_dev *edev = netdev_priv(dev); 505 506 if (!edev->ops) 507 return -EINVAL; 508 509 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 510 } 511 512 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 513 { 514 struct qede_dev *edev = netdev_priv(dev); 515 516 if (!edev->ops) 517 return -EINVAL; 518 519 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 520 } 521 #endif 522 523 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 524 { 525 struct qede_dev *edev = netdev_priv(dev); 526 527 if (!netif_running(dev)) 528 return -EAGAIN; 529 530 switch (cmd) { 531 case SIOCSHWTSTAMP: 532 return qede_ptp_hw_ts(edev, ifr); 533 default: 534 DP_VERBOSE(edev, QED_MSG_DEBUG, 535 "default IOCTL cmd 0x%x\n", cmd); 536 return -EOPNOTSUPP; 537 } 538 539 return 0; 540 } 541 542 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq) 543 { 544 DP_NOTICE(edev, 545 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n", 546 txq->index, le16_to_cpu(*txq->hw_cons_ptr), 547 qed_chain_get_cons_idx(&txq->tx_pbl), 548 qed_chain_get_prod_idx(&txq->tx_pbl), 549 jiffies); 550 } 551 552 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue) 553 { 554 struct qede_dev *edev = netdev_priv(dev); 555 struct qede_tx_queue *txq; 556 int cos; 557 558 netif_carrier_off(dev); 559 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue); 560 561 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX)) 562 return; 563 564 for_each_cos_in_txq(edev, cos) { 565 txq = &edev->fp_array[txqueue].txq[cos]; 566 567 if (qed_chain_get_cons_idx(&txq->tx_pbl) != 568 qed_chain_get_prod_idx(&txq->tx_pbl)) 569 qede_tx_log_print(edev, txq); 570 } 571 572 if (IS_VF(edev)) 573 return; 574 575 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 576 edev->state == QEDE_STATE_RECOVERY) { 577 DP_INFO(edev, 578 "Avoid handling a Tx timeout while another HW error is being handled\n"); 579 return; 580 } 581 582 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags); 583 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 584 schedule_delayed_work(&edev->sp_task, 0); 585 } 586 587 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 588 { 589 struct qede_dev *edev = netdev_priv(ndev); 590 int cos, count, offset; 591 592 if (num_tc > edev->dev_info.num_tc) 593 return -EINVAL; 594 595 netdev_reset_tc(ndev); 596 netdev_set_num_tc(ndev, num_tc); 597 598 for_each_cos_in_txq(edev, cos) { 599 count = QEDE_TSS_COUNT(edev); 600 offset = cos * QEDE_TSS_COUNT(edev); 601 netdev_set_tc_queue(ndev, cos, count, offset); 602 } 603 604 return 0; 605 } 606 607 static int 608 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 609 __be16 proto) 610 { 611 switch (f->command) { 612 case FLOW_CLS_REPLACE: 613 return qede_add_tc_flower_fltr(edev, proto, f); 614 case FLOW_CLS_DESTROY: 615 return qede_delete_flow_filter(edev, f->cookie); 616 default: 617 return -EOPNOTSUPP; 618 } 619 } 620 621 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 622 void *cb_priv) 623 { 624 struct flow_cls_offload *f; 625 struct qede_dev *edev = cb_priv; 626 627 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 628 return -EOPNOTSUPP; 629 630 switch (type) { 631 case TC_SETUP_CLSFLOWER: 632 f = type_data; 633 return qede_set_flower(edev, f, f->common.protocol); 634 default: 635 return -EOPNOTSUPP; 636 } 637 } 638 639 static LIST_HEAD(qede_block_cb_list); 640 641 static int 642 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 643 void *type_data) 644 { 645 struct qede_dev *edev = netdev_priv(dev); 646 struct tc_mqprio_qopt *mqprio; 647 648 switch (type) { 649 case TC_SETUP_BLOCK: 650 return flow_block_cb_setup_simple(type_data, 651 &qede_block_cb_list, 652 qede_setup_tc_block_cb, 653 edev, edev, true); 654 case TC_SETUP_QDISC_MQPRIO: 655 mqprio = type_data; 656 657 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 658 return qede_setup_tc(dev, mqprio->num_tc); 659 default: 660 return -EOPNOTSUPP; 661 } 662 } 663 664 static const struct net_device_ops qede_netdev_ops = { 665 .ndo_open = qede_open, 666 .ndo_stop = qede_close, 667 .ndo_start_xmit = qede_start_xmit, 668 .ndo_select_queue = qede_select_queue, 669 .ndo_set_rx_mode = qede_set_rx_mode, 670 .ndo_set_mac_address = qede_set_mac_addr, 671 .ndo_validate_addr = eth_validate_addr, 672 .ndo_change_mtu = qede_change_mtu, 673 .ndo_do_ioctl = qede_ioctl, 674 .ndo_tx_timeout = qede_tx_timeout, 675 #ifdef CONFIG_QED_SRIOV 676 .ndo_set_vf_mac = qede_set_vf_mac, 677 .ndo_set_vf_vlan = qede_set_vf_vlan, 678 .ndo_set_vf_trust = qede_set_vf_trust, 679 #endif 680 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 681 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 682 .ndo_fix_features = qede_fix_features, 683 .ndo_set_features = qede_set_features, 684 .ndo_get_stats64 = qede_get_stats64, 685 #ifdef CONFIG_QED_SRIOV 686 .ndo_set_vf_link_state = qede_set_vf_link_state, 687 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 688 .ndo_get_vf_config = qede_get_vf_config, 689 .ndo_set_vf_rate = qede_set_vf_rate, 690 #endif 691 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 692 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 693 .ndo_features_check = qede_features_check, 694 .ndo_bpf = qede_xdp, 695 #ifdef CONFIG_RFS_ACCEL 696 .ndo_rx_flow_steer = qede_rx_flow_steer, 697 #endif 698 .ndo_setup_tc = qede_setup_tc_offload, 699 }; 700 701 static const struct net_device_ops qede_netdev_vf_ops = { 702 .ndo_open = qede_open, 703 .ndo_stop = qede_close, 704 .ndo_start_xmit = qede_start_xmit, 705 .ndo_select_queue = qede_select_queue, 706 .ndo_set_rx_mode = qede_set_rx_mode, 707 .ndo_set_mac_address = qede_set_mac_addr, 708 .ndo_validate_addr = eth_validate_addr, 709 .ndo_change_mtu = qede_change_mtu, 710 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 711 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 712 .ndo_fix_features = qede_fix_features, 713 .ndo_set_features = qede_set_features, 714 .ndo_get_stats64 = qede_get_stats64, 715 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 716 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 717 .ndo_features_check = qede_features_check, 718 }; 719 720 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 721 .ndo_open = qede_open, 722 .ndo_stop = qede_close, 723 .ndo_start_xmit = qede_start_xmit, 724 .ndo_select_queue = qede_select_queue, 725 .ndo_set_rx_mode = qede_set_rx_mode, 726 .ndo_set_mac_address = qede_set_mac_addr, 727 .ndo_validate_addr = eth_validate_addr, 728 .ndo_change_mtu = qede_change_mtu, 729 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 730 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 731 .ndo_fix_features = qede_fix_features, 732 .ndo_set_features = qede_set_features, 733 .ndo_get_stats64 = qede_get_stats64, 734 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 735 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 736 .ndo_features_check = qede_features_check, 737 .ndo_bpf = qede_xdp, 738 }; 739 740 /* ------------------------------------------------------------------------- 741 * START OF PROBE / REMOVE 742 * ------------------------------------------------------------------------- 743 */ 744 745 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 746 struct pci_dev *pdev, 747 struct qed_dev_eth_info *info, 748 u32 dp_module, u8 dp_level) 749 { 750 struct net_device *ndev; 751 struct qede_dev *edev; 752 753 ndev = alloc_etherdev_mqs(sizeof(*edev), 754 info->num_queues * info->num_tc, 755 info->num_queues); 756 if (!ndev) { 757 pr_err("etherdev allocation failed\n"); 758 return NULL; 759 } 760 761 edev = netdev_priv(ndev); 762 edev->ndev = ndev; 763 edev->cdev = cdev; 764 edev->pdev = pdev; 765 edev->dp_module = dp_module; 766 edev->dp_level = dp_level; 767 edev->ops = qed_ops; 768 769 if (is_kdump_kernel()) { 770 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN; 771 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN; 772 } else { 773 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 774 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 775 } 776 777 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 778 info->num_queues, info->num_queues); 779 780 SET_NETDEV_DEV(ndev, &pdev->dev); 781 782 memset(&edev->stats, 0, sizeof(edev->stats)); 783 memcpy(&edev->dev_info, info, sizeof(*info)); 784 785 /* As ethtool doesn't have the ability to show WoL behavior as 786 * 'default', if device supports it declare it's enabled. 787 */ 788 if (edev->dev_info.common.wol_support) 789 edev->wol_enabled = true; 790 791 INIT_LIST_HEAD(&edev->vlan_list); 792 793 return edev; 794 } 795 796 static void qede_init_ndev(struct qede_dev *edev) 797 { 798 struct net_device *ndev = edev->ndev; 799 struct pci_dev *pdev = edev->pdev; 800 bool udp_tunnel_enable = false; 801 netdev_features_t hw_features; 802 803 pci_set_drvdata(pdev, ndev); 804 805 ndev->mem_start = edev->dev_info.common.pci_mem_start; 806 ndev->base_addr = ndev->mem_start; 807 ndev->mem_end = edev->dev_info.common.pci_mem_end; 808 ndev->irq = edev->dev_info.common.pci_irq; 809 810 ndev->watchdog_timeo = TX_TIMEOUT; 811 812 if (IS_VF(edev)) { 813 if (edev->dev_info.xdp_supported) 814 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 815 else 816 ndev->netdev_ops = &qede_netdev_vf_ops; 817 } else { 818 ndev->netdev_ops = &qede_netdev_ops; 819 } 820 821 qede_set_ethtool_ops(ndev); 822 823 ndev->priv_flags |= IFF_UNICAST_FLT; 824 825 /* user-changeble features */ 826 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 827 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 828 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 829 830 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) 831 hw_features |= NETIF_F_NTUPLE; 832 833 if (edev->dev_info.common.vxlan_enable || 834 edev->dev_info.common.geneve_enable) 835 udp_tunnel_enable = true; 836 837 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 838 hw_features |= NETIF_F_TSO_ECN; 839 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 840 NETIF_F_SG | NETIF_F_TSO | 841 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 842 NETIF_F_RXCSUM; 843 } 844 845 if (udp_tunnel_enable) { 846 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 847 NETIF_F_GSO_UDP_TUNNEL_CSUM); 848 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 849 NETIF_F_GSO_UDP_TUNNEL_CSUM); 850 } 851 852 if (edev->dev_info.common.gre_enable) { 853 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 854 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 855 NETIF_F_GSO_GRE_CSUM); 856 } 857 858 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 859 NETIF_F_HIGHDMA; 860 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 861 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 862 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 863 864 ndev->hw_features = hw_features; 865 866 /* MTU range: 46 - 9600 */ 867 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 868 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 869 870 /* Set network device HW mac */ 871 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 872 873 ndev->mtu = edev->dev_info.common.mtu; 874 } 875 876 /* This function converts from 32b param to two params of level and module 877 * Input 32b decoding: 878 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 879 * 'happy' flow, e.g. memory allocation failed. 880 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 881 * and provide important parameters. 882 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 883 * module. VERBOSE prints are for tracking the specific flow in low level. 884 * 885 * Notice that the level should be that of the lowest required logs. 886 */ 887 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 888 { 889 *p_dp_level = QED_LEVEL_NOTICE; 890 *p_dp_module = 0; 891 892 if (debug & QED_LOG_VERBOSE_MASK) { 893 *p_dp_level = QED_LEVEL_VERBOSE; 894 *p_dp_module = (debug & 0x3FFFFFFF); 895 } else if (debug & QED_LOG_INFO_MASK) { 896 *p_dp_level = QED_LEVEL_INFO; 897 } else if (debug & QED_LOG_NOTICE_MASK) { 898 *p_dp_level = QED_LEVEL_NOTICE; 899 } 900 } 901 902 static void qede_free_fp_array(struct qede_dev *edev) 903 { 904 if (edev->fp_array) { 905 struct qede_fastpath *fp; 906 int i; 907 908 for_each_queue(i) { 909 fp = &edev->fp_array[i]; 910 911 kfree(fp->sb_info); 912 /* Handle mem alloc failure case where qede_init_fp 913 * didn't register xdp_rxq_info yet. 914 * Implicit only (fp->type & QEDE_FASTPATH_RX) 915 */ 916 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 917 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 918 kfree(fp->rxq); 919 kfree(fp->xdp_tx); 920 kfree(fp->txq); 921 } 922 kfree(edev->fp_array); 923 } 924 925 edev->num_queues = 0; 926 edev->fp_num_tx = 0; 927 edev->fp_num_rx = 0; 928 } 929 930 static int qede_alloc_fp_array(struct qede_dev *edev) 931 { 932 u8 fp_combined, fp_rx = edev->fp_num_rx; 933 struct qede_fastpath *fp; 934 int i; 935 936 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 937 sizeof(*edev->fp_array), GFP_KERNEL); 938 if (!edev->fp_array) { 939 DP_NOTICE(edev, "fp array allocation failed\n"); 940 goto err; 941 } 942 943 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 944 945 /* Allocate the FP elements for Rx queues followed by combined and then 946 * the Tx. This ordering should be maintained so that the respective 947 * queues (Rx or Tx) will be together in the fastpath array and the 948 * associated ids will be sequential. 949 */ 950 for_each_queue(i) { 951 fp = &edev->fp_array[i]; 952 953 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 954 if (!fp->sb_info) { 955 DP_NOTICE(edev, "sb info struct allocation failed\n"); 956 goto err; 957 } 958 959 if (fp_rx) { 960 fp->type = QEDE_FASTPATH_RX; 961 fp_rx--; 962 } else if (fp_combined) { 963 fp->type = QEDE_FASTPATH_COMBINED; 964 fp_combined--; 965 } else { 966 fp->type = QEDE_FASTPATH_TX; 967 } 968 969 if (fp->type & QEDE_FASTPATH_TX) { 970 fp->txq = kcalloc(edev->dev_info.num_tc, 971 sizeof(*fp->txq), GFP_KERNEL); 972 if (!fp->txq) 973 goto err; 974 } 975 976 if (fp->type & QEDE_FASTPATH_RX) { 977 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 978 if (!fp->rxq) 979 goto err; 980 981 if (edev->xdp_prog) { 982 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 983 GFP_KERNEL); 984 if (!fp->xdp_tx) 985 goto err; 986 fp->type |= QEDE_FASTPATH_XDP; 987 } 988 } 989 } 990 991 return 0; 992 err: 993 qede_free_fp_array(edev); 994 return -ENOMEM; 995 } 996 997 /* The qede lock is used to protect driver state change and driver flows that 998 * are not reentrant. 999 */ 1000 void __qede_lock(struct qede_dev *edev) 1001 { 1002 mutex_lock(&edev->qede_lock); 1003 } 1004 1005 void __qede_unlock(struct qede_dev *edev) 1006 { 1007 mutex_unlock(&edev->qede_lock); 1008 } 1009 1010 /* This version of the lock should be used when acquiring the RTNL lock is also 1011 * needed in addition to the internal qede lock. 1012 */ 1013 static void qede_lock(struct qede_dev *edev) 1014 { 1015 rtnl_lock(); 1016 __qede_lock(edev); 1017 } 1018 1019 static void qede_unlock(struct qede_dev *edev) 1020 { 1021 __qede_unlock(edev); 1022 rtnl_unlock(); 1023 } 1024 1025 static void qede_sp_task(struct work_struct *work) 1026 { 1027 struct qede_dev *edev = container_of(work, struct qede_dev, 1028 sp_task.work); 1029 1030 /* The locking scheme depends on the specific flag: 1031 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 1032 * ensure that ongoing flows are ended and new ones are not started. 1033 * In other cases - only the internal qede lock should be acquired. 1034 */ 1035 1036 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 1037 #ifdef CONFIG_QED_SRIOV 1038 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1039 * The recovery of the active VFs is currently not supported. 1040 */ 1041 if (pci_num_vf(edev->pdev)) 1042 qede_sriov_configure(edev->pdev, 0); 1043 #endif 1044 qede_lock(edev); 1045 qede_recovery_handler(edev); 1046 qede_unlock(edev); 1047 } 1048 1049 __qede_lock(edev); 1050 1051 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 1052 if (edev->state == QEDE_STATE_OPEN) 1053 qede_config_rx_mode(edev->ndev); 1054 1055 #ifdef CONFIG_RFS_ACCEL 1056 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1057 if (edev->state == QEDE_STATE_OPEN) 1058 qede_process_arfs_filters(edev, false); 1059 } 1060 #endif 1061 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags)) 1062 qede_generic_hw_err_handler(edev); 1063 __qede_unlock(edev); 1064 1065 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1066 #ifdef CONFIG_QED_SRIOV 1067 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1068 * The recovery of the active VFs is currently not supported. 1069 */ 1070 if (pci_num_vf(edev->pdev)) 1071 qede_sriov_configure(edev->pdev, 0); 1072 #endif 1073 edev->ops->common->recovery_process(edev->cdev); 1074 } 1075 } 1076 1077 static void qede_update_pf_params(struct qed_dev *cdev) 1078 { 1079 struct qed_pf_params pf_params; 1080 u16 num_cons; 1081 1082 /* 64 rx + 64 tx + 64 XDP */ 1083 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1084 1085 /* 1 rx + 1 xdp + max tx cos */ 1086 num_cons = QED_MIN_L2_CONS; 1087 1088 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1089 1090 /* Same for VFs - make sure they'll have sufficient connections 1091 * to support XDP Tx queues. 1092 */ 1093 pf_params.eth_pf_params.num_vf_cons = 48; 1094 1095 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1096 qed_ops->common->update_pf_params(cdev, &pf_params); 1097 } 1098 1099 #define QEDE_FW_VER_STR_SIZE 80 1100 1101 static void qede_log_probe(struct qede_dev *edev) 1102 { 1103 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1104 u8 buf[QEDE_FW_VER_STR_SIZE]; 1105 size_t left_size; 1106 1107 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1108 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1109 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1110 p_dev_info->fw_eng, 1111 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1112 QED_MFW_VERSION_3_OFFSET, 1113 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1114 QED_MFW_VERSION_2_OFFSET, 1115 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1116 QED_MFW_VERSION_1_OFFSET, 1117 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1118 QED_MFW_VERSION_0_OFFSET); 1119 1120 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1121 if (p_dev_info->mbi_version && left_size) 1122 snprintf(buf + strlen(buf), left_size, 1123 " [MBI %d.%d.%d]", 1124 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1125 QED_MBI_VERSION_2_OFFSET, 1126 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1127 QED_MBI_VERSION_1_OFFSET, 1128 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1129 QED_MBI_VERSION_0_OFFSET); 1130 1131 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1132 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1133 buf, edev->ndev->name); 1134 } 1135 1136 enum qede_probe_mode { 1137 QEDE_PROBE_NORMAL, 1138 QEDE_PROBE_RECOVERY, 1139 }; 1140 1141 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1142 bool is_vf, enum qede_probe_mode mode) 1143 { 1144 struct qed_probe_params probe_params; 1145 struct qed_slowpath_params sp_params; 1146 struct qed_dev_eth_info dev_info; 1147 struct qede_dev *edev; 1148 struct qed_dev *cdev; 1149 int rc; 1150 1151 if (unlikely(dp_level & QED_LEVEL_INFO)) 1152 pr_notice("Starting qede probe\n"); 1153 1154 memset(&probe_params, 0, sizeof(probe_params)); 1155 probe_params.protocol = QED_PROTOCOL_ETH; 1156 probe_params.dp_module = dp_module; 1157 probe_params.dp_level = dp_level; 1158 probe_params.is_vf = is_vf; 1159 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1160 cdev = qed_ops->common->probe(pdev, &probe_params); 1161 if (!cdev) { 1162 rc = -ENODEV; 1163 goto err0; 1164 } 1165 1166 qede_update_pf_params(cdev); 1167 1168 /* Start the Slowpath-process */ 1169 memset(&sp_params, 0, sizeof(sp_params)); 1170 sp_params.int_mode = QED_INT_MODE_MSIX; 1171 sp_params.drv_major = QEDE_MAJOR_VERSION; 1172 sp_params.drv_minor = QEDE_MINOR_VERSION; 1173 sp_params.drv_rev = QEDE_REVISION_VERSION; 1174 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 1175 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1176 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1177 if (rc) { 1178 pr_notice("Cannot start slowpath\n"); 1179 goto err1; 1180 } 1181 1182 /* Learn information crucial for qede to progress */ 1183 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1184 if (rc) 1185 goto err2; 1186 1187 if (mode != QEDE_PROBE_RECOVERY) { 1188 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1189 dp_level); 1190 if (!edev) { 1191 rc = -ENOMEM; 1192 goto err2; 1193 } 1194 } else { 1195 struct net_device *ndev = pci_get_drvdata(pdev); 1196 1197 edev = netdev_priv(ndev); 1198 edev->cdev = cdev; 1199 memset(&edev->stats, 0, sizeof(edev->stats)); 1200 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1201 } 1202 1203 if (is_vf) 1204 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1205 1206 qede_init_ndev(edev); 1207 1208 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1209 if (rc) 1210 goto err3; 1211 1212 if (mode != QEDE_PROBE_RECOVERY) { 1213 /* Prepare the lock prior to the registration of the netdev, 1214 * as once it's registered we might reach flows requiring it 1215 * [it's even possible to reach a flow needing it directly 1216 * from there, although it's unlikely]. 1217 */ 1218 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1219 mutex_init(&edev->qede_lock); 1220 1221 rc = register_netdev(edev->ndev); 1222 if (rc) { 1223 DP_NOTICE(edev, "Cannot register net-device\n"); 1224 goto err4; 1225 } 1226 } 1227 1228 edev->ops->common->set_name(cdev, edev->ndev->name); 1229 1230 /* PTP not supported on VFs */ 1231 if (!is_vf) 1232 qede_ptp_enable(edev, (mode == QEDE_PROBE_NORMAL)); 1233 1234 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1235 1236 #ifdef CONFIG_DCB 1237 if (!IS_VF(edev)) 1238 qede_set_dcbnl_ops(edev->ndev); 1239 #endif 1240 1241 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1242 1243 qede_log_probe(edev); 1244 return 0; 1245 1246 err4: 1247 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1248 err3: 1249 free_netdev(edev->ndev); 1250 err2: 1251 qed_ops->common->slowpath_stop(cdev); 1252 err1: 1253 qed_ops->common->remove(cdev); 1254 err0: 1255 return rc; 1256 } 1257 1258 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1259 { 1260 bool is_vf = false; 1261 u32 dp_module = 0; 1262 u8 dp_level = 0; 1263 1264 switch ((enum qede_pci_private)id->driver_data) { 1265 case QEDE_PRIVATE_VF: 1266 if (debug & QED_LOG_VERBOSE_MASK) 1267 dev_err(&pdev->dev, "Probing a VF\n"); 1268 is_vf = true; 1269 break; 1270 default: 1271 if (debug & QED_LOG_VERBOSE_MASK) 1272 dev_err(&pdev->dev, "Probing a PF\n"); 1273 } 1274 1275 qede_config_debug(debug, &dp_module, &dp_level); 1276 1277 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1278 QEDE_PROBE_NORMAL); 1279 } 1280 1281 enum qede_remove_mode { 1282 QEDE_REMOVE_NORMAL, 1283 QEDE_REMOVE_RECOVERY, 1284 }; 1285 1286 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1287 { 1288 struct net_device *ndev = pci_get_drvdata(pdev); 1289 struct qede_dev *edev; 1290 struct qed_dev *cdev; 1291 1292 if (!ndev) { 1293 dev_info(&pdev->dev, "Device has already been removed\n"); 1294 return; 1295 } 1296 1297 edev = netdev_priv(ndev); 1298 cdev = edev->cdev; 1299 1300 DP_INFO(edev, "Starting qede_remove\n"); 1301 1302 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1303 1304 if (mode != QEDE_REMOVE_RECOVERY) { 1305 unregister_netdev(ndev); 1306 1307 cancel_delayed_work_sync(&edev->sp_task); 1308 1309 edev->ops->common->set_power_state(cdev, PCI_D0); 1310 1311 pci_set_drvdata(pdev, NULL); 1312 } 1313 1314 qede_ptp_disable(edev); 1315 1316 /* Use global ops since we've freed edev */ 1317 qed_ops->common->slowpath_stop(cdev); 1318 if (system_state == SYSTEM_POWER_OFF) 1319 return; 1320 qed_ops->common->remove(cdev); 1321 1322 /* Since this can happen out-of-sync with other flows, 1323 * don't release the netdevice until after slowpath stop 1324 * has been called to guarantee various other contexts 1325 * [e.g., QED register callbacks] won't break anything when 1326 * accessing the netdevice. 1327 */ 1328 if (mode != QEDE_REMOVE_RECOVERY) 1329 free_netdev(ndev); 1330 1331 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1332 } 1333 1334 static void qede_remove(struct pci_dev *pdev) 1335 { 1336 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1337 } 1338 1339 static void qede_shutdown(struct pci_dev *pdev) 1340 { 1341 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1342 } 1343 1344 /* ------------------------------------------------------------------------- 1345 * START OF LOAD / UNLOAD 1346 * ------------------------------------------------------------------------- 1347 */ 1348 1349 static int qede_set_num_queues(struct qede_dev *edev) 1350 { 1351 int rc; 1352 u16 rss_num; 1353 1354 /* Setup queues according to possible resources*/ 1355 if (edev->req_queues) 1356 rss_num = edev->req_queues; 1357 else 1358 rss_num = netif_get_num_default_rss_queues() * 1359 edev->dev_info.common.num_hwfns; 1360 1361 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1362 1363 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1364 if (rc > 0) { 1365 /* Managed to request interrupts for our queues */ 1366 edev->num_queues = rc; 1367 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1368 QEDE_QUEUE_CNT(edev), rss_num); 1369 rc = 0; 1370 } 1371 1372 edev->fp_num_tx = edev->req_num_tx; 1373 edev->fp_num_rx = edev->req_num_rx; 1374 1375 return rc; 1376 } 1377 1378 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1379 u16 sb_id) 1380 { 1381 if (sb_info->sb_virt) { 1382 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1383 QED_SB_TYPE_L2_QUEUE); 1384 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1385 (void *)sb_info->sb_virt, sb_info->sb_phys); 1386 memset(sb_info, 0, sizeof(*sb_info)); 1387 } 1388 } 1389 1390 /* This function allocates fast-path status block memory */ 1391 static int qede_alloc_mem_sb(struct qede_dev *edev, 1392 struct qed_sb_info *sb_info, u16 sb_id) 1393 { 1394 struct status_block_e4 *sb_virt; 1395 dma_addr_t sb_phys; 1396 int rc; 1397 1398 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1399 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1400 if (!sb_virt) { 1401 DP_ERR(edev, "Status block allocation failed\n"); 1402 return -ENOMEM; 1403 } 1404 1405 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1406 sb_virt, sb_phys, sb_id, 1407 QED_SB_TYPE_L2_QUEUE); 1408 if (rc) { 1409 DP_ERR(edev, "Status block initialization failed\n"); 1410 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1411 sb_virt, sb_phys); 1412 return rc; 1413 } 1414 1415 return 0; 1416 } 1417 1418 static void qede_free_rx_buffers(struct qede_dev *edev, 1419 struct qede_rx_queue *rxq) 1420 { 1421 u16 i; 1422 1423 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1424 struct sw_rx_data *rx_buf; 1425 struct page *data; 1426 1427 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1428 data = rx_buf->data; 1429 1430 dma_unmap_page(&edev->pdev->dev, 1431 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1432 1433 rx_buf->data = NULL; 1434 __free_page(data); 1435 } 1436 } 1437 1438 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1439 { 1440 /* Free rx buffers */ 1441 qede_free_rx_buffers(edev, rxq); 1442 1443 /* Free the parallel SW ring */ 1444 kfree(rxq->sw_rx_ring); 1445 1446 /* Free the real RQ ring used by FW */ 1447 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1448 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1449 } 1450 1451 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1452 { 1453 int i; 1454 1455 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1456 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1457 1458 tpa_info->state = QEDE_AGG_STATE_NONE; 1459 } 1460 } 1461 1462 /* This function allocates all memory needed per Rx queue */ 1463 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1464 { 1465 int i, rc, size; 1466 1467 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1468 1469 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1470 1471 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1472 size = rxq->rx_headroom + 1473 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1474 1475 /* Make sure that the headroom and payload fit in a single page */ 1476 if (rxq->rx_buf_size + size > PAGE_SIZE) 1477 rxq->rx_buf_size = PAGE_SIZE - size; 1478 1479 /* Segment size to split a page in multiple equal parts, 1480 * unless XDP is used in which case we'd use the entire page. 1481 */ 1482 if (!edev->xdp_prog) { 1483 size = size + rxq->rx_buf_size; 1484 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1485 } else { 1486 rxq->rx_buf_seg_size = PAGE_SIZE; 1487 edev->ndev->features &= ~NETIF_F_GRO_HW; 1488 } 1489 1490 /* Allocate the parallel driver ring for Rx buffers */ 1491 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1492 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1493 if (!rxq->sw_rx_ring) { 1494 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1495 rc = -ENOMEM; 1496 goto err; 1497 } 1498 1499 /* Allocate FW Rx ring */ 1500 rc = edev->ops->common->chain_alloc(edev->cdev, 1501 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1502 QED_CHAIN_MODE_NEXT_PTR, 1503 QED_CHAIN_CNT_TYPE_U16, 1504 RX_RING_SIZE, 1505 sizeof(struct eth_rx_bd), 1506 &rxq->rx_bd_ring, NULL); 1507 if (rc) 1508 goto err; 1509 1510 /* Allocate FW completion ring */ 1511 rc = edev->ops->common->chain_alloc(edev->cdev, 1512 QED_CHAIN_USE_TO_CONSUME, 1513 QED_CHAIN_MODE_PBL, 1514 QED_CHAIN_CNT_TYPE_U16, 1515 RX_RING_SIZE, 1516 sizeof(union eth_rx_cqe), 1517 &rxq->rx_comp_ring, NULL); 1518 if (rc) 1519 goto err; 1520 1521 /* Allocate buffers for the Rx ring */ 1522 rxq->filled_buffers = 0; 1523 for (i = 0; i < rxq->num_rx_buffers; i++) { 1524 rc = qede_alloc_rx_buffer(rxq, false); 1525 if (rc) { 1526 DP_ERR(edev, 1527 "Rx buffers allocation failed at index %d\n", i); 1528 goto err; 1529 } 1530 } 1531 1532 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1533 if (!edev->gro_disable) 1534 qede_set_tpa_param(rxq); 1535 err: 1536 return rc; 1537 } 1538 1539 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1540 { 1541 /* Free the parallel SW ring */ 1542 if (txq->is_xdp) 1543 kfree(txq->sw_tx_ring.xdp); 1544 else 1545 kfree(txq->sw_tx_ring.skbs); 1546 1547 /* Free the real RQ ring used by FW */ 1548 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1549 } 1550 1551 /* This function allocates all memory needed per Tx queue */ 1552 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1553 { 1554 union eth_tx_bd_types *p_virt; 1555 int size, rc; 1556 1557 txq->num_tx_buffers = edev->q_num_tx_buffers; 1558 1559 /* Allocate the parallel driver ring for Tx buffers */ 1560 if (txq->is_xdp) { 1561 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1562 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1563 if (!txq->sw_tx_ring.xdp) 1564 goto err; 1565 } else { 1566 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1567 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1568 if (!txq->sw_tx_ring.skbs) 1569 goto err; 1570 } 1571 1572 rc = edev->ops->common->chain_alloc(edev->cdev, 1573 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1574 QED_CHAIN_MODE_PBL, 1575 QED_CHAIN_CNT_TYPE_U16, 1576 txq->num_tx_buffers, 1577 sizeof(*p_virt), 1578 &txq->tx_pbl, NULL); 1579 if (rc) 1580 goto err; 1581 1582 return 0; 1583 1584 err: 1585 qede_free_mem_txq(edev, txq); 1586 return -ENOMEM; 1587 } 1588 1589 /* This function frees all memory of a single fp */ 1590 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1591 { 1592 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1593 1594 if (fp->type & QEDE_FASTPATH_RX) 1595 qede_free_mem_rxq(edev, fp->rxq); 1596 1597 if (fp->type & QEDE_FASTPATH_XDP) 1598 qede_free_mem_txq(edev, fp->xdp_tx); 1599 1600 if (fp->type & QEDE_FASTPATH_TX) { 1601 int cos; 1602 1603 for_each_cos_in_txq(edev, cos) 1604 qede_free_mem_txq(edev, &fp->txq[cos]); 1605 } 1606 } 1607 1608 /* This function allocates all memory needed for a single fp (i.e. an entity 1609 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1610 */ 1611 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1612 { 1613 int rc = 0; 1614 1615 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1616 if (rc) 1617 goto out; 1618 1619 if (fp->type & QEDE_FASTPATH_RX) { 1620 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1621 if (rc) 1622 goto out; 1623 } 1624 1625 if (fp->type & QEDE_FASTPATH_XDP) { 1626 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1627 if (rc) 1628 goto out; 1629 } 1630 1631 if (fp->type & QEDE_FASTPATH_TX) { 1632 int cos; 1633 1634 for_each_cos_in_txq(edev, cos) { 1635 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1636 if (rc) 1637 goto out; 1638 } 1639 } 1640 1641 out: 1642 return rc; 1643 } 1644 1645 static void qede_free_mem_load(struct qede_dev *edev) 1646 { 1647 int i; 1648 1649 for_each_queue(i) { 1650 struct qede_fastpath *fp = &edev->fp_array[i]; 1651 1652 qede_free_mem_fp(edev, fp); 1653 } 1654 } 1655 1656 /* This function allocates all qede memory at NIC load. */ 1657 static int qede_alloc_mem_load(struct qede_dev *edev) 1658 { 1659 int rc = 0, queue_id; 1660 1661 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1662 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1663 1664 rc = qede_alloc_mem_fp(edev, fp); 1665 if (rc) { 1666 DP_ERR(edev, 1667 "Failed to allocate memory for fastpath - rss id = %d\n", 1668 queue_id); 1669 qede_free_mem_load(edev); 1670 return rc; 1671 } 1672 } 1673 1674 return 0; 1675 } 1676 1677 static void qede_empty_tx_queue(struct qede_dev *edev, 1678 struct qede_tx_queue *txq) 1679 { 1680 unsigned int pkts_compl = 0, bytes_compl = 0; 1681 struct netdev_queue *netdev_txq; 1682 int rc, len = 0; 1683 1684 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1685 1686 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1687 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1688 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1689 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1690 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1691 qed_chain_get_prod_idx(&txq->tx_pbl)); 1692 1693 rc = qede_free_tx_pkt(edev, txq, &len); 1694 if (rc) { 1695 DP_NOTICE(edev, 1696 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1697 txq->index, 1698 qed_chain_get_cons_idx(&txq->tx_pbl), 1699 qed_chain_get_prod_idx(&txq->tx_pbl)); 1700 break; 1701 } 1702 1703 bytes_compl += len; 1704 pkts_compl++; 1705 txq->sw_tx_cons++; 1706 } 1707 1708 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1709 } 1710 1711 static void qede_empty_tx_queues(struct qede_dev *edev) 1712 { 1713 int i; 1714 1715 for_each_queue(i) 1716 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1717 int cos; 1718 1719 for_each_cos_in_txq(edev, cos) { 1720 struct qede_fastpath *fp; 1721 1722 fp = &edev->fp_array[i]; 1723 qede_empty_tx_queue(edev, 1724 &fp->txq[cos]); 1725 } 1726 } 1727 } 1728 1729 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1730 static void qede_init_fp(struct qede_dev *edev) 1731 { 1732 int queue_id, rxq_index = 0, txq_index = 0; 1733 struct qede_fastpath *fp; 1734 1735 for_each_queue(queue_id) { 1736 fp = &edev->fp_array[queue_id]; 1737 1738 fp->edev = edev; 1739 fp->id = queue_id; 1740 1741 if (fp->type & QEDE_FASTPATH_XDP) { 1742 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1743 rxq_index); 1744 fp->xdp_tx->is_xdp = 1; 1745 } 1746 1747 if (fp->type & QEDE_FASTPATH_RX) { 1748 fp->rxq->rxq_id = rxq_index++; 1749 1750 /* Determine how to map buffers for this queue */ 1751 if (fp->type & QEDE_FASTPATH_XDP) 1752 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1753 else 1754 fp->rxq->data_direction = DMA_FROM_DEVICE; 1755 fp->rxq->dev = &edev->pdev->dev; 1756 1757 /* Driver have no error path from here */ 1758 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1759 fp->rxq->rxq_id) < 0); 1760 } 1761 1762 if (fp->type & QEDE_FASTPATH_TX) { 1763 int cos; 1764 1765 for_each_cos_in_txq(edev, cos) { 1766 struct qede_tx_queue *txq = &fp->txq[cos]; 1767 u16 ndev_tx_id; 1768 1769 txq->cos = cos; 1770 txq->index = txq_index; 1771 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1772 txq->ndev_txq_id = ndev_tx_id; 1773 1774 if (edev->dev_info.is_legacy) 1775 txq->is_legacy = true; 1776 txq->dev = &edev->pdev->dev; 1777 } 1778 1779 txq_index++; 1780 } 1781 1782 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1783 edev->ndev->name, queue_id); 1784 } 1785 } 1786 1787 static int qede_set_real_num_queues(struct qede_dev *edev) 1788 { 1789 int rc = 0; 1790 1791 rc = netif_set_real_num_tx_queues(edev->ndev, 1792 QEDE_TSS_COUNT(edev) * 1793 edev->dev_info.num_tc); 1794 if (rc) { 1795 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1796 return rc; 1797 } 1798 1799 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1800 if (rc) { 1801 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1802 return rc; 1803 } 1804 1805 return 0; 1806 } 1807 1808 static void qede_napi_disable_remove(struct qede_dev *edev) 1809 { 1810 int i; 1811 1812 for_each_queue(i) { 1813 napi_disable(&edev->fp_array[i].napi); 1814 1815 netif_napi_del(&edev->fp_array[i].napi); 1816 } 1817 } 1818 1819 static void qede_napi_add_enable(struct qede_dev *edev) 1820 { 1821 int i; 1822 1823 /* Add NAPI objects */ 1824 for_each_queue(i) { 1825 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1826 qede_poll, NAPI_POLL_WEIGHT); 1827 napi_enable(&edev->fp_array[i].napi); 1828 } 1829 } 1830 1831 static void qede_sync_free_irqs(struct qede_dev *edev) 1832 { 1833 int i; 1834 1835 for (i = 0; i < edev->int_info.used_cnt; i++) { 1836 if (edev->int_info.msix_cnt) { 1837 synchronize_irq(edev->int_info.msix[i].vector); 1838 free_irq(edev->int_info.msix[i].vector, 1839 &edev->fp_array[i]); 1840 } else { 1841 edev->ops->common->simd_handler_clean(edev->cdev, i); 1842 } 1843 } 1844 1845 edev->int_info.used_cnt = 0; 1846 } 1847 1848 static int qede_req_msix_irqs(struct qede_dev *edev) 1849 { 1850 int i, rc; 1851 1852 /* Sanitize number of interrupts == number of prepared RSS queues */ 1853 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1854 DP_ERR(edev, 1855 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1856 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1857 return -EINVAL; 1858 } 1859 1860 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1861 #ifdef CONFIG_RFS_ACCEL 1862 struct qede_fastpath *fp = &edev->fp_array[i]; 1863 1864 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1865 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1866 edev->int_info.msix[i].vector); 1867 if (rc) { 1868 DP_ERR(edev, "Failed to add CPU rmap\n"); 1869 qede_free_arfs(edev); 1870 } 1871 } 1872 #endif 1873 rc = request_irq(edev->int_info.msix[i].vector, 1874 qede_msix_fp_int, 0, edev->fp_array[i].name, 1875 &edev->fp_array[i]); 1876 if (rc) { 1877 DP_ERR(edev, "Request fp %d irq failed\n", i); 1878 qede_sync_free_irqs(edev); 1879 return rc; 1880 } 1881 DP_VERBOSE(edev, NETIF_MSG_INTR, 1882 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1883 edev->fp_array[i].name, i, 1884 &edev->fp_array[i]); 1885 edev->int_info.used_cnt++; 1886 } 1887 1888 return 0; 1889 } 1890 1891 static void qede_simd_fp_handler(void *cookie) 1892 { 1893 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1894 1895 napi_schedule_irqoff(&fp->napi); 1896 } 1897 1898 static int qede_setup_irqs(struct qede_dev *edev) 1899 { 1900 int i, rc = 0; 1901 1902 /* Learn Interrupt configuration */ 1903 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1904 if (rc) 1905 return rc; 1906 1907 if (edev->int_info.msix_cnt) { 1908 rc = qede_req_msix_irqs(edev); 1909 if (rc) 1910 return rc; 1911 edev->ndev->irq = edev->int_info.msix[0].vector; 1912 } else { 1913 const struct qed_common_ops *ops; 1914 1915 /* qed should learn receive the RSS ids and callbacks */ 1916 ops = edev->ops->common; 1917 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1918 ops->simd_handler_config(edev->cdev, 1919 &edev->fp_array[i], i, 1920 qede_simd_fp_handler); 1921 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1922 } 1923 return 0; 1924 } 1925 1926 static int qede_drain_txq(struct qede_dev *edev, 1927 struct qede_tx_queue *txq, bool allow_drain) 1928 { 1929 int rc, cnt = 1000; 1930 1931 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1932 if (!cnt) { 1933 if (allow_drain) { 1934 DP_NOTICE(edev, 1935 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1936 txq->index); 1937 rc = edev->ops->common->drain(edev->cdev); 1938 if (rc) 1939 return rc; 1940 return qede_drain_txq(edev, txq, false); 1941 } 1942 DP_NOTICE(edev, 1943 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1944 txq->index, txq->sw_tx_prod, 1945 txq->sw_tx_cons); 1946 return -ENODEV; 1947 } 1948 cnt--; 1949 usleep_range(1000, 2000); 1950 barrier(); 1951 } 1952 1953 /* FW finished processing, wait for HW to transmit all tx packets */ 1954 usleep_range(1000, 2000); 1955 1956 return 0; 1957 } 1958 1959 static int qede_stop_txq(struct qede_dev *edev, 1960 struct qede_tx_queue *txq, int rss_id) 1961 { 1962 /* delete doorbell from doorbell recovery mechanism */ 1963 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1964 &txq->tx_db); 1965 1966 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1967 } 1968 1969 static int qede_stop_queues(struct qede_dev *edev) 1970 { 1971 struct qed_update_vport_params *vport_update_params; 1972 struct qed_dev *cdev = edev->cdev; 1973 struct qede_fastpath *fp; 1974 int rc, i; 1975 1976 /* Disable the vport */ 1977 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1978 if (!vport_update_params) 1979 return -ENOMEM; 1980 1981 vport_update_params->vport_id = 0; 1982 vport_update_params->update_vport_active_flg = 1; 1983 vport_update_params->vport_active_flg = 0; 1984 vport_update_params->update_rss_flg = 0; 1985 1986 rc = edev->ops->vport_update(cdev, vport_update_params); 1987 vfree(vport_update_params); 1988 1989 if (rc) { 1990 DP_ERR(edev, "Failed to update vport\n"); 1991 return rc; 1992 } 1993 1994 /* Flush Tx queues. If needed, request drain from MCP */ 1995 for_each_queue(i) { 1996 fp = &edev->fp_array[i]; 1997 1998 if (fp->type & QEDE_FASTPATH_TX) { 1999 int cos; 2000 2001 for_each_cos_in_txq(edev, cos) { 2002 rc = qede_drain_txq(edev, &fp->txq[cos], true); 2003 if (rc) 2004 return rc; 2005 } 2006 } 2007 2008 if (fp->type & QEDE_FASTPATH_XDP) { 2009 rc = qede_drain_txq(edev, fp->xdp_tx, true); 2010 if (rc) 2011 return rc; 2012 } 2013 } 2014 2015 /* Stop all Queues in reverse order */ 2016 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 2017 fp = &edev->fp_array[i]; 2018 2019 /* Stop the Tx Queue(s) */ 2020 if (fp->type & QEDE_FASTPATH_TX) { 2021 int cos; 2022 2023 for_each_cos_in_txq(edev, cos) { 2024 rc = qede_stop_txq(edev, &fp->txq[cos], i); 2025 if (rc) 2026 return rc; 2027 } 2028 } 2029 2030 /* Stop the Rx Queue */ 2031 if (fp->type & QEDE_FASTPATH_RX) { 2032 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 2033 if (rc) { 2034 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 2035 return rc; 2036 } 2037 } 2038 2039 /* Stop the XDP forwarding queue */ 2040 if (fp->type & QEDE_FASTPATH_XDP) { 2041 rc = qede_stop_txq(edev, fp->xdp_tx, i); 2042 if (rc) 2043 return rc; 2044 2045 bpf_prog_put(fp->rxq->xdp_prog); 2046 } 2047 } 2048 2049 /* Stop the vport */ 2050 rc = edev->ops->vport_stop(cdev, 0); 2051 if (rc) 2052 DP_ERR(edev, "Failed to stop VPORT\n"); 2053 2054 return rc; 2055 } 2056 2057 static int qede_start_txq(struct qede_dev *edev, 2058 struct qede_fastpath *fp, 2059 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2060 { 2061 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2062 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2063 struct qed_queue_start_common_params params; 2064 struct qed_txq_start_ret_params ret_params; 2065 int rc; 2066 2067 memset(¶ms, 0, sizeof(params)); 2068 memset(&ret_params, 0, sizeof(ret_params)); 2069 2070 /* Let the XDP queue share the queue-zone with one of the regular txq. 2071 * We don't really care about its coalescing. 2072 */ 2073 if (txq->is_xdp) 2074 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2075 else 2076 params.queue_id = txq->index; 2077 2078 params.p_sb = fp->sb_info; 2079 params.sb_idx = sb_idx; 2080 params.tc = txq->cos; 2081 2082 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2083 page_cnt, &ret_params); 2084 if (rc) { 2085 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2086 return rc; 2087 } 2088 2089 txq->doorbell_addr = ret_params.p_doorbell; 2090 txq->handle = ret_params.p_handle; 2091 2092 /* Determine the FW consumer address associated */ 2093 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2094 2095 /* Prepare the doorbell parameters */ 2096 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2097 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2098 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2099 DQ_XCM_ETH_TX_BD_PROD_CMD); 2100 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2101 2102 /* register doorbell with doorbell recovery mechanism */ 2103 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2104 &txq->tx_db, DB_REC_WIDTH_32B, 2105 DB_REC_KERNEL); 2106 2107 return rc; 2108 } 2109 2110 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2111 { 2112 int vlan_removal_en = 1; 2113 struct qed_dev *cdev = edev->cdev; 2114 struct qed_dev_info *qed_info = &edev->dev_info.common; 2115 struct qed_update_vport_params *vport_update_params; 2116 struct qed_queue_start_common_params q_params; 2117 struct qed_start_vport_params start = {0}; 2118 int rc, i; 2119 2120 if (!edev->num_queues) { 2121 DP_ERR(edev, 2122 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2123 return -EINVAL; 2124 } 2125 2126 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2127 if (!vport_update_params) 2128 return -ENOMEM; 2129 2130 start.handle_ptp_pkts = !!(edev->ptp); 2131 start.gro_enable = !edev->gro_disable; 2132 start.mtu = edev->ndev->mtu; 2133 start.vport_id = 0; 2134 start.drop_ttl0 = true; 2135 start.remove_inner_vlan = vlan_removal_en; 2136 start.clear_stats = clear_stats; 2137 2138 rc = edev->ops->vport_start(cdev, &start); 2139 2140 if (rc) { 2141 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2142 goto out; 2143 } 2144 2145 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2146 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2147 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2148 2149 for_each_queue(i) { 2150 struct qede_fastpath *fp = &edev->fp_array[i]; 2151 dma_addr_t p_phys_table; 2152 u32 page_cnt; 2153 2154 if (fp->type & QEDE_FASTPATH_RX) { 2155 struct qed_rxq_start_ret_params ret_params; 2156 struct qede_rx_queue *rxq = fp->rxq; 2157 __le16 *val; 2158 2159 memset(&ret_params, 0, sizeof(ret_params)); 2160 memset(&q_params, 0, sizeof(q_params)); 2161 q_params.queue_id = rxq->rxq_id; 2162 q_params.vport_id = 0; 2163 q_params.p_sb = fp->sb_info; 2164 q_params.sb_idx = RX_PI; 2165 2166 p_phys_table = 2167 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2168 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2169 2170 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2171 rxq->rx_buf_size, 2172 rxq->rx_bd_ring.p_phys_addr, 2173 p_phys_table, 2174 page_cnt, &ret_params); 2175 if (rc) { 2176 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2177 rc); 2178 goto out; 2179 } 2180 2181 /* Use the return parameters */ 2182 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2183 rxq->handle = ret_params.p_handle; 2184 2185 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2186 rxq->hw_cons_ptr = val; 2187 2188 qede_update_rx_prod(edev, rxq); 2189 } 2190 2191 if (fp->type & QEDE_FASTPATH_XDP) { 2192 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2193 if (rc) 2194 goto out; 2195 2196 bpf_prog_add(edev->xdp_prog, 1); 2197 fp->rxq->xdp_prog = edev->xdp_prog; 2198 } 2199 2200 if (fp->type & QEDE_FASTPATH_TX) { 2201 int cos; 2202 2203 for_each_cos_in_txq(edev, cos) { 2204 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2205 TX_PI(cos)); 2206 if (rc) 2207 goto out; 2208 } 2209 } 2210 } 2211 2212 /* Prepare and send the vport enable */ 2213 vport_update_params->vport_id = start.vport_id; 2214 vport_update_params->update_vport_active_flg = 1; 2215 vport_update_params->vport_active_flg = 1; 2216 2217 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2218 qed_info->tx_switching) { 2219 vport_update_params->update_tx_switching_flg = 1; 2220 vport_update_params->tx_switching_flg = 1; 2221 } 2222 2223 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2224 &vport_update_params->update_rss_flg); 2225 2226 rc = edev->ops->vport_update(cdev, vport_update_params); 2227 if (rc) 2228 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2229 2230 out: 2231 vfree(vport_update_params); 2232 return rc; 2233 } 2234 2235 enum qede_unload_mode { 2236 QEDE_UNLOAD_NORMAL, 2237 QEDE_UNLOAD_RECOVERY, 2238 }; 2239 2240 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2241 bool is_locked) 2242 { 2243 struct qed_link_params link_params; 2244 int rc; 2245 2246 DP_INFO(edev, "Starting qede unload\n"); 2247 2248 if (!is_locked) 2249 __qede_lock(edev); 2250 2251 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2252 2253 if (mode != QEDE_UNLOAD_RECOVERY) 2254 edev->state = QEDE_STATE_CLOSED; 2255 2256 qede_rdma_dev_event_close(edev); 2257 2258 /* Close OS Tx */ 2259 netif_tx_disable(edev->ndev); 2260 netif_carrier_off(edev->ndev); 2261 2262 if (mode != QEDE_UNLOAD_RECOVERY) { 2263 /* Reset the link */ 2264 memset(&link_params, 0, sizeof(link_params)); 2265 link_params.link_up = false; 2266 edev->ops->common->set_link(edev->cdev, &link_params); 2267 2268 rc = qede_stop_queues(edev); 2269 if (rc) { 2270 qede_sync_free_irqs(edev); 2271 goto out; 2272 } 2273 2274 DP_INFO(edev, "Stopped Queues\n"); 2275 } 2276 2277 qede_vlan_mark_nonconfigured(edev); 2278 edev->ops->fastpath_stop(edev->cdev); 2279 2280 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2281 qede_poll_for_freeing_arfs_filters(edev); 2282 qede_free_arfs(edev); 2283 } 2284 2285 /* Release the interrupts */ 2286 qede_sync_free_irqs(edev); 2287 edev->ops->common->set_fp_int(edev->cdev, 0); 2288 2289 qede_napi_disable_remove(edev); 2290 2291 if (mode == QEDE_UNLOAD_RECOVERY) 2292 qede_empty_tx_queues(edev); 2293 2294 qede_free_mem_load(edev); 2295 qede_free_fp_array(edev); 2296 2297 out: 2298 if (!is_locked) 2299 __qede_unlock(edev); 2300 2301 if (mode != QEDE_UNLOAD_RECOVERY) 2302 DP_NOTICE(edev, "Link is down\n"); 2303 2304 edev->ptp_skip_txts = 0; 2305 2306 DP_INFO(edev, "Ending qede unload\n"); 2307 } 2308 2309 enum qede_load_mode { 2310 QEDE_LOAD_NORMAL, 2311 QEDE_LOAD_RELOAD, 2312 QEDE_LOAD_RECOVERY, 2313 }; 2314 2315 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2316 bool is_locked) 2317 { 2318 struct qed_link_params link_params; 2319 u8 num_tc; 2320 int rc; 2321 2322 DP_INFO(edev, "Starting qede load\n"); 2323 2324 if (!is_locked) 2325 __qede_lock(edev); 2326 2327 rc = qede_set_num_queues(edev); 2328 if (rc) 2329 goto out; 2330 2331 rc = qede_alloc_fp_array(edev); 2332 if (rc) 2333 goto out; 2334 2335 qede_init_fp(edev); 2336 2337 rc = qede_alloc_mem_load(edev); 2338 if (rc) 2339 goto err1; 2340 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2341 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2342 2343 rc = qede_set_real_num_queues(edev); 2344 if (rc) 2345 goto err2; 2346 2347 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2348 rc = qede_alloc_arfs(edev); 2349 if (rc) 2350 DP_NOTICE(edev, "aRFS memory allocation failed\n"); 2351 } 2352 2353 qede_napi_add_enable(edev); 2354 DP_INFO(edev, "Napi added and enabled\n"); 2355 2356 rc = qede_setup_irqs(edev); 2357 if (rc) 2358 goto err3; 2359 DP_INFO(edev, "Setup IRQs succeeded\n"); 2360 2361 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2362 if (rc) 2363 goto err4; 2364 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2365 2366 num_tc = netdev_get_num_tc(edev->ndev); 2367 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2368 qede_setup_tc(edev->ndev, num_tc); 2369 2370 /* Program un-configured VLANs */ 2371 qede_configure_vlan_filters(edev); 2372 2373 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2374 2375 /* Ask for link-up using current configuration */ 2376 memset(&link_params, 0, sizeof(link_params)); 2377 link_params.link_up = true; 2378 edev->ops->common->set_link(edev->cdev, &link_params); 2379 2380 edev->state = QEDE_STATE_OPEN; 2381 2382 DP_INFO(edev, "Ending successfully qede load\n"); 2383 2384 goto out; 2385 err4: 2386 qede_sync_free_irqs(edev); 2387 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 2388 err3: 2389 qede_napi_disable_remove(edev); 2390 err2: 2391 qede_free_mem_load(edev); 2392 err1: 2393 edev->ops->common->set_fp_int(edev->cdev, 0); 2394 qede_free_fp_array(edev); 2395 edev->num_queues = 0; 2396 edev->fp_num_tx = 0; 2397 edev->fp_num_rx = 0; 2398 out: 2399 if (!is_locked) 2400 __qede_unlock(edev); 2401 2402 return rc; 2403 } 2404 2405 /* 'func' should be able to run between unload and reload assuming interface 2406 * is actually running, or afterwards in case it's currently DOWN. 2407 */ 2408 void qede_reload(struct qede_dev *edev, 2409 struct qede_reload_args *args, bool is_locked) 2410 { 2411 if (!is_locked) 2412 __qede_lock(edev); 2413 2414 /* Since qede_lock is held, internal state wouldn't change even 2415 * if netdev state would start transitioning. Check whether current 2416 * internal configuration indicates device is up, then reload. 2417 */ 2418 if (edev->state == QEDE_STATE_OPEN) { 2419 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2420 if (args) 2421 args->func(edev, args); 2422 qede_load(edev, QEDE_LOAD_RELOAD, true); 2423 2424 /* Since no one is going to do it for us, re-configure */ 2425 qede_config_rx_mode(edev->ndev); 2426 } else if (args) { 2427 args->func(edev, args); 2428 } 2429 2430 if (!is_locked) 2431 __qede_unlock(edev); 2432 } 2433 2434 /* called with rtnl_lock */ 2435 static int qede_open(struct net_device *ndev) 2436 { 2437 struct qede_dev *edev = netdev_priv(ndev); 2438 int rc; 2439 2440 netif_carrier_off(ndev); 2441 2442 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2443 2444 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2445 if (rc) 2446 return rc; 2447 2448 udp_tunnel_get_rx_info(ndev); 2449 2450 edev->ops->common->update_drv_state(edev->cdev, true); 2451 2452 return 0; 2453 } 2454 2455 static int qede_close(struct net_device *ndev) 2456 { 2457 struct qede_dev *edev = netdev_priv(ndev); 2458 2459 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2460 2461 edev->ops->common->update_drv_state(edev->cdev, false); 2462 2463 return 0; 2464 } 2465 2466 static void qede_link_update(void *dev, struct qed_link_output *link) 2467 { 2468 struct qede_dev *edev = dev; 2469 2470 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2471 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2472 return; 2473 } 2474 2475 if (link->link_up) { 2476 if (!netif_carrier_ok(edev->ndev)) { 2477 DP_NOTICE(edev, "Link is up\n"); 2478 netif_tx_start_all_queues(edev->ndev); 2479 netif_carrier_on(edev->ndev); 2480 qede_rdma_dev_event_open(edev); 2481 } 2482 } else { 2483 if (netif_carrier_ok(edev->ndev)) { 2484 DP_NOTICE(edev, "Link is down\n"); 2485 netif_tx_disable(edev->ndev); 2486 netif_carrier_off(edev->ndev); 2487 qede_rdma_dev_event_close(edev); 2488 } 2489 } 2490 } 2491 2492 static void qede_schedule_recovery_handler(void *dev) 2493 { 2494 struct qede_dev *edev = dev; 2495 2496 if (edev->state == QEDE_STATE_RECOVERY) { 2497 DP_NOTICE(edev, 2498 "Avoid scheduling a recovery handling since already in recovery state\n"); 2499 return; 2500 } 2501 2502 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2503 schedule_delayed_work(&edev->sp_task, 0); 2504 2505 DP_INFO(edev, "Scheduled a recovery handler\n"); 2506 } 2507 2508 static void qede_recovery_failed(struct qede_dev *edev) 2509 { 2510 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2511 2512 netif_device_detach(edev->ndev); 2513 2514 if (edev->cdev) 2515 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2516 } 2517 2518 static void qede_recovery_handler(struct qede_dev *edev) 2519 { 2520 u32 curr_state = edev->state; 2521 int rc; 2522 2523 DP_NOTICE(edev, "Starting a recovery process\n"); 2524 2525 /* No need to acquire first the qede_lock since is done by qede_sp_task 2526 * before calling this function. 2527 */ 2528 edev->state = QEDE_STATE_RECOVERY; 2529 2530 edev->ops->common->recovery_prolog(edev->cdev); 2531 2532 if (curr_state == QEDE_STATE_OPEN) 2533 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2534 2535 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2536 2537 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2538 IS_VF(edev), QEDE_PROBE_RECOVERY); 2539 if (rc) { 2540 edev->cdev = NULL; 2541 goto err; 2542 } 2543 2544 if (curr_state == QEDE_STATE_OPEN) { 2545 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2546 if (rc) 2547 goto err; 2548 2549 qede_config_rx_mode(edev->ndev); 2550 udp_tunnel_get_rx_info(edev->ndev); 2551 } 2552 2553 edev->state = curr_state; 2554 2555 DP_NOTICE(edev, "Recovery handling is done\n"); 2556 2557 return; 2558 2559 err: 2560 qede_recovery_failed(edev); 2561 } 2562 2563 static void qede_atomic_hw_err_handler(struct qede_dev *edev) 2564 { 2565 struct qed_dev *cdev = edev->cdev; 2566 2567 DP_NOTICE(edev, 2568 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n", 2569 edev->err_flags); 2570 2571 /* Get a call trace of the flow that led to the error */ 2572 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags)); 2573 2574 /* Prevent HW attentions from being reasserted */ 2575 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags)) 2576 edev->ops->common->attn_clr_enable(cdev, true); 2577 2578 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n"); 2579 } 2580 2581 static void qede_generic_hw_err_handler(struct qede_dev *edev) 2582 { 2583 struct qed_dev *cdev = edev->cdev; 2584 2585 DP_NOTICE(edev, 2586 "Generic sleepable HW error handling started - err_flags 0x%lx\n", 2587 edev->err_flags); 2588 2589 /* Trigger a recovery process. 2590 * This is placed in the sleep requiring section just to make 2591 * sure it is the last one, and that all the other operations 2592 * were completed. 2593 */ 2594 if (test_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags)) 2595 edev->ops->common->recovery_process(cdev); 2596 2597 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2598 2599 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n"); 2600 } 2601 2602 static void qede_set_hw_err_flags(struct qede_dev *edev, 2603 enum qed_hw_err_type err_type) 2604 { 2605 unsigned long err_flags = 0; 2606 2607 switch (err_type) { 2608 case QED_HW_ERR_DMAE_FAIL: 2609 set_bit(QEDE_ERR_WARN, &err_flags); 2610 fallthrough; 2611 case QED_HW_ERR_MFW_RESP_FAIL: 2612 case QED_HW_ERR_HW_ATTN: 2613 case QED_HW_ERR_RAMROD_FAIL: 2614 case QED_HW_ERR_FW_ASSERT: 2615 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags); 2616 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags); 2617 break; 2618 2619 default: 2620 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type); 2621 break; 2622 } 2623 2624 edev->err_flags |= err_flags; 2625 } 2626 2627 static void qede_schedule_hw_err_handler(void *dev, 2628 enum qed_hw_err_type err_type) 2629 { 2630 struct qede_dev *edev = dev; 2631 2632 /* Fan failure cannot be masked by handling of another HW error or by a 2633 * concurrent recovery process. 2634 */ 2635 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 2636 edev->state == QEDE_STATE_RECOVERY) && 2637 err_type != QED_HW_ERR_FAN_FAIL) { 2638 DP_INFO(edev, 2639 "Avoid scheduling an error handling while another HW error is being handled\n"); 2640 return; 2641 } 2642 2643 if (err_type >= QED_HW_ERR_LAST) { 2644 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type); 2645 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2646 return; 2647 } 2648 2649 qede_set_hw_err_flags(edev, err_type); 2650 qede_atomic_hw_err_handler(edev); 2651 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 2652 schedule_delayed_work(&edev->sp_task, 0); 2653 2654 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type); 2655 } 2656 2657 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2658 { 2659 struct netdev_queue *netdev_txq; 2660 2661 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2662 if (netif_xmit_stopped(netdev_txq)) 2663 return true; 2664 2665 return false; 2666 } 2667 2668 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2669 { 2670 struct qede_dev *edev = dev; 2671 struct netdev_hw_addr *ha; 2672 int i; 2673 2674 if (edev->ndev->features & NETIF_F_IP_CSUM) 2675 data->feat_flags |= QED_TLV_IP_CSUM; 2676 if (edev->ndev->features & NETIF_F_TSO) 2677 data->feat_flags |= QED_TLV_LSO; 2678 2679 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2680 memset(data->mac[1], 0, ETH_ALEN); 2681 memset(data->mac[2], 0, ETH_ALEN); 2682 /* Copy the first two UC macs */ 2683 netif_addr_lock_bh(edev->ndev); 2684 i = 1; 2685 netdev_for_each_uc_addr(ha, edev->ndev) { 2686 ether_addr_copy(data->mac[i++], ha->addr); 2687 if (i == QED_TLV_MAC_COUNT) 2688 break; 2689 } 2690 2691 netif_addr_unlock_bh(edev->ndev); 2692 } 2693 2694 static void qede_get_eth_tlv_data(void *dev, void *data) 2695 { 2696 struct qed_mfw_tlv_eth *etlv = data; 2697 struct qede_dev *edev = dev; 2698 struct qede_fastpath *fp; 2699 int i; 2700 2701 etlv->lso_maxoff_size = 0XFFFF; 2702 etlv->lso_maxoff_size_set = true; 2703 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2704 etlv->lso_minseg_size_set = true; 2705 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2706 etlv->prom_mode_set = true; 2707 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2708 etlv->tx_descr_size_set = true; 2709 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2710 etlv->rx_descr_size_set = true; 2711 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2712 etlv->iov_offload_set = true; 2713 2714 /* Fill information regarding queues; Should be done under the qede 2715 * lock to guarantee those don't change beneath our feet. 2716 */ 2717 etlv->txqs_empty = true; 2718 etlv->rxqs_empty = true; 2719 etlv->num_txqs_full = 0; 2720 etlv->num_rxqs_full = 0; 2721 2722 __qede_lock(edev); 2723 for_each_queue(i) { 2724 fp = &edev->fp_array[i]; 2725 if (fp->type & QEDE_FASTPATH_TX) { 2726 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2727 2728 if (txq->sw_tx_cons != txq->sw_tx_prod) 2729 etlv->txqs_empty = false; 2730 if (qede_is_txq_full(edev, txq)) 2731 etlv->num_txqs_full++; 2732 } 2733 if (fp->type & QEDE_FASTPATH_RX) { 2734 if (qede_has_rx_work(fp->rxq)) 2735 etlv->rxqs_empty = false; 2736 2737 /* This one is a bit tricky; Firmware might stop 2738 * placing packets if ring is not yet full. 2739 * Give an approximation. 2740 */ 2741 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2742 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2743 RX_RING_SIZE - 100) 2744 etlv->num_rxqs_full++; 2745 } 2746 } 2747 __qede_unlock(edev); 2748 2749 etlv->txqs_empty_set = true; 2750 etlv->rxqs_empty_set = true; 2751 etlv->num_txqs_full_set = true; 2752 etlv->num_rxqs_full_set = true; 2753 } 2754 2755 /** 2756 * qede_io_error_detected - called when PCI error is detected 2757 * @pdev: Pointer to PCI device 2758 * @state: The current pci connection state 2759 * 2760 * This function is called after a PCI bus error affecting 2761 * this device has been detected. 2762 */ 2763 static pci_ers_result_t 2764 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2765 { 2766 struct net_device *dev = pci_get_drvdata(pdev); 2767 struct qede_dev *edev = netdev_priv(dev); 2768 2769 if (!edev) 2770 return PCI_ERS_RESULT_NONE; 2771 2772 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2773 2774 __qede_lock(edev); 2775 if (edev->state == QEDE_STATE_RECOVERY) { 2776 DP_NOTICE(edev, "Device already in the recovery state\n"); 2777 __qede_unlock(edev); 2778 return PCI_ERS_RESULT_NONE; 2779 } 2780 2781 /* PF handles the recovery of its VFs */ 2782 if (IS_VF(edev)) { 2783 DP_VERBOSE(edev, QED_MSG_IOV, 2784 "VF recovery is handled by its PF\n"); 2785 __qede_unlock(edev); 2786 return PCI_ERS_RESULT_RECOVERED; 2787 } 2788 2789 /* Close OS Tx */ 2790 netif_tx_disable(edev->ndev); 2791 netif_carrier_off(edev->ndev); 2792 2793 set_bit(QEDE_SP_AER, &edev->sp_flags); 2794 schedule_delayed_work(&edev->sp_task, 0); 2795 2796 __qede_unlock(edev); 2797 2798 return PCI_ERS_RESULT_CAN_RECOVER; 2799 } 2800