1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015 QLogic Corporation 3 * 4 * This software is available under the terms of the GNU General Public License 5 * (GPL) Version 2, available from the file COPYING in the main directory of 6 * this source tree. 7 */ 8 9 #include <linux/module.h> 10 #include <linux/pci.h> 11 #include <linux/version.h> 12 #include <linux/device.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/errno.h> 17 #include <linux/list.h> 18 #include <linux/string.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/interrupt.h> 21 #include <asm/byteorder.h> 22 #include <asm/param.h> 23 #include <linux/io.h> 24 #include <linux/netdev_features.h> 25 #include <linux/udp.h> 26 #include <linux/tcp.h> 27 #include <net/udp_tunnel.h> 28 #include <linux/ip.h> 29 #include <net/ipv6.h> 30 #include <net/tcp.h> 31 #include <linux/if_ether.h> 32 #include <linux/if_vlan.h> 33 #include <linux/pkt_sched.h> 34 #include <linux/ethtool.h> 35 #include <linux/in.h> 36 #include <linux/random.h> 37 #include <net/ip6_checksum.h> 38 #include <linux/bitops.h> 39 #include <linux/qed/qede_roce.h> 40 #include "qede.h" 41 42 static char version[] = 43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 44 45 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 46 MODULE_LICENSE("GPL"); 47 MODULE_VERSION(DRV_MODULE_VERSION); 48 49 static uint debug; 50 module_param(debug, uint, 0); 51 MODULE_PARM_DESC(debug, " Default debug msglevel"); 52 53 static const struct qed_eth_ops *qed_ops; 54 55 #define CHIP_NUM_57980S_40 0x1634 56 #define CHIP_NUM_57980S_10 0x1666 57 #define CHIP_NUM_57980S_MF 0x1636 58 #define CHIP_NUM_57980S_100 0x1644 59 #define CHIP_NUM_57980S_50 0x1654 60 #define CHIP_NUM_57980S_25 0x1656 61 #define CHIP_NUM_57980S_IOV 0x1664 62 63 #ifndef PCI_DEVICE_ID_NX2_57980E 64 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 65 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 66 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 67 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 68 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 69 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 70 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 71 #endif 72 73 enum qede_pci_private { 74 QEDE_PRIVATE_PF, 75 QEDE_PRIVATE_VF 76 }; 77 78 static const struct pci_device_id qede_pci_tbl[] = { 79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 85 #ifdef CONFIG_QED_SRIOV 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 87 #endif 88 { 0 } 89 }; 90 91 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 92 93 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 94 95 #define TX_TIMEOUT (5 * HZ) 96 97 static void qede_remove(struct pci_dev *pdev); 98 static int qede_alloc_rx_buffer(struct qede_dev *edev, 99 struct qede_rx_queue *rxq); 100 static void qede_link_update(void *dev, struct qed_link_output *link); 101 102 #ifdef CONFIG_QED_SRIOV 103 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 104 __be16 vlan_proto) 105 { 106 struct qede_dev *edev = netdev_priv(ndev); 107 108 if (vlan > 4095) { 109 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 110 return -EINVAL; 111 } 112 113 if (vlan_proto != htons(ETH_P_8021Q)) 114 return -EPROTONOSUPPORT; 115 116 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 117 vlan, vf); 118 119 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 120 } 121 122 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 123 { 124 struct qede_dev *edev = netdev_priv(ndev); 125 126 DP_VERBOSE(edev, QED_MSG_IOV, 127 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", 128 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); 129 130 if (!is_valid_ether_addr(mac)) { 131 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 132 return -EINVAL; 133 } 134 135 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 136 } 137 138 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 139 { 140 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 141 struct qed_dev_info *qed_info = &edev->dev_info.common; 142 int rc; 143 144 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 145 146 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 147 148 /* Enable/Disable Tx switching for PF */ 149 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 150 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) { 151 struct qed_update_vport_params params; 152 153 memset(¶ms, 0, sizeof(params)); 154 params.vport_id = 0; 155 params.update_tx_switching_flg = 1; 156 params.tx_switching_flg = num_vfs_param ? 1 : 0; 157 edev->ops->vport_update(edev->cdev, ¶ms); 158 } 159 160 return rc; 161 } 162 #endif 163 164 static struct pci_driver qede_pci_driver = { 165 .name = "qede", 166 .id_table = qede_pci_tbl, 167 .probe = qede_probe, 168 .remove = qede_remove, 169 #ifdef CONFIG_QED_SRIOV 170 .sriov_configure = qede_sriov_configure, 171 #endif 172 }; 173 174 static void qede_force_mac(void *dev, u8 *mac) 175 { 176 struct qede_dev *edev = dev; 177 178 ether_addr_copy(edev->ndev->dev_addr, mac); 179 ether_addr_copy(edev->primary_mac, mac); 180 } 181 182 static struct qed_eth_cb_ops qede_ll_ops = { 183 { 184 .link_update = qede_link_update, 185 }, 186 .force_mac = qede_force_mac, 187 }; 188 189 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 190 void *ptr) 191 { 192 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 193 struct ethtool_drvinfo drvinfo; 194 struct qede_dev *edev; 195 196 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 197 goto done; 198 199 /* Check whether this is a qede device */ 200 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 201 goto done; 202 203 memset(&drvinfo, 0, sizeof(drvinfo)); 204 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 205 if (strcmp(drvinfo.driver, "qede")) 206 goto done; 207 edev = netdev_priv(ndev); 208 209 switch (event) { 210 case NETDEV_CHANGENAME: 211 /* Notify qed of the name change */ 212 if (!edev->ops || !edev->ops->common) 213 goto done; 214 edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede"); 215 break; 216 case NETDEV_CHANGEADDR: 217 edev = netdev_priv(ndev); 218 qede_roce_event_changeaddr(edev); 219 break; 220 } 221 222 done: 223 return NOTIFY_DONE; 224 } 225 226 static struct notifier_block qede_netdev_notifier = { 227 .notifier_call = qede_netdev_event, 228 }; 229 230 static 231 int __init qede_init(void) 232 { 233 int ret; 234 235 pr_info("qede_init: %s\n", version); 236 237 qed_ops = qed_get_eth_ops(); 238 if (!qed_ops) { 239 pr_notice("Failed to get qed ethtool operations\n"); 240 return -EINVAL; 241 } 242 243 /* Must register notifier before pci ops, since we might miss 244 * interface rename after pci probe and netdev registeration. 245 */ 246 ret = register_netdevice_notifier(&qede_netdev_notifier); 247 if (ret) { 248 pr_notice("Failed to register netdevice_notifier\n"); 249 qed_put_eth_ops(); 250 return -EINVAL; 251 } 252 253 ret = pci_register_driver(&qede_pci_driver); 254 if (ret) { 255 pr_notice("Failed to register driver\n"); 256 unregister_netdevice_notifier(&qede_netdev_notifier); 257 qed_put_eth_ops(); 258 return -EINVAL; 259 } 260 261 return 0; 262 } 263 264 static void __exit qede_cleanup(void) 265 { 266 if (debug & QED_LOG_INFO_MASK) 267 pr_info("qede_cleanup called\n"); 268 269 unregister_netdevice_notifier(&qede_netdev_notifier); 270 pci_unregister_driver(&qede_pci_driver); 271 qed_put_eth_ops(); 272 } 273 274 module_init(qede_init); 275 module_exit(qede_cleanup); 276 277 /* ------------------------------------------------------------------------- 278 * START OF FAST-PATH 279 * ------------------------------------------------------------------------- 280 */ 281 282 /* Unmap the data and free skb */ 283 static int qede_free_tx_pkt(struct qede_dev *edev, 284 struct qede_tx_queue *txq, int *len) 285 { 286 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX; 287 struct sk_buff *skb = txq->sw_tx_ring[idx].skb; 288 struct eth_tx_1st_bd *first_bd; 289 struct eth_tx_bd *tx_data_bd; 290 int bds_consumed = 0; 291 int nbds; 292 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD; 293 int i, split_bd_len = 0; 294 295 if (unlikely(!skb)) { 296 DP_ERR(edev, 297 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n", 298 idx, txq->sw_tx_cons, txq->sw_tx_prod); 299 return -1; 300 } 301 302 *len = skb->len; 303 304 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 305 306 bds_consumed++; 307 308 nbds = first_bd->data.nbds; 309 310 if (data_split) { 311 struct eth_tx_bd *split = (struct eth_tx_bd *) 312 qed_chain_consume(&txq->tx_pbl); 313 split_bd_len = BD_UNMAP_LEN(split); 314 bds_consumed++; 315 } 316 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 317 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); 318 319 /* Unmap the data of the skb frags */ 320 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) { 321 tx_data_bd = (struct eth_tx_bd *) 322 qed_chain_consume(&txq->tx_pbl); 323 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd), 324 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); 325 } 326 327 while (bds_consumed++ < nbds) 328 qed_chain_consume(&txq->tx_pbl); 329 330 /* Free skb */ 331 dev_kfree_skb_any(skb); 332 txq->sw_tx_ring[idx].skb = NULL; 333 txq->sw_tx_ring[idx].flags = 0; 334 335 return 0; 336 } 337 338 /* Unmap the data and free skb when mapping failed during start_xmit */ 339 static void qede_free_failed_tx_pkt(struct qede_dev *edev, 340 struct qede_tx_queue *txq, 341 struct eth_tx_1st_bd *first_bd, 342 int nbd, bool data_split) 343 { 344 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; 345 struct sk_buff *skb = txq->sw_tx_ring[idx].skb; 346 struct eth_tx_bd *tx_data_bd; 347 int i, split_bd_len = 0; 348 349 /* Return prod to its position before this skb was handled */ 350 qed_chain_set_prod(&txq->tx_pbl, 351 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd); 352 353 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl); 354 355 if (data_split) { 356 struct eth_tx_bd *split = (struct eth_tx_bd *) 357 qed_chain_produce(&txq->tx_pbl); 358 split_bd_len = BD_UNMAP_LEN(split); 359 nbd--; 360 } 361 362 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 363 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); 364 365 /* Unmap the data of the skb frags */ 366 for (i = 0; i < nbd; i++) { 367 tx_data_bd = (struct eth_tx_bd *) 368 qed_chain_produce(&txq->tx_pbl); 369 if (tx_data_bd->nbytes) 370 dma_unmap_page(&edev->pdev->dev, 371 BD_UNMAP_ADDR(tx_data_bd), 372 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); 373 } 374 375 /* Return again prod to its position before this skb was handled */ 376 qed_chain_set_prod(&txq->tx_pbl, 377 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd); 378 379 /* Free skb */ 380 dev_kfree_skb_any(skb); 381 txq->sw_tx_ring[idx].skb = NULL; 382 txq->sw_tx_ring[idx].flags = 0; 383 } 384 385 static u32 qede_xmit_type(struct qede_dev *edev, 386 struct sk_buff *skb, int *ipv6_ext) 387 { 388 u32 rc = XMIT_L4_CSUM; 389 __be16 l3_proto; 390 391 if (skb->ip_summed != CHECKSUM_PARTIAL) 392 return XMIT_PLAIN; 393 394 l3_proto = vlan_get_protocol(skb); 395 if (l3_proto == htons(ETH_P_IPV6) && 396 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 397 *ipv6_ext = 1; 398 399 if (skb->encapsulation) 400 rc |= XMIT_ENC; 401 402 if (skb_is_gso(skb)) 403 rc |= XMIT_LSO; 404 405 return rc; 406 } 407 408 static void qede_set_params_for_ipv6_ext(struct sk_buff *skb, 409 struct eth_tx_2nd_bd *second_bd, 410 struct eth_tx_3rd_bd *third_bd) 411 { 412 u8 l4_proto; 413 u16 bd2_bits1 = 0, bd2_bits2 = 0; 414 415 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT); 416 417 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) & 418 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK) 419 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT; 420 421 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH << 422 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT); 423 424 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) 425 l4_proto = ipv6_hdr(skb)->nexthdr; 426 else 427 l4_proto = ip_hdr(skb)->protocol; 428 429 if (l4_proto == IPPROTO_UDP) 430 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT; 431 432 if (third_bd) 433 third_bd->data.bitfields |= 434 cpu_to_le16(((tcp_hdrlen(skb) / 4) & 435 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) << 436 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT); 437 438 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1); 439 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2); 440 } 441 442 static int map_frag_to_bd(struct qede_dev *edev, 443 skb_frag_t *frag, struct eth_tx_bd *bd) 444 { 445 dma_addr_t mapping; 446 447 /* Map skb non-linear frag data for DMA */ 448 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0, 449 skb_frag_size(frag), DMA_TO_DEVICE); 450 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 451 DP_NOTICE(edev, "Unable to map frag - dropping packet\n"); 452 return -ENOMEM; 453 } 454 455 /* Setup the data pointer of the frag data */ 456 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag)); 457 458 return 0; 459 } 460 461 static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt) 462 { 463 if (is_encap_pkt) 464 return (skb_inner_transport_header(skb) + 465 inner_tcp_hdrlen(skb) - skb->data); 466 else 467 return (skb_transport_header(skb) + 468 tcp_hdrlen(skb) - skb->data); 469 } 470 471 /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */ 472 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) 473 static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb, 474 u8 xmit_type) 475 { 476 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1; 477 478 if (xmit_type & XMIT_LSO) { 479 int hlen; 480 481 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC); 482 483 /* linear payload would require its own BD */ 484 if (skb_headlen(skb) > hlen) 485 allowed_frags--; 486 } 487 488 return (skb_shinfo(skb)->nr_frags > allowed_frags); 489 } 490 #endif 491 492 static inline void qede_update_tx_producer(struct qede_tx_queue *txq) 493 { 494 /* wmb makes sure that the BDs data is updated before updating the 495 * producer, otherwise FW may read old data from the BDs. 496 */ 497 wmb(); 498 barrier(); 499 writel(txq->tx_db.raw, txq->doorbell_addr); 500 501 /* mmiowb is needed to synchronize doorbell writes from more than one 502 * processor. It guarantees that the write arrives to the device before 503 * the queue lock is released and another start_xmit is called (possibly 504 * on another CPU). Without this barrier, the next doorbell can bypass 505 * this doorbell. This is applicable to IA64/Altix systems. 506 */ 507 mmiowb(); 508 } 509 510 /* Main transmit function */ 511 static netdev_tx_t qede_start_xmit(struct sk_buff *skb, 512 struct net_device *ndev) 513 { 514 struct qede_dev *edev = netdev_priv(ndev); 515 struct netdev_queue *netdev_txq; 516 struct qede_tx_queue *txq; 517 struct eth_tx_1st_bd *first_bd; 518 struct eth_tx_2nd_bd *second_bd = NULL; 519 struct eth_tx_3rd_bd *third_bd = NULL; 520 struct eth_tx_bd *tx_data_bd = NULL; 521 u16 txq_index; 522 u8 nbd = 0; 523 dma_addr_t mapping; 524 int rc, frag_idx = 0, ipv6_ext = 0; 525 u8 xmit_type; 526 u16 idx; 527 u16 hlen; 528 bool data_split = false; 529 530 /* Get tx-queue context and netdev index */ 531 txq_index = skb_get_queue_mapping(skb); 532 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev)); 533 txq = QEDE_TX_QUEUE(edev, txq_index); 534 netdev_txq = netdev_get_tx_queue(ndev, txq_index); 535 536 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1)); 537 538 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext); 539 540 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) 541 if (qede_pkt_req_lin(edev, skb, xmit_type)) { 542 if (skb_linearize(skb)) { 543 DP_NOTICE(edev, 544 "SKB linearization failed - silently dropping this SKB\n"); 545 dev_kfree_skb_any(skb); 546 return NETDEV_TX_OK; 547 } 548 } 549 #endif 550 551 /* Fill the entry in the SW ring and the BDs in the FW ring */ 552 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; 553 txq->sw_tx_ring[idx].skb = skb; 554 first_bd = (struct eth_tx_1st_bd *) 555 qed_chain_produce(&txq->tx_pbl); 556 memset(first_bd, 0, sizeof(*first_bd)); 557 first_bd->data.bd_flags.bitfields = 558 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 559 560 /* Map skb linear data for DMA and set in the first BD */ 561 mapping = dma_map_single(&edev->pdev->dev, skb->data, 562 skb_headlen(skb), DMA_TO_DEVICE); 563 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 564 DP_NOTICE(edev, "SKB mapping failed\n"); 565 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false); 566 qede_update_tx_producer(txq); 567 return NETDEV_TX_OK; 568 } 569 nbd++; 570 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 571 572 /* In case there is IPv6 with extension headers or LSO we need 2nd and 573 * 3rd BDs. 574 */ 575 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) { 576 second_bd = (struct eth_tx_2nd_bd *) 577 qed_chain_produce(&txq->tx_pbl); 578 memset(second_bd, 0, sizeof(*second_bd)); 579 580 nbd++; 581 third_bd = (struct eth_tx_3rd_bd *) 582 qed_chain_produce(&txq->tx_pbl); 583 memset(third_bd, 0, sizeof(*third_bd)); 584 585 nbd++; 586 /* We need to fill in additional data in second_bd... */ 587 tx_data_bd = (struct eth_tx_bd *)second_bd; 588 } 589 590 if (skb_vlan_tag_present(skb)) { 591 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb)); 592 first_bd->data.bd_flags.bitfields |= 593 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT; 594 } 595 596 /* Fill the parsing flags & params according to the requested offload */ 597 if (xmit_type & XMIT_L4_CSUM) { 598 /* We don't re-calculate IP checksum as it is already done by 599 * the upper stack 600 */ 601 first_bd->data.bd_flags.bitfields |= 602 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT; 603 604 if (xmit_type & XMIT_ENC) { 605 first_bd->data.bd_flags.bitfields |= 606 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; 607 first_bd->data.bitfields |= 608 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT; 609 } 610 611 /* Legacy FW had flipped behavior in regard to this bit - 612 * I.e., needed to set to prevent FW from touching encapsulated 613 * packets when it didn't need to. 614 */ 615 if (unlikely(txq->is_legacy)) 616 first_bd->data.bitfields ^= 617 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT; 618 619 /* If the packet is IPv6 with extension header, indicate that 620 * to FW and pass few params, since the device cracker doesn't 621 * support parsing IPv6 with extension header/s. 622 */ 623 if (unlikely(ipv6_ext)) 624 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd); 625 } 626 627 if (xmit_type & XMIT_LSO) { 628 first_bd->data.bd_flags.bitfields |= 629 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT); 630 third_bd->data.lso_mss = 631 cpu_to_le16(skb_shinfo(skb)->gso_size); 632 633 if (unlikely(xmit_type & XMIT_ENC)) { 634 first_bd->data.bd_flags.bitfields |= 635 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT; 636 hlen = qede_get_skb_hlen(skb, true); 637 } else { 638 first_bd->data.bd_flags.bitfields |= 639 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; 640 hlen = qede_get_skb_hlen(skb, false); 641 } 642 643 /* @@@TBD - if will not be removed need to check */ 644 third_bd->data.bitfields |= 645 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT)); 646 647 /* Make life easier for FW guys who can't deal with header and 648 * data on same BD. If we need to split, use the second bd... 649 */ 650 if (unlikely(skb_headlen(skb) > hlen)) { 651 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 652 "TSO split header size is %d (%x:%x)\n", 653 first_bd->nbytes, first_bd->addr.hi, 654 first_bd->addr.lo); 655 656 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi), 657 le32_to_cpu(first_bd->addr.lo)) + 658 hlen; 659 660 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping, 661 le16_to_cpu(first_bd->nbytes) - 662 hlen); 663 664 /* this marks the BD as one that has no 665 * individual mapping 666 */ 667 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD; 668 669 first_bd->nbytes = cpu_to_le16(hlen); 670 671 tx_data_bd = (struct eth_tx_bd *)third_bd; 672 data_split = true; 673 } 674 } else { 675 first_bd->data.bitfields |= 676 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) << 677 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 678 } 679 680 /* Handle fragmented skb */ 681 /* special handle for frags inside 2nd and 3rd bds.. */ 682 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) { 683 rc = map_frag_to_bd(edev, 684 &skb_shinfo(skb)->frags[frag_idx], 685 tx_data_bd); 686 if (rc) { 687 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, 688 data_split); 689 qede_update_tx_producer(txq); 690 return NETDEV_TX_OK; 691 } 692 693 if (tx_data_bd == (struct eth_tx_bd *)second_bd) 694 tx_data_bd = (struct eth_tx_bd *)third_bd; 695 else 696 tx_data_bd = NULL; 697 698 frag_idx++; 699 } 700 701 /* map last frags into 4th, 5th .... */ 702 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) { 703 tx_data_bd = (struct eth_tx_bd *) 704 qed_chain_produce(&txq->tx_pbl); 705 706 memset(tx_data_bd, 0, sizeof(*tx_data_bd)); 707 708 rc = map_frag_to_bd(edev, 709 &skb_shinfo(skb)->frags[frag_idx], 710 tx_data_bd); 711 if (rc) { 712 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, 713 data_split); 714 qede_update_tx_producer(txq); 715 return NETDEV_TX_OK; 716 } 717 } 718 719 /* update the first BD with the actual num BDs */ 720 first_bd->data.nbds = nbd; 721 722 netdev_tx_sent_queue(netdev_txq, skb->len); 723 724 skb_tx_timestamp(skb); 725 726 /* Advance packet producer only before sending the packet since mapping 727 * of pages may fail. 728 */ 729 txq->sw_tx_prod++; 730 731 /* 'next page' entries are counted in the producer value */ 732 txq->tx_db.data.bd_prod = 733 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl)); 734 735 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq)) 736 qede_update_tx_producer(txq); 737 738 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl) 739 < (MAX_SKB_FRAGS + 1))) { 740 if (skb->xmit_more) 741 qede_update_tx_producer(txq); 742 743 netif_tx_stop_queue(netdev_txq); 744 txq->stopped_cnt++; 745 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 746 "Stop queue was called\n"); 747 /* paired memory barrier is in qede_tx_int(), we have to keep 748 * ordering of set_bit() in netif_tx_stop_queue() and read of 749 * fp->bd_tx_cons 750 */ 751 smp_mb(); 752 753 if (qed_chain_get_elem_left(&txq->tx_pbl) 754 >= (MAX_SKB_FRAGS + 1) && 755 (edev->state == QEDE_STATE_OPEN)) { 756 netif_tx_wake_queue(netdev_txq); 757 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 758 "Wake queue was called\n"); 759 } 760 } 761 762 return NETDEV_TX_OK; 763 } 764 765 int qede_txq_has_work(struct qede_tx_queue *txq) 766 { 767 u16 hw_bd_cons; 768 769 /* Tell compiler that consumer and producer can change */ 770 barrier(); 771 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); 772 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1) 773 return 0; 774 775 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl); 776 } 777 778 static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq) 779 { 780 struct netdev_queue *netdev_txq; 781 u16 hw_bd_cons; 782 unsigned int pkts_compl = 0, bytes_compl = 0; 783 int rc; 784 785 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index); 786 787 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); 788 barrier(); 789 790 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) { 791 int len = 0; 792 793 rc = qede_free_tx_pkt(edev, txq, &len); 794 if (rc) { 795 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n", 796 hw_bd_cons, 797 qed_chain_get_cons_idx(&txq->tx_pbl)); 798 break; 799 } 800 801 bytes_compl += len; 802 pkts_compl++; 803 txq->sw_tx_cons++; 804 txq->xmit_pkts++; 805 } 806 807 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 808 809 /* Need to make the tx_bd_cons update visible to start_xmit() 810 * before checking for netif_tx_queue_stopped(). Without the 811 * memory barrier, there is a small possibility that 812 * start_xmit() will miss it and cause the queue to be stopped 813 * forever. 814 * On the other hand we need an rmb() here to ensure the proper 815 * ordering of bit testing in the following 816 * netif_tx_queue_stopped(txq) call. 817 */ 818 smp_mb(); 819 820 if (unlikely(netif_tx_queue_stopped(netdev_txq))) { 821 /* Taking tx_lock is needed to prevent reenabling the queue 822 * while it's empty. This could have happen if rx_action() gets 823 * suspended in qede_tx_int() after the condition before 824 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()): 825 * 826 * stops the queue->sees fresh tx_bd_cons->releases the queue-> 827 * sends some packets consuming the whole queue again-> 828 * stops the queue 829 */ 830 831 __netif_tx_lock(netdev_txq, smp_processor_id()); 832 833 if ((netif_tx_queue_stopped(netdev_txq)) && 834 (edev->state == QEDE_STATE_OPEN) && 835 (qed_chain_get_elem_left(&txq->tx_pbl) 836 >= (MAX_SKB_FRAGS + 1))) { 837 netif_tx_wake_queue(netdev_txq); 838 DP_VERBOSE(edev, NETIF_MSG_TX_DONE, 839 "Wake queue was called\n"); 840 } 841 842 __netif_tx_unlock(netdev_txq); 843 } 844 845 return 0; 846 } 847 848 bool qede_has_rx_work(struct qede_rx_queue *rxq) 849 { 850 u16 hw_comp_cons, sw_comp_cons; 851 852 /* Tell compiler that status block fields can change */ 853 barrier(); 854 855 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 856 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 857 858 return hw_comp_cons != sw_comp_cons; 859 } 860 861 static bool qede_has_tx_work(struct qede_fastpath *fp) 862 { 863 u8 tc; 864 865 for (tc = 0; tc < fp->edev->num_tc; tc++) 866 if (qede_txq_has_work(&fp->txqs[tc])) 867 return true; 868 return false; 869 } 870 871 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq) 872 { 873 qed_chain_consume(&rxq->rx_bd_ring); 874 rxq->sw_rx_cons++; 875 } 876 877 /* This function reuses the buffer(from an offset) from 878 * consumer index to producer index in the bd ring 879 */ 880 static inline void qede_reuse_page(struct qede_dev *edev, 881 struct qede_rx_queue *rxq, 882 struct sw_rx_data *curr_cons) 883 { 884 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); 885 struct sw_rx_data *curr_prod; 886 dma_addr_t new_mapping; 887 888 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 889 *curr_prod = *curr_cons; 890 891 new_mapping = curr_prod->mapping + curr_prod->page_offset; 892 893 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping)); 894 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping)); 895 896 rxq->sw_rx_prod++; 897 curr_cons->data = NULL; 898 } 899 900 /* In case of allocation failures reuse buffers 901 * from consumer index to produce buffers for firmware 902 */ 903 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, 904 struct qede_dev *edev, u8 count) 905 { 906 struct sw_rx_data *curr_cons; 907 908 for (; count > 0; count--) { 909 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; 910 qede_reuse_page(edev, rxq, curr_cons); 911 qede_rx_bd_ring_consume(rxq); 912 } 913 } 914 915 static inline int qede_realloc_rx_buffer(struct qede_dev *edev, 916 struct qede_rx_queue *rxq, 917 struct sw_rx_data *curr_cons) 918 { 919 /* Move to the next segment in the page */ 920 curr_cons->page_offset += rxq->rx_buf_seg_size; 921 922 if (curr_cons->page_offset == PAGE_SIZE) { 923 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { 924 /* Since we failed to allocate new buffer 925 * current buffer can be used again. 926 */ 927 curr_cons->page_offset -= rxq->rx_buf_seg_size; 928 929 return -ENOMEM; 930 } 931 932 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping, 933 PAGE_SIZE, DMA_FROM_DEVICE); 934 } else { 935 /* Increment refcount of the page as we don't want 936 * network stack to take the ownership of the page 937 * which can be recycled multiple times by the driver. 938 */ 939 page_ref_inc(curr_cons->data); 940 qede_reuse_page(edev, rxq, curr_cons); 941 } 942 943 return 0; 944 } 945 946 void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq) 947 { 948 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring); 949 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring); 950 struct eth_rx_prod_data rx_prods = {0}; 951 952 /* Update producers */ 953 rx_prods.bd_prod = cpu_to_le16(bd_prod); 954 rx_prods.cqe_prod = cpu_to_le16(cqe_prod); 955 956 /* Make sure that the BD and SGE data is updated before updating the 957 * producers since FW might read the BD/SGE right after the producer 958 * is updated. 959 */ 960 wmb(); 961 962 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods), 963 (u32 *)&rx_prods); 964 965 /* mmiowb is needed to synchronize doorbell writes from more than one 966 * processor. It guarantees that the write arrives to the device before 967 * the napi lock is released and another qede_poll is called (possibly 968 * on another CPU). Without this barrier, the next doorbell can bypass 969 * this doorbell. This is applicable to IA64/Altix systems. 970 */ 971 mmiowb(); 972 } 973 974 static u32 qede_get_rxhash(struct qede_dev *edev, 975 u8 bitfields, 976 __le32 rss_hash, enum pkt_hash_types *rxhash_type) 977 { 978 enum rss_hash_type htype; 979 980 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE); 981 982 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) { 983 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) || 984 (htype == RSS_HASH_TYPE_IPV6)) ? 985 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4; 986 return le32_to_cpu(rss_hash); 987 } 988 *rxhash_type = PKT_HASH_TYPE_NONE; 989 return 0; 990 } 991 992 static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag) 993 { 994 skb_checksum_none_assert(skb); 995 996 if (csum_flag & QEDE_CSUM_UNNECESSARY) 997 skb->ip_summed = CHECKSUM_UNNECESSARY; 998 999 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) 1000 skb->csum_level = 1; 1001 } 1002 1003 static inline void qede_skb_receive(struct qede_dev *edev, 1004 struct qede_fastpath *fp, 1005 struct sk_buff *skb, u16 vlan_tag) 1006 { 1007 if (vlan_tag) 1008 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); 1009 1010 napi_gro_receive(&fp->napi, skb); 1011 } 1012 1013 static void qede_set_gro_params(struct qede_dev *edev, 1014 struct sk_buff *skb, 1015 struct eth_fast_path_rx_tpa_start_cqe *cqe) 1016 { 1017 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags); 1018 1019 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) & 1020 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2) 1021 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6; 1022 else 1023 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; 1024 1025 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) - 1026 cqe->header_len; 1027 } 1028 1029 static int qede_fill_frag_skb(struct qede_dev *edev, 1030 struct qede_rx_queue *rxq, 1031 u8 tpa_agg_index, u16 len_on_bd) 1032 { 1033 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons & 1034 NUM_RX_BDS_MAX]; 1035 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index]; 1036 struct sk_buff *skb = tpa_info->skb; 1037 1038 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) 1039 goto out; 1040 1041 /* Add one frag and update the appropriate fields in the skb */ 1042 skb_fill_page_desc(skb, tpa_info->frag_id++, 1043 current_bd->data, current_bd->page_offset, 1044 len_on_bd); 1045 1046 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) { 1047 /* Incr page ref count to reuse on allocation failure 1048 * so that it doesn't get freed while freeing SKB. 1049 */ 1050 page_ref_inc(current_bd->data); 1051 goto out; 1052 } 1053 1054 qed_chain_consume(&rxq->rx_bd_ring); 1055 rxq->sw_rx_cons++; 1056 1057 skb->data_len += len_on_bd; 1058 skb->truesize += rxq->rx_buf_seg_size; 1059 skb->len += len_on_bd; 1060 1061 return 0; 1062 1063 out: 1064 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1065 qede_recycle_rx_bd_ring(rxq, edev, 1); 1066 return -ENOMEM; 1067 } 1068 1069 static void qede_tpa_start(struct qede_dev *edev, 1070 struct qede_rx_queue *rxq, 1071 struct eth_fast_path_rx_tpa_start_cqe *cqe) 1072 { 1073 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; 1074 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring); 1075 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); 1076 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 1077 dma_addr_t mapping = tpa_info->replace_buf_mapping; 1078 struct sw_rx_data *sw_rx_data_cons; 1079 struct sw_rx_data *sw_rx_data_prod; 1080 enum pkt_hash_types rxhash_type; 1081 u32 rxhash; 1082 1083 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; 1084 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 1085 1086 /* Use pre-allocated replacement buffer - we can't release the agg. 1087 * start until its over and we don't want to risk allocation failing 1088 * here, so re-allocate when aggregation will be over. 1089 */ 1090 sw_rx_data_prod->mapping = replace_buf->mapping; 1091 1092 sw_rx_data_prod->data = replace_buf->data; 1093 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping)); 1094 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping)); 1095 sw_rx_data_prod->page_offset = replace_buf->page_offset; 1096 1097 rxq->sw_rx_prod++; 1098 1099 /* move partial skb from cons to pool (don't unmap yet) 1100 * save mapping, incase we drop the packet later on. 1101 */ 1102 tpa_info->start_buf = *sw_rx_data_cons; 1103 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi), 1104 le32_to_cpu(rx_bd_cons->addr.lo)); 1105 1106 tpa_info->start_buf_mapping = mapping; 1107 rxq->sw_rx_cons++; 1108 1109 /* set tpa state to start only if we are able to allocate skb 1110 * for this aggregation, otherwise mark as error and aggregation will 1111 * be dropped 1112 */ 1113 tpa_info->skb = netdev_alloc_skb(edev->ndev, 1114 le16_to_cpu(cqe->len_on_first_bd)); 1115 if (unlikely(!tpa_info->skb)) { 1116 DP_NOTICE(edev, "Failed to allocate SKB for gro\n"); 1117 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1118 goto cons_buf; 1119 } 1120 1121 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd)); 1122 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe)); 1123 1124 /* Start filling in the aggregation info */ 1125 tpa_info->frag_id = 0; 1126 tpa_info->agg_state = QEDE_AGG_STATE_START; 1127 1128 rxhash = qede_get_rxhash(edev, cqe->bitfields, 1129 cqe->rss_hash, &rxhash_type); 1130 skb_set_hash(tpa_info->skb, rxhash, rxhash_type); 1131 if ((le16_to_cpu(cqe->pars_flags.flags) >> 1132 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) & 1133 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK) 1134 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag); 1135 else 1136 tpa_info->vlan_tag = 0; 1137 1138 /* This is needed in order to enable forwarding support */ 1139 qede_set_gro_params(edev, tpa_info->skb, cqe); 1140 1141 cons_buf: /* We still need to handle bd_len_list to consume buffers */ 1142 if (likely(cqe->ext_bd_len_list[0])) 1143 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1144 le16_to_cpu(cqe->ext_bd_len_list[0])); 1145 1146 if (unlikely(cqe->ext_bd_len_list[1])) { 1147 DP_ERR(edev, 1148 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n"); 1149 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1150 } 1151 } 1152 1153 #ifdef CONFIG_INET 1154 static void qede_gro_ip_csum(struct sk_buff *skb) 1155 { 1156 const struct iphdr *iph = ip_hdr(skb); 1157 struct tcphdr *th; 1158 1159 skb_set_transport_header(skb, sizeof(struct iphdr)); 1160 th = tcp_hdr(skb); 1161 1162 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb), 1163 iph->saddr, iph->daddr, 0); 1164 1165 tcp_gro_complete(skb); 1166 } 1167 1168 static void qede_gro_ipv6_csum(struct sk_buff *skb) 1169 { 1170 struct ipv6hdr *iph = ipv6_hdr(skb); 1171 struct tcphdr *th; 1172 1173 skb_set_transport_header(skb, sizeof(struct ipv6hdr)); 1174 th = tcp_hdr(skb); 1175 1176 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb), 1177 &iph->saddr, &iph->daddr, 0); 1178 tcp_gro_complete(skb); 1179 } 1180 #endif 1181 1182 static void qede_gro_receive(struct qede_dev *edev, 1183 struct qede_fastpath *fp, 1184 struct sk_buff *skb, 1185 u16 vlan_tag) 1186 { 1187 /* FW can send a single MTU sized packet from gro flow 1188 * due to aggregation timeout/last segment etc. which 1189 * is not expected to be a gro packet. If a skb has zero 1190 * frags then simply push it in the stack as non gso skb. 1191 */ 1192 if (unlikely(!skb->data_len)) { 1193 skb_shinfo(skb)->gso_type = 0; 1194 skb_shinfo(skb)->gso_size = 0; 1195 goto send_skb; 1196 } 1197 1198 #ifdef CONFIG_INET 1199 if (skb_shinfo(skb)->gso_size) { 1200 skb_set_network_header(skb, 0); 1201 1202 switch (skb->protocol) { 1203 case htons(ETH_P_IP): 1204 qede_gro_ip_csum(skb); 1205 break; 1206 case htons(ETH_P_IPV6): 1207 qede_gro_ipv6_csum(skb); 1208 break; 1209 default: 1210 DP_ERR(edev, 1211 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n", 1212 ntohs(skb->protocol)); 1213 } 1214 } 1215 #endif 1216 1217 send_skb: 1218 skb_record_rx_queue(skb, fp->rxq->rxq_id); 1219 qede_skb_receive(edev, fp, skb, vlan_tag); 1220 } 1221 1222 static inline void qede_tpa_cont(struct qede_dev *edev, 1223 struct qede_rx_queue *rxq, 1224 struct eth_fast_path_rx_tpa_cont_cqe *cqe) 1225 { 1226 int i; 1227 1228 for (i = 0; cqe->len_list[i]; i++) 1229 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1230 le16_to_cpu(cqe->len_list[i])); 1231 1232 if (unlikely(i > 1)) 1233 DP_ERR(edev, 1234 "Strange - TPA cont with more than a single len_list entry\n"); 1235 } 1236 1237 static void qede_tpa_end(struct qede_dev *edev, 1238 struct qede_fastpath *fp, 1239 struct eth_fast_path_rx_tpa_end_cqe *cqe) 1240 { 1241 struct qede_rx_queue *rxq = fp->rxq; 1242 struct qede_agg_info *tpa_info; 1243 struct sk_buff *skb; 1244 int i; 1245 1246 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; 1247 skb = tpa_info->skb; 1248 1249 for (i = 0; cqe->len_list[i]; i++) 1250 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1251 le16_to_cpu(cqe->len_list[i])); 1252 if (unlikely(i > 1)) 1253 DP_ERR(edev, 1254 "Strange - TPA emd with more than a single len_list entry\n"); 1255 1256 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) 1257 goto err; 1258 1259 /* Sanity */ 1260 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1)) 1261 DP_ERR(edev, 1262 "Strange - TPA had %02x BDs, but SKB has only %d frags\n", 1263 cqe->num_of_bds, tpa_info->frag_id); 1264 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len))) 1265 DP_ERR(edev, 1266 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n", 1267 le16_to_cpu(cqe->total_packet_len), skb->len); 1268 1269 memcpy(skb->data, 1270 page_address(tpa_info->start_buf.data) + 1271 tpa_info->start_cqe.placement_offset + 1272 tpa_info->start_buf.page_offset, 1273 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd)); 1274 1275 /* Recycle [mapped] start buffer for the next replacement */ 1276 tpa_info->replace_buf = tpa_info->start_buf; 1277 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; 1278 1279 /* Finalize the SKB */ 1280 skb->protocol = eth_type_trans(skb, edev->ndev); 1281 skb->ip_summed = CHECKSUM_UNNECESSARY; 1282 1283 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count 1284 * to skb_shinfo(skb)->gso_segs 1285 */ 1286 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs); 1287 1288 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag); 1289 1290 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 1291 1292 return; 1293 err: 1294 /* The BD starting the aggregation is still mapped; Re-use it for 1295 * future aggregations [as replacement buffer] 1296 */ 1297 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf, 1298 sizeof(struct sw_rx_data)); 1299 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; 1300 tpa_info->start_buf.data = NULL; 1301 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 1302 dev_kfree_skb_any(tpa_info->skb); 1303 tpa_info->skb = NULL; 1304 } 1305 1306 static bool qede_tunn_exist(u16 flag) 1307 { 1308 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK << 1309 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT)); 1310 } 1311 1312 static u8 qede_check_tunn_csum(u16 flag) 1313 { 1314 u16 csum_flag = 0; 1315 u8 tcsum = 0; 1316 1317 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK << 1318 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT)) 1319 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK << 1320 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT; 1321 1322 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << 1323 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { 1324 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << 1325 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; 1326 tcsum = QEDE_TUNN_CSUM_UNNECESSARY; 1327 } 1328 1329 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK << 1330 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT | 1331 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << 1332 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; 1333 1334 if (csum_flag & flag) 1335 return QEDE_CSUM_ERROR; 1336 1337 return QEDE_CSUM_UNNECESSARY | tcsum; 1338 } 1339 1340 static u8 qede_check_notunn_csum(u16 flag) 1341 { 1342 u16 csum_flag = 0; 1343 u8 csum = 0; 1344 1345 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << 1346 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { 1347 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << 1348 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; 1349 csum = QEDE_CSUM_UNNECESSARY; 1350 } 1351 1352 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << 1353 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; 1354 1355 if (csum_flag & flag) 1356 return QEDE_CSUM_ERROR; 1357 1358 return csum; 1359 } 1360 1361 static u8 qede_check_csum(u16 flag) 1362 { 1363 if (!qede_tunn_exist(flag)) 1364 return qede_check_notunn_csum(flag); 1365 else 1366 return qede_check_tunn_csum(flag); 1367 } 1368 1369 static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe, 1370 u16 flag) 1371 { 1372 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags; 1373 1374 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK << 1375 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) || 1376 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK << 1377 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT))) 1378 return true; 1379 1380 return false; 1381 } 1382 1383 static int qede_rx_int(struct qede_fastpath *fp, int budget) 1384 { 1385 struct qede_dev *edev = fp->edev; 1386 struct qede_rx_queue *rxq = fp->rxq; 1387 1388 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag; 1389 int rx_pkt = 0; 1390 u8 csum_flag; 1391 1392 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1393 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1394 1395 /* Memory barrier to prevent the CPU from doing speculative reads of CQE 1396 * / BD in the while-loop before reading hw_comp_cons. If the CQE is 1397 * read before it is written by FW, then FW writes CQE and SB, and then 1398 * the CPU reads the hw_comp_cons, it will use an old CQE. 1399 */ 1400 rmb(); 1401 1402 /* Loop to complete all indicated BDs */ 1403 while (sw_comp_cons != hw_comp_cons) { 1404 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1405 enum pkt_hash_types rxhash_type; 1406 enum eth_rx_cqe_type cqe_type; 1407 struct sw_rx_data *sw_rx_data; 1408 union eth_rx_cqe *cqe; 1409 struct sk_buff *skb; 1410 struct page *data; 1411 __le16 flags; 1412 u16 len, pad; 1413 u32 rx_hash; 1414 1415 /* Get the CQE from the completion ring */ 1416 cqe = (union eth_rx_cqe *) 1417 qed_chain_consume(&rxq->rx_comp_ring); 1418 cqe_type = cqe->fast_path_regular.type; 1419 1420 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) { 1421 edev->ops->eth_cqe_completion( 1422 edev->cdev, fp->id, 1423 (struct eth_slow_path_rx_cqe *)cqe); 1424 goto next_cqe; 1425 } 1426 1427 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) { 1428 switch (cqe_type) { 1429 case ETH_RX_CQE_TYPE_TPA_START: 1430 qede_tpa_start(edev, rxq, 1431 &cqe->fast_path_tpa_start); 1432 goto next_cqe; 1433 case ETH_RX_CQE_TYPE_TPA_CONT: 1434 qede_tpa_cont(edev, rxq, 1435 &cqe->fast_path_tpa_cont); 1436 goto next_cqe; 1437 case ETH_RX_CQE_TYPE_TPA_END: 1438 qede_tpa_end(edev, fp, 1439 &cqe->fast_path_tpa_end); 1440 goto next_rx_only; 1441 default: 1442 break; 1443 } 1444 } 1445 1446 /* Get the data from the SW ring */ 1447 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1448 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1449 data = sw_rx_data->data; 1450 1451 fp_cqe = &cqe->fast_path_regular; 1452 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1453 pad = fp_cqe->placement_offset; 1454 flags = cqe->fast_path_regular.pars_flags.flags; 1455 1456 /* If this is an error packet then drop it */ 1457 parse_flag = le16_to_cpu(flags); 1458 1459 csum_flag = qede_check_csum(parse_flag); 1460 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) { 1461 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular, 1462 parse_flag)) { 1463 rxq->rx_ip_frags++; 1464 goto alloc_skb; 1465 } 1466 1467 DP_NOTICE(edev, 1468 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n", 1469 sw_comp_cons, parse_flag); 1470 rxq->rx_hw_errors++; 1471 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); 1472 goto next_cqe; 1473 } 1474 1475 alloc_skb: 1476 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE); 1477 if (unlikely(!skb)) { 1478 DP_NOTICE(edev, 1479 "skb allocation failed, dropping incoming packet\n"); 1480 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); 1481 rxq->rx_alloc_errors++; 1482 goto next_cqe; 1483 } 1484 1485 /* Copy data into SKB */ 1486 if (len + pad <= edev->rx_copybreak) { 1487 memcpy(skb_put(skb, len), 1488 page_address(data) + pad + 1489 sw_rx_data->page_offset, len); 1490 qede_reuse_page(edev, rxq, sw_rx_data); 1491 } else { 1492 struct skb_frag_struct *frag; 1493 unsigned int pull_len; 1494 unsigned char *va; 1495 1496 frag = &skb_shinfo(skb)->frags[0]; 1497 1498 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data, 1499 pad + sw_rx_data->page_offset, 1500 len, rxq->rx_buf_seg_size); 1501 1502 va = skb_frag_address(frag); 1503 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE); 1504 1505 /* Align the pull_len to optimize memcpy */ 1506 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long))); 1507 1508 skb_frag_size_sub(frag, pull_len); 1509 frag->page_offset += pull_len; 1510 skb->data_len -= pull_len; 1511 skb->tail += pull_len; 1512 1513 if (unlikely(qede_realloc_rx_buffer(edev, rxq, 1514 sw_rx_data))) { 1515 DP_ERR(edev, "Failed to allocate rx buffer\n"); 1516 /* Incr page ref count to reuse on allocation 1517 * failure so that it doesn't get freed while 1518 * freeing SKB. 1519 */ 1520 1521 page_ref_inc(sw_rx_data->data); 1522 rxq->rx_alloc_errors++; 1523 qede_recycle_rx_bd_ring(rxq, edev, 1524 fp_cqe->bd_num); 1525 dev_kfree_skb_any(skb); 1526 goto next_cqe; 1527 } 1528 } 1529 1530 qede_rx_bd_ring_consume(rxq); 1531 1532 if (fp_cqe->bd_num != 1) { 1533 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len); 1534 u8 num_frags; 1535 1536 pkt_len -= len; 1537 1538 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0; 1539 num_frags--) { 1540 u16 cur_size = pkt_len > rxq->rx_buf_size ? 1541 rxq->rx_buf_size : pkt_len; 1542 if (unlikely(!cur_size)) { 1543 DP_ERR(edev, 1544 "Still got %d BDs for mapping jumbo, but length became 0\n", 1545 num_frags); 1546 qede_recycle_rx_bd_ring(rxq, edev, 1547 num_frags); 1548 dev_kfree_skb_any(skb); 1549 goto next_cqe; 1550 } 1551 1552 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { 1553 qede_recycle_rx_bd_ring(rxq, edev, 1554 num_frags); 1555 dev_kfree_skb_any(skb); 1556 goto next_cqe; 1557 } 1558 1559 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1560 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1561 qede_rx_bd_ring_consume(rxq); 1562 1563 dma_unmap_page(&edev->pdev->dev, 1564 sw_rx_data->mapping, 1565 PAGE_SIZE, DMA_FROM_DEVICE); 1566 1567 skb_fill_page_desc(skb, 1568 skb_shinfo(skb)->nr_frags++, 1569 sw_rx_data->data, 0, 1570 cur_size); 1571 1572 skb->truesize += PAGE_SIZE; 1573 skb->data_len += cur_size; 1574 skb->len += cur_size; 1575 pkt_len -= cur_size; 1576 } 1577 1578 if (unlikely(pkt_len)) 1579 DP_ERR(edev, 1580 "Mapped all BDs of jumbo, but still have %d bytes\n", 1581 pkt_len); 1582 } 1583 1584 skb->protocol = eth_type_trans(skb, edev->ndev); 1585 1586 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields, 1587 fp_cqe->rss_hash, &rxhash_type); 1588 1589 skb_set_hash(skb, rx_hash, rxhash_type); 1590 1591 qede_set_skb_csum(skb, csum_flag); 1592 1593 skb_record_rx_queue(skb, fp->rxq->rxq_id); 1594 1595 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag)); 1596 next_rx_only: 1597 rx_pkt++; 1598 1599 next_cqe: /* don't consume bd rx buffer */ 1600 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1601 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1602 /* CR TPA - revisit how to handle budget in TPA perhaps 1603 * increase on "end" 1604 */ 1605 if (rx_pkt == budget) 1606 break; 1607 } /* repeat while sw_comp_cons != hw_comp_cons... */ 1608 1609 /* Update producers */ 1610 qede_update_rx_prod(edev, rxq); 1611 1612 rxq->rcv_pkts += rx_pkt; 1613 1614 return rx_pkt; 1615 } 1616 1617 static int qede_poll(struct napi_struct *napi, int budget) 1618 { 1619 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath, 1620 napi); 1621 struct qede_dev *edev = fp->edev; 1622 int rx_work_done = 0; 1623 u8 tc; 1624 1625 for (tc = 0; tc < edev->num_tc; tc++) 1626 if (likely(fp->type & QEDE_FASTPATH_TX) && 1627 qede_txq_has_work(&fp->txqs[tc])) 1628 qede_tx_int(edev, &fp->txqs[tc]); 1629 1630 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) && 1631 qede_has_rx_work(fp->rxq)) ? 1632 qede_rx_int(fp, budget) : 0; 1633 if (rx_work_done < budget) { 1634 qed_sb_update_sb_idx(fp->sb_info); 1635 /* *_has_*_work() reads the status block, 1636 * thus we need to ensure that status block indices 1637 * have been actually read (qed_sb_update_sb_idx) 1638 * prior to this check (*_has_*_work) so that 1639 * we won't write the "newer" value of the status block 1640 * to HW (if there was a DMA right after 1641 * qede_has_rx_work and if there is no rmb, the memory 1642 * reading (qed_sb_update_sb_idx) may be postponed 1643 * to right before *_ack_sb). In this case there 1644 * will never be another interrupt until there is 1645 * another update of the status block, while there 1646 * is still unhandled work. 1647 */ 1648 rmb(); 1649 1650 /* Fall out from the NAPI loop if needed */ 1651 if (!((likely(fp->type & QEDE_FASTPATH_RX) && 1652 qede_has_rx_work(fp->rxq)) || 1653 (likely(fp->type & QEDE_FASTPATH_TX) && 1654 qede_has_tx_work(fp)))) { 1655 napi_complete(napi); 1656 1657 /* Update and reenable interrupts */ 1658 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1659 1 /*update*/); 1660 } else { 1661 rx_work_done = budget; 1662 } 1663 } 1664 1665 return rx_work_done; 1666 } 1667 1668 static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie) 1669 { 1670 struct qede_fastpath *fp = fp_cookie; 1671 1672 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/); 1673 1674 napi_schedule_irqoff(&fp->napi); 1675 return IRQ_HANDLED; 1676 } 1677 1678 /* ------------------------------------------------------------------------- 1679 * END OF FAST-PATH 1680 * ------------------------------------------------------------------------- 1681 */ 1682 1683 static int qede_open(struct net_device *ndev); 1684 static int qede_close(struct net_device *ndev); 1685 static int qede_set_mac_addr(struct net_device *ndev, void *p); 1686 static void qede_set_rx_mode(struct net_device *ndev); 1687 static void qede_config_rx_mode(struct net_device *ndev); 1688 1689 static int qede_set_ucast_rx_mac(struct qede_dev *edev, 1690 enum qed_filter_xcast_params_type opcode, 1691 unsigned char mac[ETH_ALEN]) 1692 { 1693 struct qed_filter_params filter_cmd; 1694 1695 memset(&filter_cmd, 0, sizeof(filter_cmd)); 1696 filter_cmd.type = QED_FILTER_TYPE_UCAST; 1697 filter_cmd.filter.ucast.type = opcode; 1698 filter_cmd.filter.ucast.mac_valid = 1; 1699 ether_addr_copy(filter_cmd.filter.ucast.mac, mac); 1700 1701 return edev->ops->filter_config(edev->cdev, &filter_cmd); 1702 } 1703 1704 static int qede_set_ucast_rx_vlan(struct qede_dev *edev, 1705 enum qed_filter_xcast_params_type opcode, 1706 u16 vid) 1707 { 1708 struct qed_filter_params filter_cmd; 1709 1710 memset(&filter_cmd, 0, sizeof(filter_cmd)); 1711 filter_cmd.type = QED_FILTER_TYPE_UCAST; 1712 filter_cmd.filter.ucast.type = opcode; 1713 filter_cmd.filter.ucast.vlan_valid = 1; 1714 filter_cmd.filter.ucast.vlan = vid; 1715 1716 return edev->ops->filter_config(edev->cdev, &filter_cmd); 1717 } 1718 1719 void qede_fill_by_demand_stats(struct qede_dev *edev) 1720 { 1721 struct qed_eth_stats stats; 1722 1723 edev->ops->get_vport_stats(edev->cdev, &stats); 1724 edev->stats.no_buff_discards = stats.no_buff_discards; 1725 edev->stats.packet_too_big_discard = stats.packet_too_big_discard; 1726 edev->stats.ttl0_discard = stats.ttl0_discard; 1727 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes; 1728 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes; 1729 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes; 1730 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts; 1731 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts; 1732 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts; 1733 edev->stats.mftag_filter_discards = stats.mftag_filter_discards; 1734 edev->stats.mac_filter_discards = stats.mac_filter_discards; 1735 1736 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes; 1737 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes; 1738 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes; 1739 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts; 1740 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts; 1741 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts; 1742 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts; 1743 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts; 1744 edev->stats.coalesced_events = stats.tpa_coalesced_events; 1745 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num; 1746 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts; 1747 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes; 1748 1749 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets; 1750 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets; 1751 edev->stats.rx_128_to_255_byte_packets = 1752 stats.rx_128_to_255_byte_packets; 1753 edev->stats.rx_256_to_511_byte_packets = 1754 stats.rx_256_to_511_byte_packets; 1755 edev->stats.rx_512_to_1023_byte_packets = 1756 stats.rx_512_to_1023_byte_packets; 1757 edev->stats.rx_1024_to_1518_byte_packets = 1758 stats.rx_1024_to_1518_byte_packets; 1759 edev->stats.rx_1519_to_1522_byte_packets = 1760 stats.rx_1519_to_1522_byte_packets; 1761 edev->stats.rx_1519_to_2047_byte_packets = 1762 stats.rx_1519_to_2047_byte_packets; 1763 edev->stats.rx_2048_to_4095_byte_packets = 1764 stats.rx_2048_to_4095_byte_packets; 1765 edev->stats.rx_4096_to_9216_byte_packets = 1766 stats.rx_4096_to_9216_byte_packets; 1767 edev->stats.rx_9217_to_16383_byte_packets = 1768 stats.rx_9217_to_16383_byte_packets; 1769 edev->stats.rx_crc_errors = stats.rx_crc_errors; 1770 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames; 1771 edev->stats.rx_pause_frames = stats.rx_pause_frames; 1772 edev->stats.rx_pfc_frames = stats.rx_pfc_frames; 1773 edev->stats.rx_align_errors = stats.rx_align_errors; 1774 edev->stats.rx_carrier_errors = stats.rx_carrier_errors; 1775 edev->stats.rx_oversize_packets = stats.rx_oversize_packets; 1776 edev->stats.rx_jabbers = stats.rx_jabbers; 1777 edev->stats.rx_undersize_packets = stats.rx_undersize_packets; 1778 edev->stats.rx_fragments = stats.rx_fragments; 1779 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets; 1780 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets; 1781 edev->stats.tx_128_to_255_byte_packets = 1782 stats.tx_128_to_255_byte_packets; 1783 edev->stats.tx_256_to_511_byte_packets = 1784 stats.tx_256_to_511_byte_packets; 1785 edev->stats.tx_512_to_1023_byte_packets = 1786 stats.tx_512_to_1023_byte_packets; 1787 edev->stats.tx_1024_to_1518_byte_packets = 1788 stats.tx_1024_to_1518_byte_packets; 1789 edev->stats.tx_1519_to_2047_byte_packets = 1790 stats.tx_1519_to_2047_byte_packets; 1791 edev->stats.tx_2048_to_4095_byte_packets = 1792 stats.tx_2048_to_4095_byte_packets; 1793 edev->stats.tx_4096_to_9216_byte_packets = 1794 stats.tx_4096_to_9216_byte_packets; 1795 edev->stats.tx_9217_to_16383_byte_packets = 1796 stats.tx_9217_to_16383_byte_packets; 1797 edev->stats.tx_pause_frames = stats.tx_pause_frames; 1798 edev->stats.tx_pfc_frames = stats.tx_pfc_frames; 1799 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count; 1800 edev->stats.tx_total_collisions = stats.tx_total_collisions; 1801 edev->stats.brb_truncates = stats.brb_truncates; 1802 edev->stats.brb_discards = stats.brb_discards; 1803 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames; 1804 } 1805 1806 static 1807 struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev, 1808 struct rtnl_link_stats64 *stats) 1809 { 1810 struct qede_dev *edev = netdev_priv(dev); 1811 1812 qede_fill_by_demand_stats(edev); 1813 1814 stats->rx_packets = edev->stats.rx_ucast_pkts + 1815 edev->stats.rx_mcast_pkts + 1816 edev->stats.rx_bcast_pkts; 1817 stats->tx_packets = edev->stats.tx_ucast_pkts + 1818 edev->stats.tx_mcast_pkts + 1819 edev->stats.tx_bcast_pkts; 1820 1821 stats->rx_bytes = edev->stats.rx_ucast_bytes + 1822 edev->stats.rx_mcast_bytes + 1823 edev->stats.rx_bcast_bytes; 1824 1825 stats->tx_bytes = edev->stats.tx_ucast_bytes + 1826 edev->stats.tx_mcast_bytes + 1827 edev->stats.tx_bcast_bytes; 1828 1829 stats->tx_errors = edev->stats.tx_err_drop_pkts; 1830 stats->multicast = edev->stats.rx_mcast_pkts + 1831 edev->stats.rx_bcast_pkts; 1832 1833 stats->rx_fifo_errors = edev->stats.no_buff_discards; 1834 1835 stats->collisions = edev->stats.tx_total_collisions; 1836 stats->rx_crc_errors = edev->stats.rx_crc_errors; 1837 stats->rx_frame_errors = edev->stats.rx_align_errors; 1838 1839 return stats; 1840 } 1841 1842 #ifdef CONFIG_QED_SRIOV 1843 static int qede_get_vf_config(struct net_device *dev, int vfidx, 1844 struct ifla_vf_info *ivi) 1845 { 1846 struct qede_dev *edev = netdev_priv(dev); 1847 1848 if (!edev->ops) 1849 return -EINVAL; 1850 1851 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 1852 } 1853 1854 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 1855 int min_tx_rate, int max_tx_rate) 1856 { 1857 struct qede_dev *edev = netdev_priv(dev); 1858 1859 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 1860 max_tx_rate); 1861 } 1862 1863 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 1864 { 1865 struct qede_dev *edev = netdev_priv(dev); 1866 1867 if (!edev->ops) 1868 return -EINVAL; 1869 1870 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 1871 } 1872 1873 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 1874 int link_state) 1875 { 1876 struct qede_dev *edev = netdev_priv(dev); 1877 1878 if (!edev->ops) 1879 return -EINVAL; 1880 1881 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 1882 } 1883 #endif 1884 1885 static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action) 1886 { 1887 struct qed_update_vport_params params; 1888 int rc; 1889 1890 /* Proceed only if action actually needs to be performed */ 1891 if (edev->accept_any_vlan == action) 1892 return; 1893 1894 memset(¶ms, 0, sizeof(params)); 1895 1896 params.vport_id = 0; 1897 params.accept_any_vlan = action; 1898 params.update_accept_any_vlan_flg = 1; 1899 1900 rc = edev->ops->vport_update(edev->cdev, ¶ms); 1901 if (rc) { 1902 DP_ERR(edev, "Failed to %s accept-any-vlan\n", 1903 action ? "enable" : "disable"); 1904 } else { 1905 DP_INFO(edev, "%s accept-any-vlan\n", 1906 action ? "enabled" : "disabled"); 1907 edev->accept_any_vlan = action; 1908 } 1909 } 1910 1911 static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) 1912 { 1913 struct qede_dev *edev = netdev_priv(dev); 1914 struct qede_vlan *vlan, *tmp; 1915 int rc; 1916 1917 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid); 1918 1919 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL); 1920 if (!vlan) { 1921 DP_INFO(edev, "Failed to allocate struct for vlan\n"); 1922 return -ENOMEM; 1923 } 1924 INIT_LIST_HEAD(&vlan->list); 1925 vlan->vid = vid; 1926 vlan->configured = false; 1927 1928 /* Verify vlan isn't already configured */ 1929 list_for_each_entry(tmp, &edev->vlan_list, list) { 1930 if (tmp->vid == vlan->vid) { 1931 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1932 "vlan already configured\n"); 1933 kfree(vlan); 1934 return -EEXIST; 1935 } 1936 } 1937 1938 /* If interface is down, cache this VLAN ID and return */ 1939 if (edev->state != QEDE_STATE_OPEN) { 1940 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1941 "Interface is down, VLAN %d will be configured when interface is up\n", 1942 vid); 1943 if (vid != 0) 1944 edev->non_configured_vlans++; 1945 list_add(&vlan->list, &edev->vlan_list); 1946 1947 return 0; 1948 } 1949 1950 /* Check for the filter limit. 1951 * Note - vlan0 has a reserved filter and can be added without 1952 * worrying about quota 1953 */ 1954 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) || 1955 (vlan->vid == 0)) { 1956 rc = qede_set_ucast_rx_vlan(edev, 1957 QED_FILTER_XCAST_TYPE_ADD, 1958 vlan->vid); 1959 if (rc) { 1960 DP_ERR(edev, "Failed to configure VLAN %d\n", 1961 vlan->vid); 1962 kfree(vlan); 1963 return -EINVAL; 1964 } 1965 vlan->configured = true; 1966 1967 /* vlan0 filter isn't consuming out of our quota */ 1968 if (vlan->vid != 0) 1969 edev->configured_vlans++; 1970 } else { 1971 /* Out of quota; Activate accept-any-VLAN mode */ 1972 if (!edev->non_configured_vlans) 1973 qede_config_accept_any_vlan(edev, true); 1974 1975 edev->non_configured_vlans++; 1976 } 1977 1978 list_add(&vlan->list, &edev->vlan_list); 1979 1980 return 0; 1981 } 1982 1983 static void qede_del_vlan_from_list(struct qede_dev *edev, 1984 struct qede_vlan *vlan) 1985 { 1986 /* vlan0 filter isn't consuming out of our quota */ 1987 if (vlan->vid != 0) { 1988 if (vlan->configured) 1989 edev->configured_vlans--; 1990 else 1991 edev->non_configured_vlans--; 1992 } 1993 1994 list_del(&vlan->list); 1995 kfree(vlan); 1996 } 1997 1998 static int qede_configure_vlan_filters(struct qede_dev *edev) 1999 { 2000 int rc = 0, real_rc = 0, accept_any_vlan = 0; 2001 struct qed_dev_eth_info *dev_info; 2002 struct qede_vlan *vlan = NULL; 2003 2004 if (list_empty(&edev->vlan_list)) 2005 return 0; 2006 2007 dev_info = &edev->dev_info; 2008 2009 /* Configure non-configured vlans */ 2010 list_for_each_entry(vlan, &edev->vlan_list, list) { 2011 if (vlan->configured) 2012 continue; 2013 2014 /* We have used all our credits, now enable accept_any_vlan */ 2015 if ((vlan->vid != 0) && 2016 (edev->configured_vlans == dev_info->num_vlan_filters)) { 2017 accept_any_vlan = 1; 2018 continue; 2019 } 2020 2021 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid); 2022 2023 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD, 2024 vlan->vid); 2025 if (rc) { 2026 DP_ERR(edev, "Failed to configure VLAN %u\n", 2027 vlan->vid); 2028 real_rc = rc; 2029 continue; 2030 } 2031 2032 vlan->configured = true; 2033 /* vlan0 filter doesn't consume our VLAN filter's quota */ 2034 if (vlan->vid != 0) { 2035 edev->non_configured_vlans--; 2036 edev->configured_vlans++; 2037 } 2038 } 2039 2040 /* enable accept_any_vlan mode if we have more VLANs than credits, 2041 * or remove accept_any_vlan mode if we've actually removed 2042 * a non-configured vlan, and all remaining vlans are truly configured. 2043 */ 2044 2045 if (accept_any_vlan) 2046 qede_config_accept_any_vlan(edev, true); 2047 else if (!edev->non_configured_vlans) 2048 qede_config_accept_any_vlan(edev, false); 2049 2050 return real_rc; 2051 } 2052 2053 static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid) 2054 { 2055 struct qede_dev *edev = netdev_priv(dev); 2056 struct qede_vlan *vlan = NULL; 2057 int rc; 2058 2059 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid); 2060 2061 /* Find whether entry exists */ 2062 list_for_each_entry(vlan, &edev->vlan_list, list) 2063 if (vlan->vid == vid) 2064 break; 2065 2066 if (!vlan || (vlan->vid != vid)) { 2067 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 2068 "Vlan isn't configured\n"); 2069 return 0; 2070 } 2071 2072 if (edev->state != QEDE_STATE_OPEN) { 2073 /* As interface is already down, we don't have a VPORT 2074 * instance to remove vlan filter. So just update vlan list 2075 */ 2076 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 2077 "Interface is down, removing VLAN from list only\n"); 2078 qede_del_vlan_from_list(edev, vlan); 2079 return 0; 2080 } 2081 2082 /* Remove vlan */ 2083 if (vlan->configured) { 2084 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, 2085 vid); 2086 if (rc) { 2087 DP_ERR(edev, "Failed to remove VLAN %d\n", vid); 2088 return -EINVAL; 2089 } 2090 } 2091 2092 qede_del_vlan_from_list(edev, vlan); 2093 2094 /* We have removed a VLAN - try to see if we can 2095 * configure non-configured VLAN from the list. 2096 */ 2097 rc = qede_configure_vlan_filters(edev); 2098 2099 return rc; 2100 } 2101 2102 static void qede_vlan_mark_nonconfigured(struct qede_dev *edev) 2103 { 2104 struct qede_vlan *vlan = NULL; 2105 2106 if (list_empty(&edev->vlan_list)) 2107 return; 2108 2109 list_for_each_entry(vlan, &edev->vlan_list, list) { 2110 if (!vlan->configured) 2111 continue; 2112 2113 vlan->configured = false; 2114 2115 /* vlan0 filter isn't consuming out of our quota */ 2116 if (vlan->vid != 0) { 2117 edev->non_configured_vlans++; 2118 edev->configured_vlans--; 2119 } 2120 2121 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 2122 "marked vlan %d as non-configured\n", vlan->vid); 2123 } 2124 2125 edev->accept_any_vlan = false; 2126 } 2127 2128 static int qede_set_features(struct net_device *dev, netdev_features_t features) 2129 { 2130 struct qede_dev *edev = netdev_priv(dev); 2131 netdev_features_t changes = features ^ dev->features; 2132 bool need_reload = false; 2133 2134 /* No action needed if hardware GRO is disabled during driver load */ 2135 if (changes & NETIF_F_GRO) { 2136 if (dev->features & NETIF_F_GRO) 2137 need_reload = !edev->gro_disable; 2138 else 2139 need_reload = edev->gro_disable; 2140 } 2141 2142 if (need_reload && netif_running(edev->ndev)) { 2143 dev->features = features; 2144 qede_reload(edev, NULL, NULL); 2145 return 1; 2146 } 2147 2148 return 0; 2149 } 2150 2151 static void qede_udp_tunnel_add(struct net_device *dev, 2152 struct udp_tunnel_info *ti) 2153 { 2154 struct qede_dev *edev = netdev_priv(dev); 2155 u16 t_port = ntohs(ti->port); 2156 2157 switch (ti->type) { 2158 case UDP_TUNNEL_TYPE_VXLAN: 2159 if (edev->vxlan_dst_port) 2160 return; 2161 2162 edev->vxlan_dst_port = t_port; 2163 2164 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n", 2165 t_port); 2166 2167 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); 2168 break; 2169 case UDP_TUNNEL_TYPE_GENEVE: 2170 if (edev->geneve_dst_port) 2171 return; 2172 2173 edev->geneve_dst_port = t_port; 2174 2175 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n", 2176 t_port); 2177 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); 2178 break; 2179 default: 2180 return; 2181 } 2182 2183 schedule_delayed_work(&edev->sp_task, 0); 2184 } 2185 2186 static void qede_udp_tunnel_del(struct net_device *dev, 2187 struct udp_tunnel_info *ti) 2188 { 2189 struct qede_dev *edev = netdev_priv(dev); 2190 u16 t_port = ntohs(ti->port); 2191 2192 switch (ti->type) { 2193 case UDP_TUNNEL_TYPE_VXLAN: 2194 if (t_port != edev->vxlan_dst_port) 2195 return; 2196 2197 edev->vxlan_dst_port = 0; 2198 2199 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n", 2200 t_port); 2201 2202 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); 2203 break; 2204 case UDP_TUNNEL_TYPE_GENEVE: 2205 if (t_port != edev->geneve_dst_port) 2206 return; 2207 2208 edev->geneve_dst_port = 0; 2209 2210 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n", 2211 t_port); 2212 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); 2213 break; 2214 default: 2215 return; 2216 } 2217 2218 schedule_delayed_work(&edev->sp_task, 0); 2219 } 2220 2221 static const struct net_device_ops qede_netdev_ops = { 2222 .ndo_open = qede_open, 2223 .ndo_stop = qede_close, 2224 .ndo_start_xmit = qede_start_xmit, 2225 .ndo_set_rx_mode = qede_set_rx_mode, 2226 .ndo_set_mac_address = qede_set_mac_addr, 2227 .ndo_validate_addr = eth_validate_addr, 2228 .ndo_change_mtu = qede_change_mtu, 2229 #ifdef CONFIG_QED_SRIOV 2230 .ndo_set_vf_mac = qede_set_vf_mac, 2231 .ndo_set_vf_vlan = qede_set_vf_vlan, 2232 #endif 2233 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 2234 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 2235 .ndo_set_features = qede_set_features, 2236 .ndo_get_stats64 = qede_get_stats64, 2237 #ifdef CONFIG_QED_SRIOV 2238 .ndo_set_vf_link_state = qede_set_vf_link_state, 2239 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 2240 .ndo_get_vf_config = qede_get_vf_config, 2241 .ndo_set_vf_rate = qede_set_vf_rate, 2242 #endif 2243 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 2244 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 2245 }; 2246 2247 /* ------------------------------------------------------------------------- 2248 * START OF PROBE / REMOVE 2249 * ------------------------------------------------------------------------- 2250 */ 2251 2252 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 2253 struct pci_dev *pdev, 2254 struct qed_dev_eth_info *info, 2255 u32 dp_module, u8 dp_level) 2256 { 2257 struct net_device *ndev; 2258 struct qede_dev *edev; 2259 2260 ndev = alloc_etherdev_mqs(sizeof(*edev), 2261 info->num_queues, info->num_queues); 2262 if (!ndev) { 2263 pr_err("etherdev allocation failed\n"); 2264 return NULL; 2265 } 2266 2267 edev = netdev_priv(ndev); 2268 edev->ndev = ndev; 2269 edev->cdev = cdev; 2270 edev->pdev = pdev; 2271 edev->dp_module = dp_module; 2272 edev->dp_level = dp_level; 2273 edev->ops = qed_ops; 2274 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 2275 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 2276 2277 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 2278 info->num_queues, info->num_queues); 2279 2280 SET_NETDEV_DEV(ndev, &pdev->dev); 2281 2282 memset(&edev->stats, 0, sizeof(edev->stats)); 2283 memcpy(&edev->dev_info, info, sizeof(*info)); 2284 2285 edev->num_tc = edev->dev_info.num_tc; 2286 2287 INIT_LIST_HEAD(&edev->vlan_list); 2288 2289 return edev; 2290 } 2291 2292 static void qede_init_ndev(struct qede_dev *edev) 2293 { 2294 struct net_device *ndev = edev->ndev; 2295 struct pci_dev *pdev = edev->pdev; 2296 u32 hw_features; 2297 2298 pci_set_drvdata(pdev, ndev); 2299 2300 ndev->mem_start = edev->dev_info.common.pci_mem_start; 2301 ndev->base_addr = ndev->mem_start; 2302 ndev->mem_end = edev->dev_info.common.pci_mem_end; 2303 ndev->irq = edev->dev_info.common.pci_irq; 2304 2305 ndev->watchdog_timeo = TX_TIMEOUT; 2306 2307 ndev->netdev_ops = &qede_netdev_ops; 2308 2309 qede_set_ethtool_ops(ndev); 2310 2311 /* user-changeble features */ 2312 hw_features = NETIF_F_GRO | NETIF_F_SG | 2313 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2314 NETIF_F_TSO | NETIF_F_TSO6; 2315 2316 /* Encap features*/ 2317 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL | 2318 NETIF_F_TSO_ECN; 2319 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2320 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN | 2321 NETIF_F_TSO6 | NETIF_F_GSO_GRE | 2322 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM; 2323 2324 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 2325 NETIF_F_HIGHDMA; 2326 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 2327 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 2328 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 2329 2330 ndev->hw_features = hw_features; 2331 2332 /* Set network device HW mac */ 2333 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 2334 } 2335 2336 /* This function converts from 32b param to two params of level and module 2337 * Input 32b decoding: 2338 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 2339 * 'happy' flow, e.g. memory allocation failed. 2340 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 2341 * and provide important parameters. 2342 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 2343 * module. VERBOSE prints are for tracking the specific flow in low level. 2344 * 2345 * Notice that the level should be that of the lowest required logs. 2346 */ 2347 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 2348 { 2349 *p_dp_level = QED_LEVEL_NOTICE; 2350 *p_dp_module = 0; 2351 2352 if (debug & QED_LOG_VERBOSE_MASK) { 2353 *p_dp_level = QED_LEVEL_VERBOSE; 2354 *p_dp_module = (debug & 0x3FFFFFFF); 2355 } else if (debug & QED_LOG_INFO_MASK) { 2356 *p_dp_level = QED_LEVEL_INFO; 2357 } else if (debug & QED_LOG_NOTICE_MASK) { 2358 *p_dp_level = QED_LEVEL_NOTICE; 2359 } 2360 } 2361 2362 static void qede_free_fp_array(struct qede_dev *edev) 2363 { 2364 if (edev->fp_array) { 2365 struct qede_fastpath *fp; 2366 int i; 2367 2368 for_each_queue(i) { 2369 fp = &edev->fp_array[i]; 2370 2371 kfree(fp->sb_info); 2372 kfree(fp->rxq); 2373 kfree(fp->txqs); 2374 } 2375 kfree(edev->fp_array); 2376 } 2377 2378 edev->num_queues = 0; 2379 edev->fp_num_tx = 0; 2380 edev->fp_num_rx = 0; 2381 } 2382 2383 static int qede_alloc_fp_array(struct qede_dev *edev) 2384 { 2385 u8 fp_combined, fp_rx = edev->fp_num_rx; 2386 struct qede_fastpath *fp; 2387 int i; 2388 2389 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 2390 sizeof(*edev->fp_array), GFP_KERNEL); 2391 if (!edev->fp_array) { 2392 DP_NOTICE(edev, "fp array allocation failed\n"); 2393 goto err; 2394 } 2395 2396 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 2397 2398 /* Allocate the FP elements for Rx queues followed by combined and then 2399 * the Tx. This ordering should be maintained so that the respective 2400 * queues (Rx or Tx) will be together in the fastpath array and the 2401 * associated ids will be sequential. 2402 */ 2403 for_each_queue(i) { 2404 fp = &edev->fp_array[i]; 2405 2406 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL); 2407 if (!fp->sb_info) { 2408 DP_NOTICE(edev, "sb info struct allocation failed\n"); 2409 goto err; 2410 } 2411 2412 if (fp_rx) { 2413 fp->type = QEDE_FASTPATH_RX; 2414 fp_rx--; 2415 } else if (fp_combined) { 2416 fp->type = QEDE_FASTPATH_COMBINED; 2417 fp_combined--; 2418 } else { 2419 fp->type = QEDE_FASTPATH_TX; 2420 } 2421 2422 if (fp->type & QEDE_FASTPATH_TX) { 2423 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), 2424 GFP_KERNEL); 2425 if (!fp->txqs) { 2426 DP_NOTICE(edev, 2427 "TXQ array allocation failed\n"); 2428 goto err; 2429 } 2430 } 2431 2432 if (fp->type & QEDE_FASTPATH_RX) { 2433 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL); 2434 if (!fp->rxq) { 2435 DP_NOTICE(edev, 2436 "RXQ struct allocation failed\n"); 2437 goto err; 2438 } 2439 } 2440 } 2441 2442 return 0; 2443 err: 2444 qede_free_fp_array(edev); 2445 return -ENOMEM; 2446 } 2447 2448 static void qede_sp_task(struct work_struct *work) 2449 { 2450 struct qede_dev *edev = container_of(work, struct qede_dev, 2451 sp_task.work); 2452 struct qed_dev *cdev = edev->cdev; 2453 2454 mutex_lock(&edev->qede_lock); 2455 2456 if (edev->state == QEDE_STATE_OPEN) { 2457 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 2458 qede_config_rx_mode(edev->ndev); 2459 } 2460 2461 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) { 2462 struct qed_tunn_params tunn_params; 2463 2464 memset(&tunn_params, 0, sizeof(tunn_params)); 2465 tunn_params.update_vxlan_port = 1; 2466 tunn_params.vxlan_port = edev->vxlan_dst_port; 2467 qed_ops->tunn_config(cdev, &tunn_params); 2468 } 2469 2470 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) { 2471 struct qed_tunn_params tunn_params; 2472 2473 memset(&tunn_params, 0, sizeof(tunn_params)); 2474 tunn_params.update_geneve_port = 1; 2475 tunn_params.geneve_port = edev->geneve_dst_port; 2476 qed_ops->tunn_config(cdev, &tunn_params); 2477 } 2478 2479 mutex_unlock(&edev->qede_lock); 2480 } 2481 2482 static void qede_update_pf_params(struct qed_dev *cdev) 2483 { 2484 struct qed_pf_params pf_params; 2485 2486 /* 64 rx + 64 tx */ 2487 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 2488 pf_params.eth_pf_params.num_cons = 128; 2489 qed_ops->common->update_pf_params(cdev, &pf_params); 2490 } 2491 2492 enum qede_probe_mode { 2493 QEDE_PROBE_NORMAL, 2494 }; 2495 2496 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 2497 bool is_vf, enum qede_probe_mode mode) 2498 { 2499 struct qed_probe_params probe_params; 2500 struct qed_slowpath_params sp_params; 2501 struct qed_dev_eth_info dev_info; 2502 struct qede_dev *edev; 2503 struct qed_dev *cdev; 2504 int rc; 2505 2506 if (unlikely(dp_level & QED_LEVEL_INFO)) 2507 pr_notice("Starting qede probe\n"); 2508 2509 memset(&probe_params, 0, sizeof(probe_params)); 2510 probe_params.protocol = QED_PROTOCOL_ETH; 2511 probe_params.dp_module = dp_module; 2512 probe_params.dp_level = dp_level; 2513 probe_params.is_vf = is_vf; 2514 cdev = qed_ops->common->probe(pdev, &probe_params); 2515 if (!cdev) { 2516 rc = -ENODEV; 2517 goto err0; 2518 } 2519 2520 qede_update_pf_params(cdev); 2521 2522 /* Start the Slowpath-process */ 2523 memset(&sp_params, 0, sizeof(sp_params)); 2524 sp_params.int_mode = QED_INT_MODE_MSIX; 2525 sp_params.drv_major = QEDE_MAJOR_VERSION; 2526 sp_params.drv_minor = QEDE_MINOR_VERSION; 2527 sp_params.drv_rev = QEDE_REVISION_VERSION; 2528 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 2529 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 2530 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 2531 if (rc) { 2532 pr_notice("Cannot start slowpath\n"); 2533 goto err1; 2534 } 2535 2536 /* Learn information crucial for qede to progress */ 2537 rc = qed_ops->fill_dev_info(cdev, &dev_info); 2538 if (rc) 2539 goto err2; 2540 2541 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 2542 dp_level); 2543 if (!edev) { 2544 rc = -ENOMEM; 2545 goto err2; 2546 } 2547 2548 if (is_vf) 2549 edev->flags |= QEDE_FLAG_IS_VF; 2550 2551 qede_init_ndev(edev); 2552 2553 rc = qede_roce_dev_add(edev); 2554 if (rc) 2555 goto err3; 2556 2557 rc = register_netdev(edev->ndev); 2558 if (rc) { 2559 DP_NOTICE(edev, "Cannot register net-device\n"); 2560 goto err4; 2561 } 2562 2563 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION); 2564 2565 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 2566 2567 #ifdef CONFIG_DCB 2568 if (!IS_VF(edev)) 2569 qede_set_dcbnl_ops(edev->ndev); 2570 #endif 2571 2572 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 2573 mutex_init(&edev->qede_lock); 2574 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 2575 2576 DP_INFO(edev, "Ending successfully qede probe\n"); 2577 2578 return 0; 2579 2580 err4: 2581 qede_roce_dev_remove(edev); 2582 err3: 2583 free_netdev(edev->ndev); 2584 err2: 2585 qed_ops->common->slowpath_stop(cdev); 2586 err1: 2587 qed_ops->common->remove(cdev); 2588 err0: 2589 return rc; 2590 } 2591 2592 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 2593 { 2594 bool is_vf = false; 2595 u32 dp_module = 0; 2596 u8 dp_level = 0; 2597 2598 switch ((enum qede_pci_private)id->driver_data) { 2599 case QEDE_PRIVATE_VF: 2600 if (debug & QED_LOG_VERBOSE_MASK) 2601 dev_err(&pdev->dev, "Probing a VF\n"); 2602 is_vf = true; 2603 break; 2604 default: 2605 if (debug & QED_LOG_VERBOSE_MASK) 2606 dev_err(&pdev->dev, "Probing a PF\n"); 2607 } 2608 2609 qede_config_debug(debug, &dp_module, &dp_level); 2610 2611 return __qede_probe(pdev, dp_module, dp_level, is_vf, 2612 QEDE_PROBE_NORMAL); 2613 } 2614 2615 enum qede_remove_mode { 2616 QEDE_REMOVE_NORMAL, 2617 }; 2618 2619 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 2620 { 2621 struct net_device *ndev = pci_get_drvdata(pdev); 2622 struct qede_dev *edev = netdev_priv(ndev); 2623 struct qed_dev *cdev = edev->cdev; 2624 2625 DP_INFO(edev, "Starting qede_remove\n"); 2626 2627 cancel_delayed_work_sync(&edev->sp_task); 2628 2629 unregister_netdev(ndev); 2630 2631 qede_roce_dev_remove(edev); 2632 2633 edev->ops->common->set_power_state(cdev, PCI_D0); 2634 2635 pci_set_drvdata(pdev, NULL); 2636 2637 free_netdev(ndev); 2638 2639 /* Use global ops since we've freed edev */ 2640 qed_ops->common->slowpath_stop(cdev); 2641 qed_ops->common->remove(cdev); 2642 2643 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 2644 } 2645 2646 static void qede_remove(struct pci_dev *pdev) 2647 { 2648 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 2649 } 2650 2651 /* ------------------------------------------------------------------------- 2652 * START OF LOAD / UNLOAD 2653 * ------------------------------------------------------------------------- 2654 */ 2655 2656 static int qede_set_num_queues(struct qede_dev *edev) 2657 { 2658 int rc; 2659 u16 rss_num; 2660 2661 /* Setup queues according to possible resources*/ 2662 if (edev->req_queues) 2663 rss_num = edev->req_queues; 2664 else 2665 rss_num = netif_get_num_default_rss_queues() * 2666 edev->dev_info.common.num_hwfns; 2667 2668 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 2669 2670 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 2671 if (rc > 0) { 2672 /* Managed to request interrupts for our queues */ 2673 edev->num_queues = rc; 2674 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 2675 QEDE_QUEUE_CNT(edev), rss_num); 2676 rc = 0; 2677 } 2678 2679 edev->fp_num_tx = edev->req_num_tx; 2680 edev->fp_num_rx = edev->req_num_rx; 2681 2682 return rc; 2683 } 2684 2685 static void qede_free_mem_sb(struct qede_dev *edev, 2686 struct qed_sb_info *sb_info) 2687 { 2688 if (sb_info->sb_virt) 2689 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 2690 (void *)sb_info->sb_virt, sb_info->sb_phys); 2691 } 2692 2693 /* This function allocates fast-path status block memory */ 2694 static int qede_alloc_mem_sb(struct qede_dev *edev, 2695 struct qed_sb_info *sb_info, u16 sb_id) 2696 { 2697 struct status_block *sb_virt; 2698 dma_addr_t sb_phys; 2699 int rc; 2700 2701 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 2702 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 2703 if (!sb_virt) { 2704 DP_ERR(edev, "Status block allocation failed\n"); 2705 return -ENOMEM; 2706 } 2707 2708 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 2709 sb_virt, sb_phys, sb_id, 2710 QED_SB_TYPE_L2_QUEUE); 2711 if (rc) { 2712 DP_ERR(edev, "Status block initialization failed\n"); 2713 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 2714 sb_virt, sb_phys); 2715 return rc; 2716 } 2717 2718 return 0; 2719 } 2720 2721 static void qede_free_rx_buffers(struct qede_dev *edev, 2722 struct qede_rx_queue *rxq) 2723 { 2724 u16 i; 2725 2726 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 2727 struct sw_rx_data *rx_buf; 2728 struct page *data; 2729 2730 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 2731 data = rx_buf->data; 2732 2733 dma_unmap_page(&edev->pdev->dev, 2734 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE); 2735 2736 rx_buf->data = NULL; 2737 __free_page(data); 2738 } 2739 } 2740 2741 static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq) 2742 { 2743 int i; 2744 2745 if (edev->gro_disable) 2746 return; 2747 2748 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 2749 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 2750 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 2751 2752 if (replace_buf->data) { 2753 dma_unmap_page(&edev->pdev->dev, 2754 replace_buf->mapping, 2755 PAGE_SIZE, DMA_FROM_DEVICE); 2756 __free_page(replace_buf->data); 2757 } 2758 } 2759 } 2760 2761 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 2762 { 2763 qede_free_sge_mem(edev, rxq); 2764 2765 /* Free rx buffers */ 2766 qede_free_rx_buffers(edev, rxq); 2767 2768 /* Free the parallel SW ring */ 2769 kfree(rxq->sw_rx_ring); 2770 2771 /* Free the real RQ ring used by FW */ 2772 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 2773 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 2774 } 2775 2776 static int qede_alloc_rx_buffer(struct qede_dev *edev, 2777 struct qede_rx_queue *rxq) 2778 { 2779 struct sw_rx_data *sw_rx_data; 2780 struct eth_rx_bd *rx_bd; 2781 dma_addr_t mapping; 2782 struct page *data; 2783 2784 data = alloc_pages(GFP_ATOMIC, 0); 2785 if (unlikely(!data)) { 2786 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n"); 2787 return -ENOMEM; 2788 } 2789 2790 /* Map the entire page as it would be used 2791 * for multiple RX buffer segment size mapping. 2792 */ 2793 mapping = dma_map_page(&edev->pdev->dev, data, 0, 2794 PAGE_SIZE, DMA_FROM_DEVICE); 2795 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 2796 __free_page(data); 2797 DP_NOTICE(edev, "Failed to map Rx buffer\n"); 2798 return -ENOMEM; 2799 } 2800 2801 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 2802 sw_rx_data->page_offset = 0; 2803 sw_rx_data->data = data; 2804 sw_rx_data->mapping = mapping; 2805 2806 /* Advance PROD and get BD pointer */ 2807 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring); 2808 WARN_ON(!rx_bd); 2809 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping)); 2810 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping)); 2811 2812 rxq->sw_rx_prod++; 2813 2814 return 0; 2815 } 2816 2817 static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq) 2818 { 2819 dma_addr_t mapping; 2820 int i; 2821 2822 if (edev->gro_disable) 2823 return 0; 2824 2825 if (edev->ndev->mtu > PAGE_SIZE) { 2826 edev->gro_disable = 1; 2827 return 0; 2828 } 2829 2830 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 2831 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 2832 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 2833 2834 replace_buf->data = alloc_pages(GFP_ATOMIC, 0); 2835 if (unlikely(!replace_buf->data)) { 2836 DP_NOTICE(edev, 2837 "Failed to allocate TPA skb pool [replacement buffer]\n"); 2838 goto err; 2839 } 2840 2841 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0, 2842 rxq->rx_buf_size, DMA_FROM_DEVICE); 2843 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 2844 DP_NOTICE(edev, 2845 "Failed to map TPA replacement buffer\n"); 2846 goto err; 2847 } 2848 2849 replace_buf->mapping = mapping; 2850 tpa_info->replace_buf.page_offset = 0; 2851 2852 tpa_info->replace_buf_mapping = mapping; 2853 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 2854 } 2855 2856 return 0; 2857 err: 2858 qede_free_sge_mem(edev, rxq); 2859 edev->gro_disable = 1; 2860 return -ENOMEM; 2861 } 2862 2863 /* This function allocates all memory needed per Rx queue */ 2864 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 2865 { 2866 int i, rc, size; 2867 2868 rxq->num_rx_buffers = edev->q_num_rx_buffers; 2869 2870 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 2871 2872 if (rxq->rx_buf_size > PAGE_SIZE) 2873 rxq->rx_buf_size = PAGE_SIZE; 2874 2875 /* Segment size to spilt a page in multiple equal parts */ 2876 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size); 2877 2878 /* Allocate the parallel driver ring for Rx buffers */ 2879 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 2880 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 2881 if (!rxq->sw_rx_ring) { 2882 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 2883 rc = -ENOMEM; 2884 goto err; 2885 } 2886 2887 /* Allocate FW Rx ring */ 2888 rc = edev->ops->common->chain_alloc(edev->cdev, 2889 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 2890 QED_CHAIN_MODE_NEXT_PTR, 2891 QED_CHAIN_CNT_TYPE_U16, 2892 RX_RING_SIZE, 2893 sizeof(struct eth_rx_bd), 2894 &rxq->rx_bd_ring); 2895 2896 if (rc) 2897 goto err; 2898 2899 /* Allocate FW completion ring */ 2900 rc = edev->ops->common->chain_alloc(edev->cdev, 2901 QED_CHAIN_USE_TO_CONSUME, 2902 QED_CHAIN_MODE_PBL, 2903 QED_CHAIN_CNT_TYPE_U16, 2904 RX_RING_SIZE, 2905 sizeof(union eth_rx_cqe), 2906 &rxq->rx_comp_ring); 2907 if (rc) 2908 goto err; 2909 2910 /* Allocate buffers for the Rx ring */ 2911 for (i = 0; i < rxq->num_rx_buffers; i++) { 2912 rc = qede_alloc_rx_buffer(edev, rxq); 2913 if (rc) { 2914 DP_ERR(edev, 2915 "Rx buffers allocation failed at index %d\n", i); 2916 goto err; 2917 } 2918 } 2919 2920 rc = qede_alloc_sge_mem(edev, rxq); 2921 err: 2922 return rc; 2923 } 2924 2925 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 2926 { 2927 /* Free the parallel SW ring */ 2928 kfree(txq->sw_tx_ring); 2929 2930 /* Free the real RQ ring used by FW */ 2931 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 2932 } 2933 2934 /* This function allocates all memory needed per Tx queue */ 2935 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 2936 { 2937 int size, rc; 2938 union eth_tx_bd_types *p_virt; 2939 2940 txq->num_tx_buffers = edev->q_num_tx_buffers; 2941 2942 /* Allocate the parallel driver ring for Tx buffers */ 2943 size = sizeof(*txq->sw_tx_ring) * TX_RING_SIZE; 2944 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL); 2945 if (!txq->sw_tx_ring) { 2946 DP_NOTICE(edev, "Tx buffers ring allocation failed\n"); 2947 goto err; 2948 } 2949 2950 rc = edev->ops->common->chain_alloc(edev->cdev, 2951 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 2952 QED_CHAIN_MODE_PBL, 2953 QED_CHAIN_CNT_TYPE_U16, 2954 TX_RING_SIZE, 2955 sizeof(*p_virt), &txq->tx_pbl); 2956 if (rc) 2957 goto err; 2958 2959 return 0; 2960 2961 err: 2962 qede_free_mem_txq(edev, txq); 2963 return -ENOMEM; 2964 } 2965 2966 /* This function frees all memory of a single fp */ 2967 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 2968 { 2969 int tc; 2970 2971 qede_free_mem_sb(edev, fp->sb_info); 2972 2973 if (fp->type & QEDE_FASTPATH_RX) 2974 qede_free_mem_rxq(edev, fp->rxq); 2975 2976 if (fp->type & QEDE_FASTPATH_TX) 2977 for (tc = 0; tc < edev->num_tc; tc++) 2978 qede_free_mem_txq(edev, &fp->txqs[tc]); 2979 } 2980 2981 /* This function allocates all memory needed for a single fp (i.e. an entity 2982 * which contains status block, one rx queue and/or multiple per-TC tx queues. 2983 */ 2984 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 2985 { 2986 int rc, tc; 2987 2988 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 2989 if (rc) 2990 goto err; 2991 2992 if (fp->type & QEDE_FASTPATH_RX) { 2993 rc = qede_alloc_mem_rxq(edev, fp->rxq); 2994 if (rc) 2995 goto err; 2996 } 2997 2998 if (fp->type & QEDE_FASTPATH_TX) { 2999 for (tc = 0; tc < edev->num_tc; tc++) { 3000 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]); 3001 if (rc) 3002 goto err; 3003 } 3004 } 3005 3006 return 0; 3007 err: 3008 return rc; 3009 } 3010 3011 static void qede_free_mem_load(struct qede_dev *edev) 3012 { 3013 int i; 3014 3015 for_each_queue(i) { 3016 struct qede_fastpath *fp = &edev->fp_array[i]; 3017 3018 qede_free_mem_fp(edev, fp); 3019 } 3020 } 3021 3022 /* This function allocates all qede memory at NIC load. */ 3023 static int qede_alloc_mem_load(struct qede_dev *edev) 3024 { 3025 int rc = 0, queue_id; 3026 3027 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 3028 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 3029 3030 rc = qede_alloc_mem_fp(edev, fp); 3031 if (rc) { 3032 DP_ERR(edev, 3033 "Failed to allocate memory for fastpath - rss id = %d\n", 3034 queue_id); 3035 qede_free_mem_load(edev); 3036 return rc; 3037 } 3038 } 3039 3040 return 0; 3041 } 3042 3043 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 3044 static void qede_init_fp(struct qede_dev *edev) 3045 { 3046 int queue_id, rxq_index = 0, txq_index = 0, tc; 3047 struct qede_fastpath *fp; 3048 3049 for_each_queue(queue_id) { 3050 fp = &edev->fp_array[queue_id]; 3051 3052 fp->edev = edev; 3053 fp->id = queue_id; 3054 3055 memset((void *)&fp->napi, 0, sizeof(fp->napi)); 3056 3057 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info)); 3058 3059 if (fp->type & QEDE_FASTPATH_RX) { 3060 memset((void *)fp->rxq, 0, sizeof(*fp->rxq)); 3061 fp->rxq->rxq_id = rxq_index++; 3062 } 3063 3064 if (fp->type & QEDE_FASTPATH_TX) { 3065 memset((void *)fp->txqs, 0, 3066 (edev->num_tc * sizeof(*fp->txqs))); 3067 for (tc = 0; tc < edev->num_tc; tc++) { 3068 fp->txqs[tc].index = txq_index + 3069 tc * QEDE_TSS_COUNT(edev); 3070 if (edev->dev_info.is_legacy) 3071 fp->txqs[tc].is_legacy = true; 3072 } 3073 txq_index++; 3074 } 3075 3076 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 3077 edev->ndev->name, queue_id); 3078 } 3079 3080 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO); 3081 } 3082 3083 static int qede_set_real_num_queues(struct qede_dev *edev) 3084 { 3085 int rc = 0; 3086 3087 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev)); 3088 if (rc) { 3089 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 3090 return rc; 3091 } 3092 3093 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 3094 if (rc) { 3095 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 3096 return rc; 3097 } 3098 3099 return 0; 3100 } 3101 3102 static void qede_napi_disable_remove(struct qede_dev *edev) 3103 { 3104 int i; 3105 3106 for_each_queue(i) { 3107 napi_disable(&edev->fp_array[i].napi); 3108 3109 netif_napi_del(&edev->fp_array[i].napi); 3110 } 3111 } 3112 3113 static void qede_napi_add_enable(struct qede_dev *edev) 3114 { 3115 int i; 3116 3117 /* Add NAPI objects */ 3118 for_each_queue(i) { 3119 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 3120 qede_poll, NAPI_POLL_WEIGHT); 3121 napi_enable(&edev->fp_array[i].napi); 3122 } 3123 } 3124 3125 static void qede_sync_free_irqs(struct qede_dev *edev) 3126 { 3127 int i; 3128 3129 for (i = 0; i < edev->int_info.used_cnt; i++) { 3130 if (edev->int_info.msix_cnt) { 3131 synchronize_irq(edev->int_info.msix[i].vector); 3132 free_irq(edev->int_info.msix[i].vector, 3133 &edev->fp_array[i]); 3134 } else { 3135 edev->ops->common->simd_handler_clean(edev->cdev, i); 3136 } 3137 } 3138 3139 edev->int_info.used_cnt = 0; 3140 } 3141 3142 static int qede_req_msix_irqs(struct qede_dev *edev) 3143 { 3144 int i, rc; 3145 3146 /* Sanitize number of interrupts == number of prepared RSS queues */ 3147 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 3148 DP_ERR(edev, 3149 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 3150 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 3151 return -EINVAL; 3152 } 3153 3154 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 3155 rc = request_irq(edev->int_info.msix[i].vector, 3156 qede_msix_fp_int, 0, edev->fp_array[i].name, 3157 &edev->fp_array[i]); 3158 if (rc) { 3159 DP_ERR(edev, "Request fp %d irq failed\n", i); 3160 qede_sync_free_irqs(edev); 3161 return rc; 3162 } 3163 DP_VERBOSE(edev, NETIF_MSG_INTR, 3164 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 3165 edev->fp_array[i].name, i, 3166 &edev->fp_array[i]); 3167 edev->int_info.used_cnt++; 3168 } 3169 3170 return 0; 3171 } 3172 3173 static void qede_simd_fp_handler(void *cookie) 3174 { 3175 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 3176 3177 napi_schedule_irqoff(&fp->napi); 3178 } 3179 3180 static int qede_setup_irqs(struct qede_dev *edev) 3181 { 3182 int i, rc = 0; 3183 3184 /* Learn Interrupt configuration */ 3185 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 3186 if (rc) 3187 return rc; 3188 3189 if (edev->int_info.msix_cnt) { 3190 rc = qede_req_msix_irqs(edev); 3191 if (rc) 3192 return rc; 3193 edev->ndev->irq = edev->int_info.msix[0].vector; 3194 } else { 3195 const struct qed_common_ops *ops; 3196 3197 /* qed should learn receive the RSS ids and callbacks */ 3198 ops = edev->ops->common; 3199 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 3200 ops->simd_handler_config(edev->cdev, 3201 &edev->fp_array[i], i, 3202 qede_simd_fp_handler); 3203 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 3204 } 3205 return 0; 3206 } 3207 3208 static int qede_drain_txq(struct qede_dev *edev, 3209 struct qede_tx_queue *txq, bool allow_drain) 3210 { 3211 int rc, cnt = 1000; 3212 3213 while (txq->sw_tx_cons != txq->sw_tx_prod) { 3214 if (!cnt) { 3215 if (allow_drain) { 3216 DP_NOTICE(edev, 3217 "Tx queue[%d] is stuck, requesting MCP to drain\n", 3218 txq->index); 3219 rc = edev->ops->common->drain(edev->cdev); 3220 if (rc) 3221 return rc; 3222 return qede_drain_txq(edev, txq, false); 3223 } 3224 DP_NOTICE(edev, 3225 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 3226 txq->index, txq->sw_tx_prod, 3227 txq->sw_tx_cons); 3228 return -ENODEV; 3229 } 3230 cnt--; 3231 usleep_range(1000, 2000); 3232 barrier(); 3233 } 3234 3235 /* FW finished processing, wait for HW to transmit all tx packets */ 3236 usleep_range(1000, 2000); 3237 3238 return 0; 3239 } 3240 3241 static int qede_stop_queues(struct qede_dev *edev) 3242 { 3243 struct qed_update_vport_params vport_update_params; 3244 struct qed_dev *cdev = edev->cdev; 3245 int rc, tc, i; 3246 3247 /* Disable the vport */ 3248 memset(&vport_update_params, 0, sizeof(vport_update_params)); 3249 vport_update_params.vport_id = 0; 3250 vport_update_params.update_vport_active_flg = 1; 3251 vport_update_params.vport_active_flg = 0; 3252 vport_update_params.update_rss_flg = 0; 3253 3254 rc = edev->ops->vport_update(cdev, &vport_update_params); 3255 if (rc) { 3256 DP_ERR(edev, "Failed to update vport\n"); 3257 return rc; 3258 } 3259 3260 /* Flush Tx queues. If needed, request drain from MCP */ 3261 for_each_queue(i) { 3262 struct qede_fastpath *fp = &edev->fp_array[i]; 3263 3264 if (fp->type & QEDE_FASTPATH_TX) { 3265 for (tc = 0; tc < edev->num_tc; tc++) { 3266 struct qede_tx_queue *txq = &fp->txqs[tc]; 3267 3268 rc = qede_drain_txq(edev, txq, true); 3269 if (rc) 3270 return rc; 3271 } 3272 } 3273 } 3274 3275 /* Stop all Queues in reverse order */ 3276 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 3277 struct qed_stop_rxq_params rx_params; 3278 3279 /* Stop the Tx Queue(s) */ 3280 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 3281 for (tc = 0; tc < edev->num_tc; tc++) { 3282 struct qed_stop_txq_params tx_params; 3283 u8 val; 3284 3285 tx_params.rss_id = i; 3286 val = edev->fp_array[i].txqs[tc].index; 3287 tx_params.tx_queue_id = val; 3288 rc = edev->ops->q_tx_stop(cdev, &tx_params); 3289 if (rc) { 3290 DP_ERR(edev, "Failed to stop TXQ #%d\n", 3291 tx_params.tx_queue_id); 3292 return rc; 3293 } 3294 } 3295 } 3296 3297 /* Stop the Rx Queue */ 3298 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 3299 memset(&rx_params, 0, sizeof(rx_params)); 3300 rx_params.rss_id = i; 3301 rx_params.rx_queue_id = edev->fp_array[i].rxq->rxq_id; 3302 3303 rc = edev->ops->q_rx_stop(cdev, &rx_params); 3304 if (rc) { 3305 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 3306 return rc; 3307 } 3308 } 3309 } 3310 3311 /* Stop the vport */ 3312 rc = edev->ops->vport_stop(cdev, 0); 3313 if (rc) 3314 DP_ERR(edev, "Failed to stop VPORT\n"); 3315 3316 return rc; 3317 } 3318 3319 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 3320 { 3321 int rc, tc, i; 3322 int vlan_removal_en = 1; 3323 struct qed_dev *cdev = edev->cdev; 3324 struct qed_update_vport_params vport_update_params; 3325 struct qed_queue_start_common_params q_params; 3326 struct qed_dev_info *qed_info = &edev->dev_info.common; 3327 struct qed_start_vport_params start = {0}; 3328 bool reset_rss_indir = false; 3329 3330 if (!edev->num_queues) { 3331 DP_ERR(edev, 3332 "Cannot update V-VPORT as active as there are no Rx queues\n"); 3333 return -EINVAL; 3334 } 3335 3336 start.gro_enable = !edev->gro_disable; 3337 start.mtu = edev->ndev->mtu; 3338 start.vport_id = 0; 3339 start.drop_ttl0 = true; 3340 start.remove_inner_vlan = vlan_removal_en; 3341 start.clear_stats = clear_stats; 3342 3343 rc = edev->ops->vport_start(cdev, &start); 3344 3345 if (rc) { 3346 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 3347 return rc; 3348 } 3349 3350 DP_VERBOSE(edev, NETIF_MSG_IFUP, 3351 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 3352 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 3353 3354 for_each_queue(i) { 3355 struct qede_fastpath *fp = &edev->fp_array[i]; 3356 dma_addr_t p_phys_table; 3357 u32 page_cnt; 3358 3359 if (fp->type & QEDE_FASTPATH_RX) { 3360 struct qede_rx_queue *rxq = fp->rxq; 3361 __le16 *val; 3362 3363 memset(&q_params, 0, sizeof(q_params)); 3364 q_params.rss_id = i; 3365 q_params.queue_id = rxq->rxq_id; 3366 q_params.vport_id = 0; 3367 q_params.sb = fp->sb_info->igu_sb_id; 3368 q_params.sb_idx = RX_PI; 3369 3370 p_phys_table = 3371 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 3372 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 3373 3374 rc = edev->ops->q_rx_start(cdev, &q_params, 3375 rxq->rx_buf_size, 3376 rxq->rx_bd_ring.p_phys_addr, 3377 p_phys_table, 3378 page_cnt, 3379 &rxq->hw_rxq_prod_addr); 3380 if (rc) { 3381 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 3382 rc); 3383 return rc; 3384 } 3385 3386 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 3387 rxq->hw_cons_ptr = val; 3388 3389 qede_update_rx_prod(edev, rxq); 3390 } 3391 3392 if (!(fp->type & QEDE_FASTPATH_TX)) 3393 continue; 3394 3395 for (tc = 0; tc < edev->num_tc; tc++) { 3396 struct qede_tx_queue *txq = &fp->txqs[tc]; 3397 3398 p_phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 3399 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 3400 3401 memset(&q_params, 0, sizeof(q_params)); 3402 q_params.rss_id = i; 3403 q_params.queue_id = txq->index; 3404 q_params.vport_id = 0; 3405 q_params.sb = fp->sb_info->igu_sb_id; 3406 q_params.sb_idx = TX_PI(tc); 3407 3408 rc = edev->ops->q_tx_start(cdev, &q_params, 3409 p_phys_table, page_cnt, 3410 &txq->doorbell_addr); 3411 if (rc) { 3412 DP_ERR(edev, "Start TXQ #%d failed %d\n", 3413 txq->index, rc); 3414 return rc; 3415 } 3416 3417 txq->hw_cons_ptr = 3418 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)]; 3419 SET_FIELD(txq->tx_db.data.params, 3420 ETH_DB_DATA_DEST, DB_DEST_XCM); 3421 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, 3422 DB_AGG_CMD_SET); 3423 SET_FIELD(txq->tx_db.data.params, 3424 ETH_DB_DATA_AGG_VAL_SEL, 3425 DQ_XCM_ETH_TX_BD_PROD_CMD); 3426 3427 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 3428 } 3429 } 3430 3431 /* Prepare and send the vport enable */ 3432 memset(&vport_update_params, 0, sizeof(vport_update_params)); 3433 vport_update_params.vport_id = start.vport_id; 3434 vport_update_params.update_vport_active_flg = 1; 3435 vport_update_params.vport_active_flg = 1; 3436 3437 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) && 3438 qed_info->tx_switching) { 3439 vport_update_params.update_tx_switching_flg = 1; 3440 vport_update_params.tx_switching_flg = 1; 3441 } 3442 3443 /* Fill struct with RSS params */ 3444 if (QEDE_RSS_COUNT(edev) > 1) { 3445 vport_update_params.update_rss_flg = 1; 3446 3447 /* Need to validate current RSS config uses valid entries */ 3448 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 3449 if (edev->rss_params.rss_ind_table[i] >= 3450 QEDE_RSS_COUNT(edev)) { 3451 reset_rss_indir = true; 3452 break; 3453 } 3454 } 3455 3456 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) || 3457 reset_rss_indir) { 3458 u16 val; 3459 3460 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 3461 u16 indir_val; 3462 3463 val = QEDE_RSS_COUNT(edev); 3464 indir_val = ethtool_rxfh_indir_default(i, val); 3465 edev->rss_params.rss_ind_table[i] = indir_val; 3466 } 3467 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 3468 } 3469 3470 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) { 3471 netdev_rss_key_fill(edev->rss_params.rss_key, 3472 sizeof(edev->rss_params.rss_key)); 3473 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 3474 } 3475 3476 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) { 3477 edev->rss_params.rss_caps = QED_RSS_IPV4 | 3478 QED_RSS_IPV6 | 3479 QED_RSS_IPV4_TCP | 3480 QED_RSS_IPV6_TCP; 3481 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 3482 } 3483 3484 memcpy(&vport_update_params.rss_params, &edev->rss_params, 3485 sizeof(vport_update_params.rss_params)); 3486 } else { 3487 memset(&vport_update_params.rss_params, 0, 3488 sizeof(vport_update_params.rss_params)); 3489 } 3490 3491 rc = edev->ops->vport_update(cdev, &vport_update_params); 3492 if (rc) { 3493 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 3494 return rc; 3495 } 3496 3497 return 0; 3498 } 3499 3500 static int qede_set_mcast_rx_mac(struct qede_dev *edev, 3501 enum qed_filter_xcast_params_type opcode, 3502 unsigned char *mac, int num_macs) 3503 { 3504 struct qed_filter_params filter_cmd; 3505 int i; 3506 3507 memset(&filter_cmd, 0, sizeof(filter_cmd)); 3508 filter_cmd.type = QED_FILTER_TYPE_MCAST; 3509 filter_cmd.filter.mcast.type = opcode; 3510 filter_cmd.filter.mcast.num = num_macs; 3511 3512 for (i = 0; i < num_macs; i++, mac += ETH_ALEN) 3513 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac); 3514 3515 return edev->ops->filter_config(edev->cdev, &filter_cmd); 3516 } 3517 3518 enum qede_unload_mode { 3519 QEDE_UNLOAD_NORMAL, 3520 }; 3521 3522 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode) 3523 { 3524 struct qed_link_params link_params; 3525 int rc; 3526 3527 DP_INFO(edev, "Starting qede unload\n"); 3528 3529 qede_roce_dev_event_close(edev); 3530 mutex_lock(&edev->qede_lock); 3531 edev->state = QEDE_STATE_CLOSED; 3532 3533 /* Close OS Tx */ 3534 netif_tx_disable(edev->ndev); 3535 netif_carrier_off(edev->ndev); 3536 3537 /* Reset the link */ 3538 memset(&link_params, 0, sizeof(link_params)); 3539 link_params.link_up = false; 3540 edev->ops->common->set_link(edev->cdev, &link_params); 3541 rc = qede_stop_queues(edev); 3542 if (rc) { 3543 qede_sync_free_irqs(edev); 3544 goto out; 3545 } 3546 3547 DP_INFO(edev, "Stopped Queues\n"); 3548 3549 qede_vlan_mark_nonconfigured(edev); 3550 edev->ops->fastpath_stop(edev->cdev); 3551 3552 /* Release the interrupts */ 3553 qede_sync_free_irqs(edev); 3554 edev->ops->common->set_fp_int(edev->cdev, 0); 3555 3556 qede_napi_disable_remove(edev); 3557 3558 qede_free_mem_load(edev); 3559 qede_free_fp_array(edev); 3560 3561 out: 3562 mutex_unlock(&edev->qede_lock); 3563 DP_INFO(edev, "Ending qede unload\n"); 3564 } 3565 3566 enum qede_load_mode { 3567 QEDE_LOAD_NORMAL, 3568 QEDE_LOAD_RELOAD, 3569 }; 3570 3571 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode) 3572 { 3573 struct qed_link_params link_params; 3574 struct qed_link_output link_output; 3575 int rc; 3576 3577 DP_INFO(edev, "Starting qede load\n"); 3578 3579 rc = qede_set_num_queues(edev); 3580 if (rc) 3581 goto err0; 3582 3583 rc = qede_alloc_fp_array(edev); 3584 if (rc) 3585 goto err0; 3586 3587 qede_init_fp(edev); 3588 3589 rc = qede_alloc_mem_load(edev); 3590 if (rc) 3591 goto err1; 3592 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n", 3593 QEDE_QUEUE_CNT(edev), edev->num_tc); 3594 3595 rc = qede_set_real_num_queues(edev); 3596 if (rc) 3597 goto err2; 3598 3599 qede_napi_add_enable(edev); 3600 DP_INFO(edev, "Napi added and enabled\n"); 3601 3602 rc = qede_setup_irqs(edev); 3603 if (rc) 3604 goto err3; 3605 DP_INFO(edev, "Setup IRQs succeeded\n"); 3606 3607 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 3608 if (rc) 3609 goto err4; 3610 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 3611 3612 /* Add primary mac and set Rx filters */ 3613 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr); 3614 3615 mutex_lock(&edev->qede_lock); 3616 edev->state = QEDE_STATE_OPEN; 3617 mutex_unlock(&edev->qede_lock); 3618 3619 /* Program un-configured VLANs */ 3620 qede_configure_vlan_filters(edev); 3621 3622 /* Ask for link-up using current configuration */ 3623 memset(&link_params, 0, sizeof(link_params)); 3624 link_params.link_up = true; 3625 edev->ops->common->set_link(edev->cdev, &link_params); 3626 3627 /* Query whether link is already-up */ 3628 memset(&link_output, 0, sizeof(link_output)); 3629 edev->ops->common->get_link(edev->cdev, &link_output); 3630 qede_roce_dev_event_open(edev); 3631 qede_link_update(edev, &link_output); 3632 3633 DP_INFO(edev, "Ending successfully qede load\n"); 3634 3635 return 0; 3636 3637 err4: 3638 qede_sync_free_irqs(edev); 3639 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 3640 err3: 3641 qede_napi_disable_remove(edev); 3642 err2: 3643 qede_free_mem_load(edev); 3644 err1: 3645 edev->ops->common->set_fp_int(edev->cdev, 0); 3646 qede_free_fp_array(edev); 3647 edev->num_queues = 0; 3648 edev->fp_num_tx = 0; 3649 edev->fp_num_rx = 0; 3650 err0: 3651 return rc; 3652 } 3653 3654 void qede_reload(struct qede_dev *edev, 3655 void (*func)(struct qede_dev *, union qede_reload_args *), 3656 union qede_reload_args *args) 3657 { 3658 qede_unload(edev, QEDE_UNLOAD_NORMAL); 3659 /* Call function handler to update parameters 3660 * needed for function load. 3661 */ 3662 if (func) 3663 func(edev, args); 3664 3665 qede_load(edev, QEDE_LOAD_RELOAD); 3666 3667 mutex_lock(&edev->qede_lock); 3668 qede_config_rx_mode(edev->ndev); 3669 mutex_unlock(&edev->qede_lock); 3670 } 3671 3672 /* called with rtnl_lock */ 3673 static int qede_open(struct net_device *ndev) 3674 { 3675 struct qede_dev *edev = netdev_priv(ndev); 3676 int rc; 3677 3678 netif_carrier_off(ndev); 3679 3680 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 3681 3682 rc = qede_load(edev, QEDE_LOAD_NORMAL); 3683 3684 if (rc) 3685 return rc; 3686 3687 udp_tunnel_get_rx_info(ndev); 3688 3689 return 0; 3690 } 3691 3692 static int qede_close(struct net_device *ndev) 3693 { 3694 struct qede_dev *edev = netdev_priv(ndev); 3695 3696 qede_unload(edev, QEDE_UNLOAD_NORMAL); 3697 3698 return 0; 3699 } 3700 3701 static void qede_link_update(void *dev, struct qed_link_output *link) 3702 { 3703 struct qede_dev *edev = dev; 3704 3705 if (!netif_running(edev->ndev)) { 3706 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n"); 3707 return; 3708 } 3709 3710 if (link->link_up) { 3711 if (!netif_carrier_ok(edev->ndev)) { 3712 DP_NOTICE(edev, "Link is up\n"); 3713 netif_tx_start_all_queues(edev->ndev); 3714 netif_carrier_on(edev->ndev); 3715 } 3716 } else { 3717 if (netif_carrier_ok(edev->ndev)) { 3718 DP_NOTICE(edev, "Link is down\n"); 3719 netif_tx_disable(edev->ndev); 3720 netif_carrier_off(edev->ndev); 3721 } 3722 } 3723 } 3724 3725 static int qede_set_mac_addr(struct net_device *ndev, void *p) 3726 { 3727 struct qede_dev *edev = netdev_priv(ndev); 3728 struct sockaddr *addr = p; 3729 int rc; 3730 3731 ASSERT_RTNL(); /* @@@TBD To be removed */ 3732 3733 DP_INFO(edev, "Set_mac_addr called\n"); 3734 3735 if (!is_valid_ether_addr(addr->sa_data)) { 3736 DP_NOTICE(edev, "The MAC address is not valid\n"); 3737 return -EFAULT; 3738 } 3739 3740 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) { 3741 DP_NOTICE(edev, "qed prevents setting MAC\n"); 3742 return -EINVAL; 3743 } 3744 3745 ether_addr_copy(ndev->dev_addr, addr->sa_data); 3746 3747 if (!netif_running(ndev)) { 3748 DP_NOTICE(edev, "The device is currently down\n"); 3749 return 0; 3750 } 3751 3752 /* Remove the previous primary mac */ 3753 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, 3754 edev->primary_mac); 3755 if (rc) 3756 return rc; 3757 3758 /* Add MAC filter according to the new unicast HW MAC address */ 3759 ether_addr_copy(edev->primary_mac, ndev->dev_addr); 3760 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, 3761 edev->primary_mac); 3762 } 3763 3764 static int 3765 qede_configure_mcast_filtering(struct net_device *ndev, 3766 enum qed_filter_rx_mode_type *accept_flags) 3767 { 3768 struct qede_dev *edev = netdev_priv(ndev); 3769 unsigned char *mc_macs, *temp; 3770 struct netdev_hw_addr *ha; 3771 int rc = 0, mc_count; 3772 size_t size; 3773 3774 size = 64 * ETH_ALEN; 3775 3776 mc_macs = kzalloc(size, GFP_KERNEL); 3777 if (!mc_macs) { 3778 DP_NOTICE(edev, 3779 "Failed to allocate memory for multicast MACs\n"); 3780 rc = -ENOMEM; 3781 goto exit; 3782 } 3783 3784 temp = mc_macs; 3785 3786 /* Remove all previously configured MAC filters */ 3787 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, 3788 mc_macs, 1); 3789 if (rc) 3790 goto exit; 3791 3792 netif_addr_lock_bh(ndev); 3793 3794 mc_count = netdev_mc_count(ndev); 3795 if (mc_count < 64) { 3796 netdev_for_each_mc_addr(ha, ndev) { 3797 ether_addr_copy(temp, ha->addr); 3798 temp += ETH_ALEN; 3799 } 3800 } 3801 3802 netif_addr_unlock_bh(ndev); 3803 3804 /* Check for all multicast @@@TBD resource allocation */ 3805 if ((ndev->flags & IFF_ALLMULTI) || 3806 (mc_count > 64)) { 3807 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR) 3808 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC; 3809 } else { 3810 /* Add all multicast MAC filters */ 3811 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, 3812 mc_macs, mc_count); 3813 } 3814 3815 exit: 3816 kfree(mc_macs); 3817 return rc; 3818 } 3819 3820 static void qede_set_rx_mode(struct net_device *ndev) 3821 { 3822 struct qede_dev *edev = netdev_priv(ndev); 3823 3824 DP_INFO(edev, "qede_set_rx_mode called\n"); 3825 3826 if (edev->state != QEDE_STATE_OPEN) { 3827 DP_INFO(edev, 3828 "qede_set_rx_mode called while interface is down\n"); 3829 } else { 3830 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags); 3831 schedule_delayed_work(&edev->sp_task, 0); 3832 } 3833 } 3834 3835 /* Must be called with qede_lock held */ 3836 static void qede_config_rx_mode(struct net_device *ndev) 3837 { 3838 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST; 3839 struct qede_dev *edev = netdev_priv(ndev); 3840 struct qed_filter_params rx_mode; 3841 unsigned char *uc_macs, *temp; 3842 struct netdev_hw_addr *ha; 3843 int rc, uc_count; 3844 size_t size; 3845 3846 netif_addr_lock_bh(ndev); 3847 3848 uc_count = netdev_uc_count(ndev); 3849 size = uc_count * ETH_ALEN; 3850 3851 uc_macs = kzalloc(size, GFP_ATOMIC); 3852 if (!uc_macs) { 3853 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n"); 3854 netif_addr_unlock_bh(ndev); 3855 return; 3856 } 3857 3858 temp = uc_macs; 3859 netdev_for_each_uc_addr(ha, ndev) { 3860 ether_addr_copy(temp, ha->addr); 3861 temp += ETH_ALEN; 3862 } 3863 3864 netif_addr_unlock_bh(ndev); 3865 3866 /* Configure the struct for the Rx mode */ 3867 memset(&rx_mode, 0, sizeof(struct qed_filter_params)); 3868 rx_mode.type = QED_FILTER_TYPE_RX_MODE; 3869 3870 /* Remove all previous unicast secondary macs and multicast macs 3871 * (configrue / leave the primary mac) 3872 */ 3873 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE, 3874 edev->primary_mac); 3875 if (rc) 3876 goto out; 3877 3878 /* Check for promiscuous */ 3879 if ((ndev->flags & IFF_PROMISC) || 3880 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */ 3881 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC; 3882 } else { 3883 /* Add MAC filters according to the unicast secondary macs */ 3884 int i; 3885 3886 temp = uc_macs; 3887 for (i = 0; i < uc_count; i++) { 3888 rc = qede_set_ucast_rx_mac(edev, 3889 QED_FILTER_XCAST_TYPE_ADD, 3890 temp); 3891 if (rc) 3892 goto out; 3893 3894 temp += ETH_ALEN; 3895 } 3896 3897 rc = qede_configure_mcast_filtering(ndev, &accept_flags); 3898 if (rc) 3899 goto out; 3900 } 3901 3902 /* take care of VLAN mode */ 3903 if (ndev->flags & IFF_PROMISC) { 3904 qede_config_accept_any_vlan(edev, true); 3905 } else if (!edev->non_configured_vlans) { 3906 /* It's possible that accept_any_vlan mode is set due to a 3907 * previous setting of IFF_PROMISC. If vlan credits are 3908 * sufficient, disable accept_any_vlan. 3909 */ 3910 qede_config_accept_any_vlan(edev, false); 3911 } 3912 3913 rx_mode.filter.accept_flags = accept_flags; 3914 edev->ops->filter_config(edev->cdev, &rx_mode); 3915 out: 3916 kfree(uc_macs); 3917 } 3918