1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/module.h> 33 #include <linux/pci.h> 34 #include <linux/version.h> 35 #include <linux/device.h> 36 #include <linux/netdevice.h> 37 #include <linux/etherdevice.h> 38 #include <linux/skbuff.h> 39 #include <linux/errno.h> 40 #include <linux/list.h> 41 #include <linux/string.h> 42 #include <linux/dma-mapping.h> 43 #include <linux/interrupt.h> 44 #include <asm/byteorder.h> 45 #include <asm/param.h> 46 #include <linux/io.h> 47 #include <linux/netdev_features.h> 48 #include <linux/udp.h> 49 #include <linux/tcp.h> 50 #include <net/udp_tunnel.h> 51 #include <linux/ip.h> 52 #include <net/ipv6.h> 53 #include <net/tcp.h> 54 #include <linux/if_ether.h> 55 #include <linux/if_vlan.h> 56 #include <linux/pkt_sched.h> 57 #include <linux/ethtool.h> 58 #include <linux/in.h> 59 #include <linux/random.h> 60 #include <net/ip6_checksum.h> 61 #include <linux/bitops.h> 62 #include <linux/vmalloc.h> 63 #include "qede.h" 64 #include "qede_ptp.h" 65 66 static char version[] = 67 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 68 69 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 70 MODULE_LICENSE("GPL"); 71 MODULE_VERSION(DRV_MODULE_VERSION); 72 73 static uint debug; 74 module_param(debug, uint, 0); 75 MODULE_PARM_DESC(debug, " Default debug msglevel"); 76 77 static const struct qed_eth_ops *qed_ops; 78 79 #define CHIP_NUM_57980S_40 0x1634 80 #define CHIP_NUM_57980S_10 0x1666 81 #define CHIP_NUM_57980S_MF 0x1636 82 #define CHIP_NUM_57980S_100 0x1644 83 #define CHIP_NUM_57980S_50 0x1654 84 #define CHIP_NUM_57980S_25 0x1656 85 #define CHIP_NUM_57980S_IOV 0x1664 86 #define CHIP_NUM_AH 0x8070 87 #define CHIP_NUM_AH_IOV 0x8090 88 89 #ifndef PCI_DEVICE_ID_NX2_57980E 90 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 91 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 92 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 93 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 94 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 95 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 96 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 97 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 98 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 99 100 #endif 101 102 enum qede_pci_private { 103 QEDE_PRIVATE_PF, 104 QEDE_PRIVATE_VF 105 }; 106 107 static const struct pci_device_id qede_pci_tbl[] = { 108 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 109 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 110 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 111 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 112 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 113 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 114 #ifdef CONFIG_QED_SRIOV 115 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 116 #endif 117 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 118 #ifdef CONFIG_QED_SRIOV 119 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 120 #endif 121 { 0 } 122 }; 123 124 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 125 126 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 127 128 #define TX_TIMEOUT (5 * HZ) 129 130 /* Utilize last protocol index for XDP */ 131 #define XDP_PI 11 132 133 static void qede_remove(struct pci_dev *pdev); 134 static void qede_shutdown(struct pci_dev *pdev); 135 static void qede_link_update(void *dev, struct qed_link_output *link); 136 static void qede_schedule_recovery_handler(void *dev); 137 static void qede_recovery_handler(struct qede_dev *edev); 138 static void qede_get_eth_tlv_data(void *edev, void *data); 139 static void qede_get_generic_tlv_data(void *edev, 140 struct qed_generic_tlvs *data); 141 142 #ifdef CONFIG_QED_SRIOV 143 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 144 __be16 vlan_proto) 145 { 146 struct qede_dev *edev = netdev_priv(ndev); 147 148 if (vlan > 4095) { 149 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 150 return -EINVAL; 151 } 152 153 if (vlan_proto != htons(ETH_P_8021Q)) 154 return -EPROTONOSUPPORT; 155 156 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 157 vlan, vf); 158 159 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 160 } 161 162 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 163 { 164 struct qede_dev *edev = netdev_priv(ndev); 165 166 DP_VERBOSE(edev, QED_MSG_IOV, 167 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", 168 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); 169 170 if (!is_valid_ether_addr(mac)) { 171 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 172 return -EINVAL; 173 } 174 175 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 176 } 177 178 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 179 { 180 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 181 struct qed_dev_info *qed_info = &edev->dev_info.common; 182 struct qed_update_vport_params *vport_params; 183 int rc; 184 185 vport_params = vzalloc(sizeof(*vport_params)); 186 if (!vport_params) 187 return -ENOMEM; 188 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 189 190 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 191 192 /* Enable/Disable Tx switching for PF */ 193 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 194 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 195 vport_params->vport_id = 0; 196 vport_params->update_tx_switching_flg = 1; 197 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 198 edev->ops->vport_update(edev->cdev, vport_params); 199 } 200 201 vfree(vport_params); 202 return rc; 203 } 204 #endif 205 206 static struct pci_driver qede_pci_driver = { 207 .name = "qede", 208 .id_table = qede_pci_tbl, 209 .probe = qede_probe, 210 .remove = qede_remove, 211 .shutdown = qede_shutdown, 212 #ifdef CONFIG_QED_SRIOV 213 .sriov_configure = qede_sriov_configure, 214 #endif 215 }; 216 217 static struct qed_eth_cb_ops qede_ll_ops = { 218 { 219 #ifdef CONFIG_RFS_ACCEL 220 .arfs_filter_op = qede_arfs_filter_op, 221 #endif 222 .link_update = qede_link_update, 223 .schedule_recovery_handler = qede_schedule_recovery_handler, 224 .get_generic_tlv_data = qede_get_generic_tlv_data, 225 .get_protocol_tlv_data = qede_get_eth_tlv_data, 226 }, 227 .force_mac = qede_force_mac, 228 .ports_update = qede_udp_ports_update, 229 }; 230 231 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 232 void *ptr) 233 { 234 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 235 struct ethtool_drvinfo drvinfo; 236 struct qede_dev *edev; 237 238 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 239 goto done; 240 241 /* Check whether this is a qede device */ 242 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 243 goto done; 244 245 memset(&drvinfo, 0, sizeof(drvinfo)); 246 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 247 if (strcmp(drvinfo.driver, "qede")) 248 goto done; 249 edev = netdev_priv(ndev); 250 251 switch (event) { 252 case NETDEV_CHANGENAME: 253 /* Notify qed of the name change */ 254 if (!edev->ops || !edev->ops->common) 255 goto done; 256 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 257 break; 258 case NETDEV_CHANGEADDR: 259 edev = netdev_priv(ndev); 260 qede_rdma_event_changeaddr(edev); 261 break; 262 } 263 264 done: 265 return NOTIFY_DONE; 266 } 267 268 static struct notifier_block qede_netdev_notifier = { 269 .notifier_call = qede_netdev_event, 270 }; 271 272 static 273 int __init qede_init(void) 274 { 275 int ret; 276 277 pr_info("qede_init: %s\n", version); 278 279 qed_ops = qed_get_eth_ops(); 280 if (!qed_ops) { 281 pr_notice("Failed to get qed ethtool operations\n"); 282 return -EINVAL; 283 } 284 285 /* Must register notifier before pci ops, since we might miss 286 * interface rename after pci probe and netdev registration. 287 */ 288 ret = register_netdevice_notifier(&qede_netdev_notifier); 289 if (ret) { 290 pr_notice("Failed to register netdevice_notifier\n"); 291 qed_put_eth_ops(); 292 return -EINVAL; 293 } 294 295 ret = pci_register_driver(&qede_pci_driver); 296 if (ret) { 297 pr_notice("Failed to register driver\n"); 298 unregister_netdevice_notifier(&qede_netdev_notifier); 299 qed_put_eth_ops(); 300 return -EINVAL; 301 } 302 303 return 0; 304 } 305 306 static void __exit qede_cleanup(void) 307 { 308 if (debug & QED_LOG_INFO_MASK) 309 pr_info("qede_cleanup called\n"); 310 311 unregister_netdevice_notifier(&qede_netdev_notifier); 312 pci_unregister_driver(&qede_pci_driver); 313 qed_put_eth_ops(); 314 } 315 316 module_init(qede_init); 317 module_exit(qede_cleanup); 318 319 static int qede_open(struct net_device *ndev); 320 static int qede_close(struct net_device *ndev); 321 322 void qede_fill_by_demand_stats(struct qede_dev *edev) 323 { 324 struct qede_stats_common *p_common = &edev->stats.common; 325 struct qed_eth_stats stats; 326 327 edev->ops->get_vport_stats(edev->cdev, &stats); 328 329 p_common->no_buff_discards = stats.common.no_buff_discards; 330 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 331 p_common->ttl0_discard = stats.common.ttl0_discard; 332 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 333 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 334 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 335 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 336 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 337 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 338 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 339 p_common->mac_filter_discards = stats.common.mac_filter_discards; 340 p_common->gft_filter_drop = stats.common.gft_filter_drop; 341 342 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 343 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 344 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 345 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 346 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 347 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 348 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 349 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 350 p_common->coalesced_events = stats.common.tpa_coalesced_events; 351 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 352 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 353 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 354 355 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 356 p_common->rx_65_to_127_byte_packets = 357 stats.common.rx_65_to_127_byte_packets; 358 p_common->rx_128_to_255_byte_packets = 359 stats.common.rx_128_to_255_byte_packets; 360 p_common->rx_256_to_511_byte_packets = 361 stats.common.rx_256_to_511_byte_packets; 362 p_common->rx_512_to_1023_byte_packets = 363 stats.common.rx_512_to_1023_byte_packets; 364 p_common->rx_1024_to_1518_byte_packets = 365 stats.common.rx_1024_to_1518_byte_packets; 366 p_common->rx_crc_errors = stats.common.rx_crc_errors; 367 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 368 p_common->rx_pause_frames = stats.common.rx_pause_frames; 369 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 370 p_common->rx_align_errors = stats.common.rx_align_errors; 371 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 372 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 373 p_common->rx_jabbers = stats.common.rx_jabbers; 374 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 375 p_common->rx_fragments = stats.common.rx_fragments; 376 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 377 p_common->tx_65_to_127_byte_packets = 378 stats.common.tx_65_to_127_byte_packets; 379 p_common->tx_128_to_255_byte_packets = 380 stats.common.tx_128_to_255_byte_packets; 381 p_common->tx_256_to_511_byte_packets = 382 stats.common.tx_256_to_511_byte_packets; 383 p_common->tx_512_to_1023_byte_packets = 384 stats.common.tx_512_to_1023_byte_packets; 385 p_common->tx_1024_to_1518_byte_packets = 386 stats.common.tx_1024_to_1518_byte_packets; 387 p_common->tx_pause_frames = stats.common.tx_pause_frames; 388 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 389 p_common->brb_truncates = stats.common.brb_truncates; 390 p_common->brb_discards = stats.common.brb_discards; 391 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 392 p_common->link_change_count = stats.common.link_change_count; 393 394 if (QEDE_IS_BB(edev)) { 395 struct qede_stats_bb *p_bb = &edev->stats.bb; 396 397 p_bb->rx_1519_to_1522_byte_packets = 398 stats.bb.rx_1519_to_1522_byte_packets; 399 p_bb->rx_1519_to_2047_byte_packets = 400 stats.bb.rx_1519_to_2047_byte_packets; 401 p_bb->rx_2048_to_4095_byte_packets = 402 stats.bb.rx_2048_to_4095_byte_packets; 403 p_bb->rx_4096_to_9216_byte_packets = 404 stats.bb.rx_4096_to_9216_byte_packets; 405 p_bb->rx_9217_to_16383_byte_packets = 406 stats.bb.rx_9217_to_16383_byte_packets; 407 p_bb->tx_1519_to_2047_byte_packets = 408 stats.bb.tx_1519_to_2047_byte_packets; 409 p_bb->tx_2048_to_4095_byte_packets = 410 stats.bb.tx_2048_to_4095_byte_packets; 411 p_bb->tx_4096_to_9216_byte_packets = 412 stats.bb.tx_4096_to_9216_byte_packets; 413 p_bb->tx_9217_to_16383_byte_packets = 414 stats.bb.tx_9217_to_16383_byte_packets; 415 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 416 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 417 } else { 418 struct qede_stats_ah *p_ah = &edev->stats.ah; 419 420 p_ah->rx_1519_to_max_byte_packets = 421 stats.ah.rx_1519_to_max_byte_packets; 422 p_ah->tx_1519_to_max_byte_packets = 423 stats.ah.tx_1519_to_max_byte_packets; 424 } 425 } 426 427 static void qede_get_stats64(struct net_device *dev, 428 struct rtnl_link_stats64 *stats) 429 { 430 struct qede_dev *edev = netdev_priv(dev); 431 struct qede_stats_common *p_common; 432 433 qede_fill_by_demand_stats(edev); 434 p_common = &edev->stats.common; 435 436 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 437 p_common->rx_bcast_pkts; 438 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 439 p_common->tx_bcast_pkts; 440 441 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 442 p_common->rx_bcast_bytes; 443 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 444 p_common->tx_bcast_bytes; 445 446 stats->tx_errors = p_common->tx_err_drop_pkts; 447 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 448 449 stats->rx_fifo_errors = p_common->no_buff_discards; 450 451 if (QEDE_IS_BB(edev)) 452 stats->collisions = edev->stats.bb.tx_total_collisions; 453 stats->rx_crc_errors = p_common->rx_crc_errors; 454 stats->rx_frame_errors = p_common->rx_align_errors; 455 } 456 457 #ifdef CONFIG_QED_SRIOV 458 static int qede_get_vf_config(struct net_device *dev, int vfidx, 459 struct ifla_vf_info *ivi) 460 { 461 struct qede_dev *edev = netdev_priv(dev); 462 463 if (!edev->ops) 464 return -EINVAL; 465 466 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 467 } 468 469 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 470 int min_tx_rate, int max_tx_rate) 471 { 472 struct qede_dev *edev = netdev_priv(dev); 473 474 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 475 max_tx_rate); 476 } 477 478 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 479 { 480 struct qede_dev *edev = netdev_priv(dev); 481 482 if (!edev->ops) 483 return -EINVAL; 484 485 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 486 } 487 488 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 489 int link_state) 490 { 491 struct qede_dev *edev = netdev_priv(dev); 492 493 if (!edev->ops) 494 return -EINVAL; 495 496 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 497 } 498 499 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 500 { 501 struct qede_dev *edev = netdev_priv(dev); 502 503 if (!edev->ops) 504 return -EINVAL; 505 506 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 507 } 508 #endif 509 510 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 511 { 512 struct qede_dev *edev = netdev_priv(dev); 513 514 if (!netif_running(dev)) 515 return -EAGAIN; 516 517 switch (cmd) { 518 case SIOCSHWTSTAMP: 519 return qede_ptp_hw_ts(edev, ifr); 520 default: 521 DP_VERBOSE(edev, QED_MSG_DEBUG, 522 "default IOCTL cmd 0x%x\n", cmd); 523 return -EOPNOTSUPP; 524 } 525 526 return 0; 527 } 528 529 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 530 { 531 struct qede_dev *edev = netdev_priv(ndev); 532 int cos, count, offset; 533 534 if (num_tc > edev->dev_info.num_tc) 535 return -EINVAL; 536 537 netdev_reset_tc(ndev); 538 netdev_set_num_tc(ndev, num_tc); 539 540 for_each_cos_in_txq(edev, cos) { 541 count = QEDE_TSS_COUNT(edev); 542 offset = cos * QEDE_TSS_COUNT(edev); 543 netdev_set_tc_queue(ndev, cos, count, offset); 544 } 545 546 return 0; 547 } 548 549 static int 550 qede_set_flower(struct qede_dev *edev, struct tc_cls_flower_offload *f, 551 __be16 proto) 552 { 553 switch (f->command) { 554 case TC_CLSFLOWER_REPLACE: 555 return qede_add_tc_flower_fltr(edev, proto, f); 556 case TC_CLSFLOWER_DESTROY: 557 return qede_delete_flow_filter(edev, f->cookie); 558 default: 559 return -EOPNOTSUPP; 560 } 561 } 562 563 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 564 void *cb_priv) 565 { 566 struct tc_cls_flower_offload *f; 567 struct qede_dev *edev = cb_priv; 568 569 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 570 return -EOPNOTSUPP; 571 572 switch (type) { 573 case TC_SETUP_CLSFLOWER: 574 f = type_data; 575 return qede_set_flower(edev, f, f->common.protocol); 576 default: 577 return -EOPNOTSUPP; 578 } 579 } 580 581 static int qede_setup_tc_block(struct qede_dev *edev, 582 struct tc_block_offload *f) 583 { 584 if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) 585 return -EOPNOTSUPP; 586 587 switch (f->command) { 588 case TC_BLOCK_BIND: 589 return tcf_block_cb_register(f->block, 590 qede_setup_tc_block_cb, 591 edev, edev, f->extack); 592 case TC_BLOCK_UNBIND: 593 tcf_block_cb_unregister(f->block, qede_setup_tc_block_cb, edev); 594 return 0; 595 default: 596 return -EOPNOTSUPP; 597 } 598 } 599 600 static int 601 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 602 void *type_data) 603 { 604 struct qede_dev *edev = netdev_priv(dev); 605 struct tc_mqprio_qopt *mqprio; 606 607 switch (type) { 608 case TC_SETUP_BLOCK: 609 return qede_setup_tc_block(edev, type_data); 610 case TC_SETUP_QDISC_MQPRIO: 611 mqprio = type_data; 612 613 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 614 return qede_setup_tc(dev, mqprio->num_tc); 615 default: 616 return -EOPNOTSUPP; 617 } 618 } 619 620 static const struct net_device_ops qede_netdev_ops = { 621 .ndo_open = qede_open, 622 .ndo_stop = qede_close, 623 .ndo_start_xmit = qede_start_xmit, 624 .ndo_set_rx_mode = qede_set_rx_mode, 625 .ndo_set_mac_address = qede_set_mac_addr, 626 .ndo_validate_addr = eth_validate_addr, 627 .ndo_change_mtu = qede_change_mtu, 628 .ndo_do_ioctl = qede_ioctl, 629 #ifdef CONFIG_QED_SRIOV 630 .ndo_set_vf_mac = qede_set_vf_mac, 631 .ndo_set_vf_vlan = qede_set_vf_vlan, 632 .ndo_set_vf_trust = qede_set_vf_trust, 633 #endif 634 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 635 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 636 .ndo_fix_features = qede_fix_features, 637 .ndo_set_features = qede_set_features, 638 .ndo_get_stats64 = qede_get_stats64, 639 #ifdef CONFIG_QED_SRIOV 640 .ndo_set_vf_link_state = qede_set_vf_link_state, 641 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 642 .ndo_get_vf_config = qede_get_vf_config, 643 .ndo_set_vf_rate = qede_set_vf_rate, 644 #endif 645 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 646 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 647 .ndo_features_check = qede_features_check, 648 .ndo_bpf = qede_xdp, 649 #ifdef CONFIG_RFS_ACCEL 650 .ndo_rx_flow_steer = qede_rx_flow_steer, 651 #endif 652 .ndo_setup_tc = qede_setup_tc_offload, 653 }; 654 655 static const struct net_device_ops qede_netdev_vf_ops = { 656 .ndo_open = qede_open, 657 .ndo_stop = qede_close, 658 .ndo_start_xmit = qede_start_xmit, 659 .ndo_set_rx_mode = qede_set_rx_mode, 660 .ndo_set_mac_address = qede_set_mac_addr, 661 .ndo_validate_addr = eth_validate_addr, 662 .ndo_change_mtu = qede_change_mtu, 663 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 664 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 665 .ndo_fix_features = qede_fix_features, 666 .ndo_set_features = qede_set_features, 667 .ndo_get_stats64 = qede_get_stats64, 668 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 669 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 670 .ndo_features_check = qede_features_check, 671 }; 672 673 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 674 .ndo_open = qede_open, 675 .ndo_stop = qede_close, 676 .ndo_start_xmit = qede_start_xmit, 677 .ndo_set_rx_mode = qede_set_rx_mode, 678 .ndo_set_mac_address = qede_set_mac_addr, 679 .ndo_validate_addr = eth_validate_addr, 680 .ndo_change_mtu = qede_change_mtu, 681 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 682 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 683 .ndo_fix_features = qede_fix_features, 684 .ndo_set_features = qede_set_features, 685 .ndo_get_stats64 = qede_get_stats64, 686 .ndo_udp_tunnel_add = qede_udp_tunnel_add, 687 .ndo_udp_tunnel_del = qede_udp_tunnel_del, 688 .ndo_features_check = qede_features_check, 689 .ndo_bpf = qede_xdp, 690 }; 691 692 /* ------------------------------------------------------------------------- 693 * START OF PROBE / REMOVE 694 * ------------------------------------------------------------------------- 695 */ 696 697 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 698 struct pci_dev *pdev, 699 struct qed_dev_eth_info *info, 700 u32 dp_module, u8 dp_level) 701 { 702 struct net_device *ndev; 703 struct qede_dev *edev; 704 705 ndev = alloc_etherdev_mqs(sizeof(*edev), 706 info->num_queues * info->num_tc, 707 info->num_queues); 708 if (!ndev) { 709 pr_err("etherdev allocation failed\n"); 710 return NULL; 711 } 712 713 edev = netdev_priv(ndev); 714 edev->ndev = ndev; 715 edev->cdev = cdev; 716 edev->pdev = pdev; 717 edev->dp_module = dp_module; 718 edev->dp_level = dp_level; 719 edev->ops = qed_ops; 720 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 721 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 722 723 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 724 info->num_queues, info->num_queues); 725 726 SET_NETDEV_DEV(ndev, &pdev->dev); 727 728 memset(&edev->stats, 0, sizeof(edev->stats)); 729 memcpy(&edev->dev_info, info, sizeof(*info)); 730 731 /* As ethtool doesn't have the ability to show WoL behavior as 732 * 'default', if device supports it declare it's enabled. 733 */ 734 if (edev->dev_info.common.wol_support) 735 edev->wol_enabled = true; 736 737 INIT_LIST_HEAD(&edev->vlan_list); 738 739 return edev; 740 } 741 742 static void qede_init_ndev(struct qede_dev *edev) 743 { 744 struct net_device *ndev = edev->ndev; 745 struct pci_dev *pdev = edev->pdev; 746 bool udp_tunnel_enable = false; 747 netdev_features_t hw_features; 748 749 pci_set_drvdata(pdev, ndev); 750 751 ndev->mem_start = edev->dev_info.common.pci_mem_start; 752 ndev->base_addr = ndev->mem_start; 753 ndev->mem_end = edev->dev_info.common.pci_mem_end; 754 ndev->irq = edev->dev_info.common.pci_irq; 755 756 ndev->watchdog_timeo = TX_TIMEOUT; 757 758 if (IS_VF(edev)) { 759 if (edev->dev_info.xdp_supported) 760 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 761 else 762 ndev->netdev_ops = &qede_netdev_vf_ops; 763 } else { 764 ndev->netdev_ops = &qede_netdev_ops; 765 } 766 767 qede_set_ethtool_ops(ndev); 768 769 ndev->priv_flags |= IFF_UNICAST_FLT; 770 771 /* user-changeble features */ 772 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 773 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 774 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 775 776 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) 777 hw_features |= NETIF_F_NTUPLE; 778 779 if (edev->dev_info.common.vxlan_enable || 780 edev->dev_info.common.geneve_enable) 781 udp_tunnel_enable = true; 782 783 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 784 hw_features |= NETIF_F_TSO_ECN; 785 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 786 NETIF_F_SG | NETIF_F_TSO | 787 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 788 NETIF_F_RXCSUM; 789 } 790 791 if (udp_tunnel_enable) { 792 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 793 NETIF_F_GSO_UDP_TUNNEL_CSUM); 794 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 795 NETIF_F_GSO_UDP_TUNNEL_CSUM); 796 } 797 798 if (edev->dev_info.common.gre_enable) { 799 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 800 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 801 NETIF_F_GSO_GRE_CSUM); 802 } 803 804 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 805 NETIF_F_HIGHDMA; 806 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 807 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 808 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 809 810 ndev->hw_features = hw_features; 811 812 /* MTU range: 46 - 9600 */ 813 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 814 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 815 816 /* Set network device HW mac */ 817 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 818 819 ndev->mtu = edev->dev_info.common.mtu; 820 } 821 822 /* This function converts from 32b param to two params of level and module 823 * Input 32b decoding: 824 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 825 * 'happy' flow, e.g. memory allocation failed. 826 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 827 * and provide important parameters. 828 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 829 * module. VERBOSE prints are for tracking the specific flow in low level. 830 * 831 * Notice that the level should be that of the lowest required logs. 832 */ 833 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 834 { 835 *p_dp_level = QED_LEVEL_NOTICE; 836 *p_dp_module = 0; 837 838 if (debug & QED_LOG_VERBOSE_MASK) { 839 *p_dp_level = QED_LEVEL_VERBOSE; 840 *p_dp_module = (debug & 0x3FFFFFFF); 841 } else if (debug & QED_LOG_INFO_MASK) { 842 *p_dp_level = QED_LEVEL_INFO; 843 } else if (debug & QED_LOG_NOTICE_MASK) { 844 *p_dp_level = QED_LEVEL_NOTICE; 845 } 846 } 847 848 static void qede_free_fp_array(struct qede_dev *edev) 849 { 850 if (edev->fp_array) { 851 struct qede_fastpath *fp; 852 int i; 853 854 for_each_queue(i) { 855 fp = &edev->fp_array[i]; 856 857 kfree(fp->sb_info); 858 /* Handle mem alloc failure case where qede_init_fp 859 * didn't register xdp_rxq_info yet. 860 * Implicit only (fp->type & QEDE_FASTPATH_RX) 861 */ 862 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 863 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 864 kfree(fp->rxq); 865 kfree(fp->xdp_tx); 866 kfree(fp->txq); 867 } 868 kfree(edev->fp_array); 869 } 870 871 edev->num_queues = 0; 872 edev->fp_num_tx = 0; 873 edev->fp_num_rx = 0; 874 } 875 876 static int qede_alloc_fp_array(struct qede_dev *edev) 877 { 878 u8 fp_combined, fp_rx = edev->fp_num_rx; 879 struct qede_fastpath *fp; 880 int i; 881 882 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 883 sizeof(*edev->fp_array), GFP_KERNEL); 884 if (!edev->fp_array) { 885 DP_NOTICE(edev, "fp array allocation failed\n"); 886 goto err; 887 } 888 889 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 890 891 /* Allocate the FP elements for Rx queues followed by combined and then 892 * the Tx. This ordering should be maintained so that the respective 893 * queues (Rx or Tx) will be together in the fastpath array and the 894 * associated ids will be sequential. 895 */ 896 for_each_queue(i) { 897 fp = &edev->fp_array[i]; 898 899 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 900 if (!fp->sb_info) { 901 DP_NOTICE(edev, "sb info struct allocation failed\n"); 902 goto err; 903 } 904 905 if (fp_rx) { 906 fp->type = QEDE_FASTPATH_RX; 907 fp_rx--; 908 } else if (fp_combined) { 909 fp->type = QEDE_FASTPATH_COMBINED; 910 fp_combined--; 911 } else { 912 fp->type = QEDE_FASTPATH_TX; 913 } 914 915 if (fp->type & QEDE_FASTPATH_TX) { 916 fp->txq = kcalloc(edev->dev_info.num_tc, 917 sizeof(*fp->txq), GFP_KERNEL); 918 if (!fp->txq) 919 goto err; 920 } 921 922 if (fp->type & QEDE_FASTPATH_RX) { 923 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 924 if (!fp->rxq) 925 goto err; 926 927 if (edev->xdp_prog) { 928 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 929 GFP_KERNEL); 930 if (!fp->xdp_tx) 931 goto err; 932 fp->type |= QEDE_FASTPATH_XDP; 933 } 934 } 935 } 936 937 return 0; 938 err: 939 qede_free_fp_array(edev); 940 return -ENOMEM; 941 } 942 943 /* The qede lock is used to protect driver state change and driver flows that 944 * are not reentrant. 945 */ 946 void __qede_lock(struct qede_dev *edev) 947 { 948 mutex_lock(&edev->qede_lock); 949 } 950 951 void __qede_unlock(struct qede_dev *edev) 952 { 953 mutex_unlock(&edev->qede_lock); 954 } 955 956 /* This version of the lock should be used when acquiring the RTNL lock is also 957 * needed in addition to the internal qede lock. 958 */ 959 void qede_lock(struct qede_dev *edev) 960 { 961 rtnl_lock(); 962 __qede_lock(edev); 963 } 964 965 void qede_unlock(struct qede_dev *edev) 966 { 967 __qede_unlock(edev); 968 rtnl_unlock(); 969 } 970 971 static void qede_sp_task(struct work_struct *work) 972 { 973 struct qede_dev *edev = container_of(work, struct qede_dev, 974 sp_task.work); 975 976 /* The locking scheme depends on the specific flag: 977 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 978 * ensure that ongoing flows are ended and new ones are not started. 979 * In other cases - only the internal qede lock should be acquired. 980 */ 981 982 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 983 #ifdef CONFIG_QED_SRIOV 984 /* SRIOV must be disabled outside the lock to avoid a deadlock. 985 * The recovery of the active VFs is currently not supported. 986 */ 987 qede_sriov_configure(edev->pdev, 0); 988 #endif 989 qede_lock(edev); 990 qede_recovery_handler(edev); 991 qede_unlock(edev); 992 } 993 994 __qede_lock(edev); 995 996 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 997 if (edev->state == QEDE_STATE_OPEN) 998 qede_config_rx_mode(edev->ndev); 999 1000 #ifdef CONFIG_RFS_ACCEL 1001 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1002 if (edev->state == QEDE_STATE_OPEN) 1003 qede_process_arfs_filters(edev, false); 1004 } 1005 #endif 1006 __qede_unlock(edev); 1007 } 1008 1009 static void qede_update_pf_params(struct qed_dev *cdev) 1010 { 1011 struct qed_pf_params pf_params; 1012 u16 num_cons; 1013 1014 /* 64 rx + 64 tx + 64 XDP */ 1015 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1016 1017 /* 1 rx + 1 xdp + max tx cos */ 1018 num_cons = QED_MIN_L2_CONS; 1019 1020 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1021 1022 /* Same for VFs - make sure they'll have sufficient connections 1023 * to support XDP Tx queues. 1024 */ 1025 pf_params.eth_pf_params.num_vf_cons = 48; 1026 1027 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1028 qed_ops->common->update_pf_params(cdev, &pf_params); 1029 } 1030 1031 #define QEDE_FW_VER_STR_SIZE 80 1032 1033 static void qede_log_probe(struct qede_dev *edev) 1034 { 1035 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1036 u8 buf[QEDE_FW_VER_STR_SIZE]; 1037 size_t left_size; 1038 1039 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1040 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1041 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1042 p_dev_info->fw_eng, 1043 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1044 QED_MFW_VERSION_3_OFFSET, 1045 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1046 QED_MFW_VERSION_2_OFFSET, 1047 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1048 QED_MFW_VERSION_1_OFFSET, 1049 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1050 QED_MFW_VERSION_0_OFFSET); 1051 1052 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1053 if (p_dev_info->mbi_version && left_size) 1054 snprintf(buf + strlen(buf), left_size, 1055 " [MBI %d.%d.%d]", 1056 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1057 QED_MBI_VERSION_2_OFFSET, 1058 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1059 QED_MBI_VERSION_1_OFFSET, 1060 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1061 QED_MBI_VERSION_0_OFFSET); 1062 1063 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1064 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1065 buf, edev->ndev->name); 1066 } 1067 1068 enum qede_probe_mode { 1069 QEDE_PROBE_NORMAL, 1070 QEDE_PROBE_RECOVERY, 1071 }; 1072 1073 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1074 bool is_vf, enum qede_probe_mode mode) 1075 { 1076 struct qed_probe_params probe_params; 1077 struct qed_slowpath_params sp_params; 1078 struct qed_dev_eth_info dev_info; 1079 struct qede_dev *edev; 1080 struct qed_dev *cdev; 1081 int rc; 1082 1083 if (unlikely(dp_level & QED_LEVEL_INFO)) 1084 pr_notice("Starting qede probe\n"); 1085 1086 memset(&probe_params, 0, sizeof(probe_params)); 1087 probe_params.protocol = QED_PROTOCOL_ETH; 1088 probe_params.dp_module = dp_module; 1089 probe_params.dp_level = dp_level; 1090 probe_params.is_vf = is_vf; 1091 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1092 cdev = qed_ops->common->probe(pdev, &probe_params); 1093 if (!cdev) { 1094 rc = -ENODEV; 1095 goto err0; 1096 } 1097 1098 qede_update_pf_params(cdev); 1099 1100 /* Start the Slowpath-process */ 1101 memset(&sp_params, 0, sizeof(sp_params)); 1102 sp_params.int_mode = QED_INT_MODE_MSIX; 1103 sp_params.drv_major = QEDE_MAJOR_VERSION; 1104 sp_params.drv_minor = QEDE_MINOR_VERSION; 1105 sp_params.drv_rev = QEDE_REVISION_VERSION; 1106 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 1107 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1108 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1109 if (rc) { 1110 pr_notice("Cannot start slowpath\n"); 1111 goto err1; 1112 } 1113 1114 /* Learn information crucial for qede to progress */ 1115 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1116 if (rc) 1117 goto err2; 1118 1119 if (mode != QEDE_PROBE_RECOVERY) { 1120 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1121 dp_level); 1122 if (!edev) { 1123 rc = -ENOMEM; 1124 goto err2; 1125 } 1126 } else { 1127 struct net_device *ndev = pci_get_drvdata(pdev); 1128 1129 edev = netdev_priv(ndev); 1130 edev->cdev = cdev; 1131 memset(&edev->stats, 0, sizeof(edev->stats)); 1132 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1133 } 1134 1135 if (is_vf) 1136 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1137 1138 qede_init_ndev(edev); 1139 1140 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1141 if (rc) 1142 goto err3; 1143 1144 if (mode != QEDE_PROBE_RECOVERY) { 1145 /* Prepare the lock prior to the registration of the netdev, 1146 * as once it's registered we might reach flows requiring it 1147 * [it's even possible to reach a flow needing it directly 1148 * from there, although it's unlikely]. 1149 */ 1150 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1151 mutex_init(&edev->qede_lock); 1152 1153 rc = register_netdev(edev->ndev); 1154 if (rc) { 1155 DP_NOTICE(edev, "Cannot register net-device\n"); 1156 goto err4; 1157 } 1158 } 1159 1160 edev->ops->common->set_name(cdev, edev->ndev->name); 1161 1162 /* PTP not supported on VFs */ 1163 if (!is_vf) 1164 qede_ptp_enable(edev, (mode == QEDE_PROBE_NORMAL)); 1165 1166 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1167 1168 #ifdef CONFIG_DCB 1169 if (!IS_VF(edev)) 1170 qede_set_dcbnl_ops(edev->ndev); 1171 #endif 1172 1173 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1174 1175 qede_log_probe(edev); 1176 return 0; 1177 1178 err4: 1179 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1180 err3: 1181 free_netdev(edev->ndev); 1182 err2: 1183 qed_ops->common->slowpath_stop(cdev); 1184 err1: 1185 qed_ops->common->remove(cdev); 1186 err0: 1187 return rc; 1188 } 1189 1190 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1191 { 1192 bool is_vf = false; 1193 u32 dp_module = 0; 1194 u8 dp_level = 0; 1195 1196 switch ((enum qede_pci_private)id->driver_data) { 1197 case QEDE_PRIVATE_VF: 1198 if (debug & QED_LOG_VERBOSE_MASK) 1199 dev_err(&pdev->dev, "Probing a VF\n"); 1200 is_vf = true; 1201 break; 1202 default: 1203 if (debug & QED_LOG_VERBOSE_MASK) 1204 dev_err(&pdev->dev, "Probing a PF\n"); 1205 } 1206 1207 qede_config_debug(debug, &dp_module, &dp_level); 1208 1209 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1210 QEDE_PROBE_NORMAL); 1211 } 1212 1213 enum qede_remove_mode { 1214 QEDE_REMOVE_NORMAL, 1215 QEDE_REMOVE_RECOVERY, 1216 }; 1217 1218 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1219 { 1220 struct net_device *ndev = pci_get_drvdata(pdev); 1221 struct qede_dev *edev = netdev_priv(ndev); 1222 struct qed_dev *cdev = edev->cdev; 1223 1224 DP_INFO(edev, "Starting qede_remove\n"); 1225 1226 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1227 1228 if (mode != QEDE_REMOVE_RECOVERY) { 1229 unregister_netdev(ndev); 1230 1231 cancel_delayed_work_sync(&edev->sp_task); 1232 1233 edev->ops->common->set_power_state(cdev, PCI_D0); 1234 1235 pci_set_drvdata(pdev, NULL); 1236 } 1237 1238 qede_ptp_disable(edev); 1239 1240 /* Use global ops since we've freed edev */ 1241 qed_ops->common->slowpath_stop(cdev); 1242 if (system_state == SYSTEM_POWER_OFF) 1243 return; 1244 qed_ops->common->remove(cdev); 1245 1246 /* Since this can happen out-of-sync with other flows, 1247 * don't release the netdevice until after slowpath stop 1248 * has been called to guarantee various other contexts 1249 * [e.g., QED register callbacks] won't break anything when 1250 * accessing the netdevice. 1251 */ 1252 if (mode != QEDE_REMOVE_RECOVERY) 1253 free_netdev(ndev); 1254 1255 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1256 } 1257 1258 static void qede_remove(struct pci_dev *pdev) 1259 { 1260 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1261 } 1262 1263 static void qede_shutdown(struct pci_dev *pdev) 1264 { 1265 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1266 } 1267 1268 /* ------------------------------------------------------------------------- 1269 * START OF LOAD / UNLOAD 1270 * ------------------------------------------------------------------------- 1271 */ 1272 1273 static int qede_set_num_queues(struct qede_dev *edev) 1274 { 1275 int rc; 1276 u16 rss_num; 1277 1278 /* Setup queues according to possible resources*/ 1279 if (edev->req_queues) 1280 rss_num = edev->req_queues; 1281 else 1282 rss_num = netif_get_num_default_rss_queues() * 1283 edev->dev_info.common.num_hwfns; 1284 1285 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1286 1287 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1288 if (rc > 0) { 1289 /* Managed to request interrupts for our queues */ 1290 edev->num_queues = rc; 1291 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1292 QEDE_QUEUE_CNT(edev), rss_num); 1293 rc = 0; 1294 } 1295 1296 edev->fp_num_tx = edev->req_num_tx; 1297 edev->fp_num_rx = edev->req_num_rx; 1298 1299 return rc; 1300 } 1301 1302 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1303 u16 sb_id) 1304 { 1305 if (sb_info->sb_virt) { 1306 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id); 1307 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1308 (void *)sb_info->sb_virt, sb_info->sb_phys); 1309 memset(sb_info, 0, sizeof(*sb_info)); 1310 } 1311 } 1312 1313 /* This function allocates fast-path status block memory */ 1314 static int qede_alloc_mem_sb(struct qede_dev *edev, 1315 struct qed_sb_info *sb_info, u16 sb_id) 1316 { 1317 struct status_block_e4 *sb_virt; 1318 dma_addr_t sb_phys; 1319 int rc; 1320 1321 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1322 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1323 if (!sb_virt) { 1324 DP_ERR(edev, "Status block allocation failed\n"); 1325 return -ENOMEM; 1326 } 1327 1328 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1329 sb_virt, sb_phys, sb_id, 1330 QED_SB_TYPE_L2_QUEUE); 1331 if (rc) { 1332 DP_ERR(edev, "Status block initialization failed\n"); 1333 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1334 sb_virt, sb_phys); 1335 return rc; 1336 } 1337 1338 return 0; 1339 } 1340 1341 static void qede_free_rx_buffers(struct qede_dev *edev, 1342 struct qede_rx_queue *rxq) 1343 { 1344 u16 i; 1345 1346 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1347 struct sw_rx_data *rx_buf; 1348 struct page *data; 1349 1350 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1351 data = rx_buf->data; 1352 1353 dma_unmap_page(&edev->pdev->dev, 1354 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1355 1356 rx_buf->data = NULL; 1357 __free_page(data); 1358 } 1359 } 1360 1361 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1362 { 1363 /* Free rx buffers */ 1364 qede_free_rx_buffers(edev, rxq); 1365 1366 /* Free the parallel SW ring */ 1367 kfree(rxq->sw_rx_ring); 1368 1369 /* Free the real RQ ring used by FW */ 1370 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1371 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1372 } 1373 1374 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1375 { 1376 int i; 1377 1378 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1379 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1380 1381 tpa_info->state = QEDE_AGG_STATE_NONE; 1382 } 1383 } 1384 1385 /* This function allocates all memory needed per Rx queue */ 1386 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1387 { 1388 int i, rc, size; 1389 1390 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1391 1392 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1393 1394 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1395 size = rxq->rx_headroom + 1396 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1397 1398 /* Make sure that the headroom and payload fit in a single page */ 1399 if (rxq->rx_buf_size + size > PAGE_SIZE) 1400 rxq->rx_buf_size = PAGE_SIZE - size; 1401 1402 /* Segment size to spilt a page in multiple equal parts , 1403 * unless XDP is used in which case we'd use the entire page. 1404 */ 1405 if (!edev->xdp_prog) { 1406 size = size + rxq->rx_buf_size; 1407 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1408 } else { 1409 rxq->rx_buf_seg_size = PAGE_SIZE; 1410 } 1411 1412 /* Allocate the parallel driver ring for Rx buffers */ 1413 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1414 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1415 if (!rxq->sw_rx_ring) { 1416 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1417 rc = -ENOMEM; 1418 goto err; 1419 } 1420 1421 /* Allocate FW Rx ring */ 1422 rc = edev->ops->common->chain_alloc(edev->cdev, 1423 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1424 QED_CHAIN_MODE_NEXT_PTR, 1425 QED_CHAIN_CNT_TYPE_U16, 1426 RX_RING_SIZE, 1427 sizeof(struct eth_rx_bd), 1428 &rxq->rx_bd_ring, NULL); 1429 if (rc) 1430 goto err; 1431 1432 /* Allocate FW completion ring */ 1433 rc = edev->ops->common->chain_alloc(edev->cdev, 1434 QED_CHAIN_USE_TO_CONSUME, 1435 QED_CHAIN_MODE_PBL, 1436 QED_CHAIN_CNT_TYPE_U16, 1437 RX_RING_SIZE, 1438 sizeof(union eth_rx_cqe), 1439 &rxq->rx_comp_ring, NULL); 1440 if (rc) 1441 goto err; 1442 1443 /* Allocate buffers for the Rx ring */ 1444 rxq->filled_buffers = 0; 1445 for (i = 0; i < rxq->num_rx_buffers; i++) { 1446 rc = qede_alloc_rx_buffer(rxq, false); 1447 if (rc) { 1448 DP_ERR(edev, 1449 "Rx buffers allocation failed at index %d\n", i); 1450 goto err; 1451 } 1452 } 1453 1454 if (!edev->gro_disable) 1455 qede_set_tpa_param(rxq); 1456 err: 1457 return rc; 1458 } 1459 1460 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1461 { 1462 /* Free the parallel SW ring */ 1463 if (txq->is_xdp) 1464 kfree(txq->sw_tx_ring.xdp); 1465 else 1466 kfree(txq->sw_tx_ring.skbs); 1467 1468 /* Free the real RQ ring used by FW */ 1469 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1470 } 1471 1472 /* This function allocates all memory needed per Tx queue */ 1473 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1474 { 1475 union eth_tx_bd_types *p_virt; 1476 int size, rc; 1477 1478 txq->num_tx_buffers = edev->q_num_tx_buffers; 1479 1480 /* Allocate the parallel driver ring for Tx buffers */ 1481 if (txq->is_xdp) { 1482 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1483 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1484 if (!txq->sw_tx_ring.xdp) 1485 goto err; 1486 } else { 1487 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1488 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1489 if (!txq->sw_tx_ring.skbs) 1490 goto err; 1491 } 1492 1493 rc = edev->ops->common->chain_alloc(edev->cdev, 1494 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1495 QED_CHAIN_MODE_PBL, 1496 QED_CHAIN_CNT_TYPE_U16, 1497 txq->num_tx_buffers, 1498 sizeof(*p_virt), 1499 &txq->tx_pbl, NULL); 1500 if (rc) 1501 goto err; 1502 1503 return 0; 1504 1505 err: 1506 qede_free_mem_txq(edev, txq); 1507 return -ENOMEM; 1508 } 1509 1510 /* This function frees all memory of a single fp */ 1511 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1512 { 1513 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1514 1515 if (fp->type & QEDE_FASTPATH_RX) 1516 qede_free_mem_rxq(edev, fp->rxq); 1517 1518 if (fp->type & QEDE_FASTPATH_XDP) 1519 qede_free_mem_txq(edev, fp->xdp_tx); 1520 1521 if (fp->type & QEDE_FASTPATH_TX) { 1522 int cos; 1523 1524 for_each_cos_in_txq(edev, cos) 1525 qede_free_mem_txq(edev, &fp->txq[cos]); 1526 } 1527 } 1528 1529 /* This function allocates all memory needed for a single fp (i.e. an entity 1530 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1531 */ 1532 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1533 { 1534 int rc = 0; 1535 1536 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1537 if (rc) 1538 goto out; 1539 1540 if (fp->type & QEDE_FASTPATH_RX) { 1541 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1542 if (rc) 1543 goto out; 1544 } 1545 1546 if (fp->type & QEDE_FASTPATH_XDP) { 1547 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1548 if (rc) 1549 goto out; 1550 } 1551 1552 if (fp->type & QEDE_FASTPATH_TX) { 1553 int cos; 1554 1555 for_each_cos_in_txq(edev, cos) { 1556 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1557 if (rc) 1558 goto out; 1559 } 1560 } 1561 1562 out: 1563 return rc; 1564 } 1565 1566 static void qede_free_mem_load(struct qede_dev *edev) 1567 { 1568 int i; 1569 1570 for_each_queue(i) { 1571 struct qede_fastpath *fp = &edev->fp_array[i]; 1572 1573 qede_free_mem_fp(edev, fp); 1574 } 1575 } 1576 1577 /* This function allocates all qede memory at NIC load. */ 1578 static int qede_alloc_mem_load(struct qede_dev *edev) 1579 { 1580 int rc = 0, queue_id; 1581 1582 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1583 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1584 1585 rc = qede_alloc_mem_fp(edev, fp); 1586 if (rc) { 1587 DP_ERR(edev, 1588 "Failed to allocate memory for fastpath - rss id = %d\n", 1589 queue_id); 1590 qede_free_mem_load(edev); 1591 return rc; 1592 } 1593 } 1594 1595 return 0; 1596 } 1597 1598 static void qede_empty_tx_queue(struct qede_dev *edev, 1599 struct qede_tx_queue *txq) 1600 { 1601 unsigned int pkts_compl = 0, bytes_compl = 0; 1602 struct netdev_queue *netdev_txq; 1603 int rc, len = 0; 1604 1605 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1606 1607 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1608 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1609 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1610 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1611 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1612 qed_chain_get_prod_idx(&txq->tx_pbl)); 1613 1614 rc = qede_free_tx_pkt(edev, txq, &len); 1615 if (rc) { 1616 DP_NOTICE(edev, 1617 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1618 txq->index, 1619 qed_chain_get_cons_idx(&txq->tx_pbl), 1620 qed_chain_get_prod_idx(&txq->tx_pbl)); 1621 break; 1622 } 1623 1624 bytes_compl += len; 1625 pkts_compl++; 1626 txq->sw_tx_cons++; 1627 } 1628 1629 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1630 } 1631 1632 static void qede_empty_tx_queues(struct qede_dev *edev) 1633 { 1634 int i; 1635 1636 for_each_queue(i) 1637 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1638 int cos; 1639 1640 for_each_cos_in_txq(edev, cos) { 1641 struct qede_fastpath *fp; 1642 1643 fp = &edev->fp_array[i]; 1644 qede_empty_tx_queue(edev, 1645 &fp->txq[cos]); 1646 } 1647 } 1648 } 1649 1650 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1651 static void qede_init_fp(struct qede_dev *edev) 1652 { 1653 int queue_id, rxq_index = 0, txq_index = 0; 1654 struct qede_fastpath *fp; 1655 1656 for_each_queue(queue_id) { 1657 fp = &edev->fp_array[queue_id]; 1658 1659 fp->edev = edev; 1660 fp->id = queue_id; 1661 1662 if (fp->type & QEDE_FASTPATH_XDP) { 1663 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1664 rxq_index); 1665 fp->xdp_tx->is_xdp = 1; 1666 } 1667 1668 if (fp->type & QEDE_FASTPATH_RX) { 1669 fp->rxq->rxq_id = rxq_index++; 1670 1671 /* Determine how to map buffers for this queue */ 1672 if (fp->type & QEDE_FASTPATH_XDP) 1673 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1674 else 1675 fp->rxq->data_direction = DMA_FROM_DEVICE; 1676 fp->rxq->dev = &edev->pdev->dev; 1677 1678 /* Driver have no error path from here */ 1679 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1680 fp->rxq->rxq_id) < 0); 1681 } 1682 1683 if (fp->type & QEDE_FASTPATH_TX) { 1684 int cos; 1685 1686 for_each_cos_in_txq(edev, cos) { 1687 struct qede_tx_queue *txq = &fp->txq[cos]; 1688 u16 ndev_tx_id; 1689 1690 txq->cos = cos; 1691 txq->index = txq_index; 1692 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1693 txq->ndev_txq_id = ndev_tx_id; 1694 1695 if (edev->dev_info.is_legacy) 1696 txq->is_legacy = 1; 1697 txq->dev = &edev->pdev->dev; 1698 } 1699 1700 txq_index++; 1701 } 1702 1703 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1704 edev->ndev->name, queue_id); 1705 } 1706 1707 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1708 } 1709 1710 static int qede_set_real_num_queues(struct qede_dev *edev) 1711 { 1712 int rc = 0; 1713 1714 rc = netif_set_real_num_tx_queues(edev->ndev, 1715 QEDE_TSS_COUNT(edev) * 1716 edev->dev_info.num_tc); 1717 if (rc) { 1718 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1719 return rc; 1720 } 1721 1722 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1723 if (rc) { 1724 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1725 return rc; 1726 } 1727 1728 return 0; 1729 } 1730 1731 static void qede_napi_disable_remove(struct qede_dev *edev) 1732 { 1733 int i; 1734 1735 for_each_queue(i) { 1736 napi_disable(&edev->fp_array[i].napi); 1737 1738 netif_napi_del(&edev->fp_array[i].napi); 1739 } 1740 } 1741 1742 static void qede_napi_add_enable(struct qede_dev *edev) 1743 { 1744 int i; 1745 1746 /* Add NAPI objects */ 1747 for_each_queue(i) { 1748 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1749 qede_poll, NAPI_POLL_WEIGHT); 1750 napi_enable(&edev->fp_array[i].napi); 1751 } 1752 } 1753 1754 static void qede_sync_free_irqs(struct qede_dev *edev) 1755 { 1756 int i; 1757 1758 for (i = 0; i < edev->int_info.used_cnt; i++) { 1759 if (edev->int_info.msix_cnt) { 1760 synchronize_irq(edev->int_info.msix[i].vector); 1761 free_irq(edev->int_info.msix[i].vector, 1762 &edev->fp_array[i]); 1763 } else { 1764 edev->ops->common->simd_handler_clean(edev->cdev, i); 1765 } 1766 } 1767 1768 edev->int_info.used_cnt = 0; 1769 } 1770 1771 static int qede_req_msix_irqs(struct qede_dev *edev) 1772 { 1773 int i, rc; 1774 1775 /* Sanitize number of interrupts == number of prepared RSS queues */ 1776 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1777 DP_ERR(edev, 1778 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1779 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1780 return -EINVAL; 1781 } 1782 1783 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1784 #ifdef CONFIG_RFS_ACCEL 1785 struct qede_fastpath *fp = &edev->fp_array[i]; 1786 1787 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1788 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1789 edev->int_info.msix[i].vector); 1790 if (rc) { 1791 DP_ERR(edev, "Failed to add CPU rmap\n"); 1792 qede_free_arfs(edev); 1793 } 1794 } 1795 #endif 1796 rc = request_irq(edev->int_info.msix[i].vector, 1797 qede_msix_fp_int, 0, edev->fp_array[i].name, 1798 &edev->fp_array[i]); 1799 if (rc) { 1800 DP_ERR(edev, "Request fp %d irq failed\n", i); 1801 qede_sync_free_irqs(edev); 1802 return rc; 1803 } 1804 DP_VERBOSE(edev, NETIF_MSG_INTR, 1805 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1806 edev->fp_array[i].name, i, 1807 &edev->fp_array[i]); 1808 edev->int_info.used_cnt++; 1809 } 1810 1811 return 0; 1812 } 1813 1814 static void qede_simd_fp_handler(void *cookie) 1815 { 1816 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1817 1818 napi_schedule_irqoff(&fp->napi); 1819 } 1820 1821 static int qede_setup_irqs(struct qede_dev *edev) 1822 { 1823 int i, rc = 0; 1824 1825 /* Learn Interrupt configuration */ 1826 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1827 if (rc) 1828 return rc; 1829 1830 if (edev->int_info.msix_cnt) { 1831 rc = qede_req_msix_irqs(edev); 1832 if (rc) 1833 return rc; 1834 edev->ndev->irq = edev->int_info.msix[0].vector; 1835 } else { 1836 const struct qed_common_ops *ops; 1837 1838 /* qed should learn receive the RSS ids and callbacks */ 1839 ops = edev->ops->common; 1840 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1841 ops->simd_handler_config(edev->cdev, 1842 &edev->fp_array[i], i, 1843 qede_simd_fp_handler); 1844 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1845 } 1846 return 0; 1847 } 1848 1849 static int qede_drain_txq(struct qede_dev *edev, 1850 struct qede_tx_queue *txq, bool allow_drain) 1851 { 1852 int rc, cnt = 1000; 1853 1854 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1855 if (!cnt) { 1856 if (allow_drain) { 1857 DP_NOTICE(edev, 1858 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1859 txq->index); 1860 rc = edev->ops->common->drain(edev->cdev); 1861 if (rc) 1862 return rc; 1863 return qede_drain_txq(edev, txq, false); 1864 } 1865 DP_NOTICE(edev, 1866 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1867 txq->index, txq->sw_tx_prod, 1868 txq->sw_tx_cons); 1869 return -ENODEV; 1870 } 1871 cnt--; 1872 usleep_range(1000, 2000); 1873 barrier(); 1874 } 1875 1876 /* FW finished processing, wait for HW to transmit all tx packets */ 1877 usleep_range(1000, 2000); 1878 1879 return 0; 1880 } 1881 1882 static int qede_stop_txq(struct qede_dev *edev, 1883 struct qede_tx_queue *txq, int rss_id) 1884 { 1885 /* delete doorbell from doorbell recovery mechanism */ 1886 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1887 &txq->tx_db); 1888 1889 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1890 } 1891 1892 static int qede_stop_queues(struct qede_dev *edev) 1893 { 1894 struct qed_update_vport_params *vport_update_params; 1895 struct qed_dev *cdev = edev->cdev; 1896 struct qede_fastpath *fp; 1897 int rc, i; 1898 1899 /* Disable the vport */ 1900 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1901 if (!vport_update_params) 1902 return -ENOMEM; 1903 1904 vport_update_params->vport_id = 0; 1905 vport_update_params->update_vport_active_flg = 1; 1906 vport_update_params->vport_active_flg = 0; 1907 vport_update_params->update_rss_flg = 0; 1908 1909 rc = edev->ops->vport_update(cdev, vport_update_params); 1910 vfree(vport_update_params); 1911 1912 if (rc) { 1913 DP_ERR(edev, "Failed to update vport\n"); 1914 return rc; 1915 } 1916 1917 /* Flush Tx queues. If needed, request drain from MCP */ 1918 for_each_queue(i) { 1919 fp = &edev->fp_array[i]; 1920 1921 if (fp->type & QEDE_FASTPATH_TX) { 1922 int cos; 1923 1924 for_each_cos_in_txq(edev, cos) { 1925 rc = qede_drain_txq(edev, &fp->txq[cos], true); 1926 if (rc) 1927 return rc; 1928 } 1929 } 1930 1931 if (fp->type & QEDE_FASTPATH_XDP) { 1932 rc = qede_drain_txq(edev, fp->xdp_tx, true); 1933 if (rc) 1934 return rc; 1935 } 1936 } 1937 1938 /* Stop all Queues in reverse order */ 1939 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 1940 fp = &edev->fp_array[i]; 1941 1942 /* Stop the Tx Queue(s) */ 1943 if (fp->type & QEDE_FASTPATH_TX) { 1944 int cos; 1945 1946 for_each_cos_in_txq(edev, cos) { 1947 rc = qede_stop_txq(edev, &fp->txq[cos], i); 1948 if (rc) 1949 return rc; 1950 } 1951 } 1952 1953 /* Stop the Rx Queue */ 1954 if (fp->type & QEDE_FASTPATH_RX) { 1955 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 1956 if (rc) { 1957 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 1958 return rc; 1959 } 1960 } 1961 1962 /* Stop the XDP forwarding queue */ 1963 if (fp->type & QEDE_FASTPATH_XDP) { 1964 rc = qede_stop_txq(edev, fp->xdp_tx, i); 1965 if (rc) 1966 return rc; 1967 1968 bpf_prog_put(fp->rxq->xdp_prog); 1969 } 1970 } 1971 1972 /* Stop the vport */ 1973 rc = edev->ops->vport_stop(cdev, 0); 1974 if (rc) 1975 DP_ERR(edev, "Failed to stop VPORT\n"); 1976 1977 return rc; 1978 } 1979 1980 static int qede_start_txq(struct qede_dev *edev, 1981 struct qede_fastpath *fp, 1982 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 1983 { 1984 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 1985 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 1986 struct qed_queue_start_common_params params; 1987 struct qed_txq_start_ret_params ret_params; 1988 int rc; 1989 1990 memset(¶ms, 0, sizeof(params)); 1991 memset(&ret_params, 0, sizeof(ret_params)); 1992 1993 /* Let the XDP queue share the queue-zone with one of the regular txq. 1994 * We don't really care about its coalescing. 1995 */ 1996 if (txq->is_xdp) 1997 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 1998 else 1999 params.queue_id = txq->index; 2000 2001 params.p_sb = fp->sb_info; 2002 params.sb_idx = sb_idx; 2003 params.tc = txq->cos; 2004 2005 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2006 page_cnt, &ret_params); 2007 if (rc) { 2008 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2009 return rc; 2010 } 2011 2012 txq->doorbell_addr = ret_params.p_doorbell; 2013 txq->handle = ret_params.p_handle; 2014 2015 /* Determine the FW consumer address associated */ 2016 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2017 2018 /* Prepare the doorbell parameters */ 2019 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2020 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2021 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2022 DQ_XCM_ETH_TX_BD_PROD_CMD); 2023 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2024 2025 /* register doorbell with doorbell recovery mechanism */ 2026 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2027 &txq->tx_db, DB_REC_WIDTH_32B, 2028 DB_REC_KERNEL); 2029 2030 return rc; 2031 } 2032 2033 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2034 { 2035 int vlan_removal_en = 1; 2036 struct qed_dev *cdev = edev->cdev; 2037 struct qed_dev_info *qed_info = &edev->dev_info.common; 2038 struct qed_update_vport_params *vport_update_params; 2039 struct qed_queue_start_common_params q_params; 2040 struct qed_start_vport_params start = {0}; 2041 int rc, i; 2042 2043 if (!edev->num_queues) { 2044 DP_ERR(edev, 2045 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2046 return -EINVAL; 2047 } 2048 2049 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2050 if (!vport_update_params) 2051 return -ENOMEM; 2052 2053 start.handle_ptp_pkts = !!(edev->ptp); 2054 start.gro_enable = !edev->gro_disable; 2055 start.mtu = edev->ndev->mtu; 2056 start.vport_id = 0; 2057 start.drop_ttl0 = true; 2058 start.remove_inner_vlan = vlan_removal_en; 2059 start.clear_stats = clear_stats; 2060 2061 rc = edev->ops->vport_start(cdev, &start); 2062 2063 if (rc) { 2064 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2065 goto out; 2066 } 2067 2068 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2069 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2070 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2071 2072 for_each_queue(i) { 2073 struct qede_fastpath *fp = &edev->fp_array[i]; 2074 dma_addr_t p_phys_table; 2075 u32 page_cnt; 2076 2077 if (fp->type & QEDE_FASTPATH_RX) { 2078 struct qed_rxq_start_ret_params ret_params; 2079 struct qede_rx_queue *rxq = fp->rxq; 2080 __le16 *val; 2081 2082 memset(&ret_params, 0, sizeof(ret_params)); 2083 memset(&q_params, 0, sizeof(q_params)); 2084 q_params.queue_id = rxq->rxq_id; 2085 q_params.vport_id = 0; 2086 q_params.p_sb = fp->sb_info; 2087 q_params.sb_idx = RX_PI; 2088 2089 p_phys_table = 2090 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2091 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2092 2093 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2094 rxq->rx_buf_size, 2095 rxq->rx_bd_ring.p_phys_addr, 2096 p_phys_table, 2097 page_cnt, &ret_params); 2098 if (rc) { 2099 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2100 rc); 2101 goto out; 2102 } 2103 2104 /* Use the return parameters */ 2105 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2106 rxq->handle = ret_params.p_handle; 2107 2108 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2109 rxq->hw_cons_ptr = val; 2110 2111 qede_update_rx_prod(edev, rxq); 2112 } 2113 2114 if (fp->type & QEDE_FASTPATH_XDP) { 2115 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2116 if (rc) 2117 goto out; 2118 2119 fp->rxq->xdp_prog = bpf_prog_add(edev->xdp_prog, 1); 2120 if (IS_ERR(fp->rxq->xdp_prog)) { 2121 rc = PTR_ERR(fp->rxq->xdp_prog); 2122 fp->rxq->xdp_prog = NULL; 2123 goto out; 2124 } 2125 } 2126 2127 if (fp->type & QEDE_FASTPATH_TX) { 2128 int cos; 2129 2130 for_each_cos_in_txq(edev, cos) { 2131 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2132 TX_PI(cos)); 2133 if (rc) 2134 goto out; 2135 } 2136 } 2137 } 2138 2139 /* Prepare and send the vport enable */ 2140 vport_update_params->vport_id = start.vport_id; 2141 vport_update_params->update_vport_active_flg = 1; 2142 vport_update_params->vport_active_flg = 1; 2143 2144 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2145 qed_info->tx_switching) { 2146 vport_update_params->update_tx_switching_flg = 1; 2147 vport_update_params->tx_switching_flg = 1; 2148 } 2149 2150 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2151 &vport_update_params->update_rss_flg); 2152 2153 rc = edev->ops->vport_update(cdev, vport_update_params); 2154 if (rc) 2155 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2156 2157 out: 2158 vfree(vport_update_params); 2159 return rc; 2160 } 2161 2162 enum qede_unload_mode { 2163 QEDE_UNLOAD_NORMAL, 2164 QEDE_UNLOAD_RECOVERY, 2165 }; 2166 2167 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2168 bool is_locked) 2169 { 2170 struct qed_link_params link_params; 2171 int rc; 2172 2173 DP_INFO(edev, "Starting qede unload\n"); 2174 2175 if (!is_locked) 2176 __qede_lock(edev); 2177 2178 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2179 2180 if (mode != QEDE_UNLOAD_RECOVERY) 2181 edev->state = QEDE_STATE_CLOSED; 2182 2183 qede_rdma_dev_event_close(edev); 2184 2185 /* Close OS Tx */ 2186 netif_tx_disable(edev->ndev); 2187 netif_carrier_off(edev->ndev); 2188 2189 if (mode != QEDE_UNLOAD_RECOVERY) { 2190 /* Reset the link */ 2191 memset(&link_params, 0, sizeof(link_params)); 2192 link_params.link_up = false; 2193 edev->ops->common->set_link(edev->cdev, &link_params); 2194 2195 rc = qede_stop_queues(edev); 2196 if (rc) { 2197 qede_sync_free_irqs(edev); 2198 goto out; 2199 } 2200 2201 DP_INFO(edev, "Stopped Queues\n"); 2202 } 2203 2204 qede_vlan_mark_nonconfigured(edev); 2205 edev->ops->fastpath_stop(edev->cdev); 2206 2207 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2208 qede_poll_for_freeing_arfs_filters(edev); 2209 qede_free_arfs(edev); 2210 } 2211 2212 /* Release the interrupts */ 2213 qede_sync_free_irqs(edev); 2214 edev->ops->common->set_fp_int(edev->cdev, 0); 2215 2216 qede_napi_disable_remove(edev); 2217 2218 if (mode == QEDE_UNLOAD_RECOVERY) 2219 qede_empty_tx_queues(edev); 2220 2221 qede_free_mem_load(edev); 2222 qede_free_fp_array(edev); 2223 2224 out: 2225 if (!is_locked) 2226 __qede_unlock(edev); 2227 2228 if (mode != QEDE_UNLOAD_RECOVERY) 2229 DP_NOTICE(edev, "Link is down\n"); 2230 2231 DP_INFO(edev, "Ending qede unload\n"); 2232 } 2233 2234 enum qede_load_mode { 2235 QEDE_LOAD_NORMAL, 2236 QEDE_LOAD_RELOAD, 2237 QEDE_LOAD_RECOVERY, 2238 }; 2239 2240 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2241 bool is_locked) 2242 { 2243 struct qed_link_params link_params; 2244 u8 num_tc; 2245 int rc; 2246 2247 DP_INFO(edev, "Starting qede load\n"); 2248 2249 if (!is_locked) 2250 __qede_lock(edev); 2251 2252 rc = qede_set_num_queues(edev); 2253 if (rc) 2254 goto out; 2255 2256 rc = qede_alloc_fp_array(edev); 2257 if (rc) 2258 goto out; 2259 2260 qede_init_fp(edev); 2261 2262 rc = qede_alloc_mem_load(edev); 2263 if (rc) 2264 goto err1; 2265 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2266 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2267 2268 rc = qede_set_real_num_queues(edev); 2269 if (rc) 2270 goto err2; 2271 2272 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2273 rc = qede_alloc_arfs(edev); 2274 if (rc) 2275 DP_NOTICE(edev, "aRFS memory allocation failed\n"); 2276 } 2277 2278 qede_napi_add_enable(edev); 2279 DP_INFO(edev, "Napi added and enabled\n"); 2280 2281 rc = qede_setup_irqs(edev); 2282 if (rc) 2283 goto err3; 2284 DP_INFO(edev, "Setup IRQs succeeded\n"); 2285 2286 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2287 if (rc) 2288 goto err4; 2289 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2290 2291 num_tc = netdev_get_num_tc(edev->ndev); 2292 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2293 qede_setup_tc(edev->ndev, num_tc); 2294 2295 /* Program un-configured VLANs */ 2296 qede_configure_vlan_filters(edev); 2297 2298 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2299 2300 /* Ask for link-up using current configuration */ 2301 memset(&link_params, 0, sizeof(link_params)); 2302 link_params.link_up = true; 2303 edev->ops->common->set_link(edev->cdev, &link_params); 2304 2305 edev->state = QEDE_STATE_OPEN; 2306 2307 DP_INFO(edev, "Ending successfully qede load\n"); 2308 2309 goto out; 2310 err4: 2311 qede_sync_free_irqs(edev); 2312 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 2313 err3: 2314 qede_napi_disable_remove(edev); 2315 err2: 2316 qede_free_mem_load(edev); 2317 err1: 2318 edev->ops->common->set_fp_int(edev->cdev, 0); 2319 qede_free_fp_array(edev); 2320 edev->num_queues = 0; 2321 edev->fp_num_tx = 0; 2322 edev->fp_num_rx = 0; 2323 out: 2324 if (!is_locked) 2325 __qede_unlock(edev); 2326 2327 return rc; 2328 } 2329 2330 /* 'func' should be able to run between unload and reload assuming interface 2331 * is actually running, or afterwards in case it's currently DOWN. 2332 */ 2333 void qede_reload(struct qede_dev *edev, 2334 struct qede_reload_args *args, bool is_locked) 2335 { 2336 if (!is_locked) 2337 __qede_lock(edev); 2338 2339 /* Since qede_lock is held, internal state wouldn't change even 2340 * if netdev state would start transitioning. Check whether current 2341 * internal configuration indicates device is up, then reload. 2342 */ 2343 if (edev->state == QEDE_STATE_OPEN) { 2344 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2345 if (args) 2346 args->func(edev, args); 2347 qede_load(edev, QEDE_LOAD_RELOAD, true); 2348 2349 /* Since no one is going to do it for us, re-configure */ 2350 qede_config_rx_mode(edev->ndev); 2351 } else if (args) { 2352 args->func(edev, args); 2353 } 2354 2355 if (!is_locked) 2356 __qede_unlock(edev); 2357 } 2358 2359 /* called with rtnl_lock */ 2360 static int qede_open(struct net_device *ndev) 2361 { 2362 struct qede_dev *edev = netdev_priv(ndev); 2363 int rc; 2364 2365 netif_carrier_off(ndev); 2366 2367 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2368 2369 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2370 if (rc) 2371 return rc; 2372 2373 udp_tunnel_get_rx_info(ndev); 2374 2375 edev->ops->common->update_drv_state(edev->cdev, true); 2376 2377 return 0; 2378 } 2379 2380 static int qede_close(struct net_device *ndev) 2381 { 2382 struct qede_dev *edev = netdev_priv(ndev); 2383 2384 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2385 2386 edev->ops->common->update_drv_state(edev->cdev, false); 2387 2388 return 0; 2389 } 2390 2391 static void qede_link_update(void *dev, struct qed_link_output *link) 2392 { 2393 struct qede_dev *edev = dev; 2394 2395 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2396 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2397 return; 2398 } 2399 2400 if (link->link_up) { 2401 if (!netif_carrier_ok(edev->ndev)) { 2402 DP_NOTICE(edev, "Link is up\n"); 2403 netif_tx_start_all_queues(edev->ndev); 2404 netif_carrier_on(edev->ndev); 2405 qede_rdma_dev_event_open(edev); 2406 } 2407 } else { 2408 if (netif_carrier_ok(edev->ndev)) { 2409 DP_NOTICE(edev, "Link is down\n"); 2410 netif_tx_disable(edev->ndev); 2411 netif_carrier_off(edev->ndev); 2412 qede_rdma_dev_event_close(edev); 2413 } 2414 } 2415 } 2416 2417 static void qede_schedule_recovery_handler(void *dev) 2418 { 2419 struct qede_dev *edev = dev; 2420 2421 if (edev->state == QEDE_STATE_RECOVERY) { 2422 DP_NOTICE(edev, 2423 "Avoid scheduling a recovery handling since already in recovery state\n"); 2424 return; 2425 } 2426 2427 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2428 schedule_delayed_work(&edev->sp_task, 0); 2429 2430 DP_INFO(edev, "Scheduled a recovery handler\n"); 2431 } 2432 2433 static void qede_recovery_failed(struct qede_dev *edev) 2434 { 2435 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2436 2437 netif_device_detach(edev->ndev); 2438 2439 if (edev->cdev) 2440 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2441 } 2442 2443 static void qede_recovery_handler(struct qede_dev *edev) 2444 { 2445 u32 curr_state = edev->state; 2446 int rc; 2447 2448 DP_NOTICE(edev, "Starting a recovery process\n"); 2449 2450 /* No need to acquire first the qede_lock since is done by qede_sp_task 2451 * before calling this function. 2452 */ 2453 edev->state = QEDE_STATE_RECOVERY; 2454 2455 edev->ops->common->recovery_prolog(edev->cdev); 2456 2457 if (curr_state == QEDE_STATE_OPEN) 2458 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2459 2460 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2461 2462 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2463 IS_VF(edev), QEDE_PROBE_RECOVERY); 2464 if (rc) { 2465 edev->cdev = NULL; 2466 goto err; 2467 } 2468 2469 if (curr_state == QEDE_STATE_OPEN) { 2470 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2471 if (rc) 2472 goto err; 2473 2474 qede_config_rx_mode(edev->ndev); 2475 udp_tunnel_get_rx_info(edev->ndev); 2476 } 2477 2478 edev->state = curr_state; 2479 2480 DP_NOTICE(edev, "Recovery handling is done\n"); 2481 2482 return; 2483 2484 err: 2485 qede_recovery_failed(edev); 2486 } 2487 2488 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2489 { 2490 struct netdev_queue *netdev_txq; 2491 2492 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2493 if (netif_xmit_stopped(netdev_txq)) 2494 return true; 2495 2496 return false; 2497 } 2498 2499 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2500 { 2501 struct qede_dev *edev = dev; 2502 struct netdev_hw_addr *ha; 2503 int i; 2504 2505 if (edev->ndev->features & NETIF_F_IP_CSUM) 2506 data->feat_flags |= QED_TLV_IP_CSUM; 2507 if (edev->ndev->features & NETIF_F_TSO) 2508 data->feat_flags |= QED_TLV_LSO; 2509 2510 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2511 memset(data->mac[1], 0, ETH_ALEN); 2512 memset(data->mac[2], 0, ETH_ALEN); 2513 /* Copy the first two UC macs */ 2514 netif_addr_lock_bh(edev->ndev); 2515 i = 1; 2516 netdev_for_each_uc_addr(ha, edev->ndev) { 2517 ether_addr_copy(data->mac[i++], ha->addr); 2518 if (i == QED_TLV_MAC_COUNT) 2519 break; 2520 } 2521 2522 netif_addr_unlock_bh(edev->ndev); 2523 } 2524 2525 static void qede_get_eth_tlv_data(void *dev, void *data) 2526 { 2527 struct qed_mfw_tlv_eth *etlv = data; 2528 struct qede_dev *edev = dev; 2529 struct qede_fastpath *fp; 2530 int i; 2531 2532 etlv->lso_maxoff_size = 0XFFFF; 2533 etlv->lso_maxoff_size_set = true; 2534 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2535 etlv->lso_minseg_size_set = true; 2536 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2537 etlv->prom_mode_set = true; 2538 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2539 etlv->tx_descr_size_set = true; 2540 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2541 etlv->rx_descr_size_set = true; 2542 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2543 etlv->iov_offload_set = true; 2544 2545 /* Fill information regarding queues; Should be done under the qede 2546 * lock to guarantee those don't change beneath our feet. 2547 */ 2548 etlv->txqs_empty = true; 2549 etlv->rxqs_empty = true; 2550 etlv->num_txqs_full = 0; 2551 etlv->num_rxqs_full = 0; 2552 2553 __qede_lock(edev); 2554 for_each_queue(i) { 2555 fp = &edev->fp_array[i]; 2556 if (fp->type & QEDE_FASTPATH_TX) { 2557 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2558 2559 if (txq->sw_tx_cons != txq->sw_tx_prod) 2560 etlv->txqs_empty = false; 2561 if (qede_is_txq_full(edev, txq)) 2562 etlv->num_txqs_full++; 2563 } 2564 if (fp->type & QEDE_FASTPATH_RX) { 2565 if (qede_has_rx_work(fp->rxq)) 2566 etlv->rxqs_empty = false; 2567 2568 /* This one is a bit tricky; Firmware might stop 2569 * placing packets if ring is not yet full. 2570 * Give an approximation. 2571 */ 2572 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2573 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2574 RX_RING_SIZE - 100) 2575 etlv->num_rxqs_full++; 2576 } 2577 } 2578 __qede_unlock(edev); 2579 2580 etlv->txqs_empty_set = true; 2581 etlv->rxqs_empty_set = true; 2582 etlv->num_txqs_full_set = true; 2583 etlv->num_rxqs_full_set = true; 2584 } 2585