1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/crash_dump.h> 8 #include <linux/module.h> 9 #include <linux/pci.h> 10 #include <linux/device.h> 11 #include <linux/netdevice.h> 12 #include <linux/etherdevice.h> 13 #include <linux/skbuff.h> 14 #include <linux/errno.h> 15 #include <linux/list.h> 16 #include <linux/string.h> 17 #include <linux/dma-mapping.h> 18 #include <linux/interrupt.h> 19 #include <asm/byteorder.h> 20 #include <asm/param.h> 21 #include <linux/io.h> 22 #include <linux/netdev_features.h> 23 #include <linux/udp.h> 24 #include <linux/tcp.h> 25 #include <net/udp_tunnel.h> 26 #include <linux/ip.h> 27 #include <net/ipv6.h> 28 #include <net/tcp.h> 29 #include <linux/if_ether.h> 30 #include <linux/if_vlan.h> 31 #include <linux/pkt_sched.h> 32 #include <linux/ethtool.h> 33 #include <linux/in.h> 34 #include <linux/random.h> 35 #include <net/ip6_checksum.h> 36 #include <linux/bitops.h> 37 #include <linux/vmalloc.h> 38 #include <linux/aer.h> 39 #include "qede.h" 40 #include "qede_ptp.h" 41 42 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 43 MODULE_LICENSE("GPL"); 44 45 static uint debug; 46 module_param(debug, uint, 0); 47 MODULE_PARM_DESC(debug, " Default debug msglevel"); 48 49 static const struct qed_eth_ops *qed_ops; 50 51 #define CHIP_NUM_57980S_40 0x1634 52 #define CHIP_NUM_57980S_10 0x1666 53 #define CHIP_NUM_57980S_MF 0x1636 54 #define CHIP_NUM_57980S_100 0x1644 55 #define CHIP_NUM_57980S_50 0x1654 56 #define CHIP_NUM_57980S_25 0x1656 57 #define CHIP_NUM_57980S_IOV 0x1664 58 #define CHIP_NUM_AH 0x8070 59 #define CHIP_NUM_AH_IOV 0x8090 60 61 #ifndef PCI_DEVICE_ID_NX2_57980E 62 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 63 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 64 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 65 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 66 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 67 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 68 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 69 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 70 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 71 72 #endif 73 74 enum qede_pci_private { 75 QEDE_PRIVATE_PF, 76 QEDE_PRIVATE_VF 77 }; 78 79 static const struct pci_device_id qede_pci_tbl[] = { 80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 86 #ifdef CONFIG_QED_SRIOV 87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 88 #endif 89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 90 #ifdef CONFIG_QED_SRIOV 91 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 92 #endif 93 { 0 } 94 }; 95 96 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 97 98 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 99 static pci_ers_result_t 100 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 101 102 #define TX_TIMEOUT (5 * HZ) 103 104 /* Utilize last protocol index for XDP */ 105 #define XDP_PI 11 106 107 static void qede_remove(struct pci_dev *pdev); 108 static void qede_shutdown(struct pci_dev *pdev); 109 static void qede_link_update(void *dev, struct qed_link_output *link); 110 static void qede_schedule_recovery_handler(void *dev); 111 static void qede_recovery_handler(struct qede_dev *edev); 112 static void qede_schedule_hw_err_handler(void *dev, 113 enum qed_hw_err_type err_type); 114 static void qede_get_eth_tlv_data(void *edev, void *data); 115 static void qede_get_generic_tlv_data(void *edev, 116 struct qed_generic_tlvs *data); 117 static void qede_generic_hw_err_handler(struct qede_dev *edev); 118 #ifdef CONFIG_QED_SRIOV 119 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 120 __be16 vlan_proto) 121 { 122 struct qede_dev *edev = netdev_priv(ndev); 123 124 if (vlan > 4095) { 125 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 126 return -EINVAL; 127 } 128 129 if (vlan_proto != htons(ETH_P_8021Q)) 130 return -EPROTONOSUPPORT; 131 132 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 133 vlan, vf); 134 135 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 136 } 137 138 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 139 { 140 struct qede_dev *edev = netdev_priv(ndev); 141 142 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx); 143 144 if (!is_valid_ether_addr(mac)) { 145 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 146 return -EINVAL; 147 } 148 149 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 150 } 151 152 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 153 { 154 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 155 struct qed_dev_info *qed_info = &edev->dev_info.common; 156 struct qed_update_vport_params *vport_params; 157 int rc; 158 159 vport_params = vzalloc(sizeof(*vport_params)); 160 if (!vport_params) 161 return -ENOMEM; 162 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 163 164 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 165 166 /* Enable/Disable Tx switching for PF */ 167 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 168 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 169 vport_params->vport_id = 0; 170 vport_params->update_tx_switching_flg = 1; 171 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 172 edev->ops->vport_update(edev->cdev, vport_params); 173 } 174 175 vfree(vport_params); 176 return rc; 177 } 178 #endif 179 180 static const struct pci_error_handlers qede_err_handler = { 181 .error_detected = qede_io_error_detected, 182 }; 183 184 static struct pci_driver qede_pci_driver = { 185 .name = "qede", 186 .id_table = qede_pci_tbl, 187 .probe = qede_probe, 188 .remove = qede_remove, 189 .shutdown = qede_shutdown, 190 #ifdef CONFIG_QED_SRIOV 191 .sriov_configure = qede_sriov_configure, 192 #endif 193 .err_handler = &qede_err_handler, 194 }; 195 196 static struct qed_eth_cb_ops qede_ll_ops = { 197 { 198 #ifdef CONFIG_RFS_ACCEL 199 .arfs_filter_op = qede_arfs_filter_op, 200 #endif 201 .link_update = qede_link_update, 202 .schedule_recovery_handler = qede_schedule_recovery_handler, 203 .schedule_hw_err_handler = qede_schedule_hw_err_handler, 204 .get_generic_tlv_data = qede_get_generic_tlv_data, 205 .get_protocol_tlv_data = qede_get_eth_tlv_data, 206 }, 207 .force_mac = qede_force_mac, 208 .ports_update = qede_udp_ports_update, 209 }; 210 211 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 212 void *ptr) 213 { 214 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 215 struct ethtool_drvinfo drvinfo; 216 struct qede_dev *edev; 217 218 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 219 goto done; 220 221 /* Check whether this is a qede device */ 222 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 223 goto done; 224 225 memset(&drvinfo, 0, sizeof(drvinfo)); 226 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 227 if (strcmp(drvinfo.driver, "qede")) 228 goto done; 229 edev = netdev_priv(ndev); 230 231 switch (event) { 232 case NETDEV_CHANGENAME: 233 /* Notify qed of the name change */ 234 if (!edev->ops || !edev->ops->common) 235 goto done; 236 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 237 break; 238 case NETDEV_CHANGEADDR: 239 edev = netdev_priv(ndev); 240 qede_rdma_event_changeaddr(edev); 241 break; 242 } 243 244 done: 245 return NOTIFY_DONE; 246 } 247 248 static struct notifier_block qede_netdev_notifier = { 249 .notifier_call = qede_netdev_event, 250 }; 251 252 static 253 int __init qede_init(void) 254 { 255 int ret; 256 257 pr_info("qede init: QLogic FastLinQ 4xxxx Ethernet Driver qede\n"); 258 259 qede_forced_speed_maps_init(); 260 261 qed_ops = qed_get_eth_ops(); 262 if (!qed_ops) { 263 pr_notice("Failed to get qed ethtool operations\n"); 264 return -EINVAL; 265 } 266 267 /* Must register notifier before pci ops, since we might miss 268 * interface rename after pci probe and netdev registration. 269 */ 270 ret = register_netdevice_notifier(&qede_netdev_notifier); 271 if (ret) { 272 pr_notice("Failed to register netdevice_notifier\n"); 273 qed_put_eth_ops(); 274 return -EINVAL; 275 } 276 277 ret = pci_register_driver(&qede_pci_driver); 278 if (ret) { 279 pr_notice("Failed to register driver\n"); 280 unregister_netdevice_notifier(&qede_netdev_notifier); 281 qed_put_eth_ops(); 282 return -EINVAL; 283 } 284 285 return 0; 286 } 287 288 static void __exit qede_cleanup(void) 289 { 290 if (debug & QED_LOG_INFO_MASK) 291 pr_info("qede_cleanup called\n"); 292 293 unregister_netdevice_notifier(&qede_netdev_notifier); 294 pci_unregister_driver(&qede_pci_driver); 295 qed_put_eth_ops(); 296 } 297 298 module_init(qede_init); 299 module_exit(qede_cleanup); 300 301 static int qede_open(struct net_device *ndev); 302 static int qede_close(struct net_device *ndev); 303 304 void qede_fill_by_demand_stats(struct qede_dev *edev) 305 { 306 struct qede_stats_common *p_common = &edev->stats.common; 307 struct qed_eth_stats stats; 308 309 edev->ops->get_vport_stats(edev->cdev, &stats); 310 311 p_common->no_buff_discards = stats.common.no_buff_discards; 312 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 313 p_common->ttl0_discard = stats.common.ttl0_discard; 314 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 315 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 316 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 317 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 318 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 319 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 320 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 321 p_common->mac_filter_discards = stats.common.mac_filter_discards; 322 p_common->gft_filter_drop = stats.common.gft_filter_drop; 323 324 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 325 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 326 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 327 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 328 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 329 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 330 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 331 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 332 p_common->coalesced_events = stats.common.tpa_coalesced_events; 333 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 334 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 335 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 336 337 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 338 p_common->rx_65_to_127_byte_packets = 339 stats.common.rx_65_to_127_byte_packets; 340 p_common->rx_128_to_255_byte_packets = 341 stats.common.rx_128_to_255_byte_packets; 342 p_common->rx_256_to_511_byte_packets = 343 stats.common.rx_256_to_511_byte_packets; 344 p_common->rx_512_to_1023_byte_packets = 345 stats.common.rx_512_to_1023_byte_packets; 346 p_common->rx_1024_to_1518_byte_packets = 347 stats.common.rx_1024_to_1518_byte_packets; 348 p_common->rx_crc_errors = stats.common.rx_crc_errors; 349 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 350 p_common->rx_pause_frames = stats.common.rx_pause_frames; 351 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 352 p_common->rx_align_errors = stats.common.rx_align_errors; 353 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 354 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 355 p_common->rx_jabbers = stats.common.rx_jabbers; 356 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 357 p_common->rx_fragments = stats.common.rx_fragments; 358 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 359 p_common->tx_65_to_127_byte_packets = 360 stats.common.tx_65_to_127_byte_packets; 361 p_common->tx_128_to_255_byte_packets = 362 stats.common.tx_128_to_255_byte_packets; 363 p_common->tx_256_to_511_byte_packets = 364 stats.common.tx_256_to_511_byte_packets; 365 p_common->tx_512_to_1023_byte_packets = 366 stats.common.tx_512_to_1023_byte_packets; 367 p_common->tx_1024_to_1518_byte_packets = 368 stats.common.tx_1024_to_1518_byte_packets; 369 p_common->tx_pause_frames = stats.common.tx_pause_frames; 370 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 371 p_common->brb_truncates = stats.common.brb_truncates; 372 p_common->brb_discards = stats.common.brb_discards; 373 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 374 p_common->link_change_count = stats.common.link_change_count; 375 p_common->ptp_skip_txts = edev->ptp_skip_txts; 376 377 if (QEDE_IS_BB(edev)) { 378 struct qede_stats_bb *p_bb = &edev->stats.bb; 379 380 p_bb->rx_1519_to_1522_byte_packets = 381 stats.bb.rx_1519_to_1522_byte_packets; 382 p_bb->rx_1519_to_2047_byte_packets = 383 stats.bb.rx_1519_to_2047_byte_packets; 384 p_bb->rx_2048_to_4095_byte_packets = 385 stats.bb.rx_2048_to_4095_byte_packets; 386 p_bb->rx_4096_to_9216_byte_packets = 387 stats.bb.rx_4096_to_9216_byte_packets; 388 p_bb->rx_9217_to_16383_byte_packets = 389 stats.bb.rx_9217_to_16383_byte_packets; 390 p_bb->tx_1519_to_2047_byte_packets = 391 stats.bb.tx_1519_to_2047_byte_packets; 392 p_bb->tx_2048_to_4095_byte_packets = 393 stats.bb.tx_2048_to_4095_byte_packets; 394 p_bb->tx_4096_to_9216_byte_packets = 395 stats.bb.tx_4096_to_9216_byte_packets; 396 p_bb->tx_9217_to_16383_byte_packets = 397 stats.bb.tx_9217_to_16383_byte_packets; 398 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 399 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 400 } else { 401 struct qede_stats_ah *p_ah = &edev->stats.ah; 402 403 p_ah->rx_1519_to_max_byte_packets = 404 stats.ah.rx_1519_to_max_byte_packets; 405 p_ah->tx_1519_to_max_byte_packets = 406 stats.ah.tx_1519_to_max_byte_packets; 407 } 408 } 409 410 static void qede_get_stats64(struct net_device *dev, 411 struct rtnl_link_stats64 *stats) 412 { 413 struct qede_dev *edev = netdev_priv(dev); 414 struct qede_stats_common *p_common; 415 416 qede_fill_by_demand_stats(edev); 417 p_common = &edev->stats.common; 418 419 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 420 p_common->rx_bcast_pkts; 421 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 422 p_common->tx_bcast_pkts; 423 424 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 425 p_common->rx_bcast_bytes; 426 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 427 p_common->tx_bcast_bytes; 428 429 stats->tx_errors = p_common->tx_err_drop_pkts; 430 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 431 432 stats->rx_fifo_errors = p_common->no_buff_discards; 433 434 if (QEDE_IS_BB(edev)) 435 stats->collisions = edev->stats.bb.tx_total_collisions; 436 stats->rx_crc_errors = p_common->rx_crc_errors; 437 stats->rx_frame_errors = p_common->rx_align_errors; 438 } 439 440 #ifdef CONFIG_QED_SRIOV 441 static int qede_get_vf_config(struct net_device *dev, int vfidx, 442 struct ifla_vf_info *ivi) 443 { 444 struct qede_dev *edev = netdev_priv(dev); 445 446 if (!edev->ops) 447 return -EINVAL; 448 449 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 450 } 451 452 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 453 int min_tx_rate, int max_tx_rate) 454 { 455 struct qede_dev *edev = netdev_priv(dev); 456 457 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 458 max_tx_rate); 459 } 460 461 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 462 { 463 struct qede_dev *edev = netdev_priv(dev); 464 465 if (!edev->ops) 466 return -EINVAL; 467 468 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 469 } 470 471 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 472 int link_state) 473 { 474 struct qede_dev *edev = netdev_priv(dev); 475 476 if (!edev->ops) 477 return -EINVAL; 478 479 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 480 } 481 482 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 483 { 484 struct qede_dev *edev = netdev_priv(dev); 485 486 if (!edev->ops) 487 return -EINVAL; 488 489 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 490 } 491 #endif 492 493 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 494 { 495 struct qede_dev *edev = netdev_priv(dev); 496 497 if (!netif_running(dev)) 498 return -EAGAIN; 499 500 switch (cmd) { 501 case SIOCSHWTSTAMP: 502 return qede_ptp_hw_ts(edev, ifr); 503 default: 504 DP_VERBOSE(edev, QED_MSG_DEBUG, 505 "default IOCTL cmd 0x%x\n", cmd); 506 return -EOPNOTSUPP; 507 } 508 509 return 0; 510 } 511 512 static void qede_fp_sb_dump(struct qede_dev *edev, struct qede_fastpath *fp) 513 { 514 char *p_sb = (char *)fp->sb_info->sb_virt; 515 u32 sb_size, i; 516 517 sb_size = sizeof(struct status_block); 518 519 for (i = 0; i < sb_size; i += 8) 520 DP_NOTICE(edev, 521 "%02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX\n", 522 p_sb[i], p_sb[i + 1], p_sb[i + 2], p_sb[i + 3], 523 p_sb[i + 4], p_sb[i + 5], p_sb[i + 6], p_sb[i + 7]); 524 } 525 526 static void 527 qede_txq_fp_log_metadata(struct qede_dev *edev, 528 struct qede_fastpath *fp, struct qede_tx_queue *txq) 529 { 530 struct qed_chain *p_chain = &txq->tx_pbl; 531 532 /* Dump txq/fp/sb ids etc. other metadata */ 533 DP_NOTICE(edev, 534 "fpid 0x%x sbid 0x%x txqid [0x%x] ndev_qid [0x%x] cos [0x%x] p_chain %p cap %d size %d jiffies %lu HZ 0x%x\n", 535 fp->id, fp->sb_info->igu_sb_id, txq->index, txq->ndev_txq_id, txq->cos, 536 p_chain, p_chain->capacity, p_chain->size, jiffies, HZ); 537 538 /* Dump all the relevant prod/cons indexes */ 539 DP_NOTICE(edev, 540 "hw cons %04x sw_tx_prod=0x%x, sw_tx_cons=0x%x, bd_prod 0x%x bd_cons 0x%x\n", 541 le16_to_cpu(*txq->hw_cons_ptr), txq->sw_tx_prod, txq->sw_tx_cons, 542 qed_chain_get_prod_idx(p_chain), qed_chain_get_cons_idx(p_chain)); 543 } 544 545 static void 546 qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp, struct qede_tx_queue *txq) 547 { 548 struct qed_sb_info_dbg sb_dbg; 549 int rc; 550 551 /* sb info */ 552 qede_fp_sb_dump(edev, fp); 553 554 memset(&sb_dbg, 0, sizeof(sb_dbg)); 555 rc = edev->ops->common->get_sb_info(edev->cdev, fp->sb_info, (u16)fp->id, &sb_dbg); 556 557 DP_NOTICE(edev, "IGU: prod %08x cons %08x CAU Tx %04x\n", 558 sb_dbg.igu_prod, sb_dbg.igu_cons, sb_dbg.pi[TX_PI(txq->cos)]); 559 560 /* report to mfw */ 561 edev->ops->common->mfw_report(edev->cdev, 562 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n", 563 txq->index, le16_to_cpu(*txq->hw_cons_ptr), 564 qed_chain_get_cons_idx(&txq->tx_pbl), 565 qed_chain_get_prod_idx(&txq->tx_pbl), jiffies); 566 if (!rc) 567 edev->ops->common->mfw_report(edev->cdev, 568 "Txq[%d]: SB[0x%04x] - IGU: prod %08x cons %08x CAU Tx %04x\n", 569 txq->index, fp->sb_info->igu_sb_id, 570 sb_dbg.igu_prod, sb_dbg.igu_cons, 571 sb_dbg.pi[TX_PI(txq->cos)]); 572 } 573 574 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue) 575 { 576 struct qede_dev *edev = netdev_priv(dev); 577 int i; 578 579 netif_carrier_off(dev); 580 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue); 581 582 for_each_queue(i) { 583 struct qede_tx_queue *txq; 584 struct qede_fastpath *fp; 585 int cos; 586 587 fp = &edev->fp_array[i]; 588 if (!(fp->type & QEDE_FASTPATH_TX)) 589 continue; 590 591 for_each_cos_in_txq(edev, cos) { 592 txq = &fp->txq[cos]; 593 594 /* Dump basic metadata for all queues */ 595 qede_txq_fp_log_metadata(edev, fp, txq); 596 597 if (qed_chain_get_cons_idx(&txq->tx_pbl) != 598 qed_chain_get_prod_idx(&txq->tx_pbl)) 599 qede_tx_log_print(edev, fp, txq); 600 } 601 } 602 603 if (IS_VF(edev)) 604 return; 605 606 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 607 edev->state == QEDE_STATE_RECOVERY) { 608 DP_INFO(edev, 609 "Avoid handling a Tx timeout while another HW error is being handled\n"); 610 return; 611 } 612 613 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags); 614 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 615 schedule_delayed_work(&edev->sp_task, 0); 616 } 617 618 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 619 { 620 struct qede_dev *edev = netdev_priv(ndev); 621 int cos, count, offset; 622 623 if (num_tc > edev->dev_info.num_tc) 624 return -EINVAL; 625 626 netdev_reset_tc(ndev); 627 netdev_set_num_tc(ndev, num_tc); 628 629 for_each_cos_in_txq(edev, cos) { 630 count = QEDE_TSS_COUNT(edev); 631 offset = cos * QEDE_TSS_COUNT(edev); 632 netdev_set_tc_queue(ndev, cos, count, offset); 633 } 634 635 return 0; 636 } 637 638 static int 639 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 640 __be16 proto) 641 { 642 switch (f->command) { 643 case FLOW_CLS_REPLACE: 644 return qede_add_tc_flower_fltr(edev, proto, f); 645 case FLOW_CLS_DESTROY: 646 return qede_delete_flow_filter(edev, f->cookie); 647 default: 648 return -EOPNOTSUPP; 649 } 650 } 651 652 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 653 void *cb_priv) 654 { 655 struct flow_cls_offload *f; 656 struct qede_dev *edev = cb_priv; 657 658 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 659 return -EOPNOTSUPP; 660 661 switch (type) { 662 case TC_SETUP_CLSFLOWER: 663 f = type_data; 664 return qede_set_flower(edev, f, f->common.protocol); 665 default: 666 return -EOPNOTSUPP; 667 } 668 } 669 670 static LIST_HEAD(qede_block_cb_list); 671 672 static int 673 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 674 void *type_data) 675 { 676 struct qede_dev *edev = netdev_priv(dev); 677 struct tc_mqprio_qopt *mqprio; 678 679 switch (type) { 680 case TC_SETUP_BLOCK: 681 return flow_block_cb_setup_simple(type_data, 682 &qede_block_cb_list, 683 qede_setup_tc_block_cb, 684 edev, edev, true); 685 case TC_SETUP_QDISC_MQPRIO: 686 mqprio = type_data; 687 688 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 689 return qede_setup_tc(dev, mqprio->num_tc); 690 default: 691 return -EOPNOTSUPP; 692 } 693 } 694 695 static const struct net_device_ops qede_netdev_ops = { 696 .ndo_open = qede_open, 697 .ndo_stop = qede_close, 698 .ndo_start_xmit = qede_start_xmit, 699 .ndo_select_queue = qede_select_queue, 700 .ndo_set_rx_mode = qede_set_rx_mode, 701 .ndo_set_mac_address = qede_set_mac_addr, 702 .ndo_validate_addr = eth_validate_addr, 703 .ndo_change_mtu = qede_change_mtu, 704 .ndo_eth_ioctl = qede_ioctl, 705 .ndo_tx_timeout = qede_tx_timeout, 706 #ifdef CONFIG_QED_SRIOV 707 .ndo_set_vf_mac = qede_set_vf_mac, 708 .ndo_set_vf_vlan = qede_set_vf_vlan, 709 .ndo_set_vf_trust = qede_set_vf_trust, 710 #endif 711 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 712 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 713 .ndo_fix_features = qede_fix_features, 714 .ndo_set_features = qede_set_features, 715 .ndo_get_stats64 = qede_get_stats64, 716 #ifdef CONFIG_QED_SRIOV 717 .ndo_set_vf_link_state = qede_set_vf_link_state, 718 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 719 .ndo_get_vf_config = qede_get_vf_config, 720 .ndo_set_vf_rate = qede_set_vf_rate, 721 #endif 722 .ndo_features_check = qede_features_check, 723 .ndo_bpf = qede_xdp, 724 #ifdef CONFIG_RFS_ACCEL 725 .ndo_rx_flow_steer = qede_rx_flow_steer, 726 #endif 727 .ndo_xdp_xmit = qede_xdp_transmit, 728 .ndo_setup_tc = qede_setup_tc_offload, 729 }; 730 731 static const struct net_device_ops qede_netdev_vf_ops = { 732 .ndo_open = qede_open, 733 .ndo_stop = qede_close, 734 .ndo_start_xmit = qede_start_xmit, 735 .ndo_select_queue = qede_select_queue, 736 .ndo_set_rx_mode = qede_set_rx_mode, 737 .ndo_set_mac_address = qede_set_mac_addr, 738 .ndo_validate_addr = eth_validate_addr, 739 .ndo_change_mtu = qede_change_mtu, 740 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 741 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 742 .ndo_fix_features = qede_fix_features, 743 .ndo_set_features = qede_set_features, 744 .ndo_get_stats64 = qede_get_stats64, 745 .ndo_features_check = qede_features_check, 746 }; 747 748 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 749 .ndo_open = qede_open, 750 .ndo_stop = qede_close, 751 .ndo_start_xmit = qede_start_xmit, 752 .ndo_select_queue = qede_select_queue, 753 .ndo_set_rx_mode = qede_set_rx_mode, 754 .ndo_set_mac_address = qede_set_mac_addr, 755 .ndo_validate_addr = eth_validate_addr, 756 .ndo_change_mtu = qede_change_mtu, 757 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 758 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 759 .ndo_fix_features = qede_fix_features, 760 .ndo_set_features = qede_set_features, 761 .ndo_get_stats64 = qede_get_stats64, 762 .ndo_features_check = qede_features_check, 763 .ndo_bpf = qede_xdp, 764 .ndo_xdp_xmit = qede_xdp_transmit, 765 }; 766 767 /* ------------------------------------------------------------------------- 768 * START OF PROBE / REMOVE 769 * ------------------------------------------------------------------------- 770 */ 771 772 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 773 struct pci_dev *pdev, 774 struct qed_dev_eth_info *info, 775 u32 dp_module, u8 dp_level) 776 { 777 struct net_device *ndev; 778 struct qede_dev *edev; 779 780 ndev = alloc_etherdev_mqs(sizeof(*edev), 781 info->num_queues * info->num_tc, 782 info->num_queues); 783 if (!ndev) { 784 pr_err("etherdev allocation failed\n"); 785 return NULL; 786 } 787 788 edev = netdev_priv(ndev); 789 edev->ndev = ndev; 790 edev->cdev = cdev; 791 edev->pdev = pdev; 792 edev->dp_module = dp_module; 793 edev->dp_level = dp_level; 794 edev->ops = qed_ops; 795 796 if (is_kdump_kernel()) { 797 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN; 798 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN; 799 } else { 800 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 801 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 802 } 803 804 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 805 info->num_queues, info->num_queues); 806 807 SET_NETDEV_DEV(ndev, &pdev->dev); 808 809 memset(&edev->stats, 0, sizeof(edev->stats)); 810 memcpy(&edev->dev_info, info, sizeof(*info)); 811 812 /* As ethtool doesn't have the ability to show WoL behavior as 813 * 'default', if device supports it declare it's enabled. 814 */ 815 if (edev->dev_info.common.wol_support) 816 edev->wol_enabled = true; 817 818 INIT_LIST_HEAD(&edev->vlan_list); 819 820 return edev; 821 } 822 823 static void qede_init_ndev(struct qede_dev *edev) 824 { 825 struct net_device *ndev = edev->ndev; 826 struct pci_dev *pdev = edev->pdev; 827 bool udp_tunnel_enable = false; 828 netdev_features_t hw_features; 829 830 pci_set_drvdata(pdev, ndev); 831 832 ndev->mem_start = edev->dev_info.common.pci_mem_start; 833 ndev->base_addr = ndev->mem_start; 834 ndev->mem_end = edev->dev_info.common.pci_mem_end; 835 ndev->irq = edev->dev_info.common.pci_irq; 836 837 ndev->watchdog_timeo = TX_TIMEOUT; 838 839 if (IS_VF(edev)) { 840 if (edev->dev_info.xdp_supported) 841 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 842 else 843 ndev->netdev_ops = &qede_netdev_vf_ops; 844 } else { 845 ndev->netdev_ops = &qede_netdev_ops; 846 } 847 848 qede_set_ethtool_ops(ndev); 849 850 ndev->priv_flags |= IFF_UNICAST_FLT; 851 852 /* user-changeble features */ 853 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 854 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 855 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 856 857 if (edev->dev_info.common.b_arfs_capable) 858 hw_features |= NETIF_F_NTUPLE; 859 860 if (edev->dev_info.common.vxlan_enable || 861 edev->dev_info.common.geneve_enable) 862 udp_tunnel_enable = true; 863 864 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 865 hw_features |= NETIF_F_TSO_ECN; 866 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 867 NETIF_F_SG | NETIF_F_TSO | 868 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 869 NETIF_F_RXCSUM; 870 } 871 872 if (udp_tunnel_enable) { 873 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 874 NETIF_F_GSO_UDP_TUNNEL_CSUM); 875 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 876 NETIF_F_GSO_UDP_TUNNEL_CSUM); 877 878 qede_set_udp_tunnels(edev); 879 } 880 881 if (edev->dev_info.common.gre_enable) { 882 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 883 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 884 NETIF_F_GSO_GRE_CSUM); 885 } 886 887 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 888 NETIF_F_HIGHDMA; 889 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 890 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 891 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 892 893 ndev->hw_features = hw_features; 894 895 ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT | 896 NETDEV_XDP_ACT_NDO_XMIT; 897 898 /* MTU range: 46 - 9600 */ 899 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 900 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 901 902 /* Set network device HW mac */ 903 eth_hw_addr_set(edev->ndev, edev->dev_info.common.hw_mac); 904 905 ndev->mtu = edev->dev_info.common.mtu; 906 } 907 908 /* This function converts from 32b param to two params of level and module 909 * Input 32b decoding: 910 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 911 * 'happy' flow, e.g. memory allocation failed. 912 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 913 * and provide important parameters. 914 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 915 * module. VERBOSE prints are for tracking the specific flow in low level. 916 * 917 * Notice that the level should be that of the lowest required logs. 918 */ 919 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 920 { 921 *p_dp_level = QED_LEVEL_NOTICE; 922 *p_dp_module = 0; 923 924 if (debug & QED_LOG_VERBOSE_MASK) { 925 *p_dp_level = QED_LEVEL_VERBOSE; 926 *p_dp_module = (debug & 0x3FFFFFFF); 927 } else if (debug & QED_LOG_INFO_MASK) { 928 *p_dp_level = QED_LEVEL_INFO; 929 } else if (debug & QED_LOG_NOTICE_MASK) { 930 *p_dp_level = QED_LEVEL_NOTICE; 931 } 932 } 933 934 static void qede_free_fp_array(struct qede_dev *edev) 935 { 936 if (edev->fp_array) { 937 struct qede_fastpath *fp; 938 int i; 939 940 for_each_queue(i) { 941 fp = &edev->fp_array[i]; 942 943 kfree(fp->sb_info); 944 /* Handle mem alloc failure case where qede_init_fp 945 * didn't register xdp_rxq_info yet. 946 * Implicit only (fp->type & QEDE_FASTPATH_RX) 947 */ 948 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 949 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 950 kfree(fp->rxq); 951 kfree(fp->xdp_tx); 952 kfree(fp->txq); 953 } 954 kfree(edev->fp_array); 955 } 956 957 edev->num_queues = 0; 958 edev->fp_num_tx = 0; 959 edev->fp_num_rx = 0; 960 } 961 962 static int qede_alloc_fp_array(struct qede_dev *edev) 963 { 964 u8 fp_combined, fp_rx = edev->fp_num_rx; 965 struct qede_fastpath *fp; 966 void *mem; 967 int i; 968 969 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 970 sizeof(*edev->fp_array), GFP_KERNEL); 971 if (!edev->fp_array) { 972 DP_NOTICE(edev, "fp array allocation failed\n"); 973 goto err; 974 } 975 976 if (!edev->coal_entry) { 977 mem = kcalloc(QEDE_MAX_RSS_CNT(edev), 978 sizeof(*edev->coal_entry), GFP_KERNEL); 979 } else { 980 mem = krealloc(edev->coal_entry, 981 QEDE_QUEUE_CNT(edev) * sizeof(*edev->coal_entry), 982 GFP_KERNEL); 983 } 984 985 if (!mem) { 986 DP_ERR(edev, "coalesce entry allocation failed\n"); 987 kfree(edev->coal_entry); 988 goto err; 989 } 990 edev->coal_entry = mem; 991 992 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 993 994 /* Allocate the FP elements for Rx queues followed by combined and then 995 * the Tx. This ordering should be maintained so that the respective 996 * queues (Rx or Tx) will be together in the fastpath array and the 997 * associated ids will be sequential. 998 */ 999 for_each_queue(i) { 1000 fp = &edev->fp_array[i]; 1001 1002 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 1003 if (!fp->sb_info) { 1004 DP_NOTICE(edev, "sb info struct allocation failed\n"); 1005 goto err; 1006 } 1007 1008 if (fp_rx) { 1009 fp->type = QEDE_FASTPATH_RX; 1010 fp_rx--; 1011 } else if (fp_combined) { 1012 fp->type = QEDE_FASTPATH_COMBINED; 1013 fp_combined--; 1014 } else { 1015 fp->type = QEDE_FASTPATH_TX; 1016 } 1017 1018 if (fp->type & QEDE_FASTPATH_TX) { 1019 fp->txq = kcalloc(edev->dev_info.num_tc, 1020 sizeof(*fp->txq), GFP_KERNEL); 1021 if (!fp->txq) 1022 goto err; 1023 } 1024 1025 if (fp->type & QEDE_FASTPATH_RX) { 1026 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 1027 if (!fp->rxq) 1028 goto err; 1029 1030 if (edev->xdp_prog) { 1031 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 1032 GFP_KERNEL); 1033 if (!fp->xdp_tx) 1034 goto err; 1035 fp->type |= QEDE_FASTPATH_XDP; 1036 } 1037 } 1038 } 1039 1040 return 0; 1041 err: 1042 qede_free_fp_array(edev); 1043 return -ENOMEM; 1044 } 1045 1046 /* The qede lock is used to protect driver state change and driver flows that 1047 * are not reentrant. 1048 */ 1049 void __qede_lock(struct qede_dev *edev) 1050 { 1051 mutex_lock(&edev->qede_lock); 1052 } 1053 1054 void __qede_unlock(struct qede_dev *edev) 1055 { 1056 mutex_unlock(&edev->qede_lock); 1057 } 1058 1059 /* This version of the lock should be used when acquiring the RTNL lock is also 1060 * needed in addition to the internal qede lock. 1061 */ 1062 static void qede_lock(struct qede_dev *edev) 1063 { 1064 rtnl_lock(); 1065 __qede_lock(edev); 1066 } 1067 1068 static void qede_unlock(struct qede_dev *edev) 1069 { 1070 __qede_unlock(edev); 1071 rtnl_unlock(); 1072 } 1073 1074 static void qede_sp_task(struct work_struct *work) 1075 { 1076 struct qede_dev *edev = container_of(work, struct qede_dev, 1077 sp_task.work); 1078 1079 /* Disable execution of this deferred work once 1080 * qede removal is in progress, this stop any future 1081 * scheduling of sp_task. 1082 */ 1083 if (test_bit(QEDE_SP_DISABLE, &edev->sp_flags)) 1084 return; 1085 1086 /* The locking scheme depends on the specific flag: 1087 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 1088 * ensure that ongoing flows are ended and new ones are not started. 1089 * In other cases - only the internal qede lock should be acquired. 1090 */ 1091 1092 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 1093 #ifdef CONFIG_QED_SRIOV 1094 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1095 * The recovery of the active VFs is currently not supported. 1096 */ 1097 if (pci_num_vf(edev->pdev)) 1098 qede_sriov_configure(edev->pdev, 0); 1099 #endif 1100 qede_lock(edev); 1101 qede_recovery_handler(edev); 1102 qede_unlock(edev); 1103 } 1104 1105 __qede_lock(edev); 1106 1107 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 1108 if (edev->state == QEDE_STATE_OPEN) 1109 qede_config_rx_mode(edev->ndev); 1110 1111 #ifdef CONFIG_RFS_ACCEL 1112 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1113 if (edev->state == QEDE_STATE_OPEN) 1114 qede_process_arfs_filters(edev, false); 1115 } 1116 #endif 1117 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags)) 1118 qede_generic_hw_err_handler(edev); 1119 __qede_unlock(edev); 1120 1121 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1122 #ifdef CONFIG_QED_SRIOV 1123 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1124 * The recovery of the active VFs is currently not supported. 1125 */ 1126 if (pci_num_vf(edev->pdev)) 1127 qede_sriov_configure(edev->pdev, 0); 1128 #endif 1129 edev->ops->common->recovery_process(edev->cdev); 1130 } 1131 } 1132 1133 static void qede_update_pf_params(struct qed_dev *cdev) 1134 { 1135 struct qed_pf_params pf_params; 1136 u16 num_cons; 1137 1138 /* 64 rx + 64 tx + 64 XDP */ 1139 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1140 1141 /* 1 rx + 1 xdp + max tx cos */ 1142 num_cons = QED_MIN_L2_CONS; 1143 1144 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1145 1146 /* Same for VFs - make sure they'll have sufficient connections 1147 * to support XDP Tx queues. 1148 */ 1149 pf_params.eth_pf_params.num_vf_cons = 48; 1150 1151 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1152 qed_ops->common->update_pf_params(cdev, &pf_params); 1153 } 1154 1155 #define QEDE_FW_VER_STR_SIZE 80 1156 1157 static void qede_log_probe(struct qede_dev *edev) 1158 { 1159 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1160 u8 buf[QEDE_FW_VER_STR_SIZE]; 1161 size_t left_size; 1162 1163 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1164 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1165 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1166 p_dev_info->fw_eng, 1167 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1168 QED_MFW_VERSION_3_OFFSET, 1169 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1170 QED_MFW_VERSION_2_OFFSET, 1171 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1172 QED_MFW_VERSION_1_OFFSET, 1173 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1174 QED_MFW_VERSION_0_OFFSET); 1175 1176 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1177 if (p_dev_info->mbi_version && left_size) 1178 snprintf(buf + strlen(buf), left_size, 1179 " [MBI %d.%d.%d]", 1180 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1181 QED_MBI_VERSION_2_OFFSET, 1182 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1183 QED_MBI_VERSION_1_OFFSET, 1184 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1185 QED_MBI_VERSION_0_OFFSET); 1186 1187 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1188 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1189 buf, edev->ndev->name); 1190 } 1191 1192 enum qede_probe_mode { 1193 QEDE_PROBE_NORMAL, 1194 QEDE_PROBE_RECOVERY, 1195 }; 1196 1197 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1198 bool is_vf, enum qede_probe_mode mode) 1199 { 1200 struct qed_probe_params probe_params; 1201 struct qed_slowpath_params sp_params; 1202 struct qed_dev_eth_info dev_info; 1203 struct qede_dev *edev; 1204 struct qed_dev *cdev; 1205 int rc; 1206 1207 if (unlikely(dp_level & QED_LEVEL_INFO)) 1208 pr_notice("Starting qede probe\n"); 1209 1210 memset(&probe_params, 0, sizeof(probe_params)); 1211 probe_params.protocol = QED_PROTOCOL_ETH; 1212 probe_params.dp_module = dp_module; 1213 probe_params.dp_level = dp_level; 1214 probe_params.is_vf = is_vf; 1215 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1216 cdev = qed_ops->common->probe(pdev, &probe_params); 1217 if (!cdev) { 1218 rc = -ENODEV; 1219 goto err0; 1220 } 1221 1222 qede_update_pf_params(cdev); 1223 1224 /* Start the Slowpath-process */ 1225 memset(&sp_params, 0, sizeof(sp_params)); 1226 sp_params.int_mode = QED_INT_MODE_MSIX; 1227 strscpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1228 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1229 if (rc) { 1230 pr_notice("Cannot start slowpath\n"); 1231 goto err1; 1232 } 1233 1234 /* Learn information crucial for qede to progress */ 1235 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1236 if (rc) 1237 goto err2; 1238 1239 if (mode != QEDE_PROBE_RECOVERY) { 1240 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1241 dp_level); 1242 if (!edev) { 1243 rc = -ENOMEM; 1244 goto err2; 1245 } 1246 1247 edev->devlink = qed_ops->common->devlink_register(cdev); 1248 if (IS_ERR(edev->devlink)) { 1249 DP_NOTICE(edev, "Cannot register devlink\n"); 1250 rc = PTR_ERR(edev->devlink); 1251 edev->devlink = NULL; 1252 goto err3; 1253 } 1254 } else { 1255 struct net_device *ndev = pci_get_drvdata(pdev); 1256 struct qed_devlink *qdl; 1257 1258 edev = netdev_priv(ndev); 1259 qdl = devlink_priv(edev->devlink); 1260 qdl->cdev = cdev; 1261 edev->cdev = cdev; 1262 memset(&edev->stats, 0, sizeof(edev->stats)); 1263 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1264 } 1265 1266 if (is_vf) 1267 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1268 1269 qede_init_ndev(edev); 1270 1271 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1272 if (rc) 1273 goto err3; 1274 1275 if (mode != QEDE_PROBE_RECOVERY) { 1276 /* Prepare the lock prior to the registration of the netdev, 1277 * as once it's registered we might reach flows requiring it 1278 * [it's even possible to reach a flow needing it directly 1279 * from there, although it's unlikely]. 1280 */ 1281 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1282 mutex_init(&edev->qede_lock); 1283 1284 rc = register_netdev(edev->ndev); 1285 if (rc) { 1286 DP_NOTICE(edev, "Cannot register net-device\n"); 1287 goto err4; 1288 } 1289 } 1290 1291 edev->ops->common->set_name(cdev, edev->ndev->name); 1292 1293 /* PTP not supported on VFs */ 1294 if (!is_vf) 1295 qede_ptp_enable(edev); 1296 1297 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1298 1299 #ifdef CONFIG_DCB 1300 if (!IS_VF(edev)) 1301 qede_set_dcbnl_ops(edev->ndev); 1302 #endif 1303 1304 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1305 1306 qede_log_probe(edev); 1307 return 0; 1308 1309 err4: 1310 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1311 err3: 1312 if (mode != QEDE_PROBE_RECOVERY) 1313 free_netdev(edev->ndev); 1314 else 1315 edev->cdev = NULL; 1316 err2: 1317 qed_ops->common->slowpath_stop(cdev); 1318 err1: 1319 qed_ops->common->remove(cdev); 1320 err0: 1321 return rc; 1322 } 1323 1324 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1325 { 1326 bool is_vf = false; 1327 u32 dp_module = 0; 1328 u8 dp_level = 0; 1329 1330 switch ((enum qede_pci_private)id->driver_data) { 1331 case QEDE_PRIVATE_VF: 1332 if (debug & QED_LOG_VERBOSE_MASK) 1333 dev_err(&pdev->dev, "Probing a VF\n"); 1334 is_vf = true; 1335 break; 1336 default: 1337 if (debug & QED_LOG_VERBOSE_MASK) 1338 dev_err(&pdev->dev, "Probing a PF\n"); 1339 } 1340 1341 qede_config_debug(debug, &dp_module, &dp_level); 1342 1343 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1344 QEDE_PROBE_NORMAL); 1345 } 1346 1347 enum qede_remove_mode { 1348 QEDE_REMOVE_NORMAL, 1349 QEDE_REMOVE_RECOVERY, 1350 }; 1351 1352 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1353 { 1354 struct net_device *ndev = pci_get_drvdata(pdev); 1355 struct qede_dev *edev; 1356 struct qed_dev *cdev; 1357 1358 if (!ndev) { 1359 dev_info(&pdev->dev, "Device has already been removed\n"); 1360 return; 1361 } 1362 1363 edev = netdev_priv(ndev); 1364 cdev = edev->cdev; 1365 1366 DP_INFO(edev, "Starting qede_remove\n"); 1367 1368 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1369 1370 if (mode != QEDE_REMOVE_RECOVERY) { 1371 set_bit(QEDE_SP_DISABLE, &edev->sp_flags); 1372 unregister_netdev(ndev); 1373 1374 cancel_delayed_work_sync(&edev->sp_task); 1375 1376 edev->ops->common->set_power_state(cdev, PCI_D0); 1377 1378 pci_set_drvdata(pdev, NULL); 1379 } 1380 1381 qede_ptp_disable(edev); 1382 1383 /* Use global ops since we've freed edev */ 1384 qed_ops->common->slowpath_stop(cdev); 1385 if (system_state == SYSTEM_POWER_OFF) 1386 return; 1387 1388 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) { 1389 qed_ops->common->devlink_unregister(edev->devlink); 1390 edev->devlink = NULL; 1391 } 1392 qed_ops->common->remove(cdev); 1393 edev->cdev = NULL; 1394 1395 /* Since this can happen out-of-sync with other flows, 1396 * don't release the netdevice until after slowpath stop 1397 * has been called to guarantee various other contexts 1398 * [e.g., QED register callbacks] won't break anything when 1399 * accessing the netdevice. 1400 */ 1401 if (mode != QEDE_REMOVE_RECOVERY) { 1402 kfree(edev->coal_entry); 1403 free_netdev(ndev); 1404 } 1405 1406 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1407 } 1408 1409 static void qede_remove(struct pci_dev *pdev) 1410 { 1411 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1412 } 1413 1414 static void qede_shutdown(struct pci_dev *pdev) 1415 { 1416 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1417 } 1418 1419 /* ------------------------------------------------------------------------- 1420 * START OF LOAD / UNLOAD 1421 * ------------------------------------------------------------------------- 1422 */ 1423 1424 static int qede_set_num_queues(struct qede_dev *edev) 1425 { 1426 int rc; 1427 u16 rss_num; 1428 1429 /* Setup queues according to possible resources*/ 1430 if (edev->req_queues) 1431 rss_num = edev->req_queues; 1432 else 1433 rss_num = netif_get_num_default_rss_queues() * 1434 edev->dev_info.common.num_hwfns; 1435 1436 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1437 1438 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1439 if (rc > 0) { 1440 /* Managed to request interrupts for our queues */ 1441 edev->num_queues = rc; 1442 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1443 QEDE_QUEUE_CNT(edev), rss_num); 1444 rc = 0; 1445 } 1446 1447 edev->fp_num_tx = edev->req_num_tx; 1448 edev->fp_num_rx = edev->req_num_rx; 1449 1450 return rc; 1451 } 1452 1453 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1454 u16 sb_id) 1455 { 1456 if (sb_info->sb_virt) { 1457 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1458 QED_SB_TYPE_L2_QUEUE); 1459 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1460 (void *)sb_info->sb_virt, sb_info->sb_phys); 1461 memset(sb_info, 0, sizeof(*sb_info)); 1462 } 1463 } 1464 1465 /* This function allocates fast-path status block memory */ 1466 static int qede_alloc_mem_sb(struct qede_dev *edev, 1467 struct qed_sb_info *sb_info, u16 sb_id) 1468 { 1469 struct status_block *sb_virt; 1470 dma_addr_t sb_phys; 1471 int rc; 1472 1473 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1474 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1475 if (!sb_virt) { 1476 DP_ERR(edev, "Status block allocation failed\n"); 1477 return -ENOMEM; 1478 } 1479 1480 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1481 sb_virt, sb_phys, sb_id, 1482 QED_SB_TYPE_L2_QUEUE); 1483 if (rc) { 1484 DP_ERR(edev, "Status block initialization failed\n"); 1485 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1486 sb_virt, sb_phys); 1487 return rc; 1488 } 1489 1490 return 0; 1491 } 1492 1493 static void qede_free_rx_buffers(struct qede_dev *edev, 1494 struct qede_rx_queue *rxq) 1495 { 1496 u16 i; 1497 1498 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1499 struct sw_rx_data *rx_buf; 1500 struct page *data; 1501 1502 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1503 data = rx_buf->data; 1504 1505 dma_unmap_page(&edev->pdev->dev, 1506 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1507 1508 rx_buf->data = NULL; 1509 __free_page(data); 1510 } 1511 } 1512 1513 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1514 { 1515 /* Free rx buffers */ 1516 qede_free_rx_buffers(edev, rxq); 1517 1518 /* Free the parallel SW ring */ 1519 kfree(rxq->sw_rx_ring); 1520 1521 /* Free the real RQ ring used by FW */ 1522 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1523 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1524 } 1525 1526 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1527 { 1528 int i; 1529 1530 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1531 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1532 1533 tpa_info->state = QEDE_AGG_STATE_NONE; 1534 } 1535 } 1536 1537 /* This function allocates all memory needed per Rx queue */ 1538 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1539 { 1540 struct qed_chain_init_params params = { 1541 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1542 .num_elems = RX_RING_SIZE, 1543 }; 1544 struct qed_dev *cdev = edev->cdev; 1545 int i, rc, size; 1546 1547 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1548 1549 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1550 1551 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1552 size = rxq->rx_headroom + 1553 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1554 1555 /* Make sure that the headroom and payload fit in a single page */ 1556 if (rxq->rx_buf_size + size > PAGE_SIZE) 1557 rxq->rx_buf_size = PAGE_SIZE - size; 1558 1559 /* Segment size to split a page in multiple equal parts, 1560 * unless XDP is used in which case we'd use the entire page. 1561 */ 1562 if (!edev->xdp_prog) { 1563 size = size + rxq->rx_buf_size; 1564 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1565 } else { 1566 rxq->rx_buf_seg_size = PAGE_SIZE; 1567 edev->ndev->features &= ~NETIF_F_GRO_HW; 1568 } 1569 1570 /* Allocate the parallel driver ring for Rx buffers */ 1571 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1572 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1573 if (!rxq->sw_rx_ring) { 1574 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1575 rc = -ENOMEM; 1576 goto err; 1577 } 1578 1579 /* Allocate FW Rx ring */ 1580 params.mode = QED_CHAIN_MODE_NEXT_PTR; 1581 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE; 1582 params.elem_size = sizeof(struct eth_rx_bd); 1583 1584 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms); 1585 if (rc) 1586 goto err; 1587 1588 /* Allocate FW completion ring */ 1589 params.mode = QED_CHAIN_MODE_PBL; 1590 params.intended_use = QED_CHAIN_USE_TO_CONSUME; 1591 params.elem_size = sizeof(union eth_rx_cqe); 1592 1593 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms); 1594 if (rc) 1595 goto err; 1596 1597 /* Allocate buffers for the Rx ring */ 1598 rxq->filled_buffers = 0; 1599 for (i = 0; i < rxq->num_rx_buffers; i++) { 1600 rc = qede_alloc_rx_buffer(rxq, false); 1601 if (rc) { 1602 DP_ERR(edev, 1603 "Rx buffers allocation failed at index %d\n", i); 1604 goto err; 1605 } 1606 } 1607 1608 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1609 if (!edev->gro_disable) 1610 qede_set_tpa_param(rxq); 1611 err: 1612 return rc; 1613 } 1614 1615 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1616 { 1617 /* Free the parallel SW ring */ 1618 if (txq->is_xdp) 1619 kfree(txq->sw_tx_ring.xdp); 1620 else 1621 kfree(txq->sw_tx_ring.skbs); 1622 1623 /* Free the real RQ ring used by FW */ 1624 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1625 } 1626 1627 /* This function allocates all memory needed per Tx queue */ 1628 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1629 { 1630 struct qed_chain_init_params params = { 1631 .mode = QED_CHAIN_MODE_PBL, 1632 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1633 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1634 .num_elems = edev->q_num_tx_buffers, 1635 .elem_size = sizeof(union eth_tx_bd_types), 1636 }; 1637 int size, rc; 1638 1639 txq->num_tx_buffers = edev->q_num_tx_buffers; 1640 1641 /* Allocate the parallel driver ring for Tx buffers */ 1642 if (txq->is_xdp) { 1643 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1644 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1645 if (!txq->sw_tx_ring.xdp) 1646 goto err; 1647 } else { 1648 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1649 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1650 if (!txq->sw_tx_ring.skbs) 1651 goto err; 1652 } 1653 1654 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms); 1655 if (rc) 1656 goto err; 1657 1658 return 0; 1659 1660 err: 1661 qede_free_mem_txq(edev, txq); 1662 return -ENOMEM; 1663 } 1664 1665 /* This function frees all memory of a single fp */ 1666 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1667 { 1668 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1669 1670 if (fp->type & QEDE_FASTPATH_RX) 1671 qede_free_mem_rxq(edev, fp->rxq); 1672 1673 if (fp->type & QEDE_FASTPATH_XDP) 1674 qede_free_mem_txq(edev, fp->xdp_tx); 1675 1676 if (fp->type & QEDE_FASTPATH_TX) { 1677 int cos; 1678 1679 for_each_cos_in_txq(edev, cos) 1680 qede_free_mem_txq(edev, &fp->txq[cos]); 1681 } 1682 } 1683 1684 /* This function allocates all memory needed for a single fp (i.e. an entity 1685 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1686 */ 1687 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1688 { 1689 int rc = 0; 1690 1691 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1692 if (rc) 1693 goto out; 1694 1695 if (fp->type & QEDE_FASTPATH_RX) { 1696 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1697 if (rc) 1698 goto out; 1699 } 1700 1701 if (fp->type & QEDE_FASTPATH_XDP) { 1702 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1703 if (rc) 1704 goto out; 1705 } 1706 1707 if (fp->type & QEDE_FASTPATH_TX) { 1708 int cos; 1709 1710 for_each_cos_in_txq(edev, cos) { 1711 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1712 if (rc) 1713 goto out; 1714 } 1715 } 1716 1717 out: 1718 return rc; 1719 } 1720 1721 static void qede_free_mem_load(struct qede_dev *edev) 1722 { 1723 int i; 1724 1725 for_each_queue(i) { 1726 struct qede_fastpath *fp = &edev->fp_array[i]; 1727 1728 qede_free_mem_fp(edev, fp); 1729 } 1730 } 1731 1732 /* This function allocates all qede memory at NIC load. */ 1733 static int qede_alloc_mem_load(struct qede_dev *edev) 1734 { 1735 int rc = 0, queue_id; 1736 1737 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1738 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1739 1740 rc = qede_alloc_mem_fp(edev, fp); 1741 if (rc) { 1742 DP_ERR(edev, 1743 "Failed to allocate memory for fastpath - rss id = %d\n", 1744 queue_id); 1745 qede_free_mem_load(edev); 1746 return rc; 1747 } 1748 } 1749 1750 return 0; 1751 } 1752 1753 static void qede_empty_tx_queue(struct qede_dev *edev, 1754 struct qede_tx_queue *txq) 1755 { 1756 unsigned int pkts_compl = 0, bytes_compl = 0; 1757 struct netdev_queue *netdev_txq; 1758 int rc, len = 0; 1759 1760 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1761 1762 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1763 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1764 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1765 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1766 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1767 qed_chain_get_prod_idx(&txq->tx_pbl)); 1768 1769 rc = qede_free_tx_pkt(edev, txq, &len); 1770 if (rc) { 1771 DP_NOTICE(edev, 1772 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1773 txq->index, 1774 qed_chain_get_cons_idx(&txq->tx_pbl), 1775 qed_chain_get_prod_idx(&txq->tx_pbl)); 1776 break; 1777 } 1778 1779 bytes_compl += len; 1780 pkts_compl++; 1781 txq->sw_tx_cons++; 1782 } 1783 1784 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1785 } 1786 1787 static void qede_empty_tx_queues(struct qede_dev *edev) 1788 { 1789 int i; 1790 1791 for_each_queue(i) 1792 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1793 int cos; 1794 1795 for_each_cos_in_txq(edev, cos) { 1796 struct qede_fastpath *fp; 1797 1798 fp = &edev->fp_array[i]; 1799 qede_empty_tx_queue(edev, 1800 &fp->txq[cos]); 1801 } 1802 } 1803 } 1804 1805 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1806 static void qede_init_fp(struct qede_dev *edev) 1807 { 1808 int queue_id, rxq_index = 0, txq_index = 0; 1809 struct qede_fastpath *fp; 1810 bool init_xdp = false; 1811 1812 for_each_queue(queue_id) { 1813 fp = &edev->fp_array[queue_id]; 1814 1815 fp->edev = edev; 1816 fp->id = queue_id; 1817 1818 if (fp->type & QEDE_FASTPATH_XDP) { 1819 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1820 rxq_index); 1821 fp->xdp_tx->is_xdp = 1; 1822 1823 spin_lock_init(&fp->xdp_tx->xdp_tx_lock); 1824 init_xdp = true; 1825 } 1826 1827 if (fp->type & QEDE_FASTPATH_RX) { 1828 fp->rxq->rxq_id = rxq_index++; 1829 1830 /* Determine how to map buffers for this queue */ 1831 if (fp->type & QEDE_FASTPATH_XDP) 1832 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1833 else 1834 fp->rxq->data_direction = DMA_FROM_DEVICE; 1835 fp->rxq->dev = &edev->pdev->dev; 1836 1837 /* Driver have no error path from here */ 1838 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1839 fp->rxq->rxq_id, 0) < 0); 1840 1841 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq, 1842 MEM_TYPE_PAGE_ORDER0, 1843 NULL)) { 1844 DP_NOTICE(edev, 1845 "Failed to register XDP memory model\n"); 1846 } 1847 } 1848 1849 if (fp->type & QEDE_FASTPATH_TX) { 1850 int cos; 1851 1852 for_each_cos_in_txq(edev, cos) { 1853 struct qede_tx_queue *txq = &fp->txq[cos]; 1854 u16 ndev_tx_id; 1855 1856 txq->cos = cos; 1857 txq->index = txq_index; 1858 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1859 txq->ndev_txq_id = ndev_tx_id; 1860 1861 if (edev->dev_info.is_legacy) 1862 txq->is_legacy = true; 1863 txq->dev = &edev->pdev->dev; 1864 } 1865 1866 txq_index++; 1867 } 1868 1869 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1870 edev->ndev->name, queue_id); 1871 } 1872 1873 if (init_xdp) { 1874 edev->total_xdp_queues = QEDE_RSS_COUNT(edev); 1875 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues); 1876 } 1877 } 1878 1879 static int qede_set_real_num_queues(struct qede_dev *edev) 1880 { 1881 int rc = 0; 1882 1883 rc = netif_set_real_num_tx_queues(edev->ndev, 1884 QEDE_TSS_COUNT(edev) * 1885 edev->dev_info.num_tc); 1886 if (rc) { 1887 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1888 return rc; 1889 } 1890 1891 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1892 if (rc) { 1893 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1894 return rc; 1895 } 1896 1897 return 0; 1898 } 1899 1900 static void qede_napi_disable_remove(struct qede_dev *edev) 1901 { 1902 int i; 1903 1904 for_each_queue(i) { 1905 napi_disable(&edev->fp_array[i].napi); 1906 1907 netif_napi_del(&edev->fp_array[i].napi); 1908 } 1909 } 1910 1911 static void qede_napi_add_enable(struct qede_dev *edev) 1912 { 1913 int i; 1914 1915 /* Add NAPI objects */ 1916 for_each_queue(i) { 1917 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, qede_poll); 1918 napi_enable(&edev->fp_array[i].napi); 1919 } 1920 } 1921 1922 static void qede_sync_free_irqs(struct qede_dev *edev) 1923 { 1924 int i; 1925 1926 for (i = 0; i < edev->int_info.used_cnt; i++) { 1927 if (edev->int_info.msix_cnt) { 1928 free_irq(edev->int_info.msix[i].vector, 1929 &edev->fp_array[i]); 1930 } else { 1931 edev->ops->common->simd_handler_clean(edev->cdev, i); 1932 } 1933 } 1934 1935 edev->int_info.used_cnt = 0; 1936 edev->int_info.msix_cnt = 0; 1937 } 1938 1939 static int qede_req_msix_irqs(struct qede_dev *edev) 1940 { 1941 int i, rc; 1942 1943 /* Sanitize number of interrupts == number of prepared RSS queues */ 1944 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1945 DP_ERR(edev, 1946 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1947 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1948 return -EINVAL; 1949 } 1950 1951 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1952 #ifdef CONFIG_RFS_ACCEL 1953 struct qede_fastpath *fp = &edev->fp_array[i]; 1954 1955 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1956 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1957 edev->int_info.msix[i].vector); 1958 if (rc) { 1959 DP_ERR(edev, "Failed to add CPU rmap\n"); 1960 qede_free_arfs(edev); 1961 } 1962 } 1963 #endif 1964 rc = request_irq(edev->int_info.msix[i].vector, 1965 qede_msix_fp_int, 0, edev->fp_array[i].name, 1966 &edev->fp_array[i]); 1967 if (rc) { 1968 DP_ERR(edev, "Request fp %d irq failed\n", i); 1969 #ifdef CONFIG_RFS_ACCEL 1970 if (edev->ndev->rx_cpu_rmap) 1971 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap); 1972 1973 edev->ndev->rx_cpu_rmap = NULL; 1974 #endif 1975 qede_sync_free_irqs(edev); 1976 return rc; 1977 } 1978 DP_VERBOSE(edev, NETIF_MSG_INTR, 1979 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1980 edev->fp_array[i].name, i, 1981 &edev->fp_array[i]); 1982 edev->int_info.used_cnt++; 1983 } 1984 1985 return 0; 1986 } 1987 1988 static void qede_simd_fp_handler(void *cookie) 1989 { 1990 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1991 1992 napi_schedule_irqoff(&fp->napi); 1993 } 1994 1995 static int qede_setup_irqs(struct qede_dev *edev) 1996 { 1997 int i, rc = 0; 1998 1999 /* Learn Interrupt configuration */ 2000 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 2001 if (rc) 2002 return rc; 2003 2004 if (edev->int_info.msix_cnt) { 2005 rc = qede_req_msix_irqs(edev); 2006 if (rc) 2007 return rc; 2008 edev->ndev->irq = edev->int_info.msix[0].vector; 2009 } else { 2010 const struct qed_common_ops *ops; 2011 2012 /* qed should learn receive the RSS ids and callbacks */ 2013 ops = edev->ops->common; 2014 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 2015 ops->simd_handler_config(edev->cdev, 2016 &edev->fp_array[i], i, 2017 qede_simd_fp_handler); 2018 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 2019 } 2020 return 0; 2021 } 2022 2023 static int qede_drain_txq(struct qede_dev *edev, 2024 struct qede_tx_queue *txq, bool allow_drain) 2025 { 2026 int rc, cnt = 1000; 2027 2028 while (txq->sw_tx_cons != txq->sw_tx_prod) { 2029 if (!cnt) { 2030 if (allow_drain) { 2031 DP_NOTICE(edev, 2032 "Tx queue[%d] is stuck, requesting MCP to drain\n", 2033 txq->index); 2034 rc = edev->ops->common->drain(edev->cdev); 2035 if (rc) 2036 return rc; 2037 return qede_drain_txq(edev, txq, false); 2038 } 2039 DP_NOTICE(edev, 2040 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 2041 txq->index, txq->sw_tx_prod, 2042 txq->sw_tx_cons); 2043 return -ENODEV; 2044 } 2045 cnt--; 2046 usleep_range(1000, 2000); 2047 barrier(); 2048 } 2049 2050 /* FW finished processing, wait for HW to transmit all tx packets */ 2051 usleep_range(1000, 2000); 2052 2053 return 0; 2054 } 2055 2056 static int qede_stop_txq(struct qede_dev *edev, 2057 struct qede_tx_queue *txq, int rss_id) 2058 { 2059 /* delete doorbell from doorbell recovery mechanism */ 2060 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 2061 &txq->tx_db); 2062 2063 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 2064 } 2065 2066 static int qede_stop_queues(struct qede_dev *edev) 2067 { 2068 struct qed_update_vport_params *vport_update_params; 2069 struct qed_dev *cdev = edev->cdev; 2070 struct qede_fastpath *fp; 2071 int rc, i; 2072 2073 /* Disable the vport */ 2074 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2075 if (!vport_update_params) 2076 return -ENOMEM; 2077 2078 vport_update_params->vport_id = 0; 2079 vport_update_params->update_vport_active_flg = 1; 2080 vport_update_params->vport_active_flg = 0; 2081 vport_update_params->update_rss_flg = 0; 2082 2083 rc = edev->ops->vport_update(cdev, vport_update_params); 2084 vfree(vport_update_params); 2085 2086 if (rc) { 2087 DP_ERR(edev, "Failed to update vport\n"); 2088 return rc; 2089 } 2090 2091 /* Flush Tx queues. If needed, request drain from MCP */ 2092 for_each_queue(i) { 2093 fp = &edev->fp_array[i]; 2094 2095 if (fp->type & QEDE_FASTPATH_TX) { 2096 int cos; 2097 2098 for_each_cos_in_txq(edev, cos) { 2099 rc = qede_drain_txq(edev, &fp->txq[cos], true); 2100 if (rc) 2101 return rc; 2102 } 2103 } 2104 2105 if (fp->type & QEDE_FASTPATH_XDP) { 2106 rc = qede_drain_txq(edev, fp->xdp_tx, true); 2107 if (rc) 2108 return rc; 2109 } 2110 } 2111 2112 /* Stop all Queues in reverse order */ 2113 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 2114 fp = &edev->fp_array[i]; 2115 2116 /* Stop the Tx Queue(s) */ 2117 if (fp->type & QEDE_FASTPATH_TX) { 2118 int cos; 2119 2120 for_each_cos_in_txq(edev, cos) { 2121 rc = qede_stop_txq(edev, &fp->txq[cos], i); 2122 if (rc) 2123 return rc; 2124 } 2125 } 2126 2127 /* Stop the Rx Queue */ 2128 if (fp->type & QEDE_FASTPATH_RX) { 2129 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 2130 if (rc) { 2131 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 2132 return rc; 2133 } 2134 } 2135 2136 /* Stop the XDP forwarding queue */ 2137 if (fp->type & QEDE_FASTPATH_XDP) { 2138 rc = qede_stop_txq(edev, fp->xdp_tx, i); 2139 if (rc) 2140 return rc; 2141 2142 bpf_prog_put(fp->rxq->xdp_prog); 2143 } 2144 } 2145 2146 /* Stop the vport */ 2147 rc = edev->ops->vport_stop(cdev, 0); 2148 if (rc) 2149 DP_ERR(edev, "Failed to stop VPORT\n"); 2150 2151 return rc; 2152 } 2153 2154 static int qede_start_txq(struct qede_dev *edev, 2155 struct qede_fastpath *fp, 2156 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2157 { 2158 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2159 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2160 struct qed_queue_start_common_params params; 2161 struct qed_txq_start_ret_params ret_params; 2162 int rc; 2163 2164 memset(¶ms, 0, sizeof(params)); 2165 memset(&ret_params, 0, sizeof(ret_params)); 2166 2167 /* Let the XDP queue share the queue-zone with one of the regular txq. 2168 * We don't really care about its coalescing. 2169 */ 2170 if (txq->is_xdp) 2171 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2172 else 2173 params.queue_id = txq->index; 2174 2175 params.p_sb = fp->sb_info; 2176 params.sb_idx = sb_idx; 2177 params.tc = txq->cos; 2178 2179 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2180 page_cnt, &ret_params); 2181 if (rc) { 2182 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2183 return rc; 2184 } 2185 2186 txq->doorbell_addr = ret_params.p_doorbell; 2187 txq->handle = ret_params.p_handle; 2188 2189 /* Determine the FW consumer address associated */ 2190 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2191 2192 /* Prepare the doorbell parameters */ 2193 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2194 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2195 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2196 DQ_XCM_ETH_TX_BD_PROD_CMD); 2197 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2198 2199 /* register doorbell with doorbell recovery mechanism */ 2200 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2201 &txq->tx_db, DB_REC_WIDTH_32B, 2202 DB_REC_KERNEL); 2203 2204 return rc; 2205 } 2206 2207 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2208 { 2209 int vlan_removal_en = 1; 2210 struct qed_dev *cdev = edev->cdev; 2211 struct qed_dev_info *qed_info = &edev->dev_info.common; 2212 struct qed_update_vport_params *vport_update_params; 2213 struct qed_queue_start_common_params q_params; 2214 struct qed_start_vport_params start = {0}; 2215 int rc, i; 2216 2217 if (!edev->num_queues) { 2218 DP_ERR(edev, 2219 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2220 return -EINVAL; 2221 } 2222 2223 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2224 if (!vport_update_params) 2225 return -ENOMEM; 2226 2227 start.handle_ptp_pkts = !!(edev->ptp); 2228 start.gro_enable = !edev->gro_disable; 2229 start.mtu = edev->ndev->mtu; 2230 start.vport_id = 0; 2231 start.drop_ttl0 = true; 2232 start.remove_inner_vlan = vlan_removal_en; 2233 start.clear_stats = clear_stats; 2234 2235 rc = edev->ops->vport_start(cdev, &start); 2236 2237 if (rc) { 2238 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2239 goto out; 2240 } 2241 2242 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2243 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2244 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2245 2246 for_each_queue(i) { 2247 struct qede_fastpath *fp = &edev->fp_array[i]; 2248 dma_addr_t p_phys_table; 2249 u32 page_cnt; 2250 2251 if (fp->type & QEDE_FASTPATH_RX) { 2252 struct qed_rxq_start_ret_params ret_params; 2253 struct qede_rx_queue *rxq = fp->rxq; 2254 __le16 *val; 2255 2256 memset(&ret_params, 0, sizeof(ret_params)); 2257 memset(&q_params, 0, sizeof(q_params)); 2258 q_params.queue_id = rxq->rxq_id; 2259 q_params.vport_id = 0; 2260 q_params.p_sb = fp->sb_info; 2261 q_params.sb_idx = RX_PI; 2262 2263 p_phys_table = 2264 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2265 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2266 2267 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2268 rxq->rx_buf_size, 2269 rxq->rx_bd_ring.p_phys_addr, 2270 p_phys_table, 2271 page_cnt, &ret_params); 2272 if (rc) { 2273 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2274 rc); 2275 goto out; 2276 } 2277 2278 /* Use the return parameters */ 2279 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2280 rxq->handle = ret_params.p_handle; 2281 2282 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2283 rxq->hw_cons_ptr = val; 2284 2285 qede_update_rx_prod(edev, rxq); 2286 } 2287 2288 if (fp->type & QEDE_FASTPATH_XDP) { 2289 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2290 if (rc) 2291 goto out; 2292 2293 bpf_prog_add(edev->xdp_prog, 1); 2294 fp->rxq->xdp_prog = edev->xdp_prog; 2295 } 2296 2297 if (fp->type & QEDE_FASTPATH_TX) { 2298 int cos; 2299 2300 for_each_cos_in_txq(edev, cos) { 2301 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2302 TX_PI(cos)); 2303 if (rc) 2304 goto out; 2305 } 2306 } 2307 } 2308 2309 /* Prepare and send the vport enable */ 2310 vport_update_params->vport_id = start.vport_id; 2311 vport_update_params->update_vport_active_flg = 1; 2312 vport_update_params->vport_active_flg = 1; 2313 2314 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2315 qed_info->tx_switching) { 2316 vport_update_params->update_tx_switching_flg = 1; 2317 vport_update_params->tx_switching_flg = 1; 2318 } 2319 2320 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2321 &vport_update_params->update_rss_flg); 2322 2323 rc = edev->ops->vport_update(cdev, vport_update_params); 2324 if (rc) 2325 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2326 2327 out: 2328 vfree(vport_update_params); 2329 return rc; 2330 } 2331 2332 enum qede_unload_mode { 2333 QEDE_UNLOAD_NORMAL, 2334 QEDE_UNLOAD_RECOVERY, 2335 }; 2336 2337 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2338 bool is_locked) 2339 { 2340 struct qed_link_params link_params; 2341 int rc; 2342 2343 DP_INFO(edev, "Starting qede unload\n"); 2344 2345 if (!is_locked) 2346 __qede_lock(edev); 2347 2348 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2349 2350 if (mode != QEDE_UNLOAD_RECOVERY) 2351 edev->state = QEDE_STATE_CLOSED; 2352 2353 qede_rdma_dev_event_close(edev); 2354 2355 /* Close OS Tx */ 2356 netif_tx_disable(edev->ndev); 2357 netif_carrier_off(edev->ndev); 2358 2359 if (mode != QEDE_UNLOAD_RECOVERY) { 2360 /* Reset the link */ 2361 memset(&link_params, 0, sizeof(link_params)); 2362 link_params.link_up = false; 2363 edev->ops->common->set_link(edev->cdev, &link_params); 2364 2365 rc = qede_stop_queues(edev); 2366 if (rc) { 2367 #ifdef CONFIG_RFS_ACCEL 2368 if (edev->dev_info.common.b_arfs_capable) { 2369 qede_poll_for_freeing_arfs_filters(edev); 2370 if (edev->ndev->rx_cpu_rmap) 2371 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap); 2372 2373 edev->ndev->rx_cpu_rmap = NULL; 2374 } 2375 #endif 2376 qede_sync_free_irqs(edev); 2377 goto out; 2378 } 2379 2380 DP_INFO(edev, "Stopped Queues\n"); 2381 } 2382 2383 qede_vlan_mark_nonconfigured(edev); 2384 edev->ops->fastpath_stop(edev->cdev); 2385 2386 if (edev->dev_info.common.b_arfs_capable) { 2387 qede_poll_for_freeing_arfs_filters(edev); 2388 qede_free_arfs(edev); 2389 } 2390 2391 /* Release the interrupts */ 2392 qede_sync_free_irqs(edev); 2393 edev->ops->common->set_fp_int(edev->cdev, 0); 2394 2395 qede_napi_disable_remove(edev); 2396 2397 if (mode == QEDE_UNLOAD_RECOVERY) 2398 qede_empty_tx_queues(edev); 2399 2400 qede_free_mem_load(edev); 2401 qede_free_fp_array(edev); 2402 2403 out: 2404 if (!is_locked) 2405 __qede_unlock(edev); 2406 2407 if (mode != QEDE_UNLOAD_RECOVERY) 2408 DP_NOTICE(edev, "Link is down\n"); 2409 2410 edev->ptp_skip_txts = 0; 2411 2412 DP_INFO(edev, "Ending qede unload\n"); 2413 } 2414 2415 enum qede_load_mode { 2416 QEDE_LOAD_NORMAL, 2417 QEDE_LOAD_RELOAD, 2418 QEDE_LOAD_RECOVERY, 2419 }; 2420 2421 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2422 bool is_locked) 2423 { 2424 struct qed_link_params link_params; 2425 struct ethtool_coalesce coal = {}; 2426 u8 num_tc; 2427 int rc, i; 2428 2429 DP_INFO(edev, "Starting qede load\n"); 2430 2431 if (!is_locked) 2432 __qede_lock(edev); 2433 2434 rc = qede_set_num_queues(edev); 2435 if (rc) 2436 goto out; 2437 2438 rc = qede_alloc_fp_array(edev); 2439 if (rc) 2440 goto out; 2441 2442 qede_init_fp(edev); 2443 2444 rc = qede_alloc_mem_load(edev); 2445 if (rc) 2446 goto err1; 2447 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2448 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2449 2450 rc = qede_set_real_num_queues(edev); 2451 if (rc) 2452 goto err2; 2453 2454 if (qede_alloc_arfs(edev)) { 2455 edev->ndev->features &= ~NETIF_F_NTUPLE; 2456 edev->dev_info.common.b_arfs_capable = false; 2457 } 2458 2459 qede_napi_add_enable(edev); 2460 DP_INFO(edev, "Napi added and enabled\n"); 2461 2462 rc = qede_setup_irqs(edev); 2463 if (rc) 2464 goto err3; 2465 DP_INFO(edev, "Setup IRQs succeeded\n"); 2466 2467 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2468 if (rc) 2469 goto err4; 2470 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2471 2472 num_tc = netdev_get_num_tc(edev->ndev); 2473 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2474 qede_setup_tc(edev->ndev, num_tc); 2475 2476 /* Program un-configured VLANs */ 2477 qede_configure_vlan_filters(edev); 2478 2479 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2480 2481 /* Ask for link-up using current configuration */ 2482 memset(&link_params, 0, sizeof(link_params)); 2483 link_params.link_up = true; 2484 edev->ops->common->set_link(edev->cdev, &link_params); 2485 2486 edev->state = QEDE_STATE_OPEN; 2487 2488 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS; 2489 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS; 2490 2491 for_each_queue(i) { 2492 if (edev->coal_entry[i].isvalid) { 2493 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc; 2494 coal.tx_coalesce_usecs = edev->coal_entry[i].txc; 2495 } 2496 __qede_unlock(edev); 2497 qede_set_per_coalesce(edev->ndev, i, &coal); 2498 __qede_lock(edev); 2499 } 2500 DP_INFO(edev, "Ending successfully qede load\n"); 2501 2502 goto out; 2503 err4: 2504 qede_sync_free_irqs(edev); 2505 err3: 2506 qede_napi_disable_remove(edev); 2507 err2: 2508 qede_free_mem_load(edev); 2509 err1: 2510 edev->ops->common->set_fp_int(edev->cdev, 0); 2511 qede_free_fp_array(edev); 2512 edev->num_queues = 0; 2513 edev->fp_num_tx = 0; 2514 edev->fp_num_rx = 0; 2515 out: 2516 if (!is_locked) 2517 __qede_unlock(edev); 2518 2519 return rc; 2520 } 2521 2522 /* 'func' should be able to run between unload and reload assuming interface 2523 * is actually running, or afterwards in case it's currently DOWN. 2524 */ 2525 void qede_reload(struct qede_dev *edev, 2526 struct qede_reload_args *args, bool is_locked) 2527 { 2528 if (!is_locked) 2529 __qede_lock(edev); 2530 2531 /* Since qede_lock is held, internal state wouldn't change even 2532 * if netdev state would start transitioning. Check whether current 2533 * internal configuration indicates device is up, then reload. 2534 */ 2535 if (edev->state == QEDE_STATE_OPEN) { 2536 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2537 if (args) 2538 args->func(edev, args); 2539 qede_load(edev, QEDE_LOAD_RELOAD, true); 2540 2541 /* Since no one is going to do it for us, re-configure */ 2542 qede_config_rx_mode(edev->ndev); 2543 } else if (args) { 2544 args->func(edev, args); 2545 } 2546 2547 if (!is_locked) 2548 __qede_unlock(edev); 2549 } 2550 2551 /* called with rtnl_lock */ 2552 static int qede_open(struct net_device *ndev) 2553 { 2554 struct qede_dev *edev = netdev_priv(ndev); 2555 int rc; 2556 2557 netif_carrier_off(ndev); 2558 2559 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2560 2561 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2562 if (rc) 2563 return rc; 2564 2565 udp_tunnel_nic_reset_ntf(ndev); 2566 2567 edev->ops->common->update_drv_state(edev->cdev, true); 2568 2569 return 0; 2570 } 2571 2572 static int qede_close(struct net_device *ndev) 2573 { 2574 struct qede_dev *edev = netdev_priv(ndev); 2575 2576 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2577 2578 if (edev->cdev) 2579 edev->ops->common->update_drv_state(edev->cdev, false); 2580 2581 return 0; 2582 } 2583 2584 static void qede_link_update(void *dev, struct qed_link_output *link) 2585 { 2586 struct qede_dev *edev = dev; 2587 2588 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2589 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2590 return; 2591 } 2592 2593 if (link->link_up) { 2594 if (!netif_carrier_ok(edev->ndev)) { 2595 DP_NOTICE(edev, "Link is up\n"); 2596 netif_tx_start_all_queues(edev->ndev); 2597 netif_carrier_on(edev->ndev); 2598 qede_rdma_dev_event_open(edev); 2599 } 2600 } else { 2601 if (netif_carrier_ok(edev->ndev)) { 2602 DP_NOTICE(edev, "Link is down\n"); 2603 netif_tx_disable(edev->ndev); 2604 netif_carrier_off(edev->ndev); 2605 qede_rdma_dev_event_close(edev); 2606 } 2607 } 2608 } 2609 2610 static void qede_schedule_recovery_handler(void *dev) 2611 { 2612 struct qede_dev *edev = dev; 2613 2614 if (edev->state == QEDE_STATE_RECOVERY) { 2615 DP_NOTICE(edev, 2616 "Avoid scheduling a recovery handling since already in recovery state\n"); 2617 return; 2618 } 2619 2620 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2621 schedule_delayed_work(&edev->sp_task, 0); 2622 2623 DP_INFO(edev, "Scheduled a recovery handler\n"); 2624 } 2625 2626 static void qede_recovery_failed(struct qede_dev *edev) 2627 { 2628 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2629 2630 netif_device_detach(edev->ndev); 2631 2632 if (edev->cdev) 2633 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2634 } 2635 2636 static void qede_recovery_handler(struct qede_dev *edev) 2637 { 2638 u32 curr_state = edev->state; 2639 int rc; 2640 2641 DP_NOTICE(edev, "Starting a recovery process\n"); 2642 2643 /* No need to acquire first the qede_lock since is done by qede_sp_task 2644 * before calling this function. 2645 */ 2646 edev->state = QEDE_STATE_RECOVERY; 2647 2648 edev->ops->common->recovery_prolog(edev->cdev); 2649 2650 if (curr_state == QEDE_STATE_OPEN) 2651 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2652 2653 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2654 2655 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2656 IS_VF(edev), QEDE_PROBE_RECOVERY); 2657 if (rc) { 2658 edev->cdev = NULL; 2659 goto err; 2660 } 2661 2662 if (curr_state == QEDE_STATE_OPEN) { 2663 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2664 if (rc) 2665 goto err; 2666 2667 qede_config_rx_mode(edev->ndev); 2668 udp_tunnel_nic_reset_ntf(edev->ndev); 2669 } 2670 2671 edev->state = curr_state; 2672 2673 DP_NOTICE(edev, "Recovery handling is done\n"); 2674 2675 return; 2676 2677 err: 2678 qede_recovery_failed(edev); 2679 } 2680 2681 static void qede_atomic_hw_err_handler(struct qede_dev *edev) 2682 { 2683 struct qed_dev *cdev = edev->cdev; 2684 2685 DP_NOTICE(edev, 2686 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n", 2687 edev->err_flags); 2688 2689 /* Get a call trace of the flow that led to the error */ 2690 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags)); 2691 2692 /* Prevent HW attentions from being reasserted */ 2693 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags)) 2694 edev->ops->common->attn_clr_enable(cdev, true); 2695 2696 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n"); 2697 } 2698 2699 static void qede_generic_hw_err_handler(struct qede_dev *edev) 2700 { 2701 DP_NOTICE(edev, 2702 "Generic sleepable HW error handling started - err_flags 0x%lx\n", 2703 edev->err_flags); 2704 2705 if (edev->devlink) { 2706 DP_NOTICE(edev, "Reporting fatal error to devlink\n"); 2707 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type); 2708 } 2709 2710 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2711 2712 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n"); 2713 } 2714 2715 static void qede_set_hw_err_flags(struct qede_dev *edev, 2716 enum qed_hw_err_type err_type) 2717 { 2718 unsigned long err_flags = 0; 2719 2720 switch (err_type) { 2721 case QED_HW_ERR_DMAE_FAIL: 2722 set_bit(QEDE_ERR_WARN, &err_flags); 2723 fallthrough; 2724 case QED_HW_ERR_MFW_RESP_FAIL: 2725 case QED_HW_ERR_HW_ATTN: 2726 case QED_HW_ERR_RAMROD_FAIL: 2727 case QED_HW_ERR_FW_ASSERT: 2728 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags); 2729 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags); 2730 /* make this error as recoverable and start recovery*/ 2731 set_bit(QEDE_ERR_IS_RECOVERABLE, &err_flags); 2732 break; 2733 2734 default: 2735 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type); 2736 break; 2737 } 2738 2739 edev->err_flags |= err_flags; 2740 } 2741 2742 static void qede_schedule_hw_err_handler(void *dev, 2743 enum qed_hw_err_type err_type) 2744 { 2745 struct qede_dev *edev = dev; 2746 2747 /* Fan failure cannot be masked by handling of another HW error or by a 2748 * concurrent recovery process. 2749 */ 2750 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 2751 edev->state == QEDE_STATE_RECOVERY) && 2752 err_type != QED_HW_ERR_FAN_FAIL) { 2753 DP_INFO(edev, 2754 "Avoid scheduling an error handling while another HW error is being handled\n"); 2755 return; 2756 } 2757 2758 if (err_type >= QED_HW_ERR_LAST) { 2759 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type); 2760 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2761 return; 2762 } 2763 2764 edev->last_err_type = err_type; 2765 qede_set_hw_err_flags(edev, err_type); 2766 qede_atomic_hw_err_handler(edev); 2767 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 2768 schedule_delayed_work(&edev->sp_task, 0); 2769 2770 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type); 2771 } 2772 2773 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2774 { 2775 struct netdev_queue *netdev_txq; 2776 2777 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2778 if (netif_xmit_stopped(netdev_txq)) 2779 return true; 2780 2781 return false; 2782 } 2783 2784 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2785 { 2786 struct qede_dev *edev = dev; 2787 struct netdev_hw_addr *ha; 2788 int i; 2789 2790 if (edev->ndev->features & NETIF_F_IP_CSUM) 2791 data->feat_flags |= QED_TLV_IP_CSUM; 2792 if (edev->ndev->features & NETIF_F_TSO) 2793 data->feat_flags |= QED_TLV_LSO; 2794 2795 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2796 eth_zero_addr(data->mac[1]); 2797 eth_zero_addr(data->mac[2]); 2798 /* Copy the first two UC macs */ 2799 netif_addr_lock_bh(edev->ndev); 2800 i = 1; 2801 netdev_for_each_uc_addr(ha, edev->ndev) { 2802 ether_addr_copy(data->mac[i++], ha->addr); 2803 if (i == QED_TLV_MAC_COUNT) 2804 break; 2805 } 2806 2807 netif_addr_unlock_bh(edev->ndev); 2808 } 2809 2810 static void qede_get_eth_tlv_data(void *dev, void *data) 2811 { 2812 struct qed_mfw_tlv_eth *etlv = data; 2813 struct qede_dev *edev = dev; 2814 struct qede_fastpath *fp; 2815 int i; 2816 2817 etlv->lso_maxoff_size = 0XFFFF; 2818 etlv->lso_maxoff_size_set = true; 2819 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2820 etlv->lso_minseg_size_set = true; 2821 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2822 etlv->prom_mode_set = true; 2823 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2824 etlv->tx_descr_size_set = true; 2825 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2826 etlv->rx_descr_size_set = true; 2827 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2828 etlv->iov_offload_set = true; 2829 2830 /* Fill information regarding queues; Should be done under the qede 2831 * lock to guarantee those don't change beneath our feet. 2832 */ 2833 etlv->txqs_empty = true; 2834 etlv->rxqs_empty = true; 2835 etlv->num_txqs_full = 0; 2836 etlv->num_rxqs_full = 0; 2837 2838 __qede_lock(edev); 2839 for_each_queue(i) { 2840 fp = &edev->fp_array[i]; 2841 if (fp->type & QEDE_FASTPATH_TX) { 2842 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2843 2844 if (txq->sw_tx_cons != txq->sw_tx_prod) 2845 etlv->txqs_empty = false; 2846 if (qede_is_txq_full(edev, txq)) 2847 etlv->num_txqs_full++; 2848 } 2849 if (fp->type & QEDE_FASTPATH_RX) { 2850 if (qede_has_rx_work(fp->rxq)) 2851 etlv->rxqs_empty = false; 2852 2853 /* This one is a bit tricky; Firmware might stop 2854 * placing packets if ring is not yet full. 2855 * Give an approximation. 2856 */ 2857 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2858 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2859 RX_RING_SIZE - 100) 2860 etlv->num_rxqs_full++; 2861 } 2862 } 2863 __qede_unlock(edev); 2864 2865 etlv->txqs_empty_set = true; 2866 etlv->rxqs_empty_set = true; 2867 etlv->num_txqs_full_set = true; 2868 etlv->num_rxqs_full_set = true; 2869 } 2870 2871 /** 2872 * qede_io_error_detected(): Called when PCI error is detected 2873 * 2874 * @pdev: Pointer to PCI device 2875 * @state: The current pci connection state 2876 * 2877 *Return: pci_ers_result_t. 2878 * 2879 * This function is called after a PCI bus error affecting 2880 * this device has been detected. 2881 */ 2882 static pci_ers_result_t 2883 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2884 { 2885 struct net_device *dev = pci_get_drvdata(pdev); 2886 struct qede_dev *edev = netdev_priv(dev); 2887 2888 if (!edev) 2889 return PCI_ERS_RESULT_NONE; 2890 2891 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2892 2893 __qede_lock(edev); 2894 if (edev->state == QEDE_STATE_RECOVERY) { 2895 DP_NOTICE(edev, "Device already in the recovery state\n"); 2896 __qede_unlock(edev); 2897 return PCI_ERS_RESULT_NONE; 2898 } 2899 2900 /* PF handles the recovery of its VFs */ 2901 if (IS_VF(edev)) { 2902 DP_VERBOSE(edev, QED_MSG_IOV, 2903 "VF recovery is handled by its PF\n"); 2904 __qede_unlock(edev); 2905 return PCI_ERS_RESULT_RECOVERED; 2906 } 2907 2908 /* Close OS Tx */ 2909 netif_tx_disable(edev->ndev); 2910 netif_carrier_off(edev->ndev); 2911 2912 set_bit(QEDE_SP_AER, &edev->sp_flags); 2913 schedule_delayed_work(&edev->sp_task, 0); 2914 2915 __qede_unlock(edev); 2916 2917 return PCI_ERS_RESULT_CAN_RECOVER; 2918 } 2919