1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015 QLogic Corporation 3 * 4 * This software is available under the terms of the GNU General Public License 5 * (GPL) Version 2, available from the file COPYING in the main directory of 6 * this source tree. 7 */ 8 9 #include <linux/module.h> 10 #include <linux/pci.h> 11 #include <linux/version.h> 12 #include <linux/device.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/errno.h> 17 #include <linux/list.h> 18 #include <linux/string.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/interrupt.h> 21 #include <asm/byteorder.h> 22 #include <asm/param.h> 23 #include <linux/io.h> 24 #include <linux/netdev_features.h> 25 #include <linux/udp.h> 26 #include <linux/tcp.h> 27 #ifdef CONFIG_QEDE_VXLAN 28 #include <net/vxlan.h> 29 #endif 30 #ifdef CONFIG_QEDE_GENEVE 31 #include <net/geneve.h> 32 #endif 33 #include <linux/ip.h> 34 #include <net/ipv6.h> 35 #include <net/tcp.h> 36 #include <linux/if_ether.h> 37 #include <linux/if_vlan.h> 38 #include <linux/pkt_sched.h> 39 #include <linux/ethtool.h> 40 #include <linux/in.h> 41 #include <linux/random.h> 42 #include <net/ip6_checksum.h> 43 #include <linux/bitops.h> 44 45 #include "qede.h" 46 47 static char version[] = 48 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 49 50 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 51 MODULE_LICENSE("GPL"); 52 MODULE_VERSION(DRV_MODULE_VERSION); 53 54 static uint debug; 55 module_param(debug, uint, 0); 56 MODULE_PARM_DESC(debug, " Default debug msglevel"); 57 58 static const struct qed_eth_ops *qed_ops; 59 60 #define CHIP_NUM_57980S_40 0x1634 61 #define CHIP_NUM_57980S_10 0x1666 62 #define CHIP_NUM_57980S_MF 0x1636 63 #define CHIP_NUM_57980S_100 0x1644 64 #define CHIP_NUM_57980S_50 0x1654 65 #define CHIP_NUM_57980S_25 0x1656 66 #define CHIP_NUM_57980S_IOV 0x1664 67 68 #ifndef PCI_DEVICE_ID_NX2_57980E 69 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 70 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 71 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 72 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 73 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 74 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 75 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 76 #endif 77 78 enum qede_pci_private { 79 QEDE_PRIVATE_PF, 80 QEDE_PRIVATE_VF 81 }; 82 83 static const struct pci_device_id qede_pci_tbl[] = { 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 91 { 0 } 92 }; 93 94 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 95 96 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 97 98 #define TX_TIMEOUT (5 * HZ) 99 100 static void qede_remove(struct pci_dev *pdev); 101 static int qede_alloc_rx_buffer(struct qede_dev *edev, 102 struct qede_rx_queue *rxq); 103 static void qede_link_update(void *dev, struct qed_link_output *link); 104 105 #ifdef CONFIG_QED_SRIOV 106 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos) 107 { 108 struct qede_dev *edev = netdev_priv(ndev); 109 110 if (vlan > 4095) { 111 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 112 return -EINVAL; 113 } 114 115 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 116 vlan, vf); 117 118 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 119 } 120 121 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 122 { 123 struct qede_dev *edev = netdev_priv(ndev); 124 125 DP_VERBOSE(edev, QED_MSG_IOV, 126 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", 127 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); 128 129 if (!is_valid_ether_addr(mac)) { 130 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 131 return -EINVAL; 132 } 133 134 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 135 } 136 137 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 138 { 139 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 140 struct qed_dev_info *qed_info = &edev->dev_info.common; 141 int rc; 142 143 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 144 145 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 146 147 /* Enable/Disable Tx switching for PF */ 148 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 149 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) { 150 struct qed_update_vport_params params; 151 152 memset(¶ms, 0, sizeof(params)); 153 params.vport_id = 0; 154 params.update_tx_switching_flg = 1; 155 params.tx_switching_flg = num_vfs_param ? 1 : 0; 156 edev->ops->vport_update(edev->cdev, ¶ms); 157 } 158 159 return rc; 160 } 161 #endif 162 163 static struct pci_driver qede_pci_driver = { 164 .name = "qede", 165 .id_table = qede_pci_tbl, 166 .probe = qede_probe, 167 .remove = qede_remove, 168 #ifdef CONFIG_QED_SRIOV 169 .sriov_configure = qede_sriov_configure, 170 #endif 171 }; 172 173 static void qede_force_mac(void *dev, u8 *mac) 174 { 175 struct qede_dev *edev = dev; 176 177 ether_addr_copy(edev->ndev->dev_addr, mac); 178 ether_addr_copy(edev->primary_mac, mac); 179 } 180 181 static struct qed_eth_cb_ops qede_ll_ops = { 182 { 183 .link_update = qede_link_update, 184 }, 185 .force_mac = qede_force_mac, 186 }; 187 188 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 189 void *ptr) 190 { 191 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 192 struct ethtool_drvinfo drvinfo; 193 struct qede_dev *edev; 194 195 /* Currently only support name change */ 196 if (event != NETDEV_CHANGENAME) 197 goto done; 198 199 /* Check whether this is a qede device */ 200 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 201 goto done; 202 203 memset(&drvinfo, 0, sizeof(drvinfo)); 204 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 205 if (strcmp(drvinfo.driver, "qede")) 206 goto done; 207 edev = netdev_priv(ndev); 208 209 /* Notify qed of the name change */ 210 if (!edev->ops || !edev->ops->common) 211 goto done; 212 edev->ops->common->set_id(edev->cdev, edev->ndev->name, 213 "qede"); 214 215 done: 216 return NOTIFY_DONE; 217 } 218 219 static struct notifier_block qede_netdev_notifier = { 220 .notifier_call = qede_netdev_event, 221 }; 222 223 static 224 int __init qede_init(void) 225 { 226 int ret; 227 228 pr_notice("qede_init: %s\n", version); 229 230 qed_ops = qed_get_eth_ops(); 231 if (!qed_ops) { 232 pr_notice("Failed to get qed ethtool operations\n"); 233 return -EINVAL; 234 } 235 236 /* Must register notifier before pci ops, since we might miss 237 * interface rename after pci probe and netdev registeration. 238 */ 239 ret = register_netdevice_notifier(&qede_netdev_notifier); 240 if (ret) { 241 pr_notice("Failed to register netdevice_notifier\n"); 242 qed_put_eth_ops(); 243 return -EINVAL; 244 } 245 246 ret = pci_register_driver(&qede_pci_driver); 247 if (ret) { 248 pr_notice("Failed to register driver\n"); 249 unregister_netdevice_notifier(&qede_netdev_notifier); 250 qed_put_eth_ops(); 251 return -EINVAL; 252 } 253 254 return 0; 255 } 256 257 static void __exit qede_cleanup(void) 258 { 259 pr_notice("qede_cleanup called\n"); 260 261 unregister_netdevice_notifier(&qede_netdev_notifier); 262 pci_unregister_driver(&qede_pci_driver); 263 qed_put_eth_ops(); 264 } 265 266 module_init(qede_init); 267 module_exit(qede_cleanup); 268 269 /* ------------------------------------------------------------------------- 270 * START OF FAST-PATH 271 * ------------------------------------------------------------------------- 272 */ 273 274 /* Unmap the data and free skb */ 275 static int qede_free_tx_pkt(struct qede_dev *edev, 276 struct qede_tx_queue *txq, 277 int *len) 278 { 279 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX; 280 struct sk_buff *skb = txq->sw_tx_ring[idx].skb; 281 struct eth_tx_1st_bd *first_bd; 282 struct eth_tx_bd *tx_data_bd; 283 int bds_consumed = 0; 284 int nbds; 285 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD; 286 int i, split_bd_len = 0; 287 288 if (unlikely(!skb)) { 289 DP_ERR(edev, 290 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n", 291 idx, txq->sw_tx_cons, txq->sw_tx_prod); 292 return -1; 293 } 294 295 *len = skb->len; 296 297 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 298 299 bds_consumed++; 300 301 nbds = first_bd->data.nbds; 302 303 if (data_split) { 304 struct eth_tx_bd *split = (struct eth_tx_bd *) 305 qed_chain_consume(&txq->tx_pbl); 306 split_bd_len = BD_UNMAP_LEN(split); 307 bds_consumed++; 308 } 309 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 310 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); 311 312 /* Unmap the data of the skb frags */ 313 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) { 314 tx_data_bd = (struct eth_tx_bd *) 315 qed_chain_consume(&txq->tx_pbl); 316 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd), 317 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); 318 } 319 320 while (bds_consumed++ < nbds) 321 qed_chain_consume(&txq->tx_pbl); 322 323 /* Free skb */ 324 dev_kfree_skb_any(skb); 325 txq->sw_tx_ring[idx].skb = NULL; 326 txq->sw_tx_ring[idx].flags = 0; 327 328 return 0; 329 } 330 331 /* Unmap the data and free skb when mapping failed during start_xmit */ 332 static void qede_free_failed_tx_pkt(struct qede_dev *edev, 333 struct qede_tx_queue *txq, 334 struct eth_tx_1st_bd *first_bd, 335 int nbd, 336 bool data_split) 337 { 338 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; 339 struct sk_buff *skb = txq->sw_tx_ring[idx].skb; 340 struct eth_tx_bd *tx_data_bd; 341 int i, split_bd_len = 0; 342 343 /* Return prod to its position before this skb was handled */ 344 qed_chain_set_prod(&txq->tx_pbl, 345 le16_to_cpu(txq->tx_db.data.bd_prod), 346 first_bd); 347 348 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl); 349 350 if (data_split) { 351 struct eth_tx_bd *split = (struct eth_tx_bd *) 352 qed_chain_produce(&txq->tx_pbl); 353 split_bd_len = BD_UNMAP_LEN(split); 354 nbd--; 355 } 356 357 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 358 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); 359 360 /* Unmap the data of the skb frags */ 361 for (i = 0; i < nbd; i++) { 362 tx_data_bd = (struct eth_tx_bd *) 363 qed_chain_produce(&txq->tx_pbl); 364 if (tx_data_bd->nbytes) 365 dma_unmap_page(&edev->pdev->dev, 366 BD_UNMAP_ADDR(tx_data_bd), 367 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); 368 } 369 370 /* Return again prod to its position before this skb was handled */ 371 qed_chain_set_prod(&txq->tx_pbl, 372 le16_to_cpu(txq->tx_db.data.bd_prod), 373 first_bd); 374 375 /* Free skb */ 376 dev_kfree_skb_any(skb); 377 txq->sw_tx_ring[idx].skb = NULL; 378 txq->sw_tx_ring[idx].flags = 0; 379 } 380 381 static u32 qede_xmit_type(struct qede_dev *edev, 382 struct sk_buff *skb, 383 int *ipv6_ext) 384 { 385 u32 rc = XMIT_L4_CSUM; 386 __be16 l3_proto; 387 388 if (skb->ip_summed != CHECKSUM_PARTIAL) 389 return XMIT_PLAIN; 390 391 l3_proto = vlan_get_protocol(skb); 392 if (l3_proto == htons(ETH_P_IPV6) && 393 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) 394 *ipv6_ext = 1; 395 396 if (skb->encapsulation) 397 rc |= XMIT_ENC; 398 399 if (skb_is_gso(skb)) 400 rc |= XMIT_LSO; 401 402 return rc; 403 } 404 405 static void qede_set_params_for_ipv6_ext(struct sk_buff *skb, 406 struct eth_tx_2nd_bd *second_bd, 407 struct eth_tx_3rd_bd *third_bd) 408 { 409 u8 l4_proto; 410 u16 bd2_bits1 = 0, bd2_bits2 = 0; 411 412 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT); 413 414 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) & 415 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK) 416 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT; 417 418 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH << 419 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT); 420 421 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) 422 l4_proto = ipv6_hdr(skb)->nexthdr; 423 else 424 l4_proto = ip_hdr(skb)->protocol; 425 426 if (l4_proto == IPPROTO_UDP) 427 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT; 428 429 if (third_bd) 430 third_bd->data.bitfields |= 431 cpu_to_le16(((tcp_hdrlen(skb) / 4) & 432 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) << 433 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT); 434 435 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1); 436 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2); 437 } 438 439 static int map_frag_to_bd(struct qede_dev *edev, 440 skb_frag_t *frag, 441 struct eth_tx_bd *bd) 442 { 443 dma_addr_t mapping; 444 445 /* Map skb non-linear frag data for DMA */ 446 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0, 447 skb_frag_size(frag), 448 DMA_TO_DEVICE); 449 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 450 DP_NOTICE(edev, "Unable to map frag - dropping packet\n"); 451 return -ENOMEM; 452 } 453 454 /* Setup the data pointer of the frag data */ 455 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag)); 456 457 return 0; 458 } 459 460 static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt) 461 { 462 if (is_encap_pkt) 463 return (skb_inner_transport_header(skb) + 464 inner_tcp_hdrlen(skb) - skb->data); 465 else 466 return (skb_transport_header(skb) + 467 tcp_hdrlen(skb) - skb->data); 468 } 469 470 /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */ 471 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) 472 static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb, 473 u8 xmit_type) 474 { 475 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1; 476 477 if (xmit_type & XMIT_LSO) { 478 int hlen; 479 480 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC); 481 482 /* linear payload would require its own BD */ 483 if (skb_headlen(skb) > hlen) 484 allowed_frags--; 485 } 486 487 return (skb_shinfo(skb)->nr_frags > allowed_frags); 488 } 489 #endif 490 491 /* Main transmit function */ 492 static 493 netdev_tx_t qede_start_xmit(struct sk_buff *skb, 494 struct net_device *ndev) 495 { 496 struct qede_dev *edev = netdev_priv(ndev); 497 struct netdev_queue *netdev_txq; 498 struct qede_tx_queue *txq; 499 struct eth_tx_1st_bd *first_bd; 500 struct eth_tx_2nd_bd *second_bd = NULL; 501 struct eth_tx_3rd_bd *third_bd = NULL; 502 struct eth_tx_bd *tx_data_bd = NULL; 503 u16 txq_index; 504 u8 nbd = 0; 505 dma_addr_t mapping; 506 int rc, frag_idx = 0, ipv6_ext = 0; 507 u8 xmit_type; 508 u16 idx; 509 u16 hlen; 510 bool data_split = false; 511 512 /* Get tx-queue context and netdev index */ 513 txq_index = skb_get_queue_mapping(skb); 514 WARN_ON(txq_index >= QEDE_TSS_CNT(edev)); 515 txq = QEDE_TX_QUEUE(edev, txq_index); 516 netdev_txq = netdev_get_tx_queue(ndev, txq_index); 517 518 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < 519 (MAX_SKB_FRAGS + 1)); 520 521 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext); 522 523 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) 524 if (qede_pkt_req_lin(edev, skb, xmit_type)) { 525 if (skb_linearize(skb)) { 526 DP_NOTICE(edev, 527 "SKB linearization failed - silently dropping this SKB\n"); 528 dev_kfree_skb_any(skb); 529 return NETDEV_TX_OK; 530 } 531 } 532 #endif 533 534 /* Fill the entry in the SW ring and the BDs in the FW ring */ 535 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; 536 txq->sw_tx_ring[idx].skb = skb; 537 first_bd = (struct eth_tx_1st_bd *) 538 qed_chain_produce(&txq->tx_pbl); 539 memset(first_bd, 0, sizeof(*first_bd)); 540 first_bd->data.bd_flags.bitfields = 541 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 542 543 /* Map skb linear data for DMA and set in the first BD */ 544 mapping = dma_map_single(&edev->pdev->dev, skb->data, 545 skb_headlen(skb), DMA_TO_DEVICE); 546 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 547 DP_NOTICE(edev, "SKB mapping failed\n"); 548 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false); 549 return NETDEV_TX_OK; 550 } 551 nbd++; 552 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 553 554 /* In case there is IPv6 with extension headers or LSO we need 2nd and 555 * 3rd BDs. 556 */ 557 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) { 558 second_bd = (struct eth_tx_2nd_bd *) 559 qed_chain_produce(&txq->tx_pbl); 560 memset(second_bd, 0, sizeof(*second_bd)); 561 562 nbd++; 563 third_bd = (struct eth_tx_3rd_bd *) 564 qed_chain_produce(&txq->tx_pbl); 565 memset(third_bd, 0, sizeof(*third_bd)); 566 567 nbd++; 568 /* We need to fill in additional data in second_bd... */ 569 tx_data_bd = (struct eth_tx_bd *)second_bd; 570 } 571 572 if (skb_vlan_tag_present(skb)) { 573 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb)); 574 first_bd->data.bd_flags.bitfields |= 575 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT; 576 } 577 578 /* Fill the parsing flags & params according to the requested offload */ 579 if (xmit_type & XMIT_L4_CSUM) { 580 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT; 581 582 /* We don't re-calculate IP checksum as it is already done by 583 * the upper stack 584 */ 585 first_bd->data.bd_flags.bitfields |= 586 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT; 587 588 if (xmit_type & XMIT_ENC) { 589 first_bd->data.bd_flags.bitfields |= 590 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; 591 } else { 592 /* In cases when OS doesn't indicate for inner offloads 593 * when packet is tunnelled, we need to override the HW 594 * tunnel configuration so that packets are treated as 595 * regular non tunnelled packets and no inner offloads 596 * are done by the hardware. 597 */ 598 first_bd->data.bitfields |= cpu_to_le16(temp); 599 } 600 601 /* If the packet is IPv6 with extension header, indicate that 602 * to FW and pass few params, since the device cracker doesn't 603 * support parsing IPv6 with extension header/s. 604 */ 605 if (unlikely(ipv6_ext)) 606 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd); 607 } 608 609 if (xmit_type & XMIT_LSO) { 610 first_bd->data.bd_flags.bitfields |= 611 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT); 612 third_bd->data.lso_mss = 613 cpu_to_le16(skb_shinfo(skb)->gso_size); 614 615 if (unlikely(xmit_type & XMIT_ENC)) { 616 first_bd->data.bd_flags.bitfields |= 617 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT; 618 hlen = qede_get_skb_hlen(skb, true); 619 } else { 620 first_bd->data.bd_flags.bitfields |= 621 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; 622 hlen = qede_get_skb_hlen(skb, false); 623 } 624 625 /* @@@TBD - if will not be removed need to check */ 626 third_bd->data.bitfields |= 627 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT)); 628 629 /* Make life easier for FW guys who can't deal with header and 630 * data on same BD. If we need to split, use the second bd... 631 */ 632 if (unlikely(skb_headlen(skb) > hlen)) { 633 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 634 "TSO split header size is %d (%x:%x)\n", 635 first_bd->nbytes, first_bd->addr.hi, 636 first_bd->addr.lo); 637 638 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi), 639 le32_to_cpu(first_bd->addr.lo)) + 640 hlen; 641 642 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping, 643 le16_to_cpu(first_bd->nbytes) - 644 hlen); 645 646 /* this marks the BD as one that has no 647 * individual mapping 648 */ 649 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD; 650 651 first_bd->nbytes = cpu_to_le16(hlen); 652 653 tx_data_bd = (struct eth_tx_bd *)third_bd; 654 data_split = true; 655 } 656 } 657 658 /* Handle fragmented skb */ 659 /* special handle for frags inside 2nd and 3rd bds.. */ 660 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) { 661 rc = map_frag_to_bd(edev, 662 &skb_shinfo(skb)->frags[frag_idx], 663 tx_data_bd); 664 if (rc) { 665 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, 666 data_split); 667 return NETDEV_TX_OK; 668 } 669 670 if (tx_data_bd == (struct eth_tx_bd *)second_bd) 671 tx_data_bd = (struct eth_tx_bd *)third_bd; 672 else 673 tx_data_bd = NULL; 674 675 frag_idx++; 676 } 677 678 /* map last frags into 4th, 5th .... */ 679 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) { 680 tx_data_bd = (struct eth_tx_bd *) 681 qed_chain_produce(&txq->tx_pbl); 682 683 memset(tx_data_bd, 0, sizeof(*tx_data_bd)); 684 685 rc = map_frag_to_bd(edev, 686 &skb_shinfo(skb)->frags[frag_idx], 687 tx_data_bd); 688 if (rc) { 689 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, 690 data_split); 691 return NETDEV_TX_OK; 692 } 693 } 694 695 /* update the first BD with the actual num BDs */ 696 first_bd->data.nbds = nbd; 697 698 netdev_tx_sent_queue(netdev_txq, skb->len); 699 700 skb_tx_timestamp(skb); 701 702 /* Advance packet producer only before sending the packet since mapping 703 * of pages may fail. 704 */ 705 txq->sw_tx_prod++; 706 707 /* 'next page' entries are counted in the producer value */ 708 txq->tx_db.data.bd_prod = 709 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl)); 710 711 /* wmb makes sure that the BDs data is updated before updating the 712 * producer, otherwise FW may read old data from the BDs. 713 */ 714 wmb(); 715 barrier(); 716 writel(txq->tx_db.raw, txq->doorbell_addr); 717 718 /* mmiowb is needed to synchronize doorbell writes from more than one 719 * processor. It guarantees that the write arrives to the device before 720 * the queue lock is released and another start_xmit is called (possibly 721 * on another CPU). Without this barrier, the next doorbell can bypass 722 * this doorbell. This is applicable to IA64/Altix systems. 723 */ 724 mmiowb(); 725 726 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl) 727 < (MAX_SKB_FRAGS + 1))) { 728 netif_tx_stop_queue(netdev_txq); 729 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 730 "Stop queue was called\n"); 731 /* paired memory barrier is in qede_tx_int(), we have to keep 732 * ordering of set_bit() in netif_tx_stop_queue() and read of 733 * fp->bd_tx_cons 734 */ 735 smp_mb(); 736 737 if (qed_chain_get_elem_left(&txq->tx_pbl) 738 >= (MAX_SKB_FRAGS + 1) && 739 (edev->state == QEDE_STATE_OPEN)) { 740 netif_tx_wake_queue(netdev_txq); 741 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, 742 "Wake queue was called\n"); 743 } 744 } 745 746 return NETDEV_TX_OK; 747 } 748 749 int qede_txq_has_work(struct qede_tx_queue *txq) 750 { 751 u16 hw_bd_cons; 752 753 /* Tell compiler that consumer and producer can change */ 754 barrier(); 755 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); 756 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1) 757 return 0; 758 759 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl); 760 } 761 762 static int qede_tx_int(struct qede_dev *edev, 763 struct qede_tx_queue *txq) 764 { 765 struct netdev_queue *netdev_txq; 766 u16 hw_bd_cons; 767 unsigned int pkts_compl = 0, bytes_compl = 0; 768 int rc; 769 770 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index); 771 772 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); 773 barrier(); 774 775 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) { 776 int len = 0; 777 778 rc = qede_free_tx_pkt(edev, txq, &len); 779 if (rc) { 780 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n", 781 hw_bd_cons, 782 qed_chain_get_cons_idx(&txq->tx_pbl)); 783 break; 784 } 785 786 bytes_compl += len; 787 pkts_compl++; 788 txq->sw_tx_cons++; 789 } 790 791 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 792 793 /* Need to make the tx_bd_cons update visible to start_xmit() 794 * before checking for netif_tx_queue_stopped(). Without the 795 * memory barrier, there is a small possibility that 796 * start_xmit() will miss it and cause the queue to be stopped 797 * forever. 798 * On the other hand we need an rmb() here to ensure the proper 799 * ordering of bit testing in the following 800 * netif_tx_queue_stopped(txq) call. 801 */ 802 smp_mb(); 803 804 if (unlikely(netif_tx_queue_stopped(netdev_txq))) { 805 /* Taking tx_lock is needed to prevent reenabling the queue 806 * while it's empty. This could have happen if rx_action() gets 807 * suspended in qede_tx_int() after the condition before 808 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()): 809 * 810 * stops the queue->sees fresh tx_bd_cons->releases the queue-> 811 * sends some packets consuming the whole queue again-> 812 * stops the queue 813 */ 814 815 __netif_tx_lock(netdev_txq, smp_processor_id()); 816 817 if ((netif_tx_queue_stopped(netdev_txq)) && 818 (edev->state == QEDE_STATE_OPEN) && 819 (qed_chain_get_elem_left(&txq->tx_pbl) 820 >= (MAX_SKB_FRAGS + 1))) { 821 netif_tx_wake_queue(netdev_txq); 822 DP_VERBOSE(edev, NETIF_MSG_TX_DONE, 823 "Wake queue was called\n"); 824 } 825 826 __netif_tx_unlock(netdev_txq); 827 } 828 829 return 0; 830 } 831 832 bool qede_has_rx_work(struct qede_rx_queue *rxq) 833 { 834 u16 hw_comp_cons, sw_comp_cons; 835 836 /* Tell compiler that status block fields can change */ 837 barrier(); 838 839 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 840 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 841 842 return hw_comp_cons != sw_comp_cons; 843 } 844 845 static bool qede_has_tx_work(struct qede_fastpath *fp) 846 { 847 u8 tc; 848 849 for (tc = 0; tc < fp->edev->num_tc; tc++) 850 if (qede_txq_has_work(&fp->txqs[tc])) 851 return true; 852 return false; 853 } 854 855 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq) 856 { 857 qed_chain_consume(&rxq->rx_bd_ring); 858 rxq->sw_rx_cons++; 859 } 860 861 /* This function reuses the buffer(from an offset) from 862 * consumer index to producer index in the bd ring 863 */ 864 static inline void qede_reuse_page(struct qede_dev *edev, 865 struct qede_rx_queue *rxq, 866 struct sw_rx_data *curr_cons) 867 { 868 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); 869 struct sw_rx_data *curr_prod; 870 dma_addr_t new_mapping; 871 872 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 873 *curr_prod = *curr_cons; 874 875 new_mapping = curr_prod->mapping + curr_prod->page_offset; 876 877 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping)); 878 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping)); 879 880 rxq->sw_rx_prod++; 881 curr_cons->data = NULL; 882 } 883 884 /* In case of allocation failures reuse buffers 885 * from consumer index to produce buffers for firmware 886 */ 887 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, 888 struct qede_dev *edev, u8 count) 889 { 890 struct sw_rx_data *curr_cons; 891 892 for (; count > 0; count--) { 893 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; 894 qede_reuse_page(edev, rxq, curr_cons); 895 qede_rx_bd_ring_consume(rxq); 896 } 897 } 898 899 static inline int qede_realloc_rx_buffer(struct qede_dev *edev, 900 struct qede_rx_queue *rxq, 901 struct sw_rx_data *curr_cons) 902 { 903 /* Move to the next segment in the page */ 904 curr_cons->page_offset += rxq->rx_buf_seg_size; 905 906 if (curr_cons->page_offset == PAGE_SIZE) { 907 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { 908 /* Since we failed to allocate new buffer 909 * current buffer can be used again. 910 */ 911 curr_cons->page_offset -= rxq->rx_buf_seg_size; 912 913 return -ENOMEM; 914 } 915 916 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping, 917 PAGE_SIZE, DMA_FROM_DEVICE); 918 } else { 919 /* Increment refcount of the page as we don't want 920 * network stack to take the ownership of the page 921 * which can be recycled multiple times by the driver. 922 */ 923 page_ref_inc(curr_cons->data); 924 qede_reuse_page(edev, rxq, curr_cons); 925 } 926 927 return 0; 928 } 929 930 static inline void qede_update_rx_prod(struct qede_dev *edev, 931 struct qede_rx_queue *rxq) 932 { 933 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring); 934 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring); 935 struct eth_rx_prod_data rx_prods = {0}; 936 937 /* Update producers */ 938 rx_prods.bd_prod = cpu_to_le16(bd_prod); 939 rx_prods.cqe_prod = cpu_to_le16(cqe_prod); 940 941 /* Make sure that the BD and SGE data is updated before updating the 942 * producers since FW might read the BD/SGE right after the producer 943 * is updated. 944 */ 945 wmb(); 946 947 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods), 948 (u32 *)&rx_prods); 949 950 /* mmiowb is needed to synchronize doorbell writes from more than one 951 * processor. It guarantees that the write arrives to the device before 952 * the napi lock is released and another qede_poll is called (possibly 953 * on another CPU). Without this barrier, the next doorbell can bypass 954 * this doorbell. This is applicable to IA64/Altix systems. 955 */ 956 mmiowb(); 957 } 958 959 static u32 qede_get_rxhash(struct qede_dev *edev, 960 u8 bitfields, 961 __le32 rss_hash, 962 enum pkt_hash_types *rxhash_type) 963 { 964 enum rss_hash_type htype; 965 966 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE); 967 968 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) { 969 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) || 970 (htype == RSS_HASH_TYPE_IPV6)) ? 971 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4; 972 return le32_to_cpu(rss_hash); 973 } 974 *rxhash_type = PKT_HASH_TYPE_NONE; 975 return 0; 976 } 977 978 static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag) 979 { 980 skb_checksum_none_assert(skb); 981 982 if (csum_flag & QEDE_CSUM_UNNECESSARY) 983 skb->ip_summed = CHECKSUM_UNNECESSARY; 984 985 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) 986 skb->csum_level = 1; 987 } 988 989 static inline void qede_skb_receive(struct qede_dev *edev, 990 struct qede_fastpath *fp, 991 struct sk_buff *skb, 992 u16 vlan_tag) 993 { 994 if (vlan_tag) 995 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 996 vlan_tag); 997 998 napi_gro_receive(&fp->napi, skb); 999 } 1000 1001 static void qede_set_gro_params(struct qede_dev *edev, 1002 struct sk_buff *skb, 1003 struct eth_fast_path_rx_tpa_start_cqe *cqe) 1004 { 1005 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags); 1006 1007 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) & 1008 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2) 1009 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6; 1010 else 1011 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; 1012 1013 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) - 1014 cqe->header_len; 1015 } 1016 1017 static int qede_fill_frag_skb(struct qede_dev *edev, 1018 struct qede_rx_queue *rxq, 1019 u8 tpa_agg_index, 1020 u16 len_on_bd) 1021 { 1022 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons & 1023 NUM_RX_BDS_MAX]; 1024 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index]; 1025 struct sk_buff *skb = tpa_info->skb; 1026 1027 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) 1028 goto out; 1029 1030 /* Add one frag and update the appropriate fields in the skb */ 1031 skb_fill_page_desc(skb, tpa_info->frag_id++, 1032 current_bd->data, current_bd->page_offset, 1033 len_on_bd); 1034 1035 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) { 1036 /* Incr page ref count to reuse on allocation failure 1037 * so that it doesn't get freed while freeing SKB. 1038 */ 1039 page_ref_inc(current_bd->data); 1040 goto out; 1041 } 1042 1043 qed_chain_consume(&rxq->rx_bd_ring); 1044 rxq->sw_rx_cons++; 1045 1046 skb->data_len += len_on_bd; 1047 skb->truesize += rxq->rx_buf_seg_size; 1048 skb->len += len_on_bd; 1049 1050 return 0; 1051 1052 out: 1053 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1054 qede_recycle_rx_bd_ring(rxq, edev, 1); 1055 return -ENOMEM; 1056 } 1057 1058 static void qede_tpa_start(struct qede_dev *edev, 1059 struct qede_rx_queue *rxq, 1060 struct eth_fast_path_rx_tpa_start_cqe *cqe) 1061 { 1062 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; 1063 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring); 1064 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); 1065 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 1066 dma_addr_t mapping = tpa_info->replace_buf_mapping; 1067 struct sw_rx_data *sw_rx_data_cons; 1068 struct sw_rx_data *sw_rx_data_prod; 1069 enum pkt_hash_types rxhash_type; 1070 u32 rxhash; 1071 1072 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; 1073 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 1074 1075 /* Use pre-allocated replacement buffer - we can't release the agg. 1076 * start until its over and we don't want to risk allocation failing 1077 * here, so re-allocate when aggregation will be over. 1078 */ 1079 sw_rx_data_prod->mapping = replace_buf->mapping; 1080 1081 sw_rx_data_prod->data = replace_buf->data; 1082 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping)); 1083 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping)); 1084 sw_rx_data_prod->page_offset = replace_buf->page_offset; 1085 1086 rxq->sw_rx_prod++; 1087 1088 /* move partial skb from cons to pool (don't unmap yet) 1089 * save mapping, incase we drop the packet later on. 1090 */ 1091 tpa_info->start_buf = *sw_rx_data_cons; 1092 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi), 1093 le32_to_cpu(rx_bd_cons->addr.lo)); 1094 1095 tpa_info->start_buf_mapping = mapping; 1096 rxq->sw_rx_cons++; 1097 1098 /* set tpa state to start only if we are able to allocate skb 1099 * for this aggregation, otherwise mark as error and aggregation will 1100 * be dropped 1101 */ 1102 tpa_info->skb = netdev_alloc_skb(edev->ndev, 1103 le16_to_cpu(cqe->len_on_first_bd)); 1104 if (unlikely(!tpa_info->skb)) { 1105 DP_NOTICE(edev, "Failed to allocate SKB for gro\n"); 1106 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1107 goto cons_buf; 1108 } 1109 1110 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd)); 1111 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe)); 1112 1113 /* Start filling in the aggregation info */ 1114 tpa_info->frag_id = 0; 1115 tpa_info->agg_state = QEDE_AGG_STATE_START; 1116 1117 rxhash = qede_get_rxhash(edev, cqe->bitfields, 1118 cqe->rss_hash, &rxhash_type); 1119 skb_set_hash(tpa_info->skb, rxhash, rxhash_type); 1120 if ((le16_to_cpu(cqe->pars_flags.flags) >> 1121 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) & 1122 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK) 1123 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag); 1124 else 1125 tpa_info->vlan_tag = 0; 1126 1127 /* This is needed in order to enable forwarding support */ 1128 qede_set_gro_params(edev, tpa_info->skb, cqe); 1129 1130 cons_buf: /* We still need to handle bd_len_list to consume buffers */ 1131 if (likely(cqe->ext_bd_len_list[0])) 1132 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1133 le16_to_cpu(cqe->ext_bd_len_list[0])); 1134 1135 if (unlikely(cqe->ext_bd_len_list[1])) { 1136 DP_ERR(edev, 1137 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n"); 1138 tpa_info->agg_state = QEDE_AGG_STATE_ERROR; 1139 } 1140 } 1141 1142 #ifdef CONFIG_INET 1143 static void qede_gro_ip_csum(struct sk_buff *skb) 1144 { 1145 const struct iphdr *iph = ip_hdr(skb); 1146 struct tcphdr *th; 1147 1148 skb_set_transport_header(skb, sizeof(struct iphdr)); 1149 th = tcp_hdr(skb); 1150 1151 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb), 1152 iph->saddr, iph->daddr, 0); 1153 1154 tcp_gro_complete(skb); 1155 } 1156 1157 static void qede_gro_ipv6_csum(struct sk_buff *skb) 1158 { 1159 struct ipv6hdr *iph = ipv6_hdr(skb); 1160 struct tcphdr *th; 1161 1162 skb_set_transport_header(skb, sizeof(struct ipv6hdr)); 1163 th = tcp_hdr(skb); 1164 1165 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb), 1166 &iph->saddr, &iph->daddr, 0); 1167 tcp_gro_complete(skb); 1168 } 1169 #endif 1170 1171 static void qede_gro_receive(struct qede_dev *edev, 1172 struct qede_fastpath *fp, 1173 struct sk_buff *skb, 1174 u16 vlan_tag) 1175 { 1176 /* FW can send a single MTU sized packet from gro flow 1177 * due to aggregation timeout/last segment etc. which 1178 * is not expected to be a gro packet. If a skb has zero 1179 * frags then simply push it in the stack as non gso skb. 1180 */ 1181 if (unlikely(!skb->data_len)) { 1182 skb_shinfo(skb)->gso_type = 0; 1183 skb_shinfo(skb)->gso_size = 0; 1184 goto send_skb; 1185 } 1186 1187 #ifdef CONFIG_INET 1188 if (skb_shinfo(skb)->gso_size) { 1189 skb_set_network_header(skb, 0); 1190 1191 switch (skb->protocol) { 1192 case htons(ETH_P_IP): 1193 qede_gro_ip_csum(skb); 1194 break; 1195 case htons(ETH_P_IPV6): 1196 qede_gro_ipv6_csum(skb); 1197 break; 1198 default: 1199 DP_ERR(edev, 1200 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n", 1201 ntohs(skb->protocol)); 1202 } 1203 } 1204 #endif 1205 1206 send_skb: 1207 skb_record_rx_queue(skb, fp->rss_id); 1208 qede_skb_receive(edev, fp, skb, vlan_tag); 1209 } 1210 1211 static inline void qede_tpa_cont(struct qede_dev *edev, 1212 struct qede_rx_queue *rxq, 1213 struct eth_fast_path_rx_tpa_cont_cqe *cqe) 1214 { 1215 int i; 1216 1217 for (i = 0; cqe->len_list[i]; i++) 1218 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1219 le16_to_cpu(cqe->len_list[i])); 1220 1221 if (unlikely(i > 1)) 1222 DP_ERR(edev, 1223 "Strange - TPA cont with more than a single len_list entry\n"); 1224 } 1225 1226 static void qede_tpa_end(struct qede_dev *edev, 1227 struct qede_fastpath *fp, 1228 struct eth_fast_path_rx_tpa_end_cqe *cqe) 1229 { 1230 struct qede_rx_queue *rxq = fp->rxq; 1231 struct qede_agg_info *tpa_info; 1232 struct sk_buff *skb; 1233 int i; 1234 1235 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; 1236 skb = tpa_info->skb; 1237 1238 for (i = 0; cqe->len_list[i]; i++) 1239 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, 1240 le16_to_cpu(cqe->len_list[i])); 1241 if (unlikely(i > 1)) 1242 DP_ERR(edev, 1243 "Strange - TPA emd with more than a single len_list entry\n"); 1244 1245 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) 1246 goto err; 1247 1248 /* Sanity */ 1249 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1)) 1250 DP_ERR(edev, 1251 "Strange - TPA had %02x BDs, but SKB has only %d frags\n", 1252 cqe->num_of_bds, tpa_info->frag_id); 1253 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len))) 1254 DP_ERR(edev, 1255 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n", 1256 le16_to_cpu(cqe->total_packet_len), skb->len); 1257 1258 memcpy(skb->data, 1259 page_address(tpa_info->start_buf.data) + 1260 tpa_info->start_cqe.placement_offset + 1261 tpa_info->start_buf.page_offset, 1262 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd)); 1263 1264 /* Recycle [mapped] start buffer for the next replacement */ 1265 tpa_info->replace_buf = tpa_info->start_buf; 1266 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; 1267 1268 /* Finalize the SKB */ 1269 skb->protocol = eth_type_trans(skb, edev->ndev); 1270 skb->ip_summed = CHECKSUM_UNNECESSARY; 1271 1272 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count 1273 * to skb_shinfo(skb)->gso_segs 1274 */ 1275 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs); 1276 1277 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag); 1278 1279 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 1280 1281 return; 1282 err: 1283 /* The BD starting the aggregation is still mapped; Re-use it for 1284 * future aggregations [as replacement buffer] 1285 */ 1286 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf, 1287 sizeof(struct sw_rx_data)); 1288 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; 1289 tpa_info->start_buf.data = NULL; 1290 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 1291 dev_kfree_skb_any(tpa_info->skb); 1292 tpa_info->skb = NULL; 1293 } 1294 1295 static bool qede_tunn_exist(u16 flag) 1296 { 1297 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK << 1298 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT)); 1299 } 1300 1301 static u8 qede_check_tunn_csum(u16 flag) 1302 { 1303 u16 csum_flag = 0; 1304 u8 tcsum = 0; 1305 1306 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK << 1307 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT)) 1308 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK << 1309 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT; 1310 1311 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << 1312 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { 1313 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << 1314 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; 1315 tcsum = QEDE_TUNN_CSUM_UNNECESSARY; 1316 } 1317 1318 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK << 1319 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT | 1320 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << 1321 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; 1322 1323 if (csum_flag & flag) 1324 return QEDE_CSUM_ERROR; 1325 1326 return QEDE_CSUM_UNNECESSARY | tcsum; 1327 } 1328 1329 static u8 qede_check_notunn_csum(u16 flag) 1330 { 1331 u16 csum_flag = 0; 1332 u8 csum = 0; 1333 1334 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << 1335 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { 1336 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << 1337 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; 1338 csum = QEDE_CSUM_UNNECESSARY; 1339 } 1340 1341 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << 1342 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; 1343 1344 if (csum_flag & flag) 1345 return QEDE_CSUM_ERROR; 1346 1347 return csum; 1348 } 1349 1350 static u8 qede_check_csum(u16 flag) 1351 { 1352 if (!qede_tunn_exist(flag)) 1353 return qede_check_notunn_csum(flag); 1354 else 1355 return qede_check_tunn_csum(flag); 1356 } 1357 1358 static int qede_rx_int(struct qede_fastpath *fp, int budget) 1359 { 1360 struct qede_dev *edev = fp->edev; 1361 struct qede_rx_queue *rxq = fp->rxq; 1362 1363 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag; 1364 int rx_pkt = 0; 1365 u8 csum_flag; 1366 1367 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1368 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1369 1370 /* Memory barrier to prevent the CPU from doing speculative reads of CQE 1371 * / BD in the while-loop before reading hw_comp_cons. If the CQE is 1372 * read before it is written by FW, then FW writes CQE and SB, and then 1373 * the CPU reads the hw_comp_cons, it will use an old CQE. 1374 */ 1375 rmb(); 1376 1377 /* Loop to complete all indicated BDs */ 1378 while (sw_comp_cons != hw_comp_cons) { 1379 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1380 enum pkt_hash_types rxhash_type; 1381 enum eth_rx_cqe_type cqe_type; 1382 struct sw_rx_data *sw_rx_data; 1383 union eth_rx_cqe *cqe; 1384 struct sk_buff *skb; 1385 struct page *data; 1386 __le16 flags; 1387 u16 len, pad; 1388 u32 rx_hash; 1389 1390 /* Get the CQE from the completion ring */ 1391 cqe = (union eth_rx_cqe *) 1392 qed_chain_consume(&rxq->rx_comp_ring); 1393 cqe_type = cqe->fast_path_regular.type; 1394 1395 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) { 1396 edev->ops->eth_cqe_completion( 1397 edev->cdev, fp->rss_id, 1398 (struct eth_slow_path_rx_cqe *)cqe); 1399 goto next_cqe; 1400 } 1401 1402 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) { 1403 switch (cqe_type) { 1404 case ETH_RX_CQE_TYPE_TPA_START: 1405 qede_tpa_start(edev, rxq, 1406 &cqe->fast_path_tpa_start); 1407 goto next_cqe; 1408 case ETH_RX_CQE_TYPE_TPA_CONT: 1409 qede_tpa_cont(edev, rxq, 1410 &cqe->fast_path_tpa_cont); 1411 goto next_cqe; 1412 case ETH_RX_CQE_TYPE_TPA_END: 1413 qede_tpa_end(edev, fp, 1414 &cqe->fast_path_tpa_end); 1415 goto next_rx_only; 1416 default: 1417 break; 1418 } 1419 } 1420 1421 /* Get the data from the SW ring */ 1422 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1423 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1424 data = sw_rx_data->data; 1425 1426 fp_cqe = &cqe->fast_path_regular; 1427 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1428 pad = fp_cqe->placement_offset; 1429 flags = cqe->fast_path_regular.pars_flags.flags; 1430 1431 /* If this is an error packet then drop it */ 1432 parse_flag = le16_to_cpu(flags); 1433 1434 csum_flag = qede_check_csum(parse_flag); 1435 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) { 1436 DP_NOTICE(edev, 1437 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n", 1438 sw_comp_cons, parse_flag); 1439 rxq->rx_hw_errors++; 1440 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); 1441 goto next_cqe; 1442 } 1443 1444 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE); 1445 if (unlikely(!skb)) { 1446 DP_NOTICE(edev, 1447 "Build_skb failed, dropping incoming packet\n"); 1448 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); 1449 rxq->rx_alloc_errors++; 1450 goto next_cqe; 1451 } 1452 1453 /* Copy data into SKB */ 1454 if (len + pad <= QEDE_RX_HDR_SIZE) { 1455 memcpy(skb_put(skb, len), 1456 page_address(data) + pad + 1457 sw_rx_data->page_offset, len); 1458 qede_reuse_page(edev, rxq, sw_rx_data); 1459 } else { 1460 struct skb_frag_struct *frag; 1461 unsigned int pull_len; 1462 unsigned char *va; 1463 1464 frag = &skb_shinfo(skb)->frags[0]; 1465 1466 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data, 1467 pad + sw_rx_data->page_offset, 1468 len, rxq->rx_buf_seg_size); 1469 1470 va = skb_frag_address(frag); 1471 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE); 1472 1473 /* Align the pull_len to optimize memcpy */ 1474 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long))); 1475 1476 skb_frag_size_sub(frag, pull_len); 1477 frag->page_offset += pull_len; 1478 skb->data_len -= pull_len; 1479 skb->tail += pull_len; 1480 1481 if (unlikely(qede_realloc_rx_buffer(edev, rxq, 1482 sw_rx_data))) { 1483 DP_ERR(edev, "Failed to allocate rx buffer\n"); 1484 /* Incr page ref count to reuse on allocation 1485 * failure so that it doesn't get freed while 1486 * freeing SKB. 1487 */ 1488 1489 page_ref_inc(sw_rx_data->data); 1490 rxq->rx_alloc_errors++; 1491 qede_recycle_rx_bd_ring(rxq, edev, 1492 fp_cqe->bd_num); 1493 dev_kfree_skb_any(skb); 1494 goto next_cqe; 1495 } 1496 } 1497 1498 qede_rx_bd_ring_consume(rxq); 1499 1500 if (fp_cqe->bd_num != 1) { 1501 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len); 1502 u8 num_frags; 1503 1504 pkt_len -= len; 1505 1506 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0; 1507 num_frags--) { 1508 u16 cur_size = pkt_len > rxq->rx_buf_size ? 1509 rxq->rx_buf_size : pkt_len; 1510 if (unlikely(!cur_size)) { 1511 DP_ERR(edev, 1512 "Still got %d BDs for mapping jumbo, but length became 0\n", 1513 num_frags); 1514 qede_recycle_rx_bd_ring(rxq, edev, 1515 num_frags); 1516 dev_kfree_skb_any(skb); 1517 goto next_cqe; 1518 } 1519 1520 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { 1521 qede_recycle_rx_bd_ring(rxq, edev, 1522 num_frags); 1523 dev_kfree_skb_any(skb); 1524 goto next_cqe; 1525 } 1526 1527 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1528 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1529 qede_rx_bd_ring_consume(rxq); 1530 1531 dma_unmap_page(&edev->pdev->dev, 1532 sw_rx_data->mapping, 1533 PAGE_SIZE, DMA_FROM_DEVICE); 1534 1535 skb_fill_page_desc(skb, 1536 skb_shinfo(skb)->nr_frags++, 1537 sw_rx_data->data, 0, 1538 cur_size); 1539 1540 skb->truesize += PAGE_SIZE; 1541 skb->data_len += cur_size; 1542 skb->len += cur_size; 1543 pkt_len -= cur_size; 1544 } 1545 1546 if (unlikely(pkt_len)) 1547 DP_ERR(edev, 1548 "Mapped all BDs of jumbo, but still have %d bytes\n", 1549 pkt_len); 1550 } 1551 1552 skb->protocol = eth_type_trans(skb, edev->ndev); 1553 1554 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields, 1555 fp_cqe->rss_hash, 1556 &rxhash_type); 1557 1558 skb_set_hash(skb, rx_hash, rxhash_type); 1559 1560 qede_set_skb_csum(skb, csum_flag); 1561 1562 skb_record_rx_queue(skb, fp->rss_id); 1563 1564 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag)); 1565 next_rx_only: 1566 rx_pkt++; 1567 1568 next_cqe: /* don't consume bd rx buffer */ 1569 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1570 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1571 /* CR TPA - revisit how to handle budget in TPA perhaps 1572 * increase on "end" 1573 */ 1574 if (rx_pkt == budget) 1575 break; 1576 } /* repeat while sw_comp_cons != hw_comp_cons... */ 1577 1578 /* Update producers */ 1579 qede_update_rx_prod(edev, rxq); 1580 1581 return rx_pkt; 1582 } 1583 1584 static int qede_poll(struct napi_struct *napi, int budget) 1585 { 1586 int work_done = 0; 1587 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath, 1588 napi); 1589 struct qede_dev *edev = fp->edev; 1590 1591 while (1) { 1592 u8 tc; 1593 1594 for (tc = 0; tc < edev->num_tc; tc++) 1595 if (qede_txq_has_work(&fp->txqs[tc])) 1596 qede_tx_int(edev, &fp->txqs[tc]); 1597 1598 if (qede_has_rx_work(fp->rxq)) { 1599 work_done += qede_rx_int(fp, budget - work_done); 1600 1601 /* must not complete if we consumed full budget */ 1602 if (work_done >= budget) 1603 break; 1604 } 1605 1606 /* Fall out from the NAPI loop if needed */ 1607 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) { 1608 qed_sb_update_sb_idx(fp->sb_info); 1609 /* *_has_*_work() reads the status block, 1610 * thus we need to ensure that status block indices 1611 * have been actually read (qed_sb_update_sb_idx) 1612 * prior to this check (*_has_*_work) so that 1613 * we won't write the "newer" value of the status block 1614 * to HW (if there was a DMA right after 1615 * qede_has_rx_work and if there is no rmb, the memory 1616 * reading (qed_sb_update_sb_idx) may be postponed 1617 * to right before *_ack_sb). In this case there 1618 * will never be another interrupt until there is 1619 * another update of the status block, while there 1620 * is still unhandled work. 1621 */ 1622 rmb(); 1623 1624 if (!(qede_has_rx_work(fp->rxq) || 1625 qede_has_tx_work(fp))) { 1626 napi_complete(napi); 1627 /* Update and reenable interrupts */ 1628 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1629 1 /*update*/); 1630 break; 1631 } 1632 } 1633 } 1634 1635 return work_done; 1636 } 1637 1638 static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie) 1639 { 1640 struct qede_fastpath *fp = fp_cookie; 1641 1642 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/); 1643 1644 napi_schedule_irqoff(&fp->napi); 1645 return IRQ_HANDLED; 1646 } 1647 1648 /* ------------------------------------------------------------------------- 1649 * END OF FAST-PATH 1650 * ------------------------------------------------------------------------- 1651 */ 1652 1653 static int qede_open(struct net_device *ndev); 1654 static int qede_close(struct net_device *ndev); 1655 static int qede_set_mac_addr(struct net_device *ndev, void *p); 1656 static void qede_set_rx_mode(struct net_device *ndev); 1657 static void qede_config_rx_mode(struct net_device *ndev); 1658 1659 static int qede_set_ucast_rx_mac(struct qede_dev *edev, 1660 enum qed_filter_xcast_params_type opcode, 1661 unsigned char mac[ETH_ALEN]) 1662 { 1663 struct qed_filter_params filter_cmd; 1664 1665 memset(&filter_cmd, 0, sizeof(filter_cmd)); 1666 filter_cmd.type = QED_FILTER_TYPE_UCAST; 1667 filter_cmd.filter.ucast.type = opcode; 1668 filter_cmd.filter.ucast.mac_valid = 1; 1669 ether_addr_copy(filter_cmd.filter.ucast.mac, mac); 1670 1671 return edev->ops->filter_config(edev->cdev, &filter_cmd); 1672 } 1673 1674 static int qede_set_ucast_rx_vlan(struct qede_dev *edev, 1675 enum qed_filter_xcast_params_type opcode, 1676 u16 vid) 1677 { 1678 struct qed_filter_params filter_cmd; 1679 1680 memset(&filter_cmd, 0, sizeof(filter_cmd)); 1681 filter_cmd.type = QED_FILTER_TYPE_UCAST; 1682 filter_cmd.filter.ucast.type = opcode; 1683 filter_cmd.filter.ucast.vlan_valid = 1; 1684 filter_cmd.filter.ucast.vlan = vid; 1685 1686 return edev->ops->filter_config(edev->cdev, &filter_cmd); 1687 } 1688 1689 void qede_fill_by_demand_stats(struct qede_dev *edev) 1690 { 1691 struct qed_eth_stats stats; 1692 1693 edev->ops->get_vport_stats(edev->cdev, &stats); 1694 edev->stats.no_buff_discards = stats.no_buff_discards; 1695 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes; 1696 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes; 1697 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes; 1698 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts; 1699 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts; 1700 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts; 1701 edev->stats.mftag_filter_discards = stats.mftag_filter_discards; 1702 edev->stats.mac_filter_discards = stats.mac_filter_discards; 1703 1704 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes; 1705 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes; 1706 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes; 1707 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts; 1708 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts; 1709 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts; 1710 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts; 1711 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts; 1712 edev->stats.coalesced_events = stats.tpa_coalesced_events; 1713 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num; 1714 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts; 1715 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes; 1716 1717 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets; 1718 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets; 1719 edev->stats.rx_128_to_255_byte_packets = 1720 stats.rx_128_to_255_byte_packets; 1721 edev->stats.rx_256_to_511_byte_packets = 1722 stats.rx_256_to_511_byte_packets; 1723 edev->stats.rx_512_to_1023_byte_packets = 1724 stats.rx_512_to_1023_byte_packets; 1725 edev->stats.rx_1024_to_1518_byte_packets = 1726 stats.rx_1024_to_1518_byte_packets; 1727 edev->stats.rx_1519_to_1522_byte_packets = 1728 stats.rx_1519_to_1522_byte_packets; 1729 edev->stats.rx_1519_to_2047_byte_packets = 1730 stats.rx_1519_to_2047_byte_packets; 1731 edev->stats.rx_2048_to_4095_byte_packets = 1732 stats.rx_2048_to_4095_byte_packets; 1733 edev->stats.rx_4096_to_9216_byte_packets = 1734 stats.rx_4096_to_9216_byte_packets; 1735 edev->stats.rx_9217_to_16383_byte_packets = 1736 stats.rx_9217_to_16383_byte_packets; 1737 edev->stats.rx_crc_errors = stats.rx_crc_errors; 1738 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames; 1739 edev->stats.rx_pause_frames = stats.rx_pause_frames; 1740 edev->stats.rx_pfc_frames = stats.rx_pfc_frames; 1741 edev->stats.rx_align_errors = stats.rx_align_errors; 1742 edev->stats.rx_carrier_errors = stats.rx_carrier_errors; 1743 edev->stats.rx_oversize_packets = stats.rx_oversize_packets; 1744 edev->stats.rx_jabbers = stats.rx_jabbers; 1745 edev->stats.rx_undersize_packets = stats.rx_undersize_packets; 1746 edev->stats.rx_fragments = stats.rx_fragments; 1747 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets; 1748 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets; 1749 edev->stats.tx_128_to_255_byte_packets = 1750 stats.tx_128_to_255_byte_packets; 1751 edev->stats.tx_256_to_511_byte_packets = 1752 stats.tx_256_to_511_byte_packets; 1753 edev->stats.tx_512_to_1023_byte_packets = 1754 stats.tx_512_to_1023_byte_packets; 1755 edev->stats.tx_1024_to_1518_byte_packets = 1756 stats.tx_1024_to_1518_byte_packets; 1757 edev->stats.tx_1519_to_2047_byte_packets = 1758 stats.tx_1519_to_2047_byte_packets; 1759 edev->stats.tx_2048_to_4095_byte_packets = 1760 stats.tx_2048_to_4095_byte_packets; 1761 edev->stats.tx_4096_to_9216_byte_packets = 1762 stats.tx_4096_to_9216_byte_packets; 1763 edev->stats.tx_9217_to_16383_byte_packets = 1764 stats.tx_9217_to_16383_byte_packets; 1765 edev->stats.tx_pause_frames = stats.tx_pause_frames; 1766 edev->stats.tx_pfc_frames = stats.tx_pfc_frames; 1767 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count; 1768 edev->stats.tx_total_collisions = stats.tx_total_collisions; 1769 edev->stats.brb_truncates = stats.brb_truncates; 1770 edev->stats.brb_discards = stats.brb_discards; 1771 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames; 1772 } 1773 1774 static struct rtnl_link_stats64 *qede_get_stats64( 1775 struct net_device *dev, 1776 struct rtnl_link_stats64 *stats) 1777 { 1778 struct qede_dev *edev = netdev_priv(dev); 1779 1780 qede_fill_by_demand_stats(edev); 1781 1782 stats->rx_packets = edev->stats.rx_ucast_pkts + 1783 edev->stats.rx_mcast_pkts + 1784 edev->stats.rx_bcast_pkts; 1785 stats->tx_packets = edev->stats.tx_ucast_pkts + 1786 edev->stats.tx_mcast_pkts + 1787 edev->stats.tx_bcast_pkts; 1788 1789 stats->rx_bytes = edev->stats.rx_ucast_bytes + 1790 edev->stats.rx_mcast_bytes + 1791 edev->stats.rx_bcast_bytes; 1792 1793 stats->tx_bytes = edev->stats.tx_ucast_bytes + 1794 edev->stats.tx_mcast_bytes + 1795 edev->stats.tx_bcast_bytes; 1796 1797 stats->tx_errors = edev->stats.tx_err_drop_pkts; 1798 stats->multicast = edev->stats.rx_mcast_pkts + 1799 edev->stats.rx_bcast_pkts; 1800 1801 stats->rx_fifo_errors = edev->stats.no_buff_discards; 1802 1803 stats->collisions = edev->stats.tx_total_collisions; 1804 stats->rx_crc_errors = edev->stats.rx_crc_errors; 1805 stats->rx_frame_errors = edev->stats.rx_align_errors; 1806 1807 return stats; 1808 } 1809 1810 #ifdef CONFIG_QED_SRIOV 1811 static int qede_get_vf_config(struct net_device *dev, int vfidx, 1812 struct ifla_vf_info *ivi) 1813 { 1814 struct qede_dev *edev = netdev_priv(dev); 1815 1816 if (!edev->ops) 1817 return -EINVAL; 1818 1819 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 1820 } 1821 1822 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 1823 int min_tx_rate, int max_tx_rate) 1824 { 1825 struct qede_dev *edev = netdev_priv(dev); 1826 1827 return edev->ops->iov->set_rate(edev->cdev, vfidx, max_tx_rate, 1828 max_tx_rate); 1829 } 1830 1831 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 1832 { 1833 struct qede_dev *edev = netdev_priv(dev); 1834 1835 if (!edev->ops) 1836 return -EINVAL; 1837 1838 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 1839 } 1840 1841 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 1842 int link_state) 1843 { 1844 struct qede_dev *edev = netdev_priv(dev); 1845 1846 if (!edev->ops) 1847 return -EINVAL; 1848 1849 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 1850 } 1851 #endif 1852 1853 static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action) 1854 { 1855 struct qed_update_vport_params params; 1856 int rc; 1857 1858 /* Proceed only if action actually needs to be performed */ 1859 if (edev->accept_any_vlan == action) 1860 return; 1861 1862 memset(¶ms, 0, sizeof(params)); 1863 1864 params.vport_id = 0; 1865 params.accept_any_vlan = action; 1866 params.update_accept_any_vlan_flg = 1; 1867 1868 rc = edev->ops->vport_update(edev->cdev, ¶ms); 1869 if (rc) { 1870 DP_ERR(edev, "Failed to %s accept-any-vlan\n", 1871 action ? "enable" : "disable"); 1872 } else { 1873 DP_INFO(edev, "%s accept-any-vlan\n", 1874 action ? "enabled" : "disabled"); 1875 edev->accept_any_vlan = action; 1876 } 1877 } 1878 1879 static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) 1880 { 1881 struct qede_dev *edev = netdev_priv(dev); 1882 struct qede_vlan *vlan, *tmp; 1883 int rc; 1884 1885 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid); 1886 1887 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL); 1888 if (!vlan) { 1889 DP_INFO(edev, "Failed to allocate struct for vlan\n"); 1890 return -ENOMEM; 1891 } 1892 INIT_LIST_HEAD(&vlan->list); 1893 vlan->vid = vid; 1894 vlan->configured = false; 1895 1896 /* Verify vlan isn't already configured */ 1897 list_for_each_entry(tmp, &edev->vlan_list, list) { 1898 if (tmp->vid == vlan->vid) { 1899 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1900 "vlan already configured\n"); 1901 kfree(vlan); 1902 return -EEXIST; 1903 } 1904 } 1905 1906 /* If interface is down, cache this VLAN ID and return */ 1907 if (edev->state != QEDE_STATE_OPEN) { 1908 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1909 "Interface is down, VLAN %d will be configured when interface is up\n", 1910 vid); 1911 if (vid != 0) 1912 edev->non_configured_vlans++; 1913 list_add(&vlan->list, &edev->vlan_list); 1914 1915 return 0; 1916 } 1917 1918 /* Check for the filter limit. 1919 * Note - vlan0 has a reserved filter and can be added without 1920 * worrying about quota 1921 */ 1922 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) || 1923 (vlan->vid == 0)) { 1924 rc = qede_set_ucast_rx_vlan(edev, 1925 QED_FILTER_XCAST_TYPE_ADD, 1926 vlan->vid); 1927 if (rc) { 1928 DP_ERR(edev, "Failed to configure VLAN %d\n", 1929 vlan->vid); 1930 kfree(vlan); 1931 return -EINVAL; 1932 } 1933 vlan->configured = true; 1934 1935 /* vlan0 filter isn't consuming out of our quota */ 1936 if (vlan->vid != 0) 1937 edev->configured_vlans++; 1938 } else { 1939 /* Out of quota; Activate accept-any-VLAN mode */ 1940 if (!edev->non_configured_vlans) 1941 qede_config_accept_any_vlan(edev, true); 1942 1943 edev->non_configured_vlans++; 1944 } 1945 1946 list_add(&vlan->list, &edev->vlan_list); 1947 1948 return 0; 1949 } 1950 1951 static void qede_del_vlan_from_list(struct qede_dev *edev, 1952 struct qede_vlan *vlan) 1953 { 1954 /* vlan0 filter isn't consuming out of our quota */ 1955 if (vlan->vid != 0) { 1956 if (vlan->configured) 1957 edev->configured_vlans--; 1958 else 1959 edev->non_configured_vlans--; 1960 } 1961 1962 list_del(&vlan->list); 1963 kfree(vlan); 1964 } 1965 1966 static int qede_configure_vlan_filters(struct qede_dev *edev) 1967 { 1968 int rc = 0, real_rc = 0, accept_any_vlan = 0; 1969 struct qed_dev_eth_info *dev_info; 1970 struct qede_vlan *vlan = NULL; 1971 1972 if (list_empty(&edev->vlan_list)) 1973 return 0; 1974 1975 dev_info = &edev->dev_info; 1976 1977 /* Configure non-configured vlans */ 1978 list_for_each_entry(vlan, &edev->vlan_list, list) { 1979 if (vlan->configured) 1980 continue; 1981 1982 /* We have used all our credits, now enable accept_any_vlan */ 1983 if ((vlan->vid != 0) && 1984 (edev->configured_vlans == dev_info->num_vlan_filters)) { 1985 accept_any_vlan = 1; 1986 continue; 1987 } 1988 1989 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid); 1990 1991 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD, 1992 vlan->vid); 1993 if (rc) { 1994 DP_ERR(edev, "Failed to configure VLAN %u\n", 1995 vlan->vid); 1996 real_rc = rc; 1997 continue; 1998 } 1999 2000 vlan->configured = true; 2001 /* vlan0 filter doesn't consume our VLAN filter's quota */ 2002 if (vlan->vid != 0) { 2003 edev->non_configured_vlans--; 2004 edev->configured_vlans++; 2005 } 2006 } 2007 2008 /* enable accept_any_vlan mode if we have more VLANs than credits, 2009 * or remove accept_any_vlan mode if we've actually removed 2010 * a non-configured vlan, and all remaining vlans are truly configured. 2011 */ 2012 2013 if (accept_any_vlan) 2014 qede_config_accept_any_vlan(edev, true); 2015 else if (!edev->non_configured_vlans) 2016 qede_config_accept_any_vlan(edev, false); 2017 2018 return real_rc; 2019 } 2020 2021 static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid) 2022 { 2023 struct qede_dev *edev = netdev_priv(dev); 2024 struct qede_vlan *vlan = NULL; 2025 int rc; 2026 2027 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid); 2028 2029 /* Find whether entry exists */ 2030 list_for_each_entry(vlan, &edev->vlan_list, list) 2031 if (vlan->vid == vid) 2032 break; 2033 2034 if (!vlan || (vlan->vid != vid)) { 2035 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 2036 "Vlan isn't configured\n"); 2037 return 0; 2038 } 2039 2040 if (edev->state != QEDE_STATE_OPEN) { 2041 /* As interface is already down, we don't have a VPORT 2042 * instance to remove vlan filter. So just update vlan list 2043 */ 2044 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 2045 "Interface is down, removing VLAN from list only\n"); 2046 qede_del_vlan_from_list(edev, vlan); 2047 return 0; 2048 } 2049 2050 /* Remove vlan */ 2051 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid); 2052 if (rc) { 2053 DP_ERR(edev, "Failed to remove VLAN %d\n", vid); 2054 return -EINVAL; 2055 } 2056 2057 qede_del_vlan_from_list(edev, vlan); 2058 2059 /* We have removed a VLAN - try to see if we can 2060 * configure non-configured VLAN from the list. 2061 */ 2062 rc = qede_configure_vlan_filters(edev); 2063 2064 return rc; 2065 } 2066 2067 static void qede_vlan_mark_nonconfigured(struct qede_dev *edev) 2068 { 2069 struct qede_vlan *vlan = NULL; 2070 2071 if (list_empty(&edev->vlan_list)) 2072 return; 2073 2074 list_for_each_entry(vlan, &edev->vlan_list, list) { 2075 if (!vlan->configured) 2076 continue; 2077 2078 vlan->configured = false; 2079 2080 /* vlan0 filter isn't consuming out of our quota */ 2081 if (vlan->vid != 0) { 2082 edev->non_configured_vlans++; 2083 edev->configured_vlans--; 2084 } 2085 2086 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 2087 "marked vlan %d as non-configured\n", 2088 vlan->vid); 2089 } 2090 2091 edev->accept_any_vlan = false; 2092 } 2093 2094 #ifdef CONFIG_QEDE_VXLAN 2095 static void qede_add_vxlan_port(struct net_device *dev, 2096 sa_family_t sa_family, __be16 port) 2097 { 2098 struct qede_dev *edev = netdev_priv(dev); 2099 u16 t_port = ntohs(port); 2100 2101 if (edev->vxlan_dst_port) 2102 return; 2103 2104 edev->vxlan_dst_port = t_port; 2105 2106 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port); 2107 2108 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); 2109 schedule_delayed_work(&edev->sp_task, 0); 2110 } 2111 2112 static void qede_del_vxlan_port(struct net_device *dev, 2113 sa_family_t sa_family, __be16 port) 2114 { 2115 struct qede_dev *edev = netdev_priv(dev); 2116 u16 t_port = ntohs(port); 2117 2118 if (t_port != edev->vxlan_dst_port) 2119 return; 2120 2121 edev->vxlan_dst_port = 0; 2122 2123 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port); 2124 2125 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); 2126 schedule_delayed_work(&edev->sp_task, 0); 2127 } 2128 #endif 2129 2130 #ifdef CONFIG_QEDE_GENEVE 2131 static void qede_add_geneve_port(struct net_device *dev, 2132 sa_family_t sa_family, __be16 port) 2133 { 2134 struct qede_dev *edev = netdev_priv(dev); 2135 u16 t_port = ntohs(port); 2136 2137 if (edev->geneve_dst_port) 2138 return; 2139 2140 edev->geneve_dst_port = t_port; 2141 2142 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port); 2143 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); 2144 schedule_delayed_work(&edev->sp_task, 0); 2145 } 2146 2147 static void qede_del_geneve_port(struct net_device *dev, 2148 sa_family_t sa_family, __be16 port) 2149 { 2150 struct qede_dev *edev = netdev_priv(dev); 2151 u16 t_port = ntohs(port); 2152 2153 if (t_port != edev->geneve_dst_port) 2154 return; 2155 2156 edev->geneve_dst_port = 0; 2157 2158 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port); 2159 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); 2160 schedule_delayed_work(&edev->sp_task, 0); 2161 } 2162 #endif 2163 2164 static const struct net_device_ops qede_netdev_ops = { 2165 .ndo_open = qede_open, 2166 .ndo_stop = qede_close, 2167 .ndo_start_xmit = qede_start_xmit, 2168 .ndo_set_rx_mode = qede_set_rx_mode, 2169 .ndo_set_mac_address = qede_set_mac_addr, 2170 .ndo_validate_addr = eth_validate_addr, 2171 .ndo_change_mtu = qede_change_mtu, 2172 #ifdef CONFIG_QED_SRIOV 2173 .ndo_set_vf_mac = qede_set_vf_mac, 2174 .ndo_set_vf_vlan = qede_set_vf_vlan, 2175 #endif 2176 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 2177 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 2178 .ndo_get_stats64 = qede_get_stats64, 2179 #ifdef CONFIG_QED_SRIOV 2180 .ndo_set_vf_link_state = qede_set_vf_link_state, 2181 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 2182 .ndo_get_vf_config = qede_get_vf_config, 2183 .ndo_set_vf_rate = qede_set_vf_rate, 2184 #endif 2185 #ifdef CONFIG_QEDE_VXLAN 2186 .ndo_add_vxlan_port = qede_add_vxlan_port, 2187 .ndo_del_vxlan_port = qede_del_vxlan_port, 2188 #endif 2189 #ifdef CONFIG_QEDE_GENEVE 2190 .ndo_add_geneve_port = qede_add_geneve_port, 2191 .ndo_del_geneve_port = qede_del_geneve_port, 2192 #endif 2193 }; 2194 2195 /* ------------------------------------------------------------------------- 2196 * START OF PROBE / REMOVE 2197 * ------------------------------------------------------------------------- 2198 */ 2199 2200 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 2201 struct pci_dev *pdev, 2202 struct qed_dev_eth_info *info, 2203 u32 dp_module, 2204 u8 dp_level) 2205 { 2206 struct net_device *ndev; 2207 struct qede_dev *edev; 2208 2209 ndev = alloc_etherdev_mqs(sizeof(*edev), 2210 info->num_queues, 2211 info->num_queues); 2212 if (!ndev) { 2213 pr_err("etherdev allocation failed\n"); 2214 return NULL; 2215 } 2216 2217 edev = netdev_priv(ndev); 2218 edev->ndev = ndev; 2219 edev->cdev = cdev; 2220 edev->pdev = pdev; 2221 edev->dp_module = dp_module; 2222 edev->dp_level = dp_level; 2223 edev->ops = qed_ops; 2224 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 2225 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 2226 2227 SET_NETDEV_DEV(ndev, &pdev->dev); 2228 2229 memset(&edev->stats, 0, sizeof(edev->stats)); 2230 memcpy(&edev->dev_info, info, sizeof(*info)); 2231 2232 edev->num_tc = edev->dev_info.num_tc; 2233 2234 INIT_LIST_HEAD(&edev->vlan_list); 2235 2236 return edev; 2237 } 2238 2239 static void qede_init_ndev(struct qede_dev *edev) 2240 { 2241 struct net_device *ndev = edev->ndev; 2242 struct pci_dev *pdev = edev->pdev; 2243 u32 hw_features; 2244 2245 pci_set_drvdata(pdev, ndev); 2246 2247 ndev->mem_start = edev->dev_info.common.pci_mem_start; 2248 ndev->base_addr = ndev->mem_start; 2249 ndev->mem_end = edev->dev_info.common.pci_mem_end; 2250 ndev->irq = edev->dev_info.common.pci_irq; 2251 2252 ndev->watchdog_timeo = TX_TIMEOUT; 2253 2254 ndev->netdev_ops = &qede_netdev_ops; 2255 2256 qede_set_ethtool_ops(ndev); 2257 2258 /* user-changeble features */ 2259 hw_features = NETIF_F_GRO | NETIF_F_SG | 2260 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2261 NETIF_F_TSO | NETIF_F_TSO6; 2262 2263 /* Encap features*/ 2264 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL | 2265 NETIF_F_TSO_ECN; 2266 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2267 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN | 2268 NETIF_F_TSO6 | NETIF_F_GSO_GRE | 2269 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM; 2270 2271 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 2272 NETIF_F_HIGHDMA; 2273 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 2274 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 2275 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 2276 2277 ndev->hw_features = hw_features; 2278 2279 /* Set network device HW mac */ 2280 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 2281 } 2282 2283 /* This function converts from 32b param to two params of level and module 2284 * Input 32b decoding: 2285 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 2286 * 'happy' flow, e.g. memory allocation failed. 2287 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 2288 * and provide important parameters. 2289 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 2290 * module. VERBOSE prints are for tracking the specific flow in low level. 2291 * 2292 * Notice that the level should be that of the lowest required logs. 2293 */ 2294 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 2295 { 2296 *p_dp_level = QED_LEVEL_NOTICE; 2297 *p_dp_module = 0; 2298 2299 if (debug & QED_LOG_VERBOSE_MASK) { 2300 *p_dp_level = QED_LEVEL_VERBOSE; 2301 *p_dp_module = (debug & 0x3FFFFFFF); 2302 } else if (debug & QED_LOG_INFO_MASK) { 2303 *p_dp_level = QED_LEVEL_INFO; 2304 } else if (debug & QED_LOG_NOTICE_MASK) { 2305 *p_dp_level = QED_LEVEL_NOTICE; 2306 } 2307 } 2308 2309 static void qede_free_fp_array(struct qede_dev *edev) 2310 { 2311 if (edev->fp_array) { 2312 struct qede_fastpath *fp; 2313 int i; 2314 2315 for_each_rss(i) { 2316 fp = &edev->fp_array[i]; 2317 2318 kfree(fp->sb_info); 2319 kfree(fp->rxq); 2320 kfree(fp->txqs); 2321 } 2322 kfree(edev->fp_array); 2323 } 2324 edev->num_rss = 0; 2325 } 2326 2327 static int qede_alloc_fp_array(struct qede_dev *edev) 2328 { 2329 struct qede_fastpath *fp; 2330 int i; 2331 2332 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev), 2333 sizeof(*edev->fp_array), GFP_KERNEL); 2334 if (!edev->fp_array) { 2335 DP_NOTICE(edev, "fp array allocation failed\n"); 2336 goto err; 2337 } 2338 2339 for_each_rss(i) { 2340 fp = &edev->fp_array[i]; 2341 2342 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL); 2343 if (!fp->sb_info) { 2344 DP_NOTICE(edev, "sb info struct allocation failed\n"); 2345 goto err; 2346 } 2347 2348 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL); 2349 if (!fp->rxq) { 2350 DP_NOTICE(edev, "RXQ struct allocation failed\n"); 2351 goto err; 2352 } 2353 2354 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL); 2355 if (!fp->txqs) { 2356 DP_NOTICE(edev, "TXQ array allocation failed\n"); 2357 goto err; 2358 } 2359 } 2360 2361 return 0; 2362 err: 2363 qede_free_fp_array(edev); 2364 return -ENOMEM; 2365 } 2366 2367 static void qede_sp_task(struct work_struct *work) 2368 { 2369 struct qede_dev *edev = container_of(work, struct qede_dev, 2370 sp_task.work); 2371 struct qed_dev *cdev = edev->cdev; 2372 2373 mutex_lock(&edev->qede_lock); 2374 2375 if (edev->state == QEDE_STATE_OPEN) { 2376 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 2377 qede_config_rx_mode(edev->ndev); 2378 } 2379 2380 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) { 2381 struct qed_tunn_params tunn_params; 2382 2383 memset(&tunn_params, 0, sizeof(tunn_params)); 2384 tunn_params.update_vxlan_port = 1; 2385 tunn_params.vxlan_port = edev->vxlan_dst_port; 2386 qed_ops->tunn_config(cdev, &tunn_params); 2387 } 2388 2389 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) { 2390 struct qed_tunn_params tunn_params; 2391 2392 memset(&tunn_params, 0, sizeof(tunn_params)); 2393 tunn_params.update_geneve_port = 1; 2394 tunn_params.geneve_port = edev->geneve_dst_port; 2395 qed_ops->tunn_config(cdev, &tunn_params); 2396 } 2397 2398 mutex_unlock(&edev->qede_lock); 2399 } 2400 2401 static void qede_update_pf_params(struct qed_dev *cdev) 2402 { 2403 struct qed_pf_params pf_params; 2404 2405 /* 64 rx + 64 tx */ 2406 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 2407 pf_params.eth_pf_params.num_cons = 128; 2408 qed_ops->common->update_pf_params(cdev, &pf_params); 2409 } 2410 2411 enum qede_probe_mode { 2412 QEDE_PROBE_NORMAL, 2413 }; 2414 2415 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 2416 bool is_vf, enum qede_probe_mode mode) 2417 { 2418 struct qed_probe_params probe_params; 2419 struct qed_slowpath_params params; 2420 struct qed_dev_eth_info dev_info; 2421 struct qede_dev *edev; 2422 struct qed_dev *cdev; 2423 int rc; 2424 2425 if (unlikely(dp_level & QED_LEVEL_INFO)) 2426 pr_notice("Starting qede probe\n"); 2427 2428 memset(&probe_params, 0, sizeof(probe_params)); 2429 probe_params.protocol = QED_PROTOCOL_ETH; 2430 probe_params.dp_module = dp_module; 2431 probe_params.dp_level = dp_level; 2432 probe_params.is_vf = is_vf; 2433 cdev = qed_ops->common->probe(pdev, &probe_params); 2434 if (!cdev) { 2435 rc = -ENODEV; 2436 goto err0; 2437 } 2438 2439 qede_update_pf_params(cdev); 2440 2441 /* Start the Slowpath-process */ 2442 memset(¶ms, 0, sizeof(struct qed_slowpath_params)); 2443 params.int_mode = QED_INT_MODE_MSIX; 2444 params.drv_major = QEDE_MAJOR_VERSION; 2445 params.drv_minor = QEDE_MINOR_VERSION; 2446 params.drv_rev = QEDE_REVISION_VERSION; 2447 params.drv_eng = QEDE_ENGINEERING_VERSION; 2448 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 2449 rc = qed_ops->common->slowpath_start(cdev, ¶ms); 2450 if (rc) { 2451 pr_notice("Cannot start slowpath\n"); 2452 goto err1; 2453 } 2454 2455 /* Learn information crucial for qede to progress */ 2456 rc = qed_ops->fill_dev_info(cdev, &dev_info); 2457 if (rc) 2458 goto err2; 2459 2460 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 2461 dp_level); 2462 if (!edev) { 2463 rc = -ENOMEM; 2464 goto err2; 2465 } 2466 2467 if (is_vf) 2468 edev->flags |= QEDE_FLAG_IS_VF; 2469 2470 qede_init_ndev(edev); 2471 2472 rc = register_netdev(edev->ndev); 2473 if (rc) { 2474 DP_NOTICE(edev, "Cannot register net-device\n"); 2475 goto err3; 2476 } 2477 2478 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION); 2479 2480 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 2481 2482 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 2483 mutex_init(&edev->qede_lock); 2484 2485 DP_INFO(edev, "Ending successfully qede probe\n"); 2486 2487 return 0; 2488 2489 err3: 2490 free_netdev(edev->ndev); 2491 err2: 2492 qed_ops->common->slowpath_stop(cdev); 2493 err1: 2494 qed_ops->common->remove(cdev); 2495 err0: 2496 return rc; 2497 } 2498 2499 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 2500 { 2501 bool is_vf = false; 2502 u32 dp_module = 0; 2503 u8 dp_level = 0; 2504 2505 switch ((enum qede_pci_private)id->driver_data) { 2506 case QEDE_PRIVATE_VF: 2507 if (debug & QED_LOG_VERBOSE_MASK) 2508 dev_err(&pdev->dev, "Probing a VF\n"); 2509 is_vf = true; 2510 break; 2511 default: 2512 if (debug & QED_LOG_VERBOSE_MASK) 2513 dev_err(&pdev->dev, "Probing a PF\n"); 2514 } 2515 2516 qede_config_debug(debug, &dp_module, &dp_level); 2517 2518 return __qede_probe(pdev, dp_module, dp_level, is_vf, 2519 QEDE_PROBE_NORMAL); 2520 } 2521 2522 enum qede_remove_mode { 2523 QEDE_REMOVE_NORMAL, 2524 }; 2525 2526 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 2527 { 2528 struct net_device *ndev = pci_get_drvdata(pdev); 2529 struct qede_dev *edev = netdev_priv(ndev); 2530 struct qed_dev *cdev = edev->cdev; 2531 2532 DP_INFO(edev, "Starting qede_remove\n"); 2533 2534 cancel_delayed_work_sync(&edev->sp_task); 2535 unregister_netdev(ndev); 2536 2537 edev->ops->common->set_power_state(cdev, PCI_D0); 2538 2539 pci_set_drvdata(pdev, NULL); 2540 2541 free_netdev(ndev); 2542 2543 /* Use global ops since we've freed edev */ 2544 qed_ops->common->slowpath_stop(cdev); 2545 qed_ops->common->remove(cdev); 2546 2547 pr_notice("Ending successfully qede_remove\n"); 2548 } 2549 2550 static void qede_remove(struct pci_dev *pdev) 2551 { 2552 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 2553 } 2554 2555 /* ------------------------------------------------------------------------- 2556 * START OF LOAD / UNLOAD 2557 * ------------------------------------------------------------------------- 2558 */ 2559 2560 static int qede_set_num_queues(struct qede_dev *edev) 2561 { 2562 int rc; 2563 u16 rss_num; 2564 2565 /* Setup queues according to possible resources*/ 2566 if (edev->req_rss) 2567 rss_num = edev->req_rss; 2568 else 2569 rss_num = netif_get_num_default_rss_queues() * 2570 edev->dev_info.common.num_hwfns; 2571 2572 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 2573 2574 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 2575 if (rc > 0) { 2576 /* Managed to request interrupts for our queues */ 2577 edev->num_rss = rc; 2578 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 2579 QEDE_RSS_CNT(edev), rss_num); 2580 rc = 0; 2581 } 2582 return rc; 2583 } 2584 2585 static void qede_free_mem_sb(struct qede_dev *edev, 2586 struct qed_sb_info *sb_info) 2587 { 2588 if (sb_info->sb_virt) 2589 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 2590 (void *)sb_info->sb_virt, sb_info->sb_phys); 2591 } 2592 2593 /* This function allocates fast-path status block memory */ 2594 static int qede_alloc_mem_sb(struct qede_dev *edev, 2595 struct qed_sb_info *sb_info, 2596 u16 sb_id) 2597 { 2598 struct status_block *sb_virt; 2599 dma_addr_t sb_phys; 2600 int rc; 2601 2602 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 2603 sizeof(*sb_virt), 2604 &sb_phys, GFP_KERNEL); 2605 if (!sb_virt) { 2606 DP_ERR(edev, "Status block allocation failed\n"); 2607 return -ENOMEM; 2608 } 2609 2610 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 2611 sb_virt, sb_phys, sb_id, 2612 QED_SB_TYPE_L2_QUEUE); 2613 if (rc) { 2614 DP_ERR(edev, "Status block initialization failed\n"); 2615 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 2616 sb_virt, sb_phys); 2617 return rc; 2618 } 2619 2620 return 0; 2621 } 2622 2623 static void qede_free_rx_buffers(struct qede_dev *edev, 2624 struct qede_rx_queue *rxq) 2625 { 2626 u16 i; 2627 2628 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 2629 struct sw_rx_data *rx_buf; 2630 struct page *data; 2631 2632 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 2633 data = rx_buf->data; 2634 2635 dma_unmap_page(&edev->pdev->dev, 2636 rx_buf->mapping, 2637 PAGE_SIZE, DMA_FROM_DEVICE); 2638 2639 rx_buf->data = NULL; 2640 __free_page(data); 2641 } 2642 } 2643 2644 static void qede_free_sge_mem(struct qede_dev *edev, 2645 struct qede_rx_queue *rxq) { 2646 int i; 2647 2648 if (edev->gro_disable) 2649 return; 2650 2651 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 2652 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 2653 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 2654 2655 if (replace_buf->data) { 2656 dma_unmap_page(&edev->pdev->dev, 2657 replace_buf->mapping, 2658 PAGE_SIZE, DMA_FROM_DEVICE); 2659 __free_page(replace_buf->data); 2660 } 2661 } 2662 } 2663 2664 static void qede_free_mem_rxq(struct qede_dev *edev, 2665 struct qede_rx_queue *rxq) 2666 { 2667 qede_free_sge_mem(edev, rxq); 2668 2669 /* Free rx buffers */ 2670 qede_free_rx_buffers(edev, rxq); 2671 2672 /* Free the parallel SW ring */ 2673 kfree(rxq->sw_rx_ring); 2674 2675 /* Free the real RQ ring used by FW */ 2676 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 2677 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 2678 } 2679 2680 static int qede_alloc_rx_buffer(struct qede_dev *edev, 2681 struct qede_rx_queue *rxq) 2682 { 2683 struct sw_rx_data *sw_rx_data; 2684 struct eth_rx_bd *rx_bd; 2685 dma_addr_t mapping; 2686 struct page *data; 2687 u16 rx_buf_size; 2688 2689 rx_buf_size = rxq->rx_buf_size; 2690 2691 data = alloc_pages(GFP_ATOMIC, 0); 2692 if (unlikely(!data)) { 2693 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n"); 2694 return -ENOMEM; 2695 } 2696 2697 /* Map the entire page as it would be used 2698 * for multiple RX buffer segment size mapping. 2699 */ 2700 mapping = dma_map_page(&edev->pdev->dev, data, 0, 2701 PAGE_SIZE, DMA_FROM_DEVICE); 2702 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 2703 __free_page(data); 2704 DP_NOTICE(edev, "Failed to map Rx buffer\n"); 2705 return -ENOMEM; 2706 } 2707 2708 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; 2709 sw_rx_data->page_offset = 0; 2710 sw_rx_data->data = data; 2711 sw_rx_data->mapping = mapping; 2712 2713 /* Advance PROD and get BD pointer */ 2714 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring); 2715 WARN_ON(!rx_bd); 2716 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping)); 2717 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping)); 2718 2719 rxq->sw_rx_prod++; 2720 2721 return 0; 2722 } 2723 2724 static int qede_alloc_sge_mem(struct qede_dev *edev, 2725 struct qede_rx_queue *rxq) 2726 { 2727 dma_addr_t mapping; 2728 int i; 2729 2730 if (edev->gro_disable) 2731 return 0; 2732 2733 if (edev->ndev->mtu > PAGE_SIZE) { 2734 edev->gro_disable = 1; 2735 return 0; 2736 } 2737 2738 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 2739 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 2740 struct sw_rx_data *replace_buf = &tpa_info->replace_buf; 2741 2742 replace_buf->data = alloc_pages(GFP_ATOMIC, 0); 2743 if (unlikely(!replace_buf->data)) { 2744 DP_NOTICE(edev, 2745 "Failed to allocate TPA skb pool [replacement buffer]\n"); 2746 goto err; 2747 } 2748 2749 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0, 2750 rxq->rx_buf_size, DMA_FROM_DEVICE); 2751 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 2752 DP_NOTICE(edev, 2753 "Failed to map TPA replacement buffer\n"); 2754 goto err; 2755 } 2756 2757 replace_buf->mapping = mapping; 2758 tpa_info->replace_buf.page_offset = 0; 2759 2760 tpa_info->replace_buf_mapping = mapping; 2761 tpa_info->agg_state = QEDE_AGG_STATE_NONE; 2762 } 2763 2764 return 0; 2765 err: 2766 qede_free_sge_mem(edev, rxq); 2767 edev->gro_disable = 1; 2768 return -ENOMEM; 2769 } 2770 2771 /* This function allocates all memory needed per Rx queue */ 2772 static int qede_alloc_mem_rxq(struct qede_dev *edev, 2773 struct qede_rx_queue *rxq) 2774 { 2775 int i, rc, size; 2776 2777 rxq->num_rx_buffers = edev->q_num_rx_buffers; 2778 2779 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + 2780 edev->ndev->mtu; 2781 if (rxq->rx_buf_size > PAGE_SIZE) 2782 rxq->rx_buf_size = PAGE_SIZE; 2783 2784 /* Segment size to spilt a page in multiple equal parts */ 2785 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size); 2786 2787 /* Allocate the parallel driver ring for Rx buffers */ 2788 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 2789 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 2790 if (!rxq->sw_rx_ring) { 2791 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 2792 rc = -ENOMEM; 2793 goto err; 2794 } 2795 2796 /* Allocate FW Rx ring */ 2797 rc = edev->ops->common->chain_alloc(edev->cdev, 2798 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 2799 QED_CHAIN_MODE_NEXT_PTR, 2800 RX_RING_SIZE, 2801 sizeof(struct eth_rx_bd), 2802 &rxq->rx_bd_ring); 2803 2804 if (rc) 2805 goto err; 2806 2807 /* Allocate FW completion ring */ 2808 rc = edev->ops->common->chain_alloc(edev->cdev, 2809 QED_CHAIN_USE_TO_CONSUME, 2810 QED_CHAIN_MODE_PBL, 2811 RX_RING_SIZE, 2812 sizeof(union eth_rx_cqe), 2813 &rxq->rx_comp_ring); 2814 if (rc) 2815 goto err; 2816 2817 /* Allocate buffers for the Rx ring */ 2818 for (i = 0; i < rxq->num_rx_buffers; i++) { 2819 rc = qede_alloc_rx_buffer(edev, rxq); 2820 if (rc) { 2821 DP_ERR(edev, 2822 "Rx buffers allocation failed at index %d\n", i); 2823 goto err; 2824 } 2825 } 2826 2827 rc = qede_alloc_sge_mem(edev, rxq); 2828 err: 2829 return rc; 2830 } 2831 2832 static void qede_free_mem_txq(struct qede_dev *edev, 2833 struct qede_tx_queue *txq) 2834 { 2835 /* Free the parallel SW ring */ 2836 kfree(txq->sw_tx_ring); 2837 2838 /* Free the real RQ ring used by FW */ 2839 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 2840 } 2841 2842 /* This function allocates all memory needed per Tx queue */ 2843 static int qede_alloc_mem_txq(struct qede_dev *edev, 2844 struct qede_tx_queue *txq) 2845 { 2846 int size, rc; 2847 union eth_tx_bd_types *p_virt; 2848 2849 txq->num_tx_buffers = edev->q_num_tx_buffers; 2850 2851 /* Allocate the parallel driver ring for Tx buffers */ 2852 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX; 2853 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL); 2854 if (!txq->sw_tx_ring) { 2855 DP_NOTICE(edev, "Tx buffers ring allocation failed\n"); 2856 goto err; 2857 } 2858 2859 rc = edev->ops->common->chain_alloc(edev->cdev, 2860 QED_CHAIN_USE_TO_CONSUME_PRODUCE, 2861 QED_CHAIN_MODE_PBL, 2862 NUM_TX_BDS_MAX, 2863 sizeof(*p_virt), 2864 &txq->tx_pbl); 2865 if (rc) 2866 goto err; 2867 2868 return 0; 2869 2870 err: 2871 qede_free_mem_txq(edev, txq); 2872 return -ENOMEM; 2873 } 2874 2875 /* This function frees all memory of a single fp */ 2876 static void qede_free_mem_fp(struct qede_dev *edev, 2877 struct qede_fastpath *fp) 2878 { 2879 int tc; 2880 2881 qede_free_mem_sb(edev, fp->sb_info); 2882 2883 qede_free_mem_rxq(edev, fp->rxq); 2884 2885 for (tc = 0; tc < edev->num_tc; tc++) 2886 qede_free_mem_txq(edev, &fp->txqs[tc]); 2887 } 2888 2889 /* This function allocates all memory needed for a single fp (i.e. an entity 2890 * which contains status block, one rx queue and multiple per-TC tx queues. 2891 */ 2892 static int qede_alloc_mem_fp(struct qede_dev *edev, 2893 struct qede_fastpath *fp) 2894 { 2895 int rc, tc; 2896 2897 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id); 2898 if (rc) 2899 goto err; 2900 2901 rc = qede_alloc_mem_rxq(edev, fp->rxq); 2902 if (rc) 2903 goto err; 2904 2905 for (tc = 0; tc < edev->num_tc; tc++) { 2906 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]); 2907 if (rc) 2908 goto err; 2909 } 2910 2911 return 0; 2912 err: 2913 return rc; 2914 } 2915 2916 static void qede_free_mem_load(struct qede_dev *edev) 2917 { 2918 int i; 2919 2920 for_each_rss(i) { 2921 struct qede_fastpath *fp = &edev->fp_array[i]; 2922 2923 qede_free_mem_fp(edev, fp); 2924 } 2925 } 2926 2927 /* This function allocates all qede memory at NIC load. */ 2928 static int qede_alloc_mem_load(struct qede_dev *edev) 2929 { 2930 int rc = 0, rss_id; 2931 2932 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) { 2933 struct qede_fastpath *fp = &edev->fp_array[rss_id]; 2934 2935 rc = qede_alloc_mem_fp(edev, fp); 2936 if (rc) { 2937 DP_ERR(edev, 2938 "Failed to allocate memory for fastpath - rss id = %d\n", 2939 rss_id); 2940 qede_free_mem_load(edev); 2941 return rc; 2942 } 2943 } 2944 2945 return 0; 2946 } 2947 2948 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 2949 static void qede_init_fp(struct qede_dev *edev) 2950 { 2951 int rss_id, txq_index, tc; 2952 struct qede_fastpath *fp; 2953 2954 for_each_rss(rss_id) { 2955 fp = &edev->fp_array[rss_id]; 2956 2957 fp->edev = edev; 2958 fp->rss_id = rss_id; 2959 2960 memset((void *)&fp->napi, 0, sizeof(fp->napi)); 2961 2962 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info)); 2963 2964 memset((void *)fp->rxq, 0, sizeof(*fp->rxq)); 2965 fp->rxq->rxq_id = rss_id; 2966 2967 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs))); 2968 for (tc = 0; tc < edev->num_tc; tc++) { 2969 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id; 2970 fp->txqs[tc].index = txq_index; 2971 } 2972 2973 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 2974 edev->ndev->name, rss_id); 2975 } 2976 2977 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO); 2978 } 2979 2980 static int qede_set_real_num_queues(struct qede_dev *edev) 2981 { 2982 int rc = 0; 2983 2984 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev)); 2985 if (rc) { 2986 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 2987 return rc; 2988 } 2989 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev)); 2990 if (rc) { 2991 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 2992 return rc; 2993 } 2994 2995 return 0; 2996 } 2997 2998 static void qede_napi_disable_remove(struct qede_dev *edev) 2999 { 3000 int i; 3001 3002 for_each_rss(i) { 3003 napi_disable(&edev->fp_array[i].napi); 3004 3005 netif_napi_del(&edev->fp_array[i].napi); 3006 } 3007 } 3008 3009 static void qede_napi_add_enable(struct qede_dev *edev) 3010 { 3011 int i; 3012 3013 /* Add NAPI objects */ 3014 for_each_rss(i) { 3015 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 3016 qede_poll, NAPI_POLL_WEIGHT); 3017 napi_enable(&edev->fp_array[i].napi); 3018 } 3019 } 3020 3021 static void qede_sync_free_irqs(struct qede_dev *edev) 3022 { 3023 int i; 3024 3025 for (i = 0; i < edev->int_info.used_cnt; i++) { 3026 if (edev->int_info.msix_cnt) { 3027 synchronize_irq(edev->int_info.msix[i].vector); 3028 free_irq(edev->int_info.msix[i].vector, 3029 &edev->fp_array[i]); 3030 } else { 3031 edev->ops->common->simd_handler_clean(edev->cdev, i); 3032 } 3033 } 3034 3035 edev->int_info.used_cnt = 0; 3036 } 3037 3038 static int qede_req_msix_irqs(struct qede_dev *edev) 3039 { 3040 int i, rc; 3041 3042 /* Sanitize number of interrupts == number of prepared RSS queues */ 3043 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) { 3044 DP_ERR(edev, 3045 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 3046 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt); 3047 return -EINVAL; 3048 } 3049 3050 for (i = 0; i < QEDE_RSS_CNT(edev); i++) { 3051 rc = request_irq(edev->int_info.msix[i].vector, 3052 qede_msix_fp_int, 0, edev->fp_array[i].name, 3053 &edev->fp_array[i]); 3054 if (rc) { 3055 DP_ERR(edev, "Request fp %d irq failed\n", i); 3056 qede_sync_free_irqs(edev); 3057 return rc; 3058 } 3059 DP_VERBOSE(edev, NETIF_MSG_INTR, 3060 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 3061 edev->fp_array[i].name, i, 3062 &edev->fp_array[i]); 3063 edev->int_info.used_cnt++; 3064 } 3065 3066 return 0; 3067 } 3068 3069 static void qede_simd_fp_handler(void *cookie) 3070 { 3071 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 3072 3073 napi_schedule_irqoff(&fp->napi); 3074 } 3075 3076 static int qede_setup_irqs(struct qede_dev *edev) 3077 { 3078 int i, rc = 0; 3079 3080 /* Learn Interrupt configuration */ 3081 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 3082 if (rc) 3083 return rc; 3084 3085 if (edev->int_info.msix_cnt) { 3086 rc = qede_req_msix_irqs(edev); 3087 if (rc) 3088 return rc; 3089 edev->ndev->irq = edev->int_info.msix[0].vector; 3090 } else { 3091 const struct qed_common_ops *ops; 3092 3093 /* qed should learn receive the RSS ids and callbacks */ 3094 ops = edev->ops->common; 3095 for (i = 0; i < QEDE_RSS_CNT(edev); i++) 3096 ops->simd_handler_config(edev->cdev, 3097 &edev->fp_array[i], i, 3098 qede_simd_fp_handler); 3099 edev->int_info.used_cnt = QEDE_RSS_CNT(edev); 3100 } 3101 return 0; 3102 } 3103 3104 static int qede_drain_txq(struct qede_dev *edev, 3105 struct qede_tx_queue *txq, 3106 bool allow_drain) 3107 { 3108 int rc, cnt = 1000; 3109 3110 while (txq->sw_tx_cons != txq->sw_tx_prod) { 3111 if (!cnt) { 3112 if (allow_drain) { 3113 DP_NOTICE(edev, 3114 "Tx queue[%d] is stuck, requesting MCP to drain\n", 3115 txq->index); 3116 rc = edev->ops->common->drain(edev->cdev); 3117 if (rc) 3118 return rc; 3119 return qede_drain_txq(edev, txq, false); 3120 } 3121 DP_NOTICE(edev, 3122 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 3123 txq->index, txq->sw_tx_prod, 3124 txq->sw_tx_cons); 3125 return -ENODEV; 3126 } 3127 cnt--; 3128 usleep_range(1000, 2000); 3129 barrier(); 3130 } 3131 3132 /* FW finished processing, wait for HW to transmit all tx packets */ 3133 usleep_range(1000, 2000); 3134 3135 return 0; 3136 } 3137 3138 static int qede_stop_queues(struct qede_dev *edev) 3139 { 3140 struct qed_update_vport_params vport_update_params; 3141 struct qed_dev *cdev = edev->cdev; 3142 int rc, tc, i; 3143 3144 /* Disable the vport */ 3145 memset(&vport_update_params, 0, sizeof(vport_update_params)); 3146 vport_update_params.vport_id = 0; 3147 vport_update_params.update_vport_active_flg = 1; 3148 vport_update_params.vport_active_flg = 0; 3149 vport_update_params.update_rss_flg = 0; 3150 3151 rc = edev->ops->vport_update(cdev, &vport_update_params); 3152 if (rc) { 3153 DP_ERR(edev, "Failed to update vport\n"); 3154 return rc; 3155 } 3156 3157 /* Flush Tx queues. If needed, request drain from MCP */ 3158 for_each_rss(i) { 3159 struct qede_fastpath *fp = &edev->fp_array[i]; 3160 3161 for (tc = 0; tc < edev->num_tc; tc++) { 3162 struct qede_tx_queue *txq = &fp->txqs[tc]; 3163 3164 rc = qede_drain_txq(edev, txq, true); 3165 if (rc) 3166 return rc; 3167 } 3168 } 3169 3170 /* Stop all Queues in reverse order*/ 3171 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) { 3172 struct qed_stop_rxq_params rx_params; 3173 3174 /* Stop the Tx Queue(s)*/ 3175 for (tc = 0; tc < edev->num_tc; tc++) { 3176 struct qed_stop_txq_params tx_params; 3177 3178 tx_params.rss_id = i; 3179 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i; 3180 rc = edev->ops->q_tx_stop(cdev, &tx_params); 3181 if (rc) { 3182 DP_ERR(edev, "Failed to stop TXQ #%d\n", 3183 tx_params.tx_queue_id); 3184 return rc; 3185 } 3186 } 3187 3188 /* Stop the Rx Queue*/ 3189 memset(&rx_params, 0, sizeof(rx_params)); 3190 rx_params.rss_id = i; 3191 rx_params.rx_queue_id = i; 3192 3193 rc = edev->ops->q_rx_stop(cdev, &rx_params); 3194 if (rc) { 3195 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 3196 return rc; 3197 } 3198 } 3199 3200 /* Stop the vport */ 3201 rc = edev->ops->vport_stop(cdev, 0); 3202 if (rc) 3203 DP_ERR(edev, "Failed to stop VPORT\n"); 3204 3205 return rc; 3206 } 3207 3208 static int qede_start_queues(struct qede_dev *edev) 3209 { 3210 int rc, tc, i; 3211 int vlan_removal_en = 1; 3212 struct qed_dev *cdev = edev->cdev; 3213 struct qed_update_vport_params vport_update_params; 3214 struct qed_queue_start_common_params q_params; 3215 struct qed_dev_info *qed_info = &edev->dev_info.common; 3216 struct qed_start_vport_params start = {0}; 3217 bool reset_rss_indir = false; 3218 3219 if (!edev->num_rss) { 3220 DP_ERR(edev, 3221 "Cannot update V-VPORT as active as there are no Rx queues\n"); 3222 return -EINVAL; 3223 } 3224 3225 start.gro_enable = !edev->gro_disable; 3226 start.mtu = edev->ndev->mtu; 3227 start.vport_id = 0; 3228 start.drop_ttl0 = true; 3229 start.remove_inner_vlan = vlan_removal_en; 3230 3231 rc = edev->ops->vport_start(cdev, &start); 3232 3233 if (rc) { 3234 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 3235 return rc; 3236 } 3237 3238 DP_VERBOSE(edev, NETIF_MSG_IFUP, 3239 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 3240 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 3241 3242 for_each_rss(i) { 3243 struct qede_fastpath *fp = &edev->fp_array[i]; 3244 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table; 3245 3246 memset(&q_params, 0, sizeof(q_params)); 3247 q_params.rss_id = i; 3248 q_params.queue_id = i; 3249 q_params.vport_id = 0; 3250 q_params.sb = fp->sb_info->igu_sb_id; 3251 q_params.sb_idx = RX_PI; 3252 3253 rc = edev->ops->q_rx_start(cdev, &q_params, 3254 fp->rxq->rx_buf_size, 3255 fp->rxq->rx_bd_ring.p_phys_addr, 3256 phys_table, 3257 fp->rxq->rx_comp_ring.page_cnt, 3258 &fp->rxq->hw_rxq_prod_addr); 3259 if (rc) { 3260 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc); 3261 return rc; 3262 } 3263 3264 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI]; 3265 3266 qede_update_rx_prod(edev, fp->rxq); 3267 3268 for (tc = 0; tc < edev->num_tc; tc++) { 3269 struct qede_tx_queue *txq = &fp->txqs[tc]; 3270 int txq_index = tc * QEDE_RSS_CNT(edev) + i; 3271 3272 memset(&q_params, 0, sizeof(q_params)); 3273 q_params.rss_id = i; 3274 q_params.queue_id = txq_index; 3275 q_params.vport_id = 0; 3276 q_params.sb = fp->sb_info->igu_sb_id; 3277 q_params.sb_idx = TX_PI(tc); 3278 3279 rc = edev->ops->q_tx_start(cdev, &q_params, 3280 txq->tx_pbl.pbl.p_phys_table, 3281 txq->tx_pbl.page_cnt, 3282 &txq->doorbell_addr); 3283 if (rc) { 3284 DP_ERR(edev, "Start TXQ #%d failed %d\n", 3285 txq_index, rc); 3286 return rc; 3287 } 3288 3289 txq->hw_cons_ptr = 3290 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)]; 3291 SET_FIELD(txq->tx_db.data.params, 3292 ETH_DB_DATA_DEST, DB_DEST_XCM); 3293 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, 3294 DB_AGG_CMD_SET); 3295 SET_FIELD(txq->tx_db.data.params, 3296 ETH_DB_DATA_AGG_VAL_SEL, 3297 DQ_XCM_ETH_TX_BD_PROD_CMD); 3298 3299 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 3300 } 3301 } 3302 3303 /* Prepare and send the vport enable */ 3304 memset(&vport_update_params, 0, sizeof(vport_update_params)); 3305 vport_update_params.vport_id = start.vport_id; 3306 vport_update_params.update_vport_active_flg = 1; 3307 vport_update_params.vport_active_flg = 1; 3308 3309 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) && 3310 qed_info->tx_switching) { 3311 vport_update_params.update_tx_switching_flg = 1; 3312 vport_update_params.tx_switching_flg = 1; 3313 } 3314 3315 /* Fill struct with RSS params */ 3316 if (QEDE_RSS_CNT(edev) > 1) { 3317 vport_update_params.update_rss_flg = 1; 3318 3319 /* Need to validate current RSS config uses valid entries */ 3320 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 3321 if (edev->rss_params.rss_ind_table[i] >= 3322 edev->num_rss) { 3323 reset_rss_indir = true; 3324 break; 3325 } 3326 } 3327 3328 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) || 3329 reset_rss_indir) { 3330 u16 val; 3331 3332 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { 3333 u16 indir_val; 3334 3335 val = QEDE_RSS_CNT(edev); 3336 indir_val = ethtool_rxfh_indir_default(i, val); 3337 edev->rss_params.rss_ind_table[i] = indir_val; 3338 } 3339 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 3340 } 3341 3342 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) { 3343 netdev_rss_key_fill(edev->rss_params.rss_key, 3344 sizeof(edev->rss_params.rss_key)); 3345 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 3346 } 3347 3348 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) { 3349 edev->rss_params.rss_caps = QED_RSS_IPV4 | 3350 QED_RSS_IPV6 | 3351 QED_RSS_IPV4_TCP | 3352 QED_RSS_IPV6_TCP; 3353 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 3354 } 3355 3356 memcpy(&vport_update_params.rss_params, &edev->rss_params, 3357 sizeof(vport_update_params.rss_params)); 3358 } else { 3359 memset(&vport_update_params.rss_params, 0, 3360 sizeof(vport_update_params.rss_params)); 3361 } 3362 3363 rc = edev->ops->vport_update(cdev, &vport_update_params); 3364 if (rc) { 3365 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 3366 return rc; 3367 } 3368 3369 return 0; 3370 } 3371 3372 static int qede_set_mcast_rx_mac(struct qede_dev *edev, 3373 enum qed_filter_xcast_params_type opcode, 3374 unsigned char *mac, int num_macs) 3375 { 3376 struct qed_filter_params filter_cmd; 3377 int i; 3378 3379 memset(&filter_cmd, 0, sizeof(filter_cmd)); 3380 filter_cmd.type = QED_FILTER_TYPE_MCAST; 3381 filter_cmd.filter.mcast.type = opcode; 3382 filter_cmd.filter.mcast.num = num_macs; 3383 3384 for (i = 0; i < num_macs; i++, mac += ETH_ALEN) 3385 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac); 3386 3387 return edev->ops->filter_config(edev->cdev, &filter_cmd); 3388 } 3389 3390 enum qede_unload_mode { 3391 QEDE_UNLOAD_NORMAL, 3392 }; 3393 3394 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode) 3395 { 3396 struct qed_link_params link_params; 3397 int rc; 3398 3399 DP_INFO(edev, "Starting qede unload\n"); 3400 3401 mutex_lock(&edev->qede_lock); 3402 edev->state = QEDE_STATE_CLOSED; 3403 3404 /* Close OS Tx */ 3405 netif_tx_disable(edev->ndev); 3406 netif_carrier_off(edev->ndev); 3407 3408 /* Reset the link */ 3409 memset(&link_params, 0, sizeof(link_params)); 3410 link_params.link_up = false; 3411 edev->ops->common->set_link(edev->cdev, &link_params); 3412 rc = qede_stop_queues(edev); 3413 if (rc) { 3414 qede_sync_free_irqs(edev); 3415 goto out; 3416 } 3417 3418 DP_INFO(edev, "Stopped Queues\n"); 3419 3420 qede_vlan_mark_nonconfigured(edev); 3421 edev->ops->fastpath_stop(edev->cdev); 3422 3423 /* Release the interrupts */ 3424 qede_sync_free_irqs(edev); 3425 edev->ops->common->set_fp_int(edev->cdev, 0); 3426 3427 qede_napi_disable_remove(edev); 3428 3429 qede_free_mem_load(edev); 3430 qede_free_fp_array(edev); 3431 3432 out: 3433 mutex_unlock(&edev->qede_lock); 3434 DP_INFO(edev, "Ending qede unload\n"); 3435 } 3436 3437 enum qede_load_mode { 3438 QEDE_LOAD_NORMAL, 3439 }; 3440 3441 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode) 3442 { 3443 struct qed_link_params link_params; 3444 struct qed_link_output link_output; 3445 int rc; 3446 3447 DP_INFO(edev, "Starting qede load\n"); 3448 3449 rc = qede_set_num_queues(edev); 3450 if (rc) 3451 goto err0; 3452 3453 rc = qede_alloc_fp_array(edev); 3454 if (rc) 3455 goto err0; 3456 3457 qede_init_fp(edev); 3458 3459 rc = qede_alloc_mem_load(edev); 3460 if (rc) 3461 goto err1; 3462 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n", 3463 QEDE_RSS_CNT(edev), edev->num_tc); 3464 3465 rc = qede_set_real_num_queues(edev); 3466 if (rc) 3467 goto err2; 3468 3469 qede_napi_add_enable(edev); 3470 DP_INFO(edev, "Napi added and enabled\n"); 3471 3472 rc = qede_setup_irqs(edev); 3473 if (rc) 3474 goto err3; 3475 DP_INFO(edev, "Setup IRQs succeeded\n"); 3476 3477 rc = qede_start_queues(edev); 3478 if (rc) 3479 goto err4; 3480 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 3481 3482 /* Add primary mac and set Rx filters */ 3483 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr); 3484 3485 mutex_lock(&edev->qede_lock); 3486 edev->state = QEDE_STATE_OPEN; 3487 mutex_unlock(&edev->qede_lock); 3488 3489 /* Program un-configured VLANs */ 3490 qede_configure_vlan_filters(edev); 3491 3492 /* Ask for link-up using current configuration */ 3493 memset(&link_params, 0, sizeof(link_params)); 3494 link_params.link_up = true; 3495 edev->ops->common->set_link(edev->cdev, &link_params); 3496 3497 /* Query whether link is already-up */ 3498 memset(&link_output, 0, sizeof(link_output)); 3499 edev->ops->common->get_link(edev->cdev, &link_output); 3500 qede_link_update(edev, &link_output); 3501 3502 DP_INFO(edev, "Ending successfully qede load\n"); 3503 3504 return 0; 3505 3506 err4: 3507 qede_sync_free_irqs(edev); 3508 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 3509 err3: 3510 qede_napi_disable_remove(edev); 3511 err2: 3512 qede_free_mem_load(edev); 3513 err1: 3514 edev->ops->common->set_fp_int(edev->cdev, 0); 3515 qede_free_fp_array(edev); 3516 edev->num_rss = 0; 3517 err0: 3518 return rc; 3519 } 3520 3521 void qede_reload(struct qede_dev *edev, 3522 void (*func)(struct qede_dev *, union qede_reload_args *), 3523 union qede_reload_args *args) 3524 { 3525 qede_unload(edev, QEDE_UNLOAD_NORMAL); 3526 /* Call function handler to update parameters 3527 * needed for function load. 3528 */ 3529 if (func) 3530 func(edev, args); 3531 3532 qede_load(edev, QEDE_LOAD_NORMAL); 3533 3534 mutex_lock(&edev->qede_lock); 3535 qede_config_rx_mode(edev->ndev); 3536 mutex_unlock(&edev->qede_lock); 3537 } 3538 3539 /* called with rtnl_lock */ 3540 static int qede_open(struct net_device *ndev) 3541 { 3542 struct qede_dev *edev = netdev_priv(ndev); 3543 int rc; 3544 3545 netif_carrier_off(ndev); 3546 3547 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 3548 3549 rc = qede_load(edev, QEDE_LOAD_NORMAL); 3550 3551 if (rc) 3552 return rc; 3553 3554 #ifdef CONFIG_QEDE_VXLAN 3555 vxlan_get_rx_port(ndev); 3556 #endif 3557 #ifdef CONFIG_QEDE_GENEVE 3558 geneve_get_rx_port(ndev); 3559 #endif 3560 return 0; 3561 } 3562 3563 static int qede_close(struct net_device *ndev) 3564 { 3565 struct qede_dev *edev = netdev_priv(ndev); 3566 3567 qede_unload(edev, QEDE_UNLOAD_NORMAL); 3568 3569 return 0; 3570 } 3571 3572 static void qede_link_update(void *dev, struct qed_link_output *link) 3573 { 3574 struct qede_dev *edev = dev; 3575 3576 if (!netif_running(edev->ndev)) { 3577 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n"); 3578 return; 3579 } 3580 3581 if (link->link_up) { 3582 if (!netif_carrier_ok(edev->ndev)) { 3583 DP_NOTICE(edev, "Link is up\n"); 3584 netif_tx_start_all_queues(edev->ndev); 3585 netif_carrier_on(edev->ndev); 3586 } 3587 } else { 3588 if (netif_carrier_ok(edev->ndev)) { 3589 DP_NOTICE(edev, "Link is down\n"); 3590 netif_tx_disable(edev->ndev); 3591 netif_carrier_off(edev->ndev); 3592 } 3593 } 3594 } 3595 3596 static int qede_set_mac_addr(struct net_device *ndev, void *p) 3597 { 3598 struct qede_dev *edev = netdev_priv(ndev); 3599 struct sockaddr *addr = p; 3600 int rc; 3601 3602 ASSERT_RTNL(); /* @@@TBD To be removed */ 3603 3604 DP_INFO(edev, "Set_mac_addr called\n"); 3605 3606 if (!is_valid_ether_addr(addr->sa_data)) { 3607 DP_NOTICE(edev, "The MAC address is not valid\n"); 3608 return -EFAULT; 3609 } 3610 3611 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) { 3612 DP_NOTICE(edev, "qed prevents setting MAC\n"); 3613 return -EINVAL; 3614 } 3615 3616 ether_addr_copy(ndev->dev_addr, addr->sa_data); 3617 3618 if (!netif_running(ndev)) { 3619 DP_NOTICE(edev, "The device is currently down\n"); 3620 return 0; 3621 } 3622 3623 /* Remove the previous primary mac */ 3624 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, 3625 edev->primary_mac); 3626 if (rc) 3627 return rc; 3628 3629 /* Add MAC filter according to the new unicast HW MAC address */ 3630 ether_addr_copy(edev->primary_mac, ndev->dev_addr); 3631 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, 3632 edev->primary_mac); 3633 } 3634 3635 static int 3636 qede_configure_mcast_filtering(struct net_device *ndev, 3637 enum qed_filter_rx_mode_type *accept_flags) 3638 { 3639 struct qede_dev *edev = netdev_priv(ndev); 3640 unsigned char *mc_macs, *temp; 3641 struct netdev_hw_addr *ha; 3642 int rc = 0, mc_count; 3643 size_t size; 3644 3645 size = 64 * ETH_ALEN; 3646 3647 mc_macs = kzalloc(size, GFP_KERNEL); 3648 if (!mc_macs) { 3649 DP_NOTICE(edev, 3650 "Failed to allocate memory for multicast MACs\n"); 3651 rc = -ENOMEM; 3652 goto exit; 3653 } 3654 3655 temp = mc_macs; 3656 3657 /* Remove all previously configured MAC filters */ 3658 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, 3659 mc_macs, 1); 3660 if (rc) 3661 goto exit; 3662 3663 netif_addr_lock_bh(ndev); 3664 3665 mc_count = netdev_mc_count(ndev); 3666 if (mc_count < 64) { 3667 netdev_for_each_mc_addr(ha, ndev) { 3668 ether_addr_copy(temp, ha->addr); 3669 temp += ETH_ALEN; 3670 } 3671 } 3672 3673 netif_addr_unlock_bh(ndev); 3674 3675 /* Check for all multicast @@@TBD resource allocation */ 3676 if ((ndev->flags & IFF_ALLMULTI) || 3677 (mc_count > 64)) { 3678 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR) 3679 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC; 3680 } else { 3681 /* Add all multicast MAC filters */ 3682 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, 3683 mc_macs, mc_count); 3684 } 3685 3686 exit: 3687 kfree(mc_macs); 3688 return rc; 3689 } 3690 3691 static void qede_set_rx_mode(struct net_device *ndev) 3692 { 3693 struct qede_dev *edev = netdev_priv(ndev); 3694 3695 DP_INFO(edev, "qede_set_rx_mode called\n"); 3696 3697 if (edev->state != QEDE_STATE_OPEN) { 3698 DP_INFO(edev, 3699 "qede_set_rx_mode called while interface is down\n"); 3700 } else { 3701 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags); 3702 schedule_delayed_work(&edev->sp_task, 0); 3703 } 3704 } 3705 3706 /* Must be called with qede_lock held */ 3707 static void qede_config_rx_mode(struct net_device *ndev) 3708 { 3709 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST; 3710 struct qede_dev *edev = netdev_priv(ndev); 3711 struct qed_filter_params rx_mode; 3712 unsigned char *uc_macs, *temp; 3713 struct netdev_hw_addr *ha; 3714 int rc, uc_count; 3715 size_t size; 3716 3717 netif_addr_lock_bh(ndev); 3718 3719 uc_count = netdev_uc_count(ndev); 3720 size = uc_count * ETH_ALEN; 3721 3722 uc_macs = kzalloc(size, GFP_ATOMIC); 3723 if (!uc_macs) { 3724 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n"); 3725 netif_addr_unlock_bh(ndev); 3726 return; 3727 } 3728 3729 temp = uc_macs; 3730 netdev_for_each_uc_addr(ha, ndev) { 3731 ether_addr_copy(temp, ha->addr); 3732 temp += ETH_ALEN; 3733 } 3734 3735 netif_addr_unlock_bh(ndev); 3736 3737 /* Configure the struct for the Rx mode */ 3738 memset(&rx_mode, 0, sizeof(struct qed_filter_params)); 3739 rx_mode.type = QED_FILTER_TYPE_RX_MODE; 3740 3741 /* Remove all previous unicast secondary macs and multicast macs 3742 * (configrue / leave the primary mac) 3743 */ 3744 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE, 3745 edev->primary_mac); 3746 if (rc) 3747 goto out; 3748 3749 /* Check for promiscuous */ 3750 if ((ndev->flags & IFF_PROMISC) || 3751 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */ 3752 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC; 3753 } else { 3754 /* Add MAC filters according to the unicast secondary macs */ 3755 int i; 3756 3757 temp = uc_macs; 3758 for (i = 0; i < uc_count; i++) { 3759 rc = qede_set_ucast_rx_mac(edev, 3760 QED_FILTER_XCAST_TYPE_ADD, 3761 temp); 3762 if (rc) 3763 goto out; 3764 3765 temp += ETH_ALEN; 3766 } 3767 3768 rc = qede_configure_mcast_filtering(ndev, &accept_flags); 3769 if (rc) 3770 goto out; 3771 } 3772 3773 /* take care of VLAN mode */ 3774 if (ndev->flags & IFF_PROMISC) { 3775 qede_config_accept_any_vlan(edev, true); 3776 } else if (!edev->non_configured_vlans) { 3777 /* It's possible that accept_any_vlan mode is set due to a 3778 * previous setting of IFF_PROMISC. If vlan credits are 3779 * sufficient, disable accept_any_vlan. 3780 */ 3781 qede_config_accept_any_vlan(edev, false); 3782 } 3783 3784 rx_mode.filter.accept_flags = accept_flags; 3785 edev->ops->filter_config(edev->cdev, &rx_mode); 3786 out: 3787 kfree(uc_macs); 3788 } 3789