1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/crash_dump.h> 8 #include <linux/module.h> 9 #include <linux/pci.h> 10 #include <linux/version.h> 11 #include <linux/device.h> 12 #include <linux/netdevice.h> 13 #include <linux/etherdevice.h> 14 #include <linux/skbuff.h> 15 #include <linux/errno.h> 16 #include <linux/list.h> 17 #include <linux/string.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/interrupt.h> 20 #include <asm/byteorder.h> 21 #include <asm/param.h> 22 #include <linux/io.h> 23 #include <linux/netdev_features.h> 24 #include <linux/udp.h> 25 #include <linux/tcp.h> 26 #include <net/udp_tunnel.h> 27 #include <linux/ip.h> 28 #include <net/ipv6.h> 29 #include <net/tcp.h> 30 #include <linux/if_ether.h> 31 #include <linux/if_vlan.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/ethtool.h> 34 #include <linux/in.h> 35 #include <linux/random.h> 36 #include <net/ip6_checksum.h> 37 #include <linux/bitops.h> 38 #include <linux/vmalloc.h> 39 #include <linux/aer.h> 40 #include "qede.h" 41 #include "qede_ptp.h" 42 43 static char version[] = 44 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 45 46 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 47 MODULE_LICENSE("GPL"); 48 MODULE_VERSION(DRV_MODULE_VERSION); 49 50 static uint debug; 51 module_param(debug, uint, 0); 52 MODULE_PARM_DESC(debug, " Default debug msglevel"); 53 54 static const struct qed_eth_ops *qed_ops; 55 56 #define CHIP_NUM_57980S_40 0x1634 57 #define CHIP_NUM_57980S_10 0x1666 58 #define CHIP_NUM_57980S_MF 0x1636 59 #define CHIP_NUM_57980S_100 0x1644 60 #define CHIP_NUM_57980S_50 0x1654 61 #define CHIP_NUM_57980S_25 0x1656 62 #define CHIP_NUM_57980S_IOV 0x1664 63 #define CHIP_NUM_AH 0x8070 64 #define CHIP_NUM_AH_IOV 0x8090 65 66 #ifndef PCI_DEVICE_ID_NX2_57980E 67 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 68 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 69 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 70 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 71 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 72 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 73 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 74 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 75 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 76 77 #endif 78 79 enum qede_pci_private { 80 QEDE_PRIVATE_PF, 81 QEDE_PRIVATE_VF 82 }; 83 84 static const struct pci_device_id qede_pci_tbl[] = { 85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 91 #ifdef CONFIG_QED_SRIOV 92 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 93 #endif 94 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 95 #ifdef CONFIG_QED_SRIOV 96 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 97 #endif 98 { 0 } 99 }; 100 101 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 102 103 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 104 static pci_ers_result_t 105 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 106 107 #define TX_TIMEOUT (5 * HZ) 108 109 /* Utilize last protocol index for XDP */ 110 #define XDP_PI 11 111 112 static void qede_remove(struct pci_dev *pdev); 113 static void qede_shutdown(struct pci_dev *pdev); 114 static void qede_link_update(void *dev, struct qed_link_output *link); 115 static void qede_schedule_recovery_handler(void *dev); 116 static void qede_recovery_handler(struct qede_dev *edev); 117 static void qede_schedule_hw_err_handler(void *dev, 118 enum qed_hw_err_type err_type); 119 static void qede_get_eth_tlv_data(void *edev, void *data); 120 static void qede_get_generic_tlv_data(void *edev, 121 struct qed_generic_tlvs *data); 122 static void qede_generic_hw_err_handler(struct qede_dev *edev); 123 #ifdef CONFIG_QED_SRIOV 124 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 125 __be16 vlan_proto) 126 { 127 struct qede_dev *edev = netdev_priv(ndev); 128 129 if (vlan > 4095) { 130 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 131 return -EINVAL; 132 } 133 134 if (vlan_proto != htons(ETH_P_8021Q)) 135 return -EPROTONOSUPPORT; 136 137 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 138 vlan, vf); 139 140 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 141 } 142 143 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 144 { 145 struct qede_dev *edev = netdev_priv(ndev); 146 147 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx); 148 149 if (!is_valid_ether_addr(mac)) { 150 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 151 return -EINVAL; 152 } 153 154 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 155 } 156 157 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 158 { 159 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 160 struct qed_dev_info *qed_info = &edev->dev_info.common; 161 struct qed_update_vport_params *vport_params; 162 int rc; 163 164 vport_params = vzalloc(sizeof(*vport_params)); 165 if (!vport_params) 166 return -ENOMEM; 167 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 168 169 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 170 171 /* Enable/Disable Tx switching for PF */ 172 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 173 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 174 vport_params->vport_id = 0; 175 vport_params->update_tx_switching_flg = 1; 176 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 177 edev->ops->vport_update(edev->cdev, vport_params); 178 } 179 180 vfree(vport_params); 181 return rc; 182 } 183 #endif 184 185 static const struct pci_error_handlers qede_err_handler = { 186 .error_detected = qede_io_error_detected, 187 }; 188 189 static struct pci_driver qede_pci_driver = { 190 .name = "qede", 191 .id_table = qede_pci_tbl, 192 .probe = qede_probe, 193 .remove = qede_remove, 194 .shutdown = qede_shutdown, 195 #ifdef CONFIG_QED_SRIOV 196 .sriov_configure = qede_sriov_configure, 197 #endif 198 .err_handler = &qede_err_handler, 199 }; 200 201 static struct qed_eth_cb_ops qede_ll_ops = { 202 { 203 #ifdef CONFIG_RFS_ACCEL 204 .arfs_filter_op = qede_arfs_filter_op, 205 #endif 206 .link_update = qede_link_update, 207 .schedule_recovery_handler = qede_schedule_recovery_handler, 208 .schedule_hw_err_handler = qede_schedule_hw_err_handler, 209 .get_generic_tlv_data = qede_get_generic_tlv_data, 210 .get_protocol_tlv_data = qede_get_eth_tlv_data, 211 }, 212 .force_mac = qede_force_mac, 213 .ports_update = qede_udp_ports_update, 214 }; 215 216 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 217 void *ptr) 218 { 219 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 220 struct ethtool_drvinfo drvinfo; 221 struct qede_dev *edev; 222 223 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 224 goto done; 225 226 /* Check whether this is a qede device */ 227 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 228 goto done; 229 230 memset(&drvinfo, 0, sizeof(drvinfo)); 231 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 232 if (strcmp(drvinfo.driver, "qede")) 233 goto done; 234 edev = netdev_priv(ndev); 235 236 switch (event) { 237 case NETDEV_CHANGENAME: 238 /* Notify qed of the name change */ 239 if (!edev->ops || !edev->ops->common) 240 goto done; 241 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 242 break; 243 case NETDEV_CHANGEADDR: 244 edev = netdev_priv(ndev); 245 qede_rdma_event_changeaddr(edev); 246 break; 247 } 248 249 done: 250 return NOTIFY_DONE; 251 } 252 253 static struct notifier_block qede_netdev_notifier = { 254 .notifier_call = qede_netdev_event, 255 }; 256 257 static 258 int __init qede_init(void) 259 { 260 int ret; 261 262 pr_info("qede_init: %s\n", version); 263 264 qede_forced_speed_maps_init(); 265 266 qed_ops = qed_get_eth_ops(); 267 if (!qed_ops) { 268 pr_notice("Failed to get qed ethtool operations\n"); 269 return -EINVAL; 270 } 271 272 /* Must register notifier before pci ops, since we might miss 273 * interface rename after pci probe and netdev registration. 274 */ 275 ret = register_netdevice_notifier(&qede_netdev_notifier); 276 if (ret) { 277 pr_notice("Failed to register netdevice_notifier\n"); 278 qed_put_eth_ops(); 279 return -EINVAL; 280 } 281 282 ret = pci_register_driver(&qede_pci_driver); 283 if (ret) { 284 pr_notice("Failed to register driver\n"); 285 unregister_netdevice_notifier(&qede_netdev_notifier); 286 qed_put_eth_ops(); 287 return -EINVAL; 288 } 289 290 return 0; 291 } 292 293 static void __exit qede_cleanup(void) 294 { 295 if (debug & QED_LOG_INFO_MASK) 296 pr_info("qede_cleanup called\n"); 297 298 unregister_netdevice_notifier(&qede_netdev_notifier); 299 pci_unregister_driver(&qede_pci_driver); 300 qed_put_eth_ops(); 301 } 302 303 module_init(qede_init); 304 module_exit(qede_cleanup); 305 306 static int qede_open(struct net_device *ndev); 307 static int qede_close(struct net_device *ndev); 308 309 void qede_fill_by_demand_stats(struct qede_dev *edev) 310 { 311 struct qede_stats_common *p_common = &edev->stats.common; 312 struct qed_eth_stats stats; 313 314 edev->ops->get_vport_stats(edev->cdev, &stats); 315 316 p_common->no_buff_discards = stats.common.no_buff_discards; 317 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 318 p_common->ttl0_discard = stats.common.ttl0_discard; 319 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 320 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 321 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 322 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 323 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 324 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 325 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 326 p_common->mac_filter_discards = stats.common.mac_filter_discards; 327 p_common->gft_filter_drop = stats.common.gft_filter_drop; 328 329 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 330 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 331 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 332 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 333 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 334 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 335 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 336 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 337 p_common->coalesced_events = stats.common.tpa_coalesced_events; 338 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 339 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 340 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 341 342 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 343 p_common->rx_65_to_127_byte_packets = 344 stats.common.rx_65_to_127_byte_packets; 345 p_common->rx_128_to_255_byte_packets = 346 stats.common.rx_128_to_255_byte_packets; 347 p_common->rx_256_to_511_byte_packets = 348 stats.common.rx_256_to_511_byte_packets; 349 p_common->rx_512_to_1023_byte_packets = 350 stats.common.rx_512_to_1023_byte_packets; 351 p_common->rx_1024_to_1518_byte_packets = 352 stats.common.rx_1024_to_1518_byte_packets; 353 p_common->rx_crc_errors = stats.common.rx_crc_errors; 354 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 355 p_common->rx_pause_frames = stats.common.rx_pause_frames; 356 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 357 p_common->rx_align_errors = stats.common.rx_align_errors; 358 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 359 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 360 p_common->rx_jabbers = stats.common.rx_jabbers; 361 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 362 p_common->rx_fragments = stats.common.rx_fragments; 363 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 364 p_common->tx_65_to_127_byte_packets = 365 stats.common.tx_65_to_127_byte_packets; 366 p_common->tx_128_to_255_byte_packets = 367 stats.common.tx_128_to_255_byte_packets; 368 p_common->tx_256_to_511_byte_packets = 369 stats.common.tx_256_to_511_byte_packets; 370 p_common->tx_512_to_1023_byte_packets = 371 stats.common.tx_512_to_1023_byte_packets; 372 p_common->tx_1024_to_1518_byte_packets = 373 stats.common.tx_1024_to_1518_byte_packets; 374 p_common->tx_pause_frames = stats.common.tx_pause_frames; 375 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 376 p_common->brb_truncates = stats.common.brb_truncates; 377 p_common->brb_discards = stats.common.brb_discards; 378 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 379 p_common->link_change_count = stats.common.link_change_count; 380 p_common->ptp_skip_txts = edev->ptp_skip_txts; 381 382 if (QEDE_IS_BB(edev)) { 383 struct qede_stats_bb *p_bb = &edev->stats.bb; 384 385 p_bb->rx_1519_to_1522_byte_packets = 386 stats.bb.rx_1519_to_1522_byte_packets; 387 p_bb->rx_1519_to_2047_byte_packets = 388 stats.bb.rx_1519_to_2047_byte_packets; 389 p_bb->rx_2048_to_4095_byte_packets = 390 stats.bb.rx_2048_to_4095_byte_packets; 391 p_bb->rx_4096_to_9216_byte_packets = 392 stats.bb.rx_4096_to_9216_byte_packets; 393 p_bb->rx_9217_to_16383_byte_packets = 394 stats.bb.rx_9217_to_16383_byte_packets; 395 p_bb->tx_1519_to_2047_byte_packets = 396 stats.bb.tx_1519_to_2047_byte_packets; 397 p_bb->tx_2048_to_4095_byte_packets = 398 stats.bb.tx_2048_to_4095_byte_packets; 399 p_bb->tx_4096_to_9216_byte_packets = 400 stats.bb.tx_4096_to_9216_byte_packets; 401 p_bb->tx_9217_to_16383_byte_packets = 402 stats.bb.tx_9217_to_16383_byte_packets; 403 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 404 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 405 } else { 406 struct qede_stats_ah *p_ah = &edev->stats.ah; 407 408 p_ah->rx_1519_to_max_byte_packets = 409 stats.ah.rx_1519_to_max_byte_packets; 410 p_ah->tx_1519_to_max_byte_packets = 411 stats.ah.tx_1519_to_max_byte_packets; 412 } 413 } 414 415 static void qede_get_stats64(struct net_device *dev, 416 struct rtnl_link_stats64 *stats) 417 { 418 struct qede_dev *edev = netdev_priv(dev); 419 struct qede_stats_common *p_common; 420 421 qede_fill_by_demand_stats(edev); 422 p_common = &edev->stats.common; 423 424 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 425 p_common->rx_bcast_pkts; 426 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 427 p_common->tx_bcast_pkts; 428 429 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 430 p_common->rx_bcast_bytes; 431 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 432 p_common->tx_bcast_bytes; 433 434 stats->tx_errors = p_common->tx_err_drop_pkts; 435 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 436 437 stats->rx_fifo_errors = p_common->no_buff_discards; 438 439 if (QEDE_IS_BB(edev)) 440 stats->collisions = edev->stats.bb.tx_total_collisions; 441 stats->rx_crc_errors = p_common->rx_crc_errors; 442 stats->rx_frame_errors = p_common->rx_align_errors; 443 } 444 445 #ifdef CONFIG_QED_SRIOV 446 static int qede_get_vf_config(struct net_device *dev, int vfidx, 447 struct ifla_vf_info *ivi) 448 { 449 struct qede_dev *edev = netdev_priv(dev); 450 451 if (!edev->ops) 452 return -EINVAL; 453 454 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 455 } 456 457 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 458 int min_tx_rate, int max_tx_rate) 459 { 460 struct qede_dev *edev = netdev_priv(dev); 461 462 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 463 max_tx_rate); 464 } 465 466 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 467 { 468 struct qede_dev *edev = netdev_priv(dev); 469 470 if (!edev->ops) 471 return -EINVAL; 472 473 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 474 } 475 476 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 477 int link_state) 478 { 479 struct qede_dev *edev = netdev_priv(dev); 480 481 if (!edev->ops) 482 return -EINVAL; 483 484 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 485 } 486 487 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 488 { 489 struct qede_dev *edev = netdev_priv(dev); 490 491 if (!edev->ops) 492 return -EINVAL; 493 494 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 495 } 496 #endif 497 498 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 499 { 500 struct qede_dev *edev = netdev_priv(dev); 501 502 if (!netif_running(dev)) 503 return -EAGAIN; 504 505 switch (cmd) { 506 case SIOCSHWTSTAMP: 507 return qede_ptp_hw_ts(edev, ifr); 508 default: 509 DP_VERBOSE(edev, QED_MSG_DEBUG, 510 "default IOCTL cmd 0x%x\n", cmd); 511 return -EOPNOTSUPP; 512 } 513 514 return 0; 515 } 516 517 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq) 518 { 519 DP_NOTICE(edev, 520 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n", 521 txq->index, le16_to_cpu(*txq->hw_cons_ptr), 522 qed_chain_get_cons_idx(&txq->tx_pbl), 523 qed_chain_get_prod_idx(&txq->tx_pbl), 524 jiffies); 525 } 526 527 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue) 528 { 529 struct qede_dev *edev = netdev_priv(dev); 530 struct qede_tx_queue *txq; 531 int cos; 532 533 netif_carrier_off(dev); 534 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue); 535 536 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX)) 537 return; 538 539 for_each_cos_in_txq(edev, cos) { 540 txq = &edev->fp_array[txqueue].txq[cos]; 541 542 if (qed_chain_get_cons_idx(&txq->tx_pbl) != 543 qed_chain_get_prod_idx(&txq->tx_pbl)) 544 qede_tx_log_print(edev, txq); 545 } 546 547 if (IS_VF(edev)) 548 return; 549 550 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 551 edev->state == QEDE_STATE_RECOVERY) { 552 DP_INFO(edev, 553 "Avoid handling a Tx timeout while another HW error is being handled\n"); 554 return; 555 } 556 557 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags); 558 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 559 schedule_delayed_work(&edev->sp_task, 0); 560 } 561 562 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 563 { 564 struct qede_dev *edev = netdev_priv(ndev); 565 int cos, count, offset; 566 567 if (num_tc > edev->dev_info.num_tc) 568 return -EINVAL; 569 570 netdev_reset_tc(ndev); 571 netdev_set_num_tc(ndev, num_tc); 572 573 for_each_cos_in_txq(edev, cos) { 574 count = QEDE_TSS_COUNT(edev); 575 offset = cos * QEDE_TSS_COUNT(edev); 576 netdev_set_tc_queue(ndev, cos, count, offset); 577 } 578 579 return 0; 580 } 581 582 static int 583 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 584 __be16 proto) 585 { 586 switch (f->command) { 587 case FLOW_CLS_REPLACE: 588 return qede_add_tc_flower_fltr(edev, proto, f); 589 case FLOW_CLS_DESTROY: 590 return qede_delete_flow_filter(edev, f->cookie); 591 default: 592 return -EOPNOTSUPP; 593 } 594 } 595 596 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 597 void *cb_priv) 598 { 599 struct flow_cls_offload *f; 600 struct qede_dev *edev = cb_priv; 601 602 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 603 return -EOPNOTSUPP; 604 605 switch (type) { 606 case TC_SETUP_CLSFLOWER: 607 f = type_data; 608 return qede_set_flower(edev, f, f->common.protocol); 609 default: 610 return -EOPNOTSUPP; 611 } 612 } 613 614 static LIST_HEAD(qede_block_cb_list); 615 616 static int 617 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 618 void *type_data) 619 { 620 struct qede_dev *edev = netdev_priv(dev); 621 struct tc_mqprio_qopt *mqprio; 622 623 switch (type) { 624 case TC_SETUP_BLOCK: 625 return flow_block_cb_setup_simple(type_data, 626 &qede_block_cb_list, 627 qede_setup_tc_block_cb, 628 edev, edev, true); 629 case TC_SETUP_QDISC_MQPRIO: 630 mqprio = type_data; 631 632 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 633 return qede_setup_tc(dev, mqprio->num_tc); 634 default: 635 return -EOPNOTSUPP; 636 } 637 } 638 639 static const struct net_device_ops qede_netdev_ops = { 640 .ndo_open = qede_open, 641 .ndo_stop = qede_close, 642 .ndo_start_xmit = qede_start_xmit, 643 .ndo_select_queue = qede_select_queue, 644 .ndo_set_rx_mode = qede_set_rx_mode, 645 .ndo_set_mac_address = qede_set_mac_addr, 646 .ndo_validate_addr = eth_validate_addr, 647 .ndo_change_mtu = qede_change_mtu, 648 .ndo_do_ioctl = qede_ioctl, 649 .ndo_tx_timeout = qede_tx_timeout, 650 #ifdef CONFIG_QED_SRIOV 651 .ndo_set_vf_mac = qede_set_vf_mac, 652 .ndo_set_vf_vlan = qede_set_vf_vlan, 653 .ndo_set_vf_trust = qede_set_vf_trust, 654 #endif 655 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 656 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 657 .ndo_fix_features = qede_fix_features, 658 .ndo_set_features = qede_set_features, 659 .ndo_get_stats64 = qede_get_stats64, 660 #ifdef CONFIG_QED_SRIOV 661 .ndo_set_vf_link_state = qede_set_vf_link_state, 662 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 663 .ndo_get_vf_config = qede_get_vf_config, 664 .ndo_set_vf_rate = qede_set_vf_rate, 665 #endif 666 .ndo_features_check = qede_features_check, 667 .ndo_bpf = qede_xdp, 668 #ifdef CONFIG_RFS_ACCEL 669 .ndo_rx_flow_steer = qede_rx_flow_steer, 670 #endif 671 .ndo_xdp_xmit = qede_xdp_transmit, 672 .ndo_setup_tc = qede_setup_tc_offload, 673 }; 674 675 static const struct net_device_ops qede_netdev_vf_ops = { 676 .ndo_open = qede_open, 677 .ndo_stop = qede_close, 678 .ndo_start_xmit = qede_start_xmit, 679 .ndo_select_queue = qede_select_queue, 680 .ndo_set_rx_mode = qede_set_rx_mode, 681 .ndo_set_mac_address = qede_set_mac_addr, 682 .ndo_validate_addr = eth_validate_addr, 683 .ndo_change_mtu = qede_change_mtu, 684 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 685 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 686 .ndo_fix_features = qede_fix_features, 687 .ndo_set_features = qede_set_features, 688 .ndo_get_stats64 = qede_get_stats64, 689 .ndo_features_check = qede_features_check, 690 }; 691 692 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 693 .ndo_open = qede_open, 694 .ndo_stop = qede_close, 695 .ndo_start_xmit = qede_start_xmit, 696 .ndo_select_queue = qede_select_queue, 697 .ndo_set_rx_mode = qede_set_rx_mode, 698 .ndo_set_mac_address = qede_set_mac_addr, 699 .ndo_validate_addr = eth_validate_addr, 700 .ndo_change_mtu = qede_change_mtu, 701 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 702 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 703 .ndo_fix_features = qede_fix_features, 704 .ndo_set_features = qede_set_features, 705 .ndo_get_stats64 = qede_get_stats64, 706 .ndo_features_check = qede_features_check, 707 .ndo_bpf = qede_xdp, 708 .ndo_xdp_xmit = qede_xdp_transmit, 709 }; 710 711 /* ------------------------------------------------------------------------- 712 * START OF PROBE / REMOVE 713 * ------------------------------------------------------------------------- 714 */ 715 716 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 717 struct pci_dev *pdev, 718 struct qed_dev_eth_info *info, 719 u32 dp_module, u8 dp_level) 720 { 721 struct net_device *ndev; 722 struct qede_dev *edev; 723 724 ndev = alloc_etherdev_mqs(sizeof(*edev), 725 info->num_queues * info->num_tc, 726 info->num_queues); 727 if (!ndev) { 728 pr_err("etherdev allocation failed\n"); 729 return NULL; 730 } 731 732 edev = netdev_priv(ndev); 733 edev->ndev = ndev; 734 edev->cdev = cdev; 735 edev->pdev = pdev; 736 edev->dp_module = dp_module; 737 edev->dp_level = dp_level; 738 edev->ops = qed_ops; 739 740 if (is_kdump_kernel()) { 741 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN; 742 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN; 743 } else { 744 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 745 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 746 } 747 748 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 749 info->num_queues, info->num_queues); 750 751 SET_NETDEV_DEV(ndev, &pdev->dev); 752 753 memset(&edev->stats, 0, sizeof(edev->stats)); 754 memcpy(&edev->dev_info, info, sizeof(*info)); 755 756 /* As ethtool doesn't have the ability to show WoL behavior as 757 * 'default', if device supports it declare it's enabled. 758 */ 759 if (edev->dev_info.common.wol_support) 760 edev->wol_enabled = true; 761 762 INIT_LIST_HEAD(&edev->vlan_list); 763 764 return edev; 765 } 766 767 static void qede_init_ndev(struct qede_dev *edev) 768 { 769 struct net_device *ndev = edev->ndev; 770 struct pci_dev *pdev = edev->pdev; 771 bool udp_tunnel_enable = false; 772 netdev_features_t hw_features; 773 774 pci_set_drvdata(pdev, ndev); 775 776 ndev->mem_start = edev->dev_info.common.pci_mem_start; 777 ndev->base_addr = ndev->mem_start; 778 ndev->mem_end = edev->dev_info.common.pci_mem_end; 779 ndev->irq = edev->dev_info.common.pci_irq; 780 781 ndev->watchdog_timeo = TX_TIMEOUT; 782 783 if (IS_VF(edev)) { 784 if (edev->dev_info.xdp_supported) 785 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 786 else 787 ndev->netdev_ops = &qede_netdev_vf_ops; 788 } else { 789 ndev->netdev_ops = &qede_netdev_ops; 790 } 791 792 qede_set_ethtool_ops(ndev); 793 794 ndev->priv_flags |= IFF_UNICAST_FLT; 795 796 /* user-changeble features */ 797 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 798 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 799 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 800 801 if (edev->dev_info.common.b_arfs_capable) 802 hw_features |= NETIF_F_NTUPLE; 803 804 if (edev->dev_info.common.vxlan_enable || 805 edev->dev_info.common.geneve_enable) 806 udp_tunnel_enable = true; 807 808 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 809 hw_features |= NETIF_F_TSO_ECN; 810 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 811 NETIF_F_SG | NETIF_F_TSO | 812 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 813 NETIF_F_RXCSUM; 814 } 815 816 if (udp_tunnel_enable) { 817 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 818 NETIF_F_GSO_UDP_TUNNEL_CSUM); 819 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 820 NETIF_F_GSO_UDP_TUNNEL_CSUM); 821 822 qede_set_udp_tunnels(edev); 823 } 824 825 if (edev->dev_info.common.gre_enable) { 826 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 827 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 828 NETIF_F_GSO_GRE_CSUM); 829 } 830 831 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 832 NETIF_F_HIGHDMA; 833 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 834 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 835 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 836 837 ndev->hw_features = hw_features; 838 839 /* MTU range: 46 - 9600 */ 840 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 841 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 842 843 /* Set network device HW mac */ 844 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 845 846 ndev->mtu = edev->dev_info.common.mtu; 847 } 848 849 /* This function converts from 32b param to two params of level and module 850 * Input 32b decoding: 851 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 852 * 'happy' flow, e.g. memory allocation failed. 853 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 854 * and provide important parameters. 855 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 856 * module. VERBOSE prints are for tracking the specific flow in low level. 857 * 858 * Notice that the level should be that of the lowest required logs. 859 */ 860 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 861 { 862 *p_dp_level = QED_LEVEL_NOTICE; 863 *p_dp_module = 0; 864 865 if (debug & QED_LOG_VERBOSE_MASK) { 866 *p_dp_level = QED_LEVEL_VERBOSE; 867 *p_dp_module = (debug & 0x3FFFFFFF); 868 } else if (debug & QED_LOG_INFO_MASK) { 869 *p_dp_level = QED_LEVEL_INFO; 870 } else if (debug & QED_LOG_NOTICE_MASK) { 871 *p_dp_level = QED_LEVEL_NOTICE; 872 } 873 } 874 875 static void qede_free_fp_array(struct qede_dev *edev) 876 { 877 if (edev->fp_array) { 878 struct qede_fastpath *fp; 879 int i; 880 881 for_each_queue(i) { 882 fp = &edev->fp_array[i]; 883 884 kfree(fp->sb_info); 885 /* Handle mem alloc failure case where qede_init_fp 886 * didn't register xdp_rxq_info yet. 887 * Implicit only (fp->type & QEDE_FASTPATH_RX) 888 */ 889 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 890 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 891 kfree(fp->rxq); 892 kfree(fp->xdp_tx); 893 kfree(fp->txq); 894 } 895 kfree(edev->fp_array); 896 } 897 898 edev->num_queues = 0; 899 edev->fp_num_tx = 0; 900 edev->fp_num_rx = 0; 901 } 902 903 static int qede_alloc_fp_array(struct qede_dev *edev) 904 { 905 u8 fp_combined, fp_rx = edev->fp_num_rx; 906 struct qede_fastpath *fp; 907 void *mem; 908 int i; 909 910 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 911 sizeof(*edev->fp_array), GFP_KERNEL); 912 if (!edev->fp_array) { 913 DP_NOTICE(edev, "fp array allocation failed\n"); 914 goto err; 915 } 916 917 mem = krealloc(edev->coal_entry, QEDE_QUEUE_CNT(edev) * 918 sizeof(*edev->coal_entry), GFP_KERNEL); 919 if (!mem) { 920 DP_ERR(edev, "coalesce entry allocation failed\n"); 921 kfree(edev->coal_entry); 922 goto err; 923 } 924 edev->coal_entry = mem; 925 926 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 927 928 /* Allocate the FP elements for Rx queues followed by combined and then 929 * the Tx. This ordering should be maintained so that the respective 930 * queues (Rx or Tx) will be together in the fastpath array and the 931 * associated ids will be sequential. 932 */ 933 for_each_queue(i) { 934 fp = &edev->fp_array[i]; 935 936 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 937 if (!fp->sb_info) { 938 DP_NOTICE(edev, "sb info struct allocation failed\n"); 939 goto err; 940 } 941 942 if (fp_rx) { 943 fp->type = QEDE_FASTPATH_RX; 944 fp_rx--; 945 } else if (fp_combined) { 946 fp->type = QEDE_FASTPATH_COMBINED; 947 fp_combined--; 948 } else { 949 fp->type = QEDE_FASTPATH_TX; 950 } 951 952 if (fp->type & QEDE_FASTPATH_TX) { 953 fp->txq = kcalloc(edev->dev_info.num_tc, 954 sizeof(*fp->txq), GFP_KERNEL); 955 if (!fp->txq) 956 goto err; 957 } 958 959 if (fp->type & QEDE_FASTPATH_RX) { 960 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 961 if (!fp->rxq) 962 goto err; 963 964 if (edev->xdp_prog) { 965 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 966 GFP_KERNEL); 967 if (!fp->xdp_tx) 968 goto err; 969 fp->type |= QEDE_FASTPATH_XDP; 970 } 971 } 972 } 973 974 return 0; 975 err: 976 qede_free_fp_array(edev); 977 return -ENOMEM; 978 } 979 980 /* The qede lock is used to protect driver state change and driver flows that 981 * are not reentrant. 982 */ 983 void __qede_lock(struct qede_dev *edev) 984 { 985 mutex_lock(&edev->qede_lock); 986 } 987 988 void __qede_unlock(struct qede_dev *edev) 989 { 990 mutex_unlock(&edev->qede_lock); 991 } 992 993 /* This version of the lock should be used when acquiring the RTNL lock is also 994 * needed in addition to the internal qede lock. 995 */ 996 static void qede_lock(struct qede_dev *edev) 997 { 998 rtnl_lock(); 999 __qede_lock(edev); 1000 } 1001 1002 static void qede_unlock(struct qede_dev *edev) 1003 { 1004 __qede_unlock(edev); 1005 rtnl_unlock(); 1006 } 1007 1008 static void qede_sp_task(struct work_struct *work) 1009 { 1010 struct qede_dev *edev = container_of(work, struct qede_dev, 1011 sp_task.work); 1012 1013 /* The locking scheme depends on the specific flag: 1014 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 1015 * ensure that ongoing flows are ended and new ones are not started. 1016 * In other cases - only the internal qede lock should be acquired. 1017 */ 1018 1019 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 1020 #ifdef CONFIG_QED_SRIOV 1021 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1022 * The recovery of the active VFs is currently not supported. 1023 */ 1024 if (pci_num_vf(edev->pdev)) 1025 qede_sriov_configure(edev->pdev, 0); 1026 #endif 1027 qede_lock(edev); 1028 qede_recovery_handler(edev); 1029 qede_unlock(edev); 1030 } 1031 1032 __qede_lock(edev); 1033 1034 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 1035 if (edev->state == QEDE_STATE_OPEN) 1036 qede_config_rx_mode(edev->ndev); 1037 1038 #ifdef CONFIG_RFS_ACCEL 1039 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1040 if (edev->state == QEDE_STATE_OPEN) 1041 qede_process_arfs_filters(edev, false); 1042 } 1043 #endif 1044 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags)) 1045 qede_generic_hw_err_handler(edev); 1046 __qede_unlock(edev); 1047 1048 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1049 #ifdef CONFIG_QED_SRIOV 1050 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1051 * The recovery of the active VFs is currently not supported. 1052 */ 1053 if (pci_num_vf(edev->pdev)) 1054 qede_sriov_configure(edev->pdev, 0); 1055 #endif 1056 edev->ops->common->recovery_process(edev->cdev); 1057 } 1058 } 1059 1060 static void qede_update_pf_params(struct qed_dev *cdev) 1061 { 1062 struct qed_pf_params pf_params; 1063 u16 num_cons; 1064 1065 /* 64 rx + 64 tx + 64 XDP */ 1066 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1067 1068 /* 1 rx + 1 xdp + max tx cos */ 1069 num_cons = QED_MIN_L2_CONS; 1070 1071 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1072 1073 /* Same for VFs - make sure they'll have sufficient connections 1074 * to support XDP Tx queues. 1075 */ 1076 pf_params.eth_pf_params.num_vf_cons = 48; 1077 1078 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1079 qed_ops->common->update_pf_params(cdev, &pf_params); 1080 } 1081 1082 #define QEDE_FW_VER_STR_SIZE 80 1083 1084 static void qede_log_probe(struct qede_dev *edev) 1085 { 1086 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1087 u8 buf[QEDE_FW_VER_STR_SIZE]; 1088 size_t left_size; 1089 1090 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1091 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1092 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1093 p_dev_info->fw_eng, 1094 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1095 QED_MFW_VERSION_3_OFFSET, 1096 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1097 QED_MFW_VERSION_2_OFFSET, 1098 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1099 QED_MFW_VERSION_1_OFFSET, 1100 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1101 QED_MFW_VERSION_0_OFFSET); 1102 1103 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1104 if (p_dev_info->mbi_version && left_size) 1105 snprintf(buf + strlen(buf), left_size, 1106 " [MBI %d.%d.%d]", 1107 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1108 QED_MBI_VERSION_2_OFFSET, 1109 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1110 QED_MBI_VERSION_1_OFFSET, 1111 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1112 QED_MBI_VERSION_0_OFFSET); 1113 1114 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1115 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1116 buf, edev->ndev->name); 1117 } 1118 1119 enum qede_probe_mode { 1120 QEDE_PROBE_NORMAL, 1121 QEDE_PROBE_RECOVERY, 1122 }; 1123 1124 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1125 bool is_vf, enum qede_probe_mode mode) 1126 { 1127 struct qed_probe_params probe_params; 1128 struct qed_slowpath_params sp_params; 1129 struct qed_dev_eth_info dev_info; 1130 struct qede_dev *edev; 1131 struct qed_dev *cdev; 1132 int rc; 1133 1134 if (unlikely(dp_level & QED_LEVEL_INFO)) 1135 pr_notice("Starting qede probe\n"); 1136 1137 memset(&probe_params, 0, sizeof(probe_params)); 1138 probe_params.protocol = QED_PROTOCOL_ETH; 1139 probe_params.dp_module = dp_module; 1140 probe_params.dp_level = dp_level; 1141 probe_params.is_vf = is_vf; 1142 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1143 cdev = qed_ops->common->probe(pdev, &probe_params); 1144 if (!cdev) { 1145 rc = -ENODEV; 1146 goto err0; 1147 } 1148 1149 qede_update_pf_params(cdev); 1150 1151 /* Start the Slowpath-process */ 1152 memset(&sp_params, 0, sizeof(sp_params)); 1153 sp_params.int_mode = QED_INT_MODE_MSIX; 1154 sp_params.drv_major = QEDE_MAJOR_VERSION; 1155 sp_params.drv_minor = QEDE_MINOR_VERSION; 1156 sp_params.drv_rev = QEDE_REVISION_VERSION; 1157 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 1158 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1159 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1160 if (rc) { 1161 pr_notice("Cannot start slowpath\n"); 1162 goto err1; 1163 } 1164 1165 /* Learn information crucial for qede to progress */ 1166 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1167 if (rc) 1168 goto err2; 1169 1170 if (mode != QEDE_PROBE_RECOVERY) { 1171 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1172 dp_level); 1173 if (!edev) { 1174 rc = -ENOMEM; 1175 goto err2; 1176 } 1177 1178 edev->devlink = qed_ops->common->devlink_register(cdev); 1179 if (IS_ERR(edev->devlink)) { 1180 DP_NOTICE(edev, "Cannot register devlink\n"); 1181 edev->devlink = NULL; 1182 /* Go on, we can live without devlink */ 1183 } 1184 } else { 1185 struct net_device *ndev = pci_get_drvdata(pdev); 1186 1187 edev = netdev_priv(ndev); 1188 1189 if (edev->devlink) { 1190 struct qed_devlink *qdl = devlink_priv(edev->devlink); 1191 1192 qdl->cdev = cdev; 1193 } 1194 edev->cdev = cdev; 1195 memset(&edev->stats, 0, sizeof(edev->stats)); 1196 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1197 } 1198 1199 if (is_vf) 1200 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1201 1202 qede_init_ndev(edev); 1203 1204 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1205 if (rc) 1206 goto err3; 1207 1208 if (mode != QEDE_PROBE_RECOVERY) { 1209 /* Prepare the lock prior to the registration of the netdev, 1210 * as once it's registered we might reach flows requiring it 1211 * [it's even possible to reach a flow needing it directly 1212 * from there, although it's unlikely]. 1213 */ 1214 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1215 mutex_init(&edev->qede_lock); 1216 1217 rc = register_netdev(edev->ndev); 1218 if (rc) { 1219 DP_NOTICE(edev, "Cannot register net-device\n"); 1220 goto err4; 1221 } 1222 } 1223 1224 edev->ops->common->set_name(cdev, edev->ndev->name); 1225 1226 /* PTP not supported on VFs */ 1227 if (!is_vf) 1228 qede_ptp_enable(edev); 1229 1230 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1231 1232 #ifdef CONFIG_DCB 1233 if (!IS_VF(edev)) 1234 qede_set_dcbnl_ops(edev->ndev); 1235 #endif 1236 1237 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1238 1239 qede_log_probe(edev); 1240 return 0; 1241 1242 err4: 1243 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1244 err3: 1245 if (mode != QEDE_PROBE_RECOVERY) 1246 free_netdev(edev->ndev); 1247 else 1248 edev->cdev = NULL; 1249 err2: 1250 qed_ops->common->slowpath_stop(cdev); 1251 err1: 1252 qed_ops->common->remove(cdev); 1253 err0: 1254 return rc; 1255 } 1256 1257 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1258 { 1259 bool is_vf = false; 1260 u32 dp_module = 0; 1261 u8 dp_level = 0; 1262 1263 switch ((enum qede_pci_private)id->driver_data) { 1264 case QEDE_PRIVATE_VF: 1265 if (debug & QED_LOG_VERBOSE_MASK) 1266 dev_err(&pdev->dev, "Probing a VF\n"); 1267 is_vf = true; 1268 break; 1269 default: 1270 if (debug & QED_LOG_VERBOSE_MASK) 1271 dev_err(&pdev->dev, "Probing a PF\n"); 1272 } 1273 1274 qede_config_debug(debug, &dp_module, &dp_level); 1275 1276 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1277 QEDE_PROBE_NORMAL); 1278 } 1279 1280 enum qede_remove_mode { 1281 QEDE_REMOVE_NORMAL, 1282 QEDE_REMOVE_RECOVERY, 1283 }; 1284 1285 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1286 { 1287 struct net_device *ndev = pci_get_drvdata(pdev); 1288 struct qede_dev *edev; 1289 struct qed_dev *cdev; 1290 1291 if (!ndev) { 1292 dev_info(&pdev->dev, "Device has already been removed\n"); 1293 return; 1294 } 1295 1296 edev = netdev_priv(ndev); 1297 cdev = edev->cdev; 1298 1299 DP_INFO(edev, "Starting qede_remove\n"); 1300 1301 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1302 1303 if (mode != QEDE_REMOVE_RECOVERY) { 1304 unregister_netdev(ndev); 1305 1306 cancel_delayed_work_sync(&edev->sp_task); 1307 1308 edev->ops->common->set_power_state(cdev, PCI_D0); 1309 1310 pci_set_drvdata(pdev, NULL); 1311 } 1312 1313 qede_ptp_disable(edev); 1314 1315 /* Use global ops since we've freed edev */ 1316 qed_ops->common->slowpath_stop(cdev); 1317 if (system_state == SYSTEM_POWER_OFF) 1318 return; 1319 1320 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) { 1321 qed_ops->common->devlink_unregister(edev->devlink); 1322 edev->devlink = NULL; 1323 } 1324 qed_ops->common->remove(cdev); 1325 edev->cdev = NULL; 1326 1327 /* Since this can happen out-of-sync with other flows, 1328 * don't release the netdevice until after slowpath stop 1329 * has been called to guarantee various other contexts 1330 * [e.g., QED register callbacks] won't break anything when 1331 * accessing the netdevice. 1332 */ 1333 if (mode != QEDE_REMOVE_RECOVERY) { 1334 kfree(edev->coal_entry); 1335 free_netdev(ndev); 1336 } 1337 1338 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1339 } 1340 1341 static void qede_remove(struct pci_dev *pdev) 1342 { 1343 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1344 } 1345 1346 static void qede_shutdown(struct pci_dev *pdev) 1347 { 1348 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1349 } 1350 1351 /* ------------------------------------------------------------------------- 1352 * START OF LOAD / UNLOAD 1353 * ------------------------------------------------------------------------- 1354 */ 1355 1356 static int qede_set_num_queues(struct qede_dev *edev) 1357 { 1358 int rc; 1359 u16 rss_num; 1360 1361 /* Setup queues according to possible resources*/ 1362 if (edev->req_queues) 1363 rss_num = edev->req_queues; 1364 else 1365 rss_num = netif_get_num_default_rss_queues() * 1366 edev->dev_info.common.num_hwfns; 1367 1368 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1369 1370 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1371 if (rc > 0) { 1372 /* Managed to request interrupts for our queues */ 1373 edev->num_queues = rc; 1374 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1375 QEDE_QUEUE_CNT(edev), rss_num); 1376 rc = 0; 1377 } 1378 1379 edev->fp_num_tx = edev->req_num_tx; 1380 edev->fp_num_rx = edev->req_num_rx; 1381 1382 return rc; 1383 } 1384 1385 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1386 u16 sb_id) 1387 { 1388 if (sb_info->sb_virt) { 1389 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1390 QED_SB_TYPE_L2_QUEUE); 1391 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1392 (void *)sb_info->sb_virt, sb_info->sb_phys); 1393 memset(sb_info, 0, sizeof(*sb_info)); 1394 } 1395 } 1396 1397 /* This function allocates fast-path status block memory */ 1398 static int qede_alloc_mem_sb(struct qede_dev *edev, 1399 struct qed_sb_info *sb_info, u16 sb_id) 1400 { 1401 struct status_block_e4 *sb_virt; 1402 dma_addr_t sb_phys; 1403 int rc; 1404 1405 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1406 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1407 if (!sb_virt) { 1408 DP_ERR(edev, "Status block allocation failed\n"); 1409 return -ENOMEM; 1410 } 1411 1412 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1413 sb_virt, sb_phys, sb_id, 1414 QED_SB_TYPE_L2_QUEUE); 1415 if (rc) { 1416 DP_ERR(edev, "Status block initialization failed\n"); 1417 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1418 sb_virt, sb_phys); 1419 return rc; 1420 } 1421 1422 return 0; 1423 } 1424 1425 static void qede_free_rx_buffers(struct qede_dev *edev, 1426 struct qede_rx_queue *rxq) 1427 { 1428 u16 i; 1429 1430 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1431 struct sw_rx_data *rx_buf; 1432 struct page *data; 1433 1434 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1435 data = rx_buf->data; 1436 1437 dma_unmap_page(&edev->pdev->dev, 1438 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1439 1440 rx_buf->data = NULL; 1441 __free_page(data); 1442 } 1443 } 1444 1445 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1446 { 1447 /* Free rx buffers */ 1448 qede_free_rx_buffers(edev, rxq); 1449 1450 /* Free the parallel SW ring */ 1451 kfree(rxq->sw_rx_ring); 1452 1453 /* Free the real RQ ring used by FW */ 1454 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1455 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1456 } 1457 1458 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1459 { 1460 int i; 1461 1462 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1463 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1464 1465 tpa_info->state = QEDE_AGG_STATE_NONE; 1466 } 1467 } 1468 1469 /* This function allocates all memory needed per Rx queue */ 1470 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1471 { 1472 struct qed_chain_init_params params = { 1473 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1474 .num_elems = RX_RING_SIZE, 1475 }; 1476 struct qed_dev *cdev = edev->cdev; 1477 int i, rc, size; 1478 1479 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1480 1481 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1482 1483 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1484 size = rxq->rx_headroom + 1485 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1486 1487 /* Make sure that the headroom and payload fit in a single page */ 1488 if (rxq->rx_buf_size + size > PAGE_SIZE) 1489 rxq->rx_buf_size = PAGE_SIZE - size; 1490 1491 /* Segment size to split a page in multiple equal parts, 1492 * unless XDP is used in which case we'd use the entire page. 1493 */ 1494 if (!edev->xdp_prog) { 1495 size = size + rxq->rx_buf_size; 1496 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1497 } else { 1498 rxq->rx_buf_seg_size = PAGE_SIZE; 1499 edev->ndev->features &= ~NETIF_F_GRO_HW; 1500 } 1501 1502 /* Allocate the parallel driver ring for Rx buffers */ 1503 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1504 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1505 if (!rxq->sw_rx_ring) { 1506 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1507 rc = -ENOMEM; 1508 goto err; 1509 } 1510 1511 /* Allocate FW Rx ring */ 1512 params.mode = QED_CHAIN_MODE_NEXT_PTR; 1513 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE; 1514 params.elem_size = sizeof(struct eth_rx_bd); 1515 1516 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms); 1517 if (rc) 1518 goto err; 1519 1520 /* Allocate FW completion ring */ 1521 params.mode = QED_CHAIN_MODE_PBL; 1522 params.intended_use = QED_CHAIN_USE_TO_CONSUME; 1523 params.elem_size = sizeof(union eth_rx_cqe); 1524 1525 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms); 1526 if (rc) 1527 goto err; 1528 1529 /* Allocate buffers for the Rx ring */ 1530 rxq->filled_buffers = 0; 1531 for (i = 0; i < rxq->num_rx_buffers; i++) { 1532 rc = qede_alloc_rx_buffer(rxq, false); 1533 if (rc) { 1534 DP_ERR(edev, 1535 "Rx buffers allocation failed at index %d\n", i); 1536 goto err; 1537 } 1538 } 1539 1540 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1541 if (!edev->gro_disable) 1542 qede_set_tpa_param(rxq); 1543 err: 1544 return rc; 1545 } 1546 1547 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1548 { 1549 /* Free the parallel SW ring */ 1550 if (txq->is_xdp) 1551 kfree(txq->sw_tx_ring.xdp); 1552 else 1553 kfree(txq->sw_tx_ring.skbs); 1554 1555 /* Free the real RQ ring used by FW */ 1556 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1557 } 1558 1559 /* This function allocates all memory needed per Tx queue */ 1560 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1561 { 1562 struct qed_chain_init_params params = { 1563 .mode = QED_CHAIN_MODE_PBL, 1564 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1565 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1566 .num_elems = edev->q_num_tx_buffers, 1567 .elem_size = sizeof(union eth_tx_bd_types), 1568 }; 1569 int size, rc; 1570 1571 txq->num_tx_buffers = edev->q_num_tx_buffers; 1572 1573 /* Allocate the parallel driver ring for Tx buffers */ 1574 if (txq->is_xdp) { 1575 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1576 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1577 if (!txq->sw_tx_ring.xdp) 1578 goto err; 1579 } else { 1580 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1581 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1582 if (!txq->sw_tx_ring.skbs) 1583 goto err; 1584 } 1585 1586 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms); 1587 if (rc) 1588 goto err; 1589 1590 return 0; 1591 1592 err: 1593 qede_free_mem_txq(edev, txq); 1594 return -ENOMEM; 1595 } 1596 1597 /* This function frees all memory of a single fp */ 1598 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1599 { 1600 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1601 1602 if (fp->type & QEDE_FASTPATH_RX) 1603 qede_free_mem_rxq(edev, fp->rxq); 1604 1605 if (fp->type & QEDE_FASTPATH_XDP) 1606 qede_free_mem_txq(edev, fp->xdp_tx); 1607 1608 if (fp->type & QEDE_FASTPATH_TX) { 1609 int cos; 1610 1611 for_each_cos_in_txq(edev, cos) 1612 qede_free_mem_txq(edev, &fp->txq[cos]); 1613 } 1614 } 1615 1616 /* This function allocates all memory needed for a single fp (i.e. an entity 1617 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1618 */ 1619 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1620 { 1621 int rc = 0; 1622 1623 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1624 if (rc) 1625 goto out; 1626 1627 if (fp->type & QEDE_FASTPATH_RX) { 1628 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1629 if (rc) 1630 goto out; 1631 } 1632 1633 if (fp->type & QEDE_FASTPATH_XDP) { 1634 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1635 if (rc) 1636 goto out; 1637 } 1638 1639 if (fp->type & QEDE_FASTPATH_TX) { 1640 int cos; 1641 1642 for_each_cos_in_txq(edev, cos) { 1643 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1644 if (rc) 1645 goto out; 1646 } 1647 } 1648 1649 out: 1650 return rc; 1651 } 1652 1653 static void qede_free_mem_load(struct qede_dev *edev) 1654 { 1655 int i; 1656 1657 for_each_queue(i) { 1658 struct qede_fastpath *fp = &edev->fp_array[i]; 1659 1660 qede_free_mem_fp(edev, fp); 1661 } 1662 } 1663 1664 /* This function allocates all qede memory at NIC load. */ 1665 static int qede_alloc_mem_load(struct qede_dev *edev) 1666 { 1667 int rc = 0, queue_id; 1668 1669 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1670 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1671 1672 rc = qede_alloc_mem_fp(edev, fp); 1673 if (rc) { 1674 DP_ERR(edev, 1675 "Failed to allocate memory for fastpath - rss id = %d\n", 1676 queue_id); 1677 qede_free_mem_load(edev); 1678 return rc; 1679 } 1680 } 1681 1682 return 0; 1683 } 1684 1685 static void qede_empty_tx_queue(struct qede_dev *edev, 1686 struct qede_tx_queue *txq) 1687 { 1688 unsigned int pkts_compl = 0, bytes_compl = 0; 1689 struct netdev_queue *netdev_txq; 1690 int rc, len = 0; 1691 1692 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1693 1694 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1695 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1696 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1697 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1698 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1699 qed_chain_get_prod_idx(&txq->tx_pbl)); 1700 1701 rc = qede_free_tx_pkt(edev, txq, &len); 1702 if (rc) { 1703 DP_NOTICE(edev, 1704 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1705 txq->index, 1706 qed_chain_get_cons_idx(&txq->tx_pbl), 1707 qed_chain_get_prod_idx(&txq->tx_pbl)); 1708 break; 1709 } 1710 1711 bytes_compl += len; 1712 pkts_compl++; 1713 txq->sw_tx_cons++; 1714 } 1715 1716 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1717 } 1718 1719 static void qede_empty_tx_queues(struct qede_dev *edev) 1720 { 1721 int i; 1722 1723 for_each_queue(i) 1724 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1725 int cos; 1726 1727 for_each_cos_in_txq(edev, cos) { 1728 struct qede_fastpath *fp; 1729 1730 fp = &edev->fp_array[i]; 1731 qede_empty_tx_queue(edev, 1732 &fp->txq[cos]); 1733 } 1734 } 1735 } 1736 1737 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1738 static void qede_init_fp(struct qede_dev *edev) 1739 { 1740 int queue_id, rxq_index = 0, txq_index = 0; 1741 struct qede_fastpath *fp; 1742 bool init_xdp = false; 1743 1744 for_each_queue(queue_id) { 1745 fp = &edev->fp_array[queue_id]; 1746 1747 fp->edev = edev; 1748 fp->id = queue_id; 1749 1750 if (fp->type & QEDE_FASTPATH_XDP) { 1751 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1752 rxq_index); 1753 fp->xdp_tx->is_xdp = 1; 1754 1755 spin_lock_init(&fp->xdp_tx->xdp_tx_lock); 1756 init_xdp = true; 1757 } 1758 1759 if (fp->type & QEDE_FASTPATH_RX) { 1760 fp->rxq->rxq_id = rxq_index++; 1761 1762 /* Determine how to map buffers for this queue */ 1763 if (fp->type & QEDE_FASTPATH_XDP) 1764 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1765 else 1766 fp->rxq->data_direction = DMA_FROM_DEVICE; 1767 fp->rxq->dev = &edev->pdev->dev; 1768 1769 /* Driver have no error path from here */ 1770 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1771 fp->rxq->rxq_id, 0) < 0); 1772 1773 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq, 1774 MEM_TYPE_PAGE_ORDER0, 1775 NULL)) { 1776 DP_NOTICE(edev, 1777 "Failed to register XDP memory model\n"); 1778 } 1779 } 1780 1781 if (fp->type & QEDE_FASTPATH_TX) { 1782 int cos; 1783 1784 for_each_cos_in_txq(edev, cos) { 1785 struct qede_tx_queue *txq = &fp->txq[cos]; 1786 u16 ndev_tx_id; 1787 1788 txq->cos = cos; 1789 txq->index = txq_index; 1790 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1791 txq->ndev_txq_id = ndev_tx_id; 1792 1793 if (edev->dev_info.is_legacy) 1794 txq->is_legacy = true; 1795 txq->dev = &edev->pdev->dev; 1796 } 1797 1798 txq_index++; 1799 } 1800 1801 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1802 edev->ndev->name, queue_id); 1803 } 1804 1805 if (init_xdp) { 1806 edev->total_xdp_queues = QEDE_RSS_COUNT(edev); 1807 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues); 1808 } 1809 } 1810 1811 static int qede_set_real_num_queues(struct qede_dev *edev) 1812 { 1813 int rc = 0; 1814 1815 rc = netif_set_real_num_tx_queues(edev->ndev, 1816 QEDE_TSS_COUNT(edev) * 1817 edev->dev_info.num_tc); 1818 if (rc) { 1819 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1820 return rc; 1821 } 1822 1823 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1824 if (rc) { 1825 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1826 return rc; 1827 } 1828 1829 return 0; 1830 } 1831 1832 static void qede_napi_disable_remove(struct qede_dev *edev) 1833 { 1834 int i; 1835 1836 for_each_queue(i) { 1837 napi_disable(&edev->fp_array[i].napi); 1838 1839 netif_napi_del(&edev->fp_array[i].napi); 1840 } 1841 } 1842 1843 static void qede_napi_add_enable(struct qede_dev *edev) 1844 { 1845 int i; 1846 1847 /* Add NAPI objects */ 1848 for_each_queue(i) { 1849 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1850 qede_poll, NAPI_POLL_WEIGHT); 1851 napi_enable(&edev->fp_array[i].napi); 1852 } 1853 } 1854 1855 static void qede_sync_free_irqs(struct qede_dev *edev) 1856 { 1857 int i; 1858 1859 for (i = 0; i < edev->int_info.used_cnt; i++) { 1860 if (edev->int_info.msix_cnt) { 1861 synchronize_irq(edev->int_info.msix[i].vector); 1862 free_irq(edev->int_info.msix[i].vector, 1863 &edev->fp_array[i]); 1864 } else { 1865 edev->ops->common->simd_handler_clean(edev->cdev, i); 1866 } 1867 } 1868 1869 edev->int_info.used_cnt = 0; 1870 } 1871 1872 static int qede_req_msix_irqs(struct qede_dev *edev) 1873 { 1874 int i, rc; 1875 1876 /* Sanitize number of interrupts == number of prepared RSS queues */ 1877 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1878 DP_ERR(edev, 1879 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1880 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1881 return -EINVAL; 1882 } 1883 1884 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1885 #ifdef CONFIG_RFS_ACCEL 1886 struct qede_fastpath *fp = &edev->fp_array[i]; 1887 1888 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1889 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1890 edev->int_info.msix[i].vector); 1891 if (rc) { 1892 DP_ERR(edev, "Failed to add CPU rmap\n"); 1893 qede_free_arfs(edev); 1894 } 1895 } 1896 #endif 1897 rc = request_irq(edev->int_info.msix[i].vector, 1898 qede_msix_fp_int, 0, edev->fp_array[i].name, 1899 &edev->fp_array[i]); 1900 if (rc) { 1901 DP_ERR(edev, "Request fp %d irq failed\n", i); 1902 qede_sync_free_irqs(edev); 1903 return rc; 1904 } 1905 DP_VERBOSE(edev, NETIF_MSG_INTR, 1906 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1907 edev->fp_array[i].name, i, 1908 &edev->fp_array[i]); 1909 edev->int_info.used_cnt++; 1910 } 1911 1912 return 0; 1913 } 1914 1915 static void qede_simd_fp_handler(void *cookie) 1916 { 1917 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1918 1919 napi_schedule_irqoff(&fp->napi); 1920 } 1921 1922 static int qede_setup_irqs(struct qede_dev *edev) 1923 { 1924 int i, rc = 0; 1925 1926 /* Learn Interrupt configuration */ 1927 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1928 if (rc) 1929 return rc; 1930 1931 if (edev->int_info.msix_cnt) { 1932 rc = qede_req_msix_irqs(edev); 1933 if (rc) 1934 return rc; 1935 edev->ndev->irq = edev->int_info.msix[0].vector; 1936 } else { 1937 const struct qed_common_ops *ops; 1938 1939 /* qed should learn receive the RSS ids and callbacks */ 1940 ops = edev->ops->common; 1941 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1942 ops->simd_handler_config(edev->cdev, 1943 &edev->fp_array[i], i, 1944 qede_simd_fp_handler); 1945 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1946 } 1947 return 0; 1948 } 1949 1950 static int qede_drain_txq(struct qede_dev *edev, 1951 struct qede_tx_queue *txq, bool allow_drain) 1952 { 1953 int rc, cnt = 1000; 1954 1955 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1956 if (!cnt) { 1957 if (allow_drain) { 1958 DP_NOTICE(edev, 1959 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1960 txq->index); 1961 rc = edev->ops->common->drain(edev->cdev); 1962 if (rc) 1963 return rc; 1964 return qede_drain_txq(edev, txq, false); 1965 } 1966 DP_NOTICE(edev, 1967 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1968 txq->index, txq->sw_tx_prod, 1969 txq->sw_tx_cons); 1970 return -ENODEV; 1971 } 1972 cnt--; 1973 usleep_range(1000, 2000); 1974 barrier(); 1975 } 1976 1977 /* FW finished processing, wait for HW to transmit all tx packets */ 1978 usleep_range(1000, 2000); 1979 1980 return 0; 1981 } 1982 1983 static int qede_stop_txq(struct qede_dev *edev, 1984 struct qede_tx_queue *txq, int rss_id) 1985 { 1986 /* delete doorbell from doorbell recovery mechanism */ 1987 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1988 &txq->tx_db); 1989 1990 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1991 } 1992 1993 static int qede_stop_queues(struct qede_dev *edev) 1994 { 1995 struct qed_update_vport_params *vport_update_params; 1996 struct qed_dev *cdev = edev->cdev; 1997 struct qede_fastpath *fp; 1998 int rc, i; 1999 2000 /* Disable the vport */ 2001 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2002 if (!vport_update_params) 2003 return -ENOMEM; 2004 2005 vport_update_params->vport_id = 0; 2006 vport_update_params->update_vport_active_flg = 1; 2007 vport_update_params->vport_active_flg = 0; 2008 vport_update_params->update_rss_flg = 0; 2009 2010 rc = edev->ops->vport_update(cdev, vport_update_params); 2011 vfree(vport_update_params); 2012 2013 if (rc) { 2014 DP_ERR(edev, "Failed to update vport\n"); 2015 return rc; 2016 } 2017 2018 /* Flush Tx queues. If needed, request drain from MCP */ 2019 for_each_queue(i) { 2020 fp = &edev->fp_array[i]; 2021 2022 if (fp->type & QEDE_FASTPATH_TX) { 2023 int cos; 2024 2025 for_each_cos_in_txq(edev, cos) { 2026 rc = qede_drain_txq(edev, &fp->txq[cos], true); 2027 if (rc) 2028 return rc; 2029 } 2030 } 2031 2032 if (fp->type & QEDE_FASTPATH_XDP) { 2033 rc = qede_drain_txq(edev, fp->xdp_tx, true); 2034 if (rc) 2035 return rc; 2036 } 2037 } 2038 2039 /* Stop all Queues in reverse order */ 2040 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 2041 fp = &edev->fp_array[i]; 2042 2043 /* Stop the Tx Queue(s) */ 2044 if (fp->type & QEDE_FASTPATH_TX) { 2045 int cos; 2046 2047 for_each_cos_in_txq(edev, cos) { 2048 rc = qede_stop_txq(edev, &fp->txq[cos], i); 2049 if (rc) 2050 return rc; 2051 } 2052 } 2053 2054 /* Stop the Rx Queue */ 2055 if (fp->type & QEDE_FASTPATH_RX) { 2056 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 2057 if (rc) { 2058 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 2059 return rc; 2060 } 2061 } 2062 2063 /* Stop the XDP forwarding queue */ 2064 if (fp->type & QEDE_FASTPATH_XDP) { 2065 rc = qede_stop_txq(edev, fp->xdp_tx, i); 2066 if (rc) 2067 return rc; 2068 2069 bpf_prog_put(fp->rxq->xdp_prog); 2070 } 2071 } 2072 2073 /* Stop the vport */ 2074 rc = edev->ops->vport_stop(cdev, 0); 2075 if (rc) 2076 DP_ERR(edev, "Failed to stop VPORT\n"); 2077 2078 return rc; 2079 } 2080 2081 static int qede_start_txq(struct qede_dev *edev, 2082 struct qede_fastpath *fp, 2083 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2084 { 2085 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2086 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2087 struct qed_queue_start_common_params params; 2088 struct qed_txq_start_ret_params ret_params; 2089 int rc; 2090 2091 memset(¶ms, 0, sizeof(params)); 2092 memset(&ret_params, 0, sizeof(ret_params)); 2093 2094 /* Let the XDP queue share the queue-zone with one of the regular txq. 2095 * We don't really care about its coalescing. 2096 */ 2097 if (txq->is_xdp) 2098 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2099 else 2100 params.queue_id = txq->index; 2101 2102 params.p_sb = fp->sb_info; 2103 params.sb_idx = sb_idx; 2104 params.tc = txq->cos; 2105 2106 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2107 page_cnt, &ret_params); 2108 if (rc) { 2109 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2110 return rc; 2111 } 2112 2113 txq->doorbell_addr = ret_params.p_doorbell; 2114 txq->handle = ret_params.p_handle; 2115 2116 /* Determine the FW consumer address associated */ 2117 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2118 2119 /* Prepare the doorbell parameters */ 2120 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2121 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2122 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2123 DQ_XCM_ETH_TX_BD_PROD_CMD); 2124 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2125 2126 /* register doorbell with doorbell recovery mechanism */ 2127 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2128 &txq->tx_db, DB_REC_WIDTH_32B, 2129 DB_REC_KERNEL); 2130 2131 return rc; 2132 } 2133 2134 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2135 { 2136 int vlan_removal_en = 1; 2137 struct qed_dev *cdev = edev->cdev; 2138 struct qed_dev_info *qed_info = &edev->dev_info.common; 2139 struct qed_update_vport_params *vport_update_params; 2140 struct qed_queue_start_common_params q_params; 2141 struct qed_start_vport_params start = {0}; 2142 int rc, i; 2143 2144 if (!edev->num_queues) { 2145 DP_ERR(edev, 2146 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2147 return -EINVAL; 2148 } 2149 2150 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2151 if (!vport_update_params) 2152 return -ENOMEM; 2153 2154 start.handle_ptp_pkts = !!(edev->ptp); 2155 start.gro_enable = !edev->gro_disable; 2156 start.mtu = edev->ndev->mtu; 2157 start.vport_id = 0; 2158 start.drop_ttl0 = true; 2159 start.remove_inner_vlan = vlan_removal_en; 2160 start.clear_stats = clear_stats; 2161 2162 rc = edev->ops->vport_start(cdev, &start); 2163 2164 if (rc) { 2165 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2166 goto out; 2167 } 2168 2169 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2170 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2171 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2172 2173 for_each_queue(i) { 2174 struct qede_fastpath *fp = &edev->fp_array[i]; 2175 dma_addr_t p_phys_table; 2176 u32 page_cnt; 2177 2178 if (fp->type & QEDE_FASTPATH_RX) { 2179 struct qed_rxq_start_ret_params ret_params; 2180 struct qede_rx_queue *rxq = fp->rxq; 2181 __le16 *val; 2182 2183 memset(&ret_params, 0, sizeof(ret_params)); 2184 memset(&q_params, 0, sizeof(q_params)); 2185 q_params.queue_id = rxq->rxq_id; 2186 q_params.vport_id = 0; 2187 q_params.p_sb = fp->sb_info; 2188 q_params.sb_idx = RX_PI; 2189 2190 p_phys_table = 2191 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2192 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2193 2194 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2195 rxq->rx_buf_size, 2196 rxq->rx_bd_ring.p_phys_addr, 2197 p_phys_table, 2198 page_cnt, &ret_params); 2199 if (rc) { 2200 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2201 rc); 2202 goto out; 2203 } 2204 2205 /* Use the return parameters */ 2206 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2207 rxq->handle = ret_params.p_handle; 2208 2209 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2210 rxq->hw_cons_ptr = val; 2211 2212 qede_update_rx_prod(edev, rxq); 2213 } 2214 2215 if (fp->type & QEDE_FASTPATH_XDP) { 2216 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2217 if (rc) 2218 goto out; 2219 2220 bpf_prog_add(edev->xdp_prog, 1); 2221 fp->rxq->xdp_prog = edev->xdp_prog; 2222 } 2223 2224 if (fp->type & QEDE_FASTPATH_TX) { 2225 int cos; 2226 2227 for_each_cos_in_txq(edev, cos) { 2228 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2229 TX_PI(cos)); 2230 if (rc) 2231 goto out; 2232 } 2233 } 2234 } 2235 2236 /* Prepare and send the vport enable */ 2237 vport_update_params->vport_id = start.vport_id; 2238 vport_update_params->update_vport_active_flg = 1; 2239 vport_update_params->vport_active_flg = 1; 2240 2241 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2242 qed_info->tx_switching) { 2243 vport_update_params->update_tx_switching_flg = 1; 2244 vport_update_params->tx_switching_flg = 1; 2245 } 2246 2247 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2248 &vport_update_params->update_rss_flg); 2249 2250 rc = edev->ops->vport_update(cdev, vport_update_params); 2251 if (rc) 2252 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2253 2254 out: 2255 vfree(vport_update_params); 2256 return rc; 2257 } 2258 2259 enum qede_unload_mode { 2260 QEDE_UNLOAD_NORMAL, 2261 QEDE_UNLOAD_RECOVERY, 2262 }; 2263 2264 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2265 bool is_locked) 2266 { 2267 struct qed_link_params link_params; 2268 int rc; 2269 2270 DP_INFO(edev, "Starting qede unload\n"); 2271 2272 if (!is_locked) 2273 __qede_lock(edev); 2274 2275 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2276 2277 if (mode != QEDE_UNLOAD_RECOVERY) 2278 edev->state = QEDE_STATE_CLOSED; 2279 2280 qede_rdma_dev_event_close(edev); 2281 2282 /* Close OS Tx */ 2283 netif_tx_disable(edev->ndev); 2284 netif_carrier_off(edev->ndev); 2285 2286 if (mode != QEDE_UNLOAD_RECOVERY) { 2287 /* Reset the link */ 2288 memset(&link_params, 0, sizeof(link_params)); 2289 link_params.link_up = false; 2290 edev->ops->common->set_link(edev->cdev, &link_params); 2291 2292 rc = qede_stop_queues(edev); 2293 if (rc) { 2294 qede_sync_free_irqs(edev); 2295 goto out; 2296 } 2297 2298 DP_INFO(edev, "Stopped Queues\n"); 2299 } 2300 2301 qede_vlan_mark_nonconfigured(edev); 2302 edev->ops->fastpath_stop(edev->cdev); 2303 2304 if (edev->dev_info.common.b_arfs_capable) { 2305 qede_poll_for_freeing_arfs_filters(edev); 2306 qede_free_arfs(edev); 2307 } 2308 2309 /* Release the interrupts */ 2310 qede_sync_free_irqs(edev); 2311 edev->ops->common->set_fp_int(edev->cdev, 0); 2312 2313 qede_napi_disable_remove(edev); 2314 2315 if (mode == QEDE_UNLOAD_RECOVERY) 2316 qede_empty_tx_queues(edev); 2317 2318 qede_free_mem_load(edev); 2319 qede_free_fp_array(edev); 2320 2321 out: 2322 if (!is_locked) 2323 __qede_unlock(edev); 2324 2325 if (mode != QEDE_UNLOAD_RECOVERY) 2326 DP_NOTICE(edev, "Link is down\n"); 2327 2328 edev->ptp_skip_txts = 0; 2329 2330 DP_INFO(edev, "Ending qede unload\n"); 2331 } 2332 2333 enum qede_load_mode { 2334 QEDE_LOAD_NORMAL, 2335 QEDE_LOAD_RELOAD, 2336 QEDE_LOAD_RECOVERY, 2337 }; 2338 2339 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2340 bool is_locked) 2341 { 2342 struct qed_link_params link_params; 2343 struct ethtool_coalesce coal = {}; 2344 u8 num_tc; 2345 int rc, i; 2346 2347 DP_INFO(edev, "Starting qede load\n"); 2348 2349 if (!is_locked) 2350 __qede_lock(edev); 2351 2352 rc = qede_set_num_queues(edev); 2353 if (rc) 2354 goto out; 2355 2356 rc = qede_alloc_fp_array(edev); 2357 if (rc) 2358 goto out; 2359 2360 qede_init_fp(edev); 2361 2362 rc = qede_alloc_mem_load(edev); 2363 if (rc) 2364 goto err1; 2365 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2366 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2367 2368 rc = qede_set_real_num_queues(edev); 2369 if (rc) 2370 goto err2; 2371 2372 if (qede_alloc_arfs(edev)) { 2373 edev->ndev->features &= ~NETIF_F_NTUPLE; 2374 edev->dev_info.common.b_arfs_capable = false; 2375 } 2376 2377 qede_napi_add_enable(edev); 2378 DP_INFO(edev, "Napi added and enabled\n"); 2379 2380 rc = qede_setup_irqs(edev); 2381 if (rc) 2382 goto err3; 2383 DP_INFO(edev, "Setup IRQs succeeded\n"); 2384 2385 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2386 if (rc) 2387 goto err4; 2388 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2389 2390 num_tc = netdev_get_num_tc(edev->ndev); 2391 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2392 qede_setup_tc(edev->ndev, num_tc); 2393 2394 /* Program un-configured VLANs */ 2395 qede_configure_vlan_filters(edev); 2396 2397 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2398 2399 /* Ask for link-up using current configuration */ 2400 memset(&link_params, 0, sizeof(link_params)); 2401 link_params.link_up = true; 2402 edev->ops->common->set_link(edev->cdev, &link_params); 2403 2404 edev->state = QEDE_STATE_OPEN; 2405 2406 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS; 2407 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS; 2408 2409 for_each_queue(i) { 2410 if (edev->coal_entry[i].isvalid) { 2411 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc; 2412 coal.tx_coalesce_usecs = edev->coal_entry[i].txc; 2413 } 2414 __qede_unlock(edev); 2415 qede_set_per_coalesce(edev->ndev, i, &coal); 2416 __qede_lock(edev); 2417 } 2418 DP_INFO(edev, "Ending successfully qede load\n"); 2419 2420 goto out; 2421 err4: 2422 qede_sync_free_irqs(edev); 2423 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 2424 err3: 2425 qede_napi_disable_remove(edev); 2426 err2: 2427 qede_free_mem_load(edev); 2428 err1: 2429 edev->ops->common->set_fp_int(edev->cdev, 0); 2430 qede_free_fp_array(edev); 2431 edev->num_queues = 0; 2432 edev->fp_num_tx = 0; 2433 edev->fp_num_rx = 0; 2434 out: 2435 if (!is_locked) 2436 __qede_unlock(edev); 2437 2438 return rc; 2439 } 2440 2441 /* 'func' should be able to run between unload and reload assuming interface 2442 * is actually running, or afterwards in case it's currently DOWN. 2443 */ 2444 void qede_reload(struct qede_dev *edev, 2445 struct qede_reload_args *args, bool is_locked) 2446 { 2447 if (!is_locked) 2448 __qede_lock(edev); 2449 2450 /* Since qede_lock is held, internal state wouldn't change even 2451 * if netdev state would start transitioning. Check whether current 2452 * internal configuration indicates device is up, then reload. 2453 */ 2454 if (edev->state == QEDE_STATE_OPEN) { 2455 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2456 if (args) 2457 args->func(edev, args); 2458 qede_load(edev, QEDE_LOAD_RELOAD, true); 2459 2460 /* Since no one is going to do it for us, re-configure */ 2461 qede_config_rx_mode(edev->ndev); 2462 } else if (args) { 2463 args->func(edev, args); 2464 } 2465 2466 if (!is_locked) 2467 __qede_unlock(edev); 2468 } 2469 2470 /* called with rtnl_lock */ 2471 static int qede_open(struct net_device *ndev) 2472 { 2473 struct qede_dev *edev = netdev_priv(ndev); 2474 int rc; 2475 2476 netif_carrier_off(ndev); 2477 2478 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2479 2480 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2481 if (rc) 2482 return rc; 2483 2484 udp_tunnel_nic_reset_ntf(ndev); 2485 2486 edev->ops->common->update_drv_state(edev->cdev, true); 2487 2488 return 0; 2489 } 2490 2491 static int qede_close(struct net_device *ndev) 2492 { 2493 struct qede_dev *edev = netdev_priv(ndev); 2494 2495 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2496 2497 if (edev->cdev) 2498 edev->ops->common->update_drv_state(edev->cdev, false); 2499 2500 return 0; 2501 } 2502 2503 static void qede_link_update(void *dev, struct qed_link_output *link) 2504 { 2505 struct qede_dev *edev = dev; 2506 2507 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2508 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2509 return; 2510 } 2511 2512 if (link->link_up) { 2513 if (!netif_carrier_ok(edev->ndev)) { 2514 DP_NOTICE(edev, "Link is up\n"); 2515 netif_tx_start_all_queues(edev->ndev); 2516 netif_carrier_on(edev->ndev); 2517 qede_rdma_dev_event_open(edev); 2518 } 2519 } else { 2520 if (netif_carrier_ok(edev->ndev)) { 2521 DP_NOTICE(edev, "Link is down\n"); 2522 netif_tx_disable(edev->ndev); 2523 netif_carrier_off(edev->ndev); 2524 qede_rdma_dev_event_close(edev); 2525 } 2526 } 2527 } 2528 2529 static void qede_schedule_recovery_handler(void *dev) 2530 { 2531 struct qede_dev *edev = dev; 2532 2533 if (edev->state == QEDE_STATE_RECOVERY) { 2534 DP_NOTICE(edev, 2535 "Avoid scheduling a recovery handling since already in recovery state\n"); 2536 return; 2537 } 2538 2539 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2540 schedule_delayed_work(&edev->sp_task, 0); 2541 2542 DP_INFO(edev, "Scheduled a recovery handler\n"); 2543 } 2544 2545 static void qede_recovery_failed(struct qede_dev *edev) 2546 { 2547 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2548 2549 netif_device_detach(edev->ndev); 2550 2551 if (edev->cdev) 2552 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2553 } 2554 2555 static void qede_recovery_handler(struct qede_dev *edev) 2556 { 2557 u32 curr_state = edev->state; 2558 int rc; 2559 2560 DP_NOTICE(edev, "Starting a recovery process\n"); 2561 2562 /* No need to acquire first the qede_lock since is done by qede_sp_task 2563 * before calling this function. 2564 */ 2565 edev->state = QEDE_STATE_RECOVERY; 2566 2567 edev->ops->common->recovery_prolog(edev->cdev); 2568 2569 if (curr_state == QEDE_STATE_OPEN) 2570 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2571 2572 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2573 2574 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2575 IS_VF(edev), QEDE_PROBE_RECOVERY); 2576 if (rc) { 2577 edev->cdev = NULL; 2578 goto err; 2579 } 2580 2581 if (curr_state == QEDE_STATE_OPEN) { 2582 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2583 if (rc) 2584 goto err; 2585 2586 qede_config_rx_mode(edev->ndev); 2587 udp_tunnel_nic_reset_ntf(edev->ndev); 2588 } 2589 2590 edev->state = curr_state; 2591 2592 DP_NOTICE(edev, "Recovery handling is done\n"); 2593 2594 return; 2595 2596 err: 2597 qede_recovery_failed(edev); 2598 } 2599 2600 static void qede_atomic_hw_err_handler(struct qede_dev *edev) 2601 { 2602 struct qed_dev *cdev = edev->cdev; 2603 2604 DP_NOTICE(edev, 2605 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n", 2606 edev->err_flags); 2607 2608 /* Get a call trace of the flow that led to the error */ 2609 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags)); 2610 2611 /* Prevent HW attentions from being reasserted */ 2612 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags)) 2613 edev->ops->common->attn_clr_enable(cdev, true); 2614 2615 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n"); 2616 } 2617 2618 static void qede_generic_hw_err_handler(struct qede_dev *edev) 2619 { 2620 DP_NOTICE(edev, 2621 "Generic sleepable HW error handling started - err_flags 0x%lx\n", 2622 edev->err_flags); 2623 2624 if (edev->devlink) 2625 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type); 2626 2627 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2628 2629 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n"); 2630 } 2631 2632 static void qede_set_hw_err_flags(struct qede_dev *edev, 2633 enum qed_hw_err_type err_type) 2634 { 2635 unsigned long err_flags = 0; 2636 2637 switch (err_type) { 2638 case QED_HW_ERR_DMAE_FAIL: 2639 set_bit(QEDE_ERR_WARN, &err_flags); 2640 fallthrough; 2641 case QED_HW_ERR_MFW_RESP_FAIL: 2642 case QED_HW_ERR_HW_ATTN: 2643 case QED_HW_ERR_RAMROD_FAIL: 2644 case QED_HW_ERR_FW_ASSERT: 2645 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags); 2646 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags); 2647 break; 2648 2649 default: 2650 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type); 2651 break; 2652 } 2653 2654 edev->err_flags |= err_flags; 2655 } 2656 2657 static void qede_schedule_hw_err_handler(void *dev, 2658 enum qed_hw_err_type err_type) 2659 { 2660 struct qede_dev *edev = dev; 2661 2662 /* Fan failure cannot be masked by handling of another HW error or by a 2663 * concurrent recovery process. 2664 */ 2665 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 2666 edev->state == QEDE_STATE_RECOVERY) && 2667 err_type != QED_HW_ERR_FAN_FAIL) { 2668 DP_INFO(edev, 2669 "Avoid scheduling an error handling while another HW error is being handled\n"); 2670 return; 2671 } 2672 2673 if (err_type >= QED_HW_ERR_LAST) { 2674 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type); 2675 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2676 return; 2677 } 2678 2679 edev->last_err_type = err_type; 2680 qede_set_hw_err_flags(edev, err_type); 2681 qede_atomic_hw_err_handler(edev); 2682 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 2683 schedule_delayed_work(&edev->sp_task, 0); 2684 2685 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type); 2686 } 2687 2688 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2689 { 2690 struct netdev_queue *netdev_txq; 2691 2692 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2693 if (netif_xmit_stopped(netdev_txq)) 2694 return true; 2695 2696 return false; 2697 } 2698 2699 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2700 { 2701 struct qede_dev *edev = dev; 2702 struct netdev_hw_addr *ha; 2703 int i; 2704 2705 if (edev->ndev->features & NETIF_F_IP_CSUM) 2706 data->feat_flags |= QED_TLV_IP_CSUM; 2707 if (edev->ndev->features & NETIF_F_TSO) 2708 data->feat_flags |= QED_TLV_LSO; 2709 2710 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2711 eth_zero_addr(data->mac[1]); 2712 eth_zero_addr(data->mac[2]); 2713 /* Copy the first two UC macs */ 2714 netif_addr_lock_bh(edev->ndev); 2715 i = 1; 2716 netdev_for_each_uc_addr(ha, edev->ndev) { 2717 ether_addr_copy(data->mac[i++], ha->addr); 2718 if (i == QED_TLV_MAC_COUNT) 2719 break; 2720 } 2721 2722 netif_addr_unlock_bh(edev->ndev); 2723 } 2724 2725 static void qede_get_eth_tlv_data(void *dev, void *data) 2726 { 2727 struct qed_mfw_tlv_eth *etlv = data; 2728 struct qede_dev *edev = dev; 2729 struct qede_fastpath *fp; 2730 int i; 2731 2732 etlv->lso_maxoff_size = 0XFFFF; 2733 etlv->lso_maxoff_size_set = true; 2734 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2735 etlv->lso_minseg_size_set = true; 2736 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2737 etlv->prom_mode_set = true; 2738 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2739 etlv->tx_descr_size_set = true; 2740 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2741 etlv->rx_descr_size_set = true; 2742 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2743 etlv->iov_offload_set = true; 2744 2745 /* Fill information regarding queues; Should be done under the qede 2746 * lock to guarantee those don't change beneath our feet. 2747 */ 2748 etlv->txqs_empty = true; 2749 etlv->rxqs_empty = true; 2750 etlv->num_txqs_full = 0; 2751 etlv->num_rxqs_full = 0; 2752 2753 __qede_lock(edev); 2754 for_each_queue(i) { 2755 fp = &edev->fp_array[i]; 2756 if (fp->type & QEDE_FASTPATH_TX) { 2757 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2758 2759 if (txq->sw_tx_cons != txq->sw_tx_prod) 2760 etlv->txqs_empty = false; 2761 if (qede_is_txq_full(edev, txq)) 2762 etlv->num_txqs_full++; 2763 } 2764 if (fp->type & QEDE_FASTPATH_RX) { 2765 if (qede_has_rx_work(fp->rxq)) 2766 etlv->rxqs_empty = false; 2767 2768 /* This one is a bit tricky; Firmware might stop 2769 * placing packets if ring is not yet full. 2770 * Give an approximation. 2771 */ 2772 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2773 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2774 RX_RING_SIZE - 100) 2775 etlv->num_rxqs_full++; 2776 } 2777 } 2778 __qede_unlock(edev); 2779 2780 etlv->txqs_empty_set = true; 2781 etlv->rxqs_empty_set = true; 2782 etlv->num_txqs_full_set = true; 2783 etlv->num_rxqs_full_set = true; 2784 } 2785 2786 /** 2787 * qede_io_error_detected - called when PCI error is detected 2788 * @pdev: Pointer to PCI device 2789 * @state: The current pci connection state 2790 * 2791 * This function is called after a PCI bus error affecting 2792 * this device has been detected. 2793 */ 2794 static pci_ers_result_t 2795 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2796 { 2797 struct net_device *dev = pci_get_drvdata(pdev); 2798 struct qede_dev *edev = netdev_priv(dev); 2799 2800 if (!edev) 2801 return PCI_ERS_RESULT_NONE; 2802 2803 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2804 2805 __qede_lock(edev); 2806 if (edev->state == QEDE_STATE_RECOVERY) { 2807 DP_NOTICE(edev, "Device already in the recovery state\n"); 2808 __qede_unlock(edev); 2809 return PCI_ERS_RESULT_NONE; 2810 } 2811 2812 /* PF handles the recovery of its VFs */ 2813 if (IS_VF(edev)) { 2814 DP_VERBOSE(edev, QED_MSG_IOV, 2815 "VF recovery is handled by its PF\n"); 2816 __qede_unlock(edev); 2817 return PCI_ERS_RESULT_RECOVERED; 2818 } 2819 2820 /* Close OS Tx */ 2821 netif_tx_disable(edev->ndev); 2822 netif_carrier_off(edev->ndev); 2823 2824 set_bit(QEDE_SP_AER, &edev->sp_flags); 2825 schedule_delayed_work(&edev->sp_task, 0); 2826 2827 __qede_unlock(edev); 2828 2829 return PCI_ERS_RESULT_CAN_RECOVER; 2830 } 2831