1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 /* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7 #include <linux/crash_dump.h> 8 #include <linux/module.h> 9 #include <linux/pci.h> 10 #include <linux/version.h> 11 #include <linux/device.h> 12 #include <linux/netdevice.h> 13 #include <linux/etherdevice.h> 14 #include <linux/skbuff.h> 15 #include <linux/errno.h> 16 #include <linux/list.h> 17 #include <linux/string.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/interrupt.h> 20 #include <asm/byteorder.h> 21 #include <asm/param.h> 22 #include <linux/io.h> 23 #include <linux/netdev_features.h> 24 #include <linux/udp.h> 25 #include <linux/tcp.h> 26 #include <net/udp_tunnel.h> 27 #include <linux/ip.h> 28 #include <net/ipv6.h> 29 #include <net/tcp.h> 30 #include <linux/if_ether.h> 31 #include <linux/if_vlan.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/ethtool.h> 34 #include <linux/in.h> 35 #include <linux/random.h> 36 #include <net/ip6_checksum.h> 37 #include <linux/bitops.h> 38 #include <linux/vmalloc.h> 39 #include <linux/aer.h> 40 #include "qede.h" 41 #include "qede_ptp.h" 42 43 static char version[] = 44 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; 45 46 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); 47 MODULE_LICENSE("GPL"); 48 MODULE_VERSION(DRV_MODULE_VERSION); 49 50 static uint debug; 51 module_param(debug, uint, 0); 52 MODULE_PARM_DESC(debug, " Default debug msglevel"); 53 54 static const struct qed_eth_ops *qed_ops; 55 56 #define CHIP_NUM_57980S_40 0x1634 57 #define CHIP_NUM_57980S_10 0x1666 58 #define CHIP_NUM_57980S_MF 0x1636 59 #define CHIP_NUM_57980S_100 0x1644 60 #define CHIP_NUM_57980S_50 0x1654 61 #define CHIP_NUM_57980S_25 0x1656 62 #define CHIP_NUM_57980S_IOV 0x1664 63 #define CHIP_NUM_AH 0x8070 64 #define CHIP_NUM_AH_IOV 0x8090 65 66 #ifndef PCI_DEVICE_ID_NX2_57980E 67 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 68 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 69 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF 70 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 71 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 72 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 73 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV 74 #define PCI_DEVICE_ID_AH CHIP_NUM_AH 75 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV 76 77 #endif 78 79 enum qede_pci_private { 80 QEDE_PRIVATE_PF, 81 QEDE_PRIVATE_VF 82 }; 83 84 static const struct pci_device_id qede_pci_tbl[] = { 85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, 87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, 88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, 89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, 90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, 91 #ifdef CONFIG_QED_SRIOV 92 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, 93 #endif 94 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF}, 95 #ifdef CONFIG_QED_SRIOV 96 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF}, 97 #endif 98 { 0 } 99 }; 100 101 MODULE_DEVICE_TABLE(pci, qede_pci_tbl); 102 103 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); 104 static pci_ers_result_t 105 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state); 106 107 #define TX_TIMEOUT (5 * HZ) 108 109 /* Utilize last protocol index for XDP */ 110 #define XDP_PI 11 111 112 static void qede_remove(struct pci_dev *pdev); 113 static void qede_shutdown(struct pci_dev *pdev); 114 static void qede_link_update(void *dev, struct qed_link_output *link); 115 static void qede_schedule_recovery_handler(void *dev); 116 static void qede_recovery_handler(struct qede_dev *edev); 117 static void qede_schedule_hw_err_handler(void *dev, 118 enum qed_hw_err_type err_type); 119 static void qede_get_eth_tlv_data(void *edev, void *data); 120 static void qede_get_generic_tlv_data(void *edev, 121 struct qed_generic_tlvs *data); 122 static void qede_generic_hw_err_handler(struct qede_dev *edev); 123 #ifdef CONFIG_QED_SRIOV 124 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos, 125 __be16 vlan_proto) 126 { 127 struct qede_dev *edev = netdev_priv(ndev); 128 129 if (vlan > 4095) { 130 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); 131 return -EINVAL; 132 } 133 134 if (vlan_proto != htons(ETH_P_8021Q)) 135 return -EPROTONOSUPPORT; 136 137 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", 138 vlan, vf); 139 140 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); 141 } 142 143 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) 144 { 145 struct qede_dev *edev = netdev_priv(ndev); 146 147 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx); 148 149 if (!is_valid_ether_addr(mac)) { 150 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); 151 return -EINVAL; 152 } 153 154 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); 155 } 156 157 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) 158 { 159 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); 160 struct qed_dev_info *qed_info = &edev->dev_info.common; 161 struct qed_update_vport_params *vport_params; 162 int rc; 163 164 vport_params = vzalloc(sizeof(*vport_params)); 165 if (!vport_params) 166 return -ENOMEM; 167 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); 168 169 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param); 170 171 /* Enable/Disable Tx switching for PF */ 172 if ((rc == num_vfs_param) && netif_running(edev->ndev) && 173 !qed_info->b_inter_pf_switch && qed_info->tx_switching) { 174 vport_params->vport_id = 0; 175 vport_params->update_tx_switching_flg = 1; 176 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; 177 edev->ops->vport_update(edev->cdev, vport_params); 178 } 179 180 vfree(vport_params); 181 return rc; 182 } 183 #endif 184 185 static const struct pci_error_handlers qede_err_handler = { 186 .error_detected = qede_io_error_detected, 187 }; 188 189 static struct pci_driver qede_pci_driver = { 190 .name = "qede", 191 .id_table = qede_pci_tbl, 192 .probe = qede_probe, 193 .remove = qede_remove, 194 .shutdown = qede_shutdown, 195 #ifdef CONFIG_QED_SRIOV 196 .sriov_configure = qede_sriov_configure, 197 #endif 198 .err_handler = &qede_err_handler, 199 }; 200 201 static struct qed_eth_cb_ops qede_ll_ops = { 202 { 203 #ifdef CONFIG_RFS_ACCEL 204 .arfs_filter_op = qede_arfs_filter_op, 205 #endif 206 .link_update = qede_link_update, 207 .schedule_recovery_handler = qede_schedule_recovery_handler, 208 .schedule_hw_err_handler = qede_schedule_hw_err_handler, 209 .get_generic_tlv_data = qede_get_generic_tlv_data, 210 .get_protocol_tlv_data = qede_get_eth_tlv_data, 211 }, 212 .force_mac = qede_force_mac, 213 .ports_update = qede_udp_ports_update, 214 }; 215 216 static int qede_netdev_event(struct notifier_block *this, unsigned long event, 217 void *ptr) 218 { 219 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 220 struct ethtool_drvinfo drvinfo; 221 struct qede_dev *edev; 222 223 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR) 224 goto done; 225 226 /* Check whether this is a qede device */ 227 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) 228 goto done; 229 230 memset(&drvinfo, 0, sizeof(drvinfo)); 231 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); 232 if (strcmp(drvinfo.driver, "qede")) 233 goto done; 234 edev = netdev_priv(ndev); 235 236 switch (event) { 237 case NETDEV_CHANGENAME: 238 /* Notify qed of the name change */ 239 if (!edev->ops || !edev->ops->common) 240 goto done; 241 edev->ops->common->set_name(edev->cdev, edev->ndev->name); 242 break; 243 case NETDEV_CHANGEADDR: 244 edev = netdev_priv(ndev); 245 qede_rdma_event_changeaddr(edev); 246 break; 247 } 248 249 done: 250 return NOTIFY_DONE; 251 } 252 253 static struct notifier_block qede_netdev_notifier = { 254 .notifier_call = qede_netdev_event, 255 }; 256 257 static 258 int __init qede_init(void) 259 { 260 int ret; 261 262 pr_info("qede_init: %s\n", version); 263 264 qede_forced_speed_maps_init(); 265 266 qed_ops = qed_get_eth_ops(); 267 if (!qed_ops) { 268 pr_notice("Failed to get qed ethtool operations\n"); 269 return -EINVAL; 270 } 271 272 /* Must register notifier before pci ops, since we might miss 273 * interface rename after pci probe and netdev registration. 274 */ 275 ret = register_netdevice_notifier(&qede_netdev_notifier); 276 if (ret) { 277 pr_notice("Failed to register netdevice_notifier\n"); 278 qed_put_eth_ops(); 279 return -EINVAL; 280 } 281 282 ret = pci_register_driver(&qede_pci_driver); 283 if (ret) { 284 pr_notice("Failed to register driver\n"); 285 unregister_netdevice_notifier(&qede_netdev_notifier); 286 qed_put_eth_ops(); 287 return -EINVAL; 288 } 289 290 return 0; 291 } 292 293 static void __exit qede_cleanup(void) 294 { 295 if (debug & QED_LOG_INFO_MASK) 296 pr_info("qede_cleanup called\n"); 297 298 unregister_netdevice_notifier(&qede_netdev_notifier); 299 pci_unregister_driver(&qede_pci_driver); 300 qed_put_eth_ops(); 301 } 302 303 module_init(qede_init); 304 module_exit(qede_cleanup); 305 306 static int qede_open(struct net_device *ndev); 307 static int qede_close(struct net_device *ndev); 308 309 void qede_fill_by_demand_stats(struct qede_dev *edev) 310 { 311 struct qede_stats_common *p_common = &edev->stats.common; 312 struct qed_eth_stats stats; 313 314 edev->ops->get_vport_stats(edev->cdev, &stats); 315 316 p_common->no_buff_discards = stats.common.no_buff_discards; 317 p_common->packet_too_big_discard = stats.common.packet_too_big_discard; 318 p_common->ttl0_discard = stats.common.ttl0_discard; 319 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes; 320 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes; 321 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes; 322 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts; 323 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts; 324 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts; 325 p_common->mftag_filter_discards = stats.common.mftag_filter_discards; 326 p_common->mac_filter_discards = stats.common.mac_filter_discards; 327 p_common->gft_filter_drop = stats.common.gft_filter_drop; 328 329 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes; 330 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes; 331 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes; 332 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts; 333 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts; 334 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts; 335 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts; 336 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts; 337 p_common->coalesced_events = stats.common.tpa_coalesced_events; 338 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num; 339 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts; 340 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes; 341 342 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets; 343 p_common->rx_65_to_127_byte_packets = 344 stats.common.rx_65_to_127_byte_packets; 345 p_common->rx_128_to_255_byte_packets = 346 stats.common.rx_128_to_255_byte_packets; 347 p_common->rx_256_to_511_byte_packets = 348 stats.common.rx_256_to_511_byte_packets; 349 p_common->rx_512_to_1023_byte_packets = 350 stats.common.rx_512_to_1023_byte_packets; 351 p_common->rx_1024_to_1518_byte_packets = 352 stats.common.rx_1024_to_1518_byte_packets; 353 p_common->rx_crc_errors = stats.common.rx_crc_errors; 354 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames; 355 p_common->rx_pause_frames = stats.common.rx_pause_frames; 356 p_common->rx_pfc_frames = stats.common.rx_pfc_frames; 357 p_common->rx_align_errors = stats.common.rx_align_errors; 358 p_common->rx_carrier_errors = stats.common.rx_carrier_errors; 359 p_common->rx_oversize_packets = stats.common.rx_oversize_packets; 360 p_common->rx_jabbers = stats.common.rx_jabbers; 361 p_common->rx_undersize_packets = stats.common.rx_undersize_packets; 362 p_common->rx_fragments = stats.common.rx_fragments; 363 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets; 364 p_common->tx_65_to_127_byte_packets = 365 stats.common.tx_65_to_127_byte_packets; 366 p_common->tx_128_to_255_byte_packets = 367 stats.common.tx_128_to_255_byte_packets; 368 p_common->tx_256_to_511_byte_packets = 369 stats.common.tx_256_to_511_byte_packets; 370 p_common->tx_512_to_1023_byte_packets = 371 stats.common.tx_512_to_1023_byte_packets; 372 p_common->tx_1024_to_1518_byte_packets = 373 stats.common.tx_1024_to_1518_byte_packets; 374 p_common->tx_pause_frames = stats.common.tx_pause_frames; 375 p_common->tx_pfc_frames = stats.common.tx_pfc_frames; 376 p_common->brb_truncates = stats.common.brb_truncates; 377 p_common->brb_discards = stats.common.brb_discards; 378 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames; 379 p_common->link_change_count = stats.common.link_change_count; 380 p_common->ptp_skip_txts = edev->ptp_skip_txts; 381 382 if (QEDE_IS_BB(edev)) { 383 struct qede_stats_bb *p_bb = &edev->stats.bb; 384 385 p_bb->rx_1519_to_1522_byte_packets = 386 stats.bb.rx_1519_to_1522_byte_packets; 387 p_bb->rx_1519_to_2047_byte_packets = 388 stats.bb.rx_1519_to_2047_byte_packets; 389 p_bb->rx_2048_to_4095_byte_packets = 390 stats.bb.rx_2048_to_4095_byte_packets; 391 p_bb->rx_4096_to_9216_byte_packets = 392 stats.bb.rx_4096_to_9216_byte_packets; 393 p_bb->rx_9217_to_16383_byte_packets = 394 stats.bb.rx_9217_to_16383_byte_packets; 395 p_bb->tx_1519_to_2047_byte_packets = 396 stats.bb.tx_1519_to_2047_byte_packets; 397 p_bb->tx_2048_to_4095_byte_packets = 398 stats.bb.tx_2048_to_4095_byte_packets; 399 p_bb->tx_4096_to_9216_byte_packets = 400 stats.bb.tx_4096_to_9216_byte_packets; 401 p_bb->tx_9217_to_16383_byte_packets = 402 stats.bb.tx_9217_to_16383_byte_packets; 403 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count; 404 p_bb->tx_total_collisions = stats.bb.tx_total_collisions; 405 } else { 406 struct qede_stats_ah *p_ah = &edev->stats.ah; 407 408 p_ah->rx_1519_to_max_byte_packets = 409 stats.ah.rx_1519_to_max_byte_packets; 410 p_ah->tx_1519_to_max_byte_packets = 411 stats.ah.tx_1519_to_max_byte_packets; 412 } 413 } 414 415 static void qede_get_stats64(struct net_device *dev, 416 struct rtnl_link_stats64 *stats) 417 { 418 struct qede_dev *edev = netdev_priv(dev); 419 struct qede_stats_common *p_common; 420 421 qede_fill_by_demand_stats(edev); 422 p_common = &edev->stats.common; 423 424 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts + 425 p_common->rx_bcast_pkts; 426 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts + 427 p_common->tx_bcast_pkts; 428 429 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes + 430 p_common->rx_bcast_bytes; 431 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes + 432 p_common->tx_bcast_bytes; 433 434 stats->tx_errors = p_common->tx_err_drop_pkts; 435 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts; 436 437 stats->rx_fifo_errors = p_common->no_buff_discards; 438 439 if (QEDE_IS_BB(edev)) 440 stats->collisions = edev->stats.bb.tx_total_collisions; 441 stats->rx_crc_errors = p_common->rx_crc_errors; 442 stats->rx_frame_errors = p_common->rx_align_errors; 443 } 444 445 #ifdef CONFIG_QED_SRIOV 446 static int qede_get_vf_config(struct net_device *dev, int vfidx, 447 struct ifla_vf_info *ivi) 448 { 449 struct qede_dev *edev = netdev_priv(dev); 450 451 if (!edev->ops) 452 return -EINVAL; 453 454 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi); 455 } 456 457 static int qede_set_vf_rate(struct net_device *dev, int vfidx, 458 int min_tx_rate, int max_tx_rate) 459 { 460 struct qede_dev *edev = netdev_priv(dev); 461 462 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, 463 max_tx_rate); 464 } 465 466 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) 467 { 468 struct qede_dev *edev = netdev_priv(dev); 469 470 if (!edev->ops) 471 return -EINVAL; 472 473 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); 474 } 475 476 static int qede_set_vf_link_state(struct net_device *dev, int vfidx, 477 int link_state) 478 { 479 struct qede_dev *edev = netdev_priv(dev); 480 481 if (!edev->ops) 482 return -EINVAL; 483 484 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); 485 } 486 487 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting) 488 { 489 struct qede_dev *edev = netdev_priv(dev); 490 491 if (!edev->ops) 492 return -EINVAL; 493 494 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting); 495 } 496 #endif 497 498 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 499 { 500 struct qede_dev *edev = netdev_priv(dev); 501 502 if (!netif_running(dev)) 503 return -EAGAIN; 504 505 switch (cmd) { 506 case SIOCSHWTSTAMP: 507 return qede_ptp_hw_ts(edev, ifr); 508 default: 509 DP_VERBOSE(edev, QED_MSG_DEBUG, 510 "default IOCTL cmd 0x%x\n", cmd); 511 return -EOPNOTSUPP; 512 } 513 514 return 0; 515 } 516 517 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq) 518 { 519 DP_NOTICE(edev, 520 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n", 521 txq->index, le16_to_cpu(*txq->hw_cons_ptr), 522 qed_chain_get_cons_idx(&txq->tx_pbl), 523 qed_chain_get_prod_idx(&txq->tx_pbl), 524 jiffies); 525 } 526 527 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue) 528 { 529 struct qede_dev *edev = netdev_priv(dev); 530 struct qede_tx_queue *txq; 531 int cos; 532 533 netif_carrier_off(dev); 534 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue); 535 536 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX)) 537 return; 538 539 for_each_cos_in_txq(edev, cos) { 540 txq = &edev->fp_array[txqueue].txq[cos]; 541 542 if (qed_chain_get_cons_idx(&txq->tx_pbl) != 543 qed_chain_get_prod_idx(&txq->tx_pbl)) 544 qede_tx_log_print(edev, txq); 545 } 546 547 if (IS_VF(edev)) 548 return; 549 550 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 551 edev->state == QEDE_STATE_RECOVERY) { 552 DP_INFO(edev, 553 "Avoid handling a Tx timeout while another HW error is being handled\n"); 554 return; 555 } 556 557 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags); 558 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 559 schedule_delayed_work(&edev->sp_task, 0); 560 } 561 562 static int qede_setup_tc(struct net_device *ndev, u8 num_tc) 563 { 564 struct qede_dev *edev = netdev_priv(ndev); 565 int cos, count, offset; 566 567 if (num_tc > edev->dev_info.num_tc) 568 return -EINVAL; 569 570 netdev_reset_tc(ndev); 571 netdev_set_num_tc(ndev, num_tc); 572 573 for_each_cos_in_txq(edev, cos) { 574 count = QEDE_TSS_COUNT(edev); 575 offset = cos * QEDE_TSS_COUNT(edev); 576 netdev_set_tc_queue(ndev, cos, count, offset); 577 } 578 579 return 0; 580 } 581 582 static int 583 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f, 584 __be16 proto) 585 { 586 switch (f->command) { 587 case FLOW_CLS_REPLACE: 588 return qede_add_tc_flower_fltr(edev, proto, f); 589 case FLOW_CLS_DESTROY: 590 return qede_delete_flow_filter(edev, f->cookie); 591 default: 592 return -EOPNOTSUPP; 593 } 594 } 595 596 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 597 void *cb_priv) 598 { 599 struct flow_cls_offload *f; 600 struct qede_dev *edev = cb_priv; 601 602 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data)) 603 return -EOPNOTSUPP; 604 605 switch (type) { 606 case TC_SETUP_CLSFLOWER: 607 f = type_data; 608 return qede_set_flower(edev, f, f->common.protocol); 609 default: 610 return -EOPNOTSUPP; 611 } 612 } 613 614 static LIST_HEAD(qede_block_cb_list); 615 616 static int 617 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type, 618 void *type_data) 619 { 620 struct qede_dev *edev = netdev_priv(dev); 621 struct tc_mqprio_qopt *mqprio; 622 623 switch (type) { 624 case TC_SETUP_BLOCK: 625 return flow_block_cb_setup_simple(type_data, 626 &qede_block_cb_list, 627 qede_setup_tc_block_cb, 628 edev, edev, true); 629 case TC_SETUP_QDISC_MQPRIO: 630 mqprio = type_data; 631 632 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 633 return qede_setup_tc(dev, mqprio->num_tc); 634 default: 635 return -EOPNOTSUPP; 636 } 637 } 638 639 static const struct net_device_ops qede_netdev_ops = { 640 .ndo_open = qede_open, 641 .ndo_stop = qede_close, 642 .ndo_start_xmit = qede_start_xmit, 643 .ndo_select_queue = qede_select_queue, 644 .ndo_set_rx_mode = qede_set_rx_mode, 645 .ndo_set_mac_address = qede_set_mac_addr, 646 .ndo_validate_addr = eth_validate_addr, 647 .ndo_change_mtu = qede_change_mtu, 648 .ndo_do_ioctl = qede_ioctl, 649 .ndo_tx_timeout = qede_tx_timeout, 650 #ifdef CONFIG_QED_SRIOV 651 .ndo_set_vf_mac = qede_set_vf_mac, 652 .ndo_set_vf_vlan = qede_set_vf_vlan, 653 .ndo_set_vf_trust = qede_set_vf_trust, 654 #endif 655 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 656 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 657 .ndo_fix_features = qede_fix_features, 658 .ndo_set_features = qede_set_features, 659 .ndo_get_stats64 = qede_get_stats64, 660 #ifdef CONFIG_QED_SRIOV 661 .ndo_set_vf_link_state = qede_set_vf_link_state, 662 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, 663 .ndo_get_vf_config = qede_get_vf_config, 664 .ndo_set_vf_rate = qede_set_vf_rate, 665 #endif 666 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 667 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 668 .ndo_features_check = qede_features_check, 669 .ndo_bpf = qede_xdp, 670 #ifdef CONFIG_RFS_ACCEL 671 .ndo_rx_flow_steer = qede_rx_flow_steer, 672 #endif 673 .ndo_xdp_xmit = qede_xdp_transmit, 674 .ndo_setup_tc = qede_setup_tc_offload, 675 }; 676 677 static const struct net_device_ops qede_netdev_vf_ops = { 678 .ndo_open = qede_open, 679 .ndo_stop = qede_close, 680 .ndo_start_xmit = qede_start_xmit, 681 .ndo_select_queue = qede_select_queue, 682 .ndo_set_rx_mode = qede_set_rx_mode, 683 .ndo_set_mac_address = qede_set_mac_addr, 684 .ndo_validate_addr = eth_validate_addr, 685 .ndo_change_mtu = qede_change_mtu, 686 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 687 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 688 .ndo_fix_features = qede_fix_features, 689 .ndo_set_features = qede_set_features, 690 .ndo_get_stats64 = qede_get_stats64, 691 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 692 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 693 .ndo_features_check = qede_features_check, 694 }; 695 696 static const struct net_device_ops qede_netdev_vf_xdp_ops = { 697 .ndo_open = qede_open, 698 .ndo_stop = qede_close, 699 .ndo_start_xmit = qede_start_xmit, 700 .ndo_select_queue = qede_select_queue, 701 .ndo_set_rx_mode = qede_set_rx_mode, 702 .ndo_set_mac_address = qede_set_mac_addr, 703 .ndo_validate_addr = eth_validate_addr, 704 .ndo_change_mtu = qede_change_mtu, 705 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, 706 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, 707 .ndo_fix_features = qede_fix_features, 708 .ndo_set_features = qede_set_features, 709 .ndo_get_stats64 = qede_get_stats64, 710 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port, 711 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port, 712 .ndo_features_check = qede_features_check, 713 .ndo_bpf = qede_xdp, 714 .ndo_xdp_xmit = qede_xdp_transmit, 715 }; 716 717 /* ------------------------------------------------------------------------- 718 * START OF PROBE / REMOVE 719 * ------------------------------------------------------------------------- 720 */ 721 722 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, 723 struct pci_dev *pdev, 724 struct qed_dev_eth_info *info, 725 u32 dp_module, u8 dp_level) 726 { 727 struct net_device *ndev; 728 struct qede_dev *edev; 729 730 ndev = alloc_etherdev_mqs(sizeof(*edev), 731 info->num_queues * info->num_tc, 732 info->num_queues); 733 if (!ndev) { 734 pr_err("etherdev allocation failed\n"); 735 return NULL; 736 } 737 738 edev = netdev_priv(ndev); 739 edev->ndev = ndev; 740 edev->cdev = cdev; 741 edev->pdev = pdev; 742 edev->dp_module = dp_module; 743 edev->dp_level = dp_level; 744 edev->ops = qed_ops; 745 746 if (is_kdump_kernel()) { 747 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN; 748 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN; 749 } else { 750 edev->q_num_rx_buffers = NUM_RX_BDS_DEF; 751 edev->q_num_tx_buffers = NUM_TX_BDS_DEF; 752 } 753 754 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n", 755 info->num_queues, info->num_queues); 756 757 SET_NETDEV_DEV(ndev, &pdev->dev); 758 759 memset(&edev->stats, 0, sizeof(edev->stats)); 760 memcpy(&edev->dev_info, info, sizeof(*info)); 761 762 /* As ethtool doesn't have the ability to show WoL behavior as 763 * 'default', if device supports it declare it's enabled. 764 */ 765 if (edev->dev_info.common.wol_support) 766 edev->wol_enabled = true; 767 768 INIT_LIST_HEAD(&edev->vlan_list); 769 770 return edev; 771 } 772 773 static void qede_init_ndev(struct qede_dev *edev) 774 { 775 struct net_device *ndev = edev->ndev; 776 struct pci_dev *pdev = edev->pdev; 777 bool udp_tunnel_enable = false; 778 netdev_features_t hw_features; 779 780 pci_set_drvdata(pdev, ndev); 781 782 ndev->mem_start = edev->dev_info.common.pci_mem_start; 783 ndev->base_addr = ndev->mem_start; 784 ndev->mem_end = edev->dev_info.common.pci_mem_end; 785 ndev->irq = edev->dev_info.common.pci_irq; 786 787 ndev->watchdog_timeo = TX_TIMEOUT; 788 789 if (IS_VF(edev)) { 790 if (edev->dev_info.xdp_supported) 791 ndev->netdev_ops = &qede_netdev_vf_xdp_ops; 792 else 793 ndev->netdev_ops = &qede_netdev_vf_ops; 794 } else { 795 ndev->netdev_ops = &qede_netdev_ops; 796 } 797 798 qede_set_ethtool_ops(ndev); 799 800 ndev->priv_flags |= IFF_UNICAST_FLT; 801 802 /* user-changeble features */ 803 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG | 804 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 805 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC; 806 807 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) 808 hw_features |= NETIF_F_NTUPLE; 809 810 if (edev->dev_info.common.vxlan_enable || 811 edev->dev_info.common.geneve_enable) 812 udp_tunnel_enable = true; 813 814 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) { 815 hw_features |= NETIF_F_TSO_ECN; 816 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 817 NETIF_F_SG | NETIF_F_TSO | 818 NETIF_F_TSO_ECN | NETIF_F_TSO6 | 819 NETIF_F_RXCSUM; 820 } 821 822 if (udp_tunnel_enable) { 823 hw_features |= (NETIF_F_GSO_UDP_TUNNEL | 824 NETIF_F_GSO_UDP_TUNNEL_CSUM); 825 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL | 826 NETIF_F_GSO_UDP_TUNNEL_CSUM); 827 828 qede_set_udp_tunnels(edev); 829 } 830 831 if (edev->dev_info.common.gre_enable) { 832 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM); 833 ndev->hw_enc_features |= (NETIF_F_GSO_GRE | 834 NETIF_F_GSO_GRE_CSUM); 835 } 836 837 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 838 NETIF_F_HIGHDMA; 839 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | 840 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | 841 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; 842 843 ndev->hw_features = hw_features; 844 845 /* MTU range: 46 - 9600 */ 846 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; 847 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE; 848 849 /* Set network device HW mac */ 850 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); 851 852 ndev->mtu = edev->dev_info.common.mtu; 853 } 854 855 /* This function converts from 32b param to two params of level and module 856 * Input 32b decoding: 857 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the 858 * 'happy' flow, e.g. memory allocation failed. 859 * b30 - enable all INFO prints. INFO prints are for major steps in the flow 860 * and provide important parameters. 861 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that 862 * module. VERBOSE prints are for tracking the specific flow in low level. 863 * 864 * Notice that the level should be that of the lowest required logs. 865 */ 866 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) 867 { 868 *p_dp_level = QED_LEVEL_NOTICE; 869 *p_dp_module = 0; 870 871 if (debug & QED_LOG_VERBOSE_MASK) { 872 *p_dp_level = QED_LEVEL_VERBOSE; 873 *p_dp_module = (debug & 0x3FFFFFFF); 874 } else if (debug & QED_LOG_INFO_MASK) { 875 *p_dp_level = QED_LEVEL_INFO; 876 } else if (debug & QED_LOG_NOTICE_MASK) { 877 *p_dp_level = QED_LEVEL_NOTICE; 878 } 879 } 880 881 static void qede_free_fp_array(struct qede_dev *edev) 882 { 883 if (edev->fp_array) { 884 struct qede_fastpath *fp; 885 int i; 886 887 for_each_queue(i) { 888 fp = &edev->fp_array[i]; 889 890 kfree(fp->sb_info); 891 /* Handle mem alloc failure case where qede_init_fp 892 * didn't register xdp_rxq_info yet. 893 * Implicit only (fp->type & QEDE_FASTPATH_RX) 894 */ 895 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq)) 896 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq); 897 kfree(fp->rxq); 898 kfree(fp->xdp_tx); 899 kfree(fp->txq); 900 } 901 kfree(edev->fp_array); 902 } 903 904 edev->num_queues = 0; 905 edev->fp_num_tx = 0; 906 edev->fp_num_rx = 0; 907 } 908 909 static int qede_alloc_fp_array(struct qede_dev *edev) 910 { 911 u8 fp_combined, fp_rx = edev->fp_num_rx; 912 struct qede_fastpath *fp; 913 int i; 914 915 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev), 916 sizeof(*edev->fp_array), GFP_KERNEL); 917 if (!edev->fp_array) { 918 DP_NOTICE(edev, "fp array allocation failed\n"); 919 goto err; 920 } 921 922 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx; 923 924 /* Allocate the FP elements for Rx queues followed by combined and then 925 * the Tx. This ordering should be maintained so that the respective 926 * queues (Rx or Tx) will be together in the fastpath array and the 927 * associated ids will be sequential. 928 */ 929 for_each_queue(i) { 930 fp = &edev->fp_array[i]; 931 932 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL); 933 if (!fp->sb_info) { 934 DP_NOTICE(edev, "sb info struct allocation failed\n"); 935 goto err; 936 } 937 938 if (fp_rx) { 939 fp->type = QEDE_FASTPATH_RX; 940 fp_rx--; 941 } else if (fp_combined) { 942 fp->type = QEDE_FASTPATH_COMBINED; 943 fp_combined--; 944 } else { 945 fp->type = QEDE_FASTPATH_TX; 946 } 947 948 if (fp->type & QEDE_FASTPATH_TX) { 949 fp->txq = kcalloc(edev->dev_info.num_tc, 950 sizeof(*fp->txq), GFP_KERNEL); 951 if (!fp->txq) 952 goto err; 953 } 954 955 if (fp->type & QEDE_FASTPATH_RX) { 956 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL); 957 if (!fp->rxq) 958 goto err; 959 960 if (edev->xdp_prog) { 961 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx), 962 GFP_KERNEL); 963 if (!fp->xdp_tx) 964 goto err; 965 fp->type |= QEDE_FASTPATH_XDP; 966 } 967 } 968 } 969 970 return 0; 971 err: 972 qede_free_fp_array(edev); 973 return -ENOMEM; 974 } 975 976 /* The qede lock is used to protect driver state change and driver flows that 977 * are not reentrant. 978 */ 979 void __qede_lock(struct qede_dev *edev) 980 { 981 mutex_lock(&edev->qede_lock); 982 } 983 984 void __qede_unlock(struct qede_dev *edev) 985 { 986 mutex_unlock(&edev->qede_lock); 987 } 988 989 /* This version of the lock should be used when acquiring the RTNL lock is also 990 * needed in addition to the internal qede lock. 991 */ 992 static void qede_lock(struct qede_dev *edev) 993 { 994 rtnl_lock(); 995 __qede_lock(edev); 996 } 997 998 static void qede_unlock(struct qede_dev *edev) 999 { 1000 __qede_unlock(edev); 1001 rtnl_unlock(); 1002 } 1003 1004 static void qede_sp_task(struct work_struct *work) 1005 { 1006 struct qede_dev *edev = container_of(work, struct qede_dev, 1007 sp_task.work); 1008 1009 /* The locking scheme depends on the specific flag: 1010 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to 1011 * ensure that ongoing flows are ended and new ones are not started. 1012 * In other cases - only the internal qede lock should be acquired. 1013 */ 1014 1015 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) { 1016 #ifdef CONFIG_QED_SRIOV 1017 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1018 * The recovery of the active VFs is currently not supported. 1019 */ 1020 if (pci_num_vf(edev->pdev)) 1021 qede_sriov_configure(edev->pdev, 0); 1022 #endif 1023 qede_lock(edev); 1024 qede_recovery_handler(edev); 1025 qede_unlock(edev); 1026 } 1027 1028 __qede_lock(edev); 1029 1030 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) 1031 if (edev->state == QEDE_STATE_OPEN) 1032 qede_config_rx_mode(edev->ndev); 1033 1034 #ifdef CONFIG_RFS_ACCEL 1035 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) { 1036 if (edev->state == QEDE_STATE_OPEN) 1037 qede_process_arfs_filters(edev, false); 1038 } 1039 #endif 1040 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags)) 1041 qede_generic_hw_err_handler(edev); 1042 __qede_unlock(edev); 1043 1044 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) { 1045 #ifdef CONFIG_QED_SRIOV 1046 /* SRIOV must be disabled outside the lock to avoid a deadlock. 1047 * The recovery of the active VFs is currently not supported. 1048 */ 1049 if (pci_num_vf(edev->pdev)) 1050 qede_sriov_configure(edev->pdev, 0); 1051 #endif 1052 edev->ops->common->recovery_process(edev->cdev); 1053 } 1054 } 1055 1056 static void qede_update_pf_params(struct qed_dev *cdev) 1057 { 1058 struct qed_pf_params pf_params; 1059 u16 num_cons; 1060 1061 /* 64 rx + 64 tx + 64 XDP */ 1062 memset(&pf_params, 0, sizeof(struct qed_pf_params)); 1063 1064 /* 1 rx + 1 xdp + max tx cos */ 1065 num_cons = QED_MIN_L2_CONS; 1066 1067 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons; 1068 1069 /* Same for VFs - make sure they'll have sufficient connections 1070 * to support XDP Tx queues. 1071 */ 1072 pf_params.eth_pf_params.num_vf_cons = 48; 1073 1074 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR; 1075 qed_ops->common->update_pf_params(cdev, &pf_params); 1076 } 1077 1078 #define QEDE_FW_VER_STR_SIZE 80 1079 1080 static void qede_log_probe(struct qede_dev *edev) 1081 { 1082 struct qed_dev_info *p_dev_info = &edev->dev_info.common; 1083 u8 buf[QEDE_FW_VER_STR_SIZE]; 1084 size_t left_size; 1085 1086 snprintf(buf, QEDE_FW_VER_STR_SIZE, 1087 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d", 1088 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev, 1089 p_dev_info->fw_eng, 1090 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >> 1091 QED_MFW_VERSION_3_OFFSET, 1092 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >> 1093 QED_MFW_VERSION_2_OFFSET, 1094 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >> 1095 QED_MFW_VERSION_1_OFFSET, 1096 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >> 1097 QED_MFW_VERSION_0_OFFSET); 1098 1099 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf); 1100 if (p_dev_info->mbi_version && left_size) 1101 snprintf(buf + strlen(buf), left_size, 1102 " [MBI %d.%d.%d]", 1103 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >> 1104 QED_MBI_VERSION_2_OFFSET, 1105 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >> 1106 QED_MBI_VERSION_1_OFFSET, 1107 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >> 1108 QED_MBI_VERSION_0_OFFSET); 1109 1110 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number, 1111 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn), 1112 buf, edev->ndev->name); 1113 } 1114 1115 enum qede_probe_mode { 1116 QEDE_PROBE_NORMAL, 1117 QEDE_PROBE_RECOVERY, 1118 }; 1119 1120 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, 1121 bool is_vf, enum qede_probe_mode mode) 1122 { 1123 struct qed_probe_params probe_params; 1124 struct qed_slowpath_params sp_params; 1125 struct qed_dev_eth_info dev_info; 1126 struct qede_dev *edev; 1127 struct qed_dev *cdev; 1128 int rc; 1129 1130 if (unlikely(dp_level & QED_LEVEL_INFO)) 1131 pr_notice("Starting qede probe\n"); 1132 1133 memset(&probe_params, 0, sizeof(probe_params)); 1134 probe_params.protocol = QED_PROTOCOL_ETH; 1135 probe_params.dp_module = dp_module; 1136 probe_params.dp_level = dp_level; 1137 probe_params.is_vf = is_vf; 1138 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY); 1139 cdev = qed_ops->common->probe(pdev, &probe_params); 1140 if (!cdev) { 1141 rc = -ENODEV; 1142 goto err0; 1143 } 1144 1145 qede_update_pf_params(cdev); 1146 1147 /* Start the Slowpath-process */ 1148 memset(&sp_params, 0, sizeof(sp_params)); 1149 sp_params.int_mode = QED_INT_MODE_MSIX; 1150 sp_params.drv_major = QEDE_MAJOR_VERSION; 1151 sp_params.drv_minor = QEDE_MINOR_VERSION; 1152 sp_params.drv_rev = QEDE_REVISION_VERSION; 1153 sp_params.drv_eng = QEDE_ENGINEERING_VERSION; 1154 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE); 1155 rc = qed_ops->common->slowpath_start(cdev, &sp_params); 1156 if (rc) { 1157 pr_notice("Cannot start slowpath\n"); 1158 goto err1; 1159 } 1160 1161 /* Learn information crucial for qede to progress */ 1162 rc = qed_ops->fill_dev_info(cdev, &dev_info); 1163 if (rc) 1164 goto err2; 1165 1166 if (mode != QEDE_PROBE_RECOVERY) { 1167 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, 1168 dp_level); 1169 if (!edev) { 1170 rc = -ENOMEM; 1171 goto err2; 1172 } 1173 } else { 1174 struct net_device *ndev = pci_get_drvdata(pdev); 1175 1176 edev = netdev_priv(ndev); 1177 edev->cdev = cdev; 1178 memset(&edev->stats, 0, sizeof(edev->stats)); 1179 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info)); 1180 } 1181 1182 if (is_vf) 1183 set_bit(QEDE_FLAGS_IS_VF, &edev->flags); 1184 1185 qede_init_ndev(edev); 1186 1187 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY)); 1188 if (rc) 1189 goto err3; 1190 1191 if (mode != QEDE_PROBE_RECOVERY) { 1192 /* Prepare the lock prior to the registration of the netdev, 1193 * as once it's registered we might reach flows requiring it 1194 * [it's even possible to reach a flow needing it directly 1195 * from there, although it's unlikely]. 1196 */ 1197 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); 1198 mutex_init(&edev->qede_lock); 1199 1200 rc = register_netdev(edev->ndev); 1201 if (rc) { 1202 DP_NOTICE(edev, "Cannot register net-device\n"); 1203 goto err4; 1204 } 1205 } 1206 1207 edev->ops->common->set_name(cdev, edev->ndev->name); 1208 1209 /* PTP not supported on VFs */ 1210 if (!is_vf) 1211 qede_ptp_enable(edev); 1212 1213 edev->ops->register_ops(cdev, &qede_ll_ops, edev); 1214 1215 #ifdef CONFIG_DCB 1216 if (!IS_VF(edev)) 1217 qede_set_dcbnl_ops(edev->ndev); 1218 #endif 1219 1220 edev->rx_copybreak = QEDE_RX_HDR_SIZE; 1221 1222 qede_log_probe(edev); 1223 return 0; 1224 1225 err4: 1226 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY)); 1227 err3: 1228 free_netdev(edev->ndev); 1229 err2: 1230 qed_ops->common->slowpath_stop(cdev); 1231 err1: 1232 qed_ops->common->remove(cdev); 1233 err0: 1234 return rc; 1235 } 1236 1237 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1238 { 1239 bool is_vf = false; 1240 u32 dp_module = 0; 1241 u8 dp_level = 0; 1242 1243 switch ((enum qede_pci_private)id->driver_data) { 1244 case QEDE_PRIVATE_VF: 1245 if (debug & QED_LOG_VERBOSE_MASK) 1246 dev_err(&pdev->dev, "Probing a VF\n"); 1247 is_vf = true; 1248 break; 1249 default: 1250 if (debug & QED_LOG_VERBOSE_MASK) 1251 dev_err(&pdev->dev, "Probing a PF\n"); 1252 } 1253 1254 qede_config_debug(debug, &dp_module, &dp_level); 1255 1256 return __qede_probe(pdev, dp_module, dp_level, is_vf, 1257 QEDE_PROBE_NORMAL); 1258 } 1259 1260 enum qede_remove_mode { 1261 QEDE_REMOVE_NORMAL, 1262 QEDE_REMOVE_RECOVERY, 1263 }; 1264 1265 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1266 { 1267 struct net_device *ndev = pci_get_drvdata(pdev); 1268 struct qede_dev *edev; 1269 struct qed_dev *cdev; 1270 1271 if (!ndev) { 1272 dev_info(&pdev->dev, "Device has already been removed\n"); 1273 return; 1274 } 1275 1276 edev = netdev_priv(ndev); 1277 cdev = edev->cdev; 1278 1279 DP_INFO(edev, "Starting qede_remove\n"); 1280 1281 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY)); 1282 1283 if (mode != QEDE_REMOVE_RECOVERY) { 1284 unregister_netdev(ndev); 1285 1286 cancel_delayed_work_sync(&edev->sp_task); 1287 1288 edev->ops->common->set_power_state(cdev, PCI_D0); 1289 1290 pci_set_drvdata(pdev, NULL); 1291 } 1292 1293 qede_ptp_disable(edev); 1294 1295 /* Use global ops since we've freed edev */ 1296 qed_ops->common->slowpath_stop(cdev); 1297 if (system_state == SYSTEM_POWER_OFF) 1298 return; 1299 qed_ops->common->remove(cdev); 1300 edev->cdev = NULL; 1301 1302 /* Since this can happen out-of-sync with other flows, 1303 * don't release the netdevice until after slowpath stop 1304 * has been called to guarantee various other contexts 1305 * [e.g., QED register callbacks] won't break anything when 1306 * accessing the netdevice. 1307 */ 1308 if (mode != QEDE_REMOVE_RECOVERY) 1309 free_netdev(ndev); 1310 1311 dev_info(&pdev->dev, "Ending qede_remove successfully\n"); 1312 } 1313 1314 static void qede_remove(struct pci_dev *pdev) 1315 { 1316 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1317 } 1318 1319 static void qede_shutdown(struct pci_dev *pdev) 1320 { 1321 __qede_remove(pdev, QEDE_REMOVE_NORMAL); 1322 } 1323 1324 /* ------------------------------------------------------------------------- 1325 * START OF LOAD / UNLOAD 1326 * ------------------------------------------------------------------------- 1327 */ 1328 1329 static int qede_set_num_queues(struct qede_dev *edev) 1330 { 1331 int rc; 1332 u16 rss_num; 1333 1334 /* Setup queues according to possible resources*/ 1335 if (edev->req_queues) 1336 rss_num = edev->req_queues; 1337 else 1338 rss_num = netif_get_num_default_rss_queues() * 1339 edev->dev_info.common.num_hwfns; 1340 1341 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); 1342 1343 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); 1344 if (rc > 0) { 1345 /* Managed to request interrupts for our queues */ 1346 edev->num_queues = rc; 1347 DP_INFO(edev, "Managed %d [of %d] RSS queues\n", 1348 QEDE_QUEUE_CNT(edev), rss_num); 1349 rc = 0; 1350 } 1351 1352 edev->fp_num_tx = edev->req_num_tx; 1353 edev->fp_num_rx = edev->req_num_rx; 1354 1355 return rc; 1356 } 1357 1358 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info, 1359 u16 sb_id) 1360 { 1361 if (sb_info->sb_virt) { 1362 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id, 1363 QED_SB_TYPE_L2_QUEUE); 1364 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), 1365 (void *)sb_info->sb_virt, sb_info->sb_phys); 1366 memset(sb_info, 0, sizeof(*sb_info)); 1367 } 1368 } 1369 1370 /* This function allocates fast-path status block memory */ 1371 static int qede_alloc_mem_sb(struct qede_dev *edev, 1372 struct qed_sb_info *sb_info, u16 sb_id) 1373 { 1374 struct status_block_e4 *sb_virt; 1375 dma_addr_t sb_phys; 1376 int rc; 1377 1378 sb_virt = dma_alloc_coherent(&edev->pdev->dev, 1379 sizeof(*sb_virt), &sb_phys, GFP_KERNEL); 1380 if (!sb_virt) { 1381 DP_ERR(edev, "Status block allocation failed\n"); 1382 return -ENOMEM; 1383 } 1384 1385 rc = edev->ops->common->sb_init(edev->cdev, sb_info, 1386 sb_virt, sb_phys, sb_id, 1387 QED_SB_TYPE_L2_QUEUE); 1388 if (rc) { 1389 DP_ERR(edev, "Status block initialization failed\n"); 1390 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), 1391 sb_virt, sb_phys); 1392 return rc; 1393 } 1394 1395 return 0; 1396 } 1397 1398 static void qede_free_rx_buffers(struct qede_dev *edev, 1399 struct qede_rx_queue *rxq) 1400 { 1401 u16 i; 1402 1403 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { 1404 struct sw_rx_data *rx_buf; 1405 struct page *data; 1406 1407 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; 1408 data = rx_buf->data; 1409 1410 dma_unmap_page(&edev->pdev->dev, 1411 rx_buf->mapping, PAGE_SIZE, rxq->data_direction); 1412 1413 rx_buf->data = NULL; 1414 __free_page(data); 1415 } 1416 } 1417 1418 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1419 { 1420 /* Free rx buffers */ 1421 qede_free_rx_buffers(edev, rxq); 1422 1423 /* Free the parallel SW ring */ 1424 kfree(rxq->sw_rx_ring); 1425 1426 /* Free the real RQ ring used by FW */ 1427 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); 1428 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); 1429 } 1430 1431 static void qede_set_tpa_param(struct qede_rx_queue *rxq) 1432 { 1433 int i; 1434 1435 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { 1436 struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; 1437 1438 tpa_info->state = QEDE_AGG_STATE_NONE; 1439 } 1440 } 1441 1442 /* This function allocates all memory needed per Rx queue */ 1443 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq) 1444 { 1445 struct qed_chain_init_params params = { 1446 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1447 .num_elems = RX_RING_SIZE, 1448 }; 1449 struct qed_dev *cdev = edev->cdev; 1450 int i, rc, size; 1451 1452 rxq->num_rx_buffers = edev->q_num_rx_buffers; 1453 1454 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu; 1455 1456 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD; 1457 size = rxq->rx_headroom + 1458 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 1459 1460 /* Make sure that the headroom and payload fit in a single page */ 1461 if (rxq->rx_buf_size + size > PAGE_SIZE) 1462 rxq->rx_buf_size = PAGE_SIZE - size; 1463 1464 /* Segment size to split a page in multiple equal parts, 1465 * unless XDP is used in which case we'd use the entire page. 1466 */ 1467 if (!edev->xdp_prog) { 1468 size = size + rxq->rx_buf_size; 1469 rxq->rx_buf_seg_size = roundup_pow_of_two(size); 1470 } else { 1471 rxq->rx_buf_seg_size = PAGE_SIZE; 1472 edev->ndev->features &= ~NETIF_F_GRO_HW; 1473 } 1474 1475 /* Allocate the parallel driver ring for Rx buffers */ 1476 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; 1477 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); 1478 if (!rxq->sw_rx_ring) { 1479 DP_ERR(edev, "Rx buffers ring allocation failed\n"); 1480 rc = -ENOMEM; 1481 goto err; 1482 } 1483 1484 /* Allocate FW Rx ring */ 1485 params.mode = QED_CHAIN_MODE_NEXT_PTR; 1486 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE; 1487 params.elem_size = sizeof(struct eth_rx_bd); 1488 1489 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms); 1490 if (rc) 1491 goto err; 1492 1493 /* Allocate FW completion ring */ 1494 params.mode = QED_CHAIN_MODE_PBL; 1495 params.intended_use = QED_CHAIN_USE_TO_CONSUME; 1496 params.elem_size = sizeof(union eth_rx_cqe); 1497 1498 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms); 1499 if (rc) 1500 goto err; 1501 1502 /* Allocate buffers for the Rx ring */ 1503 rxq->filled_buffers = 0; 1504 for (i = 0; i < rxq->num_rx_buffers; i++) { 1505 rc = qede_alloc_rx_buffer(rxq, false); 1506 if (rc) { 1507 DP_ERR(edev, 1508 "Rx buffers allocation failed at index %d\n", i); 1509 goto err; 1510 } 1511 } 1512 1513 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW); 1514 if (!edev->gro_disable) 1515 qede_set_tpa_param(rxq); 1516 err: 1517 return rc; 1518 } 1519 1520 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1521 { 1522 /* Free the parallel SW ring */ 1523 if (txq->is_xdp) 1524 kfree(txq->sw_tx_ring.xdp); 1525 else 1526 kfree(txq->sw_tx_ring.skbs); 1527 1528 /* Free the real RQ ring used by FW */ 1529 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); 1530 } 1531 1532 /* This function allocates all memory needed per Tx queue */ 1533 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq) 1534 { 1535 struct qed_chain_init_params params = { 1536 .mode = QED_CHAIN_MODE_PBL, 1537 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE, 1538 .cnt_type = QED_CHAIN_CNT_TYPE_U16, 1539 .num_elems = edev->q_num_tx_buffers, 1540 .elem_size = sizeof(union eth_tx_bd_types), 1541 }; 1542 int size, rc; 1543 1544 txq->num_tx_buffers = edev->q_num_tx_buffers; 1545 1546 /* Allocate the parallel driver ring for Tx buffers */ 1547 if (txq->is_xdp) { 1548 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers; 1549 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL); 1550 if (!txq->sw_tx_ring.xdp) 1551 goto err; 1552 } else { 1553 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers; 1554 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL); 1555 if (!txq->sw_tx_ring.skbs) 1556 goto err; 1557 } 1558 1559 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms); 1560 if (rc) 1561 goto err; 1562 1563 return 0; 1564 1565 err: 1566 qede_free_mem_txq(edev, txq); 1567 return -ENOMEM; 1568 } 1569 1570 /* This function frees all memory of a single fp */ 1571 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1572 { 1573 qede_free_mem_sb(edev, fp->sb_info, fp->id); 1574 1575 if (fp->type & QEDE_FASTPATH_RX) 1576 qede_free_mem_rxq(edev, fp->rxq); 1577 1578 if (fp->type & QEDE_FASTPATH_XDP) 1579 qede_free_mem_txq(edev, fp->xdp_tx); 1580 1581 if (fp->type & QEDE_FASTPATH_TX) { 1582 int cos; 1583 1584 for_each_cos_in_txq(edev, cos) 1585 qede_free_mem_txq(edev, &fp->txq[cos]); 1586 } 1587 } 1588 1589 /* This function allocates all memory needed for a single fp (i.e. an entity 1590 * which contains status block, one rx queue and/or multiple per-TC tx queues. 1591 */ 1592 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp) 1593 { 1594 int rc = 0; 1595 1596 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id); 1597 if (rc) 1598 goto out; 1599 1600 if (fp->type & QEDE_FASTPATH_RX) { 1601 rc = qede_alloc_mem_rxq(edev, fp->rxq); 1602 if (rc) 1603 goto out; 1604 } 1605 1606 if (fp->type & QEDE_FASTPATH_XDP) { 1607 rc = qede_alloc_mem_txq(edev, fp->xdp_tx); 1608 if (rc) 1609 goto out; 1610 } 1611 1612 if (fp->type & QEDE_FASTPATH_TX) { 1613 int cos; 1614 1615 for_each_cos_in_txq(edev, cos) { 1616 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]); 1617 if (rc) 1618 goto out; 1619 } 1620 } 1621 1622 out: 1623 return rc; 1624 } 1625 1626 static void qede_free_mem_load(struct qede_dev *edev) 1627 { 1628 int i; 1629 1630 for_each_queue(i) { 1631 struct qede_fastpath *fp = &edev->fp_array[i]; 1632 1633 qede_free_mem_fp(edev, fp); 1634 } 1635 } 1636 1637 /* This function allocates all qede memory at NIC load. */ 1638 static int qede_alloc_mem_load(struct qede_dev *edev) 1639 { 1640 int rc = 0, queue_id; 1641 1642 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) { 1643 struct qede_fastpath *fp = &edev->fp_array[queue_id]; 1644 1645 rc = qede_alloc_mem_fp(edev, fp); 1646 if (rc) { 1647 DP_ERR(edev, 1648 "Failed to allocate memory for fastpath - rss id = %d\n", 1649 queue_id); 1650 qede_free_mem_load(edev); 1651 return rc; 1652 } 1653 } 1654 1655 return 0; 1656 } 1657 1658 static void qede_empty_tx_queue(struct qede_dev *edev, 1659 struct qede_tx_queue *txq) 1660 { 1661 unsigned int pkts_compl = 0, bytes_compl = 0; 1662 struct netdev_queue *netdev_txq; 1663 int rc, len = 0; 1664 1665 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 1666 1667 while (qed_chain_get_cons_idx(&txq->tx_pbl) != 1668 qed_chain_get_prod_idx(&txq->tx_pbl)) { 1669 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, 1670 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1671 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl), 1672 qed_chain_get_prod_idx(&txq->tx_pbl)); 1673 1674 rc = qede_free_tx_pkt(edev, txq, &len); 1675 if (rc) { 1676 DP_NOTICE(edev, 1677 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n", 1678 txq->index, 1679 qed_chain_get_cons_idx(&txq->tx_pbl), 1680 qed_chain_get_prod_idx(&txq->tx_pbl)); 1681 break; 1682 } 1683 1684 bytes_compl += len; 1685 pkts_compl++; 1686 txq->sw_tx_cons++; 1687 } 1688 1689 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); 1690 } 1691 1692 static void qede_empty_tx_queues(struct qede_dev *edev) 1693 { 1694 int i; 1695 1696 for_each_queue(i) 1697 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1698 int cos; 1699 1700 for_each_cos_in_txq(edev, cos) { 1701 struct qede_fastpath *fp; 1702 1703 fp = &edev->fp_array[i]; 1704 qede_empty_tx_queue(edev, 1705 &fp->txq[cos]); 1706 } 1707 } 1708 } 1709 1710 /* This function inits fp content and resets the SB, RXQ and TXQ structures */ 1711 static void qede_init_fp(struct qede_dev *edev) 1712 { 1713 int queue_id, rxq_index = 0, txq_index = 0; 1714 struct qede_fastpath *fp; 1715 bool init_xdp = false; 1716 1717 for_each_queue(queue_id) { 1718 fp = &edev->fp_array[queue_id]; 1719 1720 fp->edev = edev; 1721 fp->id = queue_id; 1722 1723 if (fp->type & QEDE_FASTPATH_XDP) { 1724 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev, 1725 rxq_index); 1726 fp->xdp_tx->is_xdp = 1; 1727 1728 spin_lock_init(&fp->xdp_tx->xdp_tx_lock); 1729 init_xdp = true; 1730 } 1731 1732 if (fp->type & QEDE_FASTPATH_RX) { 1733 fp->rxq->rxq_id = rxq_index++; 1734 1735 /* Determine how to map buffers for this queue */ 1736 if (fp->type & QEDE_FASTPATH_XDP) 1737 fp->rxq->data_direction = DMA_BIDIRECTIONAL; 1738 else 1739 fp->rxq->data_direction = DMA_FROM_DEVICE; 1740 fp->rxq->dev = &edev->pdev->dev; 1741 1742 /* Driver have no error path from here */ 1743 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev, 1744 fp->rxq->rxq_id) < 0); 1745 1746 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq, 1747 MEM_TYPE_PAGE_ORDER0, 1748 NULL)) { 1749 DP_NOTICE(edev, 1750 "Failed to register XDP memory model\n"); 1751 } 1752 } 1753 1754 if (fp->type & QEDE_FASTPATH_TX) { 1755 int cos; 1756 1757 for_each_cos_in_txq(edev, cos) { 1758 struct qede_tx_queue *txq = &fp->txq[cos]; 1759 u16 ndev_tx_id; 1760 1761 txq->cos = cos; 1762 txq->index = txq_index; 1763 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq); 1764 txq->ndev_txq_id = ndev_tx_id; 1765 1766 if (edev->dev_info.is_legacy) 1767 txq->is_legacy = true; 1768 txq->dev = &edev->pdev->dev; 1769 } 1770 1771 txq_index++; 1772 } 1773 1774 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", 1775 edev->ndev->name, queue_id); 1776 } 1777 1778 if (init_xdp) { 1779 edev->total_xdp_queues = QEDE_RSS_COUNT(edev); 1780 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues); 1781 } 1782 } 1783 1784 static int qede_set_real_num_queues(struct qede_dev *edev) 1785 { 1786 int rc = 0; 1787 1788 rc = netif_set_real_num_tx_queues(edev->ndev, 1789 QEDE_TSS_COUNT(edev) * 1790 edev->dev_info.num_tc); 1791 if (rc) { 1792 DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); 1793 return rc; 1794 } 1795 1796 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev)); 1797 if (rc) { 1798 DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); 1799 return rc; 1800 } 1801 1802 return 0; 1803 } 1804 1805 static void qede_napi_disable_remove(struct qede_dev *edev) 1806 { 1807 int i; 1808 1809 for_each_queue(i) { 1810 napi_disable(&edev->fp_array[i].napi); 1811 1812 netif_napi_del(&edev->fp_array[i].napi); 1813 } 1814 } 1815 1816 static void qede_napi_add_enable(struct qede_dev *edev) 1817 { 1818 int i; 1819 1820 /* Add NAPI objects */ 1821 for_each_queue(i) { 1822 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, 1823 qede_poll, NAPI_POLL_WEIGHT); 1824 napi_enable(&edev->fp_array[i].napi); 1825 } 1826 } 1827 1828 static void qede_sync_free_irqs(struct qede_dev *edev) 1829 { 1830 int i; 1831 1832 for (i = 0; i < edev->int_info.used_cnt; i++) { 1833 if (edev->int_info.msix_cnt) { 1834 synchronize_irq(edev->int_info.msix[i].vector); 1835 free_irq(edev->int_info.msix[i].vector, 1836 &edev->fp_array[i]); 1837 } else { 1838 edev->ops->common->simd_handler_clean(edev->cdev, i); 1839 } 1840 } 1841 1842 edev->int_info.used_cnt = 0; 1843 } 1844 1845 static int qede_req_msix_irqs(struct qede_dev *edev) 1846 { 1847 int i, rc; 1848 1849 /* Sanitize number of interrupts == number of prepared RSS queues */ 1850 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) { 1851 DP_ERR(edev, 1852 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", 1853 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt); 1854 return -EINVAL; 1855 } 1856 1857 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 1858 #ifdef CONFIG_RFS_ACCEL 1859 struct qede_fastpath *fp = &edev->fp_array[i]; 1860 1861 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) { 1862 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap, 1863 edev->int_info.msix[i].vector); 1864 if (rc) { 1865 DP_ERR(edev, "Failed to add CPU rmap\n"); 1866 qede_free_arfs(edev); 1867 } 1868 } 1869 #endif 1870 rc = request_irq(edev->int_info.msix[i].vector, 1871 qede_msix_fp_int, 0, edev->fp_array[i].name, 1872 &edev->fp_array[i]); 1873 if (rc) { 1874 DP_ERR(edev, "Request fp %d irq failed\n", i); 1875 qede_sync_free_irqs(edev); 1876 return rc; 1877 } 1878 DP_VERBOSE(edev, NETIF_MSG_INTR, 1879 "Requested fp irq for %s [entry %d]. Cookie is at %p\n", 1880 edev->fp_array[i].name, i, 1881 &edev->fp_array[i]); 1882 edev->int_info.used_cnt++; 1883 } 1884 1885 return 0; 1886 } 1887 1888 static void qede_simd_fp_handler(void *cookie) 1889 { 1890 struct qede_fastpath *fp = (struct qede_fastpath *)cookie; 1891 1892 napi_schedule_irqoff(&fp->napi); 1893 } 1894 1895 static int qede_setup_irqs(struct qede_dev *edev) 1896 { 1897 int i, rc = 0; 1898 1899 /* Learn Interrupt configuration */ 1900 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); 1901 if (rc) 1902 return rc; 1903 1904 if (edev->int_info.msix_cnt) { 1905 rc = qede_req_msix_irqs(edev); 1906 if (rc) 1907 return rc; 1908 edev->ndev->irq = edev->int_info.msix[0].vector; 1909 } else { 1910 const struct qed_common_ops *ops; 1911 1912 /* qed should learn receive the RSS ids and callbacks */ 1913 ops = edev->ops->common; 1914 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) 1915 ops->simd_handler_config(edev->cdev, 1916 &edev->fp_array[i], i, 1917 qede_simd_fp_handler); 1918 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev); 1919 } 1920 return 0; 1921 } 1922 1923 static int qede_drain_txq(struct qede_dev *edev, 1924 struct qede_tx_queue *txq, bool allow_drain) 1925 { 1926 int rc, cnt = 1000; 1927 1928 while (txq->sw_tx_cons != txq->sw_tx_prod) { 1929 if (!cnt) { 1930 if (allow_drain) { 1931 DP_NOTICE(edev, 1932 "Tx queue[%d] is stuck, requesting MCP to drain\n", 1933 txq->index); 1934 rc = edev->ops->common->drain(edev->cdev); 1935 if (rc) 1936 return rc; 1937 return qede_drain_txq(edev, txq, false); 1938 } 1939 DP_NOTICE(edev, 1940 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", 1941 txq->index, txq->sw_tx_prod, 1942 txq->sw_tx_cons); 1943 return -ENODEV; 1944 } 1945 cnt--; 1946 usleep_range(1000, 2000); 1947 barrier(); 1948 } 1949 1950 /* FW finished processing, wait for HW to transmit all tx packets */ 1951 usleep_range(1000, 2000); 1952 1953 return 0; 1954 } 1955 1956 static int qede_stop_txq(struct qede_dev *edev, 1957 struct qede_tx_queue *txq, int rss_id) 1958 { 1959 /* delete doorbell from doorbell recovery mechanism */ 1960 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr, 1961 &txq->tx_db); 1962 1963 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle); 1964 } 1965 1966 static int qede_stop_queues(struct qede_dev *edev) 1967 { 1968 struct qed_update_vport_params *vport_update_params; 1969 struct qed_dev *cdev = edev->cdev; 1970 struct qede_fastpath *fp; 1971 int rc, i; 1972 1973 /* Disable the vport */ 1974 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1975 if (!vport_update_params) 1976 return -ENOMEM; 1977 1978 vport_update_params->vport_id = 0; 1979 vport_update_params->update_vport_active_flg = 1; 1980 vport_update_params->vport_active_flg = 0; 1981 vport_update_params->update_rss_flg = 0; 1982 1983 rc = edev->ops->vport_update(cdev, vport_update_params); 1984 vfree(vport_update_params); 1985 1986 if (rc) { 1987 DP_ERR(edev, "Failed to update vport\n"); 1988 return rc; 1989 } 1990 1991 /* Flush Tx queues. If needed, request drain from MCP */ 1992 for_each_queue(i) { 1993 fp = &edev->fp_array[i]; 1994 1995 if (fp->type & QEDE_FASTPATH_TX) { 1996 int cos; 1997 1998 for_each_cos_in_txq(edev, cos) { 1999 rc = qede_drain_txq(edev, &fp->txq[cos], true); 2000 if (rc) 2001 return rc; 2002 } 2003 } 2004 2005 if (fp->type & QEDE_FASTPATH_XDP) { 2006 rc = qede_drain_txq(edev, fp->xdp_tx, true); 2007 if (rc) 2008 return rc; 2009 } 2010 } 2011 2012 /* Stop all Queues in reverse order */ 2013 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) { 2014 fp = &edev->fp_array[i]; 2015 2016 /* Stop the Tx Queue(s) */ 2017 if (fp->type & QEDE_FASTPATH_TX) { 2018 int cos; 2019 2020 for_each_cos_in_txq(edev, cos) { 2021 rc = qede_stop_txq(edev, &fp->txq[cos], i); 2022 if (rc) 2023 return rc; 2024 } 2025 } 2026 2027 /* Stop the Rx Queue */ 2028 if (fp->type & QEDE_FASTPATH_RX) { 2029 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle); 2030 if (rc) { 2031 DP_ERR(edev, "Failed to stop RXQ #%d\n", i); 2032 return rc; 2033 } 2034 } 2035 2036 /* Stop the XDP forwarding queue */ 2037 if (fp->type & QEDE_FASTPATH_XDP) { 2038 rc = qede_stop_txq(edev, fp->xdp_tx, i); 2039 if (rc) 2040 return rc; 2041 2042 bpf_prog_put(fp->rxq->xdp_prog); 2043 } 2044 } 2045 2046 /* Stop the vport */ 2047 rc = edev->ops->vport_stop(cdev, 0); 2048 if (rc) 2049 DP_ERR(edev, "Failed to stop VPORT\n"); 2050 2051 return rc; 2052 } 2053 2054 static int qede_start_txq(struct qede_dev *edev, 2055 struct qede_fastpath *fp, 2056 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx) 2057 { 2058 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl); 2059 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl); 2060 struct qed_queue_start_common_params params; 2061 struct qed_txq_start_ret_params ret_params; 2062 int rc; 2063 2064 memset(¶ms, 0, sizeof(params)); 2065 memset(&ret_params, 0, sizeof(ret_params)); 2066 2067 /* Let the XDP queue share the queue-zone with one of the regular txq. 2068 * We don't really care about its coalescing. 2069 */ 2070 if (txq->is_xdp) 2071 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq); 2072 else 2073 params.queue_id = txq->index; 2074 2075 params.p_sb = fp->sb_info; 2076 params.sb_idx = sb_idx; 2077 params.tc = txq->cos; 2078 2079 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table, 2080 page_cnt, &ret_params); 2081 if (rc) { 2082 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc); 2083 return rc; 2084 } 2085 2086 txq->doorbell_addr = ret_params.p_doorbell; 2087 txq->handle = ret_params.p_handle; 2088 2089 /* Determine the FW consumer address associated */ 2090 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx]; 2091 2092 /* Prepare the doorbell parameters */ 2093 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM); 2094 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET); 2095 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL, 2096 DQ_XCM_ETH_TX_BD_PROD_CMD); 2097 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; 2098 2099 /* register doorbell with doorbell recovery mechanism */ 2100 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr, 2101 &txq->tx_db, DB_REC_WIDTH_32B, 2102 DB_REC_KERNEL); 2103 2104 return rc; 2105 } 2106 2107 static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 2108 { 2109 int vlan_removal_en = 1; 2110 struct qed_dev *cdev = edev->cdev; 2111 struct qed_dev_info *qed_info = &edev->dev_info.common; 2112 struct qed_update_vport_params *vport_update_params; 2113 struct qed_queue_start_common_params q_params; 2114 struct qed_start_vport_params start = {0}; 2115 int rc, i; 2116 2117 if (!edev->num_queues) { 2118 DP_ERR(edev, 2119 "Cannot update V-VPORT as active as there are no Rx queues\n"); 2120 return -EINVAL; 2121 } 2122 2123 vport_update_params = vzalloc(sizeof(*vport_update_params)); 2124 if (!vport_update_params) 2125 return -ENOMEM; 2126 2127 start.handle_ptp_pkts = !!(edev->ptp); 2128 start.gro_enable = !edev->gro_disable; 2129 start.mtu = edev->ndev->mtu; 2130 start.vport_id = 0; 2131 start.drop_ttl0 = true; 2132 start.remove_inner_vlan = vlan_removal_en; 2133 start.clear_stats = clear_stats; 2134 2135 rc = edev->ops->vport_start(cdev, &start); 2136 2137 if (rc) { 2138 DP_ERR(edev, "Start V-PORT failed %d\n", rc); 2139 goto out; 2140 } 2141 2142 DP_VERBOSE(edev, NETIF_MSG_IFUP, 2143 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", 2144 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); 2145 2146 for_each_queue(i) { 2147 struct qede_fastpath *fp = &edev->fp_array[i]; 2148 dma_addr_t p_phys_table; 2149 u32 page_cnt; 2150 2151 if (fp->type & QEDE_FASTPATH_RX) { 2152 struct qed_rxq_start_ret_params ret_params; 2153 struct qede_rx_queue *rxq = fp->rxq; 2154 __le16 *val; 2155 2156 memset(&ret_params, 0, sizeof(ret_params)); 2157 memset(&q_params, 0, sizeof(q_params)); 2158 q_params.queue_id = rxq->rxq_id; 2159 q_params.vport_id = 0; 2160 q_params.p_sb = fp->sb_info; 2161 q_params.sb_idx = RX_PI; 2162 2163 p_phys_table = 2164 qed_chain_get_pbl_phys(&rxq->rx_comp_ring); 2165 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring); 2166 2167 rc = edev->ops->q_rx_start(cdev, i, &q_params, 2168 rxq->rx_buf_size, 2169 rxq->rx_bd_ring.p_phys_addr, 2170 p_phys_table, 2171 page_cnt, &ret_params); 2172 if (rc) { 2173 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, 2174 rc); 2175 goto out; 2176 } 2177 2178 /* Use the return parameters */ 2179 rxq->hw_rxq_prod_addr = ret_params.p_prod; 2180 rxq->handle = ret_params.p_handle; 2181 2182 val = &fp->sb_info->sb_virt->pi_array[RX_PI]; 2183 rxq->hw_cons_ptr = val; 2184 2185 qede_update_rx_prod(edev, rxq); 2186 } 2187 2188 if (fp->type & QEDE_FASTPATH_XDP) { 2189 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI); 2190 if (rc) 2191 goto out; 2192 2193 bpf_prog_add(edev->xdp_prog, 1); 2194 fp->rxq->xdp_prog = edev->xdp_prog; 2195 } 2196 2197 if (fp->type & QEDE_FASTPATH_TX) { 2198 int cos; 2199 2200 for_each_cos_in_txq(edev, cos) { 2201 rc = qede_start_txq(edev, fp, &fp->txq[cos], i, 2202 TX_PI(cos)); 2203 if (rc) 2204 goto out; 2205 } 2206 } 2207 } 2208 2209 /* Prepare and send the vport enable */ 2210 vport_update_params->vport_id = start.vport_id; 2211 vport_update_params->update_vport_active_flg = 1; 2212 vport_update_params->vport_active_flg = 1; 2213 2214 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && 2215 qed_info->tx_switching) { 2216 vport_update_params->update_tx_switching_flg = 1; 2217 vport_update_params->tx_switching_flg = 1; 2218 } 2219 2220 qede_fill_rss_params(edev, &vport_update_params->rss_params, 2221 &vport_update_params->update_rss_flg); 2222 2223 rc = edev->ops->vport_update(cdev, vport_update_params); 2224 if (rc) 2225 DP_ERR(edev, "Update V-PORT failed %d\n", rc); 2226 2227 out: 2228 vfree(vport_update_params); 2229 return rc; 2230 } 2231 2232 enum qede_unload_mode { 2233 QEDE_UNLOAD_NORMAL, 2234 QEDE_UNLOAD_RECOVERY, 2235 }; 2236 2237 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode, 2238 bool is_locked) 2239 { 2240 struct qed_link_params link_params; 2241 int rc; 2242 2243 DP_INFO(edev, "Starting qede unload\n"); 2244 2245 if (!is_locked) 2246 __qede_lock(edev); 2247 2248 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2249 2250 if (mode != QEDE_UNLOAD_RECOVERY) 2251 edev->state = QEDE_STATE_CLOSED; 2252 2253 qede_rdma_dev_event_close(edev); 2254 2255 /* Close OS Tx */ 2256 netif_tx_disable(edev->ndev); 2257 netif_carrier_off(edev->ndev); 2258 2259 if (mode != QEDE_UNLOAD_RECOVERY) { 2260 /* Reset the link */ 2261 memset(&link_params, 0, sizeof(link_params)); 2262 link_params.link_up = false; 2263 edev->ops->common->set_link(edev->cdev, &link_params); 2264 2265 rc = qede_stop_queues(edev); 2266 if (rc) { 2267 qede_sync_free_irqs(edev); 2268 goto out; 2269 } 2270 2271 DP_INFO(edev, "Stopped Queues\n"); 2272 } 2273 2274 qede_vlan_mark_nonconfigured(edev); 2275 edev->ops->fastpath_stop(edev->cdev); 2276 2277 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2278 qede_poll_for_freeing_arfs_filters(edev); 2279 qede_free_arfs(edev); 2280 } 2281 2282 /* Release the interrupts */ 2283 qede_sync_free_irqs(edev); 2284 edev->ops->common->set_fp_int(edev->cdev, 0); 2285 2286 qede_napi_disable_remove(edev); 2287 2288 if (mode == QEDE_UNLOAD_RECOVERY) 2289 qede_empty_tx_queues(edev); 2290 2291 qede_free_mem_load(edev); 2292 qede_free_fp_array(edev); 2293 2294 out: 2295 if (!is_locked) 2296 __qede_unlock(edev); 2297 2298 if (mode != QEDE_UNLOAD_RECOVERY) 2299 DP_NOTICE(edev, "Link is down\n"); 2300 2301 edev->ptp_skip_txts = 0; 2302 2303 DP_INFO(edev, "Ending qede unload\n"); 2304 } 2305 2306 enum qede_load_mode { 2307 QEDE_LOAD_NORMAL, 2308 QEDE_LOAD_RELOAD, 2309 QEDE_LOAD_RECOVERY, 2310 }; 2311 2312 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode, 2313 bool is_locked) 2314 { 2315 struct qed_link_params link_params; 2316 u8 num_tc; 2317 int rc; 2318 2319 DP_INFO(edev, "Starting qede load\n"); 2320 2321 if (!is_locked) 2322 __qede_lock(edev); 2323 2324 rc = qede_set_num_queues(edev); 2325 if (rc) 2326 goto out; 2327 2328 rc = qede_alloc_fp_array(edev); 2329 if (rc) 2330 goto out; 2331 2332 qede_init_fp(edev); 2333 2334 rc = qede_alloc_mem_load(edev); 2335 if (rc) 2336 goto err1; 2337 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n", 2338 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev)); 2339 2340 rc = qede_set_real_num_queues(edev); 2341 if (rc) 2342 goto err2; 2343 2344 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) { 2345 rc = qede_alloc_arfs(edev); 2346 if (rc) 2347 DP_NOTICE(edev, "aRFS memory allocation failed\n"); 2348 } 2349 2350 qede_napi_add_enable(edev); 2351 DP_INFO(edev, "Napi added and enabled\n"); 2352 2353 rc = qede_setup_irqs(edev); 2354 if (rc) 2355 goto err3; 2356 DP_INFO(edev, "Setup IRQs succeeded\n"); 2357 2358 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 2359 if (rc) 2360 goto err4; 2361 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); 2362 2363 num_tc = netdev_get_num_tc(edev->ndev); 2364 num_tc = num_tc ? num_tc : edev->dev_info.num_tc; 2365 qede_setup_tc(edev->ndev, num_tc); 2366 2367 /* Program un-configured VLANs */ 2368 qede_configure_vlan_filters(edev); 2369 2370 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags); 2371 2372 /* Ask for link-up using current configuration */ 2373 memset(&link_params, 0, sizeof(link_params)); 2374 link_params.link_up = true; 2375 edev->ops->common->set_link(edev->cdev, &link_params); 2376 2377 edev->state = QEDE_STATE_OPEN; 2378 2379 DP_INFO(edev, "Ending successfully qede load\n"); 2380 2381 goto out; 2382 err4: 2383 qede_sync_free_irqs(edev); 2384 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); 2385 err3: 2386 qede_napi_disable_remove(edev); 2387 err2: 2388 qede_free_mem_load(edev); 2389 err1: 2390 edev->ops->common->set_fp_int(edev->cdev, 0); 2391 qede_free_fp_array(edev); 2392 edev->num_queues = 0; 2393 edev->fp_num_tx = 0; 2394 edev->fp_num_rx = 0; 2395 out: 2396 if (!is_locked) 2397 __qede_unlock(edev); 2398 2399 return rc; 2400 } 2401 2402 /* 'func' should be able to run between unload and reload assuming interface 2403 * is actually running, or afterwards in case it's currently DOWN. 2404 */ 2405 void qede_reload(struct qede_dev *edev, 2406 struct qede_reload_args *args, bool is_locked) 2407 { 2408 if (!is_locked) 2409 __qede_lock(edev); 2410 2411 /* Since qede_lock is held, internal state wouldn't change even 2412 * if netdev state would start transitioning. Check whether current 2413 * internal configuration indicates device is up, then reload. 2414 */ 2415 if (edev->state == QEDE_STATE_OPEN) { 2416 qede_unload(edev, QEDE_UNLOAD_NORMAL, true); 2417 if (args) 2418 args->func(edev, args); 2419 qede_load(edev, QEDE_LOAD_RELOAD, true); 2420 2421 /* Since no one is going to do it for us, re-configure */ 2422 qede_config_rx_mode(edev->ndev); 2423 } else if (args) { 2424 args->func(edev, args); 2425 } 2426 2427 if (!is_locked) 2428 __qede_unlock(edev); 2429 } 2430 2431 /* called with rtnl_lock */ 2432 static int qede_open(struct net_device *ndev) 2433 { 2434 struct qede_dev *edev = netdev_priv(ndev); 2435 int rc; 2436 2437 netif_carrier_off(ndev); 2438 2439 edev->ops->common->set_power_state(edev->cdev, PCI_D0); 2440 2441 rc = qede_load(edev, QEDE_LOAD_NORMAL, false); 2442 if (rc) 2443 return rc; 2444 2445 udp_tunnel_nic_reset_ntf(ndev); 2446 2447 edev->ops->common->update_drv_state(edev->cdev, true); 2448 2449 return 0; 2450 } 2451 2452 static int qede_close(struct net_device *ndev) 2453 { 2454 struct qede_dev *edev = netdev_priv(ndev); 2455 2456 qede_unload(edev, QEDE_UNLOAD_NORMAL, false); 2457 2458 edev->ops->common->update_drv_state(edev->cdev, false); 2459 2460 return 0; 2461 } 2462 2463 static void qede_link_update(void *dev, struct qed_link_output *link) 2464 { 2465 struct qede_dev *edev = dev; 2466 2467 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) { 2468 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n"); 2469 return; 2470 } 2471 2472 if (link->link_up) { 2473 if (!netif_carrier_ok(edev->ndev)) { 2474 DP_NOTICE(edev, "Link is up\n"); 2475 netif_tx_start_all_queues(edev->ndev); 2476 netif_carrier_on(edev->ndev); 2477 qede_rdma_dev_event_open(edev); 2478 } 2479 } else { 2480 if (netif_carrier_ok(edev->ndev)) { 2481 DP_NOTICE(edev, "Link is down\n"); 2482 netif_tx_disable(edev->ndev); 2483 netif_carrier_off(edev->ndev); 2484 qede_rdma_dev_event_close(edev); 2485 } 2486 } 2487 } 2488 2489 static void qede_schedule_recovery_handler(void *dev) 2490 { 2491 struct qede_dev *edev = dev; 2492 2493 if (edev->state == QEDE_STATE_RECOVERY) { 2494 DP_NOTICE(edev, 2495 "Avoid scheduling a recovery handling since already in recovery state\n"); 2496 return; 2497 } 2498 2499 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags); 2500 schedule_delayed_work(&edev->sp_task, 0); 2501 2502 DP_INFO(edev, "Scheduled a recovery handler\n"); 2503 } 2504 2505 static void qede_recovery_failed(struct qede_dev *edev) 2506 { 2507 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n"); 2508 2509 netif_device_detach(edev->ndev); 2510 2511 if (edev->cdev) 2512 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot); 2513 } 2514 2515 static void qede_recovery_handler(struct qede_dev *edev) 2516 { 2517 u32 curr_state = edev->state; 2518 int rc; 2519 2520 DP_NOTICE(edev, "Starting a recovery process\n"); 2521 2522 /* No need to acquire first the qede_lock since is done by qede_sp_task 2523 * before calling this function. 2524 */ 2525 edev->state = QEDE_STATE_RECOVERY; 2526 2527 edev->ops->common->recovery_prolog(edev->cdev); 2528 2529 if (curr_state == QEDE_STATE_OPEN) 2530 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true); 2531 2532 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY); 2533 2534 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level, 2535 IS_VF(edev), QEDE_PROBE_RECOVERY); 2536 if (rc) { 2537 edev->cdev = NULL; 2538 goto err; 2539 } 2540 2541 if (curr_state == QEDE_STATE_OPEN) { 2542 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true); 2543 if (rc) 2544 goto err; 2545 2546 qede_config_rx_mode(edev->ndev); 2547 udp_tunnel_nic_reset_ntf(edev->ndev); 2548 } 2549 2550 edev->state = curr_state; 2551 2552 DP_NOTICE(edev, "Recovery handling is done\n"); 2553 2554 return; 2555 2556 err: 2557 qede_recovery_failed(edev); 2558 } 2559 2560 static void qede_atomic_hw_err_handler(struct qede_dev *edev) 2561 { 2562 struct qed_dev *cdev = edev->cdev; 2563 2564 DP_NOTICE(edev, 2565 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n", 2566 edev->err_flags); 2567 2568 /* Get a call trace of the flow that led to the error */ 2569 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags)); 2570 2571 /* Prevent HW attentions from being reasserted */ 2572 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags)) 2573 edev->ops->common->attn_clr_enable(cdev, true); 2574 2575 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n"); 2576 } 2577 2578 static void qede_generic_hw_err_handler(struct qede_dev *edev) 2579 { 2580 struct qed_dev *cdev = edev->cdev; 2581 2582 DP_NOTICE(edev, 2583 "Generic sleepable HW error handling started - err_flags 0x%lx\n", 2584 edev->err_flags); 2585 2586 /* Trigger a recovery process. 2587 * This is placed in the sleep requiring section just to make 2588 * sure it is the last one, and that all the other operations 2589 * were completed. 2590 */ 2591 if (test_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags)) 2592 edev->ops->common->recovery_process(cdev); 2593 2594 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2595 2596 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n"); 2597 } 2598 2599 static void qede_set_hw_err_flags(struct qede_dev *edev, 2600 enum qed_hw_err_type err_type) 2601 { 2602 unsigned long err_flags = 0; 2603 2604 switch (err_type) { 2605 case QED_HW_ERR_DMAE_FAIL: 2606 set_bit(QEDE_ERR_WARN, &err_flags); 2607 fallthrough; 2608 case QED_HW_ERR_MFW_RESP_FAIL: 2609 case QED_HW_ERR_HW_ATTN: 2610 case QED_HW_ERR_RAMROD_FAIL: 2611 case QED_HW_ERR_FW_ASSERT: 2612 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags); 2613 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags); 2614 break; 2615 2616 default: 2617 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type); 2618 break; 2619 } 2620 2621 edev->err_flags |= err_flags; 2622 } 2623 2624 static void qede_schedule_hw_err_handler(void *dev, 2625 enum qed_hw_err_type err_type) 2626 { 2627 struct qede_dev *edev = dev; 2628 2629 /* Fan failure cannot be masked by handling of another HW error or by a 2630 * concurrent recovery process. 2631 */ 2632 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) || 2633 edev->state == QEDE_STATE_RECOVERY) && 2634 err_type != QED_HW_ERR_FAN_FAIL) { 2635 DP_INFO(edev, 2636 "Avoid scheduling an error handling while another HW error is being handled\n"); 2637 return; 2638 } 2639 2640 if (err_type >= QED_HW_ERR_LAST) { 2641 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type); 2642 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags); 2643 return; 2644 } 2645 2646 qede_set_hw_err_flags(edev, err_type); 2647 qede_atomic_hw_err_handler(edev); 2648 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags); 2649 schedule_delayed_work(&edev->sp_task, 0); 2650 2651 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type); 2652 } 2653 2654 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq) 2655 { 2656 struct netdev_queue *netdev_txq; 2657 2658 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id); 2659 if (netif_xmit_stopped(netdev_txq)) 2660 return true; 2661 2662 return false; 2663 } 2664 2665 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 2666 { 2667 struct qede_dev *edev = dev; 2668 struct netdev_hw_addr *ha; 2669 int i; 2670 2671 if (edev->ndev->features & NETIF_F_IP_CSUM) 2672 data->feat_flags |= QED_TLV_IP_CSUM; 2673 if (edev->ndev->features & NETIF_F_TSO) 2674 data->feat_flags |= QED_TLV_LSO; 2675 2676 ether_addr_copy(data->mac[0], edev->ndev->dev_addr); 2677 eth_zero_addr(data->mac[1]); 2678 eth_zero_addr(data->mac[2]); 2679 /* Copy the first two UC macs */ 2680 netif_addr_lock_bh(edev->ndev); 2681 i = 1; 2682 netdev_for_each_uc_addr(ha, edev->ndev) { 2683 ether_addr_copy(data->mac[i++], ha->addr); 2684 if (i == QED_TLV_MAC_COUNT) 2685 break; 2686 } 2687 2688 netif_addr_unlock_bh(edev->ndev); 2689 } 2690 2691 static void qede_get_eth_tlv_data(void *dev, void *data) 2692 { 2693 struct qed_mfw_tlv_eth *etlv = data; 2694 struct qede_dev *edev = dev; 2695 struct qede_fastpath *fp; 2696 int i; 2697 2698 etlv->lso_maxoff_size = 0XFFFF; 2699 etlv->lso_maxoff_size_set = true; 2700 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN; 2701 etlv->lso_minseg_size_set = true; 2702 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC); 2703 etlv->prom_mode_set = true; 2704 etlv->tx_descr_size = QEDE_TSS_COUNT(edev); 2705 etlv->tx_descr_size_set = true; 2706 etlv->rx_descr_size = QEDE_RSS_COUNT(edev); 2707 etlv->rx_descr_size_set = true; 2708 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB; 2709 etlv->iov_offload_set = true; 2710 2711 /* Fill information regarding queues; Should be done under the qede 2712 * lock to guarantee those don't change beneath our feet. 2713 */ 2714 etlv->txqs_empty = true; 2715 etlv->rxqs_empty = true; 2716 etlv->num_txqs_full = 0; 2717 etlv->num_rxqs_full = 0; 2718 2719 __qede_lock(edev); 2720 for_each_queue(i) { 2721 fp = &edev->fp_array[i]; 2722 if (fp->type & QEDE_FASTPATH_TX) { 2723 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp); 2724 2725 if (txq->sw_tx_cons != txq->sw_tx_prod) 2726 etlv->txqs_empty = false; 2727 if (qede_is_txq_full(edev, txq)) 2728 etlv->num_txqs_full++; 2729 } 2730 if (fp->type & QEDE_FASTPATH_RX) { 2731 if (qede_has_rx_work(fp->rxq)) 2732 etlv->rxqs_empty = false; 2733 2734 /* This one is a bit tricky; Firmware might stop 2735 * placing packets if ring is not yet full. 2736 * Give an approximation. 2737 */ 2738 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) - 2739 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) > 2740 RX_RING_SIZE - 100) 2741 etlv->num_rxqs_full++; 2742 } 2743 } 2744 __qede_unlock(edev); 2745 2746 etlv->txqs_empty_set = true; 2747 etlv->rxqs_empty_set = true; 2748 etlv->num_txqs_full_set = true; 2749 etlv->num_rxqs_full_set = true; 2750 } 2751 2752 /** 2753 * qede_io_error_detected - called when PCI error is detected 2754 * @pdev: Pointer to PCI device 2755 * @state: The current pci connection state 2756 * 2757 * This function is called after a PCI bus error affecting 2758 * this device has been detected. 2759 */ 2760 static pci_ers_result_t 2761 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2762 { 2763 struct net_device *dev = pci_get_drvdata(pdev); 2764 struct qede_dev *edev = netdev_priv(dev); 2765 2766 if (!edev) 2767 return PCI_ERS_RESULT_NONE; 2768 2769 DP_NOTICE(edev, "IO error detected [%d]\n", state); 2770 2771 __qede_lock(edev); 2772 if (edev->state == QEDE_STATE_RECOVERY) { 2773 DP_NOTICE(edev, "Device already in the recovery state\n"); 2774 __qede_unlock(edev); 2775 return PCI_ERS_RESULT_NONE; 2776 } 2777 2778 /* PF handles the recovery of its VFs */ 2779 if (IS_VF(edev)) { 2780 DP_VERBOSE(edev, QED_MSG_IOV, 2781 "VF recovery is handled by its PF\n"); 2782 __qede_unlock(edev); 2783 return PCI_ERS_RESULT_RECOVERED; 2784 } 2785 2786 /* Close OS Tx */ 2787 netif_tx_disable(edev->ndev); 2788 netif_carrier_off(edev->ndev); 2789 2790 set_bit(QEDE_SP_AER, &edev->sp_flags); 2791 schedule_delayed_work(&edev->sp_task, 0); 2792 2793 __qede_unlock(edev); 2794 2795 return PCI_ERS_RESULT_CAN_RECOVER; 2796 } 2797