xref: /openbmc/linux/drivers/net/ethernet/qlogic/qede/qede_fp.c (revision e4781421e883340b796da5a724bda7226817990b)
1 /* QLogic qede NIC Driver
2  * Copyright (c) 2015-2017  QLogic Corporation
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and /or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 #include <linux/netdevice.h>
33 #include <linux/etherdevice.h>
34 #include <linux/skbuff.h>
35 #include <net/udp_tunnel.h>
36 #include <linux/ip.h>
37 #include <net/ipv6.h>
38 #include <net/tcp.h>
39 #include <linux/if_ether.h>
40 #include <linux/if_vlan.h>
41 #include <net/ip6_checksum.h>
42 
43 #include <linux/qed/qed_if.h>
44 #include "qede.h"
45 /*********************************
46  * Content also used by slowpath *
47  *********************************/
48 
49 int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy)
50 {
51 	struct sw_rx_data *sw_rx_data;
52 	struct eth_rx_bd *rx_bd;
53 	dma_addr_t mapping;
54 	struct page *data;
55 
56 	/* In case lazy-allocation is allowed, postpone allocation until the
57 	 * end of the NAPI run. We'd still need to make sure the Rx ring has
58 	 * sufficient buffers to guarantee an additional Rx interrupt.
59 	 */
60 	if (allow_lazy && likely(rxq->filled_buffers > 12)) {
61 		rxq->filled_buffers--;
62 		return 0;
63 	}
64 
65 	data = alloc_pages(GFP_ATOMIC, 0);
66 	if (unlikely(!data))
67 		return -ENOMEM;
68 
69 	/* Map the entire page as it would be used
70 	 * for multiple RX buffer segment size mapping.
71 	 */
72 	mapping = dma_map_page(rxq->dev, data, 0,
73 			       PAGE_SIZE, rxq->data_direction);
74 	if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
75 		__free_page(data);
76 		return -ENOMEM;
77 	}
78 
79 	sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
80 	sw_rx_data->page_offset = 0;
81 	sw_rx_data->data = data;
82 	sw_rx_data->mapping = mapping;
83 
84 	/* Advance PROD and get BD pointer */
85 	rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
86 	WARN_ON(!rx_bd);
87 	rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
88 	rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
89 
90 	rxq->sw_rx_prod++;
91 	rxq->filled_buffers++;
92 
93 	return 0;
94 }
95 
96 /* Unmap the data and free skb */
97 int qede_free_tx_pkt(struct qede_dev *edev, struct qede_tx_queue *txq, int *len)
98 {
99 	u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
100 	struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
101 	struct eth_tx_1st_bd *first_bd;
102 	struct eth_tx_bd *tx_data_bd;
103 	int bds_consumed = 0;
104 	int nbds;
105 	bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
106 	int i, split_bd_len = 0;
107 
108 	if (unlikely(!skb)) {
109 		DP_ERR(edev,
110 		       "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
111 		       idx, txq->sw_tx_cons, txq->sw_tx_prod);
112 		return -1;
113 	}
114 
115 	*len = skb->len;
116 
117 	first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
118 
119 	bds_consumed++;
120 
121 	nbds = first_bd->data.nbds;
122 
123 	if (data_split) {
124 		struct eth_tx_bd *split = (struct eth_tx_bd *)
125 			qed_chain_consume(&txq->tx_pbl);
126 		split_bd_len = BD_UNMAP_LEN(split);
127 		bds_consumed++;
128 	}
129 	dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
130 			 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
131 
132 	/* Unmap the data of the skb frags */
133 	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
134 		tx_data_bd = (struct eth_tx_bd *)
135 			qed_chain_consume(&txq->tx_pbl);
136 		dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
137 			       BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
138 	}
139 
140 	while (bds_consumed++ < nbds)
141 		qed_chain_consume(&txq->tx_pbl);
142 
143 	/* Free skb */
144 	dev_kfree_skb_any(skb);
145 	txq->sw_tx_ring.skbs[idx].skb = NULL;
146 	txq->sw_tx_ring.skbs[idx].flags = 0;
147 
148 	return 0;
149 }
150 
151 /* Unmap the data and free skb when mapping failed during start_xmit */
152 static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
153 				    struct eth_tx_1st_bd *first_bd,
154 				    int nbd, bool data_split)
155 {
156 	u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
157 	struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
158 	struct eth_tx_bd *tx_data_bd;
159 	int i, split_bd_len = 0;
160 
161 	/* Return prod to its position before this skb was handled */
162 	qed_chain_set_prod(&txq->tx_pbl,
163 			   le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
164 
165 	first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
166 
167 	if (data_split) {
168 		struct eth_tx_bd *split = (struct eth_tx_bd *)
169 					  qed_chain_produce(&txq->tx_pbl);
170 		split_bd_len = BD_UNMAP_LEN(split);
171 		nbd--;
172 	}
173 
174 	dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
175 			 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
176 
177 	/* Unmap the data of the skb frags */
178 	for (i = 0; i < nbd; i++) {
179 		tx_data_bd = (struct eth_tx_bd *)
180 			qed_chain_produce(&txq->tx_pbl);
181 		if (tx_data_bd->nbytes)
182 			dma_unmap_page(txq->dev,
183 				       BD_UNMAP_ADDR(tx_data_bd),
184 				       BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
185 	}
186 
187 	/* Return again prod to its position before this skb was handled */
188 	qed_chain_set_prod(&txq->tx_pbl,
189 			   le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
190 
191 	/* Free skb */
192 	dev_kfree_skb_any(skb);
193 	txq->sw_tx_ring.skbs[idx].skb = NULL;
194 	txq->sw_tx_ring.skbs[idx].flags = 0;
195 }
196 
197 static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
198 {
199 	u32 rc = XMIT_L4_CSUM;
200 	__be16 l3_proto;
201 
202 	if (skb->ip_summed != CHECKSUM_PARTIAL)
203 		return XMIT_PLAIN;
204 
205 	l3_proto = vlan_get_protocol(skb);
206 	if (l3_proto == htons(ETH_P_IPV6) &&
207 	    (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
208 		*ipv6_ext = 1;
209 
210 	if (skb->encapsulation) {
211 		rc |= XMIT_ENC;
212 		if (skb_is_gso(skb)) {
213 			unsigned short gso_type = skb_shinfo(skb)->gso_type;
214 
215 			if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
216 			    (gso_type & SKB_GSO_GRE_CSUM))
217 				rc |= XMIT_ENC_GSO_L4_CSUM;
218 
219 			rc |= XMIT_LSO;
220 			return rc;
221 		}
222 	}
223 
224 	if (skb_is_gso(skb))
225 		rc |= XMIT_LSO;
226 
227 	return rc;
228 }
229 
230 static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
231 					 struct eth_tx_2nd_bd *second_bd,
232 					 struct eth_tx_3rd_bd *third_bd)
233 {
234 	u8 l4_proto;
235 	u16 bd2_bits1 = 0, bd2_bits2 = 0;
236 
237 	bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
238 
239 	bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
240 		     ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
241 		    << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
242 
243 	bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
244 		      ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
245 
246 	if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
247 		l4_proto = ipv6_hdr(skb)->nexthdr;
248 	else
249 		l4_proto = ip_hdr(skb)->protocol;
250 
251 	if (l4_proto == IPPROTO_UDP)
252 		bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
253 
254 	if (third_bd)
255 		third_bd->data.bitfields |=
256 			cpu_to_le16(((tcp_hdrlen(skb) / 4) &
257 				ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
258 				ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
259 
260 	second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
261 	second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
262 }
263 
264 static int map_frag_to_bd(struct qede_tx_queue *txq,
265 			  skb_frag_t *frag, struct eth_tx_bd *bd)
266 {
267 	dma_addr_t mapping;
268 
269 	/* Map skb non-linear frag data for DMA */
270 	mapping = skb_frag_dma_map(txq->dev, frag, 0,
271 				   skb_frag_size(frag), DMA_TO_DEVICE);
272 	if (unlikely(dma_mapping_error(txq->dev, mapping)))
273 		return -ENOMEM;
274 
275 	/* Setup the data pointer of the frag data */
276 	BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
277 
278 	return 0;
279 }
280 
281 static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
282 {
283 	if (is_encap_pkt)
284 		return (skb_inner_transport_header(skb) +
285 			inner_tcp_hdrlen(skb) - skb->data);
286 	else
287 		return (skb_transport_header(skb) +
288 			tcp_hdrlen(skb) - skb->data);
289 }
290 
291 /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
292 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
293 static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
294 {
295 	int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
296 
297 	if (xmit_type & XMIT_LSO) {
298 		int hlen;
299 
300 		hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
301 
302 		/* linear payload would require its own BD */
303 		if (skb_headlen(skb) > hlen)
304 			allowed_frags--;
305 	}
306 
307 	return (skb_shinfo(skb)->nr_frags > allowed_frags);
308 }
309 #endif
310 
311 static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
312 {
313 	/* wmb makes sure that the BDs data is updated before updating the
314 	 * producer, otherwise FW may read old data from the BDs.
315 	 */
316 	wmb();
317 	barrier();
318 	writel(txq->tx_db.raw, txq->doorbell_addr);
319 
320 	/* mmiowb is needed to synchronize doorbell writes from more than one
321 	 * processor. It guarantees that the write arrives to the device before
322 	 * the queue lock is released and another start_xmit is called (possibly
323 	 * on another CPU). Without this barrier, the next doorbell can bypass
324 	 * this doorbell. This is applicable to IA64/Altix systems.
325 	 */
326 	mmiowb();
327 }
328 
329 static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
330 			 struct sw_rx_data *metadata, u16 padding, u16 length)
331 {
332 	struct qede_tx_queue *txq = fp->xdp_tx;
333 	u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
334 	struct eth_tx_1st_bd *first_bd;
335 
336 	if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
337 		txq->stopped_cnt++;
338 		return -ENOMEM;
339 	}
340 
341 	first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
342 
343 	memset(first_bd, 0, sizeof(*first_bd));
344 	first_bd->data.bd_flags.bitfields =
345 	    BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
346 	first_bd->data.bitfields |=
347 	    (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
348 	    ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
349 	first_bd->data.nbds = 1;
350 
351 	/* We can safely ignore the offset, as it's 0 for XDP */
352 	BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
353 
354 	/* Synchronize the buffer back to device, as program [probably]
355 	 * has changed it.
356 	 */
357 	dma_sync_single_for_device(&edev->pdev->dev,
358 				   metadata->mapping + padding,
359 				   length, PCI_DMA_TODEVICE);
360 
361 	txq->sw_tx_ring.pages[idx] = metadata->data;
362 	txq->sw_tx_prod++;
363 
364 	/* Mark the fastpath for future XDP doorbell */
365 	fp->xdp_xmit = 1;
366 
367 	return 0;
368 }
369 
370 int qede_txq_has_work(struct qede_tx_queue *txq)
371 {
372 	u16 hw_bd_cons;
373 
374 	/* Tell compiler that consumer and producer can change */
375 	barrier();
376 	hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
377 	if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
378 		return 0;
379 
380 	return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
381 }
382 
383 static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
384 {
385 	struct eth_tx_1st_bd *bd;
386 	u16 hw_bd_cons;
387 
388 	hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
389 	barrier();
390 
391 	while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
392 		bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
393 
394 		dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(bd),
395 				 PAGE_SIZE, DMA_BIDIRECTIONAL);
396 		__free_page(txq->sw_tx_ring.pages[txq->sw_tx_cons &
397 						  NUM_TX_BDS_MAX]);
398 
399 		txq->sw_tx_cons++;
400 		txq->xmit_pkts++;
401 	}
402 }
403 
404 static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
405 {
406 	struct netdev_queue *netdev_txq;
407 	u16 hw_bd_cons;
408 	unsigned int pkts_compl = 0, bytes_compl = 0;
409 	int rc;
410 
411 	netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
412 
413 	hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
414 	barrier();
415 
416 	while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
417 		int len = 0;
418 
419 		rc = qede_free_tx_pkt(edev, txq, &len);
420 		if (rc) {
421 			DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
422 				  hw_bd_cons,
423 				  qed_chain_get_cons_idx(&txq->tx_pbl));
424 			break;
425 		}
426 
427 		bytes_compl += len;
428 		pkts_compl++;
429 		txq->sw_tx_cons++;
430 		txq->xmit_pkts++;
431 	}
432 
433 	netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
434 
435 	/* Need to make the tx_bd_cons update visible to start_xmit()
436 	 * before checking for netif_tx_queue_stopped().  Without the
437 	 * memory barrier, there is a small possibility that
438 	 * start_xmit() will miss it and cause the queue to be stopped
439 	 * forever.
440 	 * On the other hand we need an rmb() here to ensure the proper
441 	 * ordering of bit testing in the following
442 	 * netif_tx_queue_stopped(txq) call.
443 	 */
444 	smp_mb();
445 
446 	if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
447 		/* Taking tx_lock is needed to prevent reenabling the queue
448 		 * while it's empty. This could have happen if rx_action() gets
449 		 * suspended in qede_tx_int() after the condition before
450 		 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
451 		 *
452 		 * stops the queue->sees fresh tx_bd_cons->releases the queue->
453 		 * sends some packets consuming the whole queue again->
454 		 * stops the queue
455 		 */
456 
457 		__netif_tx_lock(netdev_txq, smp_processor_id());
458 
459 		if ((netif_tx_queue_stopped(netdev_txq)) &&
460 		    (edev->state == QEDE_STATE_OPEN) &&
461 		    (qed_chain_get_elem_left(&txq->tx_pbl)
462 		      >= (MAX_SKB_FRAGS + 1))) {
463 			netif_tx_wake_queue(netdev_txq);
464 			DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
465 				   "Wake queue was called\n");
466 		}
467 
468 		__netif_tx_unlock(netdev_txq);
469 	}
470 
471 	return 0;
472 }
473 
474 bool qede_has_rx_work(struct qede_rx_queue *rxq)
475 {
476 	u16 hw_comp_cons, sw_comp_cons;
477 
478 	/* Tell compiler that status block fields can change */
479 	barrier();
480 
481 	hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
482 	sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
483 
484 	return hw_comp_cons != sw_comp_cons;
485 }
486 
487 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
488 {
489 	qed_chain_consume(&rxq->rx_bd_ring);
490 	rxq->sw_rx_cons++;
491 }
492 
493 /* This function reuses the buffer(from an offset) from
494  * consumer index to producer index in the bd ring
495  */
496 static inline void qede_reuse_page(struct qede_rx_queue *rxq,
497 				   struct sw_rx_data *curr_cons)
498 {
499 	struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
500 	struct sw_rx_data *curr_prod;
501 	dma_addr_t new_mapping;
502 
503 	curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
504 	*curr_prod = *curr_cons;
505 
506 	new_mapping = curr_prod->mapping + curr_prod->page_offset;
507 
508 	rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
509 	rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
510 
511 	rxq->sw_rx_prod++;
512 	curr_cons->data = NULL;
513 }
514 
515 /* In case of allocation failures reuse buffers
516  * from consumer index to produce buffers for firmware
517  */
518 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
519 {
520 	struct sw_rx_data *curr_cons;
521 
522 	for (; count > 0; count--) {
523 		curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
524 		qede_reuse_page(rxq, curr_cons);
525 		qede_rx_bd_ring_consume(rxq);
526 	}
527 }
528 
529 static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
530 					 struct sw_rx_data *curr_cons)
531 {
532 	/* Move to the next segment in the page */
533 	curr_cons->page_offset += rxq->rx_buf_seg_size;
534 
535 	if (curr_cons->page_offset == PAGE_SIZE) {
536 		if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
537 			/* Since we failed to allocate new buffer
538 			 * current buffer can be used again.
539 			 */
540 			curr_cons->page_offset -= rxq->rx_buf_seg_size;
541 
542 			return -ENOMEM;
543 		}
544 
545 		dma_unmap_page(rxq->dev, curr_cons->mapping,
546 			       PAGE_SIZE, rxq->data_direction);
547 	} else {
548 		/* Increment refcount of the page as we don't want
549 		 * network stack to take the ownership of the page
550 		 * which can be recycled multiple times by the driver.
551 		 */
552 		page_ref_inc(curr_cons->data);
553 		qede_reuse_page(rxq, curr_cons);
554 	}
555 
556 	return 0;
557 }
558 
559 void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
560 {
561 	u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
562 	u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
563 	struct eth_rx_prod_data rx_prods = {0};
564 
565 	/* Update producers */
566 	rx_prods.bd_prod = cpu_to_le16(bd_prod);
567 	rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
568 
569 	/* Make sure that the BD and SGE data is updated before updating the
570 	 * producers since FW might read the BD/SGE right after the producer
571 	 * is updated.
572 	 */
573 	wmb();
574 
575 	internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
576 			(u32 *)&rx_prods);
577 
578 	/* mmiowb is needed to synchronize doorbell writes from more than one
579 	 * processor. It guarantees that the write arrives to the device before
580 	 * the napi lock is released and another qede_poll is called (possibly
581 	 * on another CPU). Without this barrier, the next doorbell can bypass
582 	 * this doorbell. This is applicable to IA64/Altix systems.
583 	 */
584 	mmiowb();
585 }
586 
587 static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
588 {
589 	enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
590 	enum rss_hash_type htype;
591 	u32 hash = 0;
592 
593 	htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
594 	if (htype) {
595 		hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
596 			     (htype == RSS_HASH_TYPE_IPV6)) ?
597 			    PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
598 		hash = le32_to_cpu(rss_hash);
599 	}
600 	skb_set_hash(skb, hash, hash_type);
601 }
602 
603 static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
604 {
605 	skb_checksum_none_assert(skb);
606 
607 	if (csum_flag & QEDE_CSUM_UNNECESSARY)
608 		skb->ip_summed = CHECKSUM_UNNECESSARY;
609 
610 	if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) {
611 		skb->csum_level = 1;
612 		skb->encapsulation = 1;
613 	}
614 }
615 
616 static inline void qede_skb_receive(struct qede_dev *edev,
617 				    struct qede_fastpath *fp,
618 				    struct qede_rx_queue *rxq,
619 				    struct sk_buff *skb, u16 vlan_tag)
620 {
621 	if (vlan_tag)
622 		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
623 
624 	napi_gro_receive(&fp->napi, skb);
625 	rxq->rcv_pkts++;
626 }
627 
628 static void qede_set_gro_params(struct qede_dev *edev,
629 				struct sk_buff *skb,
630 				struct eth_fast_path_rx_tpa_start_cqe *cqe)
631 {
632 	u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
633 
634 	if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
635 	    PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
636 		skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
637 	else
638 		skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
639 
640 	skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
641 				    cqe->header_len;
642 }
643 
644 static int qede_fill_frag_skb(struct qede_dev *edev,
645 			      struct qede_rx_queue *rxq,
646 			      u8 tpa_agg_index, u16 len_on_bd)
647 {
648 	struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
649 							 NUM_RX_BDS_MAX];
650 	struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
651 	struct sk_buff *skb = tpa_info->skb;
652 
653 	if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
654 		goto out;
655 
656 	/* Add one frag and update the appropriate fields in the skb */
657 	skb_fill_page_desc(skb, tpa_info->frag_id++,
658 			   current_bd->data, current_bd->page_offset,
659 			   len_on_bd);
660 
661 	if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
662 		/* Incr page ref count to reuse on allocation failure
663 		 * so that it doesn't get freed while freeing SKB.
664 		 */
665 		page_ref_inc(current_bd->data);
666 		goto out;
667 	}
668 
669 	qed_chain_consume(&rxq->rx_bd_ring);
670 	rxq->sw_rx_cons++;
671 
672 	skb->data_len += len_on_bd;
673 	skb->truesize += rxq->rx_buf_seg_size;
674 	skb->len += len_on_bd;
675 
676 	return 0;
677 
678 out:
679 	tpa_info->state = QEDE_AGG_STATE_ERROR;
680 	qede_recycle_rx_bd_ring(rxq, 1);
681 
682 	return -ENOMEM;
683 }
684 
685 static bool qede_tunn_exist(u16 flag)
686 {
687 	return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
688 			  PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
689 }
690 
691 static u8 qede_check_tunn_csum(u16 flag)
692 {
693 	u16 csum_flag = 0;
694 	u8 tcsum = 0;
695 
696 	if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
697 		    PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
698 		csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
699 			     PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
700 
701 	if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
702 		    PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
703 		csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
704 			     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
705 		tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
706 	}
707 
708 	csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
709 		     PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
710 		     PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
711 		     PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
712 
713 	if (csum_flag & flag)
714 		return QEDE_CSUM_ERROR;
715 
716 	return QEDE_CSUM_UNNECESSARY | tcsum;
717 }
718 
719 static void qede_tpa_start(struct qede_dev *edev,
720 			   struct qede_rx_queue *rxq,
721 			   struct eth_fast_path_rx_tpa_start_cqe *cqe)
722 {
723 	struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
724 	struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
725 	struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
726 	struct sw_rx_data *replace_buf = &tpa_info->buffer;
727 	dma_addr_t mapping = tpa_info->buffer_mapping;
728 	struct sw_rx_data *sw_rx_data_cons;
729 	struct sw_rx_data *sw_rx_data_prod;
730 
731 	sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
732 	sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
733 
734 	/* Use pre-allocated replacement buffer - we can't release the agg.
735 	 * start until its over and we don't want to risk allocation failing
736 	 * here, so re-allocate when aggregation will be over.
737 	 */
738 	sw_rx_data_prod->mapping = replace_buf->mapping;
739 
740 	sw_rx_data_prod->data = replace_buf->data;
741 	rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
742 	rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
743 	sw_rx_data_prod->page_offset = replace_buf->page_offset;
744 
745 	rxq->sw_rx_prod++;
746 
747 	/* move partial skb from cons to pool (don't unmap yet)
748 	 * save mapping, incase we drop the packet later on.
749 	 */
750 	tpa_info->buffer = *sw_rx_data_cons;
751 	mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
752 			   le32_to_cpu(rx_bd_cons->addr.lo));
753 
754 	tpa_info->buffer_mapping = mapping;
755 	rxq->sw_rx_cons++;
756 
757 	/* set tpa state to start only if we are able to allocate skb
758 	 * for this aggregation, otherwise mark as error and aggregation will
759 	 * be dropped
760 	 */
761 	tpa_info->skb = netdev_alloc_skb(edev->ndev,
762 					 le16_to_cpu(cqe->len_on_first_bd));
763 	if (unlikely(!tpa_info->skb)) {
764 		DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
765 		tpa_info->state = QEDE_AGG_STATE_ERROR;
766 		goto cons_buf;
767 	}
768 
769 	/* Start filling in the aggregation info */
770 	skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
771 	tpa_info->frag_id = 0;
772 	tpa_info->state = QEDE_AGG_STATE_START;
773 
774 	/* Store some information from first CQE */
775 	tpa_info->start_cqe_placement_offset = cqe->placement_offset;
776 	tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
777 	if ((le16_to_cpu(cqe->pars_flags.flags) >>
778 	     PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
779 	    PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
780 		tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
781 	else
782 		tpa_info->vlan_tag = 0;
783 
784 	qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
785 
786 	/* This is needed in order to enable forwarding support */
787 	qede_set_gro_params(edev, tpa_info->skb, cqe);
788 
789 cons_buf: /* We still need to handle bd_len_list to consume buffers */
790 	if (likely(cqe->ext_bd_len_list[0]))
791 		qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
792 				   le16_to_cpu(cqe->ext_bd_len_list[0]));
793 
794 	if (unlikely(cqe->ext_bd_len_list[1])) {
795 		DP_ERR(edev,
796 		       "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
797 		tpa_info->state = QEDE_AGG_STATE_ERROR;
798 	}
799 }
800 
801 #ifdef CONFIG_INET
802 static void qede_gro_ip_csum(struct sk_buff *skb)
803 {
804 	const struct iphdr *iph = ip_hdr(skb);
805 	struct tcphdr *th;
806 
807 	skb_set_transport_header(skb, sizeof(struct iphdr));
808 	th = tcp_hdr(skb);
809 
810 	th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
811 				  iph->saddr, iph->daddr, 0);
812 
813 	tcp_gro_complete(skb);
814 }
815 
816 static void qede_gro_ipv6_csum(struct sk_buff *skb)
817 {
818 	struct ipv6hdr *iph = ipv6_hdr(skb);
819 	struct tcphdr *th;
820 
821 	skb_set_transport_header(skb, sizeof(struct ipv6hdr));
822 	th = tcp_hdr(skb);
823 
824 	th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
825 				  &iph->saddr, &iph->daddr, 0);
826 	tcp_gro_complete(skb);
827 }
828 #endif
829 
830 static void qede_gro_receive(struct qede_dev *edev,
831 			     struct qede_fastpath *fp,
832 			     struct sk_buff *skb,
833 			     u16 vlan_tag)
834 {
835 	/* FW can send a single MTU sized packet from gro flow
836 	 * due to aggregation timeout/last segment etc. which
837 	 * is not expected to be a gro packet. If a skb has zero
838 	 * frags then simply push it in the stack as non gso skb.
839 	 */
840 	if (unlikely(!skb->data_len)) {
841 		skb_shinfo(skb)->gso_type = 0;
842 		skb_shinfo(skb)->gso_size = 0;
843 		goto send_skb;
844 	}
845 
846 #ifdef CONFIG_INET
847 	if (skb_shinfo(skb)->gso_size) {
848 		skb_reset_network_header(skb);
849 
850 		switch (skb->protocol) {
851 		case htons(ETH_P_IP):
852 			qede_gro_ip_csum(skb);
853 			break;
854 		case htons(ETH_P_IPV6):
855 			qede_gro_ipv6_csum(skb);
856 			break;
857 		default:
858 			DP_ERR(edev,
859 			       "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
860 			       ntohs(skb->protocol));
861 		}
862 	}
863 #endif
864 
865 send_skb:
866 	skb_record_rx_queue(skb, fp->rxq->rxq_id);
867 	qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
868 }
869 
870 static inline void qede_tpa_cont(struct qede_dev *edev,
871 				 struct qede_rx_queue *rxq,
872 				 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
873 {
874 	int i;
875 
876 	for (i = 0; cqe->len_list[i]; i++)
877 		qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
878 				   le16_to_cpu(cqe->len_list[i]));
879 
880 	if (unlikely(i > 1))
881 		DP_ERR(edev,
882 		       "Strange - TPA cont with more than a single len_list entry\n");
883 }
884 
885 static void qede_tpa_end(struct qede_dev *edev,
886 			 struct qede_fastpath *fp,
887 			 struct eth_fast_path_rx_tpa_end_cqe *cqe)
888 {
889 	struct qede_rx_queue *rxq = fp->rxq;
890 	struct qede_agg_info *tpa_info;
891 	struct sk_buff *skb;
892 	int i;
893 
894 	tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
895 	skb = tpa_info->skb;
896 
897 	for (i = 0; cqe->len_list[i]; i++)
898 		qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
899 				   le16_to_cpu(cqe->len_list[i]));
900 	if (unlikely(i > 1))
901 		DP_ERR(edev,
902 		       "Strange - TPA emd with more than a single len_list entry\n");
903 
904 	if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
905 		goto err;
906 
907 	/* Sanity */
908 	if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
909 		DP_ERR(edev,
910 		       "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
911 		       cqe->num_of_bds, tpa_info->frag_id);
912 	if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
913 		DP_ERR(edev,
914 		       "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
915 		       le16_to_cpu(cqe->total_packet_len), skb->len);
916 
917 	memcpy(skb->data,
918 	       page_address(tpa_info->buffer.data) +
919 	       tpa_info->start_cqe_placement_offset +
920 	       tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
921 
922 	/* Finalize the SKB */
923 	skb->protocol = eth_type_trans(skb, edev->ndev);
924 	skb->ip_summed = CHECKSUM_UNNECESSARY;
925 
926 	/* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
927 	 * to skb_shinfo(skb)->gso_segs
928 	 */
929 	NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
930 
931 	qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
932 
933 	tpa_info->state = QEDE_AGG_STATE_NONE;
934 
935 	return;
936 err:
937 	tpa_info->state = QEDE_AGG_STATE_NONE;
938 	dev_kfree_skb_any(tpa_info->skb);
939 	tpa_info->skb = NULL;
940 }
941 
942 static u8 qede_check_notunn_csum(u16 flag)
943 {
944 	u16 csum_flag = 0;
945 	u8 csum = 0;
946 
947 	if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
948 		    PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
949 		csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
950 			     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
951 		csum = QEDE_CSUM_UNNECESSARY;
952 	}
953 
954 	csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
955 		     PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
956 
957 	if (csum_flag & flag)
958 		return QEDE_CSUM_ERROR;
959 
960 	return csum;
961 }
962 
963 static u8 qede_check_csum(u16 flag)
964 {
965 	if (!qede_tunn_exist(flag))
966 		return qede_check_notunn_csum(flag);
967 	else
968 		return qede_check_tunn_csum(flag);
969 }
970 
971 static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
972 				      u16 flag)
973 {
974 	u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
975 
976 	if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
977 			     ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
978 	    (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
979 		     PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
980 		return true;
981 
982 	return false;
983 }
984 
985 /* Return true iff packet is to be passed to stack */
986 static bool qede_rx_xdp(struct qede_dev *edev,
987 			struct qede_fastpath *fp,
988 			struct qede_rx_queue *rxq,
989 			struct bpf_prog *prog,
990 			struct sw_rx_data *bd,
991 			struct eth_fast_path_rx_reg_cqe *cqe)
992 {
993 	u16 len = le16_to_cpu(cqe->len_on_first_bd);
994 	struct xdp_buff xdp;
995 	enum xdp_action act;
996 
997 	xdp.data = page_address(bd->data) + cqe->placement_offset;
998 	xdp.data_end = xdp.data + len;
999 
1000 	/* Queues always have a full reset currently, so for the time
1001 	 * being until there's atomic program replace just mark read
1002 	 * side for map helpers.
1003 	 */
1004 	rcu_read_lock();
1005 	act = bpf_prog_run_xdp(prog, &xdp);
1006 	rcu_read_unlock();
1007 
1008 	if (act == XDP_PASS)
1009 		return true;
1010 
1011 	/* Count number of packets not to be passed to stack */
1012 	rxq->xdp_no_pass++;
1013 
1014 	switch (act) {
1015 	case XDP_TX:
1016 		/* We need the replacement buffer before transmit. */
1017 		if (qede_alloc_rx_buffer(rxq, true)) {
1018 			qede_recycle_rx_bd_ring(rxq, 1);
1019 			return false;
1020 		}
1021 
1022 		/* Now if there's a transmission problem, we'd still have to
1023 		 * throw current buffer, as replacement was already allocated.
1024 		 */
1025 		if (qede_xdp_xmit(edev, fp, bd, cqe->placement_offset, len)) {
1026 			dma_unmap_page(rxq->dev, bd->mapping,
1027 				       PAGE_SIZE, DMA_BIDIRECTIONAL);
1028 			__free_page(bd->data);
1029 		}
1030 
1031 		/* Regardless, we've consumed an Rx BD */
1032 		qede_rx_bd_ring_consume(rxq);
1033 		return false;
1034 
1035 	default:
1036 		bpf_warn_invalid_xdp_action(act);
1037 	case XDP_ABORTED:
1038 	case XDP_DROP:
1039 		qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
1040 	}
1041 
1042 	return false;
1043 }
1044 
1045 static struct sk_buff *qede_rx_allocate_skb(struct qede_dev *edev,
1046 					    struct qede_rx_queue *rxq,
1047 					    struct sw_rx_data *bd, u16 len,
1048 					    u16 pad)
1049 {
1050 	unsigned int offset = bd->page_offset;
1051 	struct skb_frag_struct *frag;
1052 	struct page *page = bd->data;
1053 	unsigned int pull_len;
1054 	struct sk_buff *skb;
1055 	unsigned char *va;
1056 
1057 	/* Allocate a new SKB with a sufficient large header len */
1058 	skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1059 	if (unlikely(!skb))
1060 		return NULL;
1061 
1062 	/* Copy data into SKB - if it's small, we can simply copy it and
1063 	 * re-use the already allcoated & mapped memory.
1064 	 */
1065 	if (len + pad <= edev->rx_copybreak) {
1066 		memcpy(skb_put(skb, len),
1067 		       page_address(page) + pad + offset, len);
1068 		qede_reuse_page(rxq, bd);
1069 		goto out;
1070 	}
1071 
1072 	frag = &skb_shinfo(skb)->frags[0];
1073 
1074 	skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
1075 			page, pad + offset, len, rxq->rx_buf_seg_size);
1076 
1077 	va = skb_frag_address(frag);
1078 	pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1079 
1080 	/* Align the pull_len to optimize memcpy */
1081 	memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1082 
1083 	/* Correct the skb & frag sizes offset after the pull */
1084 	skb_frag_size_sub(frag, pull_len);
1085 	frag->page_offset += pull_len;
1086 	skb->data_len -= pull_len;
1087 	skb->tail += pull_len;
1088 
1089 	if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
1090 		/* Incr page ref count to reuse on allocation failure so
1091 		 * that it doesn't get freed while freeing SKB [as its
1092 		 * already mapped there].
1093 		 */
1094 		page_ref_inc(page);
1095 		dev_kfree_skb_any(skb);
1096 		return NULL;
1097 	}
1098 
1099 out:
1100 	/* We've consumed the first BD and prepared an SKB */
1101 	qede_rx_bd_ring_consume(rxq);
1102 	return skb;
1103 }
1104 
1105 static int qede_rx_build_jumbo(struct qede_dev *edev,
1106 			       struct qede_rx_queue *rxq,
1107 			       struct sk_buff *skb,
1108 			       struct eth_fast_path_rx_reg_cqe *cqe,
1109 			       u16 first_bd_len)
1110 {
1111 	u16 pkt_len = le16_to_cpu(cqe->pkt_len);
1112 	struct sw_rx_data *bd;
1113 	u16 bd_cons_idx;
1114 	u8 num_frags;
1115 
1116 	pkt_len -= first_bd_len;
1117 
1118 	/* We've already used one BD for the SKB. Now take care of the rest */
1119 	for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
1120 		u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
1121 		    pkt_len;
1122 
1123 		if (unlikely(!cur_size)) {
1124 			DP_ERR(edev,
1125 			       "Still got %d BDs for mapping jumbo, but length became 0\n",
1126 			       num_frags);
1127 			goto out;
1128 		}
1129 
1130 		/* We need a replacement buffer for each BD */
1131 		if (unlikely(qede_alloc_rx_buffer(rxq, true)))
1132 			goto out;
1133 
1134 		/* Now that we've allocated the replacement buffer,
1135 		 * we can safely consume the next BD and map it to the SKB.
1136 		 */
1137 		bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1138 		bd = &rxq->sw_rx_ring[bd_cons_idx];
1139 		qede_rx_bd_ring_consume(rxq);
1140 
1141 		dma_unmap_page(rxq->dev, bd->mapping,
1142 			       PAGE_SIZE, DMA_FROM_DEVICE);
1143 
1144 		skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
1145 				   bd->data, 0, cur_size);
1146 
1147 		skb->truesize += PAGE_SIZE;
1148 		skb->data_len += cur_size;
1149 		skb->len += cur_size;
1150 		pkt_len -= cur_size;
1151 	}
1152 
1153 	if (unlikely(pkt_len))
1154 		DP_ERR(edev,
1155 		       "Mapped all BDs of jumbo, but still have %d bytes\n",
1156 		       pkt_len);
1157 
1158 out:
1159 	return num_frags;
1160 }
1161 
1162 static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
1163 				   struct qede_fastpath *fp,
1164 				   struct qede_rx_queue *rxq,
1165 				   union eth_rx_cqe *cqe,
1166 				   enum eth_rx_cqe_type type)
1167 {
1168 	switch (type) {
1169 	case ETH_RX_CQE_TYPE_TPA_START:
1170 		qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
1171 		return 0;
1172 	case ETH_RX_CQE_TYPE_TPA_CONT:
1173 		qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
1174 		return 0;
1175 	case ETH_RX_CQE_TYPE_TPA_END:
1176 		qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
1177 		return 1;
1178 	default:
1179 		return 0;
1180 	}
1181 }
1182 
1183 static int qede_rx_process_cqe(struct qede_dev *edev,
1184 			       struct qede_fastpath *fp,
1185 			       struct qede_rx_queue *rxq)
1186 {
1187 	struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
1188 	struct eth_fast_path_rx_reg_cqe *fp_cqe;
1189 	u16 len, pad, bd_cons_idx, parse_flag;
1190 	enum eth_rx_cqe_type cqe_type;
1191 	union eth_rx_cqe *cqe;
1192 	struct sw_rx_data *bd;
1193 	struct sk_buff *skb;
1194 	__le16 flags;
1195 	u8 csum_flag;
1196 
1197 	/* Get the CQE from the completion ring */
1198 	cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1199 	cqe_type = cqe->fast_path_regular.type;
1200 
1201 	/* Process an unlikely slowpath event */
1202 	if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1203 		struct eth_slow_path_rx_cqe *sp_cqe;
1204 
1205 		sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
1206 		edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
1207 		return 0;
1208 	}
1209 
1210 	/* Handle TPA cqes */
1211 	if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
1212 		return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
1213 
1214 	/* Get the data from the SW ring; Consume it only after it's evident
1215 	 * we wouldn't recycle it.
1216 	 */
1217 	bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1218 	bd = &rxq->sw_rx_ring[bd_cons_idx];
1219 
1220 	fp_cqe = &cqe->fast_path_regular;
1221 	len = le16_to_cpu(fp_cqe->len_on_first_bd);
1222 	pad = fp_cqe->placement_offset;
1223 
1224 	/* Run eBPF program if one is attached */
1225 	if (xdp_prog)
1226 		if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe))
1227 			return 1;
1228 
1229 	/* If this is an error packet then drop it */
1230 	flags = cqe->fast_path_regular.pars_flags.flags;
1231 	parse_flag = le16_to_cpu(flags);
1232 
1233 	csum_flag = qede_check_csum(parse_flag);
1234 	if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1235 		if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag)) {
1236 			rxq->rx_ip_frags++;
1237 		} else {
1238 			DP_NOTICE(edev,
1239 				  "CQE has error, flags = %x, dropping incoming packet\n",
1240 				  parse_flag);
1241 			rxq->rx_hw_errors++;
1242 			qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
1243 			return 0;
1244 		}
1245 	}
1246 
1247 	/* Basic validation passed; Need to prepare an SKB. This would also
1248 	 * guarantee to finally consume the first BD upon success.
1249 	 */
1250 	skb = qede_rx_allocate_skb(edev, rxq, bd, len, pad);
1251 	if (!skb) {
1252 		rxq->rx_alloc_errors++;
1253 		qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
1254 		return 0;
1255 	}
1256 
1257 	/* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
1258 	 * by a single cqe.
1259 	 */
1260 	if (fp_cqe->bd_num > 1) {
1261 		u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
1262 							 fp_cqe, len);
1263 
1264 		if (unlikely(unmapped_frags > 0)) {
1265 			qede_recycle_rx_bd_ring(rxq, unmapped_frags);
1266 			dev_kfree_skb_any(skb);
1267 			return 0;
1268 		}
1269 	}
1270 
1271 	/* The SKB contains all the data. Now prepare meta-magic */
1272 	skb->protocol = eth_type_trans(skb, edev->ndev);
1273 	qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
1274 	qede_set_skb_csum(skb, csum_flag);
1275 	skb_record_rx_queue(skb, rxq->rxq_id);
1276 
1277 	/* SKB is prepared - pass it to stack */
1278 	qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
1279 
1280 	return 1;
1281 }
1282 
1283 static int qede_rx_int(struct qede_fastpath *fp, int budget)
1284 {
1285 	struct qede_rx_queue *rxq = fp->rxq;
1286 	struct qede_dev *edev = fp->edev;
1287 	u16 hw_comp_cons, sw_comp_cons;
1288 	int work_done = 0;
1289 
1290 	hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1291 	sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1292 
1293 	/* Memory barrier to prevent the CPU from doing speculative reads of CQE
1294 	 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1295 	 * read before it is written by FW, then FW writes CQE and SB, and then
1296 	 * the CPU reads the hw_comp_cons, it will use an old CQE.
1297 	 */
1298 	rmb();
1299 
1300 	/* Loop to complete all indicated BDs */
1301 	while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
1302 		qede_rx_process_cqe(edev, fp, rxq);
1303 		qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1304 		sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1305 		work_done++;
1306 	}
1307 
1308 	/* Allocate replacement buffers */
1309 	while (rxq->num_rx_buffers - rxq->filled_buffers)
1310 		if (qede_alloc_rx_buffer(rxq, false))
1311 			break;
1312 
1313 	/* Update producers */
1314 	qede_update_rx_prod(edev, rxq);
1315 
1316 	return work_done;
1317 }
1318 
1319 static bool qede_poll_is_more_work(struct qede_fastpath *fp)
1320 {
1321 	qed_sb_update_sb_idx(fp->sb_info);
1322 
1323 	/* *_has_*_work() reads the status block, thus we need to ensure that
1324 	 * status block indices have been actually read (qed_sb_update_sb_idx)
1325 	 * prior to this check (*_has_*_work) so that we won't write the
1326 	 * "newer" value of the status block to HW (if there was a DMA right
1327 	 * after qede_has_rx_work and if there is no rmb, the memory reading
1328 	 * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
1329 	 * In this case there will never be another interrupt until there is
1330 	 * another update of the status block, while there is still unhandled
1331 	 * work.
1332 	 */
1333 	rmb();
1334 
1335 	if (likely(fp->type & QEDE_FASTPATH_RX))
1336 		if (qede_has_rx_work(fp->rxq))
1337 			return true;
1338 
1339 	if (fp->type & QEDE_FASTPATH_XDP)
1340 		if (qede_txq_has_work(fp->xdp_tx))
1341 			return true;
1342 
1343 	if (likely(fp->type & QEDE_FASTPATH_TX))
1344 		if (qede_txq_has_work(fp->txq))
1345 			return true;
1346 
1347 	return false;
1348 }
1349 
1350 /*********************
1351  * NDO & API related *
1352  *********************/
1353 int qede_poll(struct napi_struct *napi, int budget)
1354 {
1355 	struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1356 						napi);
1357 	struct qede_dev *edev = fp->edev;
1358 	int rx_work_done = 0;
1359 
1360 	if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
1361 		qede_tx_int(edev, fp->txq);
1362 
1363 	if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
1364 		qede_xdp_tx_int(edev, fp->xdp_tx);
1365 
1366 	rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1367 			qede_has_rx_work(fp->rxq)) ?
1368 			qede_rx_int(fp, budget) : 0;
1369 	if (rx_work_done < budget) {
1370 		if (!qede_poll_is_more_work(fp)) {
1371 			napi_complete(napi);
1372 
1373 			/* Update and reenable interrupts */
1374 			qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
1375 		} else {
1376 			rx_work_done = budget;
1377 		}
1378 	}
1379 
1380 	if (fp->xdp_xmit) {
1381 		u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
1382 
1383 		fp->xdp_xmit = 0;
1384 		fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
1385 		qede_update_tx_producer(fp->xdp_tx);
1386 	}
1387 
1388 	return rx_work_done;
1389 }
1390 
1391 irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1392 {
1393 	struct qede_fastpath *fp = fp_cookie;
1394 
1395 	qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1396 
1397 	napi_schedule_irqoff(&fp->napi);
1398 	return IRQ_HANDLED;
1399 }
1400 
1401 /* Main transmit function */
1402 netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1403 {
1404 	struct qede_dev *edev = netdev_priv(ndev);
1405 	struct netdev_queue *netdev_txq;
1406 	struct qede_tx_queue *txq;
1407 	struct eth_tx_1st_bd *first_bd;
1408 	struct eth_tx_2nd_bd *second_bd = NULL;
1409 	struct eth_tx_3rd_bd *third_bd = NULL;
1410 	struct eth_tx_bd *tx_data_bd = NULL;
1411 	u16 txq_index;
1412 	u8 nbd = 0;
1413 	dma_addr_t mapping;
1414 	int rc, frag_idx = 0, ipv6_ext = 0;
1415 	u8 xmit_type;
1416 	u16 idx;
1417 	u16 hlen;
1418 	bool data_split = false;
1419 
1420 	/* Get tx-queue context and netdev index */
1421 	txq_index = skb_get_queue_mapping(skb);
1422 	WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
1423 	txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
1424 	netdev_txq = netdev_get_tx_queue(ndev, txq_index);
1425 
1426 	WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
1427 
1428 	xmit_type = qede_xmit_type(skb, &ipv6_ext);
1429 
1430 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
1431 	if (qede_pkt_req_lin(skb, xmit_type)) {
1432 		if (skb_linearize(skb)) {
1433 			DP_NOTICE(edev,
1434 				  "SKB linearization failed - silently dropping this SKB\n");
1435 			dev_kfree_skb_any(skb);
1436 			return NETDEV_TX_OK;
1437 		}
1438 	}
1439 #endif
1440 
1441 	/* Fill the entry in the SW ring and the BDs in the FW ring */
1442 	idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
1443 	txq->sw_tx_ring.skbs[idx].skb = skb;
1444 	first_bd = (struct eth_tx_1st_bd *)
1445 		   qed_chain_produce(&txq->tx_pbl);
1446 	memset(first_bd, 0, sizeof(*first_bd));
1447 	first_bd->data.bd_flags.bitfields =
1448 		1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1449 
1450 	/* Map skb linear data for DMA and set in the first BD */
1451 	mapping = dma_map_single(txq->dev, skb->data,
1452 				 skb_headlen(skb), DMA_TO_DEVICE);
1453 	if (unlikely(dma_mapping_error(txq->dev, mapping))) {
1454 		DP_NOTICE(edev, "SKB mapping failed\n");
1455 		qede_free_failed_tx_pkt(txq, first_bd, 0, false);
1456 		qede_update_tx_producer(txq);
1457 		return NETDEV_TX_OK;
1458 	}
1459 	nbd++;
1460 	BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1461 
1462 	/* In case there is IPv6 with extension headers or LSO we need 2nd and
1463 	 * 3rd BDs.
1464 	 */
1465 	if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
1466 		second_bd = (struct eth_tx_2nd_bd *)
1467 			qed_chain_produce(&txq->tx_pbl);
1468 		memset(second_bd, 0, sizeof(*second_bd));
1469 
1470 		nbd++;
1471 		third_bd = (struct eth_tx_3rd_bd *)
1472 			qed_chain_produce(&txq->tx_pbl);
1473 		memset(third_bd, 0, sizeof(*third_bd));
1474 
1475 		nbd++;
1476 		/* We need to fill in additional data in second_bd... */
1477 		tx_data_bd = (struct eth_tx_bd *)second_bd;
1478 	}
1479 
1480 	if (skb_vlan_tag_present(skb)) {
1481 		first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
1482 		first_bd->data.bd_flags.bitfields |=
1483 			1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
1484 	}
1485 
1486 	/* Fill the parsing flags & params according to the requested offload */
1487 	if (xmit_type & XMIT_L4_CSUM) {
1488 		/* We don't re-calculate IP checksum as it is already done by
1489 		 * the upper stack
1490 		 */
1491 		first_bd->data.bd_flags.bitfields |=
1492 			1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
1493 
1494 		if (xmit_type & XMIT_ENC) {
1495 			first_bd->data.bd_flags.bitfields |=
1496 				1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1497 			first_bd->data.bitfields |=
1498 			    1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
1499 		}
1500 
1501 		/* Legacy FW had flipped behavior in regard to this bit -
1502 		 * I.e., needed to set to prevent FW from touching encapsulated
1503 		 * packets when it didn't need to.
1504 		 */
1505 		if (unlikely(txq->is_legacy))
1506 			first_bd->data.bitfields ^=
1507 			    1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
1508 
1509 		/* If the packet is IPv6 with extension header, indicate that
1510 		 * to FW and pass few params, since the device cracker doesn't
1511 		 * support parsing IPv6 with extension header/s.
1512 		 */
1513 		if (unlikely(ipv6_ext))
1514 			qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
1515 	}
1516 
1517 	if (xmit_type & XMIT_LSO) {
1518 		first_bd->data.bd_flags.bitfields |=
1519 			(1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
1520 		third_bd->data.lso_mss =
1521 			cpu_to_le16(skb_shinfo(skb)->gso_size);
1522 
1523 		if (unlikely(xmit_type & XMIT_ENC)) {
1524 			first_bd->data.bd_flags.bitfields |=
1525 				1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
1526 
1527 			if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
1528 				u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
1529 
1530 				first_bd->data.bd_flags.bitfields |= 1 << tmp;
1531 			}
1532 			hlen = qede_get_skb_hlen(skb, true);
1533 		} else {
1534 			first_bd->data.bd_flags.bitfields |=
1535 				1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1536 			hlen = qede_get_skb_hlen(skb, false);
1537 		}
1538 
1539 		/* @@@TBD - if will not be removed need to check */
1540 		third_bd->data.bitfields |=
1541 			cpu_to_le16(1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
1542 
1543 		/* Make life easier for FW guys who can't deal with header and
1544 		 * data on same BD. If we need to split, use the second bd...
1545 		 */
1546 		if (unlikely(skb_headlen(skb) > hlen)) {
1547 			DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1548 				   "TSO split header size is %d (%x:%x)\n",
1549 				   first_bd->nbytes, first_bd->addr.hi,
1550 				   first_bd->addr.lo);
1551 
1552 			mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
1553 					   le32_to_cpu(first_bd->addr.lo)) +
1554 					   hlen;
1555 
1556 			BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
1557 					      le16_to_cpu(first_bd->nbytes) -
1558 					      hlen);
1559 
1560 			/* this marks the BD as one that has no
1561 			 * individual mapping
1562 			 */
1563 			txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
1564 
1565 			first_bd->nbytes = cpu_to_le16(hlen);
1566 
1567 			tx_data_bd = (struct eth_tx_bd *)third_bd;
1568 			data_split = true;
1569 		}
1570 	} else {
1571 		first_bd->data.bitfields |=
1572 		    (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
1573 		    ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1574 	}
1575 
1576 	/* Handle fragmented skb */
1577 	/* special handle for frags inside 2nd and 3rd bds.. */
1578 	while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
1579 		rc = map_frag_to_bd(txq,
1580 				    &skb_shinfo(skb)->frags[frag_idx],
1581 				    tx_data_bd);
1582 		if (rc) {
1583 			qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
1584 			qede_update_tx_producer(txq);
1585 			return NETDEV_TX_OK;
1586 		}
1587 
1588 		if (tx_data_bd == (struct eth_tx_bd *)second_bd)
1589 			tx_data_bd = (struct eth_tx_bd *)third_bd;
1590 		else
1591 			tx_data_bd = NULL;
1592 
1593 		frag_idx++;
1594 	}
1595 
1596 	/* map last frags into 4th, 5th .... */
1597 	for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
1598 		tx_data_bd = (struct eth_tx_bd *)
1599 			     qed_chain_produce(&txq->tx_pbl);
1600 
1601 		memset(tx_data_bd, 0, sizeof(*tx_data_bd));
1602 
1603 		rc = map_frag_to_bd(txq,
1604 				    &skb_shinfo(skb)->frags[frag_idx],
1605 				    tx_data_bd);
1606 		if (rc) {
1607 			qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
1608 			qede_update_tx_producer(txq);
1609 			return NETDEV_TX_OK;
1610 		}
1611 	}
1612 
1613 	/* update the first BD with the actual num BDs */
1614 	first_bd->data.nbds = nbd;
1615 
1616 	netdev_tx_sent_queue(netdev_txq, skb->len);
1617 
1618 	skb_tx_timestamp(skb);
1619 
1620 	/* Advance packet producer only before sending the packet since mapping
1621 	 * of pages may fail.
1622 	 */
1623 	txq->sw_tx_prod++;
1624 
1625 	/* 'next page' entries are counted in the producer value */
1626 	txq->tx_db.data.bd_prod =
1627 		cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
1628 
1629 	if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
1630 		qede_update_tx_producer(txq);
1631 
1632 	if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
1633 		      < (MAX_SKB_FRAGS + 1))) {
1634 		if (skb->xmit_more)
1635 			qede_update_tx_producer(txq);
1636 
1637 		netif_tx_stop_queue(netdev_txq);
1638 		txq->stopped_cnt++;
1639 		DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1640 			   "Stop queue was called\n");
1641 		/* paired memory barrier is in qede_tx_int(), we have to keep
1642 		 * ordering of set_bit() in netif_tx_stop_queue() and read of
1643 		 * fp->bd_tx_cons
1644 		 */
1645 		smp_mb();
1646 
1647 		if ((qed_chain_get_elem_left(&txq->tx_pbl) >=
1648 		     (MAX_SKB_FRAGS + 1)) &&
1649 		    (edev->state == QEDE_STATE_OPEN)) {
1650 			netif_tx_wake_queue(netdev_txq);
1651 			DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1652 				   "Wake queue was called\n");
1653 		}
1654 	}
1655 
1656 	return NETDEV_TX_OK;
1657 }
1658 
1659 /* 8B udp header + 8B base tunnel header + 32B option length */
1660 #define QEDE_MAX_TUN_HDR_LEN 48
1661 
1662 netdev_features_t qede_features_check(struct sk_buff *skb,
1663 				      struct net_device *dev,
1664 				      netdev_features_t features)
1665 {
1666 	if (skb->encapsulation) {
1667 		u8 l4_proto = 0;
1668 
1669 		switch (vlan_get_protocol(skb)) {
1670 		case htons(ETH_P_IP):
1671 			l4_proto = ip_hdr(skb)->protocol;
1672 			break;
1673 		case htons(ETH_P_IPV6):
1674 			l4_proto = ipv6_hdr(skb)->nexthdr;
1675 			break;
1676 		default:
1677 			return features;
1678 		}
1679 
1680 		/* Disable offloads for geneve tunnels, as HW can't parse
1681 		 * the geneve header which has option length greater than 32B.
1682 		 */
1683 		if ((l4_proto == IPPROTO_UDP) &&
1684 		    ((skb_inner_mac_header(skb) -
1685 		      skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
1686 			return features & ~(NETIF_F_CSUM_MASK |
1687 					    NETIF_F_GSO_MASK);
1688 	}
1689 
1690 	return features;
1691 }
1692