1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/version.h> 33 #include <linux/types.h> 34 #include <linux/netdevice.h> 35 #include <linux/etherdevice.h> 36 #include <linux/ethtool.h> 37 #include <linux/string.h> 38 #include <linux/pci.h> 39 #include <linux/capability.h> 40 #include <linux/vmalloc.h> 41 #include "qede.h" 42 #include "qede_ptp.h" 43 44 #define QEDE_RQSTAT_OFFSET(stat_name) \ 45 (offsetof(struct qede_rx_queue, stat_name)) 46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 47 #define QEDE_RQSTAT(stat_name) \ 48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 49 50 #define QEDE_SELFTEST_POLL_COUNT 100 51 52 static const struct { 53 u64 offset; 54 char string[ETH_GSTRING_LEN]; 55 } qede_rqstats_arr[] = { 56 QEDE_RQSTAT(rcv_pkts), 57 QEDE_RQSTAT(rx_hw_errors), 58 QEDE_RQSTAT(rx_alloc_errors), 59 QEDE_RQSTAT(rx_ip_frags), 60 QEDE_RQSTAT(xdp_no_pass), 61 }; 62 63 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 64 #define QEDE_TQSTAT_OFFSET(stat_name) \ 65 (offsetof(struct qede_tx_queue, stat_name)) 66 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 67 #define QEDE_TQSTAT(stat_name) \ 68 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 69 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 70 static const struct { 71 u64 offset; 72 char string[ETH_GSTRING_LEN]; 73 } qede_tqstats_arr[] = { 74 QEDE_TQSTAT(xmit_pkts), 75 QEDE_TQSTAT(stopped_cnt), 76 QEDE_TQSTAT(tx_mem_alloc_err), 77 }; 78 79 #define QEDE_STAT_OFFSET(stat_name, type, base) \ 80 (offsetof(type, stat_name) + (base)) 81 #define QEDE_STAT_STRING(stat_name) (#stat_name) 82 #define _QEDE_STAT(stat_name, type, base, attr) \ 83 {QEDE_STAT_OFFSET(stat_name, type, base), \ 84 QEDE_STAT_STRING(stat_name), \ 85 attr} 86 #define QEDE_STAT(stat_name) \ 87 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 88 #define QEDE_PF_STAT(stat_name) \ 89 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 90 BIT(QEDE_STAT_PF_ONLY)) 91 #define QEDE_PF_BB_STAT(stat_name) \ 92 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 93 offsetof(struct qede_stats, bb), \ 94 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 95 #define QEDE_PF_AH_STAT(stat_name) \ 96 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 97 offsetof(struct qede_stats, ah), \ 98 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 99 static const struct { 100 u64 offset; 101 char string[ETH_GSTRING_LEN]; 102 unsigned long attr; 103 #define QEDE_STAT_PF_ONLY 0 104 #define QEDE_STAT_BB_ONLY 1 105 #define QEDE_STAT_AH_ONLY 2 106 } qede_stats_arr[] = { 107 QEDE_STAT(rx_ucast_bytes), 108 QEDE_STAT(rx_mcast_bytes), 109 QEDE_STAT(rx_bcast_bytes), 110 QEDE_STAT(rx_ucast_pkts), 111 QEDE_STAT(rx_mcast_pkts), 112 QEDE_STAT(rx_bcast_pkts), 113 114 QEDE_STAT(tx_ucast_bytes), 115 QEDE_STAT(tx_mcast_bytes), 116 QEDE_STAT(tx_bcast_bytes), 117 QEDE_STAT(tx_ucast_pkts), 118 QEDE_STAT(tx_mcast_pkts), 119 QEDE_STAT(tx_bcast_pkts), 120 121 QEDE_PF_STAT(rx_64_byte_packets), 122 QEDE_PF_STAT(rx_65_to_127_byte_packets), 123 QEDE_PF_STAT(rx_128_to_255_byte_packets), 124 QEDE_PF_STAT(rx_256_to_511_byte_packets), 125 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 126 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 127 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 128 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 129 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 130 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 131 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 132 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 133 QEDE_PF_STAT(tx_64_byte_packets), 134 QEDE_PF_STAT(tx_65_to_127_byte_packets), 135 QEDE_PF_STAT(tx_128_to_255_byte_packets), 136 QEDE_PF_STAT(tx_256_to_511_byte_packets), 137 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 138 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 139 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 140 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 141 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 142 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 143 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 144 QEDE_PF_STAT(rx_mac_crtl_frames), 145 QEDE_PF_STAT(tx_mac_ctrl_frames), 146 QEDE_PF_STAT(rx_pause_frames), 147 QEDE_PF_STAT(tx_pause_frames), 148 QEDE_PF_STAT(rx_pfc_frames), 149 QEDE_PF_STAT(tx_pfc_frames), 150 151 QEDE_PF_STAT(rx_crc_errors), 152 QEDE_PF_STAT(rx_align_errors), 153 QEDE_PF_STAT(rx_carrier_errors), 154 QEDE_PF_STAT(rx_oversize_packets), 155 QEDE_PF_STAT(rx_jabbers), 156 QEDE_PF_STAT(rx_undersize_packets), 157 QEDE_PF_STAT(rx_fragments), 158 QEDE_PF_BB_STAT(tx_lpi_entry_count), 159 QEDE_PF_BB_STAT(tx_total_collisions), 160 QEDE_PF_STAT(brb_truncates), 161 QEDE_PF_STAT(brb_discards), 162 QEDE_STAT(no_buff_discards), 163 QEDE_PF_STAT(mftag_filter_discards), 164 QEDE_PF_STAT(mac_filter_discards), 165 QEDE_PF_STAT(gft_filter_drop), 166 QEDE_STAT(tx_err_drop_pkts), 167 QEDE_STAT(ttl0_discard), 168 QEDE_STAT(packet_too_big_discard), 169 170 QEDE_STAT(coalesced_pkts), 171 QEDE_STAT(coalesced_events), 172 QEDE_STAT(coalesced_aborts_num), 173 QEDE_STAT(non_coalesced_pkts), 174 QEDE_STAT(coalesced_bytes), 175 176 QEDE_STAT(link_change_count), 177 }; 178 179 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 180 #define QEDE_STAT_IS_PF_ONLY(i) \ 181 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 182 #define QEDE_STAT_IS_BB_ONLY(i) \ 183 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 184 #define QEDE_STAT_IS_AH_ONLY(i) \ 185 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 186 187 enum { 188 QEDE_PRI_FLAG_CMT, 189 QEDE_PRI_FLAG_LEN, 190 }; 191 192 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 193 "Coupled-Function", 194 }; 195 196 enum qede_ethtool_tests { 197 QEDE_ETHTOOL_INT_LOOPBACK, 198 QEDE_ETHTOOL_INTERRUPT_TEST, 199 QEDE_ETHTOOL_MEMORY_TEST, 200 QEDE_ETHTOOL_REGISTER_TEST, 201 QEDE_ETHTOOL_CLOCK_TEST, 202 QEDE_ETHTOOL_NVRAM_TEST, 203 QEDE_ETHTOOL_TEST_MAX 204 }; 205 206 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 207 "Internal loopback (offline)", 208 "Interrupt (online)\t", 209 "Memory (online)\t\t", 210 "Register (online)\t", 211 "Clock (online)\t\t", 212 "Nvram (online)\t\t", 213 }; 214 215 static void qede_get_strings_stats_txq(struct qede_dev *edev, 216 struct qede_tx_queue *txq, u8 **buf) 217 { 218 int i; 219 220 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 221 if (txq->is_xdp) 222 sprintf(*buf, "%d [XDP]: %s", 223 QEDE_TXQ_XDP_TO_IDX(edev, txq), 224 qede_tqstats_arr[i].string); 225 else 226 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos, 227 qede_tqstats_arr[i].string); 228 *buf += ETH_GSTRING_LEN; 229 } 230 } 231 232 static void qede_get_strings_stats_rxq(struct qede_dev *edev, 233 struct qede_rx_queue *rxq, u8 **buf) 234 { 235 int i; 236 237 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 238 sprintf(*buf, "%d: %s", rxq->rxq_id, 239 qede_rqstats_arr[i].string); 240 *buf += ETH_GSTRING_LEN; 241 } 242 } 243 244 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 245 { 246 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 247 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 248 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 249 } 250 251 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 252 { 253 struct qede_fastpath *fp; 254 int i; 255 256 /* Account for queue statistics */ 257 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 258 fp = &edev->fp_array[i]; 259 260 if (fp->type & QEDE_FASTPATH_RX) 261 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 262 263 if (fp->type & QEDE_FASTPATH_XDP) 264 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 265 266 if (fp->type & QEDE_FASTPATH_TX) { 267 int cos; 268 269 for_each_cos_in_txq(edev, cos) 270 qede_get_strings_stats_txq(edev, 271 &fp->txq[cos], &buf); 272 } 273 } 274 275 /* Account for non-queue statistics */ 276 for (i = 0; i < QEDE_NUM_STATS; i++) { 277 if (qede_is_irrelevant_stat(edev, i)) 278 continue; 279 strcpy(buf, qede_stats_arr[i].string); 280 buf += ETH_GSTRING_LEN; 281 } 282 } 283 284 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 285 { 286 struct qede_dev *edev = netdev_priv(dev); 287 288 switch (stringset) { 289 case ETH_SS_STATS: 290 qede_get_strings_stats(edev, buf); 291 break; 292 case ETH_SS_PRIV_FLAGS: 293 memcpy(buf, qede_private_arr, 294 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 295 break; 296 case ETH_SS_TEST: 297 memcpy(buf, qede_tests_str_arr, 298 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 299 break; 300 default: 301 DP_VERBOSE(edev, QED_MSG_DEBUG, 302 "Unsupported stringset 0x%08x\n", stringset); 303 } 304 } 305 306 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 307 { 308 int i; 309 310 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 311 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 312 (*buf)++; 313 } 314 } 315 316 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 317 { 318 int i; 319 320 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 321 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 322 (*buf)++; 323 } 324 } 325 326 static void qede_get_ethtool_stats(struct net_device *dev, 327 struct ethtool_stats *stats, u64 *buf) 328 { 329 struct qede_dev *edev = netdev_priv(dev); 330 struct qede_fastpath *fp; 331 int i; 332 333 qede_fill_by_demand_stats(edev); 334 335 /* Need to protect the access to the fastpath array */ 336 __qede_lock(edev); 337 338 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 339 fp = &edev->fp_array[i]; 340 341 if (fp->type & QEDE_FASTPATH_RX) 342 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 343 344 if (fp->type & QEDE_FASTPATH_XDP) 345 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 346 347 if (fp->type & QEDE_FASTPATH_TX) { 348 int cos; 349 350 for_each_cos_in_txq(edev, cos) 351 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf); 352 } 353 } 354 355 for (i = 0; i < QEDE_NUM_STATS; i++) { 356 if (qede_is_irrelevant_stat(edev, i)) 357 continue; 358 *buf = *((u64 *)(((void *)&edev->stats) + 359 qede_stats_arr[i].offset)); 360 361 buf++; 362 } 363 364 __qede_unlock(edev); 365 } 366 367 static int qede_get_sset_count(struct net_device *dev, int stringset) 368 { 369 struct qede_dev *edev = netdev_priv(dev); 370 int num_stats = QEDE_NUM_STATS, i; 371 372 switch (stringset) { 373 case ETH_SS_STATS: 374 for (i = 0; i < QEDE_NUM_STATS; i++) 375 if (qede_is_irrelevant_stat(edev, i)) 376 num_stats--; 377 378 /* Account for the Regular Tx statistics */ 379 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * 380 edev->dev_info.num_tc; 381 382 /* Account for the Regular Rx statistics */ 383 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 384 385 /* Account for XDP statistics [if needed] */ 386 if (edev->xdp_prog) 387 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 388 return num_stats; 389 390 case ETH_SS_PRIV_FLAGS: 391 return QEDE_PRI_FLAG_LEN; 392 case ETH_SS_TEST: 393 if (!IS_VF(edev)) 394 return QEDE_ETHTOOL_TEST_MAX; 395 else 396 return 0; 397 default: 398 DP_VERBOSE(edev, QED_MSG_DEBUG, 399 "Unsupported stringset 0x%08x\n", stringset); 400 return -EINVAL; 401 } 402 } 403 404 static u32 qede_get_priv_flags(struct net_device *dev) 405 { 406 struct qede_dev *edev = netdev_priv(dev); 407 408 return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT; 409 } 410 411 struct qede_link_mode_mapping { 412 u32 qed_link_mode; 413 u32 ethtool_link_mode; 414 }; 415 416 static const struct qede_link_mode_mapping qed_lm_map[] = { 417 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT}, 418 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT}, 419 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT}, 420 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT}, 421 {QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT}, 422 {QED_LM_2500baseX_Full_BIT, ETHTOOL_LINK_MODE_2500baseX_Full_BIT}, 423 {QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT}, 424 {QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT}, 425 {QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT}, 426 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 427 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 428 {QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT}, 429 {QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT}, 430 {QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT}, 431 {QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT}, 432 {QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT}, 433 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT}, 434 {QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT}, 435 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT}, 436 {QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT}, 437 {QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT}, 438 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT}, 439 {QED_LM_100000baseKR4_Full_BIT, 440 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT}, 441 {QED_LM_100000baseSR4_Full_BIT, 442 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT}, 443 {QED_LM_100000baseCR4_Full_BIT, 444 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT}, 445 {QED_LM_100000baseLR4_ER4_Full_BIT, 446 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT}, 447 {QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT}, 448 {QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT}, 449 {QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT}, 450 {QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT}, 451 {QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT}, 452 {QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT}, 453 }; 454 455 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \ 456 { \ 457 int i; \ 458 \ 459 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 460 if ((caps) & (qed_lm_map[i].qed_link_mode)) \ 461 __set_bit(qed_lm_map[i].ethtool_link_mode,\ 462 lk_ksettings->link_modes.name); \ 463 } \ 464 } 465 466 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \ 467 { \ 468 int i; \ 469 \ 470 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 471 if (test_bit(qed_lm_map[i].ethtool_link_mode, \ 472 lk_ksettings->link_modes.name)) \ 473 caps |= qed_lm_map[i].qed_link_mode; \ 474 } \ 475 } 476 477 static int qede_get_link_ksettings(struct net_device *dev, 478 struct ethtool_link_ksettings *cmd) 479 { 480 struct ethtool_link_settings *base = &cmd->base; 481 struct qede_dev *edev = netdev_priv(dev); 482 struct qed_link_output current_link; 483 484 __qede_lock(edev); 485 486 memset(¤t_link, 0, sizeof(current_link)); 487 edev->ops->common->get_link(edev->cdev, ¤t_link); 488 489 ethtool_link_ksettings_zero_link_mode(cmd, supported); 490 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported) 491 492 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 493 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising) 494 495 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 496 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising) 497 498 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 499 base->speed = current_link.speed; 500 base->duplex = current_link.duplex; 501 } else { 502 base->speed = SPEED_UNKNOWN; 503 base->duplex = DUPLEX_UNKNOWN; 504 } 505 506 __qede_unlock(edev); 507 508 base->port = current_link.port; 509 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 510 AUTONEG_DISABLE; 511 512 return 0; 513 } 514 515 static int qede_set_link_ksettings(struct net_device *dev, 516 const struct ethtool_link_ksettings *cmd) 517 { 518 const struct ethtool_link_settings *base = &cmd->base; 519 struct qede_dev *edev = netdev_priv(dev); 520 struct qed_link_output current_link; 521 struct qed_link_params params; 522 u32 sup_caps; 523 524 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 525 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 526 return -EOPNOTSUPP; 527 } 528 memset(¤t_link, 0, sizeof(current_link)); 529 memset(¶ms, 0, sizeof(params)); 530 edev->ops->common->get_link(edev->cdev, ¤t_link); 531 532 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 533 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 534 if (base->autoneg == AUTONEG_ENABLE) { 535 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 536 DP_INFO(edev, "Auto negotiation is not supported\n"); 537 return -EOPNOTSUPP; 538 } 539 540 params.autoneg = true; 541 params.forced_speed = 0; 542 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising) 543 } else { /* forced speed */ 544 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 545 params.autoneg = false; 546 params.forced_speed = base->speed; 547 switch (base->speed) { 548 case SPEED_1000: 549 sup_caps = QED_LM_1000baseT_Full_BIT | 550 QED_LM_1000baseKX_Full_BIT | 551 QED_LM_1000baseX_Full_BIT; 552 if (!(current_link.supported_caps & sup_caps)) { 553 DP_INFO(edev, "1G speed not supported\n"); 554 return -EINVAL; 555 } 556 params.adv_speeds = current_link.supported_caps & 557 sup_caps; 558 break; 559 case SPEED_10000: 560 sup_caps = QED_LM_10000baseT_Full_BIT | 561 QED_LM_10000baseKR_Full_BIT | 562 QED_LM_10000baseKX4_Full_BIT | 563 QED_LM_10000baseR_FEC_BIT | 564 QED_LM_10000baseCR_Full_BIT | 565 QED_LM_10000baseSR_Full_BIT | 566 QED_LM_10000baseLR_Full_BIT | 567 QED_LM_10000baseLRM_Full_BIT; 568 if (!(current_link.supported_caps & sup_caps)) { 569 DP_INFO(edev, "10G speed not supported\n"); 570 return -EINVAL; 571 } 572 params.adv_speeds = current_link.supported_caps & 573 sup_caps; 574 break; 575 case SPEED_20000: 576 if (!(current_link.supported_caps & 577 QED_LM_20000baseKR2_Full_BIT)) { 578 DP_INFO(edev, "20G speed not supported\n"); 579 return -EINVAL; 580 } 581 params.adv_speeds = QED_LM_20000baseKR2_Full_BIT; 582 break; 583 case SPEED_25000: 584 sup_caps = QED_LM_25000baseKR_Full_BIT | 585 QED_LM_25000baseCR_Full_BIT | 586 QED_LM_25000baseSR_Full_BIT; 587 if (!(current_link.supported_caps & sup_caps)) { 588 DP_INFO(edev, "25G speed not supported\n"); 589 return -EINVAL; 590 } 591 params.adv_speeds = current_link.supported_caps & 592 sup_caps; 593 break; 594 case SPEED_40000: 595 sup_caps = QED_LM_40000baseLR4_Full_BIT | 596 QED_LM_40000baseKR4_Full_BIT | 597 QED_LM_40000baseCR4_Full_BIT | 598 QED_LM_40000baseSR4_Full_BIT; 599 if (!(current_link.supported_caps & sup_caps)) { 600 DP_INFO(edev, "40G speed not supported\n"); 601 return -EINVAL; 602 } 603 params.adv_speeds = current_link.supported_caps & 604 sup_caps; 605 break; 606 case SPEED_50000: 607 sup_caps = QED_LM_50000baseKR2_Full_BIT | 608 QED_LM_50000baseCR2_Full_BIT | 609 QED_LM_50000baseSR2_Full_BIT; 610 if (!(current_link.supported_caps & sup_caps)) { 611 DP_INFO(edev, "50G speed not supported\n"); 612 return -EINVAL; 613 } 614 params.adv_speeds = current_link.supported_caps & 615 sup_caps; 616 break; 617 case SPEED_100000: 618 sup_caps = QED_LM_100000baseKR4_Full_BIT | 619 QED_LM_100000baseSR4_Full_BIT | 620 QED_LM_100000baseCR4_Full_BIT | 621 QED_LM_100000baseLR4_ER4_Full_BIT; 622 if (!(current_link.supported_caps & sup_caps)) { 623 DP_INFO(edev, "100G speed not supported\n"); 624 return -EINVAL; 625 } 626 params.adv_speeds = current_link.supported_caps & 627 sup_caps; 628 break; 629 default: 630 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 631 return -EINVAL; 632 } 633 } 634 635 params.link_up = true; 636 edev->ops->common->set_link(edev->cdev, ¶ms); 637 638 return 0; 639 } 640 641 static void qede_get_drvinfo(struct net_device *ndev, 642 struct ethtool_drvinfo *info) 643 { 644 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 645 struct qede_dev *edev = netdev_priv(ndev); 646 647 strlcpy(info->driver, "qede", sizeof(info->driver)); 648 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 649 650 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 651 edev->dev_info.common.fw_major, 652 edev->dev_info.common.fw_minor, 653 edev->dev_info.common.fw_rev, 654 edev->dev_info.common.fw_eng); 655 656 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 657 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 658 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 659 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 660 edev->dev_info.common.mfw_rev & 0xFF); 661 662 if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) < 663 sizeof(info->fw_version)) { 664 snprintf(info->fw_version, sizeof(info->fw_version), 665 "mfw %s storm %s", mfw, storm); 666 } else { 667 snprintf(info->fw_version, sizeof(info->fw_version), 668 "%s %s", mfw, storm); 669 } 670 671 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 672 } 673 674 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 675 { 676 struct qede_dev *edev = netdev_priv(ndev); 677 678 if (edev->dev_info.common.wol_support) { 679 wol->supported = WAKE_MAGIC; 680 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 681 } 682 } 683 684 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 685 { 686 struct qede_dev *edev = netdev_priv(ndev); 687 bool wol_requested; 688 int rc; 689 690 if (wol->wolopts & ~WAKE_MAGIC) { 691 DP_INFO(edev, 692 "Can't support WoL options other than magic-packet\n"); 693 return -EINVAL; 694 } 695 696 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 697 if (wol_requested == edev->wol_enabled) 698 return 0; 699 700 /* Need to actually change configuration */ 701 if (!edev->dev_info.common.wol_support) { 702 DP_INFO(edev, "Device doesn't support WoL\n"); 703 return -EINVAL; 704 } 705 706 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 707 if (!rc) 708 edev->wol_enabled = wol_requested; 709 710 return rc; 711 } 712 713 static u32 qede_get_msglevel(struct net_device *ndev) 714 { 715 struct qede_dev *edev = netdev_priv(ndev); 716 717 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 718 } 719 720 static void qede_set_msglevel(struct net_device *ndev, u32 level) 721 { 722 struct qede_dev *edev = netdev_priv(ndev); 723 u32 dp_module = 0; 724 u8 dp_level = 0; 725 726 qede_config_debug(level, &dp_module, &dp_level); 727 728 edev->dp_level = dp_level; 729 edev->dp_module = dp_module; 730 edev->ops->common->update_msglvl(edev->cdev, 731 dp_module, dp_level); 732 } 733 734 static int qede_nway_reset(struct net_device *dev) 735 { 736 struct qede_dev *edev = netdev_priv(dev); 737 struct qed_link_output current_link; 738 struct qed_link_params link_params; 739 740 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 741 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 742 return -EOPNOTSUPP; 743 } 744 745 if (!netif_running(dev)) 746 return 0; 747 748 memset(¤t_link, 0, sizeof(current_link)); 749 edev->ops->common->get_link(edev->cdev, ¤t_link); 750 if (!current_link.link_up) 751 return 0; 752 753 /* Toggle the link */ 754 memset(&link_params, 0, sizeof(link_params)); 755 link_params.link_up = false; 756 edev->ops->common->set_link(edev->cdev, &link_params); 757 link_params.link_up = true; 758 edev->ops->common->set_link(edev->cdev, &link_params); 759 760 return 0; 761 } 762 763 static u32 qede_get_link(struct net_device *dev) 764 { 765 struct qede_dev *edev = netdev_priv(dev); 766 struct qed_link_output current_link; 767 768 memset(¤t_link, 0, sizeof(current_link)); 769 edev->ops->common->get_link(edev->cdev, ¤t_link); 770 771 return current_link.link_up; 772 } 773 774 static int qede_flash_device(struct net_device *dev, 775 struct ethtool_flash *flash) 776 { 777 struct qede_dev *edev = netdev_priv(dev); 778 779 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 780 } 781 782 static int qede_get_coalesce(struct net_device *dev, 783 struct ethtool_coalesce *coal) 784 { 785 void *rx_handle = NULL, *tx_handle = NULL; 786 struct qede_dev *edev = netdev_priv(dev); 787 u16 rx_coal, tx_coal, i, rc = 0; 788 struct qede_fastpath *fp; 789 790 rx_coal = QED_DEFAULT_RX_USECS; 791 tx_coal = QED_DEFAULT_TX_USECS; 792 793 memset(coal, 0, sizeof(struct ethtool_coalesce)); 794 795 __qede_lock(edev); 796 if (edev->state == QEDE_STATE_OPEN) { 797 for_each_queue(i) { 798 fp = &edev->fp_array[i]; 799 800 if (fp->type & QEDE_FASTPATH_RX) { 801 rx_handle = fp->rxq->handle; 802 break; 803 } 804 } 805 806 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 807 if (rc) { 808 DP_INFO(edev, "Read Rx coalesce error\n"); 809 goto out; 810 } 811 812 for_each_queue(i) { 813 struct qede_tx_queue *txq; 814 815 fp = &edev->fp_array[i]; 816 817 /* All TX queues of given fastpath uses same 818 * coalescing value, so no need to iterate over 819 * all TCs, TC0 txq should suffice. 820 */ 821 if (fp->type & QEDE_FASTPATH_TX) { 822 txq = QEDE_FP_TC0_TXQ(fp); 823 tx_handle = txq->handle; 824 break; 825 } 826 } 827 828 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 829 if (rc) 830 DP_INFO(edev, "Read Tx coalesce error\n"); 831 } 832 833 out: 834 __qede_unlock(edev); 835 836 coal->rx_coalesce_usecs = rx_coal; 837 coal->tx_coalesce_usecs = tx_coal; 838 839 return rc; 840 } 841 842 static int qede_set_coalesce(struct net_device *dev, 843 struct ethtool_coalesce *coal) 844 { 845 struct qede_dev *edev = netdev_priv(dev); 846 struct qede_fastpath *fp; 847 int i, rc = 0; 848 u16 rxc, txc; 849 850 if (!netif_running(dev)) { 851 DP_INFO(edev, "Interface is down\n"); 852 return -EINVAL; 853 } 854 855 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 856 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 857 DP_INFO(edev, 858 "Can't support requested %s coalesce value [max supported value %d]\n", 859 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 860 "tx", QED_COALESCE_MAX); 861 return -EINVAL; 862 } 863 864 rxc = (u16)coal->rx_coalesce_usecs; 865 txc = (u16)coal->tx_coalesce_usecs; 866 for_each_queue(i) { 867 fp = &edev->fp_array[i]; 868 869 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 870 rc = edev->ops->common->set_coalesce(edev->cdev, 871 rxc, 0, 872 fp->rxq->handle); 873 if (rc) { 874 DP_INFO(edev, 875 "Set RX coalesce error, rc = %d\n", rc); 876 return rc; 877 } 878 } 879 880 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 881 struct qede_tx_queue *txq; 882 883 /* All TX queues of given fastpath uses same 884 * coalescing value, so no need to iterate over 885 * all TCs, TC0 txq should suffice. 886 */ 887 txq = QEDE_FP_TC0_TXQ(fp); 888 889 rc = edev->ops->common->set_coalesce(edev->cdev, 890 0, txc, 891 txq->handle); 892 if (rc) { 893 DP_INFO(edev, 894 "Set TX coalesce error, rc = %d\n", rc); 895 return rc; 896 } 897 } 898 } 899 900 return rc; 901 } 902 903 static void qede_get_ringparam(struct net_device *dev, 904 struct ethtool_ringparam *ering) 905 { 906 struct qede_dev *edev = netdev_priv(dev); 907 908 ering->rx_max_pending = NUM_RX_BDS_MAX; 909 ering->rx_pending = edev->q_num_rx_buffers; 910 ering->tx_max_pending = NUM_TX_BDS_MAX; 911 ering->tx_pending = edev->q_num_tx_buffers; 912 } 913 914 static int qede_set_ringparam(struct net_device *dev, 915 struct ethtool_ringparam *ering) 916 { 917 struct qede_dev *edev = netdev_priv(dev); 918 919 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 920 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 921 ering->rx_pending, ering->tx_pending); 922 923 /* Validate legality of configuration */ 924 if (ering->rx_pending > NUM_RX_BDS_MAX || 925 ering->rx_pending < NUM_RX_BDS_MIN || 926 ering->tx_pending > NUM_TX_BDS_MAX || 927 ering->tx_pending < NUM_TX_BDS_MIN) { 928 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 929 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 930 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 931 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 932 return -EINVAL; 933 } 934 935 /* Change ring size and re-load */ 936 edev->q_num_rx_buffers = ering->rx_pending; 937 edev->q_num_tx_buffers = ering->tx_pending; 938 939 qede_reload(edev, NULL, false); 940 941 return 0; 942 } 943 944 static void qede_get_pauseparam(struct net_device *dev, 945 struct ethtool_pauseparam *epause) 946 { 947 struct qede_dev *edev = netdev_priv(dev); 948 struct qed_link_output current_link; 949 950 memset(¤t_link, 0, sizeof(current_link)); 951 edev->ops->common->get_link(edev->cdev, ¤t_link); 952 953 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 954 epause->autoneg = true; 955 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 956 epause->rx_pause = true; 957 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 958 epause->tx_pause = true; 959 960 DP_VERBOSE(edev, QED_MSG_DEBUG, 961 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 962 epause->cmd, epause->autoneg, epause->rx_pause, 963 epause->tx_pause); 964 } 965 966 static int qede_set_pauseparam(struct net_device *dev, 967 struct ethtool_pauseparam *epause) 968 { 969 struct qede_dev *edev = netdev_priv(dev); 970 struct qed_link_params params; 971 struct qed_link_output current_link; 972 973 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 974 DP_INFO(edev, 975 "Pause settings are not allowed to be changed\n"); 976 return -EOPNOTSUPP; 977 } 978 979 memset(¤t_link, 0, sizeof(current_link)); 980 edev->ops->common->get_link(edev->cdev, ¤t_link); 981 982 memset(¶ms, 0, sizeof(params)); 983 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 984 if (epause->autoneg) { 985 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 986 DP_INFO(edev, "autoneg not supported\n"); 987 return -EINVAL; 988 } 989 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 990 } 991 if (epause->rx_pause) 992 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 993 if (epause->tx_pause) 994 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 995 996 params.link_up = true; 997 edev->ops->common->set_link(edev->cdev, ¶ms); 998 999 return 0; 1000 } 1001 1002 static void qede_get_regs(struct net_device *ndev, 1003 struct ethtool_regs *regs, void *buffer) 1004 { 1005 struct qede_dev *edev = netdev_priv(ndev); 1006 1007 regs->version = 0; 1008 memset(buffer, 0, regs->len); 1009 1010 if (edev->ops && edev->ops->common) 1011 edev->ops->common->dbg_all_data(edev->cdev, buffer); 1012 } 1013 1014 static int qede_get_regs_len(struct net_device *ndev) 1015 { 1016 struct qede_dev *edev = netdev_priv(ndev); 1017 1018 if (edev->ops && edev->ops->common) 1019 return edev->ops->common->dbg_all_data_size(edev->cdev); 1020 else 1021 return -EINVAL; 1022 } 1023 1024 static void qede_update_mtu(struct qede_dev *edev, 1025 struct qede_reload_args *args) 1026 { 1027 edev->ndev->mtu = args->u.mtu; 1028 } 1029 1030 /* Netdevice NDOs */ 1031 int qede_change_mtu(struct net_device *ndev, int new_mtu) 1032 { 1033 struct qede_dev *edev = netdev_priv(ndev); 1034 struct qede_reload_args args; 1035 1036 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1037 "Configuring MTU size of %d\n", new_mtu); 1038 1039 if (new_mtu > PAGE_SIZE) 1040 ndev->features &= ~NETIF_F_GRO_HW; 1041 1042 /* Set the mtu field and re-start the interface if needed */ 1043 args.u.mtu = new_mtu; 1044 args.func = &qede_update_mtu; 1045 qede_reload(edev, &args, false); 1046 1047 edev->ops->common->update_mtu(edev->cdev, new_mtu); 1048 1049 return 0; 1050 } 1051 1052 static void qede_get_channels(struct net_device *dev, 1053 struct ethtool_channels *channels) 1054 { 1055 struct qede_dev *edev = netdev_priv(dev); 1056 1057 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 1058 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 1059 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 1060 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 1061 edev->fp_num_rx; 1062 channels->tx_count = edev->fp_num_tx; 1063 channels->rx_count = edev->fp_num_rx; 1064 } 1065 1066 static int qede_set_channels(struct net_device *dev, 1067 struct ethtool_channels *channels) 1068 { 1069 struct qede_dev *edev = netdev_priv(dev); 1070 u32 count; 1071 1072 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1073 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 1074 channels->rx_count, channels->tx_count, 1075 channels->other_count, channels->combined_count); 1076 1077 count = channels->rx_count + channels->tx_count + 1078 channels->combined_count; 1079 1080 /* We don't support `other' channels */ 1081 if (channels->other_count) { 1082 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1083 "command parameters not supported\n"); 1084 return -EINVAL; 1085 } 1086 1087 if (!(channels->combined_count || (channels->rx_count && 1088 channels->tx_count))) { 1089 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1090 "need to request at least one transmit and one receive channel\n"); 1091 return -EINVAL; 1092 } 1093 1094 if (count > QEDE_MAX_RSS_CNT(edev)) { 1095 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1096 "requested channels = %d max supported channels = %d\n", 1097 count, QEDE_MAX_RSS_CNT(edev)); 1098 return -EINVAL; 1099 } 1100 1101 /* Check if there was a change in the active parameters */ 1102 if ((count == QEDE_QUEUE_CNT(edev)) && 1103 (channels->tx_count == edev->fp_num_tx) && 1104 (channels->rx_count == edev->fp_num_rx)) { 1105 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1106 "No change in active parameters\n"); 1107 return 0; 1108 } 1109 1110 /* We need the number of queues to be divisible between the hwfns */ 1111 if ((count % edev->dev_info.common.num_hwfns) || 1112 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1113 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1114 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1115 "Number of channels must be divisible by %04x\n", 1116 edev->dev_info.common.num_hwfns); 1117 return -EINVAL; 1118 } 1119 1120 /* Set number of queues and reload if necessary */ 1121 edev->req_queues = count; 1122 edev->req_num_tx = channels->tx_count; 1123 edev->req_num_rx = channels->rx_count; 1124 /* Reset the indirection table if rx queue count is updated */ 1125 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1126 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1127 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1128 } 1129 1130 qede_reload(edev, NULL, false); 1131 1132 return 0; 1133 } 1134 1135 static int qede_get_ts_info(struct net_device *dev, 1136 struct ethtool_ts_info *info) 1137 { 1138 struct qede_dev *edev = netdev_priv(dev); 1139 1140 return qede_ptp_get_ts_info(edev, info); 1141 } 1142 1143 static int qede_set_phys_id(struct net_device *dev, 1144 enum ethtool_phys_id_state state) 1145 { 1146 struct qede_dev *edev = netdev_priv(dev); 1147 u8 led_state = 0; 1148 1149 switch (state) { 1150 case ETHTOOL_ID_ACTIVE: 1151 return 1; /* cycle on/off once per second */ 1152 1153 case ETHTOOL_ID_ON: 1154 led_state = QED_LED_MODE_ON; 1155 break; 1156 1157 case ETHTOOL_ID_OFF: 1158 led_state = QED_LED_MODE_OFF; 1159 break; 1160 1161 case ETHTOOL_ID_INACTIVE: 1162 led_state = QED_LED_MODE_RESTORE; 1163 break; 1164 } 1165 1166 edev->ops->common->set_led(edev->cdev, led_state); 1167 1168 return 0; 1169 } 1170 1171 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1172 { 1173 info->data = RXH_IP_SRC | RXH_IP_DST; 1174 1175 switch (info->flow_type) { 1176 case TCP_V4_FLOW: 1177 case TCP_V6_FLOW: 1178 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1179 break; 1180 case UDP_V4_FLOW: 1181 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1182 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1183 break; 1184 case UDP_V6_FLOW: 1185 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1186 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1187 break; 1188 case IPV4_FLOW: 1189 case IPV6_FLOW: 1190 break; 1191 default: 1192 info->data = 0; 1193 break; 1194 } 1195 1196 return 0; 1197 } 1198 1199 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1200 u32 *rule_locs) 1201 { 1202 struct qede_dev *edev = netdev_priv(dev); 1203 int rc = 0; 1204 1205 switch (info->cmd) { 1206 case ETHTOOL_GRXRINGS: 1207 info->data = QEDE_RSS_COUNT(edev); 1208 break; 1209 case ETHTOOL_GRXFH: 1210 rc = qede_get_rss_flags(edev, info); 1211 break; 1212 case ETHTOOL_GRXCLSRLCNT: 1213 info->rule_cnt = qede_get_arfs_filter_count(edev); 1214 info->data = QEDE_RFS_MAX_FLTR; 1215 break; 1216 case ETHTOOL_GRXCLSRULE: 1217 rc = qede_get_cls_rule_entry(edev, info); 1218 break; 1219 case ETHTOOL_GRXCLSRLALL: 1220 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1221 break; 1222 default: 1223 DP_ERR(edev, "Command parameters not supported\n"); 1224 rc = -EOPNOTSUPP; 1225 } 1226 1227 return rc; 1228 } 1229 1230 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1231 { 1232 struct qed_update_vport_params *vport_update_params; 1233 u8 set_caps = 0, clr_caps = 0; 1234 int rc = 0; 1235 1236 DP_VERBOSE(edev, QED_MSG_DEBUG, 1237 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1238 info->flow_type, info->data); 1239 1240 switch (info->flow_type) { 1241 case TCP_V4_FLOW: 1242 case TCP_V6_FLOW: 1243 /* For TCP only 4-tuple hash is supported */ 1244 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1245 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1246 DP_INFO(edev, "Command parameters not supported\n"); 1247 return -EINVAL; 1248 } 1249 return 0; 1250 case UDP_V4_FLOW: 1251 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1252 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1253 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1254 set_caps = QED_RSS_IPV4_UDP; 1255 DP_VERBOSE(edev, QED_MSG_DEBUG, 1256 "UDP 4-tuple enabled\n"); 1257 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1258 clr_caps = QED_RSS_IPV4_UDP; 1259 DP_VERBOSE(edev, QED_MSG_DEBUG, 1260 "UDP 4-tuple disabled\n"); 1261 } else { 1262 return -EINVAL; 1263 } 1264 break; 1265 case UDP_V6_FLOW: 1266 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1267 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1268 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1269 set_caps = QED_RSS_IPV6_UDP; 1270 DP_VERBOSE(edev, QED_MSG_DEBUG, 1271 "UDP 4-tuple enabled\n"); 1272 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1273 clr_caps = QED_RSS_IPV6_UDP; 1274 DP_VERBOSE(edev, QED_MSG_DEBUG, 1275 "UDP 4-tuple disabled\n"); 1276 } else { 1277 return -EINVAL; 1278 } 1279 break; 1280 case IPV4_FLOW: 1281 case IPV6_FLOW: 1282 /* For IP only 2-tuple hash is supported */ 1283 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1284 DP_INFO(edev, "Command parameters not supported\n"); 1285 return -EINVAL; 1286 } 1287 return 0; 1288 case SCTP_V4_FLOW: 1289 case AH_ESP_V4_FLOW: 1290 case AH_V4_FLOW: 1291 case ESP_V4_FLOW: 1292 case SCTP_V6_FLOW: 1293 case AH_ESP_V6_FLOW: 1294 case AH_V6_FLOW: 1295 case ESP_V6_FLOW: 1296 case IP_USER_FLOW: 1297 case ETHER_FLOW: 1298 /* RSS is not supported for these protocols */ 1299 if (info->data) { 1300 DP_INFO(edev, "Command parameters not supported\n"); 1301 return -EINVAL; 1302 } 1303 return 0; 1304 default: 1305 return -EINVAL; 1306 } 1307 1308 /* No action is needed if there is no change in the rss capability */ 1309 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1310 return 0; 1311 1312 /* Update internal configuration */ 1313 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1314 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1315 1316 /* Re-configure if possible */ 1317 __qede_lock(edev); 1318 if (edev->state == QEDE_STATE_OPEN) { 1319 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1320 if (!vport_update_params) { 1321 __qede_unlock(edev); 1322 return -ENOMEM; 1323 } 1324 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1325 &vport_update_params->update_rss_flg); 1326 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1327 vfree(vport_update_params); 1328 } 1329 __qede_unlock(edev); 1330 1331 return rc; 1332 } 1333 1334 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1335 { 1336 struct qede_dev *edev = netdev_priv(dev); 1337 int rc; 1338 1339 switch (info->cmd) { 1340 case ETHTOOL_SRXFH: 1341 rc = qede_set_rss_flags(edev, info); 1342 break; 1343 case ETHTOOL_SRXCLSRLINS: 1344 rc = qede_add_cls_rule(edev, info); 1345 break; 1346 case ETHTOOL_SRXCLSRLDEL: 1347 rc = qede_delete_flow_filter(edev, info->fs.location); 1348 break; 1349 default: 1350 DP_INFO(edev, "Command parameters not supported\n"); 1351 rc = -EOPNOTSUPP; 1352 } 1353 1354 return rc; 1355 } 1356 1357 static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1358 { 1359 return QED_RSS_IND_TABLE_SIZE; 1360 } 1361 1362 static u32 qede_get_rxfh_key_size(struct net_device *dev) 1363 { 1364 struct qede_dev *edev = netdev_priv(dev); 1365 1366 return sizeof(edev->rss_key); 1367 } 1368 1369 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1370 { 1371 struct qede_dev *edev = netdev_priv(dev); 1372 int i; 1373 1374 if (hfunc) 1375 *hfunc = ETH_RSS_HASH_TOP; 1376 1377 if (!indir) 1378 return 0; 1379 1380 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1381 indir[i] = edev->rss_ind_table[i]; 1382 1383 if (key) 1384 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1385 1386 return 0; 1387 } 1388 1389 static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1390 const u8 *key, const u8 hfunc) 1391 { 1392 struct qed_update_vport_params *vport_update_params; 1393 struct qede_dev *edev = netdev_priv(dev); 1394 int i, rc = 0; 1395 1396 if (edev->dev_info.common.num_hwfns > 1) { 1397 DP_INFO(edev, 1398 "RSS configuration is not supported for 100G devices\n"); 1399 return -EOPNOTSUPP; 1400 } 1401 1402 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1403 return -EOPNOTSUPP; 1404 1405 if (!indir && !key) 1406 return 0; 1407 1408 if (indir) { 1409 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1410 edev->rss_ind_table[i] = indir[i]; 1411 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1412 } 1413 1414 if (key) { 1415 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1416 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1417 } 1418 1419 __qede_lock(edev); 1420 if (edev->state == QEDE_STATE_OPEN) { 1421 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1422 if (!vport_update_params) { 1423 __qede_unlock(edev); 1424 return -ENOMEM; 1425 } 1426 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1427 &vport_update_params->update_rss_flg); 1428 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1429 vfree(vport_update_params); 1430 } 1431 __qede_unlock(edev); 1432 1433 return rc; 1434 } 1435 1436 /* This function enables the interrupt generation and the NAPI on the device */ 1437 static void qede_netif_start(struct qede_dev *edev) 1438 { 1439 int i; 1440 1441 if (!netif_running(edev->ndev)) 1442 return; 1443 1444 for_each_queue(i) { 1445 /* Update and reenable interrupts */ 1446 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1447 napi_enable(&edev->fp_array[i].napi); 1448 } 1449 } 1450 1451 /* This function disables the NAPI and the interrupt generation on the device */ 1452 static void qede_netif_stop(struct qede_dev *edev) 1453 { 1454 int i; 1455 1456 for_each_queue(i) { 1457 napi_disable(&edev->fp_array[i].napi); 1458 /* Disable interrupts */ 1459 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1460 } 1461 } 1462 1463 static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1464 struct sk_buff *skb) 1465 { 1466 struct qede_tx_queue *txq = NULL; 1467 struct eth_tx_1st_bd *first_bd; 1468 dma_addr_t mapping; 1469 int i, idx; 1470 u16 val; 1471 1472 for_each_queue(i) { 1473 struct qede_fastpath *fp = &edev->fp_array[i]; 1474 1475 if (fp->type & QEDE_FASTPATH_TX) { 1476 txq = QEDE_FP_TC0_TXQ(fp); 1477 break; 1478 } 1479 } 1480 1481 if (!txq) { 1482 DP_NOTICE(edev, "Tx path is not available\n"); 1483 return -1; 1484 } 1485 1486 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1487 idx = txq->sw_tx_prod; 1488 txq->sw_tx_ring.skbs[idx].skb = skb; 1489 first_bd = qed_chain_produce(&txq->tx_pbl); 1490 memset(first_bd, 0, sizeof(*first_bd)); 1491 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1492 first_bd->data.bd_flags.bitfields = val; 1493 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1494 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1495 first_bd->data.bitfields |= cpu_to_le16(val); 1496 1497 /* Map skb linear data for DMA and set in the first BD */ 1498 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1499 skb_headlen(skb), DMA_TO_DEVICE); 1500 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1501 DP_NOTICE(edev, "SKB mapping failed\n"); 1502 return -ENOMEM; 1503 } 1504 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1505 1506 /* update the first BD with the actual num BDs */ 1507 first_bd->data.nbds = 1; 1508 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1509 /* 'next page' entries are counted in the producer value */ 1510 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1511 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1512 1513 /* wmb makes sure that the BDs data is updated before updating the 1514 * producer, otherwise FW may read old data from the BDs. 1515 */ 1516 wmb(); 1517 barrier(); 1518 writel(txq->tx_db.raw, txq->doorbell_addr); 1519 1520 /* mmiowb is needed to synchronize doorbell writes from more than one 1521 * processor. It guarantees that the write arrives to the device before 1522 * the queue lock is released and another start_xmit is called (possibly 1523 * on another CPU). Without this barrier, the next doorbell can bypass 1524 * this doorbell. This is applicable to IA64/Altix systems. 1525 */ 1526 mmiowb(); 1527 1528 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1529 if (qede_txq_has_work(txq)) 1530 break; 1531 usleep_range(100, 200); 1532 } 1533 1534 if (!qede_txq_has_work(txq)) { 1535 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1536 return -1; 1537 } 1538 1539 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1540 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1541 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1542 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1543 txq->sw_tx_ring.skbs[idx].skb = NULL; 1544 1545 return 0; 1546 } 1547 1548 static int qede_selftest_receive_traffic(struct qede_dev *edev) 1549 { 1550 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len; 1551 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1552 struct qede_rx_queue *rxq = NULL; 1553 struct sw_rx_data *sw_rx_data; 1554 union eth_rx_cqe *cqe; 1555 int i, iter, rc = 0; 1556 u8 *data_ptr; 1557 1558 for_each_queue(i) { 1559 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1560 rxq = edev->fp_array[i].rxq; 1561 break; 1562 } 1563 } 1564 1565 if (!rxq) { 1566 DP_NOTICE(edev, "Rx path is not available\n"); 1567 return -1; 1568 } 1569 1570 /* The packet is expected to receive on rx-queue 0 even though RSS is 1571 * enabled. This is because the queue 0 is configured as the default 1572 * queue and that the loopback traffic is not IP. 1573 */ 1574 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1575 if (!qede_has_rx_work(rxq)) { 1576 usleep_range(100, 200); 1577 continue; 1578 } 1579 1580 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1581 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1582 1583 /* Memory barrier to prevent the CPU from doing speculative 1584 * reads of CQE/BD before reading hw_comp_cons. If the CQE is 1585 * read before it is written by FW, then FW writes CQE and SB, 1586 * and then the CPU reads the hw_comp_cons, it will use an old 1587 * CQE. 1588 */ 1589 rmb(); 1590 1591 /* Get the CQE from the completion ring */ 1592 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1593 1594 /* Get the data from the SW ring */ 1595 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1596 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1597 fp_cqe = &cqe->fast_path_regular; 1598 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1599 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1600 fp_cqe->placement_offset + 1601 sw_rx_data->page_offset + 1602 rxq->rx_headroom); 1603 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1604 ether_addr_equal(data_ptr + ETH_ALEN, 1605 edev->ndev->dev_addr)) { 1606 for (i = ETH_HLEN; i < len; i++) 1607 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1608 rc = -1; 1609 break; 1610 } 1611 1612 qede_recycle_rx_bd_ring(rxq, 1); 1613 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1614 break; 1615 } 1616 1617 DP_INFO(edev, "Not the transmitted packet\n"); 1618 qede_recycle_rx_bd_ring(rxq, 1); 1619 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1620 } 1621 1622 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1623 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1624 return -1; 1625 } 1626 1627 qede_update_rx_prod(edev, rxq); 1628 1629 return rc; 1630 } 1631 1632 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1633 { 1634 struct qed_link_params link_params; 1635 struct sk_buff *skb = NULL; 1636 int rc = 0, i; 1637 u32 pkt_size; 1638 u8 *packet; 1639 1640 if (!netif_running(edev->ndev)) { 1641 DP_NOTICE(edev, "Interface is down\n"); 1642 return -EINVAL; 1643 } 1644 1645 qede_netif_stop(edev); 1646 1647 /* Bring up the link in Loopback mode */ 1648 memset(&link_params, 0, sizeof(link_params)); 1649 link_params.link_up = true; 1650 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1651 link_params.loopback_mode = loopback_mode; 1652 edev->ops->common->set_link(edev->cdev, &link_params); 1653 1654 /* Wait for loopback configuration to apply */ 1655 msleep_interruptible(500); 1656 1657 /* prepare the loopback packet */ 1658 pkt_size = edev->ndev->mtu + ETH_HLEN; 1659 1660 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1661 if (!skb) { 1662 DP_INFO(edev, "Can't allocate skb\n"); 1663 rc = -ENOMEM; 1664 goto test_loopback_exit; 1665 } 1666 packet = skb_put(skb, pkt_size); 1667 ether_addr_copy(packet, edev->ndev->dev_addr); 1668 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1669 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1670 for (i = ETH_HLEN; i < pkt_size; i++) 1671 packet[i] = (unsigned char)(i & 0xff); 1672 1673 rc = qede_selftest_transmit_traffic(edev, skb); 1674 if (rc) 1675 goto test_loopback_exit; 1676 1677 rc = qede_selftest_receive_traffic(edev); 1678 if (rc) 1679 goto test_loopback_exit; 1680 1681 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1682 1683 test_loopback_exit: 1684 dev_kfree_skb(skb); 1685 1686 /* Bring up the link in Normal mode */ 1687 memset(&link_params, 0, sizeof(link_params)); 1688 link_params.link_up = true; 1689 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1690 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1691 edev->ops->common->set_link(edev->cdev, &link_params); 1692 1693 /* Wait for loopback configuration to apply */ 1694 msleep_interruptible(500); 1695 1696 qede_netif_start(edev); 1697 1698 return rc; 1699 } 1700 1701 static void qede_self_test(struct net_device *dev, 1702 struct ethtool_test *etest, u64 *buf) 1703 { 1704 struct qede_dev *edev = netdev_priv(dev); 1705 1706 DP_VERBOSE(edev, QED_MSG_DEBUG, 1707 "Self-test command parameters: offline = %d, external_lb = %d\n", 1708 (etest->flags & ETH_TEST_FL_OFFLINE), 1709 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1710 1711 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1712 1713 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1714 if (qede_selftest_run_loopback(edev, 1715 QED_LINK_LOOPBACK_INT_PHY)) { 1716 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1717 etest->flags |= ETH_TEST_FL_FAILED; 1718 } 1719 } 1720 1721 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1722 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1723 etest->flags |= ETH_TEST_FL_FAILED; 1724 } 1725 1726 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1727 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1728 etest->flags |= ETH_TEST_FL_FAILED; 1729 } 1730 1731 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1732 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1733 etest->flags |= ETH_TEST_FL_FAILED; 1734 } 1735 1736 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1737 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1738 etest->flags |= ETH_TEST_FL_FAILED; 1739 } 1740 1741 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1742 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1743 etest->flags |= ETH_TEST_FL_FAILED; 1744 } 1745 } 1746 1747 static int qede_set_tunable(struct net_device *dev, 1748 const struct ethtool_tunable *tuna, 1749 const void *data) 1750 { 1751 struct qede_dev *edev = netdev_priv(dev); 1752 u32 val; 1753 1754 switch (tuna->id) { 1755 case ETHTOOL_RX_COPYBREAK: 1756 val = *(u32 *)data; 1757 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1758 DP_VERBOSE(edev, QED_MSG_DEBUG, 1759 "Invalid rx copy break value, range is [%u, %u]", 1760 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1761 return -EINVAL; 1762 } 1763 1764 edev->rx_copybreak = *(u32 *)data; 1765 break; 1766 default: 1767 return -EOPNOTSUPP; 1768 } 1769 1770 return 0; 1771 } 1772 1773 static int qede_get_tunable(struct net_device *dev, 1774 const struct ethtool_tunable *tuna, void *data) 1775 { 1776 struct qede_dev *edev = netdev_priv(dev); 1777 1778 switch (tuna->id) { 1779 case ETHTOOL_RX_COPYBREAK: 1780 *(u32 *)data = edev->rx_copybreak; 1781 break; 1782 default: 1783 return -EOPNOTSUPP; 1784 } 1785 1786 return 0; 1787 } 1788 1789 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1790 { 1791 struct qede_dev *edev = netdev_priv(dev); 1792 struct qed_link_output current_link; 1793 1794 memset(¤t_link, 0, sizeof(current_link)); 1795 edev->ops->common->get_link(edev->cdev, ¤t_link); 1796 1797 if (!current_link.eee_supported) { 1798 DP_INFO(edev, "EEE is not supported\n"); 1799 return -EOPNOTSUPP; 1800 } 1801 1802 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1803 edata->advertised = ADVERTISED_1000baseT_Full; 1804 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1805 edata->advertised |= ADVERTISED_10000baseT_Full; 1806 if (current_link.sup_caps & QED_EEE_1G_ADV) 1807 edata->supported = ADVERTISED_1000baseT_Full; 1808 if (current_link.sup_caps & QED_EEE_10G_ADV) 1809 edata->supported |= ADVERTISED_10000baseT_Full; 1810 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1811 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1812 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1813 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1814 1815 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1816 edata->eee_enabled = current_link.eee.enable; 1817 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1818 edata->eee_active = current_link.eee_active; 1819 1820 return 0; 1821 } 1822 1823 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1824 { 1825 struct qede_dev *edev = netdev_priv(dev); 1826 struct qed_link_output current_link; 1827 struct qed_link_params params; 1828 1829 if (!edev->ops->common->can_link_change(edev->cdev)) { 1830 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1831 return -EOPNOTSUPP; 1832 } 1833 1834 memset(¤t_link, 0, sizeof(current_link)); 1835 edev->ops->common->get_link(edev->cdev, ¤t_link); 1836 1837 if (!current_link.eee_supported) { 1838 DP_INFO(edev, "EEE is not supported\n"); 1839 return -EOPNOTSUPP; 1840 } 1841 1842 memset(¶ms, 0, sizeof(params)); 1843 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1844 1845 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1846 ADVERTISED_10000baseT_Full)) || 1847 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1848 ADVERTISED_10000baseT_Full)) != 1849 edata->advertised)) { 1850 DP_VERBOSE(edev, QED_MSG_DEBUG, 1851 "Invalid advertised capabilities %d\n", 1852 edata->advertised); 1853 return -EINVAL; 1854 } 1855 1856 if (edata->advertised & ADVERTISED_1000baseT_Full) 1857 params.eee.adv_caps = QED_EEE_1G_ADV; 1858 if (edata->advertised & ADVERTISED_10000baseT_Full) 1859 params.eee.adv_caps |= QED_EEE_10G_ADV; 1860 params.eee.enable = edata->eee_enabled; 1861 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1862 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1863 1864 params.link_up = true; 1865 edev->ops->common->set_link(edev->cdev, ¶ms); 1866 1867 return 0; 1868 } 1869 1870 static int qede_get_module_info(struct net_device *dev, 1871 struct ethtool_modinfo *modinfo) 1872 { 1873 struct qede_dev *edev = netdev_priv(dev); 1874 u8 buf[4]; 1875 int rc; 1876 1877 /* Read first 4 bytes to find the sfp type */ 1878 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1879 QED_I2C_DEV_ADDR_A0, 0, 4); 1880 if (rc) { 1881 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc); 1882 return rc; 1883 } 1884 1885 switch (buf[0]) { 1886 case 0x3: /* SFP, SFP+, SFP-28 */ 1887 modinfo->type = ETH_MODULE_SFF_8472; 1888 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1889 break; 1890 case 0xc: /* QSFP */ 1891 case 0xd: /* QSFP+ */ 1892 modinfo->type = ETH_MODULE_SFF_8436; 1893 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1894 break; 1895 case 0x11: /* QSFP-28 */ 1896 modinfo->type = ETH_MODULE_SFF_8636; 1897 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1898 break; 1899 default: 1900 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]); 1901 return -EINVAL; 1902 } 1903 1904 return 0; 1905 } 1906 1907 static int qede_get_module_eeprom(struct net_device *dev, 1908 struct ethtool_eeprom *ee, u8 *data) 1909 { 1910 struct qede_dev *edev = netdev_priv(dev); 1911 u32 start_addr = ee->offset, size = 0; 1912 u8 *buf = data; 1913 int rc = 0; 1914 1915 /* Read A0 section */ 1916 if (ee->offset < ETH_MODULE_SFF_8079_LEN) { 1917 /* Limit transfer size to the A0 section boundary */ 1918 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN) 1919 size = ETH_MODULE_SFF_8079_LEN - ee->offset; 1920 else 1921 size = ee->len; 1922 1923 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1924 QED_I2C_DEV_ADDR_A0, 1925 start_addr, size); 1926 if (rc) { 1927 DP_ERR(edev, "Failed reading A0 section %d\n", rc); 1928 return rc; 1929 } 1930 1931 buf += size; 1932 start_addr += size; 1933 } 1934 1935 /* Read A2 section */ 1936 if (start_addr >= ETH_MODULE_SFF_8079_LEN && 1937 start_addr < ETH_MODULE_SFF_8472_LEN) { 1938 size = ee->len - size; 1939 /* Limit transfer size to the A2 section boundary */ 1940 if (start_addr + size > ETH_MODULE_SFF_8472_LEN) 1941 size = ETH_MODULE_SFF_8472_LEN - start_addr; 1942 start_addr -= ETH_MODULE_SFF_8079_LEN; 1943 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1944 QED_I2C_DEV_ADDR_A2, 1945 start_addr, size); 1946 if (rc) { 1947 DP_VERBOSE(edev, QED_MSG_DEBUG, 1948 "Failed reading A2 section %d\n", rc); 1949 return 0; 1950 } 1951 } 1952 1953 return rc; 1954 } 1955 1956 static const struct ethtool_ops qede_ethtool_ops = { 1957 .get_link_ksettings = qede_get_link_ksettings, 1958 .set_link_ksettings = qede_set_link_ksettings, 1959 .get_drvinfo = qede_get_drvinfo, 1960 .get_regs_len = qede_get_regs_len, 1961 .get_regs = qede_get_regs, 1962 .get_wol = qede_get_wol, 1963 .set_wol = qede_set_wol, 1964 .get_msglevel = qede_get_msglevel, 1965 .set_msglevel = qede_set_msglevel, 1966 .nway_reset = qede_nway_reset, 1967 .get_link = qede_get_link, 1968 .get_coalesce = qede_get_coalesce, 1969 .set_coalesce = qede_set_coalesce, 1970 .get_ringparam = qede_get_ringparam, 1971 .set_ringparam = qede_set_ringparam, 1972 .get_pauseparam = qede_get_pauseparam, 1973 .set_pauseparam = qede_set_pauseparam, 1974 .get_strings = qede_get_strings, 1975 .set_phys_id = qede_set_phys_id, 1976 .get_ethtool_stats = qede_get_ethtool_stats, 1977 .get_priv_flags = qede_get_priv_flags, 1978 .get_sset_count = qede_get_sset_count, 1979 .get_rxnfc = qede_get_rxnfc, 1980 .set_rxnfc = qede_set_rxnfc, 1981 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 1982 .get_rxfh_key_size = qede_get_rxfh_key_size, 1983 .get_rxfh = qede_get_rxfh, 1984 .set_rxfh = qede_set_rxfh, 1985 .get_ts_info = qede_get_ts_info, 1986 .get_channels = qede_get_channels, 1987 .set_channels = qede_set_channels, 1988 .self_test = qede_self_test, 1989 .get_module_info = qede_get_module_info, 1990 .get_module_eeprom = qede_get_module_eeprom, 1991 .get_eee = qede_get_eee, 1992 .set_eee = qede_set_eee, 1993 1994 .get_tunable = qede_get_tunable, 1995 .set_tunable = qede_set_tunable, 1996 .flash_device = qede_flash_device, 1997 }; 1998 1999 static const struct ethtool_ops qede_vf_ethtool_ops = { 2000 .get_link_ksettings = qede_get_link_ksettings, 2001 .get_drvinfo = qede_get_drvinfo, 2002 .get_msglevel = qede_get_msglevel, 2003 .set_msglevel = qede_set_msglevel, 2004 .get_link = qede_get_link, 2005 .get_coalesce = qede_get_coalesce, 2006 .set_coalesce = qede_set_coalesce, 2007 .get_ringparam = qede_get_ringparam, 2008 .set_ringparam = qede_set_ringparam, 2009 .get_strings = qede_get_strings, 2010 .get_ethtool_stats = qede_get_ethtool_stats, 2011 .get_priv_flags = qede_get_priv_flags, 2012 .get_sset_count = qede_get_sset_count, 2013 .get_rxnfc = qede_get_rxnfc, 2014 .set_rxnfc = qede_set_rxnfc, 2015 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2016 .get_rxfh_key_size = qede_get_rxfh_key_size, 2017 .get_rxfh = qede_get_rxfh, 2018 .set_rxfh = qede_set_rxfh, 2019 .get_channels = qede_get_channels, 2020 .set_channels = qede_set_channels, 2021 .get_tunable = qede_get_tunable, 2022 .set_tunable = qede_set_tunable, 2023 }; 2024 2025 void qede_set_ethtool_ops(struct net_device *dev) 2026 { 2027 struct qede_dev *edev = netdev_priv(dev); 2028 2029 if (IS_VF(edev)) 2030 dev->ethtool_ops = &qede_vf_ethtool_ops; 2031 else 2032 dev->ethtool_ops = &qede_ethtool_ops; 2033 } 2034