1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/version.h> 33 #include <linux/types.h> 34 #include <linux/netdevice.h> 35 #include <linux/etherdevice.h> 36 #include <linux/ethtool.h> 37 #include <linux/string.h> 38 #include <linux/pci.h> 39 #include <linux/capability.h> 40 #include <linux/vmalloc.h> 41 #include "qede.h" 42 #include "qede_ptp.h" 43 44 #define QEDE_RQSTAT_OFFSET(stat_name) \ 45 (offsetof(struct qede_rx_queue, stat_name)) 46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 47 #define QEDE_RQSTAT(stat_name) \ 48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 49 50 #define QEDE_SELFTEST_POLL_COUNT 100 51 52 static const struct { 53 u64 offset; 54 char string[ETH_GSTRING_LEN]; 55 } qede_rqstats_arr[] = { 56 QEDE_RQSTAT(rcv_pkts), 57 QEDE_RQSTAT(rx_hw_errors), 58 QEDE_RQSTAT(rx_alloc_errors), 59 QEDE_RQSTAT(rx_ip_frags), 60 QEDE_RQSTAT(xdp_no_pass), 61 }; 62 63 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 64 #define QEDE_TQSTAT_OFFSET(stat_name) \ 65 (offsetof(struct qede_tx_queue, stat_name)) 66 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 67 #define QEDE_TQSTAT(stat_name) \ 68 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 69 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 70 static const struct { 71 u64 offset; 72 char string[ETH_GSTRING_LEN]; 73 } qede_tqstats_arr[] = { 74 QEDE_TQSTAT(xmit_pkts), 75 QEDE_TQSTAT(stopped_cnt), 76 QEDE_TQSTAT(tx_mem_alloc_err), 77 }; 78 79 #define QEDE_STAT_OFFSET(stat_name, type, base) \ 80 (offsetof(type, stat_name) + (base)) 81 #define QEDE_STAT_STRING(stat_name) (#stat_name) 82 #define _QEDE_STAT(stat_name, type, base, attr) \ 83 {QEDE_STAT_OFFSET(stat_name, type, base), \ 84 QEDE_STAT_STRING(stat_name), \ 85 attr} 86 #define QEDE_STAT(stat_name) \ 87 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 88 #define QEDE_PF_STAT(stat_name) \ 89 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 90 BIT(QEDE_STAT_PF_ONLY)) 91 #define QEDE_PF_BB_STAT(stat_name) \ 92 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 93 offsetof(struct qede_stats, bb), \ 94 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 95 #define QEDE_PF_AH_STAT(stat_name) \ 96 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 97 offsetof(struct qede_stats, ah), \ 98 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 99 static const struct { 100 u64 offset; 101 char string[ETH_GSTRING_LEN]; 102 unsigned long attr; 103 #define QEDE_STAT_PF_ONLY 0 104 #define QEDE_STAT_BB_ONLY 1 105 #define QEDE_STAT_AH_ONLY 2 106 } qede_stats_arr[] = { 107 QEDE_STAT(rx_ucast_bytes), 108 QEDE_STAT(rx_mcast_bytes), 109 QEDE_STAT(rx_bcast_bytes), 110 QEDE_STAT(rx_ucast_pkts), 111 QEDE_STAT(rx_mcast_pkts), 112 QEDE_STAT(rx_bcast_pkts), 113 114 QEDE_STAT(tx_ucast_bytes), 115 QEDE_STAT(tx_mcast_bytes), 116 QEDE_STAT(tx_bcast_bytes), 117 QEDE_STAT(tx_ucast_pkts), 118 QEDE_STAT(tx_mcast_pkts), 119 QEDE_STAT(tx_bcast_pkts), 120 121 QEDE_PF_STAT(rx_64_byte_packets), 122 QEDE_PF_STAT(rx_65_to_127_byte_packets), 123 QEDE_PF_STAT(rx_128_to_255_byte_packets), 124 QEDE_PF_STAT(rx_256_to_511_byte_packets), 125 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 126 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 127 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 128 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 129 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 130 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 131 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 132 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 133 QEDE_PF_STAT(tx_64_byte_packets), 134 QEDE_PF_STAT(tx_65_to_127_byte_packets), 135 QEDE_PF_STAT(tx_128_to_255_byte_packets), 136 QEDE_PF_STAT(tx_256_to_511_byte_packets), 137 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 138 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 139 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 140 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 141 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 142 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 143 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 144 QEDE_PF_STAT(rx_mac_crtl_frames), 145 QEDE_PF_STAT(tx_mac_ctrl_frames), 146 QEDE_PF_STAT(rx_pause_frames), 147 QEDE_PF_STAT(tx_pause_frames), 148 QEDE_PF_STAT(rx_pfc_frames), 149 QEDE_PF_STAT(tx_pfc_frames), 150 151 QEDE_PF_STAT(rx_crc_errors), 152 QEDE_PF_STAT(rx_align_errors), 153 QEDE_PF_STAT(rx_carrier_errors), 154 QEDE_PF_STAT(rx_oversize_packets), 155 QEDE_PF_STAT(rx_jabbers), 156 QEDE_PF_STAT(rx_undersize_packets), 157 QEDE_PF_STAT(rx_fragments), 158 QEDE_PF_BB_STAT(tx_lpi_entry_count), 159 QEDE_PF_BB_STAT(tx_total_collisions), 160 QEDE_PF_STAT(brb_truncates), 161 QEDE_PF_STAT(brb_discards), 162 QEDE_STAT(no_buff_discards), 163 QEDE_PF_STAT(mftag_filter_discards), 164 QEDE_PF_STAT(mac_filter_discards), 165 QEDE_PF_STAT(gft_filter_drop), 166 QEDE_STAT(tx_err_drop_pkts), 167 QEDE_STAT(ttl0_discard), 168 QEDE_STAT(packet_too_big_discard), 169 170 QEDE_STAT(coalesced_pkts), 171 QEDE_STAT(coalesced_events), 172 QEDE_STAT(coalesced_aborts_num), 173 QEDE_STAT(non_coalesced_pkts), 174 QEDE_STAT(coalesced_bytes), 175 176 QEDE_STAT(link_change_count), 177 }; 178 179 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 180 #define QEDE_STAT_IS_PF_ONLY(i) \ 181 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 182 #define QEDE_STAT_IS_BB_ONLY(i) \ 183 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 184 #define QEDE_STAT_IS_AH_ONLY(i) \ 185 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 186 187 enum { 188 QEDE_PRI_FLAG_CMT, 189 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */ 190 QEDE_PRI_FLAG_LEN, 191 }; 192 193 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 194 "Coupled-Function", 195 "SmartAN capable", 196 }; 197 198 enum qede_ethtool_tests { 199 QEDE_ETHTOOL_INT_LOOPBACK, 200 QEDE_ETHTOOL_INTERRUPT_TEST, 201 QEDE_ETHTOOL_MEMORY_TEST, 202 QEDE_ETHTOOL_REGISTER_TEST, 203 QEDE_ETHTOOL_CLOCK_TEST, 204 QEDE_ETHTOOL_NVRAM_TEST, 205 QEDE_ETHTOOL_TEST_MAX 206 }; 207 208 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 209 "Internal loopback (offline)", 210 "Interrupt (online)\t", 211 "Memory (online)\t\t", 212 "Register (online)\t", 213 "Clock (online)\t\t", 214 "Nvram (online)\t\t", 215 }; 216 217 static void qede_get_strings_stats_txq(struct qede_dev *edev, 218 struct qede_tx_queue *txq, u8 **buf) 219 { 220 int i; 221 222 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 223 if (txq->is_xdp) 224 sprintf(*buf, "%d [XDP]: %s", 225 QEDE_TXQ_XDP_TO_IDX(edev, txq), 226 qede_tqstats_arr[i].string); 227 else 228 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos, 229 qede_tqstats_arr[i].string); 230 *buf += ETH_GSTRING_LEN; 231 } 232 } 233 234 static void qede_get_strings_stats_rxq(struct qede_dev *edev, 235 struct qede_rx_queue *rxq, u8 **buf) 236 { 237 int i; 238 239 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 240 sprintf(*buf, "%d: %s", rxq->rxq_id, 241 qede_rqstats_arr[i].string); 242 *buf += ETH_GSTRING_LEN; 243 } 244 } 245 246 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 247 { 248 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 249 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 250 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 251 } 252 253 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 254 { 255 struct qede_fastpath *fp; 256 int i; 257 258 /* Account for queue statistics */ 259 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 260 fp = &edev->fp_array[i]; 261 262 if (fp->type & QEDE_FASTPATH_RX) 263 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 264 265 if (fp->type & QEDE_FASTPATH_XDP) 266 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 267 268 if (fp->type & QEDE_FASTPATH_TX) { 269 int cos; 270 271 for_each_cos_in_txq(edev, cos) 272 qede_get_strings_stats_txq(edev, 273 &fp->txq[cos], &buf); 274 } 275 } 276 277 /* Account for non-queue statistics */ 278 for (i = 0; i < QEDE_NUM_STATS; i++) { 279 if (qede_is_irrelevant_stat(edev, i)) 280 continue; 281 strcpy(buf, qede_stats_arr[i].string); 282 buf += ETH_GSTRING_LEN; 283 } 284 } 285 286 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 287 { 288 struct qede_dev *edev = netdev_priv(dev); 289 290 switch (stringset) { 291 case ETH_SS_STATS: 292 qede_get_strings_stats(edev, buf); 293 break; 294 case ETH_SS_PRIV_FLAGS: 295 memcpy(buf, qede_private_arr, 296 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 297 break; 298 case ETH_SS_TEST: 299 memcpy(buf, qede_tests_str_arr, 300 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 301 break; 302 default: 303 DP_VERBOSE(edev, QED_MSG_DEBUG, 304 "Unsupported stringset 0x%08x\n", stringset); 305 } 306 } 307 308 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 309 { 310 int i; 311 312 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 313 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 314 (*buf)++; 315 } 316 } 317 318 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 319 { 320 int i; 321 322 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 323 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 324 (*buf)++; 325 } 326 } 327 328 static void qede_get_ethtool_stats(struct net_device *dev, 329 struct ethtool_stats *stats, u64 *buf) 330 { 331 struct qede_dev *edev = netdev_priv(dev); 332 struct qede_fastpath *fp; 333 int i; 334 335 qede_fill_by_demand_stats(edev); 336 337 /* Need to protect the access to the fastpath array */ 338 __qede_lock(edev); 339 340 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 341 fp = &edev->fp_array[i]; 342 343 if (fp->type & QEDE_FASTPATH_RX) 344 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 345 346 if (fp->type & QEDE_FASTPATH_XDP) 347 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 348 349 if (fp->type & QEDE_FASTPATH_TX) { 350 int cos; 351 352 for_each_cos_in_txq(edev, cos) 353 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf); 354 } 355 } 356 357 for (i = 0; i < QEDE_NUM_STATS; i++) { 358 if (qede_is_irrelevant_stat(edev, i)) 359 continue; 360 *buf = *((u64 *)(((void *)&edev->stats) + 361 qede_stats_arr[i].offset)); 362 363 buf++; 364 } 365 366 __qede_unlock(edev); 367 } 368 369 static int qede_get_sset_count(struct net_device *dev, int stringset) 370 { 371 struct qede_dev *edev = netdev_priv(dev); 372 int num_stats = QEDE_NUM_STATS, i; 373 374 switch (stringset) { 375 case ETH_SS_STATS: 376 for (i = 0; i < QEDE_NUM_STATS; i++) 377 if (qede_is_irrelevant_stat(edev, i)) 378 num_stats--; 379 380 /* Account for the Regular Tx statistics */ 381 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * 382 edev->dev_info.num_tc; 383 384 /* Account for the Regular Rx statistics */ 385 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 386 387 /* Account for XDP statistics [if needed] */ 388 if (edev->xdp_prog) 389 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 390 return num_stats; 391 392 case ETH_SS_PRIV_FLAGS: 393 return QEDE_PRI_FLAG_LEN; 394 case ETH_SS_TEST: 395 if (!IS_VF(edev)) 396 return QEDE_ETHTOOL_TEST_MAX; 397 else 398 return 0; 399 default: 400 DP_VERBOSE(edev, QED_MSG_DEBUG, 401 "Unsupported stringset 0x%08x\n", stringset); 402 return -EINVAL; 403 } 404 } 405 406 static u32 qede_get_priv_flags(struct net_device *dev) 407 { 408 struct qede_dev *edev = netdev_priv(dev); 409 u32 flags = 0; 410 411 if (edev->dev_info.common.num_hwfns > 1) 412 flags |= BIT(QEDE_PRI_FLAG_CMT); 413 414 if (edev->dev_info.common.smart_an) 415 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT); 416 417 return flags; 418 } 419 420 struct qede_link_mode_mapping { 421 u32 qed_link_mode; 422 u32 ethtool_link_mode; 423 }; 424 425 static const struct qede_link_mode_mapping qed_lm_map[] = { 426 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT}, 427 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT}, 428 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT}, 429 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT}, 430 {QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT}, 431 {QED_LM_2500baseX_Full_BIT, ETHTOOL_LINK_MODE_2500baseX_Full_BIT}, 432 {QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT}, 433 {QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT}, 434 {QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT}, 435 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 436 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 437 {QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT}, 438 {QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT}, 439 {QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT}, 440 {QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT}, 441 {QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT}, 442 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT}, 443 {QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT}, 444 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT}, 445 {QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT}, 446 {QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT}, 447 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT}, 448 {QED_LM_100000baseKR4_Full_BIT, 449 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT}, 450 {QED_LM_100000baseSR4_Full_BIT, 451 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT}, 452 {QED_LM_100000baseCR4_Full_BIT, 453 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT}, 454 {QED_LM_100000baseLR4_ER4_Full_BIT, 455 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT}, 456 {QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT}, 457 {QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT}, 458 {QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT}, 459 {QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT}, 460 {QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT}, 461 {QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT}, 462 }; 463 464 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \ 465 { \ 466 int i; \ 467 \ 468 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 469 if ((caps) & (qed_lm_map[i].qed_link_mode)) \ 470 __set_bit(qed_lm_map[i].ethtool_link_mode,\ 471 lk_ksettings->link_modes.name); \ 472 } \ 473 } 474 475 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \ 476 { \ 477 int i; \ 478 \ 479 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 480 if (test_bit(qed_lm_map[i].ethtool_link_mode, \ 481 lk_ksettings->link_modes.name)) \ 482 caps |= qed_lm_map[i].qed_link_mode; \ 483 } \ 484 } 485 486 static int qede_get_link_ksettings(struct net_device *dev, 487 struct ethtool_link_ksettings *cmd) 488 { 489 struct ethtool_link_settings *base = &cmd->base; 490 struct qede_dev *edev = netdev_priv(dev); 491 struct qed_link_output current_link; 492 493 __qede_lock(edev); 494 495 memset(¤t_link, 0, sizeof(current_link)); 496 edev->ops->common->get_link(edev->cdev, ¤t_link); 497 498 ethtool_link_ksettings_zero_link_mode(cmd, supported); 499 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported) 500 501 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 502 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising) 503 504 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 505 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising) 506 507 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 508 base->speed = current_link.speed; 509 base->duplex = current_link.duplex; 510 } else { 511 base->speed = SPEED_UNKNOWN; 512 base->duplex = DUPLEX_UNKNOWN; 513 } 514 515 __qede_unlock(edev); 516 517 base->port = current_link.port; 518 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 519 AUTONEG_DISABLE; 520 521 return 0; 522 } 523 524 static int qede_set_link_ksettings(struct net_device *dev, 525 const struct ethtool_link_ksettings *cmd) 526 { 527 const struct ethtool_link_settings *base = &cmd->base; 528 struct qede_dev *edev = netdev_priv(dev); 529 struct qed_link_output current_link; 530 struct qed_link_params params; 531 u32 sup_caps; 532 533 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 534 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 535 return -EOPNOTSUPP; 536 } 537 memset(¤t_link, 0, sizeof(current_link)); 538 memset(¶ms, 0, sizeof(params)); 539 edev->ops->common->get_link(edev->cdev, ¤t_link); 540 541 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 542 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 543 if (base->autoneg == AUTONEG_ENABLE) { 544 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 545 DP_INFO(edev, "Auto negotiation is not supported\n"); 546 return -EOPNOTSUPP; 547 } 548 549 params.autoneg = true; 550 params.forced_speed = 0; 551 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising) 552 } else { /* forced speed */ 553 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 554 params.autoneg = false; 555 params.forced_speed = base->speed; 556 switch (base->speed) { 557 case SPEED_1000: 558 sup_caps = QED_LM_1000baseT_Full_BIT | 559 QED_LM_1000baseKX_Full_BIT | 560 QED_LM_1000baseX_Full_BIT; 561 if (!(current_link.supported_caps & sup_caps)) { 562 DP_INFO(edev, "1G speed not supported\n"); 563 return -EINVAL; 564 } 565 params.adv_speeds = current_link.supported_caps & 566 sup_caps; 567 break; 568 case SPEED_10000: 569 sup_caps = QED_LM_10000baseT_Full_BIT | 570 QED_LM_10000baseKR_Full_BIT | 571 QED_LM_10000baseKX4_Full_BIT | 572 QED_LM_10000baseR_FEC_BIT | 573 QED_LM_10000baseCR_Full_BIT | 574 QED_LM_10000baseSR_Full_BIT | 575 QED_LM_10000baseLR_Full_BIT | 576 QED_LM_10000baseLRM_Full_BIT; 577 if (!(current_link.supported_caps & sup_caps)) { 578 DP_INFO(edev, "10G speed not supported\n"); 579 return -EINVAL; 580 } 581 params.adv_speeds = current_link.supported_caps & 582 sup_caps; 583 break; 584 case SPEED_20000: 585 if (!(current_link.supported_caps & 586 QED_LM_20000baseKR2_Full_BIT)) { 587 DP_INFO(edev, "20G speed not supported\n"); 588 return -EINVAL; 589 } 590 params.adv_speeds = QED_LM_20000baseKR2_Full_BIT; 591 break; 592 case SPEED_25000: 593 sup_caps = QED_LM_25000baseKR_Full_BIT | 594 QED_LM_25000baseCR_Full_BIT | 595 QED_LM_25000baseSR_Full_BIT; 596 if (!(current_link.supported_caps & sup_caps)) { 597 DP_INFO(edev, "25G speed not supported\n"); 598 return -EINVAL; 599 } 600 params.adv_speeds = current_link.supported_caps & 601 sup_caps; 602 break; 603 case SPEED_40000: 604 sup_caps = QED_LM_40000baseLR4_Full_BIT | 605 QED_LM_40000baseKR4_Full_BIT | 606 QED_LM_40000baseCR4_Full_BIT | 607 QED_LM_40000baseSR4_Full_BIT; 608 if (!(current_link.supported_caps & sup_caps)) { 609 DP_INFO(edev, "40G speed not supported\n"); 610 return -EINVAL; 611 } 612 params.adv_speeds = current_link.supported_caps & 613 sup_caps; 614 break; 615 case SPEED_50000: 616 sup_caps = QED_LM_50000baseKR2_Full_BIT | 617 QED_LM_50000baseCR2_Full_BIT | 618 QED_LM_50000baseSR2_Full_BIT; 619 if (!(current_link.supported_caps & sup_caps)) { 620 DP_INFO(edev, "50G speed not supported\n"); 621 return -EINVAL; 622 } 623 params.adv_speeds = current_link.supported_caps & 624 sup_caps; 625 break; 626 case SPEED_100000: 627 sup_caps = QED_LM_100000baseKR4_Full_BIT | 628 QED_LM_100000baseSR4_Full_BIT | 629 QED_LM_100000baseCR4_Full_BIT | 630 QED_LM_100000baseLR4_ER4_Full_BIT; 631 if (!(current_link.supported_caps & sup_caps)) { 632 DP_INFO(edev, "100G speed not supported\n"); 633 return -EINVAL; 634 } 635 params.adv_speeds = current_link.supported_caps & 636 sup_caps; 637 break; 638 default: 639 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 640 return -EINVAL; 641 } 642 } 643 644 params.link_up = true; 645 edev->ops->common->set_link(edev->cdev, ¶ms); 646 647 return 0; 648 } 649 650 static void qede_get_drvinfo(struct net_device *ndev, 651 struct ethtool_drvinfo *info) 652 { 653 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 654 struct qede_dev *edev = netdev_priv(ndev); 655 656 strlcpy(info->driver, "qede", sizeof(info->driver)); 657 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 658 659 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 660 edev->dev_info.common.fw_major, 661 edev->dev_info.common.fw_minor, 662 edev->dev_info.common.fw_rev, 663 edev->dev_info.common.fw_eng); 664 665 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 666 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 667 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 668 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 669 edev->dev_info.common.mfw_rev & 0xFF); 670 671 if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) < 672 sizeof(info->fw_version)) { 673 snprintf(info->fw_version, sizeof(info->fw_version), 674 "mfw %s storm %s", mfw, storm); 675 } else { 676 snprintf(info->fw_version, sizeof(info->fw_version), 677 "%s %s", mfw, storm); 678 } 679 680 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 681 } 682 683 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 684 { 685 struct qede_dev *edev = netdev_priv(ndev); 686 687 if (edev->dev_info.common.wol_support) { 688 wol->supported = WAKE_MAGIC; 689 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 690 } 691 } 692 693 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 694 { 695 struct qede_dev *edev = netdev_priv(ndev); 696 bool wol_requested; 697 int rc; 698 699 if (wol->wolopts & ~WAKE_MAGIC) { 700 DP_INFO(edev, 701 "Can't support WoL options other than magic-packet\n"); 702 return -EINVAL; 703 } 704 705 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 706 if (wol_requested == edev->wol_enabled) 707 return 0; 708 709 /* Need to actually change configuration */ 710 if (!edev->dev_info.common.wol_support) { 711 DP_INFO(edev, "Device doesn't support WoL\n"); 712 return -EINVAL; 713 } 714 715 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 716 if (!rc) 717 edev->wol_enabled = wol_requested; 718 719 return rc; 720 } 721 722 static u32 qede_get_msglevel(struct net_device *ndev) 723 { 724 struct qede_dev *edev = netdev_priv(ndev); 725 726 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 727 } 728 729 static void qede_set_msglevel(struct net_device *ndev, u32 level) 730 { 731 struct qede_dev *edev = netdev_priv(ndev); 732 u32 dp_module = 0; 733 u8 dp_level = 0; 734 735 qede_config_debug(level, &dp_module, &dp_level); 736 737 edev->dp_level = dp_level; 738 edev->dp_module = dp_module; 739 edev->ops->common->update_msglvl(edev->cdev, 740 dp_module, dp_level); 741 } 742 743 static int qede_nway_reset(struct net_device *dev) 744 { 745 struct qede_dev *edev = netdev_priv(dev); 746 struct qed_link_output current_link; 747 struct qed_link_params link_params; 748 749 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 750 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 751 return -EOPNOTSUPP; 752 } 753 754 if (!netif_running(dev)) 755 return 0; 756 757 memset(¤t_link, 0, sizeof(current_link)); 758 edev->ops->common->get_link(edev->cdev, ¤t_link); 759 if (!current_link.link_up) 760 return 0; 761 762 /* Toggle the link */ 763 memset(&link_params, 0, sizeof(link_params)); 764 link_params.link_up = false; 765 edev->ops->common->set_link(edev->cdev, &link_params); 766 link_params.link_up = true; 767 edev->ops->common->set_link(edev->cdev, &link_params); 768 769 return 0; 770 } 771 772 static u32 qede_get_link(struct net_device *dev) 773 { 774 struct qede_dev *edev = netdev_priv(dev); 775 struct qed_link_output current_link; 776 777 memset(¤t_link, 0, sizeof(current_link)); 778 edev->ops->common->get_link(edev->cdev, ¤t_link); 779 780 return current_link.link_up; 781 } 782 783 static int qede_flash_device(struct net_device *dev, 784 struct ethtool_flash *flash) 785 { 786 struct qede_dev *edev = netdev_priv(dev); 787 788 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 789 } 790 791 static int qede_get_coalesce(struct net_device *dev, 792 struct ethtool_coalesce *coal) 793 { 794 void *rx_handle = NULL, *tx_handle = NULL; 795 struct qede_dev *edev = netdev_priv(dev); 796 u16 rx_coal, tx_coal, i, rc = 0; 797 struct qede_fastpath *fp; 798 799 rx_coal = QED_DEFAULT_RX_USECS; 800 tx_coal = QED_DEFAULT_TX_USECS; 801 802 memset(coal, 0, sizeof(struct ethtool_coalesce)); 803 804 __qede_lock(edev); 805 if (edev->state == QEDE_STATE_OPEN) { 806 for_each_queue(i) { 807 fp = &edev->fp_array[i]; 808 809 if (fp->type & QEDE_FASTPATH_RX) { 810 rx_handle = fp->rxq->handle; 811 break; 812 } 813 } 814 815 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 816 if (rc) { 817 DP_INFO(edev, "Read Rx coalesce error\n"); 818 goto out; 819 } 820 821 for_each_queue(i) { 822 struct qede_tx_queue *txq; 823 824 fp = &edev->fp_array[i]; 825 826 /* All TX queues of given fastpath uses same 827 * coalescing value, so no need to iterate over 828 * all TCs, TC0 txq should suffice. 829 */ 830 if (fp->type & QEDE_FASTPATH_TX) { 831 txq = QEDE_FP_TC0_TXQ(fp); 832 tx_handle = txq->handle; 833 break; 834 } 835 } 836 837 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 838 if (rc) 839 DP_INFO(edev, "Read Tx coalesce error\n"); 840 } 841 842 out: 843 __qede_unlock(edev); 844 845 coal->rx_coalesce_usecs = rx_coal; 846 coal->tx_coalesce_usecs = tx_coal; 847 848 return rc; 849 } 850 851 static int qede_set_coalesce(struct net_device *dev, 852 struct ethtool_coalesce *coal) 853 { 854 struct qede_dev *edev = netdev_priv(dev); 855 struct qede_fastpath *fp; 856 int i, rc = 0; 857 u16 rxc, txc; 858 859 if (!netif_running(dev)) { 860 DP_INFO(edev, "Interface is down\n"); 861 return -EINVAL; 862 } 863 864 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 865 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 866 DP_INFO(edev, 867 "Can't support requested %s coalesce value [max supported value %d]\n", 868 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 869 "tx", QED_COALESCE_MAX); 870 return -EINVAL; 871 } 872 873 rxc = (u16)coal->rx_coalesce_usecs; 874 txc = (u16)coal->tx_coalesce_usecs; 875 for_each_queue(i) { 876 fp = &edev->fp_array[i]; 877 878 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 879 rc = edev->ops->common->set_coalesce(edev->cdev, 880 rxc, 0, 881 fp->rxq->handle); 882 if (rc) { 883 DP_INFO(edev, 884 "Set RX coalesce error, rc = %d\n", rc); 885 return rc; 886 } 887 } 888 889 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 890 struct qede_tx_queue *txq; 891 892 /* All TX queues of given fastpath uses same 893 * coalescing value, so no need to iterate over 894 * all TCs, TC0 txq should suffice. 895 */ 896 txq = QEDE_FP_TC0_TXQ(fp); 897 898 rc = edev->ops->common->set_coalesce(edev->cdev, 899 0, txc, 900 txq->handle); 901 if (rc) { 902 DP_INFO(edev, 903 "Set TX coalesce error, rc = %d\n", rc); 904 return rc; 905 } 906 } 907 } 908 909 return rc; 910 } 911 912 static void qede_get_ringparam(struct net_device *dev, 913 struct ethtool_ringparam *ering) 914 { 915 struct qede_dev *edev = netdev_priv(dev); 916 917 ering->rx_max_pending = NUM_RX_BDS_MAX; 918 ering->rx_pending = edev->q_num_rx_buffers; 919 ering->tx_max_pending = NUM_TX_BDS_MAX; 920 ering->tx_pending = edev->q_num_tx_buffers; 921 } 922 923 static int qede_set_ringparam(struct net_device *dev, 924 struct ethtool_ringparam *ering) 925 { 926 struct qede_dev *edev = netdev_priv(dev); 927 928 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 929 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 930 ering->rx_pending, ering->tx_pending); 931 932 /* Validate legality of configuration */ 933 if (ering->rx_pending > NUM_RX_BDS_MAX || 934 ering->rx_pending < NUM_RX_BDS_MIN || 935 ering->tx_pending > NUM_TX_BDS_MAX || 936 ering->tx_pending < NUM_TX_BDS_MIN) { 937 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 938 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 939 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 940 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 941 return -EINVAL; 942 } 943 944 /* Change ring size and re-load */ 945 edev->q_num_rx_buffers = ering->rx_pending; 946 edev->q_num_tx_buffers = ering->tx_pending; 947 948 qede_reload(edev, NULL, false); 949 950 return 0; 951 } 952 953 static void qede_get_pauseparam(struct net_device *dev, 954 struct ethtool_pauseparam *epause) 955 { 956 struct qede_dev *edev = netdev_priv(dev); 957 struct qed_link_output current_link; 958 959 memset(¤t_link, 0, sizeof(current_link)); 960 edev->ops->common->get_link(edev->cdev, ¤t_link); 961 962 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 963 epause->autoneg = true; 964 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 965 epause->rx_pause = true; 966 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 967 epause->tx_pause = true; 968 969 DP_VERBOSE(edev, QED_MSG_DEBUG, 970 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 971 epause->cmd, epause->autoneg, epause->rx_pause, 972 epause->tx_pause); 973 } 974 975 static int qede_set_pauseparam(struct net_device *dev, 976 struct ethtool_pauseparam *epause) 977 { 978 struct qede_dev *edev = netdev_priv(dev); 979 struct qed_link_params params; 980 struct qed_link_output current_link; 981 982 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 983 DP_INFO(edev, 984 "Pause settings are not allowed to be changed\n"); 985 return -EOPNOTSUPP; 986 } 987 988 memset(¤t_link, 0, sizeof(current_link)); 989 edev->ops->common->get_link(edev->cdev, ¤t_link); 990 991 memset(¶ms, 0, sizeof(params)); 992 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 993 if (epause->autoneg) { 994 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 995 DP_INFO(edev, "autoneg not supported\n"); 996 return -EINVAL; 997 } 998 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 999 } 1000 if (epause->rx_pause) 1001 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 1002 if (epause->tx_pause) 1003 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 1004 1005 params.link_up = true; 1006 edev->ops->common->set_link(edev->cdev, ¶ms); 1007 1008 return 0; 1009 } 1010 1011 static void qede_get_regs(struct net_device *ndev, 1012 struct ethtool_regs *regs, void *buffer) 1013 { 1014 struct qede_dev *edev = netdev_priv(ndev); 1015 1016 regs->version = 0; 1017 memset(buffer, 0, regs->len); 1018 1019 if (edev->ops && edev->ops->common) 1020 edev->ops->common->dbg_all_data(edev->cdev, buffer); 1021 } 1022 1023 static int qede_get_regs_len(struct net_device *ndev) 1024 { 1025 struct qede_dev *edev = netdev_priv(ndev); 1026 1027 if (edev->ops && edev->ops->common) 1028 return edev->ops->common->dbg_all_data_size(edev->cdev); 1029 else 1030 return -EINVAL; 1031 } 1032 1033 static void qede_update_mtu(struct qede_dev *edev, 1034 struct qede_reload_args *args) 1035 { 1036 edev->ndev->mtu = args->u.mtu; 1037 } 1038 1039 /* Netdevice NDOs */ 1040 int qede_change_mtu(struct net_device *ndev, int new_mtu) 1041 { 1042 struct qede_dev *edev = netdev_priv(ndev); 1043 struct qede_reload_args args; 1044 1045 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1046 "Configuring MTU size of %d\n", new_mtu); 1047 1048 if (new_mtu > PAGE_SIZE) 1049 ndev->features &= ~NETIF_F_GRO_HW; 1050 1051 /* Set the mtu field and re-start the interface if needed */ 1052 args.u.mtu = new_mtu; 1053 args.func = &qede_update_mtu; 1054 qede_reload(edev, &args, false); 1055 1056 edev->ops->common->update_mtu(edev->cdev, new_mtu); 1057 1058 return 0; 1059 } 1060 1061 static void qede_get_channels(struct net_device *dev, 1062 struct ethtool_channels *channels) 1063 { 1064 struct qede_dev *edev = netdev_priv(dev); 1065 1066 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 1067 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 1068 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 1069 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 1070 edev->fp_num_rx; 1071 channels->tx_count = edev->fp_num_tx; 1072 channels->rx_count = edev->fp_num_rx; 1073 } 1074 1075 static int qede_set_channels(struct net_device *dev, 1076 struct ethtool_channels *channels) 1077 { 1078 struct qede_dev *edev = netdev_priv(dev); 1079 u32 count; 1080 1081 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1082 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 1083 channels->rx_count, channels->tx_count, 1084 channels->other_count, channels->combined_count); 1085 1086 count = channels->rx_count + channels->tx_count + 1087 channels->combined_count; 1088 1089 /* We don't support `other' channels */ 1090 if (channels->other_count) { 1091 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1092 "command parameters not supported\n"); 1093 return -EINVAL; 1094 } 1095 1096 if (!(channels->combined_count || (channels->rx_count && 1097 channels->tx_count))) { 1098 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1099 "need to request at least one transmit and one receive channel\n"); 1100 return -EINVAL; 1101 } 1102 1103 if (count > QEDE_MAX_RSS_CNT(edev)) { 1104 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1105 "requested channels = %d max supported channels = %d\n", 1106 count, QEDE_MAX_RSS_CNT(edev)); 1107 return -EINVAL; 1108 } 1109 1110 /* Check if there was a change in the active parameters */ 1111 if ((count == QEDE_QUEUE_CNT(edev)) && 1112 (channels->tx_count == edev->fp_num_tx) && 1113 (channels->rx_count == edev->fp_num_rx)) { 1114 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1115 "No change in active parameters\n"); 1116 return 0; 1117 } 1118 1119 /* We need the number of queues to be divisible between the hwfns */ 1120 if ((count % edev->dev_info.common.num_hwfns) || 1121 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1122 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1123 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1124 "Number of channels must be divisible by %04x\n", 1125 edev->dev_info.common.num_hwfns); 1126 return -EINVAL; 1127 } 1128 1129 /* Set number of queues and reload if necessary */ 1130 edev->req_queues = count; 1131 edev->req_num_tx = channels->tx_count; 1132 edev->req_num_rx = channels->rx_count; 1133 /* Reset the indirection table if rx queue count is updated */ 1134 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1135 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1136 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1137 } 1138 1139 qede_reload(edev, NULL, false); 1140 1141 return 0; 1142 } 1143 1144 static int qede_get_ts_info(struct net_device *dev, 1145 struct ethtool_ts_info *info) 1146 { 1147 struct qede_dev *edev = netdev_priv(dev); 1148 1149 return qede_ptp_get_ts_info(edev, info); 1150 } 1151 1152 static int qede_set_phys_id(struct net_device *dev, 1153 enum ethtool_phys_id_state state) 1154 { 1155 struct qede_dev *edev = netdev_priv(dev); 1156 u8 led_state = 0; 1157 1158 switch (state) { 1159 case ETHTOOL_ID_ACTIVE: 1160 return 1; /* cycle on/off once per second */ 1161 1162 case ETHTOOL_ID_ON: 1163 led_state = QED_LED_MODE_ON; 1164 break; 1165 1166 case ETHTOOL_ID_OFF: 1167 led_state = QED_LED_MODE_OFF; 1168 break; 1169 1170 case ETHTOOL_ID_INACTIVE: 1171 led_state = QED_LED_MODE_RESTORE; 1172 break; 1173 } 1174 1175 edev->ops->common->set_led(edev->cdev, led_state); 1176 1177 return 0; 1178 } 1179 1180 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1181 { 1182 info->data = RXH_IP_SRC | RXH_IP_DST; 1183 1184 switch (info->flow_type) { 1185 case TCP_V4_FLOW: 1186 case TCP_V6_FLOW: 1187 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1188 break; 1189 case UDP_V4_FLOW: 1190 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1191 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1192 break; 1193 case UDP_V6_FLOW: 1194 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1195 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1196 break; 1197 case IPV4_FLOW: 1198 case IPV6_FLOW: 1199 break; 1200 default: 1201 info->data = 0; 1202 break; 1203 } 1204 1205 return 0; 1206 } 1207 1208 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1209 u32 *rule_locs) 1210 { 1211 struct qede_dev *edev = netdev_priv(dev); 1212 int rc = 0; 1213 1214 switch (info->cmd) { 1215 case ETHTOOL_GRXRINGS: 1216 info->data = QEDE_RSS_COUNT(edev); 1217 break; 1218 case ETHTOOL_GRXFH: 1219 rc = qede_get_rss_flags(edev, info); 1220 break; 1221 case ETHTOOL_GRXCLSRLCNT: 1222 info->rule_cnt = qede_get_arfs_filter_count(edev); 1223 info->data = QEDE_RFS_MAX_FLTR; 1224 break; 1225 case ETHTOOL_GRXCLSRULE: 1226 rc = qede_get_cls_rule_entry(edev, info); 1227 break; 1228 case ETHTOOL_GRXCLSRLALL: 1229 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1230 break; 1231 default: 1232 DP_ERR(edev, "Command parameters not supported\n"); 1233 rc = -EOPNOTSUPP; 1234 } 1235 1236 return rc; 1237 } 1238 1239 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1240 { 1241 struct qed_update_vport_params *vport_update_params; 1242 u8 set_caps = 0, clr_caps = 0; 1243 int rc = 0; 1244 1245 DP_VERBOSE(edev, QED_MSG_DEBUG, 1246 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1247 info->flow_type, info->data); 1248 1249 switch (info->flow_type) { 1250 case TCP_V4_FLOW: 1251 case TCP_V6_FLOW: 1252 /* For TCP only 4-tuple hash is supported */ 1253 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1254 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1255 DP_INFO(edev, "Command parameters not supported\n"); 1256 return -EINVAL; 1257 } 1258 return 0; 1259 case UDP_V4_FLOW: 1260 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1261 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1262 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1263 set_caps = QED_RSS_IPV4_UDP; 1264 DP_VERBOSE(edev, QED_MSG_DEBUG, 1265 "UDP 4-tuple enabled\n"); 1266 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1267 clr_caps = QED_RSS_IPV4_UDP; 1268 DP_VERBOSE(edev, QED_MSG_DEBUG, 1269 "UDP 4-tuple disabled\n"); 1270 } else { 1271 return -EINVAL; 1272 } 1273 break; 1274 case UDP_V6_FLOW: 1275 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1276 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1277 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1278 set_caps = QED_RSS_IPV6_UDP; 1279 DP_VERBOSE(edev, QED_MSG_DEBUG, 1280 "UDP 4-tuple enabled\n"); 1281 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1282 clr_caps = QED_RSS_IPV6_UDP; 1283 DP_VERBOSE(edev, QED_MSG_DEBUG, 1284 "UDP 4-tuple disabled\n"); 1285 } else { 1286 return -EINVAL; 1287 } 1288 break; 1289 case IPV4_FLOW: 1290 case IPV6_FLOW: 1291 /* For IP only 2-tuple hash is supported */ 1292 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1293 DP_INFO(edev, "Command parameters not supported\n"); 1294 return -EINVAL; 1295 } 1296 return 0; 1297 case SCTP_V4_FLOW: 1298 case AH_ESP_V4_FLOW: 1299 case AH_V4_FLOW: 1300 case ESP_V4_FLOW: 1301 case SCTP_V6_FLOW: 1302 case AH_ESP_V6_FLOW: 1303 case AH_V6_FLOW: 1304 case ESP_V6_FLOW: 1305 case IP_USER_FLOW: 1306 case ETHER_FLOW: 1307 /* RSS is not supported for these protocols */ 1308 if (info->data) { 1309 DP_INFO(edev, "Command parameters not supported\n"); 1310 return -EINVAL; 1311 } 1312 return 0; 1313 default: 1314 return -EINVAL; 1315 } 1316 1317 /* No action is needed if there is no change in the rss capability */ 1318 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1319 return 0; 1320 1321 /* Update internal configuration */ 1322 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1323 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1324 1325 /* Re-configure if possible */ 1326 __qede_lock(edev); 1327 if (edev->state == QEDE_STATE_OPEN) { 1328 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1329 if (!vport_update_params) { 1330 __qede_unlock(edev); 1331 return -ENOMEM; 1332 } 1333 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1334 &vport_update_params->update_rss_flg); 1335 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1336 vfree(vport_update_params); 1337 } 1338 __qede_unlock(edev); 1339 1340 return rc; 1341 } 1342 1343 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1344 { 1345 struct qede_dev *edev = netdev_priv(dev); 1346 int rc; 1347 1348 switch (info->cmd) { 1349 case ETHTOOL_SRXFH: 1350 rc = qede_set_rss_flags(edev, info); 1351 break; 1352 case ETHTOOL_SRXCLSRLINS: 1353 rc = qede_add_cls_rule(edev, info); 1354 break; 1355 case ETHTOOL_SRXCLSRLDEL: 1356 rc = qede_delete_flow_filter(edev, info->fs.location); 1357 break; 1358 default: 1359 DP_INFO(edev, "Command parameters not supported\n"); 1360 rc = -EOPNOTSUPP; 1361 } 1362 1363 return rc; 1364 } 1365 1366 static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1367 { 1368 return QED_RSS_IND_TABLE_SIZE; 1369 } 1370 1371 static u32 qede_get_rxfh_key_size(struct net_device *dev) 1372 { 1373 struct qede_dev *edev = netdev_priv(dev); 1374 1375 return sizeof(edev->rss_key); 1376 } 1377 1378 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1379 { 1380 struct qede_dev *edev = netdev_priv(dev); 1381 int i; 1382 1383 if (hfunc) 1384 *hfunc = ETH_RSS_HASH_TOP; 1385 1386 if (!indir) 1387 return 0; 1388 1389 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1390 indir[i] = edev->rss_ind_table[i]; 1391 1392 if (key) 1393 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1394 1395 return 0; 1396 } 1397 1398 static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1399 const u8 *key, const u8 hfunc) 1400 { 1401 struct qed_update_vport_params *vport_update_params; 1402 struct qede_dev *edev = netdev_priv(dev); 1403 int i, rc = 0; 1404 1405 if (edev->dev_info.common.num_hwfns > 1) { 1406 DP_INFO(edev, 1407 "RSS configuration is not supported for 100G devices\n"); 1408 return -EOPNOTSUPP; 1409 } 1410 1411 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1412 return -EOPNOTSUPP; 1413 1414 if (!indir && !key) 1415 return 0; 1416 1417 if (indir) { 1418 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1419 edev->rss_ind_table[i] = indir[i]; 1420 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1421 } 1422 1423 if (key) { 1424 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1425 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1426 } 1427 1428 __qede_lock(edev); 1429 if (edev->state == QEDE_STATE_OPEN) { 1430 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1431 if (!vport_update_params) { 1432 __qede_unlock(edev); 1433 return -ENOMEM; 1434 } 1435 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1436 &vport_update_params->update_rss_flg); 1437 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1438 vfree(vport_update_params); 1439 } 1440 __qede_unlock(edev); 1441 1442 return rc; 1443 } 1444 1445 /* This function enables the interrupt generation and the NAPI on the device */ 1446 static void qede_netif_start(struct qede_dev *edev) 1447 { 1448 int i; 1449 1450 if (!netif_running(edev->ndev)) 1451 return; 1452 1453 for_each_queue(i) { 1454 /* Update and reenable interrupts */ 1455 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1456 napi_enable(&edev->fp_array[i].napi); 1457 } 1458 } 1459 1460 /* This function disables the NAPI and the interrupt generation on the device */ 1461 static void qede_netif_stop(struct qede_dev *edev) 1462 { 1463 int i; 1464 1465 for_each_queue(i) { 1466 napi_disable(&edev->fp_array[i].napi); 1467 /* Disable interrupts */ 1468 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1469 } 1470 } 1471 1472 static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1473 struct sk_buff *skb) 1474 { 1475 struct qede_tx_queue *txq = NULL; 1476 struct eth_tx_1st_bd *first_bd; 1477 dma_addr_t mapping; 1478 int i, idx; 1479 u16 val; 1480 1481 for_each_queue(i) { 1482 struct qede_fastpath *fp = &edev->fp_array[i]; 1483 1484 if (fp->type & QEDE_FASTPATH_TX) { 1485 txq = QEDE_FP_TC0_TXQ(fp); 1486 break; 1487 } 1488 } 1489 1490 if (!txq) { 1491 DP_NOTICE(edev, "Tx path is not available\n"); 1492 return -1; 1493 } 1494 1495 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1496 idx = txq->sw_tx_prod; 1497 txq->sw_tx_ring.skbs[idx].skb = skb; 1498 first_bd = qed_chain_produce(&txq->tx_pbl); 1499 memset(first_bd, 0, sizeof(*first_bd)); 1500 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1501 first_bd->data.bd_flags.bitfields = val; 1502 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1503 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1504 first_bd->data.bitfields |= cpu_to_le16(val); 1505 1506 /* Map skb linear data for DMA and set in the first BD */ 1507 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1508 skb_headlen(skb), DMA_TO_DEVICE); 1509 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1510 DP_NOTICE(edev, "SKB mapping failed\n"); 1511 return -ENOMEM; 1512 } 1513 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1514 1515 /* update the first BD with the actual num BDs */ 1516 first_bd->data.nbds = 1; 1517 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1518 /* 'next page' entries are counted in the producer value */ 1519 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1520 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1521 1522 /* wmb makes sure that the BDs data is updated before updating the 1523 * producer, otherwise FW may read old data from the BDs. 1524 */ 1525 wmb(); 1526 barrier(); 1527 writel(txq->tx_db.raw, txq->doorbell_addr); 1528 1529 /* mmiowb is needed to synchronize doorbell writes from more than one 1530 * processor. It guarantees that the write arrives to the device before 1531 * the queue lock is released and another start_xmit is called (possibly 1532 * on another CPU). Without this barrier, the next doorbell can bypass 1533 * this doorbell. This is applicable to IA64/Altix systems. 1534 */ 1535 mmiowb(); 1536 1537 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1538 if (qede_txq_has_work(txq)) 1539 break; 1540 usleep_range(100, 200); 1541 } 1542 1543 if (!qede_txq_has_work(txq)) { 1544 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1545 return -1; 1546 } 1547 1548 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1549 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1550 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1551 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1552 txq->sw_tx_ring.skbs[idx].skb = NULL; 1553 1554 return 0; 1555 } 1556 1557 static int qede_selftest_receive_traffic(struct qede_dev *edev) 1558 { 1559 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len; 1560 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1561 struct qede_rx_queue *rxq = NULL; 1562 struct sw_rx_data *sw_rx_data; 1563 union eth_rx_cqe *cqe; 1564 int i, iter, rc = 0; 1565 u8 *data_ptr; 1566 1567 for_each_queue(i) { 1568 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1569 rxq = edev->fp_array[i].rxq; 1570 break; 1571 } 1572 } 1573 1574 if (!rxq) { 1575 DP_NOTICE(edev, "Rx path is not available\n"); 1576 return -1; 1577 } 1578 1579 /* The packet is expected to receive on rx-queue 0 even though RSS is 1580 * enabled. This is because the queue 0 is configured as the default 1581 * queue and that the loopback traffic is not IP. 1582 */ 1583 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1584 if (!qede_has_rx_work(rxq)) { 1585 usleep_range(100, 200); 1586 continue; 1587 } 1588 1589 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1590 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1591 1592 /* Memory barrier to prevent the CPU from doing speculative 1593 * reads of CQE/BD before reading hw_comp_cons. If the CQE is 1594 * read before it is written by FW, then FW writes CQE and SB, 1595 * and then the CPU reads the hw_comp_cons, it will use an old 1596 * CQE. 1597 */ 1598 rmb(); 1599 1600 /* Get the CQE from the completion ring */ 1601 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1602 1603 /* Get the data from the SW ring */ 1604 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1605 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1606 fp_cqe = &cqe->fast_path_regular; 1607 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1608 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1609 fp_cqe->placement_offset + 1610 sw_rx_data->page_offset + 1611 rxq->rx_headroom); 1612 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1613 ether_addr_equal(data_ptr + ETH_ALEN, 1614 edev->ndev->dev_addr)) { 1615 for (i = ETH_HLEN; i < len; i++) 1616 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1617 rc = -1; 1618 break; 1619 } 1620 1621 qede_recycle_rx_bd_ring(rxq, 1); 1622 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1623 break; 1624 } 1625 1626 DP_INFO(edev, "Not the transmitted packet\n"); 1627 qede_recycle_rx_bd_ring(rxq, 1); 1628 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1629 } 1630 1631 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1632 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1633 return -1; 1634 } 1635 1636 qede_update_rx_prod(edev, rxq); 1637 1638 return rc; 1639 } 1640 1641 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1642 { 1643 struct qed_link_params link_params; 1644 struct sk_buff *skb = NULL; 1645 int rc = 0, i; 1646 u32 pkt_size; 1647 u8 *packet; 1648 1649 if (!netif_running(edev->ndev)) { 1650 DP_NOTICE(edev, "Interface is down\n"); 1651 return -EINVAL; 1652 } 1653 1654 qede_netif_stop(edev); 1655 1656 /* Bring up the link in Loopback mode */ 1657 memset(&link_params, 0, sizeof(link_params)); 1658 link_params.link_up = true; 1659 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1660 link_params.loopback_mode = loopback_mode; 1661 edev->ops->common->set_link(edev->cdev, &link_params); 1662 1663 /* Wait for loopback configuration to apply */ 1664 msleep_interruptible(500); 1665 1666 /* Setting max packet size to 1.5K to avoid data being split over 1667 * multiple BDs in cases where MTU > PAGE_SIZE. 1668 */ 1669 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ? 1670 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN); 1671 1672 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1673 if (!skb) { 1674 DP_INFO(edev, "Can't allocate skb\n"); 1675 rc = -ENOMEM; 1676 goto test_loopback_exit; 1677 } 1678 packet = skb_put(skb, pkt_size); 1679 ether_addr_copy(packet, edev->ndev->dev_addr); 1680 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1681 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1682 for (i = ETH_HLEN; i < pkt_size; i++) 1683 packet[i] = (unsigned char)(i & 0xff); 1684 1685 rc = qede_selftest_transmit_traffic(edev, skb); 1686 if (rc) 1687 goto test_loopback_exit; 1688 1689 rc = qede_selftest_receive_traffic(edev); 1690 if (rc) 1691 goto test_loopback_exit; 1692 1693 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1694 1695 test_loopback_exit: 1696 dev_kfree_skb(skb); 1697 1698 /* Bring up the link in Normal mode */ 1699 memset(&link_params, 0, sizeof(link_params)); 1700 link_params.link_up = true; 1701 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1702 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1703 edev->ops->common->set_link(edev->cdev, &link_params); 1704 1705 /* Wait for loopback configuration to apply */ 1706 msleep_interruptible(500); 1707 1708 qede_netif_start(edev); 1709 1710 return rc; 1711 } 1712 1713 static void qede_self_test(struct net_device *dev, 1714 struct ethtool_test *etest, u64 *buf) 1715 { 1716 struct qede_dev *edev = netdev_priv(dev); 1717 1718 DP_VERBOSE(edev, QED_MSG_DEBUG, 1719 "Self-test command parameters: offline = %d, external_lb = %d\n", 1720 (etest->flags & ETH_TEST_FL_OFFLINE), 1721 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1722 1723 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1724 1725 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1726 if (qede_selftest_run_loopback(edev, 1727 QED_LINK_LOOPBACK_INT_PHY)) { 1728 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1729 etest->flags |= ETH_TEST_FL_FAILED; 1730 } 1731 } 1732 1733 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1734 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1735 etest->flags |= ETH_TEST_FL_FAILED; 1736 } 1737 1738 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1739 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1740 etest->flags |= ETH_TEST_FL_FAILED; 1741 } 1742 1743 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1744 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1745 etest->flags |= ETH_TEST_FL_FAILED; 1746 } 1747 1748 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1749 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1750 etest->flags |= ETH_TEST_FL_FAILED; 1751 } 1752 1753 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1754 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1755 etest->flags |= ETH_TEST_FL_FAILED; 1756 } 1757 } 1758 1759 static int qede_set_tunable(struct net_device *dev, 1760 const struct ethtool_tunable *tuna, 1761 const void *data) 1762 { 1763 struct qede_dev *edev = netdev_priv(dev); 1764 u32 val; 1765 1766 switch (tuna->id) { 1767 case ETHTOOL_RX_COPYBREAK: 1768 val = *(u32 *)data; 1769 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1770 DP_VERBOSE(edev, QED_MSG_DEBUG, 1771 "Invalid rx copy break value, range is [%u, %u]", 1772 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1773 return -EINVAL; 1774 } 1775 1776 edev->rx_copybreak = *(u32 *)data; 1777 break; 1778 default: 1779 return -EOPNOTSUPP; 1780 } 1781 1782 return 0; 1783 } 1784 1785 static int qede_get_tunable(struct net_device *dev, 1786 const struct ethtool_tunable *tuna, void *data) 1787 { 1788 struct qede_dev *edev = netdev_priv(dev); 1789 1790 switch (tuna->id) { 1791 case ETHTOOL_RX_COPYBREAK: 1792 *(u32 *)data = edev->rx_copybreak; 1793 break; 1794 default: 1795 return -EOPNOTSUPP; 1796 } 1797 1798 return 0; 1799 } 1800 1801 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1802 { 1803 struct qede_dev *edev = netdev_priv(dev); 1804 struct qed_link_output current_link; 1805 1806 memset(¤t_link, 0, sizeof(current_link)); 1807 edev->ops->common->get_link(edev->cdev, ¤t_link); 1808 1809 if (!current_link.eee_supported) { 1810 DP_INFO(edev, "EEE is not supported\n"); 1811 return -EOPNOTSUPP; 1812 } 1813 1814 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1815 edata->advertised = ADVERTISED_1000baseT_Full; 1816 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1817 edata->advertised |= ADVERTISED_10000baseT_Full; 1818 if (current_link.sup_caps & QED_EEE_1G_ADV) 1819 edata->supported = ADVERTISED_1000baseT_Full; 1820 if (current_link.sup_caps & QED_EEE_10G_ADV) 1821 edata->supported |= ADVERTISED_10000baseT_Full; 1822 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1823 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1824 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1825 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1826 1827 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1828 edata->eee_enabled = current_link.eee.enable; 1829 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1830 edata->eee_active = current_link.eee_active; 1831 1832 return 0; 1833 } 1834 1835 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1836 { 1837 struct qede_dev *edev = netdev_priv(dev); 1838 struct qed_link_output current_link; 1839 struct qed_link_params params; 1840 1841 if (!edev->ops->common->can_link_change(edev->cdev)) { 1842 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1843 return -EOPNOTSUPP; 1844 } 1845 1846 memset(¤t_link, 0, sizeof(current_link)); 1847 edev->ops->common->get_link(edev->cdev, ¤t_link); 1848 1849 if (!current_link.eee_supported) { 1850 DP_INFO(edev, "EEE is not supported\n"); 1851 return -EOPNOTSUPP; 1852 } 1853 1854 memset(¶ms, 0, sizeof(params)); 1855 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1856 1857 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1858 ADVERTISED_10000baseT_Full)) || 1859 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1860 ADVERTISED_10000baseT_Full)) != 1861 edata->advertised)) { 1862 DP_VERBOSE(edev, QED_MSG_DEBUG, 1863 "Invalid advertised capabilities %d\n", 1864 edata->advertised); 1865 return -EINVAL; 1866 } 1867 1868 if (edata->advertised & ADVERTISED_1000baseT_Full) 1869 params.eee.adv_caps = QED_EEE_1G_ADV; 1870 if (edata->advertised & ADVERTISED_10000baseT_Full) 1871 params.eee.adv_caps |= QED_EEE_10G_ADV; 1872 params.eee.enable = edata->eee_enabled; 1873 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1874 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1875 1876 params.link_up = true; 1877 edev->ops->common->set_link(edev->cdev, ¶ms); 1878 1879 return 0; 1880 } 1881 1882 static int qede_get_module_info(struct net_device *dev, 1883 struct ethtool_modinfo *modinfo) 1884 { 1885 struct qede_dev *edev = netdev_priv(dev); 1886 u8 buf[4]; 1887 int rc; 1888 1889 /* Read first 4 bytes to find the sfp type */ 1890 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1891 QED_I2C_DEV_ADDR_A0, 0, 4); 1892 if (rc) { 1893 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc); 1894 return rc; 1895 } 1896 1897 switch (buf[0]) { 1898 case 0x3: /* SFP, SFP+, SFP-28 */ 1899 modinfo->type = ETH_MODULE_SFF_8472; 1900 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1901 break; 1902 case 0xc: /* QSFP */ 1903 case 0xd: /* QSFP+ */ 1904 modinfo->type = ETH_MODULE_SFF_8436; 1905 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1906 break; 1907 case 0x11: /* QSFP-28 */ 1908 modinfo->type = ETH_MODULE_SFF_8636; 1909 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1910 break; 1911 default: 1912 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]); 1913 return -EINVAL; 1914 } 1915 1916 return 0; 1917 } 1918 1919 static int qede_get_module_eeprom(struct net_device *dev, 1920 struct ethtool_eeprom *ee, u8 *data) 1921 { 1922 struct qede_dev *edev = netdev_priv(dev); 1923 u32 start_addr = ee->offset, size = 0; 1924 u8 *buf = data; 1925 int rc = 0; 1926 1927 /* Read A0 section */ 1928 if (ee->offset < ETH_MODULE_SFF_8079_LEN) { 1929 /* Limit transfer size to the A0 section boundary */ 1930 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN) 1931 size = ETH_MODULE_SFF_8079_LEN - ee->offset; 1932 else 1933 size = ee->len; 1934 1935 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1936 QED_I2C_DEV_ADDR_A0, 1937 start_addr, size); 1938 if (rc) { 1939 DP_ERR(edev, "Failed reading A0 section %d\n", rc); 1940 return rc; 1941 } 1942 1943 buf += size; 1944 start_addr += size; 1945 } 1946 1947 /* Read A2 section */ 1948 if (start_addr >= ETH_MODULE_SFF_8079_LEN && 1949 start_addr < ETH_MODULE_SFF_8472_LEN) { 1950 size = ee->len - size; 1951 /* Limit transfer size to the A2 section boundary */ 1952 if (start_addr + size > ETH_MODULE_SFF_8472_LEN) 1953 size = ETH_MODULE_SFF_8472_LEN - start_addr; 1954 start_addr -= ETH_MODULE_SFF_8079_LEN; 1955 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1956 QED_I2C_DEV_ADDR_A2, 1957 start_addr, size); 1958 if (rc) { 1959 DP_VERBOSE(edev, QED_MSG_DEBUG, 1960 "Failed reading A2 section %d\n", rc); 1961 return 0; 1962 } 1963 } 1964 1965 return rc; 1966 } 1967 1968 static const struct ethtool_ops qede_ethtool_ops = { 1969 .get_link_ksettings = qede_get_link_ksettings, 1970 .set_link_ksettings = qede_set_link_ksettings, 1971 .get_drvinfo = qede_get_drvinfo, 1972 .get_regs_len = qede_get_regs_len, 1973 .get_regs = qede_get_regs, 1974 .get_wol = qede_get_wol, 1975 .set_wol = qede_set_wol, 1976 .get_msglevel = qede_get_msglevel, 1977 .set_msglevel = qede_set_msglevel, 1978 .nway_reset = qede_nway_reset, 1979 .get_link = qede_get_link, 1980 .get_coalesce = qede_get_coalesce, 1981 .set_coalesce = qede_set_coalesce, 1982 .get_ringparam = qede_get_ringparam, 1983 .set_ringparam = qede_set_ringparam, 1984 .get_pauseparam = qede_get_pauseparam, 1985 .set_pauseparam = qede_set_pauseparam, 1986 .get_strings = qede_get_strings, 1987 .set_phys_id = qede_set_phys_id, 1988 .get_ethtool_stats = qede_get_ethtool_stats, 1989 .get_priv_flags = qede_get_priv_flags, 1990 .get_sset_count = qede_get_sset_count, 1991 .get_rxnfc = qede_get_rxnfc, 1992 .set_rxnfc = qede_set_rxnfc, 1993 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 1994 .get_rxfh_key_size = qede_get_rxfh_key_size, 1995 .get_rxfh = qede_get_rxfh, 1996 .set_rxfh = qede_set_rxfh, 1997 .get_ts_info = qede_get_ts_info, 1998 .get_channels = qede_get_channels, 1999 .set_channels = qede_set_channels, 2000 .self_test = qede_self_test, 2001 .get_module_info = qede_get_module_info, 2002 .get_module_eeprom = qede_get_module_eeprom, 2003 .get_eee = qede_get_eee, 2004 .set_eee = qede_set_eee, 2005 2006 .get_tunable = qede_get_tunable, 2007 .set_tunable = qede_set_tunable, 2008 .flash_device = qede_flash_device, 2009 }; 2010 2011 static const struct ethtool_ops qede_vf_ethtool_ops = { 2012 .get_link_ksettings = qede_get_link_ksettings, 2013 .get_drvinfo = qede_get_drvinfo, 2014 .get_msglevel = qede_get_msglevel, 2015 .set_msglevel = qede_set_msglevel, 2016 .get_link = qede_get_link, 2017 .get_coalesce = qede_get_coalesce, 2018 .set_coalesce = qede_set_coalesce, 2019 .get_ringparam = qede_get_ringparam, 2020 .set_ringparam = qede_set_ringparam, 2021 .get_strings = qede_get_strings, 2022 .get_ethtool_stats = qede_get_ethtool_stats, 2023 .get_priv_flags = qede_get_priv_flags, 2024 .get_sset_count = qede_get_sset_count, 2025 .get_rxnfc = qede_get_rxnfc, 2026 .set_rxnfc = qede_set_rxnfc, 2027 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2028 .get_rxfh_key_size = qede_get_rxfh_key_size, 2029 .get_rxfh = qede_get_rxfh, 2030 .set_rxfh = qede_set_rxfh, 2031 .get_channels = qede_get_channels, 2032 .set_channels = qede_set_channels, 2033 .get_tunable = qede_get_tunable, 2034 .set_tunable = qede_set_tunable, 2035 }; 2036 2037 void qede_set_ethtool_ops(struct net_device *dev) 2038 { 2039 struct qede_dev *edev = netdev_priv(dev); 2040 2041 if (IS_VF(edev)) 2042 dev->ethtool_ops = &qede_vf_ethtool_ops; 2043 else 2044 dev->ethtool_ops = &qede_ethtool_ops; 2045 } 2046