1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/version.h> 33 #include <linux/types.h> 34 #include <linux/netdevice.h> 35 #include <linux/etherdevice.h> 36 #include <linux/ethtool.h> 37 #include <linux/string.h> 38 #include <linux/pci.h> 39 #include <linux/capability.h> 40 #include <linux/vmalloc.h> 41 #include "qede.h" 42 #include "qede_ptp.h" 43 44 #define QEDE_RQSTAT_OFFSET(stat_name) \ 45 (offsetof(struct qede_rx_queue, stat_name)) 46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 47 #define QEDE_RQSTAT(stat_name) \ 48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 49 50 #define QEDE_SELFTEST_POLL_COUNT 100 51 52 static const struct { 53 u64 offset; 54 char string[ETH_GSTRING_LEN]; 55 } qede_rqstats_arr[] = { 56 QEDE_RQSTAT(rcv_pkts), 57 QEDE_RQSTAT(rx_hw_errors), 58 QEDE_RQSTAT(rx_alloc_errors), 59 QEDE_RQSTAT(rx_ip_frags), 60 QEDE_RQSTAT(xdp_no_pass), 61 }; 62 63 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 64 #define QEDE_TQSTAT_OFFSET(stat_name) \ 65 (offsetof(struct qede_tx_queue, stat_name)) 66 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 67 #define QEDE_TQSTAT(stat_name) \ 68 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 69 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 70 static const struct { 71 u64 offset; 72 char string[ETH_GSTRING_LEN]; 73 } qede_tqstats_arr[] = { 74 QEDE_TQSTAT(xmit_pkts), 75 QEDE_TQSTAT(stopped_cnt), 76 QEDE_TQSTAT(tx_mem_alloc_err), 77 }; 78 79 #define QEDE_STAT_OFFSET(stat_name, type, base) \ 80 (offsetof(type, stat_name) + (base)) 81 #define QEDE_STAT_STRING(stat_name) (#stat_name) 82 #define _QEDE_STAT(stat_name, type, base, attr) \ 83 {QEDE_STAT_OFFSET(stat_name, type, base), \ 84 QEDE_STAT_STRING(stat_name), \ 85 attr} 86 #define QEDE_STAT(stat_name) \ 87 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 88 #define QEDE_PF_STAT(stat_name) \ 89 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 90 BIT(QEDE_STAT_PF_ONLY)) 91 #define QEDE_PF_BB_STAT(stat_name) \ 92 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 93 offsetof(struct qede_stats, bb), \ 94 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 95 #define QEDE_PF_AH_STAT(stat_name) \ 96 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 97 offsetof(struct qede_stats, ah), \ 98 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 99 static const struct { 100 u64 offset; 101 char string[ETH_GSTRING_LEN]; 102 unsigned long attr; 103 #define QEDE_STAT_PF_ONLY 0 104 #define QEDE_STAT_BB_ONLY 1 105 #define QEDE_STAT_AH_ONLY 2 106 } qede_stats_arr[] = { 107 QEDE_STAT(rx_ucast_bytes), 108 QEDE_STAT(rx_mcast_bytes), 109 QEDE_STAT(rx_bcast_bytes), 110 QEDE_STAT(rx_ucast_pkts), 111 QEDE_STAT(rx_mcast_pkts), 112 QEDE_STAT(rx_bcast_pkts), 113 114 QEDE_STAT(tx_ucast_bytes), 115 QEDE_STAT(tx_mcast_bytes), 116 QEDE_STAT(tx_bcast_bytes), 117 QEDE_STAT(tx_ucast_pkts), 118 QEDE_STAT(tx_mcast_pkts), 119 QEDE_STAT(tx_bcast_pkts), 120 121 QEDE_PF_STAT(rx_64_byte_packets), 122 QEDE_PF_STAT(rx_65_to_127_byte_packets), 123 QEDE_PF_STAT(rx_128_to_255_byte_packets), 124 QEDE_PF_STAT(rx_256_to_511_byte_packets), 125 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 126 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 127 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 128 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 129 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 130 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 131 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 132 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 133 QEDE_PF_STAT(tx_64_byte_packets), 134 QEDE_PF_STAT(tx_65_to_127_byte_packets), 135 QEDE_PF_STAT(tx_128_to_255_byte_packets), 136 QEDE_PF_STAT(tx_256_to_511_byte_packets), 137 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 138 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 139 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 140 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 141 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 142 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 143 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 144 QEDE_PF_STAT(rx_mac_crtl_frames), 145 QEDE_PF_STAT(tx_mac_ctrl_frames), 146 QEDE_PF_STAT(rx_pause_frames), 147 QEDE_PF_STAT(tx_pause_frames), 148 QEDE_PF_STAT(rx_pfc_frames), 149 QEDE_PF_STAT(tx_pfc_frames), 150 151 QEDE_PF_STAT(rx_crc_errors), 152 QEDE_PF_STAT(rx_align_errors), 153 QEDE_PF_STAT(rx_carrier_errors), 154 QEDE_PF_STAT(rx_oversize_packets), 155 QEDE_PF_STAT(rx_jabbers), 156 QEDE_PF_STAT(rx_undersize_packets), 157 QEDE_PF_STAT(rx_fragments), 158 QEDE_PF_BB_STAT(tx_lpi_entry_count), 159 QEDE_PF_BB_STAT(tx_total_collisions), 160 QEDE_PF_STAT(brb_truncates), 161 QEDE_PF_STAT(brb_discards), 162 QEDE_STAT(no_buff_discards), 163 QEDE_PF_STAT(mftag_filter_discards), 164 QEDE_PF_STAT(mac_filter_discards), 165 QEDE_PF_STAT(gft_filter_drop), 166 QEDE_STAT(tx_err_drop_pkts), 167 QEDE_STAT(ttl0_discard), 168 QEDE_STAT(packet_too_big_discard), 169 170 QEDE_STAT(coalesced_pkts), 171 QEDE_STAT(coalesced_events), 172 QEDE_STAT(coalesced_aborts_num), 173 QEDE_STAT(non_coalesced_pkts), 174 QEDE_STAT(coalesced_bytes), 175 176 QEDE_STAT(link_change_count), 177 QEDE_STAT(ptp_skip_txts), 178 }; 179 180 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 181 #define QEDE_STAT_IS_PF_ONLY(i) \ 182 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 183 #define QEDE_STAT_IS_BB_ONLY(i) \ 184 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 185 #define QEDE_STAT_IS_AH_ONLY(i) \ 186 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 187 188 enum { 189 QEDE_PRI_FLAG_CMT, 190 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */ 191 QEDE_PRI_FLAG_LEN, 192 }; 193 194 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 195 "Coupled-Function", 196 "SmartAN capable", 197 }; 198 199 enum qede_ethtool_tests { 200 QEDE_ETHTOOL_INT_LOOPBACK, 201 QEDE_ETHTOOL_INTERRUPT_TEST, 202 QEDE_ETHTOOL_MEMORY_TEST, 203 QEDE_ETHTOOL_REGISTER_TEST, 204 QEDE_ETHTOOL_CLOCK_TEST, 205 QEDE_ETHTOOL_NVRAM_TEST, 206 QEDE_ETHTOOL_TEST_MAX 207 }; 208 209 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 210 "Internal loopback (offline)", 211 "Interrupt (online)\t", 212 "Memory (online)\t\t", 213 "Register (online)\t", 214 "Clock (online)\t\t", 215 "Nvram (online)\t\t", 216 }; 217 218 static void qede_get_strings_stats_txq(struct qede_dev *edev, 219 struct qede_tx_queue *txq, u8 **buf) 220 { 221 int i; 222 223 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 224 if (txq->is_xdp) 225 sprintf(*buf, "%d [XDP]: %s", 226 QEDE_TXQ_XDP_TO_IDX(edev, txq), 227 qede_tqstats_arr[i].string); 228 else 229 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos, 230 qede_tqstats_arr[i].string); 231 *buf += ETH_GSTRING_LEN; 232 } 233 } 234 235 static void qede_get_strings_stats_rxq(struct qede_dev *edev, 236 struct qede_rx_queue *rxq, u8 **buf) 237 { 238 int i; 239 240 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 241 sprintf(*buf, "%d: %s", rxq->rxq_id, 242 qede_rqstats_arr[i].string); 243 *buf += ETH_GSTRING_LEN; 244 } 245 } 246 247 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 248 { 249 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 250 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 251 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 252 } 253 254 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 255 { 256 struct qede_fastpath *fp; 257 int i; 258 259 /* Account for queue statistics */ 260 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 261 fp = &edev->fp_array[i]; 262 263 if (fp->type & QEDE_FASTPATH_RX) 264 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 265 266 if (fp->type & QEDE_FASTPATH_XDP) 267 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 268 269 if (fp->type & QEDE_FASTPATH_TX) { 270 int cos; 271 272 for_each_cos_in_txq(edev, cos) 273 qede_get_strings_stats_txq(edev, 274 &fp->txq[cos], &buf); 275 } 276 } 277 278 /* Account for non-queue statistics */ 279 for (i = 0; i < QEDE_NUM_STATS; i++) { 280 if (qede_is_irrelevant_stat(edev, i)) 281 continue; 282 strcpy(buf, qede_stats_arr[i].string); 283 buf += ETH_GSTRING_LEN; 284 } 285 } 286 287 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 288 { 289 struct qede_dev *edev = netdev_priv(dev); 290 291 switch (stringset) { 292 case ETH_SS_STATS: 293 qede_get_strings_stats(edev, buf); 294 break; 295 case ETH_SS_PRIV_FLAGS: 296 memcpy(buf, qede_private_arr, 297 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 298 break; 299 case ETH_SS_TEST: 300 memcpy(buf, qede_tests_str_arr, 301 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 302 break; 303 default: 304 DP_VERBOSE(edev, QED_MSG_DEBUG, 305 "Unsupported stringset 0x%08x\n", stringset); 306 } 307 } 308 309 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 310 { 311 int i; 312 313 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 314 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 315 (*buf)++; 316 } 317 } 318 319 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 320 { 321 int i; 322 323 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 324 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 325 (*buf)++; 326 } 327 } 328 329 static void qede_get_ethtool_stats(struct net_device *dev, 330 struct ethtool_stats *stats, u64 *buf) 331 { 332 struct qede_dev *edev = netdev_priv(dev); 333 struct qede_fastpath *fp; 334 int i; 335 336 qede_fill_by_demand_stats(edev); 337 338 /* Need to protect the access to the fastpath array */ 339 __qede_lock(edev); 340 341 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 342 fp = &edev->fp_array[i]; 343 344 if (fp->type & QEDE_FASTPATH_RX) 345 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 346 347 if (fp->type & QEDE_FASTPATH_XDP) 348 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 349 350 if (fp->type & QEDE_FASTPATH_TX) { 351 int cos; 352 353 for_each_cos_in_txq(edev, cos) 354 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf); 355 } 356 } 357 358 for (i = 0; i < QEDE_NUM_STATS; i++) { 359 if (qede_is_irrelevant_stat(edev, i)) 360 continue; 361 *buf = *((u64 *)(((void *)&edev->stats) + 362 qede_stats_arr[i].offset)); 363 364 buf++; 365 } 366 367 __qede_unlock(edev); 368 } 369 370 static int qede_get_sset_count(struct net_device *dev, int stringset) 371 { 372 struct qede_dev *edev = netdev_priv(dev); 373 int num_stats = QEDE_NUM_STATS, i; 374 375 switch (stringset) { 376 case ETH_SS_STATS: 377 for (i = 0; i < QEDE_NUM_STATS; i++) 378 if (qede_is_irrelevant_stat(edev, i)) 379 num_stats--; 380 381 /* Account for the Regular Tx statistics */ 382 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * 383 edev->dev_info.num_tc; 384 385 /* Account for the Regular Rx statistics */ 386 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 387 388 /* Account for XDP statistics [if needed] */ 389 if (edev->xdp_prog) 390 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 391 return num_stats; 392 393 case ETH_SS_PRIV_FLAGS: 394 return QEDE_PRI_FLAG_LEN; 395 case ETH_SS_TEST: 396 if (!IS_VF(edev)) 397 return QEDE_ETHTOOL_TEST_MAX; 398 else 399 return 0; 400 default: 401 DP_VERBOSE(edev, QED_MSG_DEBUG, 402 "Unsupported stringset 0x%08x\n", stringset); 403 return -EINVAL; 404 } 405 } 406 407 static u32 qede_get_priv_flags(struct net_device *dev) 408 { 409 struct qede_dev *edev = netdev_priv(dev); 410 u32 flags = 0; 411 412 if (edev->dev_info.common.num_hwfns > 1) 413 flags |= BIT(QEDE_PRI_FLAG_CMT); 414 415 if (edev->dev_info.common.smart_an) 416 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT); 417 418 return flags; 419 } 420 421 struct qede_link_mode_mapping { 422 u32 qed_link_mode; 423 u32 ethtool_link_mode; 424 }; 425 426 static const struct qede_link_mode_mapping qed_lm_map[] = { 427 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT}, 428 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT}, 429 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT}, 430 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT}, 431 {QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT}, 432 {QED_LM_2500baseX_Full_BIT, ETHTOOL_LINK_MODE_2500baseX_Full_BIT}, 433 {QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT}, 434 {QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT}, 435 {QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT}, 436 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 437 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 438 {QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT}, 439 {QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT}, 440 {QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT}, 441 {QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT}, 442 {QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT}, 443 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT}, 444 {QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT}, 445 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT}, 446 {QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT}, 447 {QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT}, 448 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT}, 449 {QED_LM_100000baseKR4_Full_BIT, 450 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT}, 451 {QED_LM_100000baseSR4_Full_BIT, 452 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT}, 453 {QED_LM_100000baseCR4_Full_BIT, 454 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT}, 455 {QED_LM_100000baseLR4_ER4_Full_BIT, 456 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT}, 457 {QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT}, 458 {QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT}, 459 {QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT}, 460 {QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT}, 461 {QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT}, 462 {QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT}, 463 }; 464 465 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \ 466 { \ 467 int i; \ 468 \ 469 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 470 if ((caps) & (qed_lm_map[i].qed_link_mode)) \ 471 __set_bit(qed_lm_map[i].ethtool_link_mode,\ 472 lk_ksettings->link_modes.name); \ 473 } \ 474 } 475 476 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \ 477 { \ 478 int i; \ 479 \ 480 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 481 if (test_bit(qed_lm_map[i].ethtool_link_mode, \ 482 lk_ksettings->link_modes.name)) \ 483 caps |= qed_lm_map[i].qed_link_mode; \ 484 } \ 485 } 486 487 static int qede_get_link_ksettings(struct net_device *dev, 488 struct ethtool_link_ksettings *cmd) 489 { 490 struct ethtool_link_settings *base = &cmd->base; 491 struct qede_dev *edev = netdev_priv(dev); 492 struct qed_link_output current_link; 493 494 __qede_lock(edev); 495 496 memset(¤t_link, 0, sizeof(current_link)); 497 edev->ops->common->get_link(edev->cdev, ¤t_link); 498 499 ethtool_link_ksettings_zero_link_mode(cmd, supported); 500 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported) 501 502 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 503 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising) 504 505 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 506 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising) 507 508 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 509 base->speed = current_link.speed; 510 base->duplex = current_link.duplex; 511 } else { 512 base->speed = SPEED_UNKNOWN; 513 base->duplex = DUPLEX_UNKNOWN; 514 } 515 516 __qede_unlock(edev); 517 518 base->port = current_link.port; 519 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 520 AUTONEG_DISABLE; 521 522 return 0; 523 } 524 525 static int qede_set_link_ksettings(struct net_device *dev, 526 const struct ethtool_link_ksettings *cmd) 527 { 528 const struct ethtool_link_settings *base = &cmd->base; 529 struct qede_dev *edev = netdev_priv(dev); 530 struct qed_link_output current_link; 531 struct qed_link_params params; 532 u32 sup_caps; 533 534 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 535 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 536 return -EOPNOTSUPP; 537 } 538 memset(¤t_link, 0, sizeof(current_link)); 539 memset(¶ms, 0, sizeof(params)); 540 edev->ops->common->get_link(edev->cdev, ¤t_link); 541 542 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 543 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 544 if (base->autoneg == AUTONEG_ENABLE) { 545 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 546 DP_INFO(edev, "Auto negotiation is not supported\n"); 547 return -EOPNOTSUPP; 548 } 549 550 params.autoneg = true; 551 params.forced_speed = 0; 552 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising) 553 } else { /* forced speed */ 554 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 555 params.autoneg = false; 556 params.forced_speed = base->speed; 557 switch (base->speed) { 558 case SPEED_1000: 559 sup_caps = QED_LM_1000baseT_Full_BIT | 560 QED_LM_1000baseKX_Full_BIT | 561 QED_LM_1000baseX_Full_BIT; 562 if (!(current_link.supported_caps & sup_caps)) { 563 DP_INFO(edev, "1G speed not supported\n"); 564 return -EINVAL; 565 } 566 params.adv_speeds = current_link.supported_caps & 567 sup_caps; 568 break; 569 case SPEED_10000: 570 sup_caps = QED_LM_10000baseT_Full_BIT | 571 QED_LM_10000baseKR_Full_BIT | 572 QED_LM_10000baseKX4_Full_BIT | 573 QED_LM_10000baseR_FEC_BIT | 574 QED_LM_10000baseCR_Full_BIT | 575 QED_LM_10000baseSR_Full_BIT | 576 QED_LM_10000baseLR_Full_BIT | 577 QED_LM_10000baseLRM_Full_BIT; 578 if (!(current_link.supported_caps & sup_caps)) { 579 DP_INFO(edev, "10G speed not supported\n"); 580 return -EINVAL; 581 } 582 params.adv_speeds = current_link.supported_caps & 583 sup_caps; 584 break; 585 case SPEED_20000: 586 if (!(current_link.supported_caps & 587 QED_LM_20000baseKR2_Full_BIT)) { 588 DP_INFO(edev, "20G speed not supported\n"); 589 return -EINVAL; 590 } 591 params.adv_speeds = QED_LM_20000baseKR2_Full_BIT; 592 break; 593 case SPEED_25000: 594 sup_caps = QED_LM_25000baseKR_Full_BIT | 595 QED_LM_25000baseCR_Full_BIT | 596 QED_LM_25000baseSR_Full_BIT; 597 if (!(current_link.supported_caps & sup_caps)) { 598 DP_INFO(edev, "25G speed not supported\n"); 599 return -EINVAL; 600 } 601 params.adv_speeds = current_link.supported_caps & 602 sup_caps; 603 break; 604 case SPEED_40000: 605 sup_caps = QED_LM_40000baseLR4_Full_BIT | 606 QED_LM_40000baseKR4_Full_BIT | 607 QED_LM_40000baseCR4_Full_BIT | 608 QED_LM_40000baseSR4_Full_BIT; 609 if (!(current_link.supported_caps & sup_caps)) { 610 DP_INFO(edev, "40G speed not supported\n"); 611 return -EINVAL; 612 } 613 params.adv_speeds = current_link.supported_caps & 614 sup_caps; 615 break; 616 case SPEED_50000: 617 sup_caps = QED_LM_50000baseKR2_Full_BIT | 618 QED_LM_50000baseCR2_Full_BIT | 619 QED_LM_50000baseSR2_Full_BIT; 620 if (!(current_link.supported_caps & sup_caps)) { 621 DP_INFO(edev, "50G speed not supported\n"); 622 return -EINVAL; 623 } 624 params.adv_speeds = current_link.supported_caps & 625 sup_caps; 626 break; 627 case SPEED_100000: 628 sup_caps = QED_LM_100000baseKR4_Full_BIT | 629 QED_LM_100000baseSR4_Full_BIT | 630 QED_LM_100000baseCR4_Full_BIT | 631 QED_LM_100000baseLR4_ER4_Full_BIT; 632 if (!(current_link.supported_caps & sup_caps)) { 633 DP_INFO(edev, "100G speed not supported\n"); 634 return -EINVAL; 635 } 636 params.adv_speeds = current_link.supported_caps & 637 sup_caps; 638 break; 639 default: 640 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 641 return -EINVAL; 642 } 643 } 644 645 params.link_up = true; 646 edev->ops->common->set_link(edev->cdev, ¶ms); 647 648 return 0; 649 } 650 651 static void qede_get_drvinfo(struct net_device *ndev, 652 struct ethtool_drvinfo *info) 653 { 654 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 655 struct qede_dev *edev = netdev_priv(ndev); 656 char mbi[ETHTOOL_FWVERS_LEN]; 657 658 strlcpy(info->driver, "qede", sizeof(info->driver)); 659 660 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 661 edev->dev_info.common.fw_major, 662 edev->dev_info.common.fw_minor, 663 edev->dev_info.common.fw_rev, 664 edev->dev_info.common.fw_eng); 665 666 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 667 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 668 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 669 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 670 edev->dev_info.common.mfw_rev & 0xFF); 671 672 if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm] ")) < 673 sizeof(info->version)) 674 snprintf(info->version, sizeof(info->version), 675 "%s [storm %s]", DRV_MODULE_VERSION, storm); 676 else 677 snprintf(info->version, sizeof(info->version), 678 "%s %s", DRV_MODULE_VERSION, storm); 679 680 if (edev->dev_info.common.mbi_version) { 681 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d", 682 (edev->dev_info.common.mbi_version & 683 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET, 684 (edev->dev_info.common.mbi_version & 685 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET, 686 (edev->dev_info.common.mbi_version & 687 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET); 688 snprintf(info->fw_version, sizeof(info->fw_version), 689 "mbi %s [mfw %s]", mbi, mfw); 690 } else { 691 snprintf(info->fw_version, sizeof(info->fw_version), 692 "mfw %s", mfw); 693 } 694 695 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 696 } 697 698 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 699 { 700 struct qede_dev *edev = netdev_priv(ndev); 701 702 if (edev->dev_info.common.wol_support) { 703 wol->supported = WAKE_MAGIC; 704 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 705 } 706 } 707 708 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 709 { 710 struct qede_dev *edev = netdev_priv(ndev); 711 bool wol_requested; 712 int rc; 713 714 if (wol->wolopts & ~WAKE_MAGIC) { 715 DP_INFO(edev, 716 "Can't support WoL options other than magic-packet\n"); 717 return -EINVAL; 718 } 719 720 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 721 if (wol_requested == edev->wol_enabled) 722 return 0; 723 724 /* Need to actually change configuration */ 725 if (!edev->dev_info.common.wol_support) { 726 DP_INFO(edev, "Device doesn't support WoL\n"); 727 return -EINVAL; 728 } 729 730 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 731 if (!rc) 732 edev->wol_enabled = wol_requested; 733 734 return rc; 735 } 736 737 static u32 qede_get_msglevel(struct net_device *ndev) 738 { 739 struct qede_dev *edev = netdev_priv(ndev); 740 741 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 742 } 743 744 static void qede_set_msglevel(struct net_device *ndev, u32 level) 745 { 746 struct qede_dev *edev = netdev_priv(ndev); 747 u32 dp_module = 0; 748 u8 dp_level = 0; 749 750 qede_config_debug(level, &dp_module, &dp_level); 751 752 edev->dp_level = dp_level; 753 edev->dp_module = dp_module; 754 edev->ops->common->update_msglvl(edev->cdev, 755 dp_module, dp_level); 756 } 757 758 static int qede_nway_reset(struct net_device *dev) 759 { 760 struct qede_dev *edev = netdev_priv(dev); 761 struct qed_link_output current_link; 762 struct qed_link_params link_params; 763 764 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 765 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 766 return -EOPNOTSUPP; 767 } 768 769 if (!netif_running(dev)) 770 return 0; 771 772 memset(¤t_link, 0, sizeof(current_link)); 773 edev->ops->common->get_link(edev->cdev, ¤t_link); 774 if (!current_link.link_up) 775 return 0; 776 777 /* Toggle the link */ 778 memset(&link_params, 0, sizeof(link_params)); 779 link_params.link_up = false; 780 edev->ops->common->set_link(edev->cdev, &link_params); 781 link_params.link_up = true; 782 edev->ops->common->set_link(edev->cdev, &link_params); 783 784 return 0; 785 } 786 787 static u32 qede_get_link(struct net_device *dev) 788 { 789 struct qede_dev *edev = netdev_priv(dev); 790 struct qed_link_output current_link; 791 792 memset(¤t_link, 0, sizeof(current_link)); 793 edev->ops->common->get_link(edev->cdev, ¤t_link); 794 795 return current_link.link_up; 796 } 797 798 static int qede_flash_device(struct net_device *dev, 799 struct ethtool_flash *flash) 800 { 801 struct qede_dev *edev = netdev_priv(dev); 802 803 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 804 } 805 806 static int qede_get_coalesce(struct net_device *dev, 807 struct ethtool_coalesce *coal) 808 { 809 void *rx_handle = NULL, *tx_handle = NULL; 810 struct qede_dev *edev = netdev_priv(dev); 811 u16 rx_coal, tx_coal, i, rc = 0; 812 struct qede_fastpath *fp; 813 814 rx_coal = QED_DEFAULT_RX_USECS; 815 tx_coal = QED_DEFAULT_TX_USECS; 816 817 memset(coal, 0, sizeof(struct ethtool_coalesce)); 818 819 __qede_lock(edev); 820 if (edev->state == QEDE_STATE_OPEN) { 821 for_each_queue(i) { 822 fp = &edev->fp_array[i]; 823 824 if (fp->type & QEDE_FASTPATH_RX) { 825 rx_handle = fp->rxq->handle; 826 break; 827 } 828 } 829 830 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 831 if (rc) { 832 DP_INFO(edev, "Read Rx coalesce error\n"); 833 goto out; 834 } 835 836 for_each_queue(i) { 837 struct qede_tx_queue *txq; 838 839 fp = &edev->fp_array[i]; 840 841 /* All TX queues of given fastpath uses same 842 * coalescing value, so no need to iterate over 843 * all TCs, TC0 txq should suffice. 844 */ 845 if (fp->type & QEDE_FASTPATH_TX) { 846 txq = QEDE_FP_TC0_TXQ(fp); 847 tx_handle = txq->handle; 848 break; 849 } 850 } 851 852 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 853 if (rc) 854 DP_INFO(edev, "Read Tx coalesce error\n"); 855 } 856 857 out: 858 __qede_unlock(edev); 859 860 coal->rx_coalesce_usecs = rx_coal; 861 coal->tx_coalesce_usecs = tx_coal; 862 863 return rc; 864 } 865 866 static int qede_set_coalesce(struct net_device *dev, 867 struct ethtool_coalesce *coal) 868 { 869 struct qede_dev *edev = netdev_priv(dev); 870 struct qede_fastpath *fp; 871 int i, rc = 0; 872 u16 rxc, txc; 873 874 if (!netif_running(dev)) { 875 DP_INFO(edev, "Interface is down\n"); 876 return -EINVAL; 877 } 878 879 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 880 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 881 DP_INFO(edev, 882 "Can't support requested %s coalesce value [max supported value %d]\n", 883 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 884 "tx", QED_COALESCE_MAX); 885 return -EINVAL; 886 } 887 888 rxc = (u16)coal->rx_coalesce_usecs; 889 txc = (u16)coal->tx_coalesce_usecs; 890 for_each_queue(i) { 891 fp = &edev->fp_array[i]; 892 893 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 894 rc = edev->ops->common->set_coalesce(edev->cdev, 895 rxc, 0, 896 fp->rxq->handle); 897 if (rc) { 898 DP_INFO(edev, 899 "Set RX coalesce error, rc = %d\n", rc); 900 return rc; 901 } 902 } 903 904 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 905 struct qede_tx_queue *txq; 906 907 /* All TX queues of given fastpath uses same 908 * coalescing value, so no need to iterate over 909 * all TCs, TC0 txq should suffice. 910 */ 911 txq = QEDE_FP_TC0_TXQ(fp); 912 913 rc = edev->ops->common->set_coalesce(edev->cdev, 914 0, txc, 915 txq->handle); 916 if (rc) { 917 DP_INFO(edev, 918 "Set TX coalesce error, rc = %d\n", rc); 919 return rc; 920 } 921 } 922 } 923 924 return rc; 925 } 926 927 static void qede_get_ringparam(struct net_device *dev, 928 struct ethtool_ringparam *ering) 929 { 930 struct qede_dev *edev = netdev_priv(dev); 931 932 ering->rx_max_pending = NUM_RX_BDS_MAX; 933 ering->rx_pending = edev->q_num_rx_buffers; 934 ering->tx_max_pending = NUM_TX_BDS_MAX; 935 ering->tx_pending = edev->q_num_tx_buffers; 936 } 937 938 static int qede_set_ringparam(struct net_device *dev, 939 struct ethtool_ringparam *ering) 940 { 941 struct qede_dev *edev = netdev_priv(dev); 942 943 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 944 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 945 ering->rx_pending, ering->tx_pending); 946 947 /* Validate legality of configuration */ 948 if (ering->rx_pending > NUM_RX_BDS_MAX || 949 ering->rx_pending < NUM_RX_BDS_MIN || 950 ering->tx_pending > NUM_TX_BDS_MAX || 951 ering->tx_pending < NUM_TX_BDS_MIN) { 952 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 953 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 954 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 955 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 956 return -EINVAL; 957 } 958 959 /* Change ring size and re-load */ 960 edev->q_num_rx_buffers = ering->rx_pending; 961 edev->q_num_tx_buffers = ering->tx_pending; 962 963 qede_reload(edev, NULL, false); 964 965 return 0; 966 } 967 968 static void qede_get_pauseparam(struct net_device *dev, 969 struct ethtool_pauseparam *epause) 970 { 971 struct qede_dev *edev = netdev_priv(dev); 972 struct qed_link_output current_link; 973 974 memset(¤t_link, 0, sizeof(current_link)); 975 edev->ops->common->get_link(edev->cdev, ¤t_link); 976 977 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 978 epause->autoneg = true; 979 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 980 epause->rx_pause = true; 981 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 982 epause->tx_pause = true; 983 984 DP_VERBOSE(edev, QED_MSG_DEBUG, 985 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 986 epause->cmd, epause->autoneg, epause->rx_pause, 987 epause->tx_pause); 988 } 989 990 static int qede_set_pauseparam(struct net_device *dev, 991 struct ethtool_pauseparam *epause) 992 { 993 struct qede_dev *edev = netdev_priv(dev); 994 struct qed_link_params params; 995 struct qed_link_output current_link; 996 997 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 998 DP_INFO(edev, 999 "Pause settings are not allowed to be changed\n"); 1000 return -EOPNOTSUPP; 1001 } 1002 1003 memset(¤t_link, 0, sizeof(current_link)); 1004 edev->ops->common->get_link(edev->cdev, ¤t_link); 1005 1006 memset(¶ms, 0, sizeof(params)); 1007 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 1008 if (epause->autoneg) { 1009 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 1010 DP_INFO(edev, "autoneg not supported\n"); 1011 return -EINVAL; 1012 } 1013 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 1014 } 1015 if (epause->rx_pause) 1016 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 1017 if (epause->tx_pause) 1018 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 1019 1020 params.link_up = true; 1021 edev->ops->common->set_link(edev->cdev, ¶ms); 1022 1023 return 0; 1024 } 1025 1026 static void qede_get_regs(struct net_device *ndev, 1027 struct ethtool_regs *regs, void *buffer) 1028 { 1029 struct qede_dev *edev = netdev_priv(ndev); 1030 1031 regs->version = 0; 1032 memset(buffer, 0, regs->len); 1033 1034 if (edev->ops && edev->ops->common) 1035 edev->ops->common->dbg_all_data(edev->cdev, buffer); 1036 } 1037 1038 static int qede_get_regs_len(struct net_device *ndev) 1039 { 1040 struct qede_dev *edev = netdev_priv(ndev); 1041 1042 if (edev->ops && edev->ops->common) 1043 return edev->ops->common->dbg_all_data_size(edev->cdev); 1044 else 1045 return -EINVAL; 1046 } 1047 1048 static void qede_update_mtu(struct qede_dev *edev, 1049 struct qede_reload_args *args) 1050 { 1051 edev->ndev->mtu = args->u.mtu; 1052 } 1053 1054 /* Netdevice NDOs */ 1055 int qede_change_mtu(struct net_device *ndev, int new_mtu) 1056 { 1057 struct qede_dev *edev = netdev_priv(ndev); 1058 struct qede_reload_args args; 1059 1060 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1061 "Configuring MTU size of %d\n", new_mtu); 1062 1063 if (new_mtu > PAGE_SIZE) 1064 ndev->features &= ~NETIF_F_GRO_HW; 1065 1066 /* Set the mtu field and re-start the interface if needed */ 1067 args.u.mtu = new_mtu; 1068 args.func = &qede_update_mtu; 1069 qede_reload(edev, &args, false); 1070 1071 edev->ops->common->update_mtu(edev->cdev, new_mtu); 1072 1073 return 0; 1074 } 1075 1076 static void qede_get_channels(struct net_device *dev, 1077 struct ethtool_channels *channels) 1078 { 1079 struct qede_dev *edev = netdev_priv(dev); 1080 1081 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 1082 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 1083 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 1084 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 1085 edev->fp_num_rx; 1086 channels->tx_count = edev->fp_num_tx; 1087 channels->rx_count = edev->fp_num_rx; 1088 } 1089 1090 static int qede_set_channels(struct net_device *dev, 1091 struct ethtool_channels *channels) 1092 { 1093 struct qede_dev *edev = netdev_priv(dev); 1094 u32 count; 1095 1096 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1097 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 1098 channels->rx_count, channels->tx_count, 1099 channels->other_count, channels->combined_count); 1100 1101 count = channels->rx_count + channels->tx_count + 1102 channels->combined_count; 1103 1104 /* We don't support `other' channels */ 1105 if (channels->other_count) { 1106 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1107 "command parameters not supported\n"); 1108 return -EINVAL; 1109 } 1110 1111 if (!(channels->combined_count || (channels->rx_count && 1112 channels->tx_count))) { 1113 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1114 "need to request at least one transmit and one receive channel\n"); 1115 return -EINVAL; 1116 } 1117 1118 if (count > QEDE_MAX_RSS_CNT(edev)) { 1119 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1120 "requested channels = %d max supported channels = %d\n", 1121 count, QEDE_MAX_RSS_CNT(edev)); 1122 return -EINVAL; 1123 } 1124 1125 /* Check if there was a change in the active parameters */ 1126 if ((count == QEDE_QUEUE_CNT(edev)) && 1127 (channels->tx_count == edev->fp_num_tx) && 1128 (channels->rx_count == edev->fp_num_rx)) { 1129 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1130 "No change in active parameters\n"); 1131 return 0; 1132 } 1133 1134 /* We need the number of queues to be divisible between the hwfns */ 1135 if ((count % edev->dev_info.common.num_hwfns) || 1136 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1137 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1138 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1139 "Number of channels must be divisible by %04x\n", 1140 edev->dev_info.common.num_hwfns); 1141 return -EINVAL; 1142 } 1143 1144 /* Set number of queues and reload if necessary */ 1145 edev->req_queues = count; 1146 edev->req_num_tx = channels->tx_count; 1147 edev->req_num_rx = channels->rx_count; 1148 /* Reset the indirection table if rx queue count is updated */ 1149 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1150 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1151 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1152 } 1153 1154 qede_reload(edev, NULL, false); 1155 1156 return 0; 1157 } 1158 1159 static int qede_get_ts_info(struct net_device *dev, 1160 struct ethtool_ts_info *info) 1161 { 1162 struct qede_dev *edev = netdev_priv(dev); 1163 1164 return qede_ptp_get_ts_info(edev, info); 1165 } 1166 1167 static int qede_set_phys_id(struct net_device *dev, 1168 enum ethtool_phys_id_state state) 1169 { 1170 struct qede_dev *edev = netdev_priv(dev); 1171 u8 led_state = 0; 1172 1173 switch (state) { 1174 case ETHTOOL_ID_ACTIVE: 1175 return 1; /* cycle on/off once per second */ 1176 1177 case ETHTOOL_ID_ON: 1178 led_state = QED_LED_MODE_ON; 1179 break; 1180 1181 case ETHTOOL_ID_OFF: 1182 led_state = QED_LED_MODE_OFF; 1183 break; 1184 1185 case ETHTOOL_ID_INACTIVE: 1186 led_state = QED_LED_MODE_RESTORE; 1187 break; 1188 } 1189 1190 edev->ops->common->set_led(edev->cdev, led_state); 1191 1192 return 0; 1193 } 1194 1195 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1196 { 1197 info->data = RXH_IP_SRC | RXH_IP_DST; 1198 1199 switch (info->flow_type) { 1200 case TCP_V4_FLOW: 1201 case TCP_V6_FLOW: 1202 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1203 break; 1204 case UDP_V4_FLOW: 1205 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1206 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1207 break; 1208 case UDP_V6_FLOW: 1209 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1210 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1211 break; 1212 case IPV4_FLOW: 1213 case IPV6_FLOW: 1214 break; 1215 default: 1216 info->data = 0; 1217 break; 1218 } 1219 1220 return 0; 1221 } 1222 1223 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1224 u32 *rule_locs) 1225 { 1226 struct qede_dev *edev = netdev_priv(dev); 1227 int rc = 0; 1228 1229 switch (info->cmd) { 1230 case ETHTOOL_GRXRINGS: 1231 info->data = QEDE_RSS_COUNT(edev); 1232 break; 1233 case ETHTOOL_GRXFH: 1234 rc = qede_get_rss_flags(edev, info); 1235 break; 1236 case ETHTOOL_GRXCLSRLCNT: 1237 info->rule_cnt = qede_get_arfs_filter_count(edev); 1238 info->data = QEDE_RFS_MAX_FLTR; 1239 break; 1240 case ETHTOOL_GRXCLSRULE: 1241 rc = qede_get_cls_rule_entry(edev, info); 1242 break; 1243 case ETHTOOL_GRXCLSRLALL: 1244 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1245 break; 1246 default: 1247 DP_ERR(edev, "Command parameters not supported\n"); 1248 rc = -EOPNOTSUPP; 1249 } 1250 1251 return rc; 1252 } 1253 1254 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1255 { 1256 struct qed_update_vport_params *vport_update_params; 1257 u8 set_caps = 0, clr_caps = 0; 1258 int rc = 0; 1259 1260 DP_VERBOSE(edev, QED_MSG_DEBUG, 1261 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1262 info->flow_type, info->data); 1263 1264 switch (info->flow_type) { 1265 case TCP_V4_FLOW: 1266 case TCP_V6_FLOW: 1267 /* For TCP only 4-tuple hash is supported */ 1268 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1269 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1270 DP_INFO(edev, "Command parameters not supported\n"); 1271 return -EINVAL; 1272 } 1273 return 0; 1274 case UDP_V4_FLOW: 1275 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1276 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1277 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1278 set_caps = QED_RSS_IPV4_UDP; 1279 DP_VERBOSE(edev, QED_MSG_DEBUG, 1280 "UDP 4-tuple enabled\n"); 1281 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1282 clr_caps = QED_RSS_IPV4_UDP; 1283 DP_VERBOSE(edev, QED_MSG_DEBUG, 1284 "UDP 4-tuple disabled\n"); 1285 } else { 1286 return -EINVAL; 1287 } 1288 break; 1289 case UDP_V6_FLOW: 1290 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1291 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1292 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1293 set_caps = QED_RSS_IPV6_UDP; 1294 DP_VERBOSE(edev, QED_MSG_DEBUG, 1295 "UDP 4-tuple enabled\n"); 1296 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1297 clr_caps = QED_RSS_IPV6_UDP; 1298 DP_VERBOSE(edev, QED_MSG_DEBUG, 1299 "UDP 4-tuple disabled\n"); 1300 } else { 1301 return -EINVAL; 1302 } 1303 break; 1304 case IPV4_FLOW: 1305 case IPV6_FLOW: 1306 /* For IP only 2-tuple hash is supported */ 1307 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1308 DP_INFO(edev, "Command parameters not supported\n"); 1309 return -EINVAL; 1310 } 1311 return 0; 1312 case SCTP_V4_FLOW: 1313 case AH_ESP_V4_FLOW: 1314 case AH_V4_FLOW: 1315 case ESP_V4_FLOW: 1316 case SCTP_V6_FLOW: 1317 case AH_ESP_V6_FLOW: 1318 case AH_V6_FLOW: 1319 case ESP_V6_FLOW: 1320 case IP_USER_FLOW: 1321 case ETHER_FLOW: 1322 /* RSS is not supported for these protocols */ 1323 if (info->data) { 1324 DP_INFO(edev, "Command parameters not supported\n"); 1325 return -EINVAL; 1326 } 1327 return 0; 1328 default: 1329 return -EINVAL; 1330 } 1331 1332 /* No action is needed if there is no change in the rss capability */ 1333 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1334 return 0; 1335 1336 /* Update internal configuration */ 1337 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1338 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1339 1340 /* Re-configure if possible */ 1341 __qede_lock(edev); 1342 if (edev->state == QEDE_STATE_OPEN) { 1343 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1344 if (!vport_update_params) { 1345 __qede_unlock(edev); 1346 return -ENOMEM; 1347 } 1348 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1349 &vport_update_params->update_rss_flg); 1350 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1351 vfree(vport_update_params); 1352 } 1353 __qede_unlock(edev); 1354 1355 return rc; 1356 } 1357 1358 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1359 { 1360 struct qede_dev *edev = netdev_priv(dev); 1361 int rc; 1362 1363 switch (info->cmd) { 1364 case ETHTOOL_SRXFH: 1365 rc = qede_set_rss_flags(edev, info); 1366 break; 1367 case ETHTOOL_SRXCLSRLINS: 1368 rc = qede_add_cls_rule(edev, info); 1369 break; 1370 case ETHTOOL_SRXCLSRLDEL: 1371 rc = qede_delete_flow_filter(edev, info->fs.location); 1372 break; 1373 default: 1374 DP_INFO(edev, "Command parameters not supported\n"); 1375 rc = -EOPNOTSUPP; 1376 } 1377 1378 return rc; 1379 } 1380 1381 static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1382 { 1383 return QED_RSS_IND_TABLE_SIZE; 1384 } 1385 1386 static u32 qede_get_rxfh_key_size(struct net_device *dev) 1387 { 1388 struct qede_dev *edev = netdev_priv(dev); 1389 1390 return sizeof(edev->rss_key); 1391 } 1392 1393 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1394 { 1395 struct qede_dev *edev = netdev_priv(dev); 1396 int i; 1397 1398 if (hfunc) 1399 *hfunc = ETH_RSS_HASH_TOP; 1400 1401 if (!indir) 1402 return 0; 1403 1404 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1405 indir[i] = edev->rss_ind_table[i]; 1406 1407 if (key) 1408 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1409 1410 return 0; 1411 } 1412 1413 static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1414 const u8 *key, const u8 hfunc) 1415 { 1416 struct qed_update_vport_params *vport_update_params; 1417 struct qede_dev *edev = netdev_priv(dev); 1418 int i, rc = 0; 1419 1420 if (edev->dev_info.common.num_hwfns > 1) { 1421 DP_INFO(edev, 1422 "RSS configuration is not supported for 100G devices\n"); 1423 return -EOPNOTSUPP; 1424 } 1425 1426 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1427 return -EOPNOTSUPP; 1428 1429 if (!indir && !key) 1430 return 0; 1431 1432 if (indir) { 1433 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1434 edev->rss_ind_table[i] = indir[i]; 1435 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1436 } 1437 1438 if (key) { 1439 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1440 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1441 } 1442 1443 __qede_lock(edev); 1444 if (edev->state == QEDE_STATE_OPEN) { 1445 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1446 if (!vport_update_params) { 1447 __qede_unlock(edev); 1448 return -ENOMEM; 1449 } 1450 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1451 &vport_update_params->update_rss_flg); 1452 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1453 vfree(vport_update_params); 1454 } 1455 __qede_unlock(edev); 1456 1457 return rc; 1458 } 1459 1460 /* This function enables the interrupt generation and the NAPI on the device */ 1461 static void qede_netif_start(struct qede_dev *edev) 1462 { 1463 int i; 1464 1465 if (!netif_running(edev->ndev)) 1466 return; 1467 1468 for_each_queue(i) { 1469 /* Update and reenable interrupts */ 1470 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1471 napi_enable(&edev->fp_array[i].napi); 1472 } 1473 } 1474 1475 /* This function disables the NAPI and the interrupt generation on the device */ 1476 static void qede_netif_stop(struct qede_dev *edev) 1477 { 1478 int i; 1479 1480 for_each_queue(i) { 1481 napi_disable(&edev->fp_array[i].napi); 1482 /* Disable interrupts */ 1483 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1484 } 1485 } 1486 1487 static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1488 struct sk_buff *skb) 1489 { 1490 struct qede_tx_queue *txq = NULL; 1491 struct eth_tx_1st_bd *first_bd; 1492 dma_addr_t mapping; 1493 int i, idx; 1494 u16 val; 1495 1496 for_each_queue(i) { 1497 struct qede_fastpath *fp = &edev->fp_array[i]; 1498 1499 if (fp->type & QEDE_FASTPATH_TX) { 1500 txq = QEDE_FP_TC0_TXQ(fp); 1501 break; 1502 } 1503 } 1504 1505 if (!txq) { 1506 DP_NOTICE(edev, "Tx path is not available\n"); 1507 return -1; 1508 } 1509 1510 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1511 idx = txq->sw_tx_prod; 1512 txq->sw_tx_ring.skbs[idx].skb = skb; 1513 first_bd = qed_chain_produce(&txq->tx_pbl); 1514 memset(first_bd, 0, sizeof(*first_bd)); 1515 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1516 first_bd->data.bd_flags.bitfields = val; 1517 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1518 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1519 first_bd->data.bitfields |= cpu_to_le16(val); 1520 1521 /* Map skb linear data for DMA and set in the first BD */ 1522 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1523 skb_headlen(skb), DMA_TO_DEVICE); 1524 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1525 DP_NOTICE(edev, "SKB mapping failed\n"); 1526 return -ENOMEM; 1527 } 1528 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1529 1530 /* update the first BD with the actual num BDs */ 1531 first_bd->data.nbds = 1; 1532 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1533 /* 'next page' entries are counted in the producer value */ 1534 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1535 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1536 1537 /* wmb makes sure that the BDs data is updated before updating the 1538 * producer, otherwise FW may read old data from the BDs. 1539 */ 1540 wmb(); 1541 barrier(); 1542 writel(txq->tx_db.raw, txq->doorbell_addr); 1543 1544 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1545 if (qede_txq_has_work(txq)) 1546 break; 1547 usleep_range(100, 200); 1548 } 1549 1550 if (!qede_txq_has_work(txq)) { 1551 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1552 return -1; 1553 } 1554 1555 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1556 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1557 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1558 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1559 txq->sw_tx_ring.skbs[idx].skb = NULL; 1560 1561 return 0; 1562 } 1563 1564 static int qede_selftest_receive_traffic(struct qede_dev *edev) 1565 { 1566 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len; 1567 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1568 struct qede_rx_queue *rxq = NULL; 1569 struct sw_rx_data *sw_rx_data; 1570 union eth_rx_cqe *cqe; 1571 int i, iter, rc = 0; 1572 u8 *data_ptr; 1573 1574 for_each_queue(i) { 1575 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1576 rxq = edev->fp_array[i].rxq; 1577 break; 1578 } 1579 } 1580 1581 if (!rxq) { 1582 DP_NOTICE(edev, "Rx path is not available\n"); 1583 return -1; 1584 } 1585 1586 /* The packet is expected to receive on rx-queue 0 even though RSS is 1587 * enabled. This is because the queue 0 is configured as the default 1588 * queue and that the loopback traffic is not IP. 1589 */ 1590 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1591 if (!qede_has_rx_work(rxq)) { 1592 usleep_range(100, 200); 1593 continue; 1594 } 1595 1596 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1597 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1598 1599 /* Memory barrier to prevent the CPU from doing speculative 1600 * reads of CQE/BD before reading hw_comp_cons. If the CQE is 1601 * read before it is written by FW, then FW writes CQE and SB, 1602 * and then the CPU reads the hw_comp_cons, it will use an old 1603 * CQE. 1604 */ 1605 rmb(); 1606 1607 /* Get the CQE from the completion ring */ 1608 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1609 1610 /* Get the data from the SW ring */ 1611 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1612 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1613 fp_cqe = &cqe->fast_path_regular; 1614 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1615 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1616 fp_cqe->placement_offset + 1617 sw_rx_data->page_offset + 1618 rxq->rx_headroom); 1619 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1620 ether_addr_equal(data_ptr + ETH_ALEN, 1621 edev->ndev->dev_addr)) { 1622 for (i = ETH_HLEN; i < len; i++) 1623 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1624 rc = -1; 1625 break; 1626 } 1627 1628 qede_recycle_rx_bd_ring(rxq, 1); 1629 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1630 break; 1631 } 1632 1633 DP_INFO(edev, "Not the transmitted packet\n"); 1634 qede_recycle_rx_bd_ring(rxq, 1); 1635 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1636 } 1637 1638 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1639 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1640 return -1; 1641 } 1642 1643 qede_update_rx_prod(edev, rxq); 1644 1645 return rc; 1646 } 1647 1648 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1649 { 1650 struct qed_link_params link_params; 1651 struct sk_buff *skb = NULL; 1652 int rc = 0, i; 1653 u32 pkt_size; 1654 u8 *packet; 1655 1656 if (!netif_running(edev->ndev)) { 1657 DP_NOTICE(edev, "Interface is down\n"); 1658 return -EINVAL; 1659 } 1660 1661 qede_netif_stop(edev); 1662 1663 /* Bring up the link in Loopback mode */ 1664 memset(&link_params, 0, sizeof(link_params)); 1665 link_params.link_up = true; 1666 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1667 link_params.loopback_mode = loopback_mode; 1668 edev->ops->common->set_link(edev->cdev, &link_params); 1669 1670 /* Wait for loopback configuration to apply */ 1671 msleep_interruptible(500); 1672 1673 /* Setting max packet size to 1.5K to avoid data being split over 1674 * multiple BDs in cases where MTU > PAGE_SIZE. 1675 */ 1676 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ? 1677 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN); 1678 1679 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1680 if (!skb) { 1681 DP_INFO(edev, "Can't allocate skb\n"); 1682 rc = -ENOMEM; 1683 goto test_loopback_exit; 1684 } 1685 packet = skb_put(skb, pkt_size); 1686 ether_addr_copy(packet, edev->ndev->dev_addr); 1687 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1688 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1689 for (i = ETH_HLEN; i < pkt_size; i++) 1690 packet[i] = (unsigned char)(i & 0xff); 1691 1692 rc = qede_selftest_transmit_traffic(edev, skb); 1693 if (rc) 1694 goto test_loopback_exit; 1695 1696 rc = qede_selftest_receive_traffic(edev); 1697 if (rc) 1698 goto test_loopback_exit; 1699 1700 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1701 1702 test_loopback_exit: 1703 dev_kfree_skb(skb); 1704 1705 /* Bring up the link in Normal mode */ 1706 memset(&link_params, 0, sizeof(link_params)); 1707 link_params.link_up = true; 1708 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1709 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1710 edev->ops->common->set_link(edev->cdev, &link_params); 1711 1712 /* Wait for loopback configuration to apply */ 1713 msleep_interruptible(500); 1714 1715 qede_netif_start(edev); 1716 1717 return rc; 1718 } 1719 1720 static void qede_self_test(struct net_device *dev, 1721 struct ethtool_test *etest, u64 *buf) 1722 { 1723 struct qede_dev *edev = netdev_priv(dev); 1724 1725 DP_VERBOSE(edev, QED_MSG_DEBUG, 1726 "Self-test command parameters: offline = %d, external_lb = %d\n", 1727 (etest->flags & ETH_TEST_FL_OFFLINE), 1728 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1729 1730 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1731 1732 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1733 if (qede_selftest_run_loopback(edev, 1734 QED_LINK_LOOPBACK_INT_PHY)) { 1735 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1736 etest->flags |= ETH_TEST_FL_FAILED; 1737 } 1738 } 1739 1740 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1741 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1742 etest->flags |= ETH_TEST_FL_FAILED; 1743 } 1744 1745 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1746 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1747 etest->flags |= ETH_TEST_FL_FAILED; 1748 } 1749 1750 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1751 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1752 etest->flags |= ETH_TEST_FL_FAILED; 1753 } 1754 1755 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1756 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1757 etest->flags |= ETH_TEST_FL_FAILED; 1758 } 1759 1760 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1761 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1762 etest->flags |= ETH_TEST_FL_FAILED; 1763 } 1764 } 1765 1766 static int qede_set_tunable(struct net_device *dev, 1767 const struct ethtool_tunable *tuna, 1768 const void *data) 1769 { 1770 struct qede_dev *edev = netdev_priv(dev); 1771 u32 val; 1772 1773 switch (tuna->id) { 1774 case ETHTOOL_RX_COPYBREAK: 1775 val = *(u32 *)data; 1776 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1777 DP_VERBOSE(edev, QED_MSG_DEBUG, 1778 "Invalid rx copy break value, range is [%u, %u]", 1779 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1780 return -EINVAL; 1781 } 1782 1783 edev->rx_copybreak = *(u32 *)data; 1784 break; 1785 default: 1786 return -EOPNOTSUPP; 1787 } 1788 1789 return 0; 1790 } 1791 1792 static int qede_get_tunable(struct net_device *dev, 1793 const struct ethtool_tunable *tuna, void *data) 1794 { 1795 struct qede_dev *edev = netdev_priv(dev); 1796 1797 switch (tuna->id) { 1798 case ETHTOOL_RX_COPYBREAK: 1799 *(u32 *)data = edev->rx_copybreak; 1800 break; 1801 default: 1802 return -EOPNOTSUPP; 1803 } 1804 1805 return 0; 1806 } 1807 1808 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1809 { 1810 struct qede_dev *edev = netdev_priv(dev); 1811 struct qed_link_output current_link; 1812 1813 memset(¤t_link, 0, sizeof(current_link)); 1814 edev->ops->common->get_link(edev->cdev, ¤t_link); 1815 1816 if (!current_link.eee_supported) { 1817 DP_INFO(edev, "EEE is not supported\n"); 1818 return -EOPNOTSUPP; 1819 } 1820 1821 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1822 edata->advertised = ADVERTISED_1000baseT_Full; 1823 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1824 edata->advertised |= ADVERTISED_10000baseT_Full; 1825 if (current_link.sup_caps & QED_EEE_1G_ADV) 1826 edata->supported = ADVERTISED_1000baseT_Full; 1827 if (current_link.sup_caps & QED_EEE_10G_ADV) 1828 edata->supported |= ADVERTISED_10000baseT_Full; 1829 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1830 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1831 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1832 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1833 1834 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1835 edata->eee_enabled = current_link.eee.enable; 1836 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1837 edata->eee_active = current_link.eee_active; 1838 1839 return 0; 1840 } 1841 1842 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1843 { 1844 struct qede_dev *edev = netdev_priv(dev); 1845 struct qed_link_output current_link; 1846 struct qed_link_params params; 1847 1848 if (!edev->ops->common->can_link_change(edev->cdev)) { 1849 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1850 return -EOPNOTSUPP; 1851 } 1852 1853 memset(¤t_link, 0, sizeof(current_link)); 1854 edev->ops->common->get_link(edev->cdev, ¤t_link); 1855 1856 if (!current_link.eee_supported) { 1857 DP_INFO(edev, "EEE is not supported\n"); 1858 return -EOPNOTSUPP; 1859 } 1860 1861 memset(¶ms, 0, sizeof(params)); 1862 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1863 1864 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1865 ADVERTISED_10000baseT_Full)) || 1866 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1867 ADVERTISED_10000baseT_Full)) != 1868 edata->advertised)) { 1869 DP_VERBOSE(edev, QED_MSG_DEBUG, 1870 "Invalid advertised capabilities %d\n", 1871 edata->advertised); 1872 return -EINVAL; 1873 } 1874 1875 if (edata->advertised & ADVERTISED_1000baseT_Full) 1876 params.eee.adv_caps = QED_EEE_1G_ADV; 1877 if (edata->advertised & ADVERTISED_10000baseT_Full) 1878 params.eee.adv_caps |= QED_EEE_10G_ADV; 1879 params.eee.enable = edata->eee_enabled; 1880 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1881 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1882 1883 params.link_up = true; 1884 edev->ops->common->set_link(edev->cdev, ¶ms); 1885 1886 return 0; 1887 } 1888 1889 static int qede_get_module_info(struct net_device *dev, 1890 struct ethtool_modinfo *modinfo) 1891 { 1892 struct qede_dev *edev = netdev_priv(dev); 1893 u8 buf[4]; 1894 int rc; 1895 1896 /* Read first 4 bytes to find the sfp type */ 1897 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1898 QED_I2C_DEV_ADDR_A0, 0, 4); 1899 if (rc) { 1900 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc); 1901 return rc; 1902 } 1903 1904 switch (buf[0]) { 1905 case 0x3: /* SFP, SFP+, SFP-28 */ 1906 modinfo->type = ETH_MODULE_SFF_8472; 1907 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1908 break; 1909 case 0xc: /* QSFP */ 1910 case 0xd: /* QSFP+ */ 1911 modinfo->type = ETH_MODULE_SFF_8436; 1912 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1913 break; 1914 case 0x11: /* QSFP-28 */ 1915 modinfo->type = ETH_MODULE_SFF_8636; 1916 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1917 break; 1918 default: 1919 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]); 1920 return -EINVAL; 1921 } 1922 1923 return 0; 1924 } 1925 1926 static int qede_get_module_eeprom(struct net_device *dev, 1927 struct ethtool_eeprom *ee, u8 *data) 1928 { 1929 struct qede_dev *edev = netdev_priv(dev); 1930 u32 start_addr = ee->offset, size = 0; 1931 u8 *buf = data; 1932 int rc = 0; 1933 1934 /* Read A0 section */ 1935 if (ee->offset < ETH_MODULE_SFF_8079_LEN) { 1936 /* Limit transfer size to the A0 section boundary */ 1937 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN) 1938 size = ETH_MODULE_SFF_8079_LEN - ee->offset; 1939 else 1940 size = ee->len; 1941 1942 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1943 QED_I2C_DEV_ADDR_A0, 1944 start_addr, size); 1945 if (rc) { 1946 DP_ERR(edev, "Failed reading A0 section %d\n", rc); 1947 return rc; 1948 } 1949 1950 buf += size; 1951 start_addr += size; 1952 } 1953 1954 /* Read A2 section */ 1955 if (start_addr >= ETH_MODULE_SFF_8079_LEN && 1956 start_addr < ETH_MODULE_SFF_8472_LEN) { 1957 size = ee->len - size; 1958 /* Limit transfer size to the A2 section boundary */ 1959 if (start_addr + size > ETH_MODULE_SFF_8472_LEN) 1960 size = ETH_MODULE_SFF_8472_LEN - start_addr; 1961 start_addr -= ETH_MODULE_SFF_8079_LEN; 1962 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1963 QED_I2C_DEV_ADDR_A2, 1964 start_addr, size); 1965 if (rc) { 1966 DP_VERBOSE(edev, QED_MSG_DEBUG, 1967 "Failed reading A2 section %d\n", rc); 1968 return 0; 1969 } 1970 } 1971 1972 return rc; 1973 } 1974 1975 static const struct ethtool_ops qede_ethtool_ops = { 1976 .get_link_ksettings = qede_get_link_ksettings, 1977 .set_link_ksettings = qede_set_link_ksettings, 1978 .get_drvinfo = qede_get_drvinfo, 1979 .get_regs_len = qede_get_regs_len, 1980 .get_regs = qede_get_regs, 1981 .get_wol = qede_get_wol, 1982 .set_wol = qede_set_wol, 1983 .get_msglevel = qede_get_msglevel, 1984 .set_msglevel = qede_set_msglevel, 1985 .nway_reset = qede_nway_reset, 1986 .get_link = qede_get_link, 1987 .get_coalesce = qede_get_coalesce, 1988 .set_coalesce = qede_set_coalesce, 1989 .get_ringparam = qede_get_ringparam, 1990 .set_ringparam = qede_set_ringparam, 1991 .get_pauseparam = qede_get_pauseparam, 1992 .set_pauseparam = qede_set_pauseparam, 1993 .get_strings = qede_get_strings, 1994 .set_phys_id = qede_set_phys_id, 1995 .get_ethtool_stats = qede_get_ethtool_stats, 1996 .get_priv_flags = qede_get_priv_flags, 1997 .get_sset_count = qede_get_sset_count, 1998 .get_rxnfc = qede_get_rxnfc, 1999 .set_rxnfc = qede_set_rxnfc, 2000 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2001 .get_rxfh_key_size = qede_get_rxfh_key_size, 2002 .get_rxfh = qede_get_rxfh, 2003 .set_rxfh = qede_set_rxfh, 2004 .get_ts_info = qede_get_ts_info, 2005 .get_channels = qede_get_channels, 2006 .set_channels = qede_set_channels, 2007 .self_test = qede_self_test, 2008 .get_module_info = qede_get_module_info, 2009 .get_module_eeprom = qede_get_module_eeprom, 2010 .get_eee = qede_get_eee, 2011 .set_eee = qede_set_eee, 2012 2013 .get_tunable = qede_get_tunable, 2014 .set_tunable = qede_set_tunable, 2015 .flash_device = qede_flash_device, 2016 }; 2017 2018 static const struct ethtool_ops qede_vf_ethtool_ops = { 2019 .get_link_ksettings = qede_get_link_ksettings, 2020 .get_drvinfo = qede_get_drvinfo, 2021 .get_msglevel = qede_get_msglevel, 2022 .set_msglevel = qede_set_msglevel, 2023 .get_link = qede_get_link, 2024 .get_coalesce = qede_get_coalesce, 2025 .set_coalesce = qede_set_coalesce, 2026 .get_ringparam = qede_get_ringparam, 2027 .set_ringparam = qede_set_ringparam, 2028 .get_strings = qede_get_strings, 2029 .get_ethtool_stats = qede_get_ethtool_stats, 2030 .get_priv_flags = qede_get_priv_flags, 2031 .get_sset_count = qede_get_sset_count, 2032 .get_rxnfc = qede_get_rxnfc, 2033 .set_rxnfc = qede_set_rxnfc, 2034 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2035 .get_rxfh_key_size = qede_get_rxfh_key_size, 2036 .get_rxfh = qede_get_rxfh, 2037 .set_rxfh = qede_set_rxfh, 2038 .get_channels = qede_get_channels, 2039 .set_channels = qede_set_channels, 2040 .get_tunable = qede_get_tunable, 2041 .set_tunable = qede_set_tunable, 2042 }; 2043 2044 void qede_set_ethtool_ops(struct net_device *dev) 2045 { 2046 struct qede_dev *edev = netdev_priv(dev); 2047 2048 if (IS_VF(edev)) 2049 dev->ethtool_ops = &qede_vf_ethtool_ops; 2050 else 2051 dev->ethtool_ops = &qede_ethtool_ops; 2052 } 2053