1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/version.h> 33 #include <linux/types.h> 34 #include <linux/netdevice.h> 35 #include <linux/etherdevice.h> 36 #include <linux/ethtool.h> 37 #include <linux/string.h> 38 #include <linux/pci.h> 39 #include <linux/capability.h> 40 #include <linux/vmalloc.h> 41 #include "qede.h" 42 #include "qede_ptp.h" 43 44 #define QEDE_RQSTAT_OFFSET(stat_name) \ 45 (offsetof(struct qede_rx_queue, stat_name)) 46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 47 #define QEDE_RQSTAT(stat_name) \ 48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 49 50 #define QEDE_SELFTEST_POLL_COUNT 100 51 52 static const struct { 53 u64 offset; 54 char string[ETH_GSTRING_LEN]; 55 } qede_rqstats_arr[] = { 56 QEDE_RQSTAT(rcv_pkts), 57 QEDE_RQSTAT(rx_hw_errors), 58 QEDE_RQSTAT(rx_alloc_errors), 59 QEDE_RQSTAT(rx_ip_frags), 60 QEDE_RQSTAT(xdp_no_pass), 61 }; 62 63 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 64 #define QEDE_TQSTAT_OFFSET(stat_name) \ 65 (offsetof(struct qede_tx_queue, stat_name)) 66 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 67 #define QEDE_TQSTAT(stat_name) \ 68 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 69 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 70 static const struct { 71 u64 offset; 72 char string[ETH_GSTRING_LEN]; 73 } qede_tqstats_arr[] = { 74 QEDE_TQSTAT(xmit_pkts), 75 QEDE_TQSTAT(stopped_cnt), 76 }; 77 78 #define QEDE_STAT_OFFSET(stat_name, type, base) \ 79 (offsetof(type, stat_name) + (base)) 80 #define QEDE_STAT_STRING(stat_name) (#stat_name) 81 #define _QEDE_STAT(stat_name, type, base, attr) \ 82 {QEDE_STAT_OFFSET(stat_name, type, base), \ 83 QEDE_STAT_STRING(stat_name), \ 84 attr} 85 #define QEDE_STAT(stat_name) \ 86 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 87 #define QEDE_PF_STAT(stat_name) \ 88 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 89 BIT(QEDE_STAT_PF_ONLY)) 90 #define QEDE_PF_BB_STAT(stat_name) \ 91 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 92 offsetof(struct qede_stats, bb), \ 93 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 94 #define QEDE_PF_AH_STAT(stat_name) \ 95 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 96 offsetof(struct qede_stats, ah), \ 97 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 98 static const struct { 99 u64 offset; 100 char string[ETH_GSTRING_LEN]; 101 unsigned long attr; 102 #define QEDE_STAT_PF_ONLY 0 103 #define QEDE_STAT_BB_ONLY 1 104 #define QEDE_STAT_AH_ONLY 2 105 } qede_stats_arr[] = { 106 QEDE_STAT(rx_ucast_bytes), 107 QEDE_STAT(rx_mcast_bytes), 108 QEDE_STAT(rx_bcast_bytes), 109 QEDE_STAT(rx_ucast_pkts), 110 QEDE_STAT(rx_mcast_pkts), 111 QEDE_STAT(rx_bcast_pkts), 112 113 QEDE_STAT(tx_ucast_bytes), 114 QEDE_STAT(tx_mcast_bytes), 115 QEDE_STAT(tx_bcast_bytes), 116 QEDE_STAT(tx_ucast_pkts), 117 QEDE_STAT(tx_mcast_pkts), 118 QEDE_STAT(tx_bcast_pkts), 119 120 QEDE_PF_STAT(rx_64_byte_packets), 121 QEDE_PF_STAT(rx_65_to_127_byte_packets), 122 QEDE_PF_STAT(rx_128_to_255_byte_packets), 123 QEDE_PF_STAT(rx_256_to_511_byte_packets), 124 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 125 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 126 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 127 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 128 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 129 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 130 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 131 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 132 QEDE_PF_STAT(tx_64_byte_packets), 133 QEDE_PF_STAT(tx_65_to_127_byte_packets), 134 QEDE_PF_STAT(tx_128_to_255_byte_packets), 135 QEDE_PF_STAT(tx_256_to_511_byte_packets), 136 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 137 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 138 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 139 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 140 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 141 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 142 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 143 QEDE_PF_STAT(rx_mac_crtl_frames), 144 QEDE_PF_STAT(tx_mac_ctrl_frames), 145 QEDE_PF_STAT(rx_pause_frames), 146 QEDE_PF_STAT(tx_pause_frames), 147 QEDE_PF_STAT(rx_pfc_frames), 148 QEDE_PF_STAT(tx_pfc_frames), 149 150 QEDE_PF_STAT(rx_crc_errors), 151 QEDE_PF_STAT(rx_align_errors), 152 QEDE_PF_STAT(rx_carrier_errors), 153 QEDE_PF_STAT(rx_oversize_packets), 154 QEDE_PF_STAT(rx_jabbers), 155 QEDE_PF_STAT(rx_undersize_packets), 156 QEDE_PF_STAT(rx_fragments), 157 QEDE_PF_BB_STAT(tx_lpi_entry_count), 158 QEDE_PF_BB_STAT(tx_total_collisions), 159 QEDE_PF_STAT(brb_truncates), 160 QEDE_PF_STAT(brb_discards), 161 QEDE_STAT(no_buff_discards), 162 QEDE_PF_STAT(mftag_filter_discards), 163 QEDE_PF_STAT(mac_filter_discards), 164 QEDE_STAT(tx_err_drop_pkts), 165 QEDE_STAT(ttl0_discard), 166 QEDE_STAT(packet_too_big_discard), 167 168 QEDE_STAT(coalesced_pkts), 169 QEDE_STAT(coalesced_events), 170 QEDE_STAT(coalesced_aborts_num), 171 QEDE_STAT(non_coalesced_pkts), 172 QEDE_STAT(coalesced_bytes), 173 }; 174 175 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 176 #define QEDE_STAT_IS_PF_ONLY(i) \ 177 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 178 #define QEDE_STAT_IS_BB_ONLY(i) \ 179 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 180 #define QEDE_STAT_IS_AH_ONLY(i) \ 181 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 182 183 enum { 184 QEDE_PRI_FLAG_CMT, 185 QEDE_PRI_FLAG_LEN, 186 }; 187 188 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 189 "Coupled-Function", 190 }; 191 192 enum qede_ethtool_tests { 193 QEDE_ETHTOOL_INT_LOOPBACK, 194 QEDE_ETHTOOL_INTERRUPT_TEST, 195 QEDE_ETHTOOL_MEMORY_TEST, 196 QEDE_ETHTOOL_REGISTER_TEST, 197 QEDE_ETHTOOL_CLOCK_TEST, 198 QEDE_ETHTOOL_NVRAM_TEST, 199 QEDE_ETHTOOL_TEST_MAX 200 }; 201 202 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 203 "Internal loopback (offline)", 204 "Interrupt (online)\t", 205 "Memory (online)\t\t", 206 "Register (online)\t", 207 "Clock (online)\t\t", 208 "Nvram (online)\t\t", 209 }; 210 211 static void qede_get_strings_stats_txq(struct qede_dev *edev, 212 struct qede_tx_queue *txq, u8 **buf) 213 { 214 int i; 215 216 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 217 if (txq->is_xdp) 218 sprintf(*buf, "%d [XDP]: %s", 219 QEDE_TXQ_XDP_TO_IDX(edev, txq), 220 qede_tqstats_arr[i].string); 221 else 222 sprintf(*buf, "%d: %s", txq->index, 223 qede_tqstats_arr[i].string); 224 *buf += ETH_GSTRING_LEN; 225 } 226 } 227 228 static void qede_get_strings_stats_rxq(struct qede_dev *edev, 229 struct qede_rx_queue *rxq, u8 **buf) 230 { 231 int i; 232 233 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 234 sprintf(*buf, "%d: %s", rxq->rxq_id, 235 qede_rqstats_arr[i].string); 236 *buf += ETH_GSTRING_LEN; 237 } 238 } 239 240 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 241 { 242 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 243 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 244 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 245 } 246 247 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 248 { 249 struct qede_fastpath *fp; 250 int i; 251 252 /* Account for queue statistics */ 253 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 254 fp = &edev->fp_array[i]; 255 256 if (fp->type & QEDE_FASTPATH_RX) 257 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 258 259 if (fp->type & QEDE_FASTPATH_XDP) 260 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 261 262 if (fp->type & QEDE_FASTPATH_TX) 263 qede_get_strings_stats_txq(edev, fp->txq, &buf); 264 } 265 266 /* Account for non-queue statistics */ 267 for (i = 0; i < QEDE_NUM_STATS; i++) { 268 if (qede_is_irrelevant_stat(edev, i)) 269 continue; 270 strcpy(buf, qede_stats_arr[i].string); 271 buf += ETH_GSTRING_LEN; 272 } 273 } 274 275 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 276 { 277 struct qede_dev *edev = netdev_priv(dev); 278 279 switch (stringset) { 280 case ETH_SS_STATS: 281 qede_get_strings_stats(edev, buf); 282 break; 283 case ETH_SS_PRIV_FLAGS: 284 memcpy(buf, qede_private_arr, 285 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 286 break; 287 case ETH_SS_TEST: 288 memcpy(buf, qede_tests_str_arr, 289 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 290 break; 291 default: 292 DP_VERBOSE(edev, QED_MSG_DEBUG, 293 "Unsupported stringset 0x%08x\n", stringset); 294 } 295 } 296 297 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 298 { 299 int i; 300 301 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 302 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 303 (*buf)++; 304 } 305 } 306 307 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 308 { 309 int i; 310 311 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 312 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 313 (*buf)++; 314 } 315 } 316 317 static void qede_get_ethtool_stats(struct net_device *dev, 318 struct ethtool_stats *stats, u64 *buf) 319 { 320 struct qede_dev *edev = netdev_priv(dev); 321 struct qede_fastpath *fp; 322 int i; 323 324 qede_fill_by_demand_stats(edev); 325 326 /* Need to protect the access to the fastpath array */ 327 __qede_lock(edev); 328 329 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 330 fp = &edev->fp_array[i]; 331 332 if (fp->type & QEDE_FASTPATH_RX) 333 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 334 335 if (fp->type & QEDE_FASTPATH_XDP) 336 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 337 338 if (fp->type & QEDE_FASTPATH_TX) 339 qede_get_ethtool_stats_txq(fp->txq, &buf); 340 } 341 342 for (i = 0; i < QEDE_NUM_STATS; i++) { 343 if (qede_is_irrelevant_stat(edev, i)) 344 continue; 345 *buf = *((u64 *)(((void *)&edev->stats) + 346 qede_stats_arr[i].offset)); 347 348 buf++; 349 } 350 351 __qede_unlock(edev); 352 } 353 354 static int qede_get_sset_count(struct net_device *dev, int stringset) 355 { 356 struct qede_dev *edev = netdev_priv(dev); 357 int num_stats = QEDE_NUM_STATS, i; 358 359 switch (stringset) { 360 case ETH_SS_STATS: 361 for (i = 0; i < QEDE_NUM_STATS; i++) 362 if (qede_is_irrelevant_stat(edev, i)) 363 num_stats--; 364 365 /* Account for the Regular Tx statistics */ 366 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS; 367 368 /* Account for the Regular Rx statistics */ 369 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 370 371 /* Account for XDP statistics [if needed] */ 372 if (edev->xdp_prog) 373 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 374 return num_stats; 375 376 case ETH_SS_PRIV_FLAGS: 377 return QEDE_PRI_FLAG_LEN; 378 case ETH_SS_TEST: 379 if (!IS_VF(edev)) 380 return QEDE_ETHTOOL_TEST_MAX; 381 else 382 return 0; 383 default: 384 DP_VERBOSE(edev, QED_MSG_DEBUG, 385 "Unsupported stringset 0x%08x\n", stringset); 386 return -EINVAL; 387 } 388 } 389 390 static u32 qede_get_priv_flags(struct net_device *dev) 391 { 392 struct qede_dev *edev = netdev_priv(dev); 393 394 return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT; 395 } 396 397 struct qede_link_mode_mapping { 398 u32 qed_link_mode; 399 u32 ethtool_link_mode; 400 }; 401 402 static const struct qede_link_mode_mapping qed_lm_map[] = { 403 {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT}, 404 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT}, 405 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT}, 406 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT}, 407 {QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT}, 408 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT}, 409 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 410 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT}, 411 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT}, 412 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT}, 413 {QED_LM_100000baseKR4_Full_BIT, 414 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT}, 415 }; 416 417 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \ 418 { \ 419 int i; \ 420 \ 421 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 422 if ((caps) & (qed_lm_map[i].qed_link_mode)) \ 423 __set_bit(qed_lm_map[i].ethtool_link_mode,\ 424 lk_ksettings->link_modes.name); \ 425 } \ 426 } 427 428 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \ 429 { \ 430 int i; \ 431 \ 432 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 433 if (test_bit(qed_lm_map[i].ethtool_link_mode, \ 434 lk_ksettings->link_modes.name)) \ 435 caps |= qed_lm_map[i].qed_link_mode; \ 436 } \ 437 } 438 439 static int qede_get_link_ksettings(struct net_device *dev, 440 struct ethtool_link_ksettings *cmd) 441 { 442 struct ethtool_link_settings *base = &cmd->base; 443 struct qede_dev *edev = netdev_priv(dev); 444 struct qed_link_output current_link; 445 446 __qede_lock(edev); 447 448 memset(¤t_link, 0, sizeof(current_link)); 449 edev->ops->common->get_link(edev->cdev, ¤t_link); 450 451 ethtool_link_ksettings_zero_link_mode(cmd, supported); 452 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported) 453 454 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 455 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising) 456 457 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 458 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising) 459 460 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 461 base->speed = current_link.speed; 462 base->duplex = current_link.duplex; 463 } else { 464 base->speed = SPEED_UNKNOWN; 465 base->duplex = DUPLEX_UNKNOWN; 466 } 467 468 __qede_unlock(edev); 469 470 base->port = current_link.port; 471 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 472 AUTONEG_DISABLE; 473 474 return 0; 475 } 476 477 static int qede_set_link_ksettings(struct net_device *dev, 478 const struct ethtool_link_ksettings *cmd) 479 { 480 const struct ethtool_link_settings *base = &cmd->base; 481 struct qede_dev *edev = netdev_priv(dev); 482 struct qed_link_output current_link; 483 struct qed_link_params params; 484 485 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 486 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 487 return -EOPNOTSUPP; 488 } 489 memset(¤t_link, 0, sizeof(current_link)); 490 memset(¶ms, 0, sizeof(params)); 491 edev->ops->common->get_link(edev->cdev, ¤t_link); 492 493 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 494 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 495 if (base->autoneg == AUTONEG_ENABLE) { 496 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 497 DP_INFO(edev, "Auto negotiation is not supported\n"); 498 return -EOPNOTSUPP; 499 } 500 501 params.autoneg = true; 502 params.forced_speed = 0; 503 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising) 504 } else { /* forced speed */ 505 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 506 params.autoneg = false; 507 params.forced_speed = base->speed; 508 switch (base->speed) { 509 case SPEED_1000: 510 if (!(current_link.supported_caps & 511 QED_LM_1000baseT_Full_BIT)) { 512 DP_INFO(edev, "1G speed not supported\n"); 513 return -EINVAL; 514 } 515 params.adv_speeds = QED_LM_1000baseT_Full_BIT; 516 break; 517 case SPEED_10000: 518 if (!(current_link.supported_caps & 519 QED_LM_10000baseKR_Full_BIT)) { 520 DP_INFO(edev, "10G speed not supported\n"); 521 return -EINVAL; 522 } 523 params.adv_speeds = QED_LM_10000baseKR_Full_BIT; 524 break; 525 case SPEED_25000: 526 if (!(current_link.supported_caps & 527 QED_LM_25000baseKR_Full_BIT)) { 528 DP_INFO(edev, "25G speed not supported\n"); 529 return -EINVAL; 530 } 531 params.adv_speeds = QED_LM_25000baseKR_Full_BIT; 532 break; 533 case SPEED_40000: 534 if (!(current_link.supported_caps & 535 QED_LM_40000baseLR4_Full_BIT)) { 536 DP_INFO(edev, "40G speed not supported\n"); 537 return -EINVAL; 538 } 539 params.adv_speeds = QED_LM_40000baseLR4_Full_BIT; 540 break; 541 case SPEED_50000: 542 if (!(current_link.supported_caps & 543 QED_LM_50000baseKR2_Full_BIT)) { 544 DP_INFO(edev, "50G speed not supported\n"); 545 return -EINVAL; 546 } 547 params.adv_speeds = QED_LM_50000baseKR2_Full_BIT; 548 break; 549 case SPEED_100000: 550 if (!(current_link.supported_caps & 551 QED_LM_100000baseKR4_Full_BIT)) { 552 DP_INFO(edev, "100G speed not supported\n"); 553 return -EINVAL; 554 } 555 params.adv_speeds = QED_LM_100000baseKR4_Full_BIT; 556 break; 557 default: 558 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 559 return -EINVAL; 560 } 561 } 562 563 params.link_up = true; 564 edev->ops->common->set_link(edev->cdev, ¶ms); 565 566 return 0; 567 } 568 569 static void qede_get_drvinfo(struct net_device *ndev, 570 struct ethtool_drvinfo *info) 571 { 572 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 573 struct qede_dev *edev = netdev_priv(ndev); 574 575 strlcpy(info->driver, "qede", sizeof(info->driver)); 576 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 577 578 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 579 edev->dev_info.common.fw_major, 580 edev->dev_info.common.fw_minor, 581 edev->dev_info.common.fw_rev, 582 edev->dev_info.common.fw_eng); 583 584 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 585 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 586 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 587 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 588 edev->dev_info.common.mfw_rev & 0xFF); 589 590 if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) < 591 sizeof(info->fw_version)) { 592 snprintf(info->fw_version, sizeof(info->fw_version), 593 "mfw %s storm %s", mfw, storm); 594 } else { 595 snprintf(info->fw_version, sizeof(info->fw_version), 596 "%s %s", mfw, storm); 597 } 598 599 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 600 } 601 602 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 603 { 604 struct qede_dev *edev = netdev_priv(ndev); 605 606 if (edev->dev_info.common.wol_support) { 607 wol->supported = WAKE_MAGIC; 608 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 609 } 610 } 611 612 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 613 { 614 struct qede_dev *edev = netdev_priv(ndev); 615 bool wol_requested; 616 int rc; 617 618 if (wol->wolopts & ~WAKE_MAGIC) { 619 DP_INFO(edev, 620 "Can't support WoL options other than magic-packet\n"); 621 return -EINVAL; 622 } 623 624 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 625 if (wol_requested == edev->wol_enabled) 626 return 0; 627 628 /* Need to actually change configuration */ 629 if (!edev->dev_info.common.wol_support) { 630 DP_INFO(edev, "Device doesn't support WoL\n"); 631 return -EINVAL; 632 } 633 634 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 635 if (!rc) 636 edev->wol_enabled = wol_requested; 637 638 return rc; 639 } 640 641 static u32 qede_get_msglevel(struct net_device *ndev) 642 { 643 struct qede_dev *edev = netdev_priv(ndev); 644 645 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 646 } 647 648 static void qede_set_msglevel(struct net_device *ndev, u32 level) 649 { 650 struct qede_dev *edev = netdev_priv(ndev); 651 u32 dp_module = 0; 652 u8 dp_level = 0; 653 654 qede_config_debug(level, &dp_module, &dp_level); 655 656 edev->dp_level = dp_level; 657 edev->dp_module = dp_module; 658 edev->ops->common->update_msglvl(edev->cdev, 659 dp_module, dp_level); 660 } 661 662 static int qede_nway_reset(struct net_device *dev) 663 { 664 struct qede_dev *edev = netdev_priv(dev); 665 struct qed_link_output current_link; 666 struct qed_link_params link_params; 667 668 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 669 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 670 return -EOPNOTSUPP; 671 } 672 673 if (!netif_running(dev)) 674 return 0; 675 676 memset(¤t_link, 0, sizeof(current_link)); 677 edev->ops->common->get_link(edev->cdev, ¤t_link); 678 if (!current_link.link_up) 679 return 0; 680 681 /* Toggle the link */ 682 memset(&link_params, 0, sizeof(link_params)); 683 link_params.link_up = false; 684 edev->ops->common->set_link(edev->cdev, &link_params); 685 link_params.link_up = true; 686 edev->ops->common->set_link(edev->cdev, &link_params); 687 688 return 0; 689 } 690 691 static u32 qede_get_link(struct net_device *dev) 692 { 693 struct qede_dev *edev = netdev_priv(dev); 694 struct qed_link_output current_link; 695 696 memset(¤t_link, 0, sizeof(current_link)); 697 edev->ops->common->get_link(edev->cdev, ¤t_link); 698 699 return current_link.link_up; 700 } 701 702 static int qede_flash_device(struct net_device *dev, 703 struct ethtool_flash *flash) 704 { 705 struct qede_dev *edev = netdev_priv(dev); 706 707 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 708 } 709 710 static int qede_get_coalesce(struct net_device *dev, 711 struct ethtool_coalesce *coal) 712 { 713 void *rx_handle = NULL, *tx_handle = NULL; 714 struct qede_dev *edev = netdev_priv(dev); 715 u16 rx_coal, tx_coal, i, rc = 0; 716 struct qede_fastpath *fp; 717 718 rx_coal = QED_DEFAULT_RX_USECS; 719 tx_coal = QED_DEFAULT_TX_USECS; 720 721 memset(coal, 0, sizeof(struct ethtool_coalesce)); 722 723 __qede_lock(edev); 724 if (edev->state == QEDE_STATE_OPEN) { 725 for_each_queue(i) { 726 fp = &edev->fp_array[i]; 727 728 if (fp->type & QEDE_FASTPATH_RX) { 729 rx_handle = fp->rxq->handle; 730 break; 731 } 732 } 733 734 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 735 if (rc) { 736 DP_INFO(edev, "Read Rx coalesce error\n"); 737 goto out; 738 } 739 740 for_each_queue(i) { 741 fp = &edev->fp_array[i]; 742 if (fp->type & QEDE_FASTPATH_TX) { 743 tx_handle = fp->txq->handle; 744 break; 745 } 746 } 747 748 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 749 if (rc) 750 DP_INFO(edev, "Read Tx coalesce error\n"); 751 } 752 753 out: 754 __qede_unlock(edev); 755 756 coal->rx_coalesce_usecs = rx_coal; 757 coal->tx_coalesce_usecs = tx_coal; 758 759 return rc; 760 } 761 762 static int qede_set_coalesce(struct net_device *dev, 763 struct ethtool_coalesce *coal) 764 { 765 struct qede_dev *edev = netdev_priv(dev); 766 struct qede_fastpath *fp; 767 int i, rc = 0; 768 u16 rxc, txc; 769 770 if (!netif_running(dev)) { 771 DP_INFO(edev, "Interface is down\n"); 772 return -EINVAL; 773 } 774 775 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 776 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 777 DP_INFO(edev, 778 "Can't support requested %s coalesce value [max supported value %d]\n", 779 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 780 "tx", QED_COALESCE_MAX); 781 return -EINVAL; 782 } 783 784 rxc = (u16)coal->rx_coalesce_usecs; 785 txc = (u16)coal->tx_coalesce_usecs; 786 for_each_queue(i) { 787 fp = &edev->fp_array[i]; 788 789 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 790 rc = edev->ops->common->set_coalesce(edev->cdev, 791 rxc, 0, 792 fp->rxq->handle); 793 if (rc) { 794 DP_INFO(edev, 795 "Set RX coalesce error, rc = %d\n", rc); 796 return rc; 797 } 798 } 799 800 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 801 rc = edev->ops->common->set_coalesce(edev->cdev, 802 0, txc, 803 fp->txq->handle); 804 if (rc) { 805 DP_INFO(edev, 806 "Set TX coalesce error, rc = %d\n", rc); 807 return rc; 808 } 809 } 810 } 811 812 return rc; 813 } 814 815 static void qede_get_ringparam(struct net_device *dev, 816 struct ethtool_ringparam *ering) 817 { 818 struct qede_dev *edev = netdev_priv(dev); 819 820 ering->rx_max_pending = NUM_RX_BDS_MAX; 821 ering->rx_pending = edev->q_num_rx_buffers; 822 ering->tx_max_pending = NUM_TX_BDS_MAX; 823 ering->tx_pending = edev->q_num_tx_buffers; 824 } 825 826 static int qede_set_ringparam(struct net_device *dev, 827 struct ethtool_ringparam *ering) 828 { 829 struct qede_dev *edev = netdev_priv(dev); 830 831 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 832 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 833 ering->rx_pending, ering->tx_pending); 834 835 /* Validate legality of configuration */ 836 if (ering->rx_pending > NUM_RX_BDS_MAX || 837 ering->rx_pending < NUM_RX_BDS_MIN || 838 ering->tx_pending > NUM_TX_BDS_MAX || 839 ering->tx_pending < NUM_TX_BDS_MIN) { 840 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 841 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 842 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 843 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 844 return -EINVAL; 845 } 846 847 /* Change ring size and re-load */ 848 edev->q_num_rx_buffers = ering->rx_pending; 849 edev->q_num_tx_buffers = ering->tx_pending; 850 851 qede_reload(edev, NULL, false); 852 853 return 0; 854 } 855 856 static void qede_get_pauseparam(struct net_device *dev, 857 struct ethtool_pauseparam *epause) 858 { 859 struct qede_dev *edev = netdev_priv(dev); 860 struct qed_link_output current_link; 861 862 memset(¤t_link, 0, sizeof(current_link)); 863 edev->ops->common->get_link(edev->cdev, ¤t_link); 864 865 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 866 epause->autoneg = true; 867 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 868 epause->rx_pause = true; 869 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 870 epause->tx_pause = true; 871 872 DP_VERBOSE(edev, QED_MSG_DEBUG, 873 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 874 epause->cmd, epause->autoneg, epause->rx_pause, 875 epause->tx_pause); 876 } 877 878 static int qede_set_pauseparam(struct net_device *dev, 879 struct ethtool_pauseparam *epause) 880 { 881 struct qede_dev *edev = netdev_priv(dev); 882 struct qed_link_params params; 883 struct qed_link_output current_link; 884 885 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 886 DP_INFO(edev, 887 "Pause settings are not allowed to be changed\n"); 888 return -EOPNOTSUPP; 889 } 890 891 memset(¤t_link, 0, sizeof(current_link)); 892 edev->ops->common->get_link(edev->cdev, ¤t_link); 893 894 memset(¶ms, 0, sizeof(params)); 895 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 896 if (epause->autoneg) { 897 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 898 DP_INFO(edev, "autoneg not supported\n"); 899 return -EINVAL; 900 } 901 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 902 } 903 if (epause->rx_pause) 904 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 905 if (epause->tx_pause) 906 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 907 908 params.link_up = true; 909 edev->ops->common->set_link(edev->cdev, ¶ms); 910 911 return 0; 912 } 913 914 static void qede_get_regs(struct net_device *ndev, 915 struct ethtool_regs *regs, void *buffer) 916 { 917 struct qede_dev *edev = netdev_priv(ndev); 918 919 regs->version = 0; 920 memset(buffer, 0, regs->len); 921 922 if (edev->ops && edev->ops->common) 923 edev->ops->common->dbg_all_data(edev->cdev, buffer); 924 } 925 926 static int qede_get_regs_len(struct net_device *ndev) 927 { 928 struct qede_dev *edev = netdev_priv(ndev); 929 930 if (edev->ops && edev->ops->common) 931 return edev->ops->common->dbg_all_data_size(edev->cdev); 932 else 933 return -EINVAL; 934 } 935 936 static void qede_update_mtu(struct qede_dev *edev, 937 struct qede_reload_args *args) 938 { 939 edev->ndev->mtu = args->u.mtu; 940 } 941 942 /* Netdevice NDOs */ 943 int qede_change_mtu(struct net_device *ndev, int new_mtu) 944 { 945 struct qede_dev *edev = netdev_priv(ndev); 946 struct qede_reload_args args; 947 948 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 949 "Configuring MTU size of %d\n", new_mtu); 950 951 if (new_mtu > PAGE_SIZE) 952 ndev->features &= ~NETIF_F_GRO_HW; 953 954 /* Set the mtu field and re-start the interface if needed */ 955 args.u.mtu = new_mtu; 956 args.func = &qede_update_mtu; 957 qede_reload(edev, &args, false); 958 959 edev->ops->common->update_mtu(edev->cdev, new_mtu); 960 961 return 0; 962 } 963 964 static void qede_get_channels(struct net_device *dev, 965 struct ethtool_channels *channels) 966 { 967 struct qede_dev *edev = netdev_priv(dev); 968 969 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 970 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 971 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 972 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 973 edev->fp_num_rx; 974 channels->tx_count = edev->fp_num_tx; 975 channels->rx_count = edev->fp_num_rx; 976 } 977 978 static int qede_set_channels(struct net_device *dev, 979 struct ethtool_channels *channels) 980 { 981 struct qede_dev *edev = netdev_priv(dev); 982 u32 count; 983 984 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 985 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 986 channels->rx_count, channels->tx_count, 987 channels->other_count, channels->combined_count); 988 989 count = channels->rx_count + channels->tx_count + 990 channels->combined_count; 991 992 /* We don't support `other' channels */ 993 if (channels->other_count) { 994 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 995 "command parameters not supported\n"); 996 return -EINVAL; 997 } 998 999 if (!(channels->combined_count || (channels->rx_count && 1000 channels->tx_count))) { 1001 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1002 "need to request at least one transmit and one receive channel\n"); 1003 return -EINVAL; 1004 } 1005 1006 if (count > QEDE_MAX_RSS_CNT(edev)) { 1007 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1008 "requested channels = %d max supported channels = %d\n", 1009 count, QEDE_MAX_RSS_CNT(edev)); 1010 return -EINVAL; 1011 } 1012 1013 /* Check if there was a change in the active parameters */ 1014 if ((count == QEDE_QUEUE_CNT(edev)) && 1015 (channels->tx_count == edev->fp_num_tx) && 1016 (channels->rx_count == edev->fp_num_rx)) { 1017 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1018 "No change in active parameters\n"); 1019 return 0; 1020 } 1021 1022 /* We need the number of queues to be divisible between the hwfns */ 1023 if ((count % edev->dev_info.common.num_hwfns) || 1024 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1025 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1026 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1027 "Number of channels must be divisible by %04x\n", 1028 edev->dev_info.common.num_hwfns); 1029 return -EINVAL; 1030 } 1031 1032 /* Set number of queues and reload if necessary */ 1033 edev->req_queues = count; 1034 edev->req_num_tx = channels->tx_count; 1035 edev->req_num_rx = channels->rx_count; 1036 /* Reset the indirection table if rx queue count is updated */ 1037 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1038 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1039 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1040 } 1041 1042 qede_reload(edev, NULL, false); 1043 1044 return 0; 1045 } 1046 1047 static int qede_get_ts_info(struct net_device *dev, 1048 struct ethtool_ts_info *info) 1049 { 1050 struct qede_dev *edev = netdev_priv(dev); 1051 1052 return qede_ptp_get_ts_info(edev, info); 1053 } 1054 1055 static int qede_set_phys_id(struct net_device *dev, 1056 enum ethtool_phys_id_state state) 1057 { 1058 struct qede_dev *edev = netdev_priv(dev); 1059 u8 led_state = 0; 1060 1061 switch (state) { 1062 case ETHTOOL_ID_ACTIVE: 1063 return 1; /* cycle on/off once per second */ 1064 1065 case ETHTOOL_ID_ON: 1066 led_state = QED_LED_MODE_ON; 1067 break; 1068 1069 case ETHTOOL_ID_OFF: 1070 led_state = QED_LED_MODE_OFF; 1071 break; 1072 1073 case ETHTOOL_ID_INACTIVE: 1074 led_state = QED_LED_MODE_RESTORE; 1075 break; 1076 } 1077 1078 edev->ops->common->set_led(edev->cdev, led_state); 1079 1080 return 0; 1081 } 1082 1083 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1084 { 1085 info->data = RXH_IP_SRC | RXH_IP_DST; 1086 1087 switch (info->flow_type) { 1088 case TCP_V4_FLOW: 1089 case TCP_V6_FLOW: 1090 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1091 break; 1092 case UDP_V4_FLOW: 1093 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1094 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1095 break; 1096 case UDP_V6_FLOW: 1097 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1098 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1099 break; 1100 case IPV4_FLOW: 1101 case IPV6_FLOW: 1102 break; 1103 default: 1104 info->data = 0; 1105 break; 1106 } 1107 1108 return 0; 1109 } 1110 1111 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1112 u32 *rule_locs) 1113 { 1114 struct qede_dev *edev = netdev_priv(dev); 1115 int rc = 0; 1116 1117 switch (info->cmd) { 1118 case ETHTOOL_GRXRINGS: 1119 info->data = QEDE_RSS_COUNT(edev); 1120 break; 1121 case ETHTOOL_GRXFH: 1122 rc = qede_get_rss_flags(edev, info); 1123 break; 1124 case ETHTOOL_GRXCLSRLCNT: 1125 info->rule_cnt = qede_get_arfs_filter_count(edev); 1126 info->data = QEDE_RFS_MAX_FLTR; 1127 break; 1128 case ETHTOOL_GRXCLSRULE: 1129 rc = qede_get_cls_rule_entry(edev, info); 1130 break; 1131 case ETHTOOL_GRXCLSRLALL: 1132 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1133 break; 1134 default: 1135 DP_ERR(edev, "Command parameters not supported\n"); 1136 rc = -EOPNOTSUPP; 1137 } 1138 1139 return rc; 1140 } 1141 1142 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1143 { 1144 struct qed_update_vport_params *vport_update_params; 1145 u8 set_caps = 0, clr_caps = 0; 1146 int rc = 0; 1147 1148 DP_VERBOSE(edev, QED_MSG_DEBUG, 1149 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1150 info->flow_type, info->data); 1151 1152 switch (info->flow_type) { 1153 case TCP_V4_FLOW: 1154 case TCP_V6_FLOW: 1155 /* For TCP only 4-tuple hash is supported */ 1156 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1157 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1158 DP_INFO(edev, "Command parameters not supported\n"); 1159 return -EINVAL; 1160 } 1161 return 0; 1162 case UDP_V4_FLOW: 1163 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1164 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1165 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1166 set_caps = QED_RSS_IPV4_UDP; 1167 DP_VERBOSE(edev, QED_MSG_DEBUG, 1168 "UDP 4-tuple enabled\n"); 1169 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1170 clr_caps = QED_RSS_IPV4_UDP; 1171 DP_VERBOSE(edev, QED_MSG_DEBUG, 1172 "UDP 4-tuple disabled\n"); 1173 } else { 1174 return -EINVAL; 1175 } 1176 break; 1177 case UDP_V6_FLOW: 1178 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1179 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1180 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1181 set_caps = QED_RSS_IPV6_UDP; 1182 DP_VERBOSE(edev, QED_MSG_DEBUG, 1183 "UDP 4-tuple enabled\n"); 1184 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1185 clr_caps = QED_RSS_IPV6_UDP; 1186 DP_VERBOSE(edev, QED_MSG_DEBUG, 1187 "UDP 4-tuple disabled\n"); 1188 } else { 1189 return -EINVAL; 1190 } 1191 break; 1192 case IPV4_FLOW: 1193 case IPV6_FLOW: 1194 /* For IP only 2-tuple hash is supported */ 1195 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1196 DP_INFO(edev, "Command parameters not supported\n"); 1197 return -EINVAL; 1198 } 1199 return 0; 1200 case SCTP_V4_FLOW: 1201 case AH_ESP_V4_FLOW: 1202 case AH_V4_FLOW: 1203 case ESP_V4_FLOW: 1204 case SCTP_V6_FLOW: 1205 case AH_ESP_V6_FLOW: 1206 case AH_V6_FLOW: 1207 case ESP_V6_FLOW: 1208 case IP_USER_FLOW: 1209 case ETHER_FLOW: 1210 /* RSS is not supported for these protocols */ 1211 if (info->data) { 1212 DP_INFO(edev, "Command parameters not supported\n"); 1213 return -EINVAL; 1214 } 1215 return 0; 1216 default: 1217 return -EINVAL; 1218 } 1219 1220 /* No action is needed if there is no change in the rss capability */ 1221 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1222 return 0; 1223 1224 /* Update internal configuration */ 1225 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1226 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1227 1228 /* Re-configure if possible */ 1229 __qede_lock(edev); 1230 if (edev->state == QEDE_STATE_OPEN) { 1231 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1232 if (!vport_update_params) { 1233 __qede_unlock(edev); 1234 return -ENOMEM; 1235 } 1236 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1237 &vport_update_params->update_rss_flg); 1238 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1239 vfree(vport_update_params); 1240 } 1241 __qede_unlock(edev); 1242 1243 return rc; 1244 } 1245 1246 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1247 { 1248 struct qede_dev *edev = netdev_priv(dev); 1249 int rc; 1250 1251 switch (info->cmd) { 1252 case ETHTOOL_SRXFH: 1253 rc = qede_set_rss_flags(edev, info); 1254 break; 1255 case ETHTOOL_SRXCLSRLINS: 1256 rc = qede_add_cls_rule(edev, info); 1257 break; 1258 case ETHTOOL_SRXCLSRLDEL: 1259 rc = qede_del_cls_rule(edev, info); 1260 break; 1261 default: 1262 DP_INFO(edev, "Command parameters not supported\n"); 1263 rc = -EOPNOTSUPP; 1264 } 1265 1266 return rc; 1267 } 1268 1269 static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1270 { 1271 return QED_RSS_IND_TABLE_SIZE; 1272 } 1273 1274 static u32 qede_get_rxfh_key_size(struct net_device *dev) 1275 { 1276 struct qede_dev *edev = netdev_priv(dev); 1277 1278 return sizeof(edev->rss_key); 1279 } 1280 1281 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1282 { 1283 struct qede_dev *edev = netdev_priv(dev); 1284 int i; 1285 1286 if (hfunc) 1287 *hfunc = ETH_RSS_HASH_TOP; 1288 1289 if (!indir) 1290 return 0; 1291 1292 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1293 indir[i] = edev->rss_ind_table[i]; 1294 1295 if (key) 1296 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1297 1298 return 0; 1299 } 1300 1301 static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1302 const u8 *key, const u8 hfunc) 1303 { 1304 struct qed_update_vport_params *vport_update_params; 1305 struct qede_dev *edev = netdev_priv(dev); 1306 int i, rc = 0; 1307 1308 if (edev->dev_info.common.num_hwfns > 1) { 1309 DP_INFO(edev, 1310 "RSS configuration is not supported for 100G devices\n"); 1311 return -EOPNOTSUPP; 1312 } 1313 1314 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1315 return -EOPNOTSUPP; 1316 1317 if (!indir && !key) 1318 return 0; 1319 1320 if (indir) { 1321 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1322 edev->rss_ind_table[i] = indir[i]; 1323 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1324 } 1325 1326 if (key) { 1327 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1328 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1329 } 1330 1331 __qede_lock(edev); 1332 if (edev->state == QEDE_STATE_OPEN) { 1333 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1334 if (!vport_update_params) { 1335 __qede_unlock(edev); 1336 return -ENOMEM; 1337 } 1338 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1339 &vport_update_params->update_rss_flg); 1340 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1341 vfree(vport_update_params); 1342 } 1343 __qede_unlock(edev); 1344 1345 return rc; 1346 } 1347 1348 /* This function enables the interrupt generation and the NAPI on the device */ 1349 static void qede_netif_start(struct qede_dev *edev) 1350 { 1351 int i; 1352 1353 if (!netif_running(edev->ndev)) 1354 return; 1355 1356 for_each_queue(i) { 1357 /* Update and reenable interrupts */ 1358 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1359 napi_enable(&edev->fp_array[i].napi); 1360 } 1361 } 1362 1363 /* This function disables the NAPI and the interrupt generation on the device */ 1364 static void qede_netif_stop(struct qede_dev *edev) 1365 { 1366 int i; 1367 1368 for_each_queue(i) { 1369 napi_disable(&edev->fp_array[i].napi); 1370 /* Disable interrupts */ 1371 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1372 } 1373 } 1374 1375 static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1376 struct sk_buff *skb) 1377 { 1378 struct qede_tx_queue *txq = NULL; 1379 struct eth_tx_1st_bd *first_bd; 1380 dma_addr_t mapping; 1381 int i, idx; 1382 u16 val; 1383 1384 for_each_queue(i) { 1385 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 1386 txq = edev->fp_array[i].txq; 1387 break; 1388 } 1389 } 1390 1391 if (!txq) { 1392 DP_NOTICE(edev, "Tx path is not available\n"); 1393 return -1; 1394 } 1395 1396 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1397 idx = txq->sw_tx_prod; 1398 txq->sw_tx_ring.skbs[idx].skb = skb; 1399 first_bd = qed_chain_produce(&txq->tx_pbl); 1400 memset(first_bd, 0, sizeof(*first_bd)); 1401 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1402 first_bd->data.bd_flags.bitfields = val; 1403 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1404 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1405 first_bd->data.bitfields |= cpu_to_le16(val); 1406 1407 /* Map skb linear data for DMA and set in the first BD */ 1408 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1409 skb_headlen(skb), DMA_TO_DEVICE); 1410 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1411 DP_NOTICE(edev, "SKB mapping failed\n"); 1412 return -ENOMEM; 1413 } 1414 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1415 1416 /* update the first BD with the actual num BDs */ 1417 first_bd->data.nbds = 1; 1418 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1419 /* 'next page' entries are counted in the producer value */ 1420 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1421 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1422 1423 /* wmb makes sure that the BDs data is updated before updating the 1424 * producer, otherwise FW may read old data from the BDs. 1425 */ 1426 wmb(); 1427 barrier(); 1428 writel(txq->tx_db.raw, txq->doorbell_addr); 1429 1430 /* mmiowb is needed to synchronize doorbell writes from more than one 1431 * processor. It guarantees that the write arrives to the device before 1432 * the queue lock is released and another start_xmit is called (possibly 1433 * on another CPU). Without this barrier, the next doorbell can bypass 1434 * this doorbell. This is applicable to IA64/Altix systems. 1435 */ 1436 mmiowb(); 1437 1438 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1439 if (qede_txq_has_work(txq)) 1440 break; 1441 usleep_range(100, 200); 1442 } 1443 1444 if (!qede_txq_has_work(txq)) { 1445 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1446 return -1; 1447 } 1448 1449 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1450 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1451 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1452 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1453 txq->sw_tx_ring.skbs[idx].skb = NULL; 1454 1455 return 0; 1456 } 1457 1458 static int qede_selftest_receive_traffic(struct qede_dev *edev) 1459 { 1460 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len; 1461 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1462 struct qede_rx_queue *rxq = NULL; 1463 struct sw_rx_data *sw_rx_data; 1464 union eth_rx_cqe *cqe; 1465 int i, iter, rc = 0; 1466 u8 *data_ptr; 1467 1468 for_each_queue(i) { 1469 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1470 rxq = edev->fp_array[i].rxq; 1471 break; 1472 } 1473 } 1474 1475 if (!rxq) { 1476 DP_NOTICE(edev, "Rx path is not available\n"); 1477 return -1; 1478 } 1479 1480 /* The packet is expected to receive on rx-queue 0 even though RSS is 1481 * enabled. This is because the queue 0 is configured as the default 1482 * queue and that the loopback traffic is not IP. 1483 */ 1484 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1485 if (!qede_has_rx_work(rxq)) { 1486 usleep_range(100, 200); 1487 continue; 1488 } 1489 1490 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1491 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1492 1493 /* Memory barrier to prevent the CPU from doing speculative 1494 * reads of CQE/BD before reading hw_comp_cons. If the CQE is 1495 * read before it is written by FW, then FW writes CQE and SB, 1496 * and then the CPU reads the hw_comp_cons, it will use an old 1497 * CQE. 1498 */ 1499 rmb(); 1500 1501 /* Get the CQE from the completion ring */ 1502 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1503 1504 /* Get the data from the SW ring */ 1505 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1506 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1507 fp_cqe = &cqe->fast_path_regular; 1508 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1509 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1510 fp_cqe->placement_offset + 1511 sw_rx_data->page_offset); 1512 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1513 ether_addr_equal(data_ptr + ETH_ALEN, 1514 edev->ndev->dev_addr)) { 1515 for (i = ETH_HLEN; i < len; i++) 1516 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1517 rc = -1; 1518 break; 1519 } 1520 1521 qede_recycle_rx_bd_ring(rxq, 1); 1522 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1523 break; 1524 } 1525 1526 DP_INFO(edev, "Not the transmitted packet\n"); 1527 qede_recycle_rx_bd_ring(rxq, 1); 1528 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1529 } 1530 1531 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1532 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1533 return -1; 1534 } 1535 1536 qede_update_rx_prod(edev, rxq); 1537 1538 return rc; 1539 } 1540 1541 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1542 { 1543 struct qed_link_params link_params; 1544 struct sk_buff *skb = NULL; 1545 int rc = 0, i; 1546 u32 pkt_size; 1547 u8 *packet; 1548 1549 if (!netif_running(edev->ndev)) { 1550 DP_NOTICE(edev, "Interface is down\n"); 1551 return -EINVAL; 1552 } 1553 1554 qede_netif_stop(edev); 1555 1556 /* Bring up the link in Loopback mode */ 1557 memset(&link_params, 0, sizeof(link_params)); 1558 link_params.link_up = true; 1559 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1560 link_params.loopback_mode = loopback_mode; 1561 edev->ops->common->set_link(edev->cdev, &link_params); 1562 1563 /* Wait for loopback configuration to apply */ 1564 msleep_interruptible(500); 1565 1566 /* prepare the loopback packet */ 1567 pkt_size = edev->ndev->mtu + ETH_HLEN; 1568 1569 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1570 if (!skb) { 1571 DP_INFO(edev, "Can't allocate skb\n"); 1572 rc = -ENOMEM; 1573 goto test_loopback_exit; 1574 } 1575 packet = skb_put(skb, pkt_size); 1576 ether_addr_copy(packet, edev->ndev->dev_addr); 1577 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1578 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1579 for (i = ETH_HLEN; i < pkt_size; i++) 1580 packet[i] = (unsigned char)(i & 0xff); 1581 1582 rc = qede_selftest_transmit_traffic(edev, skb); 1583 if (rc) 1584 goto test_loopback_exit; 1585 1586 rc = qede_selftest_receive_traffic(edev); 1587 if (rc) 1588 goto test_loopback_exit; 1589 1590 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1591 1592 test_loopback_exit: 1593 dev_kfree_skb(skb); 1594 1595 /* Bring up the link in Normal mode */ 1596 memset(&link_params, 0, sizeof(link_params)); 1597 link_params.link_up = true; 1598 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1599 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1600 edev->ops->common->set_link(edev->cdev, &link_params); 1601 1602 /* Wait for loopback configuration to apply */ 1603 msleep_interruptible(500); 1604 1605 qede_netif_start(edev); 1606 1607 return rc; 1608 } 1609 1610 static void qede_self_test(struct net_device *dev, 1611 struct ethtool_test *etest, u64 *buf) 1612 { 1613 struct qede_dev *edev = netdev_priv(dev); 1614 1615 DP_VERBOSE(edev, QED_MSG_DEBUG, 1616 "Self-test command parameters: offline = %d, external_lb = %d\n", 1617 (etest->flags & ETH_TEST_FL_OFFLINE), 1618 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1619 1620 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1621 1622 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1623 if (qede_selftest_run_loopback(edev, 1624 QED_LINK_LOOPBACK_INT_PHY)) { 1625 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1626 etest->flags |= ETH_TEST_FL_FAILED; 1627 } 1628 } 1629 1630 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1631 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1632 etest->flags |= ETH_TEST_FL_FAILED; 1633 } 1634 1635 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1636 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1637 etest->flags |= ETH_TEST_FL_FAILED; 1638 } 1639 1640 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1641 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1642 etest->flags |= ETH_TEST_FL_FAILED; 1643 } 1644 1645 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1646 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1647 etest->flags |= ETH_TEST_FL_FAILED; 1648 } 1649 1650 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1651 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1652 etest->flags |= ETH_TEST_FL_FAILED; 1653 } 1654 } 1655 1656 static int qede_set_tunable(struct net_device *dev, 1657 const struct ethtool_tunable *tuna, 1658 const void *data) 1659 { 1660 struct qede_dev *edev = netdev_priv(dev); 1661 u32 val; 1662 1663 switch (tuna->id) { 1664 case ETHTOOL_RX_COPYBREAK: 1665 val = *(u32 *)data; 1666 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1667 DP_VERBOSE(edev, QED_MSG_DEBUG, 1668 "Invalid rx copy break value, range is [%u, %u]", 1669 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1670 return -EINVAL; 1671 } 1672 1673 edev->rx_copybreak = *(u32 *)data; 1674 break; 1675 default: 1676 return -EOPNOTSUPP; 1677 } 1678 1679 return 0; 1680 } 1681 1682 static int qede_get_tunable(struct net_device *dev, 1683 const struct ethtool_tunable *tuna, void *data) 1684 { 1685 struct qede_dev *edev = netdev_priv(dev); 1686 1687 switch (tuna->id) { 1688 case ETHTOOL_RX_COPYBREAK: 1689 *(u32 *)data = edev->rx_copybreak; 1690 break; 1691 default: 1692 return -EOPNOTSUPP; 1693 } 1694 1695 return 0; 1696 } 1697 1698 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1699 { 1700 struct qede_dev *edev = netdev_priv(dev); 1701 struct qed_link_output current_link; 1702 1703 memset(¤t_link, 0, sizeof(current_link)); 1704 edev->ops->common->get_link(edev->cdev, ¤t_link); 1705 1706 if (!current_link.eee_supported) { 1707 DP_INFO(edev, "EEE is not supported\n"); 1708 return -EOPNOTSUPP; 1709 } 1710 1711 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1712 edata->advertised = ADVERTISED_1000baseT_Full; 1713 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1714 edata->advertised |= ADVERTISED_10000baseT_Full; 1715 if (current_link.sup_caps & QED_EEE_1G_ADV) 1716 edata->supported = ADVERTISED_1000baseT_Full; 1717 if (current_link.sup_caps & QED_EEE_10G_ADV) 1718 edata->supported |= ADVERTISED_10000baseT_Full; 1719 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1720 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1721 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1722 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1723 1724 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1725 edata->eee_enabled = current_link.eee.enable; 1726 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1727 edata->eee_active = current_link.eee_active; 1728 1729 return 0; 1730 } 1731 1732 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1733 { 1734 struct qede_dev *edev = netdev_priv(dev); 1735 struct qed_link_output current_link; 1736 struct qed_link_params params; 1737 1738 if (!edev->ops->common->can_link_change(edev->cdev)) { 1739 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1740 return -EOPNOTSUPP; 1741 } 1742 1743 memset(¤t_link, 0, sizeof(current_link)); 1744 edev->ops->common->get_link(edev->cdev, ¤t_link); 1745 1746 if (!current_link.eee_supported) { 1747 DP_INFO(edev, "EEE is not supported\n"); 1748 return -EOPNOTSUPP; 1749 } 1750 1751 memset(¶ms, 0, sizeof(params)); 1752 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1753 1754 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1755 ADVERTISED_10000baseT_Full)) || 1756 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1757 ADVERTISED_10000baseT_Full)) != 1758 edata->advertised)) { 1759 DP_VERBOSE(edev, QED_MSG_DEBUG, 1760 "Invalid advertised capabilities %d\n", 1761 edata->advertised); 1762 return -EINVAL; 1763 } 1764 1765 if (edata->advertised & ADVERTISED_1000baseT_Full) 1766 params.eee.adv_caps = QED_EEE_1G_ADV; 1767 if (edata->advertised & ADVERTISED_10000baseT_Full) 1768 params.eee.adv_caps |= QED_EEE_10G_ADV; 1769 params.eee.enable = edata->eee_enabled; 1770 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1771 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1772 1773 params.link_up = true; 1774 edev->ops->common->set_link(edev->cdev, ¶ms); 1775 1776 return 0; 1777 } 1778 1779 static const struct ethtool_ops qede_ethtool_ops = { 1780 .get_link_ksettings = qede_get_link_ksettings, 1781 .set_link_ksettings = qede_set_link_ksettings, 1782 .get_drvinfo = qede_get_drvinfo, 1783 .get_regs_len = qede_get_regs_len, 1784 .get_regs = qede_get_regs, 1785 .get_wol = qede_get_wol, 1786 .set_wol = qede_set_wol, 1787 .get_msglevel = qede_get_msglevel, 1788 .set_msglevel = qede_set_msglevel, 1789 .nway_reset = qede_nway_reset, 1790 .get_link = qede_get_link, 1791 .get_coalesce = qede_get_coalesce, 1792 .set_coalesce = qede_set_coalesce, 1793 .get_ringparam = qede_get_ringparam, 1794 .set_ringparam = qede_set_ringparam, 1795 .get_pauseparam = qede_get_pauseparam, 1796 .set_pauseparam = qede_set_pauseparam, 1797 .get_strings = qede_get_strings, 1798 .set_phys_id = qede_set_phys_id, 1799 .get_ethtool_stats = qede_get_ethtool_stats, 1800 .get_priv_flags = qede_get_priv_flags, 1801 .get_sset_count = qede_get_sset_count, 1802 .get_rxnfc = qede_get_rxnfc, 1803 .set_rxnfc = qede_set_rxnfc, 1804 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 1805 .get_rxfh_key_size = qede_get_rxfh_key_size, 1806 .get_rxfh = qede_get_rxfh, 1807 .set_rxfh = qede_set_rxfh, 1808 .get_ts_info = qede_get_ts_info, 1809 .get_channels = qede_get_channels, 1810 .set_channels = qede_set_channels, 1811 .self_test = qede_self_test, 1812 .get_eee = qede_get_eee, 1813 .set_eee = qede_set_eee, 1814 1815 .get_tunable = qede_get_tunable, 1816 .set_tunable = qede_set_tunable, 1817 .flash_device = qede_flash_device, 1818 }; 1819 1820 static const struct ethtool_ops qede_vf_ethtool_ops = { 1821 .get_link_ksettings = qede_get_link_ksettings, 1822 .get_drvinfo = qede_get_drvinfo, 1823 .get_msglevel = qede_get_msglevel, 1824 .set_msglevel = qede_set_msglevel, 1825 .get_link = qede_get_link, 1826 .get_coalesce = qede_get_coalesce, 1827 .set_coalesce = qede_set_coalesce, 1828 .get_ringparam = qede_get_ringparam, 1829 .set_ringparam = qede_set_ringparam, 1830 .get_strings = qede_get_strings, 1831 .get_ethtool_stats = qede_get_ethtool_stats, 1832 .get_priv_flags = qede_get_priv_flags, 1833 .get_sset_count = qede_get_sset_count, 1834 .get_rxnfc = qede_get_rxnfc, 1835 .set_rxnfc = qede_set_rxnfc, 1836 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 1837 .get_rxfh_key_size = qede_get_rxfh_key_size, 1838 .get_rxfh = qede_get_rxfh, 1839 .set_rxfh = qede_set_rxfh, 1840 .get_channels = qede_get_channels, 1841 .set_channels = qede_set_channels, 1842 .get_tunable = qede_get_tunable, 1843 .set_tunable = qede_set_tunable, 1844 }; 1845 1846 void qede_set_ethtool_ops(struct net_device *dev) 1847 { 1848 struct qede_dev *edev = netdev_priv(dev); 1849 1850 if (IS_VF(edev)) 1851 dev->ethtool_ops = &qede_vf_ethtool_ops; 1852 else 1853 dev->ethtool_ops = &qede_ethtool_ops; 1854 } 1855