1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/version.h> 33 #include <linux/types.h> 34 #include <linux/netdevice.h> 35 #include <linux/etherdevice.h> 36 #include <linux/ethtool.h> 37 #include <linux/string.h> 38 #include <linux/pci.h> 39 #include <linux/capability.h> 40 #include <linux/vmalloc.h> 41 #include "qede.h" 42 #include "qede_ptp.h" 43 44 #define QEDE_RQSTAT_OFFSET(stat_name) \ 45 (offsetof(struct qede_rx_queue, stat_name)) 46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 47 #define QEDE_RQSTAT(stat_name) \ 48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 49 50 #define QEDE_SELFTEST_POLL_COUNT 100 51 #define QEDE_DUMP_VERSION 0x1 52 #define QEDE_DUMP_NVM_BUF_LEN 32 53 #define QEDE_DUMP_NVM_ARG_COUNT 2 54 55 static const struct { 56 u64 offset; 57 char string[ETH_GSTRING_LEN]; 58 } qede_rqstats_arr[] = { 59 QEDE_RQSTAT(rcv_pkts), 60 QEDE_RQSTAT(rx_hw_errors), 61 QEDE_RQSTAT(rx_alloc_errors), 62 QEDE_RQSTAT(rx_ip_frags), 63 QEDE_RQSTAT(xdp_no_pass), 64 }; 65 66 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 67 #define QEDE_TQSTAT_OFFSET(stat_name) \ 68 (offsetof(struct qede_tx_queue, stat_name)) 69 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 70 #define QEDE_TQSTAT(stat_name) \ 71 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 72 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 73 static const struct { 74 u64 offset; 75 char string[ETH_GSTRING_LEN]; 76 } qede_tqstats_arr[] = { 77 QEDE_TQSTAT(xmit_pkts), 78 QEDE_TQSTAT(stopped_cnt), 79 QEDE_TQSTAT(tx_mem_alloc_err), 80 }; 81 82 #define QEDE_STAT_OFFSET(stat_name, type, base) \ 83 (offsetof(type, stat_name) + (base)) 84 #define QEDE_STAT_STRING(stat_name) (#stat_name) 85 #define _QEDE_STAT(stat_name, type, base, attr) \ 86 {QEDE_STAT_OFFSET(stat_name, type, base), \ 87 QEDE_STAT_STRING(stat_name), \ 88 attr} 89 #define QEDE_STAT(stat_name) \ 90 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 91 #define QEDE_PF_STAT(stat_name) \ 92 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 93 BIT(QEDE_STAT_PF_ONLY)) 94 #define QEDE_PF_BB_STAT(stat_name) \ 95 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 96 offsetof(struct qede_stats, bb), \ 97 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 98 #define QEDE_PF_AH_STAT(stat_name) \ 99 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 100 offsetof(struct qede_stats, ah), \ 101 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 102 static const struct { 103 u64 offset; 104 char string[ETH_GSTRING_LEN]; 105 unsigned long attr; 106 #define QEDE_STAT_PF_ONLY 0 107 #define QEDE_STAT_BB_ONLY 1 108 #define QEDE_STAT_AH_ONLY 2 109 } qede_stats_arr[] = { 110 QEDE_STAT(rx_ucast_bytes), 111 QEDE_STAT(rx_mcast_bytes), 112 QEDE_STAT(rx_bcast_bytes), 113 QEDE_STAT(rx_ucast_pkts), 114 QEDE_STAT(rx_mcast_pkts), 115 QEDE_STAT(rx_bcast_pkts), 116 117 QEDE_STAT(tx_ucast_bytes), 118 QEDE_STAT(tx_mcast_bytes), 119 QEDE_STAT(tx_bcast_bytes), 120 QEDE_STAT(tx_ucast_pkts), 121 QEDE_STAT(tx_mcast_pkts), 122 QEDE_STAT(tx_bcast_pkts), 123 124 QEDE_PF_STAT(rx_64_byte_packets), 125 QEDE_PF_STAT(rx_65_to_127_byte_packets), 126 QEDE_PF_STAT(rx_128_to_255_byte_packets), 127 QEDE_PF_STAT(rx_256_to_511_byte_packets), 128 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 129 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 130 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 131 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 132 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 133 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 134 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 135 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 136 QEDE_PF_STAT(tx_64_byte_packets), 137 QEDE_PF_STAT(tx_65_to_127_byte_packets), 138 QEDE_PF_STAT(tx_128_to_255_byte_packets), 139 QEDE_PF_STAT(tx_256_to_511_byte_packets), 140 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 141 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 142 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 143 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 144 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 145 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 146 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 147 QEDE_PF_STAT(rx_mac_crtl_frames), 148 QEDE_PF_STAT(tx_mac_ctrl_frames), 149 QEDE_PF_STAT(rx_pause_frames), 150 QEDE_PF_STAT(tx_pause_frames), 151 QEDE_PF_STAT(rx_pfc_frames), 152 QEDE_PF_STAT(tx_pfc_frames), 153 154 QEDE_PF_STAT(rx_crc_errors), 155 QEDE_PF_STAT(rx_align_errors), 156 QEDE_PF_STAT(rx_carrier_errors), 157 QEDE_PF_STAT(rx_oversize_packets), 158 QEDE_PF_STAT(rx_jabbers), 159 QEDE_PF_STAT(rx_undersize_packets), 160 QEDE_PF_STAT(rx_fragments), 161 QEDE_PF_BB_STAT(tx_lpi_entry_count), 162 QEDE_PF_BB_STAT(tx_total_collisions), 163 QEDE_PF_STAT(brb_truncates), 164 QEDE_PF_STAT(brb_discards), 165 QEDE_STAT(no_buff_discards), 166 QEDE_PF_STAT(mftag_filter_discards), 167 QEDE_PF_STAT(mac_filter_discards), 168 QEDE_PF_STAT(gft_filter_drop), 169 QEDE_STAT(tx_err_drop_pkts), 170 QEDE_STAT(ttl0_discard), 171 QEDE_STAT(packet_too_big_discard), 172 173 QEDE_STAT(coalesced_pkts), 174 QEDE_STAT(coalesced_events), 175 QEDE_STAT(coalesced_aborts_num), 176 QEDE_STAT(non_coalesced_pkts), 177 QEDE_STAT(coalesced_bytes), 178 179 QEDE_STAT(link_change_count), 180 QEDE_STAT(ptp_skip_txts), 181 }; 182 183 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 184 #define QEDE_STAT_IS_PF_ONLY(i) \ 185 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 186 #define QEDE_STAT_IS_BB_ONLY(i) \ 187 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 188 #define QEDE_STAT_IS_AH_ONLY(i) \ 189 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 190 191 enum { 192 QEDE_PRI_FLAG_CMT, 193 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */ 194 QEDE_PRI_FLAG_LEN, 195 }; 196 197 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 198 "Coupled-Function", 199 "SmartAN capable", 200 }; 201 202 enum qede_ethtool_tests { 203 QEDE_ETHTOOL_INT_LOOPBACK, 204 QEDE_ETHTOOL_INTERRUPT_TEST, 205 QEDE_ETHTOOL_MEMORY_TEST, 206 QEDE_ETHTOOL_REGISTER_TEST, 207 QEDE_ETHTOOL_CLOCK_TEST, 208 QEDE_ETHTOOL_NVRAM_TEST, 209 QEDE_ETHTOOL_TEST_MAX 210 }; 211 212 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 213 "Internal loopback (offline)", 214 "Interrupt (online)\t", 215 "Memory (online)\t\t", 216 "Register (online)\t", 217 "Clock (online)\t\t", 218 "Nvram (online)\t\t", 219 }; 220 221 static void qede_get_strings_stats_txq(struct qede_dev *edev, 222 struct qede_tx_queue *txq, u8 **buf) 223 { 224 int i; 225 226 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 227 if (txq->is_xdp) 228 sprintf(*buf, "%d [XDP]: %s", 229 QEDE_TXQ_XDP_TO_IDX(edev, txq), 230 qede_tqstats_arr[i].string); 231 else 232 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos, 233 qede_tqstats_arr[i].string); 234 *buf += ETH_GSTRING_LEN; 235 } 236 } 237 238 static void qede_get_strings_stats_rxq(struct qede_dev *edev, 239 struct qede_rx_queue *rxq, u8 **buf) 240 { 241 int i; 242 243 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 244 sprintf(*buf, "%d: %s", rxq->rxq_id, 245 qede_rqstats_arr[i].string); 246 *buf += ETH_GSTRING_LEN; 247 } 248 } 249 250 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 251 { 252 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 253 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 254 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 255 } 256 257 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 258 { 259 struct qede_fastpath *fp; 260 int i; 261 262 /* Account for queue statistics */ 263 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 264 fp = &edev->fp_array[i]; 265 266 if (fp->type & QEDE_FASTPATH_RX) 267 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 268 269 if (fp->type & QEDE_FASTPATH_XDP) 270 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 271 272 if (fp->type & QEDE_FASTPATH_TX) { 273 int cos; 274 275 for_each_cos_in_txq(edev, cos) 276 qede_get_strings_stats_txq(edev, 277 &fp->txq[cos], &buf); 278 } 279 } 280 281 /* Account for non-queue statistics */ 282 for (i = 0; i < QEDE_NUM_STATS; i++) { 283 if (qede_is_irrelevant_stat(edev, i)) 284 continue; 285 strcpy(buf, qede_stats_arr[i].string); 286 buf += ETH_GSTRING_LEN; 287 } 288 } 289 290 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 291 { 292 struct qede_dev *edev = netdev_priv(dev); 293 294 switch (stringset) { 295 case ETH_SS_STATS: 296 qede_get_strings_stats(edev, buf); 297 break; 298 case ETH_SS_PRIV_FLAGS: 299 memcpy(buf, qede_private_arr, 300 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 301 break; 302 case ETH_SS_TEST: 303 memcpy(buf, qede_tests_str_arr, 304 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 305 break; 306 default: 307 DP_VERBOSE(edev, QED_MSG_DEBUG, 308 "Unsupported stringset 0x%08x\n", stringset); 309 } 310 } 311 312 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 313 { 314 int i; 315 316 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 317 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 318 (*buf)++; 319 } 320 } 321 322 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 323 { 324 int i; 325 326 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 327 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 328 (*buf)++; 329 } 330 } 331 332 static void qede_get_ethtool_stats(struct net_device *dev, 333 struct ethtool_stats *stats, u64 *buf) 334 { 335 struct qede_dev *edev = netdev_priv(dev); 336 struct qede_fastpath *fp; 337 int i; 338 339 qede_fill_by_demand_stats(edev); 340 341 /* Need to protect the access to the fastpath array */ 342 __qede_lock(edev); 343 344 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 345 fp = &edev->fp_array[i]; 346 347 if (fp->type & QEDE_FASTPATH_RX) 348 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 349 350 if (fp->type & QEDE_FASTPATH_XDP) 351 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 352 353 if (fp->type & QEDE_FASTPATH_TX) { 354 int cos; 355 356 for_each_cos_in_txq(edev, cos) 357 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf); 358 } 359 } 360 361 for (i = 0; i < QEDE_NUM_STATS; i++) { 362 if (qede_is_irrelevant_stat(edev, i)) 363 continue; 364 *buf = *((u64 *)(((void *)&edev->stats) + 365 qede_stats_arr[i].offset)); 366 367 buf++; 368 } 369 370 __qede_unlock(edev); 371 } 372 373 static int qede_get_sset_count(struct net_device *dev, int stringset) 374 { 375 struct qede_dev *edev = netdev_priv(dev); 376 int num_stats = QEDE_NUM_STATS, i; 377 378 switch (stringset) { 379 case ETH_SS_STATS: 380 for (i = 0; i < QEDE_NUM_STATS; i++) 381 if (qede_is_irrelevant_stat(edev, i)) 382 num_stats--; 383 384 /* Account for the Regular Tx statistics */ 385 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * 386 edev->dev_info.num_tc; 387 388 /* Account for the Regular Rx statistics */ 389 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 390 391 /* Account for XDP statistics [if needed] */ 392 if (edev->xdp_prog) 393 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 394 return num_stats; 395 396 case ETH_SS_PRIV_FLAGS: 397 return QEDE_PRI_FLAG_LEN; 398 case ETH_SS_TEST: 399 if (!IS_VF(edev)) 400 return QEDE_ETHTOOL_TEST_MAX; 401 else 402 return 0; 403 default: 404 DP_VERBOSE(edev, QED_MSG_DEBUG, 405 "Unsupported stringset 0x%08x\n", stringset); 406 return -EINVAL; 407 } 408 } 409 410 static u32 qede_get_priv_flags(struct net_device *dev) 411 { 412 struct qede_dev *edev = netdev_priv(dev); 413 u32 flags = 0; 414 415 if (edev->dev_info.common.num_hwfns > 1) 416 flags |= BIT(QEDE_PRI_FLAG_CMT); 417 418 if (edev->dev_info.common.smart_an) 419 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT); 420 421 return flags; 422 } 423 424 struct qede_link_mode_mapping { 425 u32 qed_link_mode; 426 u32 ethtool_link_mode; 427 }; 428 429 static const struct qede_link_mode_mapping qed_lm_map[] = { 430 {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT}, 431 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT}, 432 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT}, 433 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT}, 434 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT}, 435 {QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT}, 436 {QED_LM_TP_BIT, ETHTOOL_LINK_MODE_TP_BIT}, 437 {QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT}, 438 {QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT}, 439 {QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT}, 440 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 441 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 442 {QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT}, 443 {QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT}, 444 {QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT}, 445 {QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT}, 446 {QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT}, 447 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT}, 448 {QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT}, 449 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT}, 450 {QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT}, 451 {QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT}, 452 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT}, 453 {QED_LM_100000baseKR4_Full_BIT, 454 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT}, 455 {QED_LM_100000baseSR4_Full_BIT, 456 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT}, 457 {QED_LM_100000baseCR4_Full_BIT, 458 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT}, 459 {QED_LM_100000baseLR4_ER4_Full_BIT, 460 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT}, 461 {QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT}, 462 {QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT}, 463 {QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT}, 464 {QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT}, 465 {QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT}, 466 {QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT}, 467 }; 468 469 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \ 470 { \ 471 int i; \ 472 \ 473 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 474 if ((caps) & (qed_lm_map[i].qed_link_mode)) \ 475 __set_bit(qed_lm_map[i].ethtool_link_mode,\ 476 lk_ksettings->link_modes.name); \ 477 } \ 478 } 479 480 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \ 481 { \ 482 int i; \ 483 \ 484 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 485 if (test_bit(qed_lm_map[i].ethtool_link_mode, \ 486 lk_ksettings->link_modes.name)) \ 487 caps |= qed_lm_map[i].qed_link_mode; \ 488 } \ 489 } 490 491 static int qede_get_link_ksettings(struct net_device *dev, 492 struct ethtool_link_ksettings *cmd) 493 { 494 struct ethtool_link_settings *base = &cmd->base; 495 struct qede_dev *edev = netdev_priv(dev); 496 struct qed_link_output current_link; 497 498 __qede_lock(edev); 499 500 memset(¤t_link, 0, sizeof(current_link)); 501 edev->ops->common->get_link(edev->cdev, ¤t_link); 502 503 ethtool_link_ksettings_zero_link_mode(cmd, supported); 504 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported) 505 506 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 507 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising) 508 509 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 510 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising) 511 512 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 513 base->speed = current_link.speed; 514 base->duplex = current_link.duplex; 515 } else { 516 base->speed = SPEED_UNKNOWN; 517 base->duplex = DUPLEX_UNKNOWN; 518 } 519 520 __qede_unlock(edev); 521 522 base->port = current_link.port; 523 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 524 AUTONEG_DISABLE; 525 526 return 0; 527 } 528 529 static int qede_set_link_ksettings(struct net_device *dev, 530 const struct ethtool_link_ksettings *cmd) 531 { 532 const struct ethtool_link_settings *base = &cmd->base; 533 struct qede_dev *edev = netdev_priv(dev); 534 struct qed_link_output current_link; 535 struct qed_link_params params; 536 u32 sup_caps; 537 538 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 539 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 540 return -EOPNOTSUPP; 541 } 542 memset(¤t_link, 0, sizeof(current_link)); 543 memset(¶ms, 0, sizeof(params)); 544 edev->ops->common->get_link(edev->cdev, ¤t_link); 545 546 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 547 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 548 if (base->autoneg == AUTONEG_ENABLE) { 549 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 550 DP_INFO(edev, "Auto negotiation is not supported\n"); 551 return -EOPNOTSUPP; 552 } 553 554 params.autoneg = true; 555 params.forced_speed = 0; 556 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising) 557 } else { /* forced speed */ 558 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 559 params.autoneg = false; 560 params.forced_speed = base->speed; 561 switch (base->speed) { 562 case SPEED_1000: 563 sup_caps = QED_LM_1000baseT_Full_BIT | 564 QED_LM_1000baseKX_Full_BIT | 565 QED_LM_1000baseX_Full_BIT; 566 if (!(current_link.supported_caps & sup_caps)) { 567 DP_INFO(edev, "1G speed not supported\n"); 568 return -EINVAL; 569 } 570 params.adv_speeds = current_link.supported_caps & 571 sup_caps; 572 break; 573 case SPEED_10000: 574 sup_caps = QED_LM_10000baseT_Full_BIT | 575 QED_LM_10000baseKR_Full_BIT | 576 QED_LM_10000baseKX4_Full_BIT | 577 QED_LM_10000baseR_FEC_BIT | 578 QED_LM_10000baseCR_Full_BIT | 579 QED_LM_10000baseSR_Full_BIT | 580 QED_LM_10000baseLR_Full_BIT | 581 QED_LM_10000baseLRM_Full_BIT; 582 if (!(current_link.supported_caps & sup_caps)) { 583 DP_INFO(edev, "10G speed not supported\n"); 584 return -EINVAL; 585 } 586 params.adv_speeds = current_link.supported_caps & 587 sup_caps; 588 break; 589 case SPEED_20000: 590 if (!(current_link.supported_caps & 591 QED_LM_20000baseKR2_Full_BIT)) { 592 DP_INFO(edev, "20G speed not supported\n"); 593 return -EINVAL; 594 } 595 params.adv_speeds = QED_LM_20000baseKR2_Full_BIT; 596 break; 597 case SPEED_25000: 598 sup_caps = QED_LM_25000baseKR_Full_BIT | 599 QED_LM_25000baseCR_Full_BIT | 600 QED_LM_25000baseSR_Full_BIT; 601 if (!(current_link.supported_caps & sup_caps)) { 602 DP_INFO(edev, "25G speed not supported\n"); 603 return -EINVAL; 604 } 605 params.adv_speeds = current_link.supported_caps & 606 sup_caps; 607 break; 608 case SPEED_40000: 609 sup_caps = QED_LM_40000baseLR4_Full_BIT | 610 QED_LM_40000baseKR4_Full_BIT | 611 QED_LM_40000baseCR4_Full_BIT | 612 QED_LM_40000baseSR4_Full_BIT; 613 if (!(current_link.supported_caps & sup_caps)) { 614 DP_INFO(edev, "40G speed not supported\n"); 615 return -EINVAL; 616 } 617 params.adv_speeds = current_link.supported_caps & 618 sup_caps; 619 break; 620 case SPEED_50000: 621 sup_caps = QED_LM_50000baseKR2_Full_BIT | 622 QED_LM_50000baseCR2_Full_BIT | 623 QED_LM_50000baseSR2_Full_BIT; 624 if (!(current_link.supported_caps & sup_caps)) { 625 DP_INFO(edev, "50G speed not supported\n"); 626 return -EINVAL; 627 } 628 params.adv_speeds = current_link.supported_caps & 629 sup_caps; 630 break; 631 case SPEED_100000: 632 sup_caps = QED_LM_100000baseKR4_Full_BIT | 633 QED_LM_100000baseSR4_Full_BIT | 634 QED_LM_100000baseCR4_Full_BIT | 635 QED_LM_100000baseLR4_ER4_Full_BIT; 636 if (!(current_link.supported_caps & sup_caps)) { 637 DP_INFO(edev, "100G speed not supported\n"); 638 return -EINVAL; 639 } 640 params.adv_speeds = current_link.supported_caps & 641 sup_caps; 642 break; 643 default: 644 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 645 return -EINVAL; 646 } 647 } 648 649 params.link_up = true; 650 edev->ops->common->set_link(edev->cdev, ¶ms); 651 652 return 0; 653 } 654 655 static void qede_get_drvinfo(struct net_device *ndev, 656 struct ethtool_drvinfo *info) 657 { 658 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 659 struct qede_dev *edev = netdev_priv(ndev); 660 char mbi[ETHTOOL_FWVERS_LEN]; 661 662 strlcpy(info->driver, "qede", sizeof(info->driver)); 663 664 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 665 edev->dev_info.common.fw_major, 666 edev->dev_info.common.fw_minor, 667 edev->dev_info.common.fw_rev, 668 edev->dev_info.common.fw_eng); 669 670 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 671 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 672 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 673 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 674 edev->dev_info.common.mfw_rev & 0xFF); 675 676 if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm] ")) < 677 sizeof(info->version)) 678 snprintf(info->version, sizeof(info->version), 679 "%s [storm %s]", DRV_MODULE_VERSION, storm); 680 else 681 snprintf(info->version, sizeof(info->version), 682 "%s %s", DRV_MODULE_VERSION, storm); 683 684 if (edev->dev_info.common.mbi_version) { 685 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d", 686 (edev->dev_info.common.mbi_version & 687 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET, 688 (edev->dev_info.common.mbi_version & 689 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET, 690 (edev->dev_info.common.mbi_version & 691 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET); 692 snprintf(info->fw_version, sizeof(info->fw_version), 693 "mbi %s [mfw %s]", mbi, mfw); 694 } else { 695 snprintf(info->fw_version, sizeof(info->fw_version), 696 "mfw %s", mfw); 697 } 698 699 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 700 } 701 702 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 703 { 704 struct qede_dev *edev = netdev_priv(ndev); 705 706 if (edev->dev_info.common.wol_support) { 707 wol->supported = WAKE_MAGIC; 708 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 709 } 710 } 711 712 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 713 { 714 struct qede_dev *edev = netdev_priv(ndev); 715 bool wol_requested; 716 int rc; 717 718 if (wol->wolopts & ~WAKE_MAGIC) { 719 DP_INFO(edev, 720 "Can't support WoL options other than magic-packet\n"); 721 return -EINVAL; 722 } 723 724 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 725 if (wol_requested == edev->wol_enabled) 726 return 0; 727 728 /* Need to actually change configuration */ 729 if (!edev->dev_info.common.wol_support) { 730 DP_INFO(edev, "Device doesn't support WoL\n"); 731 return -EINVAL; 732 } 733 734 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 735 if (!rc) 736 edev->wol_enabled = wol_requested; 737 738 return rc; 739 } 740 741 static u32 qede_get_msglevel(struct net_device *ndev) 742 { 743 struct qede_dev *edev = netdev_priv(ndev); 744 745 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 746 } 747 748 static void qede_set_msglevel(struct net_device *ndev, u32 level) 749 { 750 struct qede_dev *edev = netdev_priv(ndev); 751 u32 dp_module = 0; 752 u8 dp_level = 0; 753 754 qede_config_debug(level, &dp_module, &dp_level); 755 756 edev->dp_level = dp_level; 757 edev->dp_module = dp_module; 758 edev->ops->common->update_msglvl(edev->cdev, 759 dp_module, dp_level); 760 } 761 762 static int qede_nway_reset(struct net_device *dev) 763 { 764 struct qede_dev *edev = netdev_priv(dev); 765 struct qed_link_output current_link; 766 struct qed_link_params link_params; 767 768 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 769 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 770 return -EOPNOTSUPP; 771 } 772 773 if (!netif_running(dev)) 774 return 0; 775 776 memset(¤t_link, 0, sizeof(current_link)); 777 edev->ops->common->get_link(edev->cdev, ¤t_link); 778 if (!current_link.link_up) 779 return 0; 780 781 /* Toggle the link */ 782 memset(&link_params, 0, sizeof(link_params)); 783 link_params.link_up = false; 784 edev->ops->common->set_link(edev->cdev, &link_params); 785 link_params.link_up = true; 786 edev->ops->common->set_link(edev->cdev, &link_params); 787 788 return 0; 789 } 790 791 static u32 qede_get_link(struct net_device *dev) 792 { 793 struct qede_dev *edev = netdev_priv(dev); 794 struct qed_link_output current_link; 795 796 memset(¤t_link, 0, sizeof(current_link)); 797 edev->ops->common->get_link(edev->cdev, ¤t_link); 798 799 return current_link.link_up; 800 } 801 802 static int qede_flash_device(struct net_device *dev, 803 struct ethtool_flash *flash) 804 { 805 struct qede_dev *edev = netdev_priv(dev); 806 807 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 808 } 809 810 static int qede_get_coalesce(struct net_device *dev, 811 struct ethtool_coalesce *coal) 812 { 813 void *rx_handle = NULL, *tx_handle = NULL; 814 struct qede_dev *edev = netdev_priv(dev); 815 u16 rx_coal, tx_coal, i, rc = 0; 816 struct qede_fastpath *fp; 817 818 rx_coal = QED_DEFAULT_RX_USECS; 819 tx_coal = QED_DEFAULT_TX_USECS; 820 821 memset(coal, 0, sizeof(struct ethtool_coalesce)); 822 823 __qede_lock(edev); 824 if (edev->state == QEDE_STATE_OPEN) { 825 for_each_queue(i) { 826 fp = &edev->fp_array[i]; 827 828 if (fp->type & QEDE_FASTPATH_RX) { 829 rx_handle = fp->rxq->handle; 830 break; 831 } 832 } 833 834 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 835 if (rc) { 836 DP_INFO(edev, "Read Rx coalesce error\n"); 837 goto out; 838 } 839 840 for_each_queue(i) { 841 struct qede_tx_queue *txq; 842 843 fp = &edev->fp_array[i]; 844 845 /* All TX queues of given fastpath uses same 846 * coalescing value, so no need to iterate over 847 * all TCs, TC0 txq should suffice. 848 */ 849 if (fp->type & QEDE_FASTPATH_TX) { 850 txq = QEDE_FP_TC0_TXQ(fp); 851 tx_handle = txq->handle; 852 break; 853 } 854 } 855 856 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 857 if (rc) 858 DP_INFO(edev, "Read Tx coalesce error\n"); 859 } 860 861 out: 862 __qede_unlock(edev); 863 864 coal->rx_coalesce_usecs = rx_coal; 865 coal->tx_coalesce_usecs = tx_coal; 866 867 return rc; 868 } 869 870 static int qede_set_coalesce(struct net_device *dev, 871 struct ethtool_coalesce *coal) 872 { 873 struct qede_dev *edev = netdev_priv(dev); 874 struct qede_fastpath *fp; 875 int i, rc = 0; 876 u16 rxc, txc; 877 878 if (!netif_running(dev)) { 879 DP_INFO(edev, "Interface is down\n"); 880 return -EINVAL; 881 } 882 883 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 884 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 885 DP_INFO(edev, 886 "Can't support requested %s coalesce value [max supported value %d]\n", 887 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 888 "tx", QED_COALESCE_MAX); 889 return -EINVAL; 890 } 891 892 rxc = (u16)coal->rx_coalesce_usecs; 893 txc = (u16)coal->tx_coalesce_usecs; 894 for_each_queue(i) { 895 fp = &edev->fp_array[i]; 896 897 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 898 rc = edev->ops->common->set_coalesce(edev->cdev, 899 rxc, 0, 900 fp->rxq->handle); 901 if (rc) { 902 DP_INFO(edev, 903 "Set RX coalesce error, rc = %d\n", rc); 904 return rc; 905 } 906 } 907 908 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 909 struct qede_tx_queue *txq; 910 911 /* All TX queues of given fastpath uses same 912 * coalescing value, so no need to iterate over 913 * all TCs, TC0 txq should suffice. 914 */ 915 txq = QEDE_FP_TC0_TXQ(fp); 916 917 rc = edev->ops->common->set_coalesce(edev->cdev, 918 0, txc, 919 txq->handle); 920 if (rc) { 921 DP_INFO(edev, 922 "Set TX coalesce error, rc = %d\n", rc); 923 return rc; 924 } 925 } 926 } 927 928 return rc; 929 } 930 931 static void qede_get_ringparam(struct net_device *dev, 932 struct ethtool_ringparam *ering) 933 { 934 struct qede_dev *edev = netdev_priv(dev); 935 936 ering->rx_max_pending = NUM_RX_BDS_MAX; 937 ering->rx_pending = edev->q_num_rx_buffers; 938 ering->tx_max_pending = NUM_TX_BDS_MAX; 939 ering->tx_pending = edev->q_num_tx_buffers; 940 } 941 942 static int qede_set_ringparam(struct net_device *dev, 943 struct ethtool_ringparam *ering) 944 { 945 struct qede_dev *edev = netdev_priv(dev); 946 947 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 948 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 949 ering->rx_pending, ering->tx_pending); 950 951 /* Validate legality of configuration */ 952 if (ering->rx_pending > NUM_RX_BDS_MAX || 953 ering->rx_pending < NUM_RX_BDS_MIN || 954 ering->tx_pending > NUM_TX_BDS_MAX || 955 ering->tx_pending < NUM_TX_BDS_MIN) { 956 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 957 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 958 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 959 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 960 return -EINVAL; 961 } 962 963 /* Change ring size and re-load */ 964 edev->q_num_rx_buffers = ering->rx_pending; 965 edev->q_num_tx_buffers = ering->tx_pending; 966 967 qede_reload(edev, NULL, false); 968 969 return 0; 970 } 971 972 static void qede_get_pauseparam(struct net_device *dev, 973 struct ethtool_pauseparam *epause) 974 { 975 struct qede_dev *edev = netdev_priv(dev); 976 struct qed_link_output current_link; 977 978 memset(¤t_link, 0, sizeof(current_link)); 979 edev->ops->common->get_link(edev->cdev, ¤t_link); 980 981 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 982 epause->autoneg = true; 983 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 984 epause->rx_pause = true; 985 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 986 epause->tx_pause = true; 987 988 DP_VERBOSE(edev, QED_MSG_DEBUG, 989 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 990 epause->cmd, epause->autoneg, epause->rx_pause, 991 epause->tx_pause); 992 } 993 994 static int qede_set_pauseparam(struct net_device *dev, 995 struct ethtool_pauseparam *epause) 996 { 997 struct qede_dev *edev = netdev_priv(dev); 998 struct qed_link_params params; 999 struct qed_link_output current_link; 1000 1001 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 1002 DP_INFO(edev, 1003 "Pause settings are not allowed to be changed\n"); 1004 return -EOPNOTSUPP; 1005 } 1006 1007 memset(¤t_link, 0, sizeof(current_link)); 1008 edev->ops->common->get_link(edev->cdev, ¤t_link); 1009 1010 memset(¶ms, 0, sizeof(params)); 1011 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 1012 if (epause->autoneg) { 1013 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 1014 DP_INFO(edev, "autoneg not supported\n"); 1015 return -EINVAL; 1016 } 1017 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 1018 } 1019 if (epause->rx_pause) 1020 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 1021 if (epause->tx_pause) 1022 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 1023 1024 params.link_up = true; 1025 edev->ops->common->set_link(edev->cdev, ¶ms); 1026 1027 return 0; 1028 } 1029 1030 static void qede_get_regs(struct net_device *ndev, 1031 struct ethtool_regs *regs, void *buffer) 1032 { 1033 struct qede_dev *edev = netdev_priv(ndev); 1034 1035 regs->version = 0; 1036 memset(buffer, 0, regs->len); 1037 1038 if (edev->ops && edev->ops->common) 1039 edev->ops->common->dbg_all_data(edev->cdev, buffer); 1040 } 1041 1042 static int qede_get_regs_len(struct net_device *ndev) 1043 { 1044 struct qede_dev *edev = netdev_priv(ndev); 1045 1046 if (edev->ops && edev->ops->common) 1047 return edev->ops->common->dbg_all_data_size(edev->cdev); 1048 else 1049 return -EINVAL; 1050 } 1051 1052 static void qede_update_mtu(struct qede_dev *edev, 1053 struct qede_reload_args *args) 1054 { 1055 edev->ndev->mtu = args->u.mtu; 1056 } 1057 1058 /* Netdevice NDOs */ 1059 int qede_change_mtu(struct net_device *ndev, int new_mtu) 1060 { 1061 struct qede_dev *edev = netdev_priv(ndev); 1062 struct qede_reload_args args; 1063 1064 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1065 "Configuring MTU size of %d\n", new_mtu); 1066 1067 if (new_mtu > PAGE_SIZE) 1068 ndev->features &= ~NETIF_F_GRO_HW; 1069 1070 /* Set the mtu field and re-start the interface if needed */ 1071 args.u.mtu = new_mtu; 1072 args.func = &qede_update_mtu; 1073 qede_reload(edev, &args, false); 1074 1075 edev->ops->common->update_mtu(edev->cdev, new_mtu); 1076 1077 return 0; 1078 } 1079 1080 static void qede_get_channels(struct net_device *dev, 1081 struct ethtool_channels *channels) 1082 { 1083 struct qede_dev *edev = netdev_priv(dev); 1084 1085 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 1086 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 1087 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 1088 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 1089 edev->fp_num_rx; 1090 channels->tx_count = edev->fp_num_tx; 1091 channels->rx_count = edev->fp_num_rx; 1092 } 1093 1094 static int qede_set_channels(struct net_device *dev, 1095 struct ethtool_channels *channels) 1096 { 1097 struct qede_dev *edev = netdev_priv(dev); 1098 u32 count; 1099 1100 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1101 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 1102 channels->rx_count, channels->tx_count, 1103 channels->other_count, channels->combined_count); 1104 1105 count = channels->rx_count + channels->tx_count + 1106 channels->combined_count; 1107 1108 /* We don't support `other' channels */ 1109 if (channels->other_count) { 1110 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1111 "command parameters not supported\n"); 1112 return -EINVAL; 1113 } 1114 1115 if (!(channels->combined_count || (channels->rx_count && 1116 channels->tx_count))) { 1117 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1118 "need to request at least one transmit and one receive channel\n"); 1119 return -EINVAL; 1120 } 1121 1122 if (count > QEDE_MAX_RSS_CNT(edev)) { 1123 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1124 "requested channels = %d max supported channels = %d\n", 1125 count, QEDE_MAX_RSS_CNT(edev)); 1126 return -EINVAL; 1127 } 1128 1129 /* Check if there was a change in the active parameters */ 1130 if ((count == QEDE_QUEUE_CNT(edev)) && 1131 (channels->tx_count == edev->fp_num_tx) && 1132 (channels->rx_count == edev->fp_num_rx)) { 1133 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1134 "No change in active parameters\n"); 1135 return 0; 1136 } 1137 1138 /* We need the number of queues to be divisible between the hwfns */ 1139 if ((count % edev->dev_info.common.num_hwfns) || 1140 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1141 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1142 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1143 "Number of channels must be divisible by %04x\n", 1144 edev->dev_info.common.num_hwfns); 1145 return -EINVAL; 1146 } 1147 1148 /* Set number of queues and reload if necessary */ 1149 edev->req_queues = count; 1150 edev->req_num_tx = channels->tx_count; 1151 edev->req_num_rx = channels->rx_count; 1152 /* Reset the indirection table if rx queue count is updated */ 1153 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1154 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1155 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1156 } 1157 1158 qede_reload(edev, NULL, false); 1159 1160 return 0; 1161 } 1162 1163 static int qede_get_ts_info(struct net_device *dev, 1164 struct ethtool_ts_info *info) 1165 { 1166 struct qede_dev *edev = netdev_priv(dev); 1167 1168 return qede_ptp_get_ts_info(edev, info); 1169 } 1170 1171 static int qede_set_phys_id(struct net_device *dev, 1172 enum ethtool_phys_id_state state) 1173 { 1174 struct qede_dev *edev = netdev_priv(dev); 1175 u8 led_state = 0; 1176 1177 switch (state) { 1178 case ETHTOOL_ID_ACTIVE: 1179 return 1; /* cycle on/off once per second */ 1180 1181 case ETHTOOL_ID_ON: 1182 led_state = QED_LED_MODE_ON; 1183 break; 1184 1185 case ETHTOOL_ID_OFF: 1186 led_state = QED_LED_MODE_OFF; 1187 break; 1188 1189 case ETHTOOL_ID_INACTIVE: 1190 led_state = QED_LED_MODE_RESTORE; 1191 break; 1192 } 1193 1194 edev->ops->common->set_led(edev->cdev, led_state); 1195 1196 return 0; 1197 } 1198 1199 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1200 { 1201 info->data = RXH_IP_SRC | RXH_IP_DST; 1202 1203 switch (info->flow_type) { 1204 case TCP_V4_FLOW: 1205 case TCP_V6_FLOW: 1206 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1207 break; 1208 case UDP_V4_FLOW: 1209 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1210 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1211 break; 1212 case UDP_V6_FLOW: 1213 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1214 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1215 break; 1216 case IPV4_FLOW: 1217 case IPV6_FLOW: 1218 break; 1219 default: 1220 info->data = 0; 1221 break; 1222 } 1223 1224 return 0; 1225 } 1226 1227 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1228 u32 *rule_locs) 1229 { 1230 struct qede_dev *edev = netdev_priv(dev); 1231 int rc = 0; 1232 1233 switch (info->cmd) { 1234 case ETHTOOL_GRXRINGS: 1235 info->data = QEDE_RSS_COUNT(edev); 1236 break; 1237 case ETHTOOL_GRXFH: 1238 rc = qede_get_rss_flags(edev, info); 1239 break; 1240 case ETHTOOL_GRXCLSRLCNT: 1241 info->rule_cnt = qede_get_arfs_filter_count(edev); 1242 info->data = QEDE_RFS_MAX_FLTR; 1243 break; 1244 case ETHTOOL_GRXCLSRULE: 1245 rc = qede_get_cls_rule_entry(edev, info); 1246 break; 1247 case ETHTOOL_GRXCLSRLALL: 1248 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1249 break; 1250 default: 1251 DP_ERR(edev, "Command parameters not supported\n"); 1252 rc = -EOPNOTSUPP; 1253 } 1254 1255 return rc; 1256 } 1257 1258 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1259 { 1260 struct qed_update_vport_params *vport_update_params; 1261 u8 set_caps = 0, clr_caps = 0; 1262 int rc = 0; 1263 1264 DP_VERBOSE(edev, QED_MSG_DEBUG, 1265 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1266 info->flow_type, info->data); 1267 1268 switch (info->flow_type) { 1269 case TCP_V4_FLOW: 1270 case TCP_V6_FLOW: 1271 /* For TCP only 4-tuple hash is supported */ 1272 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1273 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1274 DP_INFO(edev, "Command parameters not supported\n"); 1275 return -EINVAL; 1276 } 1277 return 0; 1278 case UDP_V4_FLOW: 1279 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1280 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1281 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1282 set_caps = QED_RSS_IPV4_UDP; 1283 DP_VERBOSE(edev, QED_MSG_DEBUG, 1284 "UDP 4-tuple enabled\n"); 1285 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1286 clr_caps = QED_RSS_IPV4_UDP; 1287 DP_VERBOSE(edev, QED_MSG_DEBUG, 1288 "UDP 4-tuple disabled\n"); 1289 } else { 1290 return -EINVAL; 1291 } 1292 break; 1293 case UDP_V6_FLOW: 1294 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1295 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1296 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1297 set_caps = QED_RSS_IPV6_UDP; 1298 DP_VERBOSE(edev, QED_MSG_DEBUG, 1299 "UDP 4-tuple enabled\n"); 1300 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1301 clr_caps = QED_RSS_IPV6_UDP; 1302 DP_VERBOSE(edev, QED_MSG_DEBUG, 1303 "UDP 4-tuple disabled\n"); 1304 } else { 1305 return -EINVAL; 1306 } 1307 break; 1308 case IPV4_FLOW: 1309 case IPV6_FLOW: 1310 /* For IP only 2-tuple hash is supported */ 1311 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1312 DP_INFO(edev, "Command parameters not supported\n"); 1313 return -EINVAL; 1314 } 1315 return 0; 1316 case SCTP_V4_FLOW: 1317 case AH_ESP_V4_FLOW: 1318 case AH_V4_FLOW: 1319 case ESP_V4_FLOW: 1320 case SCTP_V6_FLOW: 1321 case AH_ESP_V6_FLOW: 1322 case AH_V6_FLOW: 1323 case ESP_V6_FLOW: 1324 case IP_USER_FLOW: 1325 case ETHER_FLOW: 1326 /* RSS is not supported for these protocols */ 1327 if (info->data) { 1328 DP_INFO(edev, "Command parameters not supported\n"); 1329 return -EINVAL; 1330 } 1331 return 0; 1332 default: 1333 return -EINVAL; 1334 } 1335 1336 /* No action is needed if there is no change in the rss capability */ 1337 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1338 return 0; 1339 1340 /* Update internal configuration */ 1341 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1342 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1343 1344 /* Re-configure if possible */ 1345 __qede_lock(edev); 1346 if (edev->state == QEDE_STATE_OPEN) { 1347 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1348 if (!vport_update_params) { 1349 __qede_unlock(edev); 1350 return -ENOMEM; 1351 } 1352 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1353 &vport_update_params->update_rss_flg); 1354 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1355 vfree(vport_update_params); 1356 } 1357 __qede_unlock(edev); 1358 1359 return rc; 1360 } 1361 1362 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1363 { 1364 struct qede_dev *edev = netdev_priv(dev); 1365 int rc; 1366 1367 switch (info->cmd) { 1368 case ETHTOOL_SRXFH: 1369 rc = qede_set_rss_flags(edev, info); 1370 break; 1371 case ETHTOOL_SRXCLSRLINS: 1372 rc = qede_add_cls_rule(edev, info); 1373 break; 1374 case ETHTOOL_SRXCLSRLDEL: 1375 rc = qede_delete_flow_filter(edev, info->fs.location); 1376 break; 1377 default: 1378 DP_INFO(edev, "Command parameters not supported\n"); 1379 rc = -EOPNOTSUPP; 1380 } 1381 1382 return rc; 1383 } 1384 1385 static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1386 { 1387 return QED_RSS_IND_TABLE_SIZE; 1388 } 1389 1390 static u32 qede_get_rxfh_key_size(struct net_device *dev) 1391 { 1392 struct qede_dev *edev = netdev_priv(dev); 1393 1394 return sizeof(edev->rss_key); 1395 } 1396 1397 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1398 { 1399 struct qede_dev *edev = netdev_priv(dev); 1400 int i; 1401 1402 if (hfunc) 1403 *hfunc = ETH_RSS_HASH_TOP; 1404 1405 if (!indir) 1406 return 0; 1407 1408 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1409 indir[i] = edev->rss_ind_table[i]; 1410 1411 if (key) 1412 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1413 1414 return 0; 1415 } 1416 1417 static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1418 const u8 *key, const u8 hfunc) 1419 { 1420 struct qed_update_vport_params *vport_update_params; 1421 struct qede_dev *edev = netdev_priv(dev); 1422 int i, rc = 0; 1423 1424 if (edev->dev_info.common.num_hwfns > 1) { 1425 DP_INFO(edev, 1426 "RSS configuration is not supported for 100G devices\n"); 1427 return -EOPNOTSUPP; 1428 } 1429 1430 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1431 return -EOPNOTSUPP; 1432 1433 if (!indir && !key) 1434 return 0; 1435 1436 if (indir) { 1437 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1438 edev->rss_ind_table[i] = indir[i]; 1439 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1440 } 1441 1442 if (key) { 1443 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1444 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1445 } 1446 1447 __qede_lock(edev); 1448 if (edev->state == QEDE_STATE_OPEN) { 1449 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1450 if (!vport_update_params) { 1451 __qede_unlock(edev); 1452 return -ENOMEM; 1453 } 1454 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1455 &vport_update_params->update_rss_flg); 1456 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1457 vfree(vport_update_params); 1458 } 1459 __qede_unlock(edev); 1460 1461 return rc; 1462 } 1463 1464 /* This function enables the interrupt generation and the NAPI on the device */ 1465 static void qede_netif_start(struct qede_dev *edev) 1466 { 1467 int i; 1468 1469 if (!netif_running(edev->ndev)) 1470 return; 1471 1472 for_each_queue(i) { 1473 /* Update and reenable interrupts */ 1474 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1475 napi_enable(&edev->fp_array[i].napi); 1476 } 1477 } 1478 1479 /* This function disables the NAPI and the interrupt generation on the device */ 1480 static void qede_netif_stop(struct qede_dev *edev) 1481 { 1482 int i; 1483 1484 for_each_queue(i) { 1485 napi_disable(&edev->fp_array[i].napi); 1486 /* Disable interrupts */ 1487 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1488 } 1489 } 1490 1491 static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1492 struct sk_buff *skb) 1493 { 1494 struct qede_tx_queue *txq = NULL; 1495 struct eth_tx_1st_bd *first_bd; 1496 dma_addr_t mapping; 1497 int i, idx; 1498 u16 val; 1499 1500 for_each_queue(i) { 1501 struct qede_fastpath *fp = &edev->fp_array[i]; 1502 1503 if (fp->type & QEDE_FASTPATH_TX) { 1504 txq = QEDE_FP_TC0_TXQ(fp); 1505 break; 1506 } 1507 } 1508 1509 if (!txq) { 1510 DP_NOTICE(edev, "Tx path is not available\n"); 1511 return -1; 1512 } 1513 1514 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1515 idx = txq->sw_tx_prod; 1516 txq->sw_tx_ring.skbs[idx].skb = skb; 1517 first_bd = qed_chain_produce(&txq->tx_pbl); 1518 memset(first_bd, 0, sizeof(*first_bd)); 1519 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1520 first_bd->data.bd_flags.bitfields = val; 1521 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1522 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1523 first_bd->data.bitfields |= cpu_to_le16(val); 1524 1525 /* Map skb linear data for DMA and set in the first BD */ 1526 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1527 skb_headlen(skb), DMA_TO_DEVICE); 1528 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1529 DP_NOTICE(edev, "SKB mapping failed\n"); 1530 return -ENOMEM; 1531 } 1532 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1533 1534 /* update the first BD with the actual num BDs */ 1535 first_bd->data.nbds = 1; 1536 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1537 /* 'next page' entries are counted in the producer value */ 1538 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1539 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1540 1541 /* wmb makes sure that the BDs data is updated before updating the 1542 * producer, otherwise FW may read old data from the BDs. 1543 */ 1544 wmb(); 1545 barrier(); 1546 writel(txq->tx_db.raw, txq->doorbell_addr); 1547 1548 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1549 if (qede_txq_has_work(txq)) 1550 break; 1551 usleep_range(100, 200); 1552 } 1553 1554 if (!qede_txq_has_work(txq)) { 1555 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1556 return -1; 1557 } 1558 1559 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1560 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1561 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1562 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1563 txq->sw_tx_ring.skbs[idx].skb = NULL; 1564 1565 return 0; 1566 } 1567 1568 static int qede_selftest_receive_traffic(struct qede_dev *edev) 1569 { 1570 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len; 1571 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1572 struct qede_rx_queue *rxq = NULL; 1573 struct sw_rx_data *sw_rx_data; 1574 union eth_rx_cqe *cqe; 1575 int i, iter, rc = 0; 1576 u8 *data_ptr; 1577 1578 for_each_queue(i) { 1579 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1580 rxq = edev->fp_array[i].rxq; 1581 break; 1582 } 1583 } 1584 1585 if (!rxq) { 1586 DP_NOTICE(edev, "Rx path is not available\n"); 1587 return -1; 1588 } 1589 1590 /* The packet is expected to receive on rx-queue 0 even though RSS is 1591 * enabled. This is because the queue 0 is configured as the default 1592 * queue and that the loopback traffic is not IP. 1593 */ 1594 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1595 if (!qede_has_rx_work(rxq)) { 1596 usleep_range(100, 200); 1597 continue; 1598 } 1599 1600 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1601 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1602 1603 /* Memory barrier to prevent the CPU from doing speculative 1604 * reads of CQE/BD before reading hw_comp_cons. If the CQE is 1605 * read before it is written by FW, then FW writes CQE and SB, 1606 * and then the CPU reads the hw_comp_cons, it will use an old 1607 * CQE. 1608 */ 1609 rmb(); 1610 1611 /* Get the CQE from the completion ring */ 1612 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1613 1614 /* Get the data from the SW ring */ 1615 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1616 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1617 fp_cqe = &cqe->fast_path_regular; 1618 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1619 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1620 fp_cqe->placement_offset + 1621 sw_rx_data->page_offset + 1622 rxq->rx_headroom); 1623 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1624 ether_addr_equal(data_ptr + ETH_ALEN, 1625 edev->ndev->dev_addr)) { 1626 for (i = ETH_HLEN; i < len; i++) 1627 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1628 rc = -1; 1629 break; 1630 } 1631 1632 qede_recycle_rx_bd_ring(rxq, 1); 1633 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1634 break; 1635 } 1636 1637 DP_INFO(edev, "Not the transmitted packet\n"); 1638 qede_recycle_rx_bd_ring(rxq, 1); 1639 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1640 } 1641 1642 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1643 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1644 return -1; 1645 } 1646 1647 qede_update_rx_prod(edev, rxq); 1648 1649 return rc; 1650 } 1651 1652 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1653 { 1654 struct qed_link_params link_params; 1655 struct sk_buff *skb = NULL; 1656 int rc = 0, i; 1657 u32 pkt_size; 1658 u8 *packet; 1659 1660 if (!netif_running(edev->ndev)) { 1661 DP_NOTICE(edev, "Interface is down\n"); 1662 return -EINVAL; 1663 } 1664 1665 qede_netif_stop(edev); 1666 1667 /* Bring up the link in Loopback mode */ 1668 memset(&link_params, 0, sizeof(link_params)); 1669 link_params.link_up = true; 1670 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1671 link_params.loopback_mode = loopback_mode; 1672 edev->ops->common->set_link(edev->cdev, &link_params); 1673 1674 /* Wait for loopback configuration to apply */ 1675 msleep_interruptible(500); 1676 1677 /* Setting max packet size to 1.5K to avoid data being split over 1678 * multiple BDs in cases where MTU > PAGE_SIZE. 1679 */ 1680 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ? 1681 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN); 1682 1683 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1684 if (!skb) { 1685 DP_INFO(edev, "Can't allocate skb\n"); 1686 rc = -ENOMEM; 1687 goto test_loopback_exit; 1688 } 1689 packet = skb_put(skb, pkt_size); 1690 ether_addr_copy(packet, edev->ndev->dev_addr); 1691 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1692 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1693 for (i = ETH_HLEN; i < pkt_size; i++) 1694 packet[i] = (unsigned char)(i & 0xff); 1695 1696 rc = qede_selftest_transmit_traffic(edev, skb); 1697 if (rc) 1698 goto test_loopback_exit; 1699 1700 rc = qede_selftest_receive_traffic(edev); 1701 if (rc) 1702 goto test_loopback_exit; 1703 1704 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1705 1706 test_loopback_exit: 1707 dev_kfree_skb(skb); 1708 1709 /* Bring up the link in Normal mode */ 1710 memset(&link_params, 0, sizeof(link_params)); 1711 link_params.link_up = true; 1712 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1713 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1714 edev->ops->common->set_link(edev->cdev, &link_params); 1715 1716 /* Wait for loopback configuration to apply */ 1717 msleep_interruptible(500); 1718 1719 qede_netif_start(edev); 1720 1721 return rc; 1722 } 1723 1724 static void qede_self_test(struct net_device *dev, 1725 struct ethtool_test *etest, u64 *buf) 1726 { 1727 struct qede_dev *edev = netdev_priv(dev); 1728 1729 DP_VERBOSE(edev, QED_MSG_DEBUG, 1730 "Self-test command parameters: offline = %d, external_lb = %d\n", 1731 (etest->flags & ETH_TEST_FL_OFFLINE), 1732 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1733 1734 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1735 1736 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1737 if (qede_selftest_run_loopback(edev, 1738 QED_LINK_LOOPBACK_INT_PHY)) { 1739 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1740 etest->flags |= ETH_TEST_FL_FAILED; 1741 } 1742 } 1743 1744 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1745 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1746 etest->flags |= ETH_TEST_FL_FAILED; 1747 } 1748 1749 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1750 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1751 etest->flags |= ETH_TEST_FL_FAILED; 1752 } 1753 1754 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1755 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1756 etest->flags |= ETH_TEST_FL_FAILED; 1757 } 1758 1759 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1760 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1761 etest->flags |= ETH_TEST_FL_FAILED; 1762 } 1763 1764 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1765 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1766 etest->flags |= ETH_TEST_FL_FAILED; 1767 } 1768 } 1769 1770 static int qede_set_tunable(struct net_device *dev, 1771 const struct ethtool_tunable *tuna, 1772 const void *data) 1773 { 1774 struct qede_dev *edev = netdev_priv(dev); 1775 u32 val; 1776 1777 switch (tuna->id) { 1778 case ETHTOOL_RX_COPYBREAK: 1779 val = *(u32 *)data; 1780 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1781 DP_VERBOSE(edev, QED_MSG_DEBUG, 1782 "Invalid rx copy break value, range is [%u, %u]", 1783 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1784 return -EINVAL; 1785 } 1786 1787 edev->rx_copybreak = *(u32 *)data; 1788 break; 1789 default: 1790 return -EOPNOTSUPP; 1791 } 1792 1793 return 0; 1794 } 1795 1796 static int qede_get_tunable(struct net_device *dev, 1797 const struct ethtool_tunable *tuna, void *data) 1798 { 1799 struct qede_dev *edev = netdev_priv(dev); 1800 1801 switch (tuna->id) { 1802 case ETHTOOL_RX_COPYBREAK: 1803 *(u32 *)data = edev->rx_copybreak; 1804 break; 1805 default: 1806 return -EOPNOTSUPP; 1807 } 1808 1809 return 0; 1810 } 1811 1812 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1813 { 1814 struct qede_dev *edev = netdev_priv(dev); 1815 struct qed_link_output current_link; 1816 1817 memset(¤t_link, 0, sizeof(current_link)); 1818 edev->ops->common->get_link(edev->cdev, ¤t_link); 1819 1820 if (!current_link.eee_supported) { 1821 DP_INFO(edev, "EEE is not supported\n"); 1822 return -EOPNOTSUPP; 1823 } 1824 1825 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1826 edata->advertised = ADVERTISED_1000baseT_Full; 1827 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1828 edata->advertised |= ADVERTISED_10000baseT_Full; 1829 if (current_link.sup_caps & QED_EEE_1G_ADV) 1830 edata->supported = ADVERTISED_1000baseT_Full; 1831 if (current_link.sup_caps & QED_EEE_10G_ADV) 1832 edata->supported |= ADVERTISED_10000baseT_Full; 1833 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1834 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1835 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1836 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1837 1838 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1839 edata->eee_enabled = current_link.eee.enable; 1840 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1841 edata->eee_active = current_link.eee_active; 1842 1843 return 0; 1844 } 1845 1846 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1847 { 1848 struct qede_dev *edev = netdev_priv(dev); 1849 struct qed_link_output current_link; 1850 struct qed_link_params params; 1851 1852 if (!edev->ops->common->can_link_change(edev->cdev)) { 1853 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1854 return -EOPNOTSUPP; 1855 } 1856 1857 memset(¤t_link, 0, sizeof(current_link)); 1858 edev->ops->common->get_link(edev->cdev, ¤t_link); 1859 1860 if (!current_link.eee_supported) { 1861 DP_INFO(edev, "EEE is not supported\n"); 1862 return -EOPNOTSUPP; 1863 } 1864 1865 memset(¶ms, 0, sizeof(params)); 1866 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1867 1868 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1869 ADVERTISED_10000baseT_Full)) || 1870 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1871 ADVERTISED_10000baseT_Full)) != 1872 edata->advertised)) { 1873 DP_VERBOSE(edev, QED_MSG_DEBUG, 1874 "Invalid advertised capabilities %d\n", 1875 edata->advertised); 1876 return -EINVAL; 1877 } 1878 1879 if (edata->advertised & ADVERTISED_1000baseT_Full) 1880 params.eee.adv_caps = QED_EEE_1G_ADV; 1881 if (edata->advertised & ADVERTISED_10000baseT_Full) 1882 params.eee.adv_caps |= QED_EEE_10G_ADV; 1883 params.eee.enable = edata->eee_enabled; 1884 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1885 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1886 1887 params.link_up = true; 1888 edev->ops->common->set_link(edev->cdev, ¶ms); 1889 1890 return 0; 1891 } 1892 1893 static int qede_get_module_info(struct net_device *dev, 1894 struct ethtool_modinfo *modinfo) 1895 { 1896 struct qede_dev *edev = netdev_priv(dev); 1897 u8 buf[4]; 1898 int rc; 1899 1900 /* Read first 4 bytes to find the sfp type */ 1901 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1902 QED_I2C_DEV_ADDR_A0, 0, 4); 1903 if (rc) { 1904 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc); 1905 return rc; 1906 } 1907 1908 switch (buf[0]) { 1909 case 0x3: /* SFP, SFP+, SFP-28 */ 1910 modinfo->type = ETH_MODULE_SFF_8472; 1911 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1912 break; 1913 case 0xc: /* QSFP */ 1914 case 0xd: /* QSFP+ */ 1915 modinfo->type = ETH_MODULE_SFF_8436; 1916 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1917 break; 1918 case 0x11: /* QSFP-28 */ 1919 modinfo->type = ETH_MODULE_SFF_8636; 1920 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1921 break; 1922 default: 1923 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]); 1924 return -EINVAL; 1925 } 1926 1927 return 0; 1928 } 1929 1930 static int qede_get_module_eeprom(struct net_device *dev, 1931 struct ethtool_eeprom *ee, u8 *data) 1932 { 1933 struct qede_dev *edev = netdev_priv(dev); 1934 u32 start_addr = ee->offset, size = 0; 1935 u8 *buf = data; 1936 int rc = 0; 1937 1938 /* Read A0 section */ 1939 if (ee->offset < ETH_MODULE_SFF_8079_LEN) { 1940 /* Limit transfer size to the A0 section boundary */ 1941 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN) 1942 size = ETH_MODULE_SFF_8079_LEN - ee->offset; 1943 else 1944 size = ee->len; 1945 1946 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1947 QED_I2C_DEV_ADDR_A0, 1948 start_addr, size); 1949 if (rc) { 1950 DP_ERR(edev, "Failed reading A0 section %d\n", rc); 1951 return rc; 1952 } 1953 1954 buf += size; 1955 start_addr += size; 1956 } 1957 1958 /* Read A2 section */ 1959 if (start_addr >= ETH_MODULE_SFF_8079_LEN && 1960 start_addr < ETH_MODULE_SFF_8472_LEN) { 1961 size = ee->len - size; 1962 /* Limit transfer size to the A2 section boundary */ 1963 if (start_addr + size > ETH_MODULE_SFF_8472_LEN) 1964 size = ETH_MODULE_SFF_8472_LEN - start_addr; 1965 start_addr -= ETH_MODULE_SFF_8079_LEN; 1966 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1967 QED_I2C_DEV_ADDR_A2, 1968 start_addr, size); 1969 if (rc) { 1970 DP_VERBOSE(edev, QED_MSG_DEBUG, 1971 "Failed reading A2 section %d\n", rc); 1972 return 0; 1973 } 1974 } 1975 1976 return rc; 1977 } 1978 1979 static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val) 1980 { 1981 struct qede_dev *edev = netdev_priv(dev); 1982 int rc = 0; 1983 1984 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) { 1985 if (val->flag > QEDE_DUMP_CMD_MAX) { 1986 DP_ERR(edev, "Invalid command %d\n", val->flag); 1987 return -EINVAL; 1988 } 1989 edev->dump_info.cmd = val->flag; 1990 edev->dump_info.num_args = 0; 1991 return 0; 1992 } 1993 1994 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) { 1995 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args); 1996 return -EINVAL; 1997 } 1998 1999 switch (edev->dump_info.cmd) { 2000 case QEDE_DUMP_CMD_NVM_CFG: 2001 edev->dump_info.args[edev->dump_info.num_args] = val->flag; 2002 edev->dump_info.num_args++; 2003 break; 2004 case QEDE_DUMP_CMD_GRCDUMP: 2005 rc = edev->ops->common->set_grc_config(edev->cdev, 2006 val->flag, 1); 2007 break; 2008 default: 2009 break; 2010 } 2011 2012 return rc; 2013 } 2014 2015 static int qede_get_dump_flag(struct net_device *dev, 2016 struct ethtool_dump *dump) 2017 { 2018 struct qede_dev *edev = netdev_priv(dev); 2019 2020 if (!edev->ops || !edev->ops->common) { 2021 DP_ERR(edev, "Edev ops not populated\n"); 2022 return -EINVAL; 2023 } 2024 2025 dump->version = QEDE_DUMP_VERSION; 2026 switch (edev->dump_info.cmd) { 2027 case QEDE_DUMP_CMD_NVM_CFG: 2028 dump->flag = QEDE_DUMP_CMD_NVM_CFG; 2029 dump->len = QEDE_DUMP_NVM_BUF_LEN; 2030 break; 2031 case QEDE_DUMP_CMD_GRCDUMP: 2032 dump->flag = QEDE_DUMP_CMD_GRCDUMP; 2033 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev); 2034 break; 2035 default: 2036 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd); 2037 return -EINVAL; 2038 } 2039 2040 DP_VERBOSE(edev, QED_MSG_DEBUG, 2041 "dump->version = 0x%x dump->flag = %d dump->len = %d\n", 2042 dump->version, dump->flag, dump->len); 2043 return 0; 2044 } 2045 2046 static int qede_get_dump_data(struct net_device *dev, 2047 struct ethtool_dump *dump, void *buf) 2048 { 2049 struct qede_dev *edev = netdev_priv(dev); 2050 int rc = 0; 2051 2052 if (!edev->ops || !edev->ops->common) { 2053 DP_ERR(edev, "Edev ops not populated\n"); 2054 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE; 2055 edev->dump_info.num_args = 0; 2056 return -EINVAL; 2057 } 2058 2059 switch (edev->dump_info.cmd) { 2060 case QEDE_DUMP_CMD_NVM_CFG: 2061 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) { 2062 DP_ERR(edev, "Arg count = %d required = %d\n", 2063 edev->dump_info.num_args, 2064 QEDE_DUMP_NVM_ARG_COUNT); 2065 return -EINVAL; 2066 } 2067 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf, 2068 edev->dump_info.args[0], 2069 edev->dump_info.args[1]); 2070 break; 2071 case QEDE_DUMP_CMD_GRCDUMP: 2072 memset(buf, 0, dump->len); 2073 rc = edev->ops->common->dbg_all_data(edev->cdev, buf); 2074 break; 2075 default: 2076 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd); 2077 rc = -EINVAL; 2078 break; 2079 } 2080 2081 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE; 2082 edev->dump_info.num_args = 0; 2083 2084 return rc; 2085 } 2086 2087 static const struct ethtool_ops qede_ethtool_ops = { 2088 .get_link_ksettings = qede_get_link_ksettings, 2089 .set_link_ksettings = qede_set_link_ksettings, 2090 .get_drvinfo = qede_get_drvinfo, 2091 .get_regs_len = qede_get_regs_len, 2092 .get_regs = qede_get_regs, 2093 .get_wol = qede_get_wol, 2094 .set_wol = qede_set_wol, 2095 .get_msglevel = qede_get_msglevel, 2096 .set_msglevel = qede_set_msglevel, 2097 .nway_reset = qede_nway_reset, 2098 .get_link = qede_get_link, 2099 .get_coalesce = qede_get_coalesce, 2100 .set_coalesce = qede_set_coalesce, 2101 .get_ringparam = qede_get_ringparam, 2102 .set_ringparam = qede_set_ringparam, 2103 .get_pauseparam = qede_get_pauseparam, 2104 .set_pauseparam = qede_set_pauseparam, 2105 .get_strings = qede_get_strings, 2106 .set_phys_id = qede_set_phys_id, 2107 .get_ethtool_stats = qede_get_ethtool_stats, 2108 .get_priv_flags = qede_get_priv_flags, 2109 .get_sset_count = qede_get_sset_count, 2110 .get_rxnfc = qede_get_rxnfc, 2111 .set_rxnfc = qede_set_rxnfc, 2112 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2113 .get_rxfh_key_size = qede_get_rxfh_key_size, 2114 .get_rxfh = qede_get_rxfh, 2115 .set_rxfh = qede_set_rxfh, 2116 .get_ts_info = qede_get_ts_info, 2117 .get_channels = qede_get_channels, 2118 .set_channels = qede_set_channels, 2119 .self_test = qede_self_test, 2120 .get_module_info = qede_get_module_info, 2121 .get_module_eeprom = qede_get_module_eeprom, 2122 .get_eee = qede_get_eee, 2123 .set_eee = qede_set_eee, 2124 2125 .get_tunable = qede_get_tunable, 2126 .set_tunable = qede_set_tunable, 2127 .flash_device = qede_flash_device, 2128 .get_dump_flag = qede_get_dump_flag, 2129 .get_dump_data = qede_get_dump_data, 2130 .set_dump = qede_set_dump, 2131 }; 2132 2133 static const struct ethtool_ops qede_vf_ethtool_ops = { 2134 .get_link_ksettings = qede_get_link_ksettings, 2135 .get_drvinfo = qede_get_drvinfo, 2136 .get_msglevel = qede_get_msglevel, 2137 .set_msglevel = qede_set_msglevel, 2138 .get_link = qede_get_link, 2139 .get_coalesce = qede_get_coalesce, 2140 .set_coalesce = qede_set_coalesce, 2141 .get_ringparam = qede_get_ringparam, 2142 .set_ringparam = qede_set_ringparam, 2143 .get_strings = qede_get_strings, 2144 .get_ethtool_stats = qede_get_ethtool_stats, 2145 .get_priv_flags = qede_get_priv_flags, 2146 .get_sset_count = qede_get_sset_count, 2147 .get_rxnfc = qede_get_rxnfc, 2148 .set_rxnfc = qede_set_rxnfc, 2149 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2150 .get_rxfh_key_size = qede_get_rxfh_key_size, 2151 .get_rxfh = qede_get_rxfh, 2152 .set_rxfh = qede_set_rxfh, 2153 .get_channels = qede_get_channels, 2154 .set_channels = qede_set_channels, 2155 .get_tunable = qede_get_tunable, 2156 .set_tunable = qede_set_tunable, 2157 }; 2158 2159 void qede_set_ethtool_ops(struct net_device *dev) 2160 { 2161 struct qede_dev *edev = netdev_priv(dev); 2162 2163 if (IS_VF(edev)) 2164 dev->ethtool_ops = &qede_vf_ethtool_ops; 2165 else 2166 dev->ethtool_ops = &qede_ethtool_ops; 2167 } 2168