1 /* QLogic qede NIC Driver
2  * Copyright (c) 2015-2017  QLogic Corporation
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and /or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 #include <linux/version.h>
33 #include <linux/types.h>
34 #include <linux/netdevice.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/string.h>
38 #include <linux/pci.h>
39 #include <linux/capability.h>
40 #include <linux/vmalloc.h>
41 #include "qede.h"
42 #include "qede_ptp.h"
43 
44 #define QEDE_RQSTAT_OFFSET(stat_name) \
45 	 (offsetof(struct qede_rx_queue, stat_name))
46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
47 #define QEDE_RQSTAT(stat_name) \
48 	 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
49 
50 #define QEDE_SELFTEST_POLL_COUNT 100
51 
52 static const struct {
53 	u64 offset;
54 	char string[ETH_GSTRING_LEN];
55 } qede_rqstats_arr[] = {
56 	QEDE_RQSTAT(rcv_pkts),
57 	QEDE_RQSTAT(rx_hw_errors),
58 	QEDE_RQSTAT(rx_alloc_errors),
59 	QEDE_RQSTAT(rx_ip_frags),
60 	QEDE_RQSTAT(xdp_no_pass),
61 };
62 
63 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
64 #define QEDE_TQSTAT_OFFSET(stat_name) \
65 	(offsetof(struct qede_tx_queue, stat_name))
66 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
67 #define QEDE_TQSTAT(stat_name) \
68 	{QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
69 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
70 static const struct {
71 	u64 offset;
72 	char string[ETH_GSTRING_LEN];
73 } qede_tqstats_arr[] = {
74 	QEDE_TQSTAT(xmit_pkts),
75 	QEDE_TQSTAT(stopped_cnt),
76 };
77 
78 #define QEDE_STAT_OFFSET(stat_name, type, base) \
79 	(offsetof(type, stat_name) + (base))
80 #define QEDE_STAT_STRING(stat_name)	(#stat_name)
81 #define _QEDE_STAT(stat_name, type, base, attr) \
82 	{QEDE_STAT_OFFSET(stat_name, type, base), \
83 	 QEDE_STAT_STRING(stat_name), \
84 	 attr}
85 #define QEDE_STAT(stat_name) \
86 	_QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
87 #define QEDE_PF_STAT(stat_name) \
88 	_QEDE_STAT(stat_name, struct qede_stats_common, 0, \
89 		   BIT(QEDE_STAT_PF_ONLY))
90 #define QEDE_PF_BB_STAT(stat_name) \
91 	_QEDE_STAT(stat_name, struct qede_stats_bb, \
92 		   offsetof(struct qede_stats, bb), \
93 		   BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
94 #define QEDE_PF_AH_STAT(stat_name) \
95 	_QEDE_STAT(stat_name, struct qede_stats_ah, \
96 		   offsetof(struct qede_stats, ah), \
97 		   BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
98 static const struct {
99 	u64 offset;
100 	char string[ETH_GSTRING_LEN];
101 	unsigned long attr;
102 #define QEDE_STAT_PF_ONLY	0
103 #define QEDE_STAT_BB_ONLY	1
104 #define QEDE_STAT_AH_ONLY	2
105 } qede_stats_arr[] = {
106 	QEDE_STAT(rx_ucast_bytes),
107 	QEDE_STAT(rx_mcast_bytes),
108 	QEDE_STAT(rx_bcast_bytes),
109 	QEDE_STAT(rx_ucast_pkts),
110 	QEDE_STAT(rx_mcast_pkts),
111 	QEDE_STAT(rx_bcast_pkts),
112 
113 	QEDE_STAT(tx_ucast_bytes),
114 	QEDE_STAT(tx_mcast_bytes),
115 	QEDE_STAT(tx_bcast_bytes),
116 	QEDE_STAT(tx_ucast_pkts),
117 	QEDE_STAT(tx_mcast_pkts),
118 	QEDE_STAT(tx_bcast_pkts),
119 
120 	QEDE_PF_STAT(rx_64_byte_packets),
121 	QEDE_PF_STAT(rx_65_to_127_byte_packets),
122 	QEDE_PF_STAT(rx_128_to_255_byte_packets),
123 	QEDE_PF_STAT(rx_256_to_511_byte_packets),
124 	QEDE_PF_STAT(rx_512_to_1023_byte_packets),
125 	QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
126 	QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
127 	QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
128 	QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
129 	QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
130 	QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
131 	QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
132 	QEDE_PF_STAT(tx_64_byte_packets),
133 	QEDE_PF_STAT(tx_65_to_127_byte_packets),
134 	QEDE_PF_STAT(tx_128_to_255_byte_packets),
135 	QEDE_PF_STAT(tx_256_to_511_byte_packets),
136 	QEDE_PF_STAT(tx_512_to_1023_byte_packets),
137 	QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
138 	QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
139 	QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
140 	QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
141 	QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
142 	QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
143 	QEDE_PF_STAT(rx_mac_crtl_frames),
144 	QEDE_PF_STAT(tx_mac_ctrl_frames),
145 	QEDE_PF_STAT(rx_pause_frames),
146 	QEDE_PF_STAT(tx_pause_frames),
147 	QEDE_PF_STAT(rx_pfc_frames),
148 	QEDE_PF_STAT(tx_pfc_frames),
149 
150 	QEDE_PF_STAT(rx_crc_errors),
151 	QEDE_PF_STAT(rx_align_errors),
152 	QEDE_PF_STAT(rx_carrier_errors),
153 	QEDE_PF_STAT(rx_oversize_packets),
154 	QEDE_PF_STAT(rx_jabbers),
155 	QEDE_PF_STAT(rx_undersize_packets),
156 	QEDE_PF_STAT(rx_fragments),
157 	QEDE_PF_BB_STAT(tx_lpi_entry_count),
158 	QEDE_PF_BB_STAT(tx_total_collisions),
159 	QEDE_PF_STAT(brb_truncates),
160 	QEDE_PF_STAT(brb_discards),
161 	QEDE_STAT(no_buff_discards),
162 	QEDE_PF_STAT(mftag_filter_discards),
163 	QEDE_PF_STAT(mac_filter_discards),
164 	QEDE_PF_STAT(gft_filter_drop),
165 	QEDE_STAT(tx_err_drop_pkts),
166 	QEDE_STAT(ttl0_discard),
167 	QEDE_STAT(packet_too_big_discard),
168 
169 	QEDE_STAT(coalesced_pkts),
170 	QEDE_STAT(coalesced_events),
171 	QEDE_STAT(coalesced_aborts_num),
172 	QEDE_STAT(non_coalesced_pkts),
173 	QEDE_STAT(coalesced_bytes),
174 };
175 
176 #define QEDE_NUM_STATS	ARRAY_SIZE(qede_stats_arr)
177 #define QEDE_STAT_IS_PF_ONLY(i) \
178 	test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
179 #define QEDE_STAT_IS_BB_ONLY(i) \
180 	test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
181 #define QEDE_STAT_IS_AH_ONLY(i) \
182 	test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
183 
184 enum {
185 	QEDE_PRI_FLAG_CMT,
186 	QEDE_PRI_FLAG_LEN,
187 };
188 
189 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
190 	"Coupled-Function",
191 };
192 
193 enum qede_ethtool_tests {
194 	QEDE_ETHTOOL_INT_LOOPBACK,
195 	QEDE_ETHTOOL_INTERRUPT_TEST,
196 	QEDE_ETHTOOL_MEMORY_TEST,
197 	QEDE_ETHTOOL_REGISTER_TEST,
198 	QEDE_ETHTOOL_CLOCK_TEST,
199 	QEDE_ETHTOOL_NVRAM_TEST,
200 	QEDE_ETHTOOL_TEST_MAX
201 };
202 
203 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
204 	"Internal loopback (offline)",
205 	"Interrupt (online)\t",
206 	"Memory (online)\t\t",
207 	"Register (online)\t",
208 	"Clock (online)\t\t",
209 	"Nvram (online)\t\t",
210 };
211 
212 static void qede_get_strings_stats_txq(struct qede_dev *edev,
213 				       struct qede_tx_queue *txq, u8 **buf)
214 {
215 	int i;
216 
217 	for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
218 		if (txq->is_xdp)
219 			sprintf(*buf, "%d [XDP]: %s",
220 				QEDE_TXQ_XDP_TO_IDX(edev, txq),
221 				qede_tqstats_arr[i].string);
222 		else
223 			sprintf(*buf, "%d: %s", txq->index,
224 				qede_tqstats_arr[i].string);
225 		*buf += ETH_GSTRING_LEN;
226 	}
227 }
228 
229 static void qede_get_strings_stats_rxq(struct qede_dev *edev,
230 				       struct qede_rx_queue *rxq, u8 **buf)
231 {
232 	int i;
233 
234 	for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
235 		sprintf(*buf, "%d: %s", rxq->rxq_id,
236 			qede_rqstats_arr[i].string);
237 		*buf += ETH_GSTRING_LEN;
238 	}
239 }
240 
241 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
242 {
243 	return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
244 	       (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
245 	       (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
246 }
247 
248 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
249 {
250 	struct qede_fastpath *fp;
251 	int i;
252 
253 	/* Account for queue statistics */
254 	for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
255 		fp = &edev->fp_array[i];
256 
257 		if (fp->type & QEDE_FASTPATH_RX)
258 			qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
259 
260 		if (fp->type & QEDE_FASTPATH_XDP)
261 			qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
262 
263 		if (fp->type & QEDE_FASTPATH_TX)
264 			qede_get_strings_stats_txq(edev, fp->txq, &buf);
265 	}
266 
267 	/* Account for non-queue statistics */
268 	for (i = 0; i < QEDE_NUM_STATS; i++) {
269 		if (qede_is_irrelevant_stat(edev, i))
270 			continue;
271 		strcpy(buf, qede_stats_arr[i].string);
272 		buf += ETH_GSTRING_LEN;
273 	}
274 }
275 
276 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
277 {
278 	struct qede_dev *edev = netdev_priv(dev);
279 
280 	switch (stringset) {
281 	case ETH_SS_STATS:
282 		qede_get_strings_stats(edev, buf);
283 		break;
284 	case ETH_SS_PRIV_FLAGS:
285 		memcpy(buf, qede_private_arr,
286 		       ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
287 		break;
288 	case ETH_SS_TEST:
289 		memcpy(buf, qede_tests_str_arr,
290 		       ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
291 		break;
292 	default:
293 		DP_VERBOSE(edev, QED_MSG_DEBUG,
294 			   "Unsupported stringset 0x%08x\n", stringset);
295 	}
296 }
297 
298 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
299 {
300 	int i;
301 
302 	for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
303 		**buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
304 		(*buf)++;
305 	}
306 }
307 
308 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
309 {
310 	int i;
311 
312 	for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
313 		**buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
314 		(*buf)++;
315 	}
316 }
317 
318 static void qede_get_ethtool_stats(struct net_device *dev,
319 				   struct ethtool_stats *stats, u64 *buf)
320 {
321 	struct qede_dev *edev = netdev_priv(dev);
322 	struct qede_fastpath *fp;
323 	int i;
324 
325 	qede_fill_by_demand_stats(edev);
326 
327 	/* Need to protect the access to the fastpath array */
328 	__qede_lock(edev);
329 
330 	for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
331 		fp = &edev->fp_array[i];
332 
333 		if (fp->type & QEDE_FASTPATH_RX)
334 			qede_get_ethtool_stats_rxq(fp->rxq, &buf);
335 
336 		if (fp->type & QEDE_FASTPATH_XDP)
337 			qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
338 
339 		if (fp->type & QEDE_FASTPATH_TX)
340 			qede_get_ethtool_stats_txq(fp->txq, &buf);
341 	}
342 
343 	for (i = 0; i < QEDE_NUM_STATS; i++) {
344 		if (qede_is_irrelevant_stat(edev, i))
345 			continue;
346 		*buf = *((u64 *)(((void *)&edev->stats) +
347 				 qede_stats_arr[i].offset));
348 
349 		buf++;
350 	}
351 
352 	__qede_unlock(edev);
353 }
354 
355 static int qede_get_sset_count(struct net_device *dev, int stringset)
356 {
357 	struct qede_dev *edev = netdev_priv(dev);
358 	int num_stats = QEDE_NUM_STATS, i;
359 
360 	switch (stringset) {
361 	case ETH_SS_STATS:
362 		for (i = 0; i < QEDE_NUM_STATS; i++)
363 			if (qede_is_irrelevant_stat(edev, i))
364 				num_stats--;
365 
366 		/* Account for the Regular Tx statistics */
367 		num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS;
368 
369 		/* Account for the Regular Rx statistics */
370 		num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
371 
372 		/* Account for XDP statistics [if needed] */
373 		if (edev->xdp_prog)
374 			num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
375 		return num_stats;
376 
377 	case ETH_SS_PRIV_FLAGS:
378 		return QEDE_PRI_FLAG_LEN;
379 	case ETH_SS_TEST:
380 		if (!IS_VF(edev))
381 			return QEDE_ETHTOOL_TEST_MAX;
382 		else
383 			return 0;
384 	default:
385 		DP_VERBOSE(edev, QED_MSG_DEBUG,
386 			   "Unsupported stringset 0x%08x\n", stringset);
387 		return -EINVAL;
388 	}
389 }
390 
391 static u32 qede_get_priv_flags(struct net_device *dev)
392 {
393 	struct qede_dev *edev = netdev_priv(dev);
394 
395 	return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
396 }
397 
398 struct qede_link_mode_mapping {
399 	u32 qed_link_mode;
400 	u32 ethtool_link_mode;
401 };
402 
403 static const struct qede_link_mode_mapping qed_lm_map[] = {
404 	{QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
405 	{QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
406 	{QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
407 	{QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
408 	{QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
409 	{QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
410 	{QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
411 	{QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
412 	{QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
413 	{QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
414 	{QED_LM_100000baseKR4_Full_BIT,
415 	 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
416 };
417 
418 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name)	\
419 {								\
420 	int i;							\
421 								\
422 	for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) {		\
423 		if ((caps) & (qed_lm_map[i].qed_link_mode))	\
424 			__set_bit(qed_lm_map[i].ethtool_link_mode,\
425 				  lk_ksettings->link_modes.name); \
426 	}							\
427 }
428 
429 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name)	\
430 {								\
431 	int i;							\
432 								\
433 	for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) {		\
434 		if (test_bit(qed_lm_map[i].ethtool_link_mode,	\
435 			     lk_ksettings->link_modes.name))	\
436 			caps |= qed_lm_map[i].qed_link_mode;	\
437 	}							\
438 }
439 
440 static int qede_get_link_ksettings(struct net_device *dev,
441 				   struct ethtool_link_ksettings *cmd)
442 {
443 	struct ethtool_link_settings *base = &cmd->base;
444 	struct qede_dev *edev = netdev_priv(dev);
445 	struct qed_link_output current_link;
446 
447 	__qede_lock(edev);
448 
449 	memset(&current_link, 0, sizeof(current_link));
450 	edev->ops->common->get_link(edev->cdev, &current_link);
451 
452 	ethtool_link_ksettings_zero_link_mode(cmd, supported);
453 	QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
454 
455 	ethtool_link_ksettings_zero_link_mode(cmd, advertising);
456 	QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
457 
458 	ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
459 	QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
460 
461 	if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
462 		base->speed = current_link.speed;
463 		base->duplex = current_link.duplex;
464 	} else {
465 		base->speed = SPEED_UNKNOWN;
466 		base->duplex = DUPLEX_UNKNOWN;
467 	}
468 
469 	__qede_unlock(edev);
470 
471 	base->port = current_link.port;
472 	base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
473 			AUTONEG_DISABLE;
474 
475 	return 0;
476 }
477 
478 static int qede_set_link_ksettings(struct net_device *dev,
479 				   const struct ethtool_link_ksettings *cmd)
480 {
481 	const struct ethtool_link_settings *base = &cmd->base;
482 	struct qede_dev *edev = netdev_priv(dev);
483 	struct qed_link_output current_link;
484 	struct qed_link_params params;
485 
486 	if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
487 		DP_INFO(edev, "Link settings are not allowed to be changed\n");
488 		return -EOPNOTSUPP;
489 	}
490 	memset(&current_link, 0, sizeof(current_link));
491 	memset(&params, 0, sizeof(params));
492 	edev->ops->common->get_link(edev->cdev, &current_link);
493 
494 	params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
495 	params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
496 	if (base->autoneg == AUTONEG_ENABLE) {
497 		if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
498 			DP_INFO(edev, "Auto negotiation is not supported\n");
499 			return -EOPNOTSUPP;
500 		}
501 
502 		params.autoneg = true;
503 		params.forced_speed = 0;
504 		QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
505 	} else {		/* forced speed */
506 		params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
507 		params.autoneg = false;
508 		params.forced_speed = base->speed;
509 		switch (base->speed) {
510 		case SPEED_1000:
511 			if (!(current_link.supported_caps &
512 			      QED_LM_1000baseT_Full_BIT)) {
513 				DP_INFO(edev, "1G speed not supported\n");
514 				return -EINVAL;
515 			}
516 			params.adv_speeds = QED_LM_1000baseT_Full_BIT;
517 			break;
518 		case SPEED_10000:
519 			if (!(current_link.supported_caps &
520 			      QED_LM_10000baseKR_Full_BIT)) {
521 				DP_INFO(edev, "10G speed not supported\n");
522 				return -EINVAL;
523 			}
524 			params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
525 			break;
526 		case SPEED_25000:
527 			if (!(current_link.supported_caps &
528 			      QED_LM_25000baseKR_Full_BIT)) {
529 				DP_INFO(edev, "25G speed not supported\n");
530 				return -EINVAL;
531 			}
532 			params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
533 			break;
534 		case SPEED_40000:
535 			if (!(current_link.supported_caps &
536 			      QED_LM_40000baseLR4_Full_BIT)) {
537 				DP_INFO(edev, "40G speed not supported\n");
538 				return -EINVAL;
539 			}
540 			params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
541 			break;
542 		case SPEED_50000:
543 			if (!(current_link.supported_caps &
544 			      QED_LM_50000baseKR2_Full_BIT)) {
545 				DP_INFO(edev, "50G speed not supported\n");
546 				return -EINVAL;
547 			}
548 			params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
549 			break;
550 		case SPEED_100000:
551 			if (!(current_link.supported_caps &
552 			      QED_LM_100000baseKR4_Full_BIT)) {
553 				DP_INFO(edev, "100G speed not supported\n");
554 				return -EINVAL;
555 			}
556 			params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
557 			break;
558 		default:
559 			DP_INFO(edev, "Unsupported speed %u\n", base->speed);
560 			return -EINVAL;
561 		}
562 	}
563 
564 	params.link_up = true;
565 	edev->ops->common->set_link(edev->cdev, &params);
566 
567 	return 0;
568 }
569 
570 static void qede_get_drvinfo(struct net_device *ndev,
571 			     struct ethtool_drvinfo *info)
572 {
573 	char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
574 	struct qede_dev *edev = netdev_priv(ndev);
575 
576 	strlcpy(info->driver, "qede", sizeof(info->driver));
577 	strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
578 
579 	snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
580 		 edev->dev_info.common.fw_major,
581 		 edev->dev_info.common.fw_minor,
582 		 edev->dev_info.common.fw_rev,
583 		 edev->dev_info.common.fw_eng);
584 
585 	snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
586 		 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
587 		 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
588 		 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
589 		 edev->dev_info.common.mfw_rev & 0xFF);
590 
591 	if ((strlen(storm) + strlen(mfw) + strlen("mfw storm  ")) <
592 	    sizeof(info->fw_version)) {
593 		snprintf(info->fw_version, sizeof(info->fw_version),
594 			 "mfw %s storm %s", mfw, storm);
595 	} else {
596 		snprintf(info->fw_version, sizeof(info->fw_version),
597 			 "%s %s", mfw, storm);
598 	}
599 
600 	strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
601 }
602 
603 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
604 {
605 	struct qede_dev *edev = netdev_priv(ndev);
606 
607 	if (edev->dev_info.common.wol_support) {
608 		wol->supported = WAKE_MAGIC;
609 		wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
610 	}
611 }
612 
613 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
614 {
615 	struct qede_dev *edev = netdev_priv(ndev);
616 	bool wol_requested;
617 	int rc;
618 
619 	if (wol->wolopts & ~WAKE_MAGIC) {
620 		DP_INFO(edev,
621 			"Can't support WoL options other than magic-packet\n");
622 		return -EINVAL;
623 	}
624 
625 	wol_requested = !!(wol->wolopts & WAKE_MAGIC);
626 	if (wol_requested == edev->wol_enabled)
627 		return 0;
628 
629 	/* Need to actually change configuration */
630 	if (!edev->dev_info.common.wol_support) {
631 		DP_INFO(edev, "Device doesn't support WoL\n");
632 		return -EINVAL;
633 	}
634 
635 	rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
636 	if (!rc)
637 		edev->wol_enabled = wol_requested;
638 
639 	return rc;
640 }
641 
642 static u32 qede_get_msglevel(struct net_device *ndev)
643 {
644 	struct qede_dev *edev = netdev_priv(ndev);
645 
646 	return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
647 }
648 
649 static void qede_set_msglevel(struct net_device *ndev, u32 level)
650 {
651 	struct qede_dev *edev = netdev_priv(ndev);
652 	u32 dp_module = 0;
653 	u8 dp_level = 0;
654 
655 	qede_config_debug(level, &dp_module, &dp_level);
656 
657 	edev->dp_level = dp_level;
658 	edev->dp_module = dp_module;
659 	edev->ops->common->update_msglvl(edev->cdev,
660 					 dp_module, dp_level);
661 }
662 
663 static int qede_nway_reset(struct net_device *dev)
664 {
665 	struct qede_dev *edev = netdev_priv(dev);
666 	struct qed_link_output current_link;
667 	struct qed_link_params link_params;
668 
669 	if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
670 		DP_INFO(edev, "Link settings are not allowed to be changed\n");
671 		return -EOPNOTSUPP;
672 	}
673 
674 	if (!netif_running(dev))
675 		return 0;
676 
677 	memset(&current_link, 0, sizeof(current_link));
678 	edev->ops->common->get_link(edev->cdev, &current_link);
679 	if (!current_link.link_up)
680 		return 0;
681 
682 	/* Toggle the link */
683 	memset(&link_params, 0, sizeof(link_params));
684 	link_params.link_up = false;
685 	edev->ops->common->set_link(edev->cdev, &link_params);
686 	link_params.link_up = true;
687 	edev->ops->common->set_link(edev->cdev, &link_params);
688 
689 	return 0;
690 }
691 
692 static u32 qede_get_link(struct net_device *dev)
693 {
694 	struct qede_dev *edev = netdev_priv(dev);
695 	struct qed_link_output current_link;
696 
697 	memset(&current_link, 0, sizeof(current_link));
698 	edev->ops->common->get_link(edev->cdev, &current_link);
699 
700 	return current_link.link_up;
701 }
702 
703 static int qede_flash_device(struct net_device *dev,
704 			     struct ethtool_flash *flash)
705 {
706 	struct qede_dev *edev = netdev_priv(dev);
707 
708 	return edev->ops->common->nvm_flash(edev->cdev, flash->data);
709 }
710 
711 static int qede_get_coalesce(struct net_device *dev,
712 			     struct ethtool_coalesce *coal)
713 {
714 	void *rx_handle = NULL, *tx_handle = NULL;
715 	struct qede_dev *edev = netdev_priv(dev);
716 	u16 rx_coal, tx_coal, i, rc = 0;
717 	struct qede_fastpath *fp;
718 
719 	rx_coal = QED_DEFAULT_RX_USECS;
720 	tx_coal = QED_DEFAULT_TX_USECS;
721 
722 	memset(coal, 0, sizeof(struct ethtool_coalesce));
723 
724 	__qede_lock(edev);
725 	if (edev->state == QEDE_STATE_OPEN) {
726 		for_each_queue(i) {
727 			fp = &edev->fp_array[i];
728 
729 			if (fp->type & QEDE_FASTPATH_RX) {
730 				rx_handle = fp->rxq->handle;
731 				break;
732 			}
733 		}
734 
735 		rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
736 		if (rc) {
737 			DP_INFO(edev, "Read Rx coalesce error\n");
738 			goto out;
739 		}
740 
741 		for_each_queue(i) {
742 			fp = &edev->fp_array[i];
743 			if (fp->type & QEDE_FASTPATH_TX) {
744 				tx_handle = fp->txq->handle;
745 				break;
746 			}
747 		}
748 
749 		rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
750 		if (rc)
751 			DP_INFO(edev, "Read Tx coalesce error\n");
752 	}
753 
754 out:
755 	__qede_unlock(edev);
756 
757 	coal->rx_coalesce_usecs = rx_coal;
758 	coal->tx_coalesce_usecs = tx_coal;
759 
760 	return rc;
761 }
762 
763 static int qede_set_coalesce(struct net_device *dev,
764 			     struct ethtool_coalesce *coal)
765 {
766 	struct qede_dev *edev = netdev_priv(dev);
767 	struct qede_fastpath *fp;
768 	int i, rc = 0;
769 	u16 rxc, txc;
770 
771 	if (!netif_running(dev)) {
772 		DP_INFO(edev, "Interface is down\n");
773 		return -EINVAL;
774 	}
775 
776 	if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
777 	    coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
778 		DP_INFO(edev,
779 			"Can't support requested %s coalesce value [max supported value %d]\n",
780 			coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
781 			"tx", QED_COALESCE_MAX);
782 		return -EINVAL;
783 	}
784 
785 	rxc = (u16)coal->rx_coalesce_usecs;
786 	txc = (u16)coal->tx_coalesce_usecs;
787 	for_each_queue(i) {
788 		fp = &edev->fp_array[i];
789 
790 		if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
791 			rc = edev->ops->common->set_coalesce(edev->cdev,
792 							     rxc, 0,
793 							     fp->rxq->handle);
794 			if (rc) {
795 				DP_INFO(edev,
796 					"Set RX coalesce error, rc = %d\n", rc);
797 				return rc;
798 			}
799 		}
800 
801 		if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
802 			rc = edev->ops->common->set_coalesce(edev->cdev,
803 							     0, txc,
804 							     fp->txq->handle);
805 			if (rc) {
806 				DP_INFO(edev,
807 					"Set TX coalesce error, rc = %d\n", rc);
808 				return rc;
809 			}
810 		}
811 	}
812 
813 	return rc;
814 }
815 
816 static void qede_get_ringparam(struct net_device *dev,
817 			       struct ethtool_ringparam *ering)
818 {
819 	struct qede_dev *edev = netdev_priv(dev);
820 
821 	ering->rx_max_pending = NUM_RX_BDS_MAX;
822 	ering->rx_pending = edev->q_num_rx_buffers;
823 	ering->tx_max_pending = NUM_TX_BDS_MAX;
824 	ering->tx_pending = edev->q_num_tx_buffers;
825 }
826 
827 static int qede_set_ringparam(struct net_device *dev,
828 			      struct ethtool_ringparam *ering)
829 {
830 	struct qede_dev *edev = netdev_priv(dev);
831 
832 	DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
833 		   "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
834 		   ering->rx_pending, ering->tx_pending);
835 
836 	/* Validate legality of configuration */
837 	if (ering->rx_pending > NUM_RX_BDS_MAX ||
838 	    ering->rx_pending < NUM_RX_BDS_MIN ||
839 	    ering->tx_pending > NUM_TX_BDS_MAX ||
840 	    ering->tx_pending < NUM_TX_BDS_MIN) {
841 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
842 			   "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
843 			   NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
844 			   NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
845 		return -EINVAL;
846 	}
847 
848 	/* Change ring size and re-load */
849 	edev->q_num_rx_buffers = ering->rx_pending;
850 	edev->q_num_tx_buffers = ering->tx_pending;
851 
852 	qede_reload(edev, NULL, false);
853 
854 	return 0;
855 }
856 
857 static void qede_get_pauseparam(struct net_device *dev,
858 				struct ethtool_pauseparam *epause)
859 {
860 	struct qede_dev *edev = netdev_priv(dev);
861 	struct qed_link_output current_link;
862 
863 	memset(&current_link, 0, sizeof(current_link));
864 	edev->ops->common->get_link(edev->cdev, &current_link);
865 
866 	if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
867 		epause->autoneg = true;
868 	if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
869 		epause->rx_pause = true;
870 	if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
871 		epause->tx_pause = true;
872 
873 	DP_VERBOSE(edev, QED_MSG_DEBUG,
874 		   "ethtool_pauseparam: cmd %d  autoneg %d  rx_pause %d  tx_pause %d\n",
875 		   epause->cmd, epause->autoneg, epause->rx_pause,
876 		   epause->tx_pause);
877 }
878 
879 static int qede_set_pauseparam(struct net_device *dev,
880 			       struct ethtool_pauseparam *epause)
881 {
882 	struct qede_dev *edev = netdev_priv(dev);
883 	struct qed_link_params params;
884 	struct qed_link_output current_link;
885 
886 	if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
887 		DP_INFO(edev,
888 			"Pause settings are not allowed to be changed\n");
889 		return -EOPNOTSUPP;
890 	}
891 
892 	memset(&current_link, 0, sizeof(current_link));
893 	edev->ops->common->get_link(edev->cdev, &current_link);
894 
895 	memset(&params, 0, sizeof(params));
896 	params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
897 	if (epause->autoneg) {
898 		if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
899 			DP_INFO(edev, "autoneg not supported\n");
900 			return -EINVAL;
901 		}
902 		params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
903 	}
904 	if (epause->rx_pause)
905 		params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
906 	if (epause->tx_pause)
907 		params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
908 
909 	params.link_up = true;
910 	edev->ops->common->set_link(edev->cdev, &params);
911 
912 	return 0;
913 }
914 
915 static void qede_get_regs(struct net_device *ndev,
916 			  struct ethtool_regs *regs, void *buffer)
917 {
918 	struct qede_dev *edev = netdev_priv(ndev);
919 
920 	regs->version = 0;
921 	memset(buffer, 0, regs->len);
922 
923 	if (edev->ops && edev->ops->common)
924 		edev->ops->common->dbg_all_data(edev->cdev, buffer);
925 }
926 
927 static int qede_get_regs_len(struct net_device *ndev)
928 {
929 	struct qede_dev *edev = netdev_priv(ndev);
930 
931 	if (edev->ops && edev->ops->common)
932 		return edev->ops->common->dbg_all_data_size(edev->cdev);
933 	else
934 		return -EINVAL;
935 }
936 
937 static void qede_update_mtu(struct qede_dev *edev,
938 			    struct qede_reload_args *args)
939 {
940 	edev->ndev->mtu = args->u.mtu;
941 }
942 
943 /* Netdevice NDOs */
944 int qede_change_mtu(struct net_device *ndev, int new_mtu)
945 {
946 	struct qede_dev *edev = netdev_priv(ndev);
947 	struct qede_reload_args args;
948 
949 	DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
950 		   "Configuring MTU size of %d\n", new_mtu);
951 
952 	if (new_mtu > PAGE_SIZE)
953 		ndev->features &= ~NETIF_F_GRO_HW;
954 
955 	/* Set the mtu field and re-start the interface if needed */
956 	args.u.mtu = new_mtu;
957 	args.func = &qede_update_mtu;
958 	qede_reload(edev, &args, false);
959 
960 	edev->ops->common->update_mtu(edev->cdev, new_mtu);
961 
962 	return 0;
963 }
964 
965 static void qede_get_channels(struct net_device *dev,
966 			      struct ethtool_channels *channels)
967 {
968 	struct qede_dev *edev = netdev_priv(dev);
969 
970 	channels->max_combined = QEDE_MAX_RSS_CNT(edev);
971 	channels->max_rx = QEDE_MAX_RSS_CNT(edev);
972 	channels->max_tx = QEDE_MAX_RSS_CNT(edev);
973 	channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
974 					edev->fp_num_rx;
975 	channels->tx_count = edev->fp_num_tx;
976 	channels->rx_count = edev->fp_num_rx;
977 }
978 
979 static int qede_set_channels(struct net_device *dev,
980 			     struct ethtool_channels *channels)
981 {
982 	struct qede_dev *edev = netdev_priv(dev);
983 	u32 count;
984 
985 	DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
986 		   "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
987 		   channels->rx_count, channels->tx_count,
988 		   channels->other_count, channels->combined_count);
989 
990 	count = channels->rx_count + channels->tx_count +
991 			channels->combined_count;
992 
993 	/* We don't support `other' channels */
994 	if (channels->other_count) {
995 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
996 			   "command parameters not supported\n");
997 		return -EINVAL;
998 	}
999 
1000 	if (!(channels->combined_count || (channels->rx_count &&
1001 					   channels->tx_count))) {
1002 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1003 			   "need to request at least one transmit and one receive channel\n");
1004 		return -EINVAL;
1005 	}
1006 
1007 	if (count > QEDE_MAX_RSS_CNT(edev)) {
1008 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1009 			   "requested channels = %d max supported channels = %d\n",
1010 			   count, QEDE_MAX_RSS_CNT(edev));
1011 		return -EINVAL;
1012 	}
1013 
1014 	/* Check if there was a change in the active parameters */
1015 	if ((count == QEDE_QUEUE_CNT(edev)) &&
1016 	    (channels->tx_count == edev->fp_num_tx) &&
1017 	    (channels->rx_count == edev->fp_num_rx)) {
1018 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1019 			   "No change in active parameters\n");
1020 		return 0;
1021 	}
1022 
1023 	/* We need the number of queues to be divisible between the hwfns */
1024 	if ((count % edev->dev_info.common.num_hwfns) ||
1025 	    (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1026 	    (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1027 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1028 			   "Number of channels must be divisible by %04x\n",
1029 			   edev->dev_info.common.num_hwfns);
1030 		return -EINVAL;
1031 	}
1032 
1033 	/* Set number of queues and reload if necessary */
1034 	edev->req_queues = count;
1035 	edev->req_num_tx = channels->tx_count;
1036 	edev->req_num_rx = channels->rx_count;
1037 	/* Reset the indirection table if rx queue count is updated */
1038 	if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1039 		edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1040 		memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1041 	}
1042 
1043 	qede_reload(edev, NULL, false);
1044 
1045 	return 0;
1046 }
1047 
1048 static int qede_get_ts_info(struct net_device *dev,
1049 			    struct ethtool_ts_info *info)
1050 {
1051 	struct qede_dev *edev = netdev_priv(dev);
1052 
1053 	return qede_ptp_get_ts_info(edev, info);
1054 }
1055 
1056 static int qede_set_phys_id(struct net_device *dev,
1057 			    enum ethtool_phys_id_state state)
1058 {
1059 	struct qede_dev *edev = netdev_priv(dev);
1060 	u8 led_state = 0;
1061 
1062 	switch (state) {
1063 	case ETHTOOL_ID_ACTIVE:
1064 		return 1;	/* cycle on/off once per second */
1065 
1066 	case ETHTOOL_ID_ON:
1067 		led_state = QED_LED_MODE_ON;
1068 		break;
1069 
1070 	case ETHTOOL_ID_OFF:
1071 		led_state = QED_LED_MODE_OFF;
1072 		break;
1073 
1074 	case ETHTOOL_ID_INACTIVE:
1075 		led_state = QED_LED_MODE_RESTORE;
1076 		break;
1077 	}
1078 
1079 	edev->ops->common->set_led(edev->cdev, led_state);
1080 
1081 	return 0;
1082 }
1083 
1084 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1085 {
1086 	info->data = RXH_IP_SRC | RXH_IP_DST;
1087 
1088 	switch (info->flow_type) {
1089 	case TCP_V4_FLOW:
1090 	case TCP_V6_FLOW:
1091 		info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1092 		break;
1093 	case UDP_V4_FLOW:
1094 		if (edev->rss_caps & QED_RSS_IPV4_UDP)
1095 			info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1096 		break;
1097 	case UDP_V6_FLOW:
1098 		if (edev->rss_caps & QED_RSS_IPV6_UDP)
1099 			info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1100 		break;
1101 	case IPV4_FLOW:
1102 	case IPV6_FLOW:
1103 		break;
1104 	default:
1105 		info->data = 0;
1106 		break;
1107 	}
1108 
1109 	return 0;
1110 }
1111 
1112 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1113 			  u32 *rule_locs)
1114 {
1115 	struct qede_dev *edev = netdev_priv(dev);
1116 	int rc = 0;
1117 
1118 	switch (info->cmd) {
1119 	case ETHTOOL_GRXRINGS:
1120 		info->data = QEDE_RSS_COUNT(edev);
1121 		break;
1122 	case ETHTOOL_GRXFH:
1123 		rc = qede_get_rss_flags(edev, info);
1124 		break;
1125 	case ETHTOOL_GRXCLSRLCNT:
1126 		info->rule_cnt = qede_get_arfs_filter_count(edev);
1127 		info->data = QEDE_RFS_MAX_FLTR;
1128 		break;
1129 	case ETHTOOL_GRXCLSRULE:
1130 		rc = qede_get_cls_rule_entry(edev, info);
1131 		break;
1132 	case ETHTOOL_GRXCLSRLALL:
1133 		rc = qede_get_cls_rule_all(edev, info, rule_locs);
1134 		break;
1135 	default:
1136 		DP_ERR(edev, "Command parameters not supported\n");
1137 		rc = -EOPNOTSUPP;
1138 	}
1139 
1140 	return rc;
1141 }
1142 
1143 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1144 {
1145 	struct qed_update_vport_params *vport_update_params;
1146 	u8 set_caps = 0, clr_caps = 0;
1147 	int rc = 0;
1148 
1149 	DP_VERBOSE(edev, QED_MSG_DEBUG,
1150 		   "Set rss flags command parameters: flow type = %d, data = %llu\n",
1151 		   info->flow_type, info->data);
1152 
1153 	switch (info->flow_type) {
1154 	case TCP_V4_FLOW:
1155 	case TCP_V6_FLOW:
1156 		/* For TCP only 4-tuple hash is supported */
1157 		if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1158 				  RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1159 			DP_INFO(edev, "Command parameters not supported\n");
1160 			return -EINVAL;
1161 		}
1162 		return 0;
1163 	case UDP_V4_FLOW:
1164 		/* For UDP either 2-tuple hash or 4-tuple hash is supported */
1165 		if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1166 				   RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1167 			set_caps = QED_RSS_IPV4_UDP;
1168 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1169 				   "UDP 4-tuple enabled\n");
1170 		} else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1171 			clr_caps = QED_RSS_IPV4_UDP;
1172 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1173 				   "UDP 4-tuple disabled\n");
1174 		} else {
1175 			return -EINVAL;
1176 		}
1177 		break;
1178 	case UDP_V6_FLOW:
1179 		/* For UDP either 2-tuple hash or 4-tuple hash is supported */
1180 		if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1181 				   RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1182 			set_caps = QED_RSS_IPV6_UDP;
1183 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1184 				   "UDP 4-tuple enabled\n");
1185 		} else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1186 			clr_caps = QED_RSS_IPV6_UDP;
1187 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1188 				   "UDP 4-tuple disabled\n");
1189 		} else {
1190 			return -EINVAL;
1191 		}
1192 		break;
1193 	case IPV4_FLOW:
1194 	case IPV6_FLOW:
1195 		/* For IP only 2-tuple hash is supported */
1196 		if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1197 			DP_INFO(edev, "Command parameters not supported\n");
1198 			return -EINVAL;
1199 		}
1200 		return 0;
1201 	case SCTP_V4_FLOW:
1202 	case AH_ESP_V4_FLOW:
1203 	case AH_V4_FLOW:
1204 	case ESP_V4_FLOW:
1205 	case SCTP_V6_FLOW:
1206 	case AH_ESP_V6_FLOW:
1207 	case AH_V6_FLOW:
1208 	case ESP_V6_FLOW:
1209 	case IP_USER_FLOW:
1210 	case ETHER_FLOW:
1211 		/* RSS is not supported for these protocols */
1212 		if (info->data) {
1213 			DP_INFO(edev, "Command parameters not supported\n");
1214 			return -EINVAL;
1215 		}
1216 		return 0;
1217 	default:
1218 		return -EINVAL;
1219 	}
1220 
1221 	/* No action is needed if there is no change in the rss capability */
1222 	if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1223 		return 0;
1224 
1225 	/* Update internal configuration */
1226 	edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1227 	edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1228 
1229 	/* Re-configure if possible */
1230 	__qede_lock(edev);
1231 	if (edev->state == QEDE_STATE_OPEN) {
1232 		vport_update_params = vzalloc(sizeof(*vport_update_params));
1233 		if (!vport_update_params) {
1234 			__qede_unlock(edev);
1235 			return -ENOMEM;
1236 		}
1237 		qede_fill_rss_params(edev, &vport_update_params->rss_params,
1238 				     &vport_update_params->update_rss_flg);
1239 		rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1240 		vfree(vport_update_params);
1241 	}
1242 	__qede_unlock(edev);
1243 
1244 	return rc;
1245 }
1246 
1247 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1248 {
1249 	struct qede_dev *edev = netdev_priv(dev);
1250 	int rc;
1251 
1252 	switch (info->cmd) {
1253 	case ETHTOOL_SRXFH:
1254 		rc = qede_set_rss_flags(edev, info);
1255 		break;
1256 	case ETHTOOL_SRXCLSRLINS:
1257 		rc = qede_add_cls_rule(edev, info);
1258 		break;
1259 	case ETHTOOL_SRXCLSRLDEL:
1260 		rc = qede_del_cls_rule(edev, info);
1261 		break;
1262 	default:
1263 		DP_INFO(edev, "Command parameters not supported\n");
1264 		rc = -EOPNOTSUPP;
1265 	}
1266 
1267 	return rc;
1268 }
1269 
1270 static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1271 {
1272 	return QED_RSS_IND_TABLE_SIZE;
1273 }
1274 
1275 static u32 qede_get_rxfh_key_size(struct net_device *dev)
1276 {
1277 	struct qede_dev *edev = netdev_priv(dev);
1278 
1279 	return sizeof(edev->rss_key);
1280 }
1281 
1282 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
1283 {
1284 	struct qede_dev *edev = netdev_priv(dev);
1285 	int i;
1286 
1287 	if (hfunc)
1288 		*hfunc = ETH_RSS_HASH_TOP;
1289 
1290 	if (!indir)
1291 		return 0;
1292 
1293 	for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1294 		indir[i] = edev->rss_ind_table[i];
1295 
1296 	if (key)
1297 		memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
1298 
1299 	return 0;
1300 }
1301 
1302 static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
1303 			 const u8 *key, const u8 hfunc)
1304 {
1305 	struct qed_update_vport_params *vport_update_params;
1306 	struct qede_dev *edev = netdev_priv(dev);
1307 	int i, rc = 0;
1308 
1309 	if (edev->dev_info.common.num_hwfns > 1) {
1310 		DP_INFO(edev,
1311 			"RSS configuration is not supported for 100G devices\n");
1312 		return -EOPNOTSUPP;
1313 	}
1314 
1315 	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
1316 		return -EOPNOTSUPP;
1317 
1318 	if (!indir && !key)
1319 		return 0;
1320 
1321 	if (indir) {
1322 		for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1323 			edev->rss_ind_table[i] = indir[i];
1324 		edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1325 	}
1326 
1327 	if (key) {
1328 		memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
1329 		edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1330 	}
1331 
1332 	__qede_lock(edev);
1333 	if (edev->state == QEDE_STATE_OPEN) {
1334 		vport_update_params = vzalloc(sizeof(*vport_update_params));
1335 		if (!vport_update_params) {
1336 			__qede_unlock(edev);
1337 			return -ENOMEM;
1338 		}
1339 		qede_fill_rss_params(edev, &vport_update_params->rss_params,
1340 				     &vport_update_params->update_rss_flg);
1341 		rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1342 		vfree(vport_update_params);
1343 	}
1344 	__qede_unlock(edev);
1345 
1346 	return rc;
1347 }
1348 
1349 /* This function enables the interrupt generation and the NAPI on the device */
1350 static void qede_netif_start(struct qede_dev *edev)
1351 {
1352 	int i;
1353 
1354 	if (!netif_running(edev->ndev))
1355 		return;
1356 
1357 	for_each_queue(i) {
1358 		/* Update and reenable interrupts */
1359 		qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1360 		napi_enable(&edev->fp_array[i].napi);
1361 	}
1362 }
1363 
1364 /* This function disables the NAPI and the interrupt generation on the device */
1365 static void qede_netif_stop(struct qede_dev *edev)
1366 {
1367 	int i;
1368 
1369 	for_each_queue(i) {
1370 		napi_disable(&edev->fp_array[i].napi);
1371 		/* Disable interrupts */
1372 		qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1373 	}
1374 }
1375 
1376 static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1377 					  struct sk_buff *skb)
1378 {
1379 	struct qede_tx_queue *txq = NULL;
1380 	struct eth_tx_1st_bd *first_bd;
1381 	dma_addr_t mapping;
1382 	int i, idx;
1383 	u16 val;
1384 
1385 	for_each_queue(i) {
1386 		if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1387 			txq = edev->fp_array[i].txq;
1388 			break;
1389 		}
1390 	}
1391 
1392 	if (!txq) {
1393 		DP_NOTICE(edev, "Tx path is not available\n");
1394 		return -1;
1395 	}
1396 
1397 	/* Fill the entry in the SW ring and the BDs in the FW ring */
1398 	idx = txq->sw_tx_prod;
1399 	txq->sw_tx_ring.skbs[idx].skb = skb;
1400 	first_bd = qed_chain_produce(&txq->tx_pbl);
1401 	memset(first_bd, 0, sizeof(*first_bd));
1402 	val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1403 	first_bd->data.bd_flags.bitfields = val;
1404 	val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1405 	val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1406 	first_bd->data.bitfields |= cpu_to_le16(val);
1407 
1408 	/* Map skb linear data for DMA and set in the first BD */
1409 	mapping = dma_map_single(&edev->pdev->dev, skb->data,
1410 				 skb_headlen(skb), DMA_TO_DEVICE);
1411 	if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1412 		DP_NOTICE(edev, "SKB mapping failed\n");
1413 		return -ENOMEM;
1414 	}
1415 	BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1416 
1417 	/* update the first BD with the actual num BDs */
1418 	first_bd->data.nbds = 1;
1419 	txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1420 	/* 'next page' entries are counted in the producer value */
1421 	val = qed_chain_get_prod_idx(&txq->tx_pbl);
1422 	txq->tx_db.data.bd_prod = cpu_to_le16(val);
1423 
1424 	/* wmb makes sure that the BDs data is updated before updating the
1425 	 * producer, otherwise FW may read old data from the BDs.
1426 	 */
1427 	wmb();
1428 	barrier();
1429 	writel(txq->tx_db.raw, txq->doorbell_addr);
1430 
1431 	/* mmiowb is needed to synchronize doorbell writes from more than one
1432 	 * processor. It guarantees that the write arrives to the device before
1433 	 * the queue lock is released and another start_xmit is called (possibly
1434 	 * on another CPU). Without this barrier, the next doorbell can bypass
1435 	 * this doorbell. This is applicable to IA64/Altix systems.
1436 	 */
1437 	mmiowb();
1438 
1439 	for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1440 		if (qede_txq_has_work(txq))
1441 			break;
1442 		usleep_range(100, 200);
1443 	}
1444 
1445 	if (!qede_txq_has_work(txq)) {
1446 		DP_NOTICE(edev, "Tx completion didn't happen\n");
1447 		return -1;
1448 	}
1449 
1450 	first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1451 	dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1452 			 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1453 	txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1454 	txq->sw_tx_ring.skbs[idx].skb = NULL;
1455 
1456 	return 0;
1457 }
1458 
1459 static int qede_selftest_receive_traffic(struct qede_dev *edev)
1460 {
1461 	u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
1462 	struct eth_fast_path_rx_reg_cqe *fp_cqe;
1463 	struct qede_rx_queue *rxq = NULL;
1464 	struct sw_rx_data *sw_rx_data;
1465 	union eth_rx_cqe *cqe;
1466 	int i, iter, rc = 0;
1467 	u8 *data_ptr;
1468 
1469 	for_each_queue(i) {
1470 		if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1471 			rxq = edev->fp_array[i].rxq;
1472 			break;
1473 		}
1474 	}
1475 
1476 	if (!rxq) {
1477 		DP_NOTICE(edev, "Rx path is not available\n");
1478 		return -1;
1479 	}
1480 
1481 	/* The packet is expected to receive on rx-queue 0 even though RSS is
1482 	 * enabled. This is because the queue 0 is configured as the default
1483 	 * queue and that the loopback traffic is not IP.
1484 	 */
1485 	for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1486 		if (!qede_has_rx_work(rxq)) {
1487 			usleep_range(100, 200);
1488 			continue;
1489 		}
1490 
1491 		hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1492 		sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1493 
1494 		/* Memory barrier to prevent the CPU from doing speculative
1495 		 * reads of CQE/BD before reading hw_comp_cons. If the CQE is
1496 		 * read before it is written by FW, then FW writes CQE and SB,
1497 		 * and then the CPU reads the hw_comp_cons, it will use an old
1498 		 * CQE.
1499 		 */
1500 		rmb();
1501 
1502 		/* Get the CQE from the completion ring */
1503 		cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1504 
1505 		/* Get the data from the SW ring */
1506 		sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1507 		sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1508 		fp_cqe = &cqe->fast_path_regular;
1509 		len =  le16_to_cpu(fp_cqe->len_on_first_bd);
1510 		data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1511 				  fp_cqe->placement_offset +
1512 				  sw_rx_data->page_offset +
1513 				  rxq->rx_headroom);
1514 		if (ether_addr_equal(data_ptr,  edev->ndev->dev_addr) &&
1515 		    ether_addr_equal(data_ptr + ETH_ALEN,
1516 				     edev->ndev->dev_addr)) {
1517 			for (i = ETH_HLEN; i < len; i++)
1518 				if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1519 					rc = -1;
1520 					break;
1521 				}
1522 
1523 			qede_recycle_rx_bd_ring(rxq, 1);
1524 			qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1525 			break;
1526 		}
1527 
1528 		DP_INFO(edev, "Not the transmitted packet\n");
1529 		qede_recycle_rx_bd_ring(rxq, 1);
1530 		qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1531 	}
1532 
1533 	if (iter == QEDE_SELFTEST_POLL_COUNT) {
1534 		DP_NOTICE(edev, "Failed to receive the traffic\n");
1535 		return -1;
1536 	}
1537 
1538 	qede_update_rx_prod(edev, rxq);
1539 
1540 	return rc;
1541 }
1542 
1543 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1544 {
1545 	struct qed_link_params link_params;
1546 	struct sk_buff *skb = NULL;
1547 	int rc = 0, i;
1548 	u32 pkt_size;
1549 	u8 *packet;
1550 
1551 	if (!netif_running(edev->ndev)) {
1552 		DP_NOTICE(edev, "Interface is down\n");
1553 		return -EINVAL;
1554 	}
1555 
1556 	qede_netif_stop(edev);
1557 
1558 	/* Bring up the link in Loopback mode */
1559 	memset(&link_params, 0, sizeof(link_params));
1560 	link_params.link_up = true;
1561 	link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1562 	link_params.loopback_mode = loopback_mode;
1563 	edev->ops->common->set_link(edev->cdev, &link_params);
1564 
1565 	/* Wait for loopback configuration to apply */
1566 	msleep_interruptible(500);
1567 
1568 	/* prepare the loopback packet */
1569 	pkt_size = edev->ndev->mtu + ETH_HLEN;
1570 
1571 	skb = netdev_alloc_skb(edev->ndev, pkt_size);
1572 	if (!skb) {
1573 		DP_INFO(edev, "Can't allocate skb\n");
1574 		rc = -ENOMEM;
1575 		goto test_loopback_exit;
1576 	}
1577 	packet = skb_put(skb, pkt_size);
1578 	ether_addr_copy(packet, edev->ndev->dev_addr);
1579 	ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1580 	memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1581 	for (i = ETH_HLEN; i < pkt_size; i++)
1582 		packet[i] = (unsigned char)(i & 0xff);
1583 
1584 	rc = qede_selftest_transmit_traffic(edev, skb);
1585 	if (rc)
1586 		goto test_loopback_exit;
1587 
1588 	rc = qede_selftest_receive_traffic(edev);
1589 	if (rc)
1590 		goto test_loopback_exit;
1591 
1592 	DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1593 
1594 test_loopback_exit:
1595 	dev_kfree_skb(skb);
1596 
1597 	/* Bring up the link in Normal mode */
1598 	memset(&link_params, 0, sizeof(link_params));
1599 	link_params.link_up = true;
1600 	link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1601 	link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1602 	edev->ops->common->set_link(edev->cdev, &link_params);
1603 
1604 	/* Wait for loopback configuration to apply */
1605 	msleep_interruptible(500);
1606 
1607 	qede_netif_start(edev);
1608 
1609 	return rc;
1610 }
1611 
1612 static void qede_self_test(struct net_device *dev,
1613 			   struct ethtool_test *etest, u64 *buf)
1614 {
1615 	struct qede_dev *edev = netdev_priv(dev);
1616 
1617 	DP_VERBOSE(edev, QED_MSG_DEBUG,
1618 		   "Self-test command parameters: offline = %d, external_lb = %d\n",
1619 		   (etest->flags & ETH_TEST_FL_OFFLINE),
1620 		   (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1621 
1622 	memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1623 
1624 	if (etest->flags & ETH_TEST_FL_OFFLINE) {
1625 		if (qede_selftest_run_loopback(edev,
1626 					       QED_LINK_LOOPBACK_INT_PHY)) {
1627 			buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1628 			etest->flags |= ETH_TEST_FL_FAILED;
1629 		}
1630 	}
1631 
1632 	if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1633 		buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1634 		etest->flags |= ETH_TEST_FL_FAILED;
1635 	}
1636 
1637 	if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1638 		buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1639 		etest->flags |= ETH_TEST_FL_FAILED;
1640 	}
1641 
1642 	if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1643 		buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1644 		etest->flags |= ETH_TEST_FL_FAILED;
1645 	}
1646 
1647 	if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1648 		buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1649 		etest->flags |= ETH_TEST_FL_FAILED;
1650 	}
1651 
1652 	if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1653 		buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1654 		etest->flags |= ETH_TEST_FL_FAILED;
1655 	}
1656 }
1657 
1658 static int qede_set_tunable(struct net_device *dev,
1659 			    const struct ethtool_tunable *tuna,
1660 			    const void *data)
1661 {
1662 	struct qede_dev *edev = netdev_priv(dev);
1663 	u32 val;
1664 
1665 	switch (tuna->id) {
1666 	case ETHTOOL_RX_COPYBREAK:
1667 		val = *(u32 *)data;
1668 		if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1669 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1670 				   "Invalid rx copy break value, range is [%u, %u]",
1671 				   QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1672 			return -EINVAL;
1673 		}
1674 
1675 		edev->rx_copybreak = *(u32 *)data;
1676 		break;
1677 	default:
1678 		return -EOPNOTSUPP;
1679 	}
1680 
1681 	return 0;
1682 }
1683 
1684 static int qede_get_tunable(struct net_device *dev,
1685 			    const struct ethtool_tunable *tuna, void *data)
1686 {
1687 	struct qede_dev *edev = netdev_priv(dev);
1688 
1689 	switch (tuna->id) {
1690 	case ETHTOOL_RX_COPYBREAK:
1691 		*(u32 *)data = edev->rx_copybreak;
1692 		break;
1693 	default:
1694 		return -EOPNOTSUPP;
1695 	}
1696 
1697 	return 0;
1698 }
1699 
1700 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1701 {
1702 	struct qede_dev *edev = netdev_priv(dev);
1703 	struct qed_link_output current_link;
1704 
1705 	memset(&current_link, 0, sizeof(current_link));
1706 	edev->ops->common->get_link(edev->cdev, &current_link);
1707 
1708 	if (!current_link.eee_supported) {
1709 		DP_INFO(edev, "EEE is not supported\n");
1710 		return -EOPNOTSUPP;
1711 	}
1712 
1713 	if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
1714 		edata->advertised = ADVERTISED_1000baseT_Full;
1715 	if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
1716 		edata->advertised |= ADVERTISED_10000baseT_Full;
1717 	if (current_link.sup_caps & QED_EEE_1G_ADV)
1718 		edata->supported = ADVERTISED_1000baseT_Full;
1719 	if (current_link.sup_caps & QED_EEE_10G_ADV)
1720 		edata->supported |= ADVERTISED_10000baseT_Full;
1721 	if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
1722 		edata->lp_advertised = ADVERTISED_1000baseT_Full;
1723 	if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
1724 		edata->lp_advertised |= ADVERTISED_10000baseT_Full;
1725 
1726 	edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1727 	edata->eee_enabled = current_link.eee.enable;
1728 	edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1729 	edata->eee_active = current_link.eee_active;
1730 
1731 	return 0;
1732 }
1733 
1734 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1735 {
1736 	struct qede_dev *edev = netdev_priv(dev);
1737 	struct qed_link_output current_link;
1738 	struct qed_link_params params;
1739 
1740 	if (!edev->ops->common->can_link_change(edev->cdev)) {
1741 		DP_INFO(edev, "Link settings are not allowed to be changed\n");
1742 		return -EOPNOTSUPP;
1743 	}
1744 
1745 	memset(&current_link, 0, sizeof(current_link));
1746 	edev->ops->common->get_link(edev->cdev, &current_link);
1747 
1748 	if (!current_link.eee_supported) {
1749 		DP_INFO(edev, "EEE is not supported\n");
1750 		return -EOPNOTSUPP;
1751 	}
1752 
1753 	memset(&params, 0, sizeof(params));
1754 	params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1755 
1756 	if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
1757 				   ADVERTISED_10000baseT_Full)) ||
1758 	    ((edata->advertised & (ADVERTISED_1000baseT_Full |
1759 				   ADVERTISED_10000baseT_Full)) !=
1760 	     edata->advertised)) {
1761 		DP_VERBOSE(edev, QED_MSG_DEBUG,
1762 			   "Invalid advertised capabilities %d\n",
1763 			   edata->advertised);
1764 		return -EINVAL;
1765 	}
1766 
1767 	if (edata->advertised & ADVERTISED_1000baseT_Full)
1768 		params.eee.adv_caps = QED_EEE_1G_ADV;
1769 	if (edata->advertised & ADVERTISED_10000baseT_Full)
1770 		params.eee.adv_caps |= QED_EEE_10G_ADV;
1771 	params.eee.enable = edata->eee_enabled;
1772 	params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1773 	params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1774 
1775 	params.link_up = true;
1776 	edev->ops->common->set_link(edev->cdev, &params);
1777 
1778 	return 0;
1779 }
1780 
1781 static const struct ethtool_ops qede_ethtool_ops = {
1782 	.get_link_ksettings = qede_get_link_ksettings,
1783 	.set_link_ksettings = qede_set_link_ksettings,
1784 	.get_drvinfo = qede_get_drvinfo,
1785 	.get_regs_len = qede_get_regs_len,
1786 	.get_regs = qede_get_regs,
1787 	.get_wol = qede_get_wol,
1788 	.set_wol = qede_set_wol,
1789 	.get_msglevel = qede_get_msglevel,
1790 	.set_msglevel = qede_set_msglevel,
1791 	.nway_reset = qede_nway_reset,
1792 	.get_link = qede_get_link,
1793 	.get_coalesce = qede_get_coalesce,
1794 	.set_coalesce = qede_set_coalesce,
1795 	.get_ringparam = qede_get_ringparam,
1796 	.set_ringparam = qede_set_ringparam,
1797 	.get_pauseparam = qede_get_pauseparam,
1798 	.set_pauseparam = qede_set_pauseparam,
1799 	.get_strings = qede_get_strings,
1800 	.set_phys_id = qede_set_phys_id,
1801 	.get_ethtool_stats = qede_get_ethtool_stats,
1802 	.get_priv_flags = qede_get_priv_flags,
1803 	.get_sset_count = qede_get_sset_count,
1804 	.get_rxnfc = qede_get_rxnfc,
1805 	.set_rxnfc = qede_set_rxnfc,
1806 	.get_rxfh_indir_size = qede_get_rxfh_indir_size,
1807 	.get_rxfh_key_size = qede_get_rxfh_key_size,
1808 	.get_rxfh = qede_get_rxfh,
1809 	.set_rxfh = qede_set_rxfh,
1810 	.get_ts_info = qede_get_ts_info,
1811 	.get_channels = qede_get_channels,
1812 	.set_channels = qede_set_channels,
1813 	.self_test = qede_self_test,
1814 	.get_eee = qede_get_eee,
1815 	.set_eee = qede_set_eee,
1816 
1817 	.get_tunable = qede_get_tunable,
1818 	.set_tunable = qede_set_tunable,
1819 	.flash_device = qede_flash_device,
1820 };
1821 
1822 static const struct ethtool_ops qede_vf_ethtool_ops = {
1823 	.get_link_ksettings = qede_get_link_ksettings,
1824 	.get_drvinfo = qede_get_drvinfo,
1825 	.get_msglevel = qede_get_msglevel,
1826 	.set_msglevel = qede_set_msglevel,
1827 	.get_link = qede_get_link,
1828 	.get_coalesce = qede_get_coalesce,
1829 	.set_coalesce = qede_set_coalesce,
1830 	.get_ringparam = qede_get_ringparam,
1831 	.set_ringparam = qede_set_ringparam,
1832 	.get_strings = qede_get_strings,
1833 	.get_ethtool_stats = qede_get_ethtool_stats,
1834 	.get_priv_flags = qede_get_priv_flags,
1835 	.get_sset_count = qede_get_sset_count,
1836 	.get_rxnfc = qede_get_rxnfc,
1837 	.set_rxnfc = qede_set_rxnfc,
1838 	.get_rxfh_indir_size = qede_get_rxfh_indir_size,
1839 	.get_rxfh_key_size = qede_get_rxfh_key_size,
1840 	.get_rxfh = qede_get_rxfh,
1841 	.set_rxfh = qede_set_rxfh,
1842 	.get_channels = qede_get_channels,
1843 	.set_channels = qede_set_channels,
1844 	.get_tunable = qede_get_tunable,
1845 	.set_tunable = qede_set_tunable,
1846 };
1847 
1848 void qede_set_ethtool_ops(struct net_device *dev)
1849 {
1850 	struct qede_dev *edev = netdev_priv(dev);
1851 
1852 	if (IS_VF(edev))
1853 		dev->ethtool_ops = &qede_vf_ethtool_ops;
1854 	else
1855 		dev->ethtool_ops = &qede_ethtool_ops;
1856 }
1857