1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/version.h> 33 #include <linux/types.h> 34 #include <linux/netdevice.h> 35 #include <linux/etherdevice.h> 36 #include <linux/ethtool.h> 37 #include <linux/string.h> 38 #include <linux/pci.h> 39 #include <linux/capability.h> 40 #include <linux/vmalloc.h> 41 #include "qede.h" 42 #include "qede_ptp.h" 43 44 #define QEDE_RQSTAT_OFFSET(stat_name) \ 45 (offsetof(struct qede_rx_queue, stat_name)) 46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 47 #define QEDE_RQSTAT(stat_name) \ 48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 49 50 #define QEDE_SELFTEST_POLL_COUNT 100 51 52 static const struct { 53 u64 offset; 54 char string[ETH_GSTRING_LEN]; 55 } qede_rqstats_arr[] = { 56 QEDE_RQSTAT(rcv_pkts), 57 QEDE_RQSTAT(rx_hw_errors), 58 QEDE_RQSTAT(rx_alloc_errors), 59 QEDE_RQSTAT(rx_ip_frags), 60 QEDE_RQSTAT(xdp_no_pass), 61 }; 62 63 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 64 #define QEDE_TQSTAT_OFFSET(stat_name) \ 65 (offsetof(struct qede_tx_queue, stat_name)) 66 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 67 #define QEDE_TQSTAT(stat_name) \ 68 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 69 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 70 static const struct { 71 u64 offset; 72 char string[ETH_GSTRING_LEN]; 73 } qede_tqstats_arr[] = { 74 QEDE_TQSTAT(xmit_pkts), 75 QEDE_TQSTAT(stopped_cnt), 76 }; 77 78 #define QEDE_STAT_OFFSET(stat_name, type, base) \ 79 (offsetof(type, stat_name) + (base)) 80 #define QEDE_STAT_STRING(stat_name) (#stat_name) 81 #define _QEDE_STAT(stat_name, type, base, attr) \ 82 {QEDE_STAT_OFFSET(stat_name, type, base), \ 83 QEDE_STAT_STRING(stat_name), \ 84 attr} 85 #define QEDE_STAT(stat_name) \ 86 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 87 #define QEDE_PF_STAT(stat_name) \ 88 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 89 BIT(QEDE_STAT_PF_ONLY)) 90 #define QEDE_PF_BB_STAT(stat_name) \ 91 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 92 offsetof(struct qede_stats, bb), \ 93 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 94 #define QEDE_PF_AH_STAT(stat_name) \ 95 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 96 offsetof(struct qede_stats, ah), \ 97 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 98 static const struct { 99 u64 offset; 100 char string[ETH_GSTRING_LEN]; 101 unsigned long attr; 102 #define QEDE_STAT_PF_ONLY 0 103 #define QEDE_STAT_BB_ONLY 1 104 #define QEDE_STAT_AH_ONLY 2 105 } qede_stats_arr[] = { 106 QEDE_STAT(rx_ucast_bytes), 107 QEDE_STAT(rx_mcast_bytes), 108 QEDE_STAT(rx_bcast_bytes), 109 QEDE_STAT(rx_ucast_pkts), 110 QEDE_STAT(rx_mcast_pkts), 111 QEDE_STAT(rx_bcast_pkts), 112 113 QEDE_STAT(tx_ucast_bytes), 114 QEDE_STAT(tx_mcast_bytes), 115 QEDE_STAT(tx_bcast_bytes), 116 QEDE_STAT(tx_ucast_pkts), 117 QEDE_STAT(tx_mcast_pkts), 118 QEDE_STAT(tx_bcast_pkts), 119 120 QEDE_PF_STAT(rx_64_byte_packets), 121 QEDE_PF_STAT(rx_65_to_127_byte_packets), 122 QEDE_PF_STAT(rx_128_to_255_byte_packets), 123 QEDE_PF_STAT(rx_256_to_511_byte_packets), 124 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 125 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 126 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 127 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 128 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 129 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 130 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 131 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 132 QEDE_PF_STAT(tx_64_byte_packets), 133 QEDE_PF_STAT(tx_65_to_127_byte_packets), 134 QEDE_PF_STAT(tx_128_to_255_byte_packets), 135 QEDE_PF_STAT(tx_256_to_511_byte_packets), 136 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 137 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 138 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 139 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 140 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 141 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 142 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 143 QEDE_PF_STAT(rx_mac_crtl_frames), 144 QEDE_PF_STAT(tx_mac_ctrl_frames), 145 QEDE_PF_STAT(rx_pause_frames), 146 QEDE_PF_STAT(tx_pause_frames), 147 QEDE_PF_STAT(rx_pfc_frames), 148 QEDE_PF_STAT(tx_pfc_frames), 149 150 QEDE_PF_STAT(rx_crc_errors), 151 QEDE_PF_STAT(rx_align_errors), 152 QEDE_PF_STAT(rx_carrier_errors), 153 QEDE_PF_STAT(rx_oversize_packets), 154 QEDE_PF_STAT(rx_jabbers), 155 QEDE_PF_STAT(rx_undersize_packets), 156 QEDE_PF_STAT(rx_fragments), 157 QEDE_PF_BB_STAT(tx_lpi_entry_count), 158 QEDE_PF_BB_STAT(tx_total_collisions), 159 QEDE_PF_STAT(brb_truncates), 160 QEDE_PF_STAT(brb_discards), 161 QEDE_STAT(no_buff_discards), 162 QEDE_PF_STAT(mftag_filter_discards), 163 QEDE_PF_STAT(mac_filter_discards), 164 QEDE_PF_STAT(gft_filter_drop), 165 QEDE_STAT(tx_err_drop_pkts), 166 QEDE_STAT(ttl0_discard), 167 QEDE_STAT(packet_too_big_discard), 168 169 QEDE_STAT(coalesced_pkts), 170 QEDE_STAT(coalesced_events), 171 QEDE_STAT(coalesced_aborts_num), 172 QEDE_STAT(non_coalesced_pkts), 173 QEDE_STAT(coalesced_bytes), 174 175 QEDE_STAT(link_change_count), 176 }; 177 178 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 179 #define QEDE_STAT_IS_PF_ONLY(i) \ 180 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 181 #define QEDE_STAT_IS_BB_ONLY(i) \ 182 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 183 #define QEDE_STAT_IS_AH_ONLY(i) \ 184 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 185 186 enum { 187 QEDE_PRI_FLAG_CMT, 188 QEDE_PRI_FLAG_LEN, 189 }; 190 191 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 192 "Coupled-Function", 193 }; 194 195 enum qede_ethtool_tests { 196 QEDE_ETHTOOL_INT_LOOPBACK, 197 QEDE_ETHTOOL_INTERRUPT_TEST, 198 QEDE_ETHTOOL_MEMORY_TEST, 199 QEDE_ETHTOOL_REGISTER_TEST, 200 QEDE_ETHTOOL_CLOCK_TEST, 201 QEDE_ETHTOOL_NVRAM_TEST, 202 QEDE_ETHTOOL_TEST_MAX 203 }; 204 205 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 206 "Internal loopback (offline)", 207 "Interrupt (online)\t", 208 "Memory (online)\t\t", 209 "Register (online)\t", 210 "Clock (online)\t\t", 211 "Nvram (online)\t\t", 212 }; 213 214 static void qede_get_strings_stats_txq(struct qede_dev *edev, 215 struct qede_tx_queue *txq, u8 **buf) 216 { 217 int i; 218 219 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 220 if (txq->is_xdp) 221 sprintf(*buf, "%d [XDP]: %s", 222 QEDE_TXQ_XDP_TO_IDX(edev, txq), 223 qede_tqstats_arr[i].string); 224 else 225 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos, 226 qede_tqstats_arr[i].string); 227 *buf += ETH_GSTRING_LEN; 228 } 229 } 230 231 static void qede_get_strings_stats_rxq(struct qede_dev *edev, 232 struct qede_rx_queue *rxq, u8 **buf) 233 { 234 int i; 235 236 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 237 sprintf(*buf, "%d: %s", rxq->rxq_id, 238 qede_rqstats_arr[i].string); 239 *buf += ETH_GSTRING_LEN; 240 } 241 } 242 243 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 244 { 245 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 246 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 247 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 248 } 249 250 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 251 { 252 struct qede_fastpath *fp; 253 int i; 254 255 /* Account for queue statistics */ 256 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 257 fp = &edev->fp_array[i]; 258 259 if (fp->type & QEDE_FASTPATH_RX) 260 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 261 262 if (fp->type & QEDE_FASTPATH_XDP) 263 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 264 265 if (fp->type & QEDE_FASTPATH_TX) { 266 int cos; 267 268 for_each_cos_in_txq(edev, cos) 269 qede_get_strings_stats_txq(edev, 270 &fp->txq[cos], &buf); 271 } 272 } 273 274 /* Account for non-queue statistics */ 275 for (i = 0; i < QEDE_NUM_STATS; i++) { 276 if (qede_is_irrelevant_stat(edev, i)) 277 continue; 278 strcpy(buf, qede_stats_arr[i].string); 279 buf += ETH_GSTRING_LEN; 280 } 281 } 282 283 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 284 { 285 struct qede_dev *edev = netdev_priv(dev); 286 287 switch (stringset) { 288 case ETH_SS_STATS: 289 qede_get_strings_stats(edev, buf); 290 break; 291 case ETH_SS_PRIV_FLAGS: 292 memcpy(buf, qede_private_arr, 293 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 294 break; 295 case ETH_SS_TEST: 296 memcpy(buf, qede_tests_str_arr, 297 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 298 break; 299 default: 300 DP_VERBOSE(edev, QED_MSG_DEBUG, 301 "Unsupported stringset 0x%08x\n", stringset); 302 } 303 } 304 305 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 306 { 307 int i; 308 309 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 310 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 311 (*buf)++; 312 } 313 } 314 315 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 316 { 317 int i; 318 319 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 320 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 321 (*buf)++; 322 } 323 } 324 325 static void qede_get_ethtool_stats(struct net_device *dev, 326 struct ethtool_stats *stats, u64 *buf) 327 { 328 struct qede_dev *edev = netdev_priv(dev); 329 struct qede_fastpath *fp; 330 int i; 331 332 qede_fill_by_demand_stats(edev); 333 334 /* Need to protect the access to the fastpath array */ 335 __qede_lock(edev); 336 337 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 338 fp = &edev->fp_array[i]; 339 340 if (fp->type & QEDE_FASTPATH_RX) 341 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 342 343 if (fp->type & QEDE_FASTPATH_XDP) 344 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 345 346 if (fp->type & QEDE_FASTPATH_TX) { 347 int cos; 348 349 for_each_cos_in_txq(edev, cos) 350 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf); 351 } 352 } 353 354 for (i = 0; i < QEDE_NUM_STATS; i++) { 355 if (qede_is_irrelevant_stat(edev, i)) 356 continue; 357 *buf = *((u64 *)(((void *)&edev->stats) + 358 qede_stats_arr[i].offset)); 359 360 buf++; 361 } 362 363 __qede_unlock(edev); 364 } 365 366 static int qede_get_sset_count(struct net_device *dev, int stringset) 367 { 368 struct qede_dev *edev = netdev_priv(dev); 369 int num_stats = QEDE_NUM_STATS, i; 370 371 switch (stringset) { 372 case ETH_SS_STATS: 373 for (i = 0; i < QEDE_NUM_STATS; i++) 374 if (qede_is_irrelevant_stat(edev, i)) 375 num_stats--; 376 377 /* Account for the Regular Tx statistics */ 378 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * 379 edev->dev_info.num_tc; 380 381 /* Account for the Regular Rx statistics */ 382 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 383 384 /* Account for XDP statistics [if needed] */ 385 if (edev->xdp_prog) 386 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 387 return num_stats; 388 389 case ETH_SS_PRIV_FLAGS: 390 return QEDE_PRI_FLAG_LEN; 391 case ETH_SS_TEST: 392 if (!IS_VF(edev)) 393 return QEDE_ETHTOOL_TEST_MAX; 394 else 395 return 0; 396 default: 397 DP_VERBOSE(edev, QED_MSG_DEBUG, 398 "Unsupported stringset 0x%08x\n", stringset); 399 return -EINVAL; 400 } 401 } 402 403 static u32 qede_get_priv_flags(struct net_device *dev) 404 { 405 struct qede_dev *edev = netdev_priv(dev); 406 407 return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT; 408 } 409 410 struct qede_link_mode_mapping { 411 u32 qed_link_mode; 412 u32 ethtool_link_mode; 413 }; 414 415 static const struct qede_link_mode_mapping qed_lm_map[] = { 416 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT}, 417 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT}, 418 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT}, 419 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT}, 420 {QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT}, 421 {QED_LM_2500baseX_Full_BIT, ETHTOOL_LINK_MODE_2500baseX_Full_BIT}, 422 {QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT}, 423 {QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT}, 424 {QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT}, 425 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 426 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 427 {QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT}, 428 {QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT}, 429 {QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT}, 430 {QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT}, 431 {QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT}, 432 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT}, 433 {QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT}, 434 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT}, 435 {QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT}, 436 {QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT}, 437 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT}, 438 {QED_LM_100000baseKR4_Full_BIT, 439 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT}, 440 {QED_LM_100000baseSR4_Full_BIT, 441 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT}, 442 {QED_LM_100000baseCR4_Full_BIT, 443 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT}, 444 {QED_LM_100000baseLR4_ER4_Full_BIT, 445 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT}, 446 {QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT}, 447 {QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT}, 448 {QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT}, 449 {QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT}, 450 {QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT}, 451 {QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT}, 452 }; 453 454 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \ 455 { \ 456 int i; \ 457 \ 458 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 459 if ((caps) & (qed_lm_map[i].qed_link_mode)) \ 460 __set_bit(qed_lm_map[i].ethtool_link_mode,\ 461 lk_ksettings->link_modes.name); \ 462 } \ 463 } 464 465 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \ 466 { \ 467 int i; \ 468 \ 469 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 470 if (test_bit(qed_lm_map[i].ethtool_link_mode, \ 471 lk_ksettings->link_modes.name)) \ 472 caps |= qed_lm_map[i].qed_link_mode; \ 473 } \ 474 } 475 476 static int qede_get_link_ksettings(struct net_device *dev, 477 struct ethtool_link_ksettings *cmd) 478 { 479 struct ethtool_link_settings *base = &cmd->base; 480 struct qede_dev *edev = netdev_priv(dev); 481 struct qed_link_output current_link; 482 483 __qede_lock(edev); 484 485 memset(¤t_link, 0, sizeof(current_link)); 486 edev->ops->common->get_link(edev->cdev, ¤t_link); 487 488 ethtool_link_ksettings_zero_link_mode(cmd, supported); 489 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported) 490 491 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 492 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising) 493 494 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 495 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising) 496 497 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 498 base->speed = current_link.speed; 499 base->duplex = current_link.duplex; 500 } else { 501 base->speed = SPEED_UNKNOWN; 502 base->duplex = DUPLEX_UNKNOWN; 503 } 504 505 __qede_unlock(edev); 506 507 base->port = current_link.port; 508 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 509 AUTONEG_DISABLE; 510 511 return 0; 512 } 513 514 static int qede_set_link_ksettings(struct net_device *dev, 515 const struct ethtool_link_ksettings *cmd) 516 { 517 const struct ethtool_link_settings *base = &cmd->base; 518 struct qede_dev *edev = netdev_priv(dev); 519 struct qed_link_output current_link; 520 struct qed_link_params params; 521 u32 sup_caps; 522 523 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 524 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 525 return -EOPNOTSUPP; 526 } 527 memset(¤t_link, 0, sizeof(current_link)); 528 memset(¶ms, 0, sizeof(params)); 529 edev->ops->common->get_link(edev->cdev, ¤t_link); 530 531 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 532 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 533 if (base->autoneg == AUTONEG_ENABLE) { 534 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 535 DP_INFO(edev, "Auto negotiation is not supported\n"); 536 return -EOPNOTSUPP; 537 } 538 539 params.autoneg = true; 540 params.forced_speed = 0; 541 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising) 542 } else { /* forced speed */ 543 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 544 params.autoneg = false; 545 params.forced_speed = base->speed; 546 switch (base->speed) { 547 case SPEED_1000: 548 sup_caps = QED_LM_1000baseT_Full_BIT | 549 QED_LM_1000baseKX_Full_BIT | 550 QED_LM_1000baseX_Full_BIT; 551 if (!(current_link.supported_caps & sup_caps)) { 552 DP_INFO(edev, "1G speed not supported\n"); 553 return -EINVAL; 554 } 555 params.adv_speeds = current_link.supported_caps & 556 sup_caps; 557 break; 558 case SPEED_10000: 559 sup_caps = QED_LM_10000baseT_Full_BIT | 560 QED_LM_10000baseKR_Full_BIT | 561 QED_LM_10000baseKX4_Full_BIT | 562 QED_LM_10000baseR_FEC_BIT | 563 QED_LM_10000baseCR_Full_BIT | 564 QED_LM_10000baseSR_Full_BIT | 565 QED_LM_10000baseLR_Full_BIT | 566 QED_LM_10000baseLRM_Full_BIT; 567 if (!(current_link.supported_caps & sup_caps)) { 568 DP_INFO(edev, "10G speed not supported\n"); 569 return -EINVAL; 570 } 571 params.adv_speeds = current_link.supported_caps & 572 sup_caps; 573 break; 574 case SPEED_20000: 575 if (!(current_link.supported_caps & 576 QED_LM_20000baseKR2_Full_BIT)) { 577 DP_INFO(edev, "20G speed not supported\n"); 578 return -EINVAL; 579 } 580 params.adv_speeds = QED_LM_20000baseKR2_Full_BIT; 581 break; 582 case SPEED_25000: 583 sup_caps = QED_LM_25000baseKR_Full_BIT | 584 QED_LM_25000baseCR_Full_BIT | 585 QED_LM_25000baseSR_Full_BIT; 586 if (!(current_link.supported_caps & sup_caps)) { 587 DP_INFO(edev, "25G speed not supported\n"); 588 return -EINVAL; 589 } 590 params.adv_speeds = current_link.supported_caps & 591 sup_caps; 592 break; 593 case SPEED_40000: 594 sup_caps = QED_LM_40000baseLR4_Full_BIT | 595 QED_LM_40000baseKR4_Full_BIT | 596 QED_LM_40000baseCR4_Full_BIT | 597 QED_LM_40000baseSR4_Full_BIT; 598 if (!(current_link.supported_caps & sup_caps)) { 599 DP_INFO(edev, "40G speed not supported\n"); 600 return -EINVAL; 601 } 602 params.adv_speeds = current_link.supported_caps & 603 sup_caps; 604 break; 605 case SPEED_50000: 606 sup_caps = QED_LM_50000baseKR2_Full_BIT | 607 QED_LM_50000baseCR2_Full_BIT | 608 QED_LM_50000baseSR2_Full_BIT; 609 if (!(current_link.supported_caps & sup_caps)) { 610 DP_INFO(edev, "50G speed not supported\n"); 611 return -EINVAL; 612 } 613 params.adv_speeds = current_link.supported_caps & 614 sup_caps; 615 break; 616 case SPEED_100000: 617 sup_caps = QED_LM_100000baseKR4_Full_BIT | 618 QED_LM_100000baseSR4_Full_BIT | 619 QED_LM_100000baseCR4_Full_BIT | 620 QED_LM_100000baseLR4_ER4_Full_BIT; 621 if (!(current_link.supported_caps & sup_caps)) { 622 DP_INFO(edev, "100G speed not supported\n"); 623 return -EINVAL; 624 } 625 params.adv_speeds = current_link.supported_caps & 626 sup_caps; 627 break; 628 default: 629 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 630 return -EINVAL; 631 } 632 } 633 634 params.link_up = true; 635 edev->ops->common->set_link(edev->cdev, ¶ms); 636 637 return 0; 638 } 639 640 static void qede_get_drvinfo(struct net_device *ndev, 641 struct ethtool_drvinfo *info) 642 { 643 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 644 struct qede_dev *edev = netdev_priv(ndev); 645 646 strlcpy(info->driver, "qede", sizeof(info->driver)); 647 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 648 649 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 650 edev->dev_info.common.fw_major, 651 edev->dev_info.common.fw_minor, 652 edev->dev_info.common.fw_rev, 653 edev->dev_info.common.fw_eng); 654 655 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 656 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 657 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 658 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 659 edev->dev_info.common.mfw_rev & 0xFF); 660 661 if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) < 662 sizeof(info->fw_version)) { 663 snprintf(info->fw_version, sizeof(info->fw_version), 664 "mfw %s storm %s", mfw, storm); 665 } else { 666 snprintf(info->fw_version, sizeof(info->fw_version), 667 "%s %s", mfw, storm); 668 } 669 670 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 671 } 672 673 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 674 { 675 struct qede_dev *edev = netdev_priv(ndev); 676 677 if (edev->dev_info.common.wol_support) { 678 wol->supported = WAKE_MAGIC; 679 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 680 } 681 } 682 683 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 684 { 685 struct qede_dev *edev = netdev_priv(ndev); 686 bool wol_requested; 687 int rc; 688 689 if (wol->wolopts & ~WAKE_MAGIC) { 690 DP_INFO(edev, 691 "Can't support WoL options other than magic-packet\n"); 692 return -EINVAL; 693 } 694 695 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 696 if (wol_requested == edev->wol_enabled) 697 return 0; 698 699 /* Need to actually change configuration */ 700 if (!edev->dev_info.common.wol_support) { 701 DP_INFO(edev, "Device doesn't support WoL\n"); 702 return -EINVAL; 703 } 704 705 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 706 if (!rc) 707 edev->wol_enabled = wol_requested; 708 709 return rc; 710 } 711 712 static u32 qede_get_msglevel(struct net_device *ndev) 713 { 714 struct qede_dev *edev = netdev_priv(ndev); 715 716 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 717 } 718 719 static void qede_set_msglevel(struct net_device *ndev, u32 level) 720 { 721 struct qede_dev *edev = netdev_priv(ndev); 722 u32 dp_module = 0; 723 u8 dp_level = 0; 724 725 qede_config_debug(level, &dp_module, &dp_level); 726 727 edev->dp_level = dp_level; 728 edev->dp_module = dp_module; 729 edev->ops->common->update_msglvl(edev->cdev, 730 dp_module, dp_level); 731 } 732 733 static int qede_nway_reset(struct net_device *dev) 734 { 735 struct qede_dev *edev = netdev_priv(dev); 736 struct qed_link_output current_link; 737 struct qed_link_params link_params; 738 739 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 740 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 741 return -EOPNOTSUPP; 742 } 743 744 if (!netif_running(dev)) 745 return 0; 746 747 memset(¤t_link, 0, sizeof(current_link)); 748 edev->ops->common->get_link(edev->cdev, ¤t_link); 749 if (!current_link.link_up) 750 return 0; 751 752 /* Toggle the link */ 753 memset(&link_params, 0, sizeof(link_params)); 754 link_params.link_up = false; 755 edev->ops->common->set_link(edev->cdev, &link_params); 756 link_params.link_up = true; 757 edev->ops->common->set_link(edev->cdev, &link_params); 758 759 return 0; 760 } 761 762 static u32 qede_get_link(struct net_device *dev) 763 { 764 struct qede_dev *edev = netdev_priv(dev); 765 struct qed_link_output current_link; 766 767 memset(¤t_link, 0, sizeof(current_link)); 768 edev->ops->common->get_link(edev->cdev, ¤t_link); 769 770 return current_link.link_up; 771 } 772 773 static int qede_flash_device(struct net_device *dev, 774 struct ethtool_flash *flash) 775 { 776 struct qede_dev *edev = netdev_priv(dev); 777 778 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 779 } 780 781 static int qede_get_coalesce(struct net_device *dev, 782 struct ethtool_coalesce *coal) 783 { 784 void *rx_handle = NULL, *tx_handle = NULL; 785 struct qede_dev *edev = netdev_priv(dev); 786 u16 rx_coal, tx_coal, i, rc = 0; 787 struct qede_fastpath *fp; 788 789 rx_coal = QED_DEFAULT_RX_USECS; 790 tx_coal = QED_DEFAULT_TX_USECS; 791 792 memset(coal, 0, sizeof(struct ethtool_coalesce)); 793 794 __qede_lock(edev); 795 if (edev->state == QEDE_STATE_OPEN) { 796 for_each_queue(i) { 797 fp = &edev->fp_array[i]; 798 799 if (fp->type & QEDE_FASTPATH_RX) { 800 rx_handle = fp->rxq->handle; 801 break; 802 } 803 } 804 805 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 806 if (rc) { 807 DP_INFO(edev, "Read Rx coalesce error\n"); 808 goto out; 809 } 810 811 for_each_queue(i) { 812 struct qede_tx_queue *txq; 813 814 fp = &edev->fp_array[i]; 815 816 /* All TX queues of given fastpath uses same 817 * coalescing value, so no need to iterate over 818 * all TCs, TC0 txq should suffice. 819 */ 820 if (fp->type & QEDE_FASTPATH_TX) { 821 txq = QEDE_FP_TC0_TXQ(fp); 822 tx_handle = txq->handle; 823 break; 824 } 825 } 826 827 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 828 if (rc) 829 DP_INFO(edev, "Read Tx coalesce error\n"); 830 } 831 832 out: 833 __qede_unlock(edev); 834 835 coal->rx_coalesce_usecs = rx_coal; 836 coal->tx_coalesce_usecs = tx_coal; 837 838 return rc; 839 } 840 841 static int qede_set_coalesce(struct net_device *dev, 842 struct ethtool_coalesce *coal) 843 { 844 struct qede_dev *edev = netdev_priv(dev); 845 struct qede_fastpath *fp; 846 int i, rc = 0; 847 u16 rxc, txc; 848 849 if (!netif_running(dev)) { 850 DP_INFO(edev, "Interface is down\n"); 851 return -EINVAL; 852 } 853 854 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 855 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 856 DP_INFO(edev, 857 "Can't support requested %s coalesce value [max supported value %d]\n", 858 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 859 "tx", QED_COALESCE_MAX); 860 return -EINVAL; 861 } 862 863 rxc = (u16)coal->rx_coalesce_usecs; 864 txc = (u16)coal->tx_coalesce_usecs; 865 for_each_queue(i) { 866 fp = &edev->fp_array[i]; 867 868 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 869 rc = edev->ops->common->set_coalesce(edev->cdev, 870 rxc, 0, 871 fp->rxq->handle); 872 if (rc) { 873 DP_INFO(edev, 874 "Set RX coalesce error, rc = %d\n", rc); 875 return rc; 876 } 877 } 878 879 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 880 struct qede_tx_queue *txq; 881 882 /* All TX queues of given fastpath uses same 883 * coalescing value, so no need to iterate over 884 * all TCs, TC0 txq should suffice. 885 */ 886 txq = QEDE_FP_TC0_TXQ(fp); 887 888 rc = edev->ops->common->set_coalesce(edev->cdev, 889 0, txc, 890 txq->handle); 891 if (rc) { 892 DP_INFO(edev, 893 "Set TX coalesce error, rc = %d\n", rc); 894 return rc; 895 } 896 } 897 } 898 899 return rc; 900 } 901 902 static void qede_get_ringparam(struct net_device *dev, 903 struct ethtool_ringparam *ering) 904 { 905 struct qede_dev *edev = netdev_priv(dev); 906 907 ering->rx_max_pending = NUM_RX_BDS_MAX; 908 ering->rx_pending = edev->q_num_rx_buffers; 909 ering->tx_max_pending = NUM_TX_BDS_MAX; 910 ering->tx_pending = edev->q_num_tx_buffers; 911 } 912 913 static int qede_set_ringparam(struct net_device *dev, 914 struct ethtool_ringparam *ering) 915 { 916 struct qede_dev *edev = netdev_priv(dev); 917 918 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 919 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 920 ering->rx_pending, ering->tx_pending); 921 922 /* Validate legality of configuration */ 923 if (ering->rx_pending > NUM_RX_BDS_MAX || 924 ering->rx_pending < NUM_RX_BDS_MIN || 925 ering->tx_pending > NUM_TX_BDS_MAX || 926 ering->tx_pending < NUM_TX_BDS_MIN) { 927 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 928 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 929 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 930 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 931 return -EINVAL; 932 } 933 934 /* Change ring size and re-load */ 935 edev->q_num_rx_buffers = ering->rx_pending; 936 edev->q_num_tx_buffers = ering->tx_pending; 937 938 qede_reload(edev, NULL, false); 939 940 return 0; 941 } 942 943 static void qede_get_pauseparam(struct net_device *dev, 944 struct ethtool_pauseparam *epause) 945 { 946 struct qede_dev *edev = netdev_priv(dev); 947 struct qed_link_output current_link; 948 949 memset(¤t_link, 0, sizeof(current_link)); 950 edev->ops->common->get_link(edev->cdev, ¤t_link); 951 952 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 953 epause->autoneg = true; 954 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 955 epause->rx_pause = true; 956 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 957 epause->tx_pause = true; 958 959 DP_VERBOSE(edev, QED_MSG_DEBUG, 960 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 961 epause->cmd, epause->autoneg, epause->rx_pause, 962 epause->tx_pause); 963 } 964 965 static int qede_set_pauseparam(struct net_device *dev, 966 struct ethtool_pauseparam *epause) 967 { 968 struct qede_dev *edev = netdev_priv(dev); 969 struct qed_link_params params; 970 struct qed_link_output current_link; 971 972 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 973 DP_INFO(edev, 974 "Pause settings are not allowed to be changed\n"); 975 return -EOPNOTSUPP; 976 } 977 978 memset(¤t_link, 0, sizeof(current_link)); 979 edev->ops->common->get_link(edev->cdev, ¤t_link); 980 981 memset(¶ms, 0, sizeof(params)); 982 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 983 if (epause->autoneg) { 984 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 985 DP_INFO(edev, "autoneg not supported\n"); 986 return -EINVAL; 987 } 988 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 989 } 990 if (epause->rx_pause) 991 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 992 if (epause->tx_pause) 993 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 994 995 params.link_up = true; 996 edev->ops->common->set_link(edev->cdev, ¶ms); 997 998 return 0; 999 } 1000 1001 static void qede_get_regs(struct net_device *ndev, 1002 struct ethtool_regs *regs, void *buffer) 1003 { 1004 struct qede_dev *edev = netdev_priv(ndev); 1005 1006 regs->version = 0; 1007 memset(buffer, 0, regs->len); 1008 1009 if (edev->ops && edev->ops->common) 1010 edev->ops->common->dbg_all_data(edev->cdev, buffer); 1011 } 1012 1013 static int qede_get_regs_len(struct net_device *ndev) 1014 { 1015 struct qede_dev *edev = netdev_priv(ndev); 1016 1017 if (edev->ops && edev->ops->common) 1018 return edev->ops->common->dbg_all_data_size(edev->cdev); 1019 else 1020 return -EINVAL; 1021 } 1022 1023 static void qede_update_mtu(struct qede_dev *edev, 1024 struct qede_reload_args *args) 1025 { 1026 edev->ndev->mtu = args->u.mtu; 1027 } 1028 1029 /* Netdevice NDOs */ 1030 int qede_change_mtu(struct net_device *ndev, int new_mtu) 1031 { 1032 struct qede_dev *edev = netdev_priv(ndev); 1033 struct qede_reload_args args; 1034 1035 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1036 "Configuring MTU size of %d\n", new_mtu); 1037 1038 if (new_mtu > PAGE_SIZE) 1039 ndev->features &= ~NETIF_F_GRO_HW; 1040 1041 /* Set the mtu field and re-start the interface if needed */ 1042 args.u.mtu = new_mtu; 1043 args.func = &qede_update_mtu; 1044 qede_reload(edev, &args, false); 1045 1046 edev->ops->common->update_mtu(edev->cdev, new_mtu); 1047 1048 return 0; 1049 } 1050 1051 static void qede_get_channels(struct net_device *dev, 1052 struct ethtool_channels *channels) 1053 { 1054 struct qede_dev *edev = netdev_priv(dev); 1055 1056 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 1057 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 1058 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 1059 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 1060 edev->fp_num_rx; 1061 channels->tx_count = edev->fp_num_tx; 1062 channels->rx_count = edev->fp_num_rx; 1063 } 1064 1065 static int qede_set_channels(struct net_device *dev, 1066 struct ethtool_channels *channels) 1067 { 1068 struct qede_dev *edev = netdev_priv(dev); 1069 u32 count; 1070 1071 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1072 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 1073 channels->rx_count, channels->tx_count, 1074 channels->other_count, channels->combined_count); 1075 1076 count = channels->rx_count + channels->tx_count + 1077 channels->combined_count; 1078 1079 /* We don't support `other' channels */ 1080 if (channels->other_count) { 1081 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1082 "command parameters not supported\n"); 1083 return -EINVAL; 1084 } 1085 1086 if (!(channels->combined_count || (channels->rx_count && 1087 channels->tx_count))) { 1088 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1089 "need to request at least one transmit and one receive channel\n"); 1090 return -EINVAL; 1091 } 1092 1093 if (count > QEDE_MAX_RSS_CNT(edev)) { 1094 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1095 "requested channels = %d max supported channels = %d\n", 1096 count, QEDE_MAX_RSS_CNT(edev)); 1097 return -EINVAL; 1098 } 1099 1100 /* Check if there was a change in the active parameters */ 1101 if ((count == QEDE_QUEUE_CNT(edev)) && 1102 (channels->tx_count == edev->fp_num_tx) && 1103 (channels->rx_count == edev->fp_num_rx)) { 1104 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1105 "No change in active parameters\n"); 1106 return 0; 1107 } 1108 1109 /* We need the number of queues to be divisible between the hwfns */ 1110 if ((count % edev->dev_info.common.num_hwfns) || 1111 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1112 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1113 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1114 "Number of channels must be divisible by %04x\n", 1115 edev->dev_info.common.num_hwfns); 1116 return -EINVAL; 1117 } 1118 1119 /* Set number of queues and reload if necessary */ 1120 edev->req_queues = count; 1121 edev->req_num_tx = channels->tx_count; 1122 edev->req_num_rx = channels->rx_count; 1123 /* Reset the indirection table if rx queue count is updated */ 1124 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1125 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1126 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1127 } 1128 1129 qede_reload(edev, NULL, false); 1130 1131 return 0; 1132 } 1133 1134 static int qede_get_ts_info(struct net_device *dev, 1135 struct ethtool_ts_info *info) 1136 { 1137 struct qede_dev *edev = netdev_priv(dev); 1138 1139 return qede_ptp_get_ts_info(edev, info); 1140 } 1141 1142 static int qede_set_phys_id(struct net_device *dev, 1143 enum ethtool_phys_id_state state) 1144 { 1145 struct qede_dev *edev = netdev_priv(dev); 1146 u8 led_state = 0; 1147 1148 switch (state) { 1149 case ETHTOOL_ID_ACTIVE: 1150 return 1; /* cycle on/off once per second */ 1151 1152 case ETHTOOL_ID_ON: 1153 led_state = QED_LED_MODE_ON; 1154 break; 1155 1156 case ETHTOOL_ID_OFF: 1157 led_state = QED_LED_MODE_OFF; 1158 break; 1159 1160 case ETHTOOL_ID_INACTIVE: 1161 led_state = QED_LED_MODE_RESTORE; 1162 break; 1163 } 1164 1165 edev->ops->common->set_led(edev->cdev, led_state); 1166 1167 return 0; 1168 } 1169 1170 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1171 { 1172 info->data = RXH_IP_SRC | RXH_IP_DST; 1173 1174 switch (info->flow_type) { 1175 case TCP_V4_FLOW: 1176 case TCP_V6_FLOW: 1177 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1178 break; 1179 case UDP_V4_FLOW: 1180 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1181 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1182 break; 1183 case UDP_V6_FLOW: 1184 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1185 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1186 break; 1187 case IPV4_FLOW: 1188 case IPV6_FLOW: 1189 break; 1190 default: 1191 info->data = 0; 1192 break; 1193 } 1194 1195 return 0; 1196 } 1197 1198 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1199 u32 *rule_locs) 1200 { 1201 struct qede_dev *edev = netdev_priv(dev); 1202 int rc = 0; 1203 1204 switch (info->cmd) { 1205 case ETHTOOL_GRXRINGS: 1206 info->data = QEDE_RSS_COUNT(edev); 1207 break; 1208 case ETHTOOL_GRXFH: 1209 rc = qede_get_rss_flags(edev, info); 1210 break; 1211 case ETHTOOL_GRXCLSRLCNT: 1212 info->rule_cnt = qede_get_arfs_filter_count(edev); 1213 info->data = QEDE_RFS_MAX_FLTR; 1214 break; 1215 case ETHTOOL_GRXCLSRULE: 1216 rc = qede_get_cls_rule_entry(edev, info); 1217 break; 1218 case ETHTOOL_GRXCLSRLALL: 1219 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1220 break; 1221 default: 1222 DP_ERR(edev, "Command parameters not supported\n"); 1223 rc = -EOPNOTSUPP; 1224 } 1225 1226 return rc; 1227 } 1228 1229 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1230 { 1231 struct qed_update_vport_params *vport_update_params; 1232 u8 set_caps = 0, clr_caps = 0; 1233 int rc = 0; 1234 1235 DP_VERBOSE(edev, QED_MSG_DEBUG, 1236 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1237 info->flow_type, info->data); 1238 1239 switch (info->flow_type) { 1240 case TCP_V4_FLOW: 1241 case TCP_V6_FLOW: 1242 /* For TCP only 4-tuple hash is supported */ 1243 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1244 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1245 DP_INFO(edev, "Command parameters not supported\n"); 1246 return -EINVAL; 1247 } 1248 return 0; 1249 case UDP_V4_FLOW: 1250 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1251 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1252 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1253 set_caps = QED_RSS_IPV4_UDP; 1254 DP_VERBOSE(edev, QED_MSG_DEBUG, 1255 "UDP 4-tuple enabled\n"); 1256 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1257 clr_caps = QED_RSS_IPV4_UDP; 1258 DP_VERBOSE(edev, QED_MSG_DEBUG, 1259 "UDP 4-tuple disabled\n"); 1260 } else { 1261 return -EINVAL; 1262 } 1263 break; 1264 case UDP_V6_FLOW: 1265 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1266 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1267 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1268 set_caps = QED_RSS_IPV6_UDP; 1269 DP_VERBOSE(edev, QED_MSG_DEBUG, 1270 "UDP 4-tuple enabled\n"); 1271 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1272 clr_caps = QED_RSS_IPV6_UDP; 1273 DP_VERBOSE(edev, QED_MSG_DEBUG, 1274 "UDP 4-tuple disabled\n"); 1275 } else { 1276 return -EINVAL; 1277 } 1278 break; 1279 case IPV4_FLOW: 1280 case IPV6_FLOW: 1281 /* For IP only 2-tuple hash is supported */ 1282 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1283 DP_INFO(edev, "Command parameters not supported\n"); 1284 return -EINVAL; 1285 } 1286 return 0; 1287 case SCTP_V4_FLOW: 1288 case AH_ESP_V4_FLOW: 1289 case AH_V4_FLOW: 1290 case ESP_V4_FLOW: 1291 case SCTP_V6_FLOW: 1292 case AH_ESP_V6_FLOW: 1293 case AH_V6_FLOW: 1294 case ESP_V6_FLOW: 1295 case IP_USER_FLOW: 1296 case ETHER_FLOW: 1297 /* RSS is not supported for these protocols */ 1298 if (info->data) { 1299 DP_INFO(edev, "Command parameters not supported\n"); 1300 return -EINVAL; 1301 } 1302 return 0; 1303 default: 1304 return -EINVAL; 1305 } 1306 1307 /* No action is needed if there is no change in the rss capability */ 1308 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1309 return 0; 1310 1311 /* Update internal configuration */ 1312 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1313 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1314 1315 /* Re-configure if possible */ 1316 __qede_lock(edev); 1317 if (edev->state == QEDE_STATE_OPEN) { 1318 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1319 if (!vport_update_params) { 1320 __qede_unlock(edev); 1321 return -ENOMEM; 1322 } 1323 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1324 &vport_update_params->update_rss_flg); 1325 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1326 vfree(vport_update_params); 1327 } 1328 __qede_unlock(edev); 1329 1330 return rc; 1331 } 1332 1333 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1334 { 1335 struct qede_dev *edev = netdev_priv(dev); 1336 int rc; 1337 1338 switch (info->cmd) { 1339 case ETHTOOL_SRXFH: 1340 rc = qede_set_rss_flags(edev, info); 1341 break; 1342 case ETHTOOL_SRXCLSRLINS: 1343 rc = qede_add_cls_rule(edev, info); 1344 break; 1345 case ETHTOOL_SRXCLSRLDEL: 1346 rc = qede_delete_flow_filter(edev, info->fs.location); 1347 break; 1348 default: 1349 DP_INFO(edev, "Command parameters not supported\n"); 1350 rc = -EOPNOTSUPP; 1351 } 1352 1353 return rc; 1354 } 1355 1356 static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1357 { 1358 return QED_RSS_IND_TABLE_SIZE; 1359 } 1360 1361 static u32 qede_get_rxfh_key_size(struct net_device *dev) 1362 { 1363 struct qede_dev *edev = netdev_priv(dev); 1364 1365 return sizeof(edev->rss_key); 1366 } 1367 1368 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1369 { 1370 struct qede_dev *edev = netdev_priv(dev); 1371 int i; 1372 1373 if (hfunc) 1374 *hfunc = ETH_RSS_HASH_TOP; 1375 1376 if (!indir) 1377 return 0; 1378 1379 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1380 indir[i] = edev->rss_ind_table[i]; 1381 1382 if (key) 1383 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1384 1385 return 0; 1386 } 1387 1388 static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1389 const u8 *key, const u8 hfunc) 1390 { 1391 struct qed_update_vport_params *vport_update_params; 1392 struct qede_dev *edev = netdev_priv(dev); 1393 int i, rc = 0; 1394 1395 if (edev->dev_info.common.num_hwfns > 1) { 1396 DP_INFO(edev, 1397 "RSS configuration is not supported for 100G devices\n"); 1398 return -EOPNOTSUPP; 1399 } 1400 1401 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1402 return -EOPNOTSUPP; 1403 1404 if (!indir && !key) 1405 return 0; 1406 1407 if (indir) { 1408 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1409 edev->rss_ind_table[i] = indir[i]; 1410 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1411 } 1412 1413 if (key) { 1414 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1415 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1416 } 1417 1418 __qede_lock(edev); 1419 if (edev->state == QEDE_STATE_OPEN) { 1420 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1421 if (!vport_update_params) { 1422 __qede_unlock(edev); 1423 return -ENOMEM; 1424 } 1425 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1426 &vport_update_params->update_rss_flg); 1427 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1428 vfree(vport_update_params); 1429 } 1430 __qede_unlock(edev); 1431 1432 return rc; 1433 } 1434 1435 /* This function enables the interrupt generation and the NAPI on the device */ 1436 static void qede_netif_start(struct qede_dev *edev) 1437 { 1438 int i; 1439 1440 if (!netif_running(edev->ndev)) 1441 return; 1442 1443 for_each_queue(i) { 1444 /* Update and reenable interrupts */ 1445 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1446 napi_enable(&edev->fp_array[i].napi); 1447 } 1448 } 1449 1450 /* This function disables the NAPI and the interrupt generation on the device */ 1451 static void qede_netif_stop(struct qede_dev *edev) 1452 { 1453 int i; 1454 1455 for_each_queue(i) { 1456 napi_disable(&edev->fp_array[i].napi); 1457 /* Disable interrupts */ 1458 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1459 } 1460 } 1461 1462 static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1463 struct sk_buff *skb) 1464 { 1465 struct qede_tx_queue *txq = NULL; 1466 struct eth_tx_1st_bd *first_bd; 1467 dma_addr_t mapping; 1468 int i, idx; 1469 u16 val; 1470 1471 for_each_queue(i) { 1472 struct qede_fastpath *fp = &edev->fp_array[i]; 1473 1474 if (fp->type & QEDE_FASTPATH_TX) { 1475 txq = QEDE_FP_TC0_TXQ(fp); 1476 break; 1477 } 1478 } 1479 1480 if (!txq) { 1481 DP_NOTICE(edev, "Tx path is not available\n"); 1482 return -1; 1483 } 1484 1485 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1486 idx = txq->sw_tx_prod; 1487 txq->sw_tx_ring.skbs[idx].skb = skb; 1488 first_bd = qed_chain_produce(&txq->tx_pbl); 1489 memset(first_bd, 0, sizeof(*first_bd)); 1490 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1491 first_bd->data.bd_flags.bitfields = val; 1492 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1493 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1494 first_bd->data.bitfields |= cpu_to_le16(val); 1495 1496 /* Map skb linear data for DMA and set in the first BD */ 1497 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1498 skb_headlen(skb), DMA_TO_DEVICE); 1499 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1500 DP_NOTICE(edev, "SKB mapping failed\n"); 1501 return -ENOMEM; 1502 } 1503 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1504 1505 /* update the first BD with the actual num BDs */ 1506 first_bd->data.nbds = 1; 1507 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1508 /* 'next page' entries are counted in the producer value */ 1509 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1510 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1511 1512 /* wmb makes sure that the BDs data is updated before updating the 1513 * producer, otherwise FW may read old data from the BDs. 1514 */ 1515 wmb(); 1516 barrier(); 1517 writel(txq->tx_db.raw, txq->doorbell_addr); 1518 1519 /* mmiowb is needed to synchronize doorbell writes from more than one 1520 * processor. It guarantees that the write arrives to the device before 1521 * the queue lock is released and another start_xmit is called (possibly 1522 * on another CPU). Without this barrier, the next doorbell can bypass 1523 * this doorbell. This is applicable to IA64/Altix systems. 1524 */ 1525 mmiowb(); 1526 1527 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1528 if (qede_txq_has_work(txq)) 1529 break; 1530 usleep_range(100, 200); 1531 } 1532 1533 if (!qede_txq_has_work(txq)) { 1534 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1535 return -1; 1536 } 1537 1538 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1539 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1540 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1541 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1542 txq->sw_tx_ring.skbs[idx].skb = NULL; 1543 1544 return 0; 1545 } 1546 1547 static int qede_selftest_receive_traffic(struct qede_dev *edev) 1548 { 1549 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len; 1550 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1551 struct qede_rx_queue *rxq = NULL; 1552 struct sw_rx_data *sw_rx_data; 1553 union eth_rx_cqe *cqe; 1554 int i, iter, rc = 0; 1555 u8 *data_ptr; 1556 1557 for_each_queue(i) { 1558 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1559 rxq = edev->fp_array[i].rxq; 1560 break; 1561 } 1562 } 1563 1564 if (!rxq) { 1565 DP_NOTICE(edev, "Rx path is not available\n"); 1566 return -1; 1567 } 1568 1569 /* The packet is expected to receive on rx-queue 0 even though RSS is 1570 * enabled. This is because the queue 0 is configured as the default 1571 * queue and that the loopback traffic is not IP. 1572 */ 1573 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1574 if (!qede_has_rx_work(rxq)) { 1575 usleep_range(100, 200); 1576 continue; 1577 } 1578 1579 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); 1580 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); 1581 1582 /* Memory barrier to prevent the CPU from doing speculative 1583 * reads of CQE/BD before reading hw_comp_cons. If the CQE is 1584 * read before it is written by FW, then FW writes CQE and SB, 1585 * and then the CPU reads the hw_comp_cons, it will use an old 1586 * CQE. 1587 */ 1588 rmb(); 1589 1590 /* Get the CQE from the completion ring */ 1591 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1592 1593 /* Get the data from the SW ring */ 1594 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1595 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1596 fp_cqe = &cqe->fast_path_regular; 1597 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1598 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1599 fp_cqe->placement_offset + 1600 sw_rx_data->page_offset + 1601 rxq->rx_headroom); 1602 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1603 ether_addr_equal(data_ptr + ETH_ALEN, 1604 edev->ndev->dev_addr)) { 1605 for (i = ETH_HLEN; i < len; i++) 1606 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1607 rc = -1; 1608 break; 1609 } 1610 1611 qede_recycle_rx_bd_ring(rxq, 1); 1612 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1613 break; 1614 } 1615 1616 DP_INFO(edev, "Not the transmitted packet\n"); 1617 qede_recycle_rx_bd_ring(rxq, 1); 1618 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1619 } 1620 1621 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1622 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1623 return -1; 1624 } 1625 1626 qede_update_rx_prod(edev, rxq); 1627 1628 return rc; 1629 } 1630 1631 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1632 { 1633 struct qed_link_params link_params; 1634 struct sk_buff *skb = NULL; 1635 int rc = 0, i; 1636 u32 pkt_size; 1637 u8 *packet; 1638 1639 if (!netif_running(edev->ndev)) { 1640 DP_NOTICE(edev, "Interface is down\n"); 1641 return -EINVAL; 1642 } 1643 1644 qede_netif_stop(edev); 1645 1646 /* Bring up the link in Loopback mode */ 1647 memset(&link_params, 0, sizeof(link_params)); 1648 link_params.link_up = true; 1649 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1650 link_params.loopback_mode = loopback_mode; 1651 edev->ops->common->set_link(edev->cdev, &link_params); 1652 1653 /* Wait for loopback configuration to apply */ 1654 msleep_interruptible(500); 1655 1656 /* prepare the loopback packet */ 1657 pkt_size = edev->ndev->mtu + ETH_HLEN; 1658 1659 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1660 if (!skb) { 1661 DP_INFO(edev, "Can't allocate skb\n"); 1662 rc = -ENOMEM; 1663 goto test_loopback_exit; 1664 } 1665 packet = skb_put(skb, pkt_size); 1666 ether_addr_copy(packet, edev->ndev->dev_addr); 1667 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1668 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1669 for (i = ETH_HLEN; i < pkt_size; i++) 1670 packet[i] = (unsigned char)(i & 0xff); 1671 1672 rc = qede_selftest_transmit_traffic(edev, skb); 1673 if (rc) 1674 goto test_loopback_exit; 1675 1676 rc = qede_selftest_receive_traffic(edev); 1677 if (rc) 1678 goto test_loopback_exit; 1679 1680 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1681 1682 test_loopback_exit: 1683 dev_kfree_skb(skb); 1684 1685 /* Bring up the link in Normal mode */ 1686 memset(&link_params, 0, sizeof(link_params)); 1687 link_params.link_up = true; 1688 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1689 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1690 edev->ops->common->set_link(edev->cdev, &link_params); 1691 1692 /* Wait for loopback configuration to apply */ 1693 msleep_interruptible(500); 1694 1695 qede_netif_start(edev); 1696 1697 return rc; 1698 } 1699 1700 static void qede_self_test(struct net_device *dev, 1701 struct ethtool_test *etest, u64 *buf) 1702 { 1703 struct qede_dev *edev = netdev_priv(dev); 1704 1705 DP_VERBOSE(edev, QED_MSG_DEBUG, 1706 "Self-test command parameters: offline = %d, external_lb = %d\n", 1707 (etest->flags & ETH_TEST_FL_OFFLINE), 1708 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1709 1710 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1711 1712 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1713 if (qede_selftest_run_loopback(edev, 1714 QED_LINK_LOOPBACK_INT_PHY)) { 1715 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1716 etest->flags |= ETH_TEST_FL_FAILED; 1717 } 1718 } 1719 1720 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1721 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1722 etest->flags |= ETH_TEST_FL_FAILED; 1723 } 1724 1725 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1726 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1727 etest->flags |= ETH_TEST_FL_FAILED; 1728 } 1729 1730 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1731 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1732 etest->flags |= ETH_TEST_FL_FAILED; 1733 } 1734 1735 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1736 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1737 etest->flags |= ETH_TEST_FL_FAILED; 1738 } 1739 1740 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1741 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1742 etest->flags |= ETH_TEST_FL_FAILED; 1743 } 1744 } 1745 1746 static int qede_set_tunable(struct net_device *dev, 1747 const struct ethtool_tunable *tuna, 1748 const void *data) 1749 { 1750 struct qede_dev *edev = netdev_priv(dev); 1751 u32 val; 1752 1753 switch (tuna->id) { 1754 case ETHTOOL_RX_COPYBREAK: 1755 val = *(u32 *)data; 1756 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1757 DP_VERBOSE(edev, QED_MSG_DEBUG, 1758 "Invalid rx copy break value, range is [%u, %u]", 1759 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1760 return -EINVAL; 1761 } 1762 1763 edev->rx_copybreak = *(u32 *)data; 1764 break; 1765 default: 1766 return -EOPNOTSUPP; 1767 } 1768 1769 return 0; 1770 } 1771 1772 static int qede_get_tunable(struct net_device *dev, 1773 const struct ethtool_tunable *tuna, void *data) 1774 { 1775 struct qede_dev *edev = netdev_priv(dev); 1776 1777 switch (tuna->id) { 1778 case ETHTOOL_RX_COPYBREAK: 1779 *(u32 *)data = edev->rx_copybreak; 1780 break; 1781 default: 1782 return -EOPNOTSUPP; 1783 } 1784 1785 return 0; 1786 } 1787 1788 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1789 { 1790 struct qede_dev *edev = netdev_priv(dev); 1791 struct qed_link_output current_link; 1792 1793 memset(¤t_link, 0, sizeof(current_link)); 1794 edev->ops->common->get_link(edev->cdev, ¤t_link); 1795 1796 if (!current_link.eee_supported) { 1797 DP_INFO(edev, "EEE is not supported\n"); 1798 return -EOPNOTSUPP; 1799 } 1800 1801 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1802 edata->advertised = ADVERTISED_1000baseT_Full; 1803 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1804 edata->advertised |= ADVERTISED_10000baseT_Full; 1805 if (current_link.sup_caps & QED_EEE_1G_ADV) 1806 edata->supported = ADVERTISED_1000baseT_Full; 1807 if (current_link.sup_caps & QED_EEE_10G_ADV) 1808 edata->supported |= ADVERTISED_10000baseT_Full; 1809 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1810 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1811 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1812 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1813 1814 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1815 edata->eee_enabled = current_link.eee.enable; 1816 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1817 edata->eee_active = current_link.eee_active; 1818 1819 return 0; 1820 } 1821 1822 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1823 { 1824 struct qede_dev *edev = netdev_priv(dev); 1825 struct qed_link_output current_link; 1826 struct qed_link_params params; 1827 1828 if (!edev->ops->common->can_link_change(edev->cdev)) { 1829 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1830 return -EOPNOTSUPP; 1831 } 1832 1833 memset(¤t_link, 0, sizeof(current_link)); 1834 edev->ops->common->get_link(edev->cdev, ¤t_link); 1835 1836 if (!current_link.eee_supported) { 1837 DP_INFO(edev, "EEE is not supported\n"); 1838 return -EOPNOTSUPP; 1839 } 1840 1841 memset(¶ms, 0, sizeof(params)); 1842 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1843 1844 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1845 ADVERTISED_10000baseT_Full)) || 1846 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1847 ADVERTISED_10000baseT_Full)) != 1848 edata->advertised)) { 1849 DP_VERBOSE(edev, QED_MSG_DEBUG, 1850 "Invalid advertised capabilities %d\n", 1851 edata->advertised); 1852 return -EINVAL; 1853 } 1854 1855 if (edata->advertised & ADVERTISED_1000baseT_Full) 1856 params.eee.adv_caps = QED_EEE_1G_ADV; 1857 if (edata->advertised & ADVERTISED_10000baseT_Full) 1858 params.eee.adv_caps |= QED_EEE_10G_ADV; 1859 params.eee.enable = edata->eee_enabled; 1860 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1861 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1862 1863 params.link_up = true; 1864 edev->ops->common->set_link(edev->cdev, ¶ms); 1865 1866 return 0; 1867 } 1868 1869 static int qede_get_module_info(struct net_device *dev, 1870 struct ethtool_modinfo *modinfo) 1871 { 1872 struct qede_dev *edev = netdev_priv(dev); 1873 u8 buf[4]; 1874 int rc; 1875 1876 /* Read first 4 bytes to find the sfp type */ 1877 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1878 QED_I2C_DEV_ADDR_A0, 0, 4); 1879 if (rc) { 1880 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc); 1881 return rc; 1882 } 1883 1884 switch (buf[0]) { 1885 case 0x3: /* SFP, SFP+, SFP-28 */ 1886 modinfo->type = ETH_MODULE_SFF_8472; 1887 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1888 break; 1889 case 0xc: /* QSFP */ 1890 case 0xd: /* QSFP+ */ 1891 modinfo->type = ETH_MODULE_SFF_8436; 1892 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1893 break; 1894 case 0x11: /* QSFP-28 */ 1895 modinfo->type = ETH_MODULE_SFF_8636; 1896 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1897 break; 1898 default: 1899 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]); 1900 return -EINVAL; 1901 } 1902 1903 return 0; 1904 } 1905 1906 static int qede_get_module_eeprom(struct net_device *dev, 1907 struct ethtool_eeprom *ee, u8 *data) 1908 { 1909 struct qede_dev *edev = netdev_priv(dev); 1910 u32 start_addr = ee->offset, size = 0; 1911 u8 *buf = data; 1912 int rc = 0; 1913 1914 /* Read A0 section */ 1915 if (ee->offset < ETH_MODULE_SFF_8079_LEN) { 1916 /* Limit transfer size to the A0 section boundary */ 1917 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN) 1918 size = ETH_MODULE_SFF_8079_LEN - ee->offset; 1919 else 1920 size = ee->len; 1921 1922 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1923 QED_I2C_DEV_ADDR_A0, 1924 start_addr, size); 1925 if (rc) { 1926 DP_ERR(edev, "Failed reading A0 section %d\n", rc); 1927 return rc; 1928 } 1929 1930 buf += size; 1931 start_addr += size; 1932 } 1933 1934 /* Read A2 section */ 1935 if (start_addr >= ETH_MODULE_SFF_8079_LEN && 1936 start_addr < ETH_MODULE_SFF_8472_LEN) { 1937 size = ee->len - size; 1938 /* Limit transfer size to the A2 section boundary */ 1939 if (start_addr + size > ETH_MODULE_SFF_8472_LEN) 1940 size = ETH_MODULE_SFF_8472_LEN - start_addr; 1941 start_addr -= ETH_MODULE_SFF_8079_LEN; 1942 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1943 QED_I2C_DEV_ADDR_A2, 1944 start_addr, size); 1945 if (rc) { 1946 DP_VERBOSE(edev, QED_MSG_DEBUG, 1947 "Failed reading A2 section %d\n", rc); 1948 return 0; 1949 } 1950 } 1951 1952 return rc; 1953 } 1954 1955 static const struct ethtool_ops qede_ethtool_ops = { 1956 .get_link_ksettings = qede_get_link_ksettings, 1957 .set_link_ksettings = qede_set_link_ksettings, 1958 .get_drvinfo = qede_get_drvinfo, 1959 .get_regs_len = qede_get_regs_len, 1960 .get_regs = qede_get_regs, 1961 .get_wol = qede_get_wol, 1962 .set_wol = qede_set_wol, 1963 .get_msglevel = qede_get_msglevel, 1964 .set_msglevel = qede_set_msglevel, 1965 .nway_reset = qede_nway_reset, 1966 .get_link = qede_get_link, 1967 .get_coalesce = qede_get_coalesce, 1968 .set_coalesce = qede_set_coalesce, 1969 .get_ringparam = qede_get_ringparam, 1970 .set_ringparam = qede_set_ringparam, 1971 .get_pauseparam = qede_get_pauseparam, 1972 .set_pauseparam = qede_set_pauseparam, 1973 .get_strings = qede_get_strings, 1974 .set_phys_id = qede_set_phys_id, 1975 .get_ethtool_stats = qede_get_ethtool_stats, 1976 .get_priv_flags = qede_get_priv_flags, 1977 .get_sset_count = qede_get_sset_count, 1978 .get_rxnfc = qede_get_rxnfc, 1979 .set_rxnfc = qede_set_rxnfc, 1980 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 1981 .get_rxfh_key_size = qede_get_rxfh_key_size, 1982 .get_rxfh = qede_get_rxfh, 1983 .set_rxfh = qede_set_rxfh, 1984 .get_ts_info = qede_get_ts_info, 1985 .get_channels = qede_get_channels, 1986 .set_channels = qede_set_channels, 1987 .self_test = qede_self_test, 1988 .get_module_info = qede_get_module_info, 1989 .get_module_eeprom = qede_get_module_eeprom, 1990 .get_eee = qede_get_eee, 1991 .set_eee = qede_set_eee, 1992 1993 .get_tunable = qede_get_tunable, 1994 .set_tunable = qede_set_tunable, 1995 .flash_device = qede_flash_device, 1996 }; 1997 1998 static const struct ethtool_ops qede_vf_ethtool_ops = { 1999 .get_link_ksettings = qede_get_link_ksettings, 2000 .get_drvinfo = qede_get_drvinfo, 2001 .get_msglevel = qede_get_msglevel, 2002 .set_msglevel = qede_set_msglevel, 2003 .get_link = qede_get_link, 2004 .get_coalesce = qede_get_coalesce, 2005 .set_coalesce = qede_set_coalesce, 2006 .get_ringparam = qede_get_ringparam, 2007 .set_ringparam = qede_set_ringparam, 2008 .get_strings = qede_get_strings, 2009 .get_ethtool_stats = qede_get_ethtool_stats, 2010 .get_priv_flags = qede_get_priv_flags, 2011 .get_sset_count = qede_get_sset_count, 2012 .get_rxnfc = qede_get_rxnfc, 2013 .set_rxnfc = qede_set_rxnfc, 2014 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2015 .get_rxfh_key_size = qede_get_rxfh_key_size, 2016 .get_rxfh = qede_get_rxfh, 2017 .set_rxfh = qede_set_rxfh, 2018 .get_channels = qede_get_channels, 2019 .set_channels = qede_set_channels, 2020 .get_tunable = qede_get_tunable, 2021 .set_tunable = qede_set_tunable, 2022 }; 2023 2024 void qede_set_ethtool_ops(struct net_device *dev) 2025 { 2026 struct qede_dev *edev = netdev_priv(dev); 2027 2028 if (IS_VF(edev)) 2029 dev->ethtool_ops = &qede_vf_ethtool_ops; 2030 else 2031 dev->ethtool_ops = &qede_ethtool_ops; 2032 } 2033