1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #ifndef _QEDE_H_ 33 #define _QEDE_H_ 34 #include <linux/compiler.h> 35 #include <linux/version.h> 36 #include <linux/workqueue.h> 37 #include <linux/netdevice.h> 38 #include <linux/interrupt.h> 39 #include <linux/bitmap.h> 40 #include <linux/kernel.h> 41 #include <linux/mutex.h> 42 #include <linux/bpf.h> 43 #include <net/xdp.h> 44 #include <linux/qed/qede_rdma.h> 45 #include <linux/io.h> 46 #ifdef CONFIG_RFS_ACCEL 47 #include <linux/cpu_rmap.h> 48 #endif 49 #include <linux/qed/common_hsi.h> 50 #include <linux/qed/eth_common.h> 51 #include <linux/qed/qed_if.h> 52 #include <linux/qed/qed_chain.h> 53 #include <linux/qed/qed_eth_if.h> 54 55 #include <net/pkt_cls.h> 56 #include <net/tc_act/tc_gact.h> 57 58 #define QEDE_MAJOR_VERSION 8 59 #define QEDE_MINOR_VERSION 33 60 #define QEDE_REVISION_VERSION 0 61 #define QEDE_ENGINEERING_VERSION 20 62 #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "." \ 63 __stringify(QEDE_MINOR_VERSION) "." \ 64 __stringify(QEDE_REVISION_VERSION) "." \ 65 __stringify(QEDE_ENGINEERING_VERSION) 66 67 #define DRV_MODULE_SYM qede 68 69 struct qede_stats_common { 70 u64 no_buff_discards; 71 u64 packet_too_big_discard; 72 u64 ttl0_discard; 73 u64 rx_ucast_bytes; 74 u64 rx_mcast_bytes; 75 u64 rx_bcast_bytes; 76 u64 rx_ucast_pkts; 77 u64 rx_mcast_pkts; 78 u64 rx_bcast_pkts; 79 u64 mftag_filter_discards; 80 u64 mac_filter_discards; 81 u64 gft_filter_drop; 82 u64 tx_ucast_bytes; 83 u64 tx_mcast_bytes; 84 u64 tx_bcast_bytes; 85 u64 tx_ucast_pkts; 86 u64 tx_mcast_pkts; 87 u64 tx_bcast_pkts; 88 u64 tx_err_drop_pkts; 89 u64 coalesced_pkts; 90 u64 coalesced_events; 91 u64 coalesced_aborts_num; 92 u64 non_coalesced_pkts; 93 u64 coalesced_bytes; 94 u64 link_change_count; 95 96 /* port */ 97 u64 rx_64_byte_packets; 98 u64 rx_65_to_127_byte_packets; 99 u64 rx_128_to_255_byte_packets; 100 u64 rx_256_to_511_byte_packets; 101 u64 rx_512_to_1023_byte_packets; 102 u64 rx_1024_to_1518_byte_packets; 103 u64 rx_crc_errors; 104 u64 rx_mac_crtl_frames; 105 u64 rx_pause_frames; 106 u64 rx_pfc_frames; 107 u64 rx_align_errors; 108 u64 rx_carrier_errors; 109 u64 rx_oversize_packets; 110 u64 rx_jabbers; 111 u64 rx_undersize_packets; 112 u64 rx_fragments; 113 u64 tx_64_byte_packets; 114 u64 tx_65_to_127_byte_packets; 115 u64 tx_128_to_255_byte_packets; 116 u64 tx_256_to_511_byte_packets; 117 u64 tx_512_to_1023_byte_packets; 118 u64 tx_1024_to_1518_byte_packets; 119 u64 tx_pause_frames; 120 u64 tx_pfc_frames; 121 u64 brb_truncates; 122 u64 brb_discards; 123 u64 tx_mac_ctrl_frames; 124 }; 125 126 struct qede_stats_bb { 127 u64 rx_1519_to_1522_byte_packets; 128 u64 rx_1519_to_2047_byte_packets; 129 u64 rx_2048_to_4095_byte_packets; 130 u64 rx_4096_to_9216_byte_packets; 131 u64 rx_9217_to_16383_byte_packets; 132 u64 tx_1519_to_2047_byte_packets; 133 u64 tx_2048_to_4095_byte_packets; 134 u64 tx_4096_to_9216_byte_packets; 135 u64 tx_9217_to_16383_byte_packets; 136 u64 tx_lpi_entry_count; 137 u64 tx_total_collisions; 138 }; 139 140 struct qede_stats_ah { 141 u64 rx_1519_to_max_byte_packets; 142 u64 tx_1519_to_max_byte_packets; 143 }; 144 145 struct qede_stats { 146 struct qede_stats_common common; 147 148 union { 149 struct qede_stats_bb bb; 150 struct qede_stats_ah ah; 151 }; 152 }; 153 154 struct qede_vlan { 155 struct list_head list; 156 u16 vid; 157 bool configured; 158 }; 159 160 struct qede_rdma_dev { 161 struct qedr_dev *qedr_dev; 162 struct list_head entry; 163 struct list_head rdma_event_list; 164 struct workqueue_struct *rdma_wq; 165 }; 166 167 struct qede_ptp; 168 169 #define QEDE_RFS_MAX_FLTR 256 170 171 enum qede_flags_bit { 172 QEDE_FLAGS_IS_VF = 0, 173 QEDE_FLAGS_LINK_REQUESTED, 174 QEDE_FLAGS_PTP_TX_IN_PRORGESS, 175 QEDE_FLAGS_TX_TIMESTAMPING_EN 176 }; 177 178 struct qede_dev { 179 struct qed_dev *cdev; 180 struct net_device *ndev; 181 struct pci_dev *pdev; 182 183 u32 dp_module; 184 u8 dp_level; 185 186 unsigned long flags; 187 #define IS_VF(edev) (test_bit(QEDE_FLAGS_IS_VF, &(edev)->flags)) 188 189 const struct qed_eth_ops *ops; 190 struct qede_ptp *ptp; 191 192 struct qed_dev_eth_info dev_info; 193 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues) 194 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues) 195 #define QEDE_IS_BB(edev) \ 196 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB) 197 #define QEDE_IS_AH(edev) \ 198 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH) 199 200 struct qede_fastpath *fp_array; 201 u8 req_num_tx; 202 u8 fp_num_tx; 203 u8 req_num_rx; 204 u8 fp_num_rx; 205 u16 req_queues; 206 u16 num_queues; 207 #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues) 208 #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx) 209 #define QEDE_RX_QUEUE_IDX(edev, i) (i) 210 #define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx) 211 212 struct qed_int_info int_info; 213 214 /* Smaller private varaiant of the RTNL lock */ 215 struct mutex qede_lock; 216 u32 state; /* Protected by qede_lock */ 217 u16 rx_buf_size; 218 u32 rx_copybreak; 219 220 /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */ 221 #define ETH_OVERHEAD (ETH_HLEN + 8 + 8) 222 /* Max supported alignment is 256 (8 shift) 223 * minimal alignment shift 6 is optimal for 57xxx HW performance 224 */ 225 #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT)) 226 /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes 227 * at the end of skb->data, to avoid wasting a full cache line. 228 * This reduces memory use (skb->truesize). 229 */ 230 #define QEDE_FW_RX_ALIGN_END \ 231 max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \ 232 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 233 234 struct qede_stats stats; 235 #define QEDE_RSS_INDIR_INITED BIT(0) 236 #define QEDE_RSS_KEY_INITED BIT(1) 237 #define QEDE_RSS_CAPS_INITED BIT(2) 238 u32 rss_params_inited; /* bit-field to track initialized rss params */ 239 u16 rss_ind_table[128]; 240 u32 rss_key[10]; 241 u8 rss_caps; 242 243 u16 q_num_rx_buffers; /* Must be a power of two */ 244 u16 q_num_tx_buffers; /* Must be a power of two */ 245 246 bool gro_disable; 247 struct list_head vlan_list; 248 u16 configured_vlans; 249 u16 non_configured_vlans; 250 bool accept_any_vlan; 251 struct delayed_work sp_task; 252 unsigned long sp_flags; 253 u16 vxlan_dst_port; 254 u16 geneve_dst_port; 255 256 struct qede_arfs *arfs; 257 bool wol_enabled; 258 259 struct qede_rdma_dev rdma_info; 260 261 struct bpf_prog *xdp_prog; 262 }; 263 264 enum QEDE_STATE { 265 QEDE_STATE_CLOSED, 266 QEDE_STATE_OPEN, 267 }; 268 269 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) 270 271 #define MAX_NUM_TC 8 272 #define MAX_NUM_PRI 8 273 274 /* The driver supports the new build_skb() API: 275 * RX ring buffer contains pointer to kmalloc() data only, 276 * skb are built only after the frame was DMA-ed. 277 */ 278 struct sw_rx_data { 279 struct page *data; 280 dma_addr_t mapping; 281 unsigned int page_offset; 282 }; 283 284 enum qede_agg_state { 285 QEDE_AGG_STATE_NONE = 0, 286 QEDE_AGG_STATE_START = 1, 287 QEDE_AGG_STATE_ERROR = 2 288 }; 289 290 struct qede_agg_info { 291 /* rx_buf is a data buffer that can be placed / consumed from rx bd 292 * chain. It has two purposes: We will preallocate the data buffer 293 * for each aggregation when we open the interface and will place this 294 * buffer on the rx-bd-ring when we receive TPA_START. We don't want 295 * to be in a state where allocation fails, as we can't reuse the 296 * consumer buffer in the rx-chain since FW may still be writing to it 297 * (since header needs to be modified for TPA). 298 * The second purpose is to keep a pointer to the bd buffer during 299 * aggregation. 300 */ 301 struct sw_rx_data buffer; 302 struct sk_buff *skb; 303 304 /* We need some structs from the start cookie until termination */ 305 u16 vlan_tag; 306 307 bool tpa_start_fail; 308 u8 state; 309 u8 frag_id; 310 311 u8 tunnel_type; 312 }; 313 314 struct qede_rx_queue { 315 __le16 *hw_cons_ptr; 316 void __iomem *hw_rxq_prod_addr; 317 318 /* Required for the allocation of replacement buffers */ 319 struct device *dev; 320 321 struct bpf_prog *xdp_prog; 322 323 u16 sw_rx_cons; 324 u16 sw_rx_prod; 325 326 u16 filled_buffers; 327 u8 data_direction; 328 u8 rxq_id; 329 330 /* Used once per each NAPI run */ 331 u16 num_rx_buffers; 332 333 u16 rx_headroom; 334 335 u32 rx_buf_size; 336 u32 rx_buf_seg_size; 337 338 struct sw_rx_data *sw_rx_ring; 339 struct qed_chain rx_bd_ring; 340 struct qed_chain rx_comp_ring ____cacheline_aligned; 341 342 /* GRO */ 343 struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM]; 344 345 /* Used once per each NAPI run */ 346 u64 rcv_pkts; 347 348 u64 rx_hw_errors; 349 u64 rx_alloc_errors; 350 u64 rx_ip_frags; 351 352 u64 xdp_no_pass; 353 354 void *handle; 355 struct xdp_rxq_info xdp_rxq; 356 }; 357 358 union db_prod { 359 struct eth_db_data data; 360 u32 raw; 361 }; 362 363 struct sw_tx_bd { 364 struct sk_buff *skb; 365 u8 flags; 366 /* Set on the first BD descriptor when there is a split BD */ 367 #define QEDE_TSO_SPLIT_BD BIT(0) 368 }; 369 370 struct sw_tx_xdp { 371 struct page *page; 372 dma_addr_t mapping; 373 }; 374 375 struct qede_tx_queue { 376 u8 is_xdp; 377 bool is_legacy; 378 u16 sw_tx_cons; 379 u16 sw_tx_prod; 380 u16 num_tx_buffers; /* Slowpath only */ 381 382 u64 xmit_pkts; 383 u64 stopped_cnt; 384 u64 tx_mem_alloc_err; 385 386 __le16 *hw_cons_ptr; 387 388 /* Needed for the mapping of packets */ 389 struct device *dev; 390 391 void __iomem *doorbell_addr; 392 union db_prod tx_db; 393 int index; /* Slowpath only */ 394 #define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \ 395 QEDE_MAX_TSS_CNT(edev)) 396 #define QEDE_TXQ_IDX_TO_XDP(edev, idx) ((idx) + QEDE_MAX_TSS_CNT(edev)) 397 #define QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx) ((edev)->fp_num_rx + \ 398 ((idx) % QEDE_TSS_COUNT(edev))) 399 #define QEDE_NDEV_TXQ_ID_TO_TXQ_COS(edev, idx) ((idx) / QEDE_TSS_COUNT(edev)) 400 #define QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq) ((QEDE_TSS_COUNT(edev) * \ 401 (txq)->cos) + (txq)->index) 402 #define QEDE_NDEV_TXQ_ID_TO_TXQ(edev, idx) \ 403 (&((edev)->fp_array[QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx)].txq \ 404 [QEDE_NDEV_TXQ_ID_TO_TXQ_COS(edev, idx)])) 405 #define QEDE_FP_TC0_TXQ(fp) (&((fp)->txq[0])) 406 407 /* Regular Tx requires skb + metadata for release purpose, 408 * while XDP requires the pages and the mapped address. 409 */ 410 union { 411 struct sw_tx_bd *skbs; 412 struct sw_tx_xdp *xdp; 413 } sw_tx_ring; 414 415 struct qed_chain tx_pbl; 416 417 /* Slowpath; Should be kept in end [unless missing padding] */ 418 void *handle; 419 u16 cos; 420 u16 ndev_txq_id; 421 }; 422 423 #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \ 424 le32_to_cpu((bd)->addr.lo)) 425 #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \ 426 do { \ 427 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \ 428 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \ 429 (bd)->nbytes = cpu_to_le16(len); \ 430 } while (0) 431 #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes)) 432 433 struct qede_fastpath { 434 struct qede_dev *edev; 435 #define QEDE_FASTPATH_TX BIT(0) 436 #define QEDE_FASTPATH_RX BIT(1) 437 #define QEDE_FASTPATH_XDP BIT(2) 438 #define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX) 439 u8 type; 440 u8 id; 441 u8 xdp_xmit; 442 struct napi_struct napi; 443 struct qed_sb_info *sb_info; 444 struct qede_rx_queue *rxq; 445 struct qede_tx_queue *txq; 446 struct qede_tx_queue *xdp_tx; 447 448 #define VEC_NAME_SIZE (FIELD_SIZEOF(struct net_device, name) + 8) 449 char name[VEC_NAME_SIZE]; 450 }; 451 452 /* Debug print definitions */ 453 #define DP_NAME(edev) ((edev)->ndev->name) 454 455 #define XMIT_PLAIN 0 456 #define XMIT_L4_CSUM BIT(0) 457 #define XMIT_LSO BIT(1) 458 #define XMIT_ENC BIT(2) 459 #define XMIT_ENC_GSO_L4_CSUM BIT(3) 460 461 #define QEDE_CSUM_ERROR BIT(0) 462 #define QEDE_CSUM_UNNECESSARY BIT(1) 463 #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2) 464 465 #define QEDE_SP_RX_MODE 1 466 467 #ifdef CONFIG_RFS_ACCEL 468 int qede_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb, 469 u16 rxq_index, u32 flow_id); 470 #define QEDE_SP_ARFS_CONFIG 4 471 #define QEDE_SP_TASK_POLL_DELAY (5 * HZ) 472 #endif 473 474 void qede_process_arfs_filters(struct qede_dev *edev, bool free_fltr); 475 void qede_poll_for_freeing_arfs_filters(struct qede_dev *edev); 476 void qede_arfs_filter_op(void *dev, void *filter, u8 fw_rc); 477 void qede_free_arfs(struct qede_dev *edev); 478 int qede_alloc_arfs(struct qede_dev *edev); 479 int qede_add_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info); 480 int qede_delete_flow_filter(struct qede_dev *edev, u64 cookie); 481 int qede_get_cls_rule_entry(struct qede_dev *edev, struct ethtool_rxnfc *cmd); 482 int qede_get_cls_rule_all(struct qede_dev *edev, struct ethtool_rxnfc *info, 483 u32 *rule_locs); 484 int qede_get_arfs_filter_count(struct qede_dev *edev); 485 486 struct qede_reload_args { 487 void (*func)(struct qede_dev *edev, struct qede_reload_args *args); 488 union { 489 netdev_features_t features; 490 struct bpf_prog *new_prog; 491 u16 mtu; 492 } u; 493 }; 494 495 /* Datapath functions definition */ 496 netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev); 497 netdev_features_t qede_features_check(struct sk_buff *skb, 498 struct net_device *dev, 499 netdev_features_t features); 500 void qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp); 501 int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy); 502 int qede_free_tx_pkt(struct qede_dev *edev, 503 struct qede_tx_queue *txq, int *len); 504 int qede_poll(struct napi_struct *napi, int budget); 505 irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie); 506 507 /* Filtering function definitions */ 508 void qede_force_mac(void *dev, u8 *mac, bool forced); 509 void qede_udp_ports_update(void *dev, u16 vxlan_port, u16 geneve_port); 510 int qede_set_mac_addr(struct net_device *ndev, void *p); 511 512 int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid); 513 int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid); 514 void qede_vlan_mark_nonconfigured(struct qede_dev *edev); 515 int qede_configure_vlan_filters(struct qede_dev *edev); 516 517 netdev_features_t qede_fix_features(struct net_device *dev, 518 netdev_features_t features); 519 int qede_set_features(struct net_device *dev, netdev_features_t features); 520 void qede_set_rx_mode(struct net_device *ndev); 521 void qede_config_rx_mode(struct net_device *ndev); 522 void qede_fill_rss_params(struct qede_dev *edev, 523 struct qed_update_vport_rss_params *rss, u8 *update); 524 525 void qede_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti); 526 void qede_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti); 527 528 int qede_xdp(struct net_device *dev, struct netdev_bpf *xdp); 529 530 #ifdef CONFIG_DCB 531 void qede_set_dcbnl_ops(struct net_device *ndev); 532 #endif 533 534 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level); 535 void qede_set_ethtool_ops(struct net_device *netdev); 536 void qede_reload(struct qede_dev *edev, 537 struct qede_reload_args *args, bool is_locked); 538 int qede_change_mtu(struct net_device *dev, int new_mtu); 539 void qede_fill_by_demand_stats(struct qede_dev *edev); 540 void __qede_lock(struct qede_dev *edev); 541 void __qede_unlock(struct qede_dev *edev); 542 bool qede_has_rx_work(struct qede_rx_queue *rxq); 543 int qede_txq_has_work(struct qede_tx_queue *txq); 544 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count); 545 void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq); 546 int qede_add_tc_flower_fltr(struct qede_dev *edev, __be16 proto, 547 struct tc_cls_flower_offload *f); 548 549 #define RX_RING_SIZE_POW 13 550 #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW)) 551 #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1) 552 #define NUM_RX_BDS_MIN 128 553 #define NUM_RX_BDS_DEF ((u16)BIT(10) - 1) 554 555 #define TX_RING_SIZE_POW 13 556 #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW)) 557 #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1) 558 #define NUM_TX_BDS_MIN 128 559 #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX 560 561 #define QEDE_MIN_PKT_LEN 64 562 #define QEDE_RX_HDR_SIZE 256 563 #define QEDE_MAX_JUMBO_PACKET_SIZE 9600 564 #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++) 565 #define for_each_cos_in_txq(edev, var) \ 566 for ((var) = 0; (var) < (edev)->dev_info.num_tc; (var)++) 567 568 #endif /* _QEDE_H_ */ 569