1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #ifndef _QEDE_H_ 33 #define _QEDE_H_ 34 #include <linux/compiler.h> 35 #include <linux/version.h> 36 #include <linux/workqueue.h> 37 #include <linux/netdevice.h> 38 #include <linux/interrupt.h> 39 #include <linux/bitmap.h> 40 #include <linux/kernel.h> 41 #include <linux/mutex.h> 42 #include <linux/bpf.h> 43 #include <net/xdp.h> 44 #include <linux/qed/qede_rdma.h> 45 #include <linux/io.h> 46 #ifdef CONFIG_RFS_ACCEL 47 #include <linux/cpu_rmap.h> 48 #endif 49 #include <linux/qed/common_hsi.h> 50 #include <linux/qed/eth_common.h> 51 #include <linux/qed/qed_if.h> 52 #include <linux/qed/qed_chain.h> 53 #include <linux/qed/qed_eth_if.h> 54 55 #define QEDE_MAJOR_VERSION 8 56 #define QEDE_MINOR_VERSION 33 57 #define QEDE_REVISION_VERSION 0 58 #define QEDE_ENGINEERING_VERSION 20 59 #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "." \ 60 __stringify(QEDE_MINOR_VERSION) "." \ 61 __stringify(QEDE_REVISION_VERSION) "." \ 62 __stringify(QEDE_ENGINEERING_VERSION) 63 64 #define DRV_MODULE_SYM qede 65 66 struct qede_stats_common { 67 u64 no_buff_discards; 68 u64 packet_too_big_discard; 69 u64 ttl0_discard; 70 u64 rx_ucast_bytes; 71 u64 rx_mcast_bytes; 72 u64 rx_bcast_bytes; 73 u64 rx_ucast_pkts; 74 u64 rx_mcast_pkts; 75 u64 rx_bcast_pkts; 76 u64 mftag_filter_discards; 77 u64 mac_filter_discards; 78 u64 gft_filter_drop; 79 u64 tx_ucast_bytes; 80 u64 tx_mcast_bytes; 81 u64 tx_bcast_bytes; 82 u64 tx_ucast_pkts; 83 u64 tx_mcast_pkts; 84 u64 tx_bcast_pkts; 85 u64 tx_err_drop_pkts; 86 u64 coalesced_pkts; 87 u64 coalesced_events; 88 u64 coalesced_aborts_num; 89 u64 non_coalesced_pkts; 90 u64 coalesced_bytes; 91 u64 link_change_count; 92 93 /* port */ 94 u64 rx_64_byte_packets; 95 u64 rx_65_to_127_byte_packets; 96 u64 rx_128_to_255_byte_packets; 97 u64 rx_256_to_511_byte_packets; 98 u64 rx_512_to_1023_byte_packets; 99 u64 rx_1024_to_1518_byte_packets; 100 u64 rx_crc_errors; 101 u64 rx_mac_crtl_frames; 102 u64 rx_pause_frames; 103 u64 rx_pfc_frames; 104 u64 rx_align_errors; 105 u64 rx_carrier_errors; 106 u64 rx_oversize_packets; 107 u64 rx_jabbers; 108 u64 rx_undersize_packets; 109 u64 rx_fragments; 110 u64 tx_64_byte_packets; 111 u64 tx_65_to_127_byte_packets; 112 u64 tx_128_to_255_byte_packets; 113 u64 tx_256_to_511_byte_packets; 114 u64 tx_512_to_1023_byte_packets; 115 u64 tx_1024_to_1518_byte_packets; 116 u64 tx_pause_frames; 117 u64 tx_pfc_frames; 118 u64 brb_truncates; 119 u64 brb_discards; 120 u64 tx_mac_ctrl_frames; 121 }; 122 123 struct qede_stats_bb { 124 u64 rx_1519_to_1522_byte_packets; 125 u64 rx_1519_to_2047_byte_packets; 126 u64 rx_2048_to_4095_byte_packets; 127 u64 rx_4096_to_9216_byte_packets; 128 u64 rx_9217_to_16383_byte_packets; 129 u64 tx_1519_to_2047_byte_packets; 130 u64 tx_2048_to_4095_byte_packets; 131 u64 tx_4096_to_9216_byte_packets; 132 u64 tx_9217_to_16383_byte_packets; 133 u64 tx_lpi_entry_count; 134 u64 tx_total_collisions; 135 }; 136 137 struct qede_stats_ah { 138 u64 rx_1519_to_max_byte_packets; 139 u64 tx_1519_to_max_byte_packets; 140 }; 141 142 struct qede_stats { 143 struct qede_stats_common common; 144 145 union { 146 struct qede_stats_bb bb; 147 struct qede_stats_ah ah; 148 }; 149 }; 150 151 struct qede_vlan { 152 struct list_head list; 153 u16 vid; 154 bool configured; 155 }; 156 157 struct qede_rdma_dev { 158 struct qedr_dev *qedr_dev; 159 struct list_head entry; 160 struct list_head rdma_event_list; 161 struct workqueue_struct *rdma_wq; 162 }; 163 164 struct qede_ptp; 165 166 #define QEDE_RFS_MAX_FLTR 256 167 168 struct qede_dev { 169 struct qed_dev *cdev; 170 struct net_device *ndev; 171 struct pci_dev *pdev; 172 173 u32 dp_module; 174 u8 dp_level; 175 176 unsigned long flags; 177 #define QEDE_FLAG_IS_VF BIT(0) 178 #define IS_VF(edev) (!!((edev)->flags & QEDE_FLAG_IS_VF)) 179 #define QEDE_TX_TIMESTAMPING_EN BIT(1) 180 #define QEDE_FLAGS_PTP_TX_IN_PRORGESS BIT(2) 181 182 const struct qed_eth_ops *ops; 183 struct qede_ptp *ptp; 184 185 struct qed_dev_eth_info dev_info; 186 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues) 187 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues) 188 #define QEDE_IS_BB(edev) \ 189 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB) 190 #define QEDE_IS_AH(edev) \ 191 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH) 192 193 struct qede_fastpath *fp_array; 194 u8 req_num_tx; 195 u8 fp_num_tx; 196 u8 req_num_rx; 197 u8 fp_num_rx; 198 u16 req_queues; 199 u16 num_queues; 200 #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues) 201 #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx) 202 #define QEDE_RX_QUEUE_IDX(edev, i) (i) 203 #define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx) 204 205 struct qed_int_info int_info; 206 207 /* Smaller private varaiant of the RTNL lock */ 208 struct mutex qede_lock; 209 u32 state; /* Protected by qede_lock */ 210 u16 rx_buf_size; 211 u32 rx_copybreak; 212 213 /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */ 214 #define ETH_OVERHEAD (ETH_HLEN + 8 + 8) 215 /* Max supported alignment is 256 (8 shift) 216 * minimal alignment shift 6 is optimal for 57xxx HW performance 217 */ 218 #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT)) 219 /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes 220 * at the end of skb->data, to avoid wasting a full cache line. 221 * This reduces memory use (skb->truesize). 222 */ 223 #define QEDE_FW_RX_ALIGN_END \ 224 max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \ 225 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 226 227 struct qede_stats stats; 228 #define QEDE_RSS_INDIR_INITED BIT(0) 229 #define QEDE_RSS_KEY_INITED BIT(1) 230 #define QEDE_RSS_CAPS_INITED BIT(2) 231 u32 rss_params_inited; /* bit-field to track initialized rss params */ 232 u16 rss_ind_table[128]; 233 u32 rss_key[10]; 234 u8 rss_caps; 235 236 u16 q_num_rx_buffers; /* Must be a power of two */ 237 u16 q_num_tx_buffers; /* Must be a power of two */ 238 239 bool gro_disable; 240 struct list_head vlan_list; 241 u16 configured_vlans; 242 u16 non_configured_vlans; 243 bool accept_any_vlan; 244 struct delayed_work sp_task; 245 unsigned long sp_flags; 246 u16 vxlan_dst_port; 247 u16 geneve_dst_port; 248 249 struct qede_arfs *arfs; 250 bool wol_enabled; 251 252 struct qede_rdma_dev rdma_info; 253 254 struct bpf_prog *xdp_prog; 255 }; 256 257 enum QEDE_STATE { 258 QEDE_STATE_CLOSED, 259 QEDE_STATE_OPEN, 260 }; 261 262 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) 263 264 #define MAX_NUM_TC 8 265 #define MAX_NUM_PRI 8 266 267 /* The driver supports the new build_skb() API: 268 * RX ring buffer contains pointer to kmalloc() data only, 269 * skb are built only after the frame was DMA-ed. 270 */ 271 struct sw_rx_data { 272 struct page *data; 273 dma_addr_t mapping; 274 unsigned int page_offset; 275 }; 276 277 enum qede_agg_state { 278 QEDE_AGG_STATE_NONE = 0, 279 QEDE_AGG_STATE_START = 1, 280 QEDE_AGG_STATE_ERROR = 2 281 }; 282 283 struct qede_agg_info { 284 /* rx_buf is a data buffer that can be placed / consumed from rx bd 285 * chain. It has two purposes: We will preallocate the data buffer 286 * for each aggregation when we open the interface and will place this 287 * buffer on the rx-bd-ring when we receive TPA_START. We don't want 288 * to be in a state where allocation fails, as we can't reuse the 289 * consumer buffer in the rx-chain since FW may still be writing to it 290 * (since header needs to be modified for TPA). 291 * The second purpose is to keep a pointer to the bd buffer during 292 * aggregation. 293 */ 294 struct sw_rx_data buffer; 295 struct sk_buff *skb; 296 297 /* We need some structs from the start cookie until termination */ 298 u16 vlan_tag; 299 300 bool tpa_start_fail; 301 u8 state; 302 u8 frag_id; 303 304 u8 tunnel_type; 305 }; 306 307 struct qede_rx_queue { 308 __le16 *hw_cons_ptr; 309 void __iomem *hw_rxq_prod_addr; 310 311 /* Required for the allocation of replacement buffers */ 312 struct device *dev; 313 314 struct bpf_prog *xdp_prog; 315 316 u16 sw_rx_cons; 317 u16 sw_rx_prod; 318 319 u16 filled_buffers; 320 u8 data_direction; 321 u8 rxq_id; 322 323 /* Used once per each NAPI run */ 324 u16 num_rx_buffers; 325 326 u16 rx_headroom; 327 328 u32 rx_buf_size; 329 u32 rx_buf_seg_size; 330 331 struct sw_rx_data *sw_rx_ring; 332 struct qed_chain rx_bd_ring; 333 struct qed_chain rx_comp_ring ____cacheline_aligned; 334 335 /* GRO */ 336 struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM]; 337 338 /* Used once per each NAPI run */ 339 u64 rcv_pkts; 340 341 u64 rx_hw_errors; 342 u64 rx_alloc_errors; 343 u64 rx_ip_frags; 344 345 u64 xdp_no_pass; 346 347 void *handle; 348 struct xdp_rxq_info xdp_rxq; 349 }; 350 351 union db_prod { 352 struct eth_db_data data; 353 u32 raw; 354 }; 355 356 struct sw_tx_bd { 357 struct sk_buff *skb; 358 u8 flags; 359 /* Set on the first BD descriptor when there is a split BD */ 360 #define QEDE_TSO_SPLIT_BD BIT(0) 361 }; 362 363 struct sw_tx_xdp { 364 struct page *page; 365 dma_addr_t mapping; 366 }; 367 368 struct qede_tx_queue { 369 u8 is_xdp; 370 bool is_legacy; 371 u16 sw_tx_cons; 372 u16 sw_tx_prod; 373 u16 num_tx_buffers; /* Slowpath only */ 374 375 u64 xmit_pkts; 376 u64 stopped_cnt; 377 378 __le16 *hw_cons_ptr; 379 380 /* Needed for the mapping of packets */ 381 struct device *dev; 382 383 void __iomem *doorbell_addr; 384 union db_prod tx_db; 385 int index; /* Slowpath only */ 386 #define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \ 387 QEDE_MAX_TSS_CNT(edev)) 388 #define QEDE_TXQ_IDX_TO_XDP(edev, idx) ((idx) + QEDE_MAX_TSS_CNT(edev)) 389 390 /* Regular Tx requires skb + metadata for release purpose, 391 * while XDP requires the pages and the mapped address. 392 */ 393 union { 394 struct sw_tx_bd *skbs; 395 struct sw_tx_xdp *xdp; 396 } sw_tx_ring; 397 398 struct qed_chain tx_pbl; 399 400 /* Slowpath; Should be kept in end [unless missing padding] */ 401 void *handle; 402 }; 403 404 #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \ 405 le32_to_cpu((bd)->addr.lo)) 406 #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \ 407 do { \ 408 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \ 409 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \ 410 (bd)->nbytes = cpu_to_le16(len); \ 411 } while (0) 412 #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes)) 413 414 struct qede_fastpath { 415 struct qede_dev *edev; 416 #define QEDE_FASTPATH_TX BIT(0) 417 #define QEDE_FASTPATH_RX BIT(1) 418 #define QEDE_FASTPATH_XDP BIT(2) 419 #define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX) 420 u8 type; 421 u8 id; 422 u8 xdp_xmit; 423 struct napi_struct napi; 424 struct qed_sb_info *sb_info; 425 struct qede_rx_queue *rxq; 426 struct qede_tx_queue *txq; 427 struct qede_tx_queue *xdp_tx; 428 429 #define VEC_NAME_SIZE (sizeof(((struct net_device *)0)->name) + 8) 430 char name[VEC_NAME_SIZE]; 431 }; 432 433 /* Debug print definitions */ 434 #define DP_NAME(edev) ((edev)->ndev->name) 435 436 #define XMIT_PLAIN 0 437 #define XMIT_L4_CSUM BIT(0) 438 #define XMIT_LSO BIT(1) 439 #define XMIT_ENC BIT(2) 440 #define XMIT_ENC_GSO_L4_CSUM BIT(3) 441 442 #define QEDE_CSUM_ERROR BIT(0) 443 #define QEDE_CSUM_UNNECESSARY BIT(1) 444 #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2) 445 446 #define QEDE_SP_RX_MODE 1 447 448 #ifdef CONFIG_RFS_ACCEL 449 int qede_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb, 450 u16 rxq_index, u32 flow_id); 451 #define QEDE_SP_ARFS_CONFIG 4 452 #define QEDE_SP_TASK_POLL_DELAY (5 * HZ) 453 #endif 454 455 void qede_process_arfs_filters(struct qede_dev *edev, bool free_fltr); 456 void qede_poll_for_freeing_arfs_filters(struct qede_dev *edev); 457 void qede_arfs_filter_op(void *dev, void *filter, u8 fw_rc); 458 void qede_free_arfs(struct qede_dev *edev); 459 int qede_alloc_arfs(struct qede_dev *edev); 460 int qede_add_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info); 461 int qede_del_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info); 462 int qede_get_cls_rule_entry(struct qede_dev *edev, struct ethtool_rxnfc *cmd); 463 int qede_get_cls_rule_all(struct qede_dev *edev, struct ethtool_rxnfc *info, 464 u32 *rule_locs); 465 int qede_get_arfs_filter_count(struct qede_dev *edev); 466 467 struct qede_reload_args { 468 void (*func)(struct qede_dev *edev, struct qede_reload_args *args); 469 union { 470 netdev_features_t features; 471 struct bpf_prog *new_prog; 472 u16 mtu; 473 } u; 474 }; 475 476 /* Datapath functions definition */ 477 netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev); 478 netdev_features_t qede_features_check(struct sk_buff *skb, 479 struct net_device *dev, 480 netdev_features_t features); 481 void qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp); 482 int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy); 483 int qede_free_tx_pkt(struct qede_dev *edev, 484 struct qede_tx_queue *txq, int *len); 485 int qede_poll(struct napi_struct *napi, int budget); 486 irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie); 487 488 /* Filtering function definitions */ 489 void qede_force_mac(void *dev, u8 *mac, bool forced); 490 void qede_udp_ports_update(void *dev, u16 vxlan_port, u16 geneve_port); 491 int qede_set_mac_addr(struct net_device *ndev, void *p); 492 493 int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid); 494 int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid); 495 void qede_vlan_mark_nonconfigured(struct qede_dev *edev); 496 int qede_configure_vlan_filters(struct qede_dev *edev); 497 498 netdev_features_t qede_fix_features(struct net_device *dev, 499 netdev_features_t features); 500 int qede_set_features(struct net_device *dev, netdev_features_t features); 501 void qede_set_rx_mode(struct net_device *ndev); 502 void qede_config_rx_mode(struct net_device *ndev); 503 void qede_fill_rss_params(struct qede_dev *edev, 504 struct qed_update_vport_rss_params *rss, u8 *update); 505 506 void qede_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti); 507 void qede_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti); 508 509 int qede_xdp(struct net_device *dev, struct netdev_bpf *xdp); 510 511 #ifdef CONFIG_DCB 512 void qede_set_dcbnl_ops(struct net_device *ndev); 513 #endif 514 515 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level); 516 void qede_set_ethtool_ops(struct net_device *netdev); 517 void qede_reload(struct qede_dev *edev, 518 struct qede_reload_args *args, bool is_locked); 519 int qede_change_mtu(struct net_device *dev, int new_mtu); 520 void qede_fill_by_demand_stats(struct qede_dev *edev); 521 void __qede_lock(struct qede_dev *edev); 522 void __qede_unlock(struct qede_dev *edev); 523 bool qede_has_rx_work(struct qede_rx_queue *rxq); 524 int qede_txq_has_work(struct qede_tx_queue *txq); 525 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count); 526 void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq); 527 528 #define RX_RING_SIZE_POW 13 529 #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW)) 530 #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1) 531 #define NUM_RX_BDS_MIN 128 532 #define NUM_RX_BDS_DEF ((u16)BIT(10) - 1) 533 534 #define TX_RING_SIZE_POW 13 535 #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW)) 536 #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1) 537 #define NUM_TX_BDS_MIN 128 538 #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX 539 540 #define QEDE_MIN_PKT_LEN 64 541 #define QEDE_RX_HDR_SIZE 256 542 #define QEDE_MAX_JUMBO_PACKET_SIZE 9600 543 #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++) 544 545 #endif /* _QEDE_H_ */ 546