1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #ifndef _QEDE_H_ 33 #define _QEDE_H_ 34 #include <linux/compiler.h> 35 #include <linux/version.h> 36 #include <linux/workqueue.h> 37 #include <linux/netdevice.h> 38 #include <linux/interrupt.h> 39 #include <linux/bitmap.h> 40 #include <linux/kernel.h> 41 #include <linux/mutex.h> 42 #include <linux/bpf.h> 43 #include <net/xdp.h> 44 #include <linux/qed/qede_rdma.h> 45 #include <linux/io.h> 46 #ifdef CONFIG_RFS_ACCEL 47 #include <linux/cpu_rmap.h> 48 #endif 49 #include <linux/qed/common_hsi.h> 50 #include <linux/qed/eth_common.h> 51 #include <linux/qed/qed_if.h> 52 #include <linux/qed/qed_chain.h> 53 #include <linux/qed/qed_eth_if.h> 54 55 #define QEDE_MAJOR_VERSION 8 56 #define QEDE_MINOR_VERSION 33 57 #define QEDE_REVISION_VERSION 0 58 #define QEDE_ENGINEERING_VERSION 20 59 #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "." \ 60 __stringify(QEDE_MINOR_VERSION) "." \ 61 __stringify(QEDE_REVISION_VERSION) "." \ 62 __stringify(QEDE_ENGINEERING_VERSION) 63 64 #define DRV_MODULE_SYM qede 65 66 struct qede_stats_common { 67 u64 no_buff_discards; 68 u64 packet_too_big_discard; 69 u64 ttl0_discard; 70 u64 rx_ucast_bytes; 71 u64 rx_mcast_bytes; 72 u64 rx_bcast_bytes; 73 u64 rx_ucast_pkts; 74 u64 rx_mcast_pkts; 75 u64 rx_bcast_pkts; 76 u64 mftag_filter_discards; 77 u64 mac_filter_discards; 78 u64 gft_filter_drop; 79 u64 tx_ucast_bytes; 80 u64 tx_mcast_bytes; 81 u64 tx_bcast_bytes; 82 u64 tx_ucast_pkts; 83 u64 tx_mcast_pkts; 84 u64 tx_bcast_pkts; 85 u64 tx_err_drop_pkts; 86 u64 coalesced_pkts; 87 u64 coalesced_events; 88 u64 coalesced_aborts_num; 89 u64 non_coalesced_pkts; 90 u64 coalesced_bytes; 91 92 /* port */ 93 u64 rx_64_byte_packets; 94 u64 rx_65_to_127_byte_packets; 95 u64 rx_128_to_255_byte_packets; 96 u64 rx_256_to_511_byte_packets; 97 u64 rx_512_to_1023_byte_packets; 98 u64 rx_1024_to_1518_byte_packets; 99 u64 rx_crc_errors; 100 u64 rx_mac_crtl_frames; 101 u64 rx_pause_frames; 102 u64 rx_pfc_frames; 103 u64 rx_align_errors; 104 u64 rx_carrier_errors; 105 u64 rx_oversize_packets; 106 u64 rx_jabbers; 107 u64 rx_undersize_packets; 108 u64 rx_fragments; 109 u64 tx_64_byte_packets; 110 u64 tx_65_to_127_byte_packets; 111 u64 tx_128_to_255_byte_packets; 112 u64 tx_256_to_511_byte_packets; 113 u64 tx_512_to_1023_byte_packets; 114 u64 tx_1024_to_1518_byte_packets; 115 u64 tx_pause_frames; 116 u64 tx_pfc_frames; 117 u64 brb_truncates; 118 u64 brb_discards; 119 u64 tx_mac_ctrl_frames; 120 }; 121 122 struct qede_stats_bb { 123 u64 rx_1519_to_1522_byte_packets; 124 u64 rx_1519_to_2047_byte_packets; 125 u64 rx_2048_to_4095_byte_packets; 126 u64 rx_4096_to_9216_byte_packets; 127 u64 rx_9217_to_16383_byte_packets; 128 u64 tx_1519_to_2047_byte_packets; 129 u64 tx_2048_to_4095_byte_packets; 130 u64 tx_4096_to_9216_byte_packets; 131 u64 tx_9217_to_16383_byte_packets; 132 u64 tx_lpi_entry_count; 133 u64 tx_total_collisions; 134 }; 135 136 struct qede_stats_ah { 137 u64 rx_1519_to_max_byte_packets; 138 u64 tx_1519_to_max_byte_packets; 139 }; 140 141 struct qede_stats { 142 struct qede_stats_common common; 143 144 union { 145 struct qede_stats_bb bb; 146 struct qede_stats_ah ah; 147 }; 148 }; 149 150 struct qede_vlan { 151 struct list_head list; 152 u16 vid; 153 bool configured; 154 }; 155 156 struct qede_rdma_dev { 157 struct qedr_dev *qedr_dev; 158 struct list_head entry; 159 struct list_head rdma_event_list; 160 struct workqueue_struct *rdma_wq; 161 }; 162 163 struct qede_ptp; 164 165 #define QEDE_RFS_MAX_FLTR 256 166 167 struct qede_dev { 168 struct qed_dev *cdev; 169 struct net_device *ndev; 170 struct pci_dev *pdev; 171 172 u32 dp_module; 173 u8 dp_level; 174 175 unsigned long flags; 176 #define QEDE_FLAG_IS_VF BIT(0) 177 #define IS_VF(edev) (!!((edev)->flags & QEDE_FLAG_IS_VF)) 178 #define QEDE_TX_TIMESTAMPING_EN BIT(1) 179 #define QEDE_FLAGS_PTP_TX_IN_PRORGESS BIT(2) 180 181 const struct qed_eth_ops *ops; 182 struct qede_ptp *ptp; 183 184 struct qed_dev_eth_info dev_info; 185 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues) 186 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues) 187 #define QEDE_IS_BB(edev) \ 188 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB) 189 #define QEDE_IS_AH(edev) \ 190 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH) 191 192 struct qede_fastpath *fp_array; 193 u8 req_num_tx; 194 u8 fp_num_tx; 195 u8 req_num_rx; 196 u8 fp_num_rx; 197 u16 req_queues; 198 u16 num_queues; 199 #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues) 200 #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx) 201 #define QEDE_RX_QUEUE_IDX(edev, i) (i) 202 #define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx) 203 204 struct qed_int_info int_info; 205 206 /* Smaller private varaiant of the RTNL lock */ 207 struct mutex qede_lock; 208 u32 state; /* Protected by qede_lock */ 209 u16 rx_buf_size; 210 u32 rx_copybreak; 211 212 /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */ 213 #define ETH_OVERHEAD (ETH_HLEN + 8 + 8) 214 /* Max supported alignment is 256 (8 shift) 215 * minimal alignment shift 6 is optimal for 57xxx HW performance 216 */ 217 #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT)) 218 /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes 219 * at the end of skb->data, to avoid wasting a full cache line. 220 * This reduces memory use (skb->truesize). 221 */ 222 #define QEDE_FW_RX_ALIGN_END \ 223 max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \ 224 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 225 226 struct qede_stats stats; 227 #define QEDE_RSS_INDIR_INITED BIT(0) 228 #define QEDE_RSS_KEY_INITED BIT(1) 229 #define QEDE_RSS_CAPS_INITED BIT(2) 230 u32 rss_params_inited; /* bit-field to track initialized rss params */ 231 u16 rss_ind_table[128]; 232 u32 rss_key[10]; 233 u8 rss_caps; 234 235 u16 q_num_rx_buffers; /* Must be a power of two */ 236 u16 q_num_tx_buffers; /* Must be a power of two */ 237 238 bool gro_disable; 239 struct list_head vlan_list; 240 u16 configured_vlans; 241 u16 non_configured_vlans; 242 bool accept_any_vlan; 243 struct delayed_work sp_task; 244 unsigned long sp_flags; 245 u16 vxlan_dst_port; 246 u16 geneve_dst_port; 247 248 struct qede_arfs *arfs; 249 bool wol_enabled; 250 251 struct qede_rdma_dev rdma_info; 252 253 struct bpf_prog *xdp_prog; 254 }; 255 256 enum QEDE_STATE { 257 QEDE_STATE_CLOSED, 258 QEDE_STATE_OPEN, 259 }; 260 261 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) 262 263 #define MAX_NUM_TC 8 264 #define MAX_NUM_PRI 8 265 266 /* The driver supports the new build_skb() API: 267 * RX ring buffer contains pointer to kmalloc() data only, 268 * skb are built only after the frame was DMA-ed. 269 */ 270 struct sw_rx_data { 271 struct page *data; 272 dma_addr_t mapping; 273 unsigned int page_offset; 274 }; 275 276 enum qede_agg_state { 277 QEDE_AGG_STATE_NONE = 0, 278 QEDE_AGG_STATE_START = 1, 279 QEDE_AGG_STATE_ERROR = 2 280 }; 281 282 struct qede_agg_info { 283 /* rx_buf is a data buffer that can be placed / consumed from rx bd 284 * chain. It has two purposes: We will preallocate the data buffer 285 * for each aggregation when we open the interface and will place this 286 * buffer on the rx-bd-ring when we receive TPA_START. We don't want 287 * to be in a state where allocation fails, as we can't reuse the 288 * consumer buffer in the rx-chain since FW may still be writing to it 289 * (since header needs to be modified for TPA). 290 * The second purpose is to keep a pointer to the bd buffer during 291 * aggregation. 292 */ 293 struct sw_rx_data buffer; 294 struct sk_buff *skb; 295 296 /* We need some structs from the start cookie until termination */ 297 u16 vlan_tag; 298 299 bool tpa_start_fail; 300 u8 state; 301 u8 frag_id; 302 303 u8 tunnel_type; 304 }; 305 306 struct qede_rx_queue { 307 __le16 *hw_cons_ptr; 308 void __iomem *hw_rxq_prod_addr; 309 310 /* Required for the allocation of replacement buffers */ 311 struct device *dev; 312 313 struct bpf_prog *xdp_prog; 314 315 u16 sw_rx_cons; 316 u16 sw_rx_prod; 317 318 u16 filled_buffers; 319 u8 data_direction; 320 u8 rxq_id; 321 322 /* Used once per each NAPI run */ 323 u16 num_rx_buffers; 324 325 u16 rx_headroom; 326 327 u32 rx_buf_size; 328 u32 rx_buf_seg_size; 329 330 struct sw_rx_data *sw_rx_ring; 331 struct qed_chain rx_bd_ring; 332 struct qed_chain rx_comp_ring ____cacheline_aligned; 333 334 /* GRO */ 335 struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM]; 336 337 /* Used once per each NAPI run */ 338 u64 rcv_pkts; 339 340 u64 rx_hw_errors; 341 u64 rx_alloc_errors; 342 u64 rx_ip_frags; 343 344 u64 xdp_no_pass; 345 346 void *handle; 347 struct xdp_rxq_info xdp_rxq; 348 }; 349 350 union db_prod { 351 struct eth_db_data data; 352 u32 raw; 353 }; 354 355 struct sw_tx_bd { 356 struct sk_buff *skb; 357 u8 flags; 358 /* Set on the first BD descriptor when there is a split BD */ 359 #define QEDE_TSO_SPLIT_BD BIT(0) 360 }; 361 362 struct sw_tx_xdp { 363 struct page *page; 364 dma_addr_t mapping; 365 }; 366 367 struct qede_tx_queue { 368 u8 is_xdp; 369 bool is_legacy; 370 u16 sw_tx_cons; 371 u16 sw_tx_prod; 372 u16 num_tx_buffers; /* Slowpath only */ 373 374 u64 xmit_pkts; 375 u64 stopped_cnt; 376 377 __le16 *hw_cons_ptr; 378 379 /* Needed for the mapping of packets */ 380 struct device *dev; 381 382 void __iomem *doorbell_addr; 383 union db_prod tx_db; 384 int index; /* Slowpath only */ 385 #define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \ 386 QEDE_MAX_TSS_CNT(edev)) 387 #define QEDE_TXQ_IDX_TO_XDP(edev, idx) ((idx) + QEDE_MAX_TSS_CNT(edev)) 388 389 /* Regular Tx requires skb + metadata for release purpose, 390 * while XDP requires the pages and the mapped address. 391 */ 392 union { 393 struct sw_tx_bd *skbs; 394 struct sw_tx_xdp *xdp; 395 } sw_tx_ring; 396 397 struct qed_chain tx_pbl; 398 399 /* Slowpath; Should be kept in end [unless missing padding] */ 400 void *handle; 401 }; 402 403 #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \ 404 le32_to_cpu((bd)->addr.lo)) 405 #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \ 406 do { \ 407 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \ 408 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \ 409 (bd)->nbytes = cpu_to_le16(len); \ 410 } while (0) 411 #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes)) 412 413 struct qede_fastpath { 414 struct qede_dev *edev; 415 #define QEDE_FASTPATH_TX BIT(0) 416 #define QEDE_FASTPATH_RX BIT(1) 417 #define QEDE_FASTPATH_XDP BIT(2) 418 #define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX) 419 u8 type; 420 u8 id; 421 u8 xdp_xmit; 422 struct napi_struct napi; 423 struct qed_sb_info *sb_info; 424 struct qede_rx_queue *rxq; 425 struct qede_tx_queue *txq; 426 struct qede_tx_queue *xdp_tx; 427 428 #define VEC_NAME_SIZE (sizeof(((struct net_device *)0)->name) + 8) 429 char name[VEC_NAME_SIZE]; 430 }; 431 432 /* Debug print definitions */ 433 #define DP_NAME(edev) ((edev)->ndev->name) 434 435 #define XMIT_PLAIN 0 436 #define XMIT_L4_CSUM BIT(0) 437 #define XMIT_LSO BIT(1) 438 #define XMIT_ENC BIT(2) 439 #define XMIT_ENC_GSO_L4_CSUM BIT(3) 440 441 #define QEDE_CSUM_ERROR BIT(0) 442 #define QEDE_CSUM_UNNECESSARY BIT(1) 443 #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2) 444 445 #define QEDE_SP_RX_MODE 1 446 447 #ifdef CONFIG_RFS_ACCEL 448 int qede_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb, 449 u16 rxq_index, u32 flow_id); 450 #define QEDE_SP_ARFS_CONFIG 4 451 #define QEDE_SP_TASK_POLL_DELAY (5 * HZ) 452 #endif 453 454 void qede_process_arfs_filters(struct qede_dev *edev, bool free_fltr); 455 void qede_poll_for_freeing_arfs_filters(struct qede_dev *edev); 456 void qede_arfs_filter_op(void *dev, void *filter, u8 fw_rc); 457 void qede_free_arfs(struct qede_dev *edev); 458 int qede_alloc_arfs(struct qede_dev *edev); 459 int qede_add_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info); 460 int qede_del_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info); 461 int qede_get_cls_rule_entry(struct qede_dev *edev, struct ethtool_rxnfc *cmd); 462 int qede_get_cls_rule_all(struct qede_dev *edev, struct ethtool_rxnfc *info, 463 u32 *rule_locs); 464 int qede_get_arfs_filter_count(struct qede_dev *edev); 465 466 struct qede_reload_args { 467 void (*func)(struct qede_dev *edev, struct qede_reload_args *args); 468 union { 469 netdev_features_t features; 470 struct bpf_prog *new_prog; 471 u16 mtu; 472 } u; 473 }; 474 475 /* Datapath functions definition */ 476 netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev); 477 netdev_features_t qede_features_check(struct sk_buff *skb, 478 struct net_device *dev, 479 netdev_features_t features); 480 void qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp); 481 int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy); 482 int qede_free_tx_pkt(struct qede_dev *edev, 483 struct qede_tx_queue *txq, int *len); 484 int qede_poll(struct napi_struct *napi, int budget); 485 irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie); 486 487 /* Filtering function definitions */ 488 void qede_force_mac(void *dev, u8 *mac, bool forced); 489 void qede_udp_ports_update(void *dev, u16 vxlan_port, u16 geneve_port); 490 int qede_set_mac_addr(struct net_device *ndev, void *p); 491 492 int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid); 493 int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid); 494 void qede_vlan_mark_nonconfigured(struct qede_dev *edev); 495 int qede_configure_vlan_filters(struct qede_dev *edev); 496 497 netdev_features_t qede_fix_features(struct net_device *dev, 498 netdev_features_t features); 499 int qede_set_features(struct net_device *dev, netdev_features_t features); 500 void qede_set_rx_mode(struct net_device *ndev); 501 void qede_config_rx_mode(struct net_device *ndev); 502 void qede_fill_rss_params(struct qede_dev *edev, 503 struct qed_update_vport_rss_params *rss, u8 *update); 504 505 void qede_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti); 506 void qede_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti); 507 508 int qede_xdp(struct net_device *dev, struct netdev_bpf *xdp); 509 510 #ifdef CONFIG_DCB 511 void qede_set_dcbnl_ops(struct net_device *ndev); 512 #endif 513 514 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level); 515 void qede_set_ethtool_ops(struct net_device *netdev); 516 void qede_reload(struct qede_dev *edev, 517 struct qede_reload_args *args, bool is_locked); 518 int qede_change_mtu(struct net_device *dev, int new_mtu); 519 void qede_fill_by_demand_stats(struct qede_dev *edev); 520 void __qede_lock(struct qede_dev *edev); 521 void __qede_unlock(struct qede_dev *edev); 522 bool qede_has_rx_work(struct qede_rx_queue *rxq); 523 int qede_txq_has_work(struct qede_tx_queue *txq); 524 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count); 525 void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq); 526 527 #define RX_RING_SIZE_POW 13 528 #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW)) 529 #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1) 530 #define NUM_RX_BDS_MIN 128 531 #define NUM_RX_BDS_DEF ((u16)BIT(10) - 1) 532 533 #define TX_RING_SIZE_POW 13 534 #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW)) 535 #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1) 536 #define NUM_TX_BDS_MIN 128 537 #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX 538 539 #define QEDE_MIN_PKT_LEN 64 540 #define QEDE_RX_HDR_SIZE 256 541 #define QEDE_MAX_JUMBO_PACKET_SIZE 9600 542 #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++) 543 544 #endif /* _QEDE_H_ */ 545