1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #ifndef _QEDE_H_ 33 #define _QEDE_H_ 34 #include <linux/compiler.h> 35 #include <linux/version.h> 36 #include <linux/workqueue.h> 37 #include <linux/netdevice.h> 38 #include <linux/interrupt.h> 39 #include <linux/bitmap.h> 40 #include <linux/kernel.h> 41 #include <linux/mutex.h> 42 #include <linux/bpf.h> 43 #include <linux/io.h> 44 #include <linux/qed/common_hsi.h> 45 #include <linux/qed/eth_common.h> 46 #include <linux/qed/qed_if.h> 47 #include <linux/qed/qed_chain.h> 48 #include <linux/qed/qed_eth_if.h> 49 50 #define QEDE_MAJOR_VERSION 8 51 #define QEDE_MINOR_VERSION 10 52 #define QEDE_REVISION_VERSION 10 53 #define QEDE_ENGINEERING_VERSION 21 54 #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "." \ 55 __stringify(QEDE_MINOR_VERSION) "." \ 56 __stringify(QEDE_REVISION_VERSION) "." \ 57 __stringify(QEDE_ENGINEERING_VERSION) 58 59 #define DRV_MODULE_SYM qede 60 61 struct qede_stats_common { 62 u64 no_buff_discards; 63 u64 packet_too_big_discard; 64 u64 ttl0_discard; 65 u64 rx_ucast_bytes; 66 u64 rx_mcast_bytes; 67 u64 rx_bcast_bytes; 68 u64 rx_ucast_pkts; 69 u64 rx_mcast_pkts; 70 u64 rx_bcast_pkts; 71 u64 mftag_filter_discards; 72 u64 mac_filter_discards; 73 u64 tx_ucast_bytes; 74 u64 tx_mcast_bytes; 75 u64 tx_bcast_bytes; 76 u64 tx_ucast_pkts; 77 u64 tx_mcast_pkts; 78 u64 tx_bcast_pkts; 79 u64 tx_err_drop_pkts; 80 u64 coalesced_pkts; 81 u64 coalesced_events; 82 u64 coalesced_aborts_num; 83 u64 non_coalesced_pkts; 84 u64 coalesced_bytes; 85 86 /* port */ 87 u64 rx_64_byte_packets; 88 u64 rx_65_to_127_byte_packets; 89 u64 rx_128_to_255_byte_packets; 90 u64 rx_256_to_511_byte_packets; 91 u64 rx_512_to_1023_byte_packets; 92 u64 rx_1024_to_1518_byte_packets; 93 u64 rx_crc_errors; 94 u64 rx_mac_crtl_frames; 95 u64 rx_pause_frames; 96 u64 rx_pfc_frames; 97 u64 rx_align_errors; 98 u64 rx_carrier_errors; 99 u64 rx_oversize_packets; 100 u64 rx_jabbers; 101 u64 rx_undersize_packets; 102 u64 rx_fragments; 103 u64 tx_64_byte_packets; 104 u64 tx_65_to_127_byte_packets; 105 u64 tx_128_to_255_byte_packets; 106 u64 tx_256_to_511_byte_packets; 107 u64 tx_512_to_1023_byte_packets; 108 u64 tx_1024_to_1518_byte_packets; 109 u64 tx_pause_frames; 110 u64 tx_pfc_frames; 111 u64 brb_truncates; 112 u64 brb_discards; 113 u64 tx_mac_ctrl_frames; 114 }; 115 116 struct qede_stats_bb { 117 u64 rx_1519_to_1522_byte_packets; 118 u64 rx_1519_to_2047_byte_packets; 119 u64 rx_2048_to_4095_byte_packets; 120 u64 rx_4096_to_9216_byte_packets; 121 u64 rx_9217_to_16383_byte_packets; 122 u64 tx_1519_to_2047_byte_packets; 123 u64 tx_2048_to_4095_byte_packets; 124 u64 tx_4096_to_9216_byte_packets; 125 u64 tx_9217_to_16383_byte_packets; 126 u64 tx_lpi_entry_count; 127 u64 tx_total_collisions; 128 }; 129 130 struct qede_stats_ah { 131 u64 rx_1519_to_max_byte_packets; 132 u64 tx_1519_to_max_byte_packets; 133 }; 134 135 struct qede_stats { 136 struct qede_stats_common common; 137 138 union { 139 struct qede_stats_bb bb; 140 struct qede_stats_ah ah; 141 }; 142 }; 143 144 struct qede_vlan { 145 struct list_head list; 146 u16 vid; 147 bool configured; 148 }; 149 150 struct qede_rdma_dev { 151 struct qedr_dev *qedr_dev; 152 struct list_head entry; 153 struct list_head roce_event_list; 154 struct workqueue_struct *roce_wq; 155 }; 156 157 struct qede_ptp; 158 159 struct qede_dev { 160 struct qed_dev *cdev; 161 struct net_device *ndev; 162 struct pci_dev *pdev; 163 164 u32 dp_module; 165 u8 dp_level; 166 167 u32 flags; 168 #define QEDE_FLAG_IS_VF BIT(0) 169 #define IS_VF(edev) (!!((edev)->flags & QEDE_FLAG_IS_VF)) 170 #define QEDE_TX_TIMESTAMPING_EN BIT(1) 171 172 const struct qed_eth_ops *ops; 173 struct qede_ptp *ptp; 174 175 struct qed_dev_eth_info dev_info; 176 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues) 177 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues) 178 #define QEDE_IS_BB(edev) \ 179 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB) 180 #define QEDE_IS_AH(edev) \ 181 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH) 182 183 struct qede_fastpath *fp_array; 184 u8 req_num_tx; 185 u8 fp_num_tx; 186 u8 req_num_rx; 187 u8 fp_num_rx; 188 u16 req_queues; 189 u16 num_queues; 190 #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues) 191 #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx) 192 #define QEDE_RX_QUEUE_IDX(edev, i) (i) 193 #define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx) 194 195 struct qed_int_info int_info; 196 unsigned char primary_mac[ETH_ALEN]; 197 198 /* Smaller private varaiant of the RTNL lock */ 199 struct mutex qede_lock; 200 u32 state; /* Protected by qede_lock */ 201 u16 rx_buf_size; 202 u32 rx_copybreak; 203 204 /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */ 205 #define ETH_OVERHEAD (ETH_HLEN + 8 + 8) 206 /* Max supported alignment is 256 (8 shift) 207 * minimal alignment shift 6 is optimal for 57xxx HW performance 208 */ 209 #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT)) 210 /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes 211 * at the end of skb->data, to avoid wasting a full cache line. 212 * This reduces memory use (skb->truesize). 213 */ 214 #define QEDE_FW_RX_ALIGN_END \ 215 max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \ 216 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 217 218 struct qede_stats stats; 219 #define QEDE_RSS_INDIR_INITED BIT(0) 220 #define QEDE_RSS_KEY_INITED BIT(1) 221 #define QEDE_RSS_CAPS_INITED BIT(2) 222 u32 rss_params_inited; /* bit-field to track initialized rss params */ 223 u16 rss_ind_table[128]; 224 u32 rss_key[10]; 225 u8 rss_caps; 226 227 u16 q_num_rx_buffers; /* Must be a power of two */ 228 u16 q_num_tx_buffers; /* Must be a power of two */ 229 230 bool gro_disable; 231 struct list_head vlan_list; 232 u16 configured_vlans; 233 u16 non_configured_vlans; 234 bool accept_any_vlan; 235 struct delayed_work sp_task; 236 unsigned long sp_flags; 237 u16 vxlan_dst_port; 238 u16 geneve_dst_port; 239 240 bool wol_enabled; 241 242 struct qede_rdma_dev rdma_info; 243 244 struct bpf_prog *xdp_prog; 245 }; 246 247 enum QEDE_STATE { 248 QEDE_STATE_CLOSED, 249 QEDE_STATE_OPEN, 250 }; 251 252 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) 253 254 #define MAX_NUM_TC 8 255 #define MAX_NUM_PRI 8 256 257 /* The driver supports the new build_skb() API: 258 * RX ring buffer contains pointer to kmalloc() data only, 259 * skb are built only after the frame was DMA-ed. 260 */ 261 struct sw_rx_data { 262 struct page *data; 263 dma_addr_t mapping; 264 unsigned int page_offset; 265 }; 266 267 enum qede_agg_state { 268 QEDE_AGG_STATE_NONE = 0, 269 QEDE_AGG_STATE_START = 1, 270 QEDE_AGG_STATE_ERROR = 2 271 }; 272 273 struct qede_agg_info { 274 /* rx_buf is a data buffer that can be placed / consumed from rx bd 275 * chain. It has two purposes: We will preallocate the data buffer 276 * for each aggregation when we open the interface and will place this 277 * buffer on the rx-bd-ring when we receive TPA_START. We don't want 278 * to be in a state where allocation fails, as we can't reuse the 279 * consumer buffer in the rx-chain since FW may still be writing to it 280 * (since header needs to be modified for TPA). 281 * The second purpose is to keep a pointer to the bd buffer during 282 * aggregation. 283 */ 284 struct sw_rx_data buffer; 285 dma_addr_t buffer_mapping; 286 287 struct sk_buff *skb; 288 289 /* We need some structs from the start cookie until termination */ 290 u16 vlan_tag; 291 u16 start_cqe_bd_len; 292 u8 start_cqe_placement_offset; 293 294 u8 state; 295 u8 frag_id; 296 297 u8 tunnel_type; 298 }; 299 300 struct qede_rx_queue { 301 __le16 *hw_cons_ptr; 302 void __iomem *hw_rxq_prod_addr; 303 304 /* Required for the allocation of replacement buffers */ 305 struct device *dev; 306 307 struct bpf_prog *xdp_prog; 308 309 u16 sw_rx_cons; 310 u16 sw_rx_prod; 311 312 u16 filled_buffers; 313 u8 data_direction; 314 u8 rxq_id; 315 316 u32 rx_buf_size; 317 u32 rx_buf_seg_size; 318 319 u64 rcv_pkts; 320 321 struct sw_rx_data *sw_rx_ring; 322 struct qed_chain rx_bd_ring; 323 struct qed_chain rx_comp_ring ____cacheline_aligned; 324 325 /* Used once per each NAPI run */ 326 u16 num_rx_buffers; 327 328 /* GRO */ 329 struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM]; 330 331 u64 rx_hw_errors; 332 u64 rx_alloc_errors; 333 u64 rx_ip_frags; 334 335 u64 xdp_no_pass; 336 337 void *handle; 338 }; 339 340 union db_prod { 341 struct eth_db_data data; 342 u32 raw; 343 }; 344 345 struct sw_tx_bd { 346 struct sk_buff *skb; 347 u8 flags; 348 /* Set on the first BD descriptor when there is a split BD */ 349 #define QEDE_TSO_SPLIT_BD BIT(0) 350 }; 351 352 struct qede_tx_queue { 353 u8 is_xdp; 354 bool is_legacy; 355 u16 sw_tx_cons; 356 u16 sw_tx_prod; 357 u16 num_tx_buffers; /* Slowpath only */ 358 359 u64 xmit_pkts; 360 u64 stopped_cnt; 361 362 __le16 *hw_cons_ptr; 363 364 /* Needed for the mapping of packets */ 365 struct device *dev; 366 367 void __iomem *doorbell_addr; 368 union db_prod tx_db; 369 int index; /* Slowpath only */ 370 #define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \ 371 QEDE_MAX_TSS_CNT(edev)) 372 #define QEDE_TXQ_IDX_TO_XDP(edev, idx) ((idx) + QEDE_MAX_TSS_CNT(edev)) 373 374 /* Regular Tx requires skb + metadata for release purpose, 375 * while XDP requires only the pages themselves. 376 */ 377 union { 378 struct sw_tx_bd *skbs; 379 struct page **pages; 380 } sw_tx_ring; 381 382 struct qed_chain tx_pbl; 383 384 /* Slowpath; Should be kept in end [unless missing padding] */ 385 void *handle; 386 }; 387 388 #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \ 389 le32_to_cpu((bd)->addr.lo)) 390 #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \ 391 do { \ 392 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \ 393 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \ 394 (bd)->nbytes = cpu_to_le16(len); \ 395 } while (0) 396 #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes)) 397 398 struct qede_fastpath { 399 struct qede_dev *edev; 400 #define QEDE_FASTPATH_TX BIT(0) 401 #define QEDE_FASTPATH_RX BIT(1) 402 #define QEDE_FASTPATH_XDP BIT(2) 403 #define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX) 404 u8 type; 405 u8 id; 406 u8 xdp_xmit; 407 struct napi_struct napi; 408 struct qed_sb_info *sb_info; 409 struct qede_rx_queue *rxq; 410 struct qede_tx_queue *txq; 411 struct qede_tx_queue *xdp_tx; 412 413 #define VEC_NAME_SIZE (sizeof(((struct net_device *)0)->name) + 8) 414 char name[VEC_NAME_SIZE]; 415 }; 416 417 /* Debug print definitions */ 418 #define DP_NAME(edev) ((edev)->ndev->name) 419 420 #define XMIT_PLAIN 0 421 #define XMIT_L4_CSUM BIT(0) 422 #define XMIT_LSO BIT(1) 423 #define XMIT_ENC BIT(2) 424 #define XMIT_ENC_GSO_L4_CSUM BIT(3) 425 426 #define QEDE_CSUM_ERROR BIT(0) 427 #define QEDE_CSUM_UNNECESSARY BIT(1) 428 #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2) 429 430 #define QEDE_SP_RX_MODE 1 431 #define QEDE_SP_VXLAN_PORT_CONFIG 2 432 #define QEDE_SP_GENEVE_PORT_CONFIG 3 433 434 struct qede_reload_args { 435 void (*func)(struct qede_dev *edev, struct qede_reload_args *args); 436 union { 437 netdev_features_t features; 438 struct bpf_prog *new_prog; 439 u16 mtu; 440 } u; 441 }; 442 443 /* Datapath functions definition */ 444 netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev); 445 netdev_features_t qede_features_check(struct sk_buff *skb, 446 struct net_device *dev, 447 netdev_features_t features); 448 void qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp); 449 int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy); 450 int qede_free_tx_pkt(struct qede_dev *edev, 451 struct qede_tx_queue *txq, int *len); 452 int qede_poll(struct napi_struct *napi, int budget); 453 irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie); 454 455 /* Filtering function definitions */ 456 void qede_force_mac(void *dev, u8 *mac, bool forced); 457 int qede_set_mac_addr(struct net_device *ndev, void *p); 458 459 int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid); 460 int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid); 461 void qede_vlan_mark_nonconfigured(struct qede_dev *edev); 462 int qede_configure_vlan_filters(struct qede_dev *edev); 463 464 int qede_set_features(struct net_device *dev, netdev_features_t features); 465 void qede_set_rx_mode(struct net_device *ndev); 466 void qede_config_rx_mode(struct net_device *ndev); 467 void qede_fill_rss_params(struct qede_dev *edev, 468 struct qed_update_vport_rss_params *rss, u8 *update); 469 470 void qede_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti); 471 void qede_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti); 472 473 int qede_xdp(struct net_device *dev, struct netdev_xdp *xdp); 474 475 #ifdef CONFIG_DCB 476 void qede_set_dcbnl_ops(struct net_device *ndev); 477 #endif 478 479 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level); 480 void qede_set_ethtool_ops(struct net_device *netdev); 481 void qede_reload(struct qede_dev *edev, 482 struct qede_reload_args *args, bool is_locked); 483 int qede_change_mtu(struct net_device *dev, int new_mtu); 484 void qede_fill_by_demand_stats(struct qede_dev *edev); 485 void __qede_lock(struct qede_dev *edev); 486 void __qede_unlock(struct qede_dev *edev); 487 bool qede_has_rx_work(struct qede_rx_queue *rxq); 488 int qede_txq_has_work(struct qede_tx_queue *txq); 489 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count); 490 void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq); 491 492 #define RX_RING_SIZE_POW 13 493 #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW)) 494 #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1) 495 #define NUM_RX_BDS_MIN 128 496 #define NUM_RX_BDS_DEF ((u16)BIT(10) - 1) 497 498 #define TX_RING_SIZE_POW 13 499 #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW)) 500 #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1) 501 #define NUM_TX_BDS_MIN 128 502 #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX 503 504 #define QEDE_MIN_PKT_LEN 64 505 #define QEDE_RX_HDR_SIZE 256 506 #define QEDE_MAX_JUMBO_PACKET_SIZE 9600 507 #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++) 508 509 #endif /* _QEDE_H_ */ 510