11f4d4ed6SAlexander Lobakin /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 232a47e72SYuval Mintz /* QLogic qed NIC Driver 3e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 432a47e72SYuval Mintz */ 532a47e72SYuval Mintz 632a47e72SYuval Mintz #ifndef _QED_VF_H 732a47e72SYuval Mintz #define _QED_VF_H 832a47e72SYuval Mintz 9dacd88d6SYuval Mintz #include "qed_l2.h" 1036558c3dSYuval Mintz #include "qed_mcp.h" 11dacd88d6SYuval Mintz 12dacd88d6SYuval Mintz #define T_ETH_INDIRECTION_TABLE_SIZE 128 13dacd88d6SYuval Mintz #define T_ETH_RSS_KEY_SIZE 10 14dacd88d6SYuval Mintz 151408cc1fSYuval Mintz struct vf_pf_resc_request { 161408cc1fSYuval Mintz u8 num_rxqs; 171408cc1fSYuval Mintz u8 num_txqs; 181408cc1fSYuval Mintz u8 num_sbs; 191408cc1fSYuval Mintz u8 num_mac_filters; 201408cc1fSYuval Mintz u8 num_vlan_filters; 211408cc1fSYuval Mintz u8 num_mc_filters; 2208bc8f15SMintz, Yuval u8 num_cids; 2308bc8f15SMintz, Yuval u8 padding; 241408cc1fSYuval Mintz }; 251408cc1fSYuval Mintz 261408cc1fSYuval Mintz struct hw_sb_info { 271408cc1fSYuval Mintz u16 hw_sb_id; 281408cc1fSYuval Mintz u8 sb_qid; 291408cc1fSYuval Mintz u8 padding[5]; 301408cc1fSYuval Mintz }; 311408cc1fSYuval Mintz 32dacd88d6SYuval Mintz #define TLV_BUFFER_SIZE 1024 33dacd88d6SYuval Mintz 3437bff2b9SYuval Mintz enum { 3537bff2b9SYuval Mintz PFVF_STATUS_WAITING, 3637bff2b9SYuval Mintz PFVF_STATUS_SUCCESS, 3737bff2b9SYuval Mintz PFVF_STATUS_FAILURE, 3837bff2b9SYuval Mintz PFVF_STATUS_NOT_SUPPORTED, 3937bff2b9SYuval Mintz PFVF_STATUS_NO_RESOURCE, 4037bff2b9SYuval Mintz PFVF_STATUS_FORCED, 417eff82b0SYuval Mintz PFVF_STATUS_MALICIOUS, 4237bff2b9SYuval Mintz }; 4337bff2b9SYuval Mintz 4437bff2b9SYuval Mintz /* vf pf channel tlvs */ 4537bff2b9SYuval Mintz /* general tlv header (used for both vf->pf request and pf->vf response) */ 4637bff2b9SYuval Mintz struct channel_tlv { 4737bff2b9SYuval Mintz u16 type; 4837bff2b9SYuval Mintz u16 length; 4937bff2b9SYuval Mintz }; 5037bff2b9SYuval Mintz 5137bff2b9SYuval Mintz /* header of first vf->pf tlv carries the offset used to calculate reponse 5237bff2b9SYuval Mintz * buffer address 5337bff2b9SYuval Mintz */ 5437bff2b9SYuval Mintz struct vfpf_first_tlv { 5537bff2b9SYuval Mintz struct channel_tlv tl; 5637bff2b9SYuval Mintz u32 padding; 5737bff2b9SYuval Mintz u64 reply_address; 5837bff2b9SYuval Mintz }; 5937bff2b9SYuval Mintz 6037bff2b9SYuval Mintz /* header of pf->vf tlvs, carries the status of handling the request */ 6137bff2b9SYuval Mintz struct pfvf_tlv { 6237bff2b9SYuval Mintz struct channel_tlv tl; 6337bff2b9SYuval Mintz u8 status; 6437bff2b9SYuval Mintz u8 padding[3]; 6537bff2b9SYuval Mintz }; 6637bff2b9SYuval Mintz 6737bff2b9SYuval Mintz /* response tlv used for most tlvs */ 6837bff2b9SYuval Mintz struct pfvf_def_resp_tlv { 6937bff2b9SYuval Mintz struct pfvf_tlv hdr; 7037bff2b9SYuval Mintz }; 7137bff2b9SYuval Mintz 7237bff2b9SYuval Mintz /* used to terminate and pad a tlv list */ 7337bff2b9SYuval Mintz struct channel_list_end_tlv { 7437bff2b9SYuval Mintz struct channel_tlv tl; 7537bff2b9SYuval Mintz u8 padding[4]; 7637bff2b9SYuval Mintz }; 7737bff2b9SYuval Mintz 781408cc1fSYuval Mintz #define VFPF_ACQUIRE_OS_LINUX (0) 791408cc1fSYuval Mintz #define VFPF_ACQUIRE_OS_WINDOWS (1) 801408cc1fSYuval Mintz #define VFPF_ACQUIRE_OS_ESX (2) 811408cc1fSYuval Mintz #define VFPF_ACQUIRE_OS_SOLARIS (3) 821408cc1fSYuval Mintz #define VFPF_ACQUIRE_OS_LINUX_USERSPACE (4) 831408cc1fSYuval Mintz 841408cc1fSYuval Mintz struct vfpf_acquire_tlv { 851408cc1fSYuval Mintz struct vfpf_first_tlv first_tlv; 861408cc1fSYuval Mintz 871408cc1fSYuval Mintz struct vf_pf_vfdev_info { 88a044df83SYuval Mintz #define VFPF_ACQUIRE_CAP_PRE_FP_HSI (1 << 0) /* VF pre-FP hsi version */ 891408cc1fSYuval Mintz #define VFPF_ACQUIRE_CAP_100G (1 << 1) /* VF can support 100g */ 9008bc8f15SMintz, Yuval /* A requirement for supporting multi-Tx queues on a single queue-zone, 9108bc8f15SMintz, Yuval * VF would pass qids as additional information whenever passing queue 9208bc8f15SMintz, Yuval * references. 9308bc8f15SMintz, Yuval */ 9408bc8f15SMintz, Yuval #define VFPF_ACQUIRE_CAP_QUEUE_QIDS BIT(2) 951a850bfcSMintz, Yuval 961a850bfcSMintz, Yuval /* The VF is using the physical bar. While this is mostly internal 971a850bfcSMintz, Yuval * to the VF, might affect the number of CIDs supported assuming 981a850bfcSMintz, Yuval * QUEUE_QIDS is set. 991a850bfcSMintz, Yuval */ 1001a850bfcSMintz, Yuval #define VFPF_ACQUIRE_CAP_PHYSICAL_BAR BIT(3) 1011408cc1fSYuval Mintz u64 capabilities; 1021408cc1fSYuval Mintz u8 fw_major; 1031408cc1fSYuval Mintz u8 fw_minor; 1041408cc1fSYuval Mintz u8 fw_revision; 1051408cc1fSYuval Mintz u8 fw_engineering; 1061408cc1fSYuval Mintz u32 driver_version; 1071408cc1fSYuval Mintz u16 opaque_fid; /* ME register value */ 1081408cc1fSYuval Mintz u8 os_type; /* VFPF_ACQUIRE_OS_* value */ 1091fe614d1SYuval Mintz u8 eth_fp_hsi_major; 1101fe614d1SYuval Mintz u8 eth_fp_hsi_minor; 1111fe614d1SYuval Mintz u8 padding[3]; 1121408cc1fSYuval Mintz } vfdev_info; 1131408cc1fSYuval Mintz 1141408cc1fSYuval Mintz struct vf_pf_resc_request resc_request; 1151408cc1fSYuval Mintz 1161408cc1fSYuval Mintz u64 bulletin_addr; 1171408cc1fSYuval Mintz u32 bulletin_size; 1181408cc1fSYuval Mintz u32 padding; 1191408cc1fSYuval Mintz }; 1201408cc1fSYuval Mintz 121dacd88d6SYuval Mintz /* receive side scaling tlv */ 122dacd88d6SYuval Mintz struct vfpf_vport_update_rss_tlv { 123dacd88d6SYuval Mintz struct channel_tlv tl; 124dacd88d6SYuval Mintz 125dacd88d6SYuval Mintz u8 update_rss_flags; 126dacd88d6SYuval Mintz #define VFPF_UPDATE_RSS_CONFIG_FLAG BIT(0) 127dacd88d6SYuval Mintz #define VFPF_UPDATE_RSS_CAPS_FLAG BIT(1) 128dacd88d6SYuval Mintz #define VFPF_UPDATE_RSS_IND_TABLE_FLAG BIT(2) 129dacd88d6SYuval Mintz #define VFPF_UPDATE_RSS_KEY_FLAG BIT(3) 130dacd88d6SYuval Mintz 131dacd88d6SYuval Mintz u8 rss_enable; 132dacd88d6SYuval Mintz u8 rss_caps; 133dacd88d6SYuval Mintz u8 rss_table_size_log; /* The table size is 2 ^ rss_table_size_log */ 134dacd88d6SYuval Mintz u16 rss_ind_table[T_ETH_INDIRECTION_TABLE_SIZE]; 135dacd88d6SYuval Mintz u32 rss_key[T_ETH_RSS_KEY_SIZE]; 136dacd88d6SYuval Mintz }; 137dacd88d6SYuval Mintz 1381408cc1fSYuval Mintz struct pfvf_storm_stats { 1391408cc1fSYuval Mintz u32 address; 1401408cc1fSYuval Mintz u32 len; 1411408cc1fSYuval Mintz }; 1421408cc1fSYuval Mintz 1431408cc1fSYuval Mintz struct pfvf_stats_info { 1441408cc1fSYuval Mintz struct pfvf_storm_stats mstats; 1451408cc1fSYuval Mintz struct pfvf_storm_stats pstats; 1461408cc1fSYuval Mintz struct pfvf_storm_stats tstats; 1471408cc1fSYuval Mintz struct pfvf_storm_stats ustats; 1481408cc1fSYuval Mintz }; 1491408cc1fSYuval Mintz 1501408cc1fSYuval Mintz struct pfvf_acquire_resp_tlv { 1511408cc1fSYuval Mintz struct pfvf_tlv hdr; 1521408cc1fSYuval Mintz 1531408cc1fSYuval Mintz struct pf_vf_pfdev_info { 1541408cc1fSYuval Mintz u32 chip_num; 1551408cc1fSYuval Mintz u32 mfw_ver; 1561408cc1fSYuval Mintz 1571408cc1fSYuval Mintz u16 fw_major; 1581408cc1fSYuval Mintz u16 fw_minor; 1591408cc1fSYuval Mintz u16 fw_rev; 1601408cc1fSYuval Mintz u16 fw_eng; 1611408cc1fSYuval Mintz 1621408cc1fSYuval Mintz u64 capabilities; 1631408cc1fSYuval Mintz #define PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED BIT(0) 1641408cc1fSYuval Mintz #define PFVF_ACQUIRE_CAP_100G BIT(1) /* If set, 100g PF */ 1651408cc1fSYuval Mintz /* There are old PF versions where the PF might mistakenly override the sanity 1661408cc1fSYuval Mintz * mechanism [version-based] and allow a VF that can't be supported to pass 1671408cc1fSYuval Mintz * the acquisition phase. 1681408cc1fSYuval Mintz * To overcome this, PFs now indicate that they're past that point and the new 1691408cc1fSYuval Mintz * VFs would fail probe on the older PFs that fail to do so. 1701408cc1fSYuval Mintz */ 1711408cc1fSYuval Mintz #define PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE BIT(2) 1721408cc1fSYuval Mintz 17308bc8f15SMintz, Yuval /* PF expects queues to be received with additional qids */ 17408bc8f15SMintz, Yuval #define PFVF_ACQUIRE_CAP_QUEUE_QIDS BIT(3) 17508bc8f15SMintz, Yuval 1761408cc1fSYuval Mintz u16 db_size; 1771408cc1fSYuval Mintz u8 indices_per_sb; 1781408cc1fSYuval Mintz u8 os_type; 1791408cc1fSYuval Mintz 1801408cc1fSYuval Mintz /* These should match the PF's qed_dev values */ 1811408cc1fSYuval Mintz u16 chip_rev; 1821408cc1fSYuval Mintz u8 dev_type; 1831408cc1fSYuval Mintz 1841a850bfcSMintz, Yuval /* Doorbell bar size configured in HW: log(size) or 0 */ 1851a850bfcSMintz, Yuval u8 bar_size; 1861408cc1fSYuval Mintz 1871408cc1fSYuval Mintz struct pfvf_stats_info stats_info; 1881408cc1fSYuval Mintz 1891408cc1fSYuval Mintz u8 port_mac[ETH_ALEN]; 1901fe614d1SYuval Mintz 1911fe614d1SYuval Mintz /* It's possible PF had to configure an older fastpath HSI 1921fe614d1SYuval Mintz * [in case VF is newer than PF]. This is communicated back 1931fe614d1SYuval Mintz * to the VF. It can also be used in case of error due to 1941fe614d1SYuval Mintz * non-matching versions to shed light in VF about failure. 1951fe614d1SYuval Mintz */ 1961fe614d1SYuval Mintz u8 major_fp_hsi; 1971fe614d1SYuval Mintz u8 minor_fp_hsi; 1981408cc1fSYuval Mintz } pfdev_info; 1991408cc1fSYuval Mintz 2001408cc1fSYuval Mintz struct pf_vf_resc { 2011408cc1fSYuval Mintz #define PFVF_MAX_QUEUES_PER_VF 16 2021408cc1fSYuval Mintz #define PFVF_MAX_SBS_PER_VF 16 2031408cc1fSYuval Mintz struct hw_sb_info hw_sbs[PFVF_MAX_SBS_PER_VF]; 2041408cc1fSYuval Mintz u8 hw_qid[PFVF_MAX_QUEUES_PER_VF]; 2051408cc1fSYuval Mintz u8 cid[PFVF_MAX_QUEUES_PER_VF]; 2061408cc1fSYuval Mintz 2071408cc1fSYuval Mintz u8 num_rxqs; 2081408cc1fSYuval Mintz u8 num_txqs; 2091408cc1fSYuval Mintz u8 num_sbs; 2101408cc1fSYuval Mintz u8 num_mac_filters; 2111408cc1fSYuval Mintz u8 num_vlan_filters; 2121408cc1fSYuval Mintz u8 num_mc_filters; 21308bc8f15SMintz, Yuval u8 num_cids; 21408bc8f15SMintz, Yuval u8 padding; 2151408cc1fSYuval Mintz } resc; 2161408cc1fSYuval Mintz 2171408cc1fSYuval Mintz u32 bulletin_size; 2181408cc1fSYuval Mintz u32 padding; 2191408cc1fSYuval Mintz }; 2201408cc1fSYuval Mintz 221dacd88d6SYuval Mintz struct pfvf_start_queue_resp_tlv { 222dacd88d6SYuval Mintz struct pfvf_tlv hdr; 223dacd88d6SYuval Mintz u32 offset; /* offset to consumer/producer of queue */ 224dacd88d6SYuval Mintz u8 padding[4]; 225dacd88d6SYuval Mintz }; 226dacd88d6SYuval Mintz 22708bc8f15SMintz, Yuval /* Extended queue information - additional index for reference inside qzone. 22808bc8f15SMintz, Yuval * If commmunicated between VF/PF, each TLV relating to queues should be 22908bc8f15SMintz, Yuval * extended by one such [or have a future base TLV that already contains info]. 23008bc8f15SMintz, Yuval */ 23108bc8f15SMintz, Yuval struct vfpf_qid_tlv { 23208bc8f15SMintz, Yuval struct channel_tlv tl; 23308bc8f15SMintz, Yuval u8 qid; 23408bc8f15SMintz, Yuval u8 padding[3]; 23508bc8f15SMintz, Yuval }; 23608bc8f15SMintz, Yuval 237dacd88d6SYuval Mintz /* Setup Queue */ 238dacd88d6SYuval Mintz struct vfpf_start_rxq_tlv { 239dacd88d6SYuval Mintz struct vfpf_first_tlv first_tlv; 240dacd88d6SYuval Mintz 241dacd88d6SYuval Mintz /* physical addresses */ 242dacd88d6SYuval Mintz u64 rxq_addr; 243dacd88d6SYuval Mintz u64 deprecated_sge_addr; 244dacd88d6SYuval Mintz u64 cqe_pbl_addr; 245dacd88d6SYuval Mintz 246dacd88d6SYuval Mintz u16 cqe_pbl_size; 247dacd88d6SYuval Mintz u16 hw_sb; 248dacd88d6SYuval Mintz u16 rx_qid; 249dacd88d6SYuval Mintz u16 hc_rate; /* desired interrupts per sec. */ 250dacd88d6SYuval Mintz 251dacd88d6SYuval Mintz u16 bd_max_bytes; 252dacd88d6SYuval Mintz u16 stat_id; 253dacd88d6SYuval Mintz u8 sb_index; 254dacd88d6SYuval Mintz u8 padding[3]; 255dacd88d6SYuval Mintz }; 256dacd88d6SYuval Mintz 257dacd88d6SYuval Mintz struct vfpf_start_txq_tlv { 258dacd88d6SYuval Mintz struct vfpf_first_tlv first_tlv; 259dacd88d6SYuval Mintz 260dacd88d6SYuval Mintz /* physical addresses */ 261dacd88d6SYuval Mintz u64 pbl_addr; 262dacd88d6SYuval Mintz u16 pbl_size; 263dacd88d6SYuval Mintz u16 stat_id; 264dacd88d6SYuval Mintz u16 tx_qid; 265dacd88d6SYuval Mintz u16 hw_sb; 266dacd88d6SYuval Mintz 267dacd88d6SYuval Mintz u32 flags; /* VFPF_QUEUE_FLG_X flags */ 268dacd88d6SYuval Mintz u16 hc_rate; /* desired interrupts per sec. */ 269dacd88d6SYuval Mintz u8 sb_index; 270dacd88d6SYuval Mintz u8 padding[3]; 271dacd88d6SYuval Mintz }; 272dacd88d6SYuval Mintz 273dacd88d6SYuval Mintz /* Stop RX Queue */ 274dacd88d6SYuval Mintz struct vfpf_stop_rxqs_tlv { 275dacd88d6SYuval Mintz struct vfpf_first_tlv first_tlv; 276dacd88d6SYuval Mintz 277dacd88d6SYuval Mintz u16 rx_qid; 2784c4fa793SMintz, Yuval 2794c4fa793SMintz, Yuval /* this field is deprecated and should *always* be set to '1' */ 280dacd88d6SYuval Mintz u8 num_rxqs; 281dacd88d6SYuval Mintz u8 cqe_completion; 282dacd88d6SYuval Mintz u8 padding[4]; 283dacd88d6SYuval Mintz }; 284dacd88d6SYuval Mintz 285dacd88d6SYuval Mintz /* Stop TX Queues */ 286dacd88d6SYuval Mintz struct vfpf_stop_txqs_tlv { 287dacd88d6SYuval Mintz struct vfpf_first_tlv first_tlv; 288dacd88d6SYuval Mintz 289dacd88d6SYuval Mintz u16 tx_qid; 2904c4fa793SMintz, Yuval 2914c4fa793SMintz, Yuval /* this field is deprecated and should *always* be set to '1' */ 292dacd88d6SYuval Mintz u8 num_txqs; 293dacd88d6SYuval Mintz u8 padding[5]; 294dacd88d6SYuval Mintz }; 295dacd88d6SYuval Mintz 296dacd88d6SYuval Mintz struct vfpf_update_rxq_tlv { 297dacd88d6SYuval Mintz struct vfpf_first_tlv first_tlv; 298dacd88d6SYuval Mintz 299dacd88d6SYuval Mintz u64 deprecated_sge_addr[PFVF_MAX_QUEUES_PER_VF]; 300dacd88d6SYuval Mintz 301dacd88d6SYuval Mintz u16 rx_qid; 302dacd88d6SYuval Mintz u8 num_rxqs; 303dacd88d6SYuval Mintz u8 flags; 304dacd88d6SYuval Mintz #define VFPF_RXQ_UPD_INIT_SGE_DEPRECATE_FLAG BIT(0) 305dacd88d6SYuval Mintz #define VFPF_RXQ_UPD_COMPLETE_CQE_FLAG BIT(1) 306dacd88d6SYuval Mintz #define VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG BIT(2) 307dacd88d6SYuval Mintz 308dacd88d6SYuval Mintz u8 padding[4]; 309dacd88d6SYuval Mintz }; 310dacd88d6SYuval Mintz 311dacd88d6SYuval Mintz /* Set Queue Filters */ 312dacd88d6SYuval Mintz struct vfpf_q_mac_vlan_filter { 313dacd88d6SYuval Mintz u32 flags; 314dacd88d6SYuval Mintz #define VFPF_Q_FILTER_DEST_MAC_VALID 0x01 315dacd88d6SYuval Mintz #define VFPF_Q_FILTER_VLAN_TAG_VALID 0x02 316dacd88d6SYuval Mintz #define VFPF_Q_FILTER_SET_MAC 0x100 /* set/clear */ 317dacd88d6SYuval Mintz 318dacd88d6SYuval Mintz u8 mac[ETH_ALEN]; 319dacd88d6SYuval Mintz u16 vlan_tag; 320dacd88d6SYuval Mintz 321dacd88d6SYuval Mintz u8 padding[4]; 322dacd88d6SYuval Mintz }; 323dacd88d6SYuval Mintz 324dacd88d6SYuval Mintz /* Start a vport */ 325dacd88d6SYuval Mintz struct vfpf_vport_start_tlv { 326dacd88d6SYuval Mintz struct vfpf_first_tlv first_tlv; 327dacd88d6SYuval Mintz 328dacd88d6SYuval Mintz u64 sb_addr[PFVF_MAX_SBS_PER_VF]; 329dacd88d6SYuval Mintz 330dacd88d6SYuval Mintz u32 tpa_mode; 331dacd88d6SYuval Mintz u16 dep1; 332dacd88d6SYuval Mintz u16 mtu; 333dacd88d6SYuval Mintz 334dacd88d6SYuval Mintz u8 vport_id; 335dacd88d6SYuval Mintz u8 inner_vlan_removal; 336dacd88d6SYuval Mintz 337dacd88d6SYuval Mintz u8 only_untagged; 338dacd88d6SYuval Mintz u8 max_buffers_per_cqe; 339dacd88d6SYuval Mintz 340dacd88d6SYuval Mintz u8 padding[4]; 341dacd88d6SYuval Mintz }; 342dacd88d6SYuval Mintz 343dacd88d6SYuval Mintz /* Extended tlvs - need to add rss, mcast, accept mode tlvs */ 344dacd88d6SYuval Mintz struct vfpf_vport_update_activate_tlv { 345dacd88d6SYuval Mintz struct channel_tlv tl; 346dacd88d6SYuval Mintz u8 update_rx; 347dacd88d6SYuval Mintz u8 update_tx; 348dacd88d6SYuval Mintz u8 active_rx; 349dacd88d6SYuval Mintz u8 active_tx; 350dacd88d6SYuval Mintz }; 351dacd88d6SYuval Mintz 35217b235c1SYuval Mintz struct vfpf_vport_update_tx_switch_tlv { 35317b235c1SYuval Mintz struct channel_tlv tl; 35417b235c1SYuval Mintz u8 tx_switching; 35517b235c1SYuval Mintz u8 padding[3]; 35617b235c1SYuval Mintz }; 35717b235c1SYuval Mintz 35817b235c1SYuval Mintz struct vfpf_vport_update_vlan_strip_tlv { 35917b235c1SYuval Mintz struct channel_tlv tl; 36017b235c1SYuval Mintz u8 remove_vlan; 36117b235c1SYuval Mintz u8 padding[3]; 36217b235c1SYuval Mintz }; 36317b235c1SYuval Mintz 364dacd88d6SYuval Mintz struct vfpf_vport_update_mcast_bin_tlv { 365dacd88d6SYuval Mintz struct channel_tlv tl; 366dacd88d6SYuval Mintz u8 padding[4]; 367dacd88d6SYuval Mintz 36825c020a9SSudarsana Reddy Kalluru /* There are only 256 approx bins, and in HSI they're divided into 36925c020a9SSudarsana Reddy Kalluru * 32-bit values. As old VFs used to set-bit to the values on its side, 37025c020a9SSudarsana Reddy Kalluru * the upper half of the array is never expected to contain any data. 37125c020a9SSudarsana Reddy Kalluru */ 37225c020a9SSudarsana Reddy Kalluru u64 bins[4]; 37325c020a9SSudarsana Reddy Kalluru u64 obsolete_bins[4]; 374dacd88d6SYuval Mintz }; 375dacd88d6SYuval Mintz 376dacd88d6SYuval Mintz struct vfpf_vport_update_accept_param_tlv { 377dacd88d6SYuval Mintz struct channel_tlv tl; 378dacd88d6SYuval Mintz u8 update_rx_mode; 379dacd88d6SYuval Mintz u8 update_tx_mode; 380dacd88d6SYuval Mintz u8 rx_accept_filter; 381dacd88d6SYuval Mintz u8 tx_accept_filter; 382dacd88d6SYuval Mintz }; 383dacd88d6SYuval Mintz 38417b235c1SYuval Mintz struct vfpf_vport_update_accept_any_vlan_tlv { 38517b235c1SYuval Mintz struct channel_tlv tl; 38617b235c1SYuval Mintz u8 update_accept_any_vlan_flg; 38717b235c1SYuval Mintz u8 accept_any_vlan; 38817b235c1SYuval Mintz 38917b235c1SYuval Mintz u8 padding[2]; 39017b235c1SYuval Mintz }; 39117b235c1SYuval Mintz 39217b235c1SYuval Mintz struct vfpf_vport_update_sge_tpa_tlv { 39317b235c1SYuval Mintz struct channel_tlv tl; 39417b235c1SYuval Mintz 39517b235c1SYuval Mintz u16 sge_tpa_flags; 39617b235c1SYuval Mintz #define VFPF_TPA_IPV4_EN_FLAG BIT(0) 39717b235c1SYuval Mintz #define VFPF_TPA_IPV6_EN_FLAG BIT(1) 39817b235c1SYuval Mintz #define VFPF_TPA_PKT_SPLIT_FLAG BIT(2) 39917b235c1SYuval Mintz #define VFPF_TPA_HDR_DATA_SPLIT_FLAG BIT(3) 40017b235c1SYuval Mintz #define VFPF_TPA_GRO_CONSIST_FLAG BIT(4) 40117b235c1SYuval Mintz 40217b235c1SYuval Mintz u8 update_sge_tpa_flags; 40317b235c1SYuval Mintz #define VFPF_UPDATE_SGE_DEPRECATED_FLAG BIT(0) 40417b235c1SYuval Mintz #define VFPF_UPDATE_TPA_EN_FLAG BIT(1) 40517b235c1SYuval Mintz #define VFPF_UPDATE_TPA_PARAM_FLAG BIT(2) 40617b235c1SYuval Mintz 40717b235c1SYuval Mintz u8 max_buffers_per_cqe; 40817b235c1SYuval Mintz 40917b235c1SYuval Mintz u16 deprecated_sge_buff_size; 41017b235c1SYuval Mintz u16 tpa_max_size; 41117b235c1SYuval Mintz u16 tpa_min_size_to_start; 41217b235c1SYuval Mintz u16 tpa_min_size_to_cont; 41317b235c1SYuval Mintz 41417b235c1SYuval Mintz u8 tpa_max_aggs_num; 41517b235c1SYuval Mintz u8 padding[7]; 41617b235c1SYuval Mintz }; 41717b235c1SYuval Mintz 418dacd88d6SYuval Mintz /* Primary tlv as a header for various extended tlvs for 419dacd88d6SYuval Mintz * various functionalities in vport update ramrod. 420dacd88d6SYuval Mintz */ 421dacd88d6SYuval Mintz struct vfpf_vport_update_tlv { 422dacd88d6SYuval Mintz struct vfpf_first_tlv first_tlv; 423dacd88d6SYuval Mintz }; 424dacd88d6SYuval Mintz 425dacd88d6SYuval Mintz struct vfpf_ucast_filter_tlv { 426dacd88d6SYuval Mintz struct vfpf_first_tlv first_tlv; 427dacd88d6SYuval Mintz 428dacd88d6SYuval Mintz u8 opcode; 429dacd88d6SYuval Mintz u8 type; 430dacd88d6SYuval Mintz 431dacd88d6SYuval Mintz u8 mac[ETH_ALEN]; 432dacd88d6SYuval Mintz 433dacd88d6SYuval Mintz u16 vlan; 434dacd88d6SYuval Mintz u16 padding[3]; 435dacd88d6SYuval Mintz }; 436dacd88d6SYuval Mintz 437eaf3c0c6SChopra, Manish /* tunnel update param tlv */ 438eaf3c0c6SChopra, Manish struct vfpf_update_tunn_param_tlv { 439eaf3c0c6SChopra, Manish struct vfpf_first_tlv first_tlv; 440eaf3c0c6SChopra, Manish 441eaf3c0c6SChopra, Manish u8 tun_mode_update_mask; 442eaf3c0c6SChopra, Manish u8 tunn_mode; 443eaf3c0c6SChopra, Manish u8 update_tun_cls; 444eaf3c0c6SChopra, Manish u8 vxlan_clss; 445eaf3c0c6SChopra, Manish u8 l2gre_clss; 446eaf3c0c6SChopra, Manish u8 ipgre_clss; 447eaf3c0c6SChopra, Manish u8 l2geneve_clss; 448eaf3c0c6SChopra, Manish u8 ipgeneve_clss; 449eaf3c0c6SChopra, Manish u8 update_geneve_port; 450eaf3c0c6SChopra, Manish u8 update_vxlan_port; 451eaf3c0c6SChopra, Manish u16 geneve_port; 452eaf3c0c6SChopra, Manish u16 vxlan_port; 453eaf3c0c6SChopra, Manish u8 padding[2]; 454eaf3c0c6SChopra, Manish }; 455eaf3c0c6SChopra, Manish 456eaf3c0c6SChopra, Manish struct pfvf_update_tunn_param_tlv { 457eaf3c0c6SChopra, Manish struct pfvf_tlv hdr; 458eaf3c0c6SChopra, Manish 459eaf3c0c6SChopra, Manish u16 tunn_feature_mask; 460eaf3c0c6SChopra, Manish u8 vxlan_mode; 461eaf3c0c6SChopra, Manish u8 l2geneve_mode; 462eaf3c0c6SChopra, Manish u8 ipgeneve_mode; 463eaf3c0c6SChopra, Manish u8 l2gre_mode; 464eaf3c0c6SChopra, Manish u8 ipgre_mode; 465eaf3c0c6SChopra, Manish u8 vxlan_clss; 466eaf3c0c6SChopra, Manish u8 l2gre_clss; 467eaf3c0c6SChopra, Manish u8 ipgre_clss; 468eaf3c0c6SChopra, Manish u8 l2geneve_clss; 469eaf3c0c6SChopra, Manish u8 ipgeneve_clss; 470eaf3c0c6SChopra, Manish u16 vxlan_udp_port; 471eaf3c0c6SChopra, Manish u16 geneve_udp_port; 472eaf3c0c6SChopra, Manish }; 473eaf3c0c6SChopra, Manish 47432a47e72SYuval Mintz struct tlv_buffer_size { 47532a47e72SYuval Mintz u8 tlv_buffer[TLV_BUFFER_SIZE]; 47632a47e72SYuval Mintz }; 47732a47e72SYuval Mintz 478477f2d14SRahul Verma struct vfpf_update_coalesce { 479477f2d14SRahul Verma struct vfpf_first_tlv first_tlv; 480477f2d14SRahul Verma u16 rx_coal; 481477f2d14SRahul Verma u16 tx_coal; 482477f2d14SRahul Verma u16 qid; 483477f2d14SRahul Verma u8 padding[2]; 484477f2d14SRahul Verma }; 485bf5a94bfSRahul Verma 486bf5a94bfSRahul Verma struct vfpf_read_coal_req_tlv { 487bf5a94bfSRahul Verma struct vfpf_first_tlv first_tlv; 488bf5a94bfSRahul Verma u16 qid; 489bf5a94bfSRahul Verma u8 is_rx; 490bf5a94bfSRahul Verma u8 padding[5]; 491bf5a94bfSRahul Verma }; 492bf5a94bfSRahul Verma 493bf5a94bfSRahul Verma struct pfvf_read_coal_resp_tlv { 494bf5a94bfSRahul Verma struct pfvf_tlv hdr; 495bf5a94bfSRahul Verma u16 coal; 496bf5a94bfSRahul Verma u8 padding[6]; 497bf5a94bfSRahul Verma }; 498bf5a94bfSRahul Verma 499809c45a0SShahed Shaikh struct vfpf_bulletin_update_mac_tlv { 500809c45a0SShahed Shaikh struct vfpf_first_tlv first_tlv; 501809c45a0SShahed Shaikh u8 mac[ETH_ALEN]; 502809c45a0SShahed Shaikh u8 padding[2]; 503809c45a0SShahed Shaikh }; 504809c45a0SShahed Shaikh 50532a47e72SYuval Mintz union vfpf_tlvs { 50637bff2b9SYuval Mintz struct vfpf_first_tlv first_tlv; 5071408cc1fSYuval Mintz struct vfpf_acquire_tlv acquire; 508dacd88d6SYuval Mintz struct vfpf_start_rxq_tlv start_rxq; 509dacd88d6SYuval Mintz struct vfpf_start_txq_tlv start_txq; 510dacd88d6SYuval Mintz struct vfpf_stop_rxqs_tlv stop_rxqs; 511dacd88d6SYuval Mintz struct vfpf_stop_txqs_tlv stop_txqs; 51217b235c1SYuval Mintz struct vfpf_update_rxq_tlv update_rxq; 513dacd88d6SYuval Mintz struct vfpf_vport_start_tlv start_vport; 514dacd88d6SYuval Mintz struct vfpf_vport_update_tlv vport_update; 515dacd88d6SYuval Mintz struct vfpf_ucast_filter_tlv ucast_filter; 516eaf3c0c6SChopra, Manish struct vfpf_update_tunn_param_tlv tunn_param_update; 517477f2d14SRahul Verma struct vfpf_update_coalesce update_coalesce; 518bf5a94bfSRahul Verma struct vfpf_read_coal_req_tlv read_coal_req; 519809c45a0SShahed Shaikh struct vfpf_bulletin_update_mac_tlv bulletin_update_mac; 52032a47e72SYuval Mintz struct tlv_buffer_size tlv_buf_size; 52132a47e72SYuval Mintz }; 52232a47e72SYuval Mintz 52332a47e72SYuval Mintz union pfvf_tlvs { 52437bff2b9SYuval Mintz struct pfvf_def_resp_tlv default_resp; 5251408cc1fSYuval Mintz struct pfvf_acquire_resp_tlv acquire_resp; 52632a47e72SYuval Mintz struct tlv_buffer_size tlv_buf_size; 527dacd88d6SYuval Mintz struct pfvf_start_queue_resp_tlv queue_start; 528eaf3c0c6SChopra, Manish struct pfvf_update_tunn_param_tlv tunn_param_resp; 529bf5a94bfSRahul Verma struct pfvf_read_coal_resp_tlv read_coal_resp; 53032a47e72SYuval Mintz }; 53132a47e72SYuval Mintz 53208feecd7SYuval Mintz enum qed_bulletin_bit { 533eff16960SYuval Mintz /* Alert the VF that a forced MAC was set by the PF */ 534eff16960SYuval Mintz MAC_ADDR_FORCED = 0, 53508feecd7SYuval Mintz /* Alert the VF that a forced VLAN was set by the PF */ 53608feecd7SYuval Mintz VLAN_ADDR_FORCED = 2, 53708feecd7SYuval Mintz 53808feecd7SYuval Mintz /* Indicate that `default_only_untagged' contains actual data */ 53908feecd7SYuval Mintz VFPF_BULLETIN_UNTAGGED_DEFAULT = 3, 54008feecd7SYuval Mintz VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED = 4, 54108feecd7SYuval Mintz 542eff16960SYuval Mintz /* Alert the VF that suggested mac was sent by the PF. 543eff16960SYuval Mintz * MAC_ADDR will be disabled in case MAC_ADDR_FORCED is set. 544eff16960SYuval Mintz */ 545eff16960SYuval Mintz VFPF_BULLETIN_MAC_ADDR = 5 54608feecd7SYuval Mintz }; 54708feecd7SYuval Mintz 54832a47e72SYuval Mintz struct qed_bulletin_content { 54932a47e72SYuval Mintz /* crc of structure to ensure is not in mid-update */ 55032a47e72SYuval Mintz u32 crc; 55132a47e72SYuval Mintz 55232a47e72SYuval Mintz u32 version; 55332a47e72SYuval Mintz 55432a47e72SYuval Mintz /* bitmap indicating which fields hold valid values */ 55532a47e72SYuval Mintz u64 valid_bitmap; 55636558c3dSYuval Mintz 55736558c3dSYuval Mintz /* used for MAC_ADDR or MAC_ADDR_FORCED */ 55836558c3dSYuval Mintz u8 mac[ETH_ALEN]; 55936558c3dSYuval Mintz 56036558c3dSYuval Mintz /* If valid, 1 => only untagged Rx if no vlan is configured */ 56136558c3dSYuval Mintz u8 default_only_untagged; 56236558c3dSYuval Mintz u8 padding; 56336558c3dSYuval Mintz 56436558c3dSYuval Mintz /* The following is a 'copy' of qed_mcp_link_state, 56536558c3dSYuval Mintz * qed_mcp_link_params and qed_mcp_link_capabilities. Since it's 56636558c3dSYuval Mintz * possible the structs will increase further along the road we cannot 56736558c3dSYuval Mintz * have it here; Instead we need to have all of its fields. 56836558c3dSYuval Mintz */ 56936558c3dSYuval Mintz u8 req_autoneg; 57036558c3dSYuval Mintz u8 req_autoneg_pause; 57136558c3dSYuval Mintz u8 req_forced_rx; 57236558c3dSYuval Mintz u8 req_forced_tx; 57336558c3dSYuval Mintz u8 padding2[4]; 57436558c3dSYuval Mintz 57536558c3dSYuval Mintz u32 req_adv_speed; 57636558c3dSYuval Mintz u32 req_forced_speed; 57736558c3dSYuval Mintz u32 req_loopback; 57836558c3dSYuval Mintz u32 padding3; 57936558c3dSYuval Mintz 58036558c3dSYuval Mintz u8 link_up; 58136558c3dSYuval Mintz u8 full_duplex; 58236558c3dSYuval Mintz u8 autoneg; 58336558c3dSYuval Mintz u8 autoneg_complete; 58436558c3dSYuval Mintz u8 parallel_detection; 58536558c3dSYuval Mintz u8 pfc_enabled; 58636558c3dSYuval Mintz u8 partner_tx_flow_ctrl_en; 58736558c3dSYuval Mintz u8 partner_rx_flow_ctrl_en; 58836558c3dSYuval Mintz u8 partner_adv_pause; 58936558c3dSYuval Mintz u8 sfp_tx_fault; 59097379f15SChopra, Manish u16 vxlan_udp_port; 59197379f15SChopra, Manish u16 geneve_udp_port; 59297379f15SChopra, Manish u8 padding4[2]; 59336558c3dSYuval Mintz 59436558c3dSYuval Mintz u32 speed; 59536558c3dSYuval Mintz u32 partner_adv_speed; 59636558c3dSYuval Mintz 59736558c3dSYuval Mintz u32 capability_speed; 59808feecd7SYuval Mintz 59908feecd7SYuval Mintz /* Forced vlan */ 60008feecd7SYuval Mintz u16 pvid; 60108feecd7SYuval Mintz u16 padding5; 60232a47e72SYuval Mintz }; 60332a47e72SYuval Mintz 60432a47e72SYuval Mintz struct qed_bulletin { 60532a47e72SYuval Mintz dma_addr_t phys; 60632a47e72SYuval Mintz struct qed_bulletin_content *p_virt; 60732a47e72SYuval Mintz u32 size; 60832a47e72SYuval Mintz }; 60932a47e72SYuval Mintz 61037bff2b9SYuval Mintz enum { 61137bff2b9SYuval Mintz CHANNEL_TLV_NONE, /* ends tlv sequence */ 6121408cc1fSYuval Mintz CHANNEL_TLV_ACQUIRE, 613dacd88d6SYuval Mintz CHANNEL_TLV_VPORT_START, 614dacd88d6SYuval Mintz CHANNEL_TLV_VPORT_UPDATE, 615dacd88d6SYuval Mintz CHANNEL_TLV_VPORT_TEARDOWN, 616dacd88d6SYuval Mintz CHANNEL_TLV_START_RXQ, 617dacd88d6SYuval Mintz CHANNEL_TLV_START_TXQ, 618dacd88d6SYuval Mintz CHANNEL_TLV_STOP_RXQS, 619dacd88d6SYuval Mintz CHANNEL_TLV_STOP_TXQS, 62017b235c1SYuval Mintz CHANNEL_TLV_UPDATE_RXQ, 6210b55e27dSYuval Mintz CHANNEL_TLV_INT_CLEANUP, 6220b55e27dSYuval Mintz CHANNEL_TLV_CLOSE, 6230b55e27dSYuval Mintz CHANNEL_TLV_RELEASE, 62437bff2b9SYuval Mintz CHANNEL_TLV_LIST_END, 625dacd88d6SYuval Mintz CHANNEL_TLV_UCAST_FILTER, 626dacd88d6SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_ACTIVATE, 62717b235c1SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH, 62817b235c1SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP, 629dacd88d6SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_MCAST, 630dacd88d6SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM, 631dacd88d6SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_RSS, 63217b235c1SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN, 63317b235c1SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_SGE_TPA, 634eaf3c0c6SChopra, Manish CHANNEL_TLV_UPDATE_TUNN_PARAM, 635477f2d14SRahul Verma CHANNEL_TLV_COALESCE_UPDATE, 63608bc8f15SMintz, Yuval CHANNEL_TLV_QID, 637bf5a94bfSRahul Verma CHANNEL_TLV_COALESCE_READ, 638809c45a0SShahed Shaikh CHANNEL_TLV_BULLETIN_UPDATE_MAC, 639dacd88d6SYuval Mintz CHANNEL_TLV_MAX, 640dacd88d6SYuval Mintz 641dacd88d6SYuval Mintz /* Required for iterating over vport-update tlvs. 642dacd88d6SYuval Mintz * Will break in case non-sequential vport-update tlvs. 643dacd88d6SYuval Mintz */ 64417b235c1SYuval Mintz CHANNEL_TLV_VPORT_UPDATE_MAX = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA + 1, 64537bff2b9SYuval Mintz }; 64637bff2b9SYuval Mintz 64708bc8f15SMintz, Yuval /* Default number of CIDs [total of both Rx and Tx] to be requested 64808bc8f15SMintz, Yuval * by default, and maximum possible number. 64908bc8f15SMintz, Yuval */ 65008bc8f15SMintz, Yuval #define QED_ETH_VF_DEFAULT_NUM_CIDS (32) 65108bc8f15SMintz, Yuval #define QED_ETH_VF_MAX_NUM_CIDS (250) 65208bc8f15SMintz, Yuval 6531408cc1fSYuval Mintz /* This data is held in the qed_hwfn structure for VFs only. */ 6541408cc1fSYuval Mintz struct qed_vf_iov { 6551408cc1fSYuval Mintz union vfpf_tlvs *vf2pf_request; 6561408cc1fSYuval Mintz dma_addr_t vf2pf_request_phys; 6571408cc1fSYuval Mintz union pfvf_tlvs *pf2vf_reply; 6581408cc1fSYuval Mintz dma_addr_t pf2vf_reply_phys; 6591408cc1fSYuval Mintz 6601408cc1fSYuval Mintz /* Should be taken whenever the mailbox buffers are accessed */ 6611408cc1fSYuval Mintz struct mutex mutex; 6621408cc1fSYuval Mintz u8 *offset; 6631408cc1fSYuval Mintz 6641408cc1fSYuval Mintz /* Bulletin Board */ 6651408cc1fSYuval Mintz struct qed_bulletin bulletin; 6661408cc1fSYuval Mintz struct qed_bulletin_content bulletin_shadow; 6671408cc1fSYuval Mintz 6681408cc1fSYuval Mintz /* we set aside a copy of the acquire response */ 6691408cc1fSYuval Mintz struct pfvf_acquire_resp_tlv acquire_resp; 670d8c2c7e3SYuval Mintz 671d8c2c7e3SYuval Mintz /* In case PF originates prior to the fp-hsi version comparison, 672d8c2c7e3SYuval Mintz * this has to be propagated as it affects the fastpath. 673d8c2c7e3SYuval Mintz */ 674d8c2c7e3SYuval Mintz bool b_pre_fp_hsi; 67550a20714SMintz, Yuval 67650a20714SMintz, Yuval /* Current day VFs are passing the SBs physical address on vport 67750a20714SMintz, Yuval * start, and as they lack an IGU mapping they need to store the 67850a20714SMintz, Yuval * addresses of previously registered SBs. 67950a20714SMintz, Yuval * Even if we were to change configuration flow, due to backward 68050a20714SMintz, Yuval * compatibility [with older PFs] we'd still need to store these. 68150a20714SMintz, Yuval */ 68250a20714SMintz, Yuval struct qed_sb_info *sbs_info[PFVF_MAX_SBS_PER_VF]; 6831a850bfcSMintz, Yuval 6841a850bfcSMintz, Yuval /* Determines whether VF utilizes doorbells via limited register 6851a850bfcSMintz, Yuval * bar or via the doorbell bar. 6861a850bfcSMintz, Yuval */ 6871a850bfcSMintz, Yuval bool b_doorbell_bar; 6881408cc1fSYuval Mintz }; 6891408cc1fSYuval Mintz 690477f2d14SRahul Verma /** 691*19198e4eSPrabhakar Kushwaha * qed_vf_pf_set_coalesce(): VF - Set Rx/Tx coalesce per VF's relative queue. 692*19198e4eSPrabhakar Kushwaha * Coalesce value '0' will omit the 693*19198e4eSPrabhakar Kushwaha * configuration. 694477f2d14SRahul Verma * 695*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 696*19198e4eSPrabhakar Kushwaha * @rx_coal: coalesce value in micro second for rx queue. 697*19198e4eSPrabhakar Kushwaha * @tx_coal: coalesce value in micro second for tx queue. 698*19198e4eSPrabhakar Kushwaha * @p_cid: queue cid. 699*19198e4eSPrabhakar Kushwaha * 700*19198e4eSPrabhakar Kushwaha * Return: Int. 701477f2d14SRahul Verma * 702477f2d14SRahul Verma **/ 703477f2d14SRahul Verma int qed_vf_pf_set_coalesce(struct qed_hwfn *p_hwfn, 704477f2d14SRahul Verma u16 rx_coal, 705477f2d14SRahul Verma u16 tx_coal, struct qed_queue_cid *p_cid); 706477f2d14SRahul Verma 707bf5a94bfSRahul Verma /** 708*19198e4eSPrabhakar Kushwaha * qed_vf_pf_get_coalesce(): VF - Get coalesce per VF's relative queue. 709bf5a94bfSRahul Verma * 710*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 711*19198e4eSPrabhakar Kushwaha * @p_coal: coalesce value in micro second for VF queues. 712*19198e4eSPrabhakar Kushwaha * @p_cid: queue cid. 713bf5a94bfSRahul Verma * 714*19198e4eSPrabhakar Kushwaha * Return: Int. 715bf5a94bfSRahul Verma **/ 716bf5a94bfSRahul Verma int qed_vf_pf_get_coalesce(struct qed_hwfn *p_hwfn, 717bf5a94bfSRahul Verma u16 *p_coal, struct qed_queue_cid *p_cid); 718bf5a94bfSRahul Verma 7191408cc1fSYuval Mintz #ifdef CONFIG_QED_SRIOV 7201408cc1fSYuval Mintz /** 721*19198e4eSPrabhakar Kushwaha * qed_vf_read_bulletin(): Read the VF bulletin and act on it if needed. 72236558c3dSYuval Mintz * 723*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 724*19198e4eSPrabhakar Kushwaha * @p_change: qed fills 1 iff bulletin board has changed, 0 otherwise. 72536558c3dSYuval Mintz * 726*19198e4eSPrabhakar Kushwaha * Return: enum _qed_status. 72736558c3dSYuval Mintz */ 72836558c3dSYuval Mintz int qed_vf_read_bulletin(struct qed_hwfn *p_hwfn, u8 *p_change); 72936558c3dSYuval Mintz 73036558c3dSYuval Mintz /** 731*19198e4eSPrabhakar Kushwaha * qed_vf_get_link_params(): Get link parameters for VF from qed 73236558c3dSYuval Mintz * 733*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 734*19198e4eSPrabhakar Kushwaha * @params: the link params structure to be filled for the VF. 735*19198e4eSPrabhakar Kushwaha * 736*19198e4eSPrabhakar Kushwaha * Return: Void. 73736558c3dSYuval Mintz */ 73836558c3dSYuval Mintz void qed_vf_get_link_params(struct qed_hwfn *p_hwfn, 73936558c3dSYuval Mintz struct qed_mcp_link_params *params); 74036558c3dSYuval Mintz 74136558c3dSYuval Mintz /** 742*19198e4eSPrabhakar Kushwaha * qed_vf_get_link_state(): Get link state for VF from qed. 74336558c3dSYuval Mintz * 744*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 745*19198e4eSPrabhakar Kushwaha * @link: the link state structure to be filled for the VF 746*19198e4eSPrabhakar Kushwaha * 747*19198e4eSPrabhakar Kushwaha * Return: Void. 74836558c3dSYuval Mintz */ 74936558c3dSYuval Mintz void qed_vf_get_link_state(struct qed_hwfn *p_hwfn, 75036558c3dSYuval Mintz struct qed_mcp_link_state *link); 75136558c3dSYuval Mintz 75236558c3dSYuval Mintz /** 753*19198e4eSPrabhakar Kushwaha * qed_vf_get_link_caps(): Get link capabilities for VF from qed. 75436558c3dSYuval Mintz * 755*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 756*19198e4eSPrabhakar Kushwaha * @p_link_caps: the link capabilities structure to be filled for the VF 757*19198e4eSPrabhakar Kushwaha * 758*19198e4eSPrabhakar Kushwaha * Return: Void. 75936558c3dSYuval Mintz */ 76036558c3dSYuval Mintz void qed_vf_get_link_caps(struct qed_hwfn *p_hwfn, 76136558c3dSYuval Mintz struct qed_mcp_link_capabilities *p_link_caps); 76236558c3dSYuval Mintz 76336558c3dSYuval Mintz /** 764*19198e4eSPrabhakar Kushwaha * qed_vf_get_num_rxqs(): Get number of Rx queues allocated for VF by qed 7651408cc1fSYuval Mintz * 766*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 767*19198e4eSPrabhakar Kushwaha * @num_rxqs: allocated RX queues 768*19198e4eSPrabhakar Kushwaha * 769*19198e4eSPrabhakar Kushwaha * Return: Void. 7701408cc1fSYuval Mintz */ 7711408cc1fSYuval Mintz void qed_vf_get_num_rxqs(struct qed_hwfn *p_hwfn, u8 *num_rxqs); 7721408cc1fSYuval Mintz 7731408cc1fSYuval Mintz /** 774*19198e4eSPrabhakar Kushwaha * qed_vf_get_num_txqs(): Get number of Rx queues allocated for VF by qed 7750db711bbSMintz, Yuval * 776*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 777*19198e4eSPrabhakar Kushwaha * @num_txqs: allocated RX queues 778*19198e4eSPrabhakar Kushwaha * 779*19198e4eSPrabhakar Kushwaha * Return: Void. 7800db711bbSMintz, Yuval */ 7810db711bbSMintz, Yuval void qed_vf_get_num_txqs(struct qed_hwfn *p_hwfn, u8 *num_txqs); 7820db711bbSMintz, Yuval 7830db711bbSMintz, Yuval /** 784*19198e4eSPrabhakar Kushwaha * qed_vf_get_num_cids(): Get number of available connections 785*19198e4eSPrabhakar Kushwaha * [both Rx and Tx] for VF 786cbb8a12cSMintz, Yuval * 787*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 788*19198e4eSPrabhakar Kushwaha * @num_cids: allocated number of connections 789*19198e4eSPrabhakar Kushwaha * 790*19198e4eSPrabhakar Kushwaha * Return: Void. 791cbb8a12cSMintz, Yuval */ 792cbb8a12cSMintz, Yuval void qed_vf_get_num_cids(struct qed_hwfn *p_hwfn, u8 *num_cids); 793cbb8a12cSMintz, Yuval 794cbb8a12cSMintz, Yuval /** 795*19198e4eSPrabhakar Kushwaha * qed_vf_get_port_mac(): Get port mac address for VF. 7961408cc1fSYuval Mintz * 797*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 798*19198e4eSPrabhakar Kushwaha * @port_mac: destination location for port mac 799*19198e4eSPrabhakar Kushwaha * 800*19198e4eSPrabhakar Kushwaha * Return: Void. 8011408cc1fSYuval Mintz */ 8021408cc1fSYuval Mintz void qed_vf_get_port_mac(struct qed_hwfn *p_hwfn, u8 *port_mac); 8031408cc1fSYuval Mintz 8041408cc1fSYuval Mintz /** 805*19198e4eSPrabhakar Kushwaha * qed_vf_get_num_vlan_filters(): Get number of VLAN filters allocated 806*19198e4eSPrabhakar Kushwaha * for VF by qed. 8071408cc1fSYuval Mintz * 808*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 809*19198e4eSPrabhakar Kushwaha * @num_vlan_filters: allocated VLAN filters 810*19198e4eSPrabhakar Kushwaha * 811*19198e4eSPrabhakar Kushwaha * Return: Void. 8121408cc1fSYuval Mintz */ 8131408cc1fSYuval Mintz void qed_vf_get_num_vlan_filters(struct qed_hwfn *p_hwfn, 8141408cc1fSYuval Mintz u8 *num_vlan_filters); 8151408cc1fSYuval Mintz 8161408cc1fSYuval Mintz /** 817*19198e4eSPrabhakar Kushwaha * qed_vf_get_num_mac_filters(): Get number of MAC filters allocated 818*19198e4eSPrabhakar Kushwaha * for VF by qed 819b0fca312SMintz, Yuval * 820*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 821*19198e4eSPrabhakar Kushwaha * @num_mac_filters: allocated MAC filters 822*19198e4eSPrabhakar Kushwaha * 823*19198e4eSPrabhakar Kushwaha * Return: Void. 824b0fca312SMintz, Yuval */ 825b0fca312SMintz, Yuval void qed_vf_get_num_mac_filters(struct qed_hwfn *p_hwfn, u8 *num_mac_filters); 826b0fca312SMintz, Yuval 827b0fca312SMintz, Yuval /** 828*19198e4eSPrabhakar Kushwaha * qed_vf_check_mac(): Check if VF can set a MAC address 829eff16960SYuval Mintz * 830*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 831*19198e4eSPrabhakar Kushwaha * @mac: Mac. 832eff16960SYuval Mintz * 833*19198e4eSPrabhakar Kushwaha * Return: bool. 834eff16960SYuval Mintz */ 835eff16960SYuval Mintz bool qed_vf_check_mac(struct qed_hwfn *p_hwfn, u8 *mac); 836eff16960SYuval Mintz 837eff16960SYuval Mintz /** 838*19198e4eSPrabhakar Kushwaha * qed_vf_get_fw_version(): Set firmware version information 839*19198e4eSPrabhakar Kushwaha * in dev_info from VFs acquire response tlv 8401408cc1fSYuval Mintz * 841*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 842*19198e4eSPrabhakar Kushwaha * @fw_major: FW major. 843*19198e4eSPrabhakar Kushwaha * @fw_minor: FW minor. 844*19198e4eSPrabhakar Kushwaha * @fw_rev: FW rev. 845*19198e4eSPrabhakar Kushwaha * @fw_eng: FW eng. 846*19198e4eSPrabhakar Kushwaha * 847*19198e4eSPrabhakar Kushwaha * Return: Void. 8481408cc1fSYuval Mintz */ 8491408cc1fSYuval Mintz void qed_vf_get_fw_version(struct qed_hwfn *p_hwfn, 8501408cc1fSYuval Mintz u16 *fw_major, u16 *fw_minor, 8511408cc1fSYuval Mintz u16 *fw_rev, u16 *fw_eng); 8521408cc1fSYuval Mintz 8531408cc1fSYuval Mintz /** 854*19198e4eSPrabhakar Kushwaha * qed_vf_hw_prepare(): hw preparation for VF sends ACQUIRE message 8551408cc1fSYuval Mintz * 856*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 8571408cc1fSYuval Mintz * 858*19198e4eSPrabhakar Kushwaha * Return: Int. 8591408cc1fSYuval Mintz */ 8601408cc1fSYuval Mintz int qed_vf_hw_prepare(struct qed_hwfn *p_hwfn); 8611408cc1fSYuval Mintz 8621408cc1fSYuval Mintz /** 863*19198e4eSPrabhakar Kushwaha * qed_vf_pf_rxq_start(): start the RX Queue by sending a message to the PF 864dacd88d6SYuval Mintz * 865*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 866*19198e4eSPrabhakar Kushwaha * @p_cid: Only relative fields are relevant 867*19198e4eSPrabhakar Kushwaha * @bd_max_bytes: maximum number of bytes per bd 868*19198e4eSPrabhakar Kushwaha * @bd_chain_phys_addr: physical address of bd chain 869*19198e4eSPrabhakar Kushwaha * @cqe_pbl_addr: physical address of pbl 870*19198e4eSPrabhakar Kushwaha * @cqe_pbl_size: pbl size 871*19198e4eSPrabhakar Kushwaha * @pp_prod: pointer to the producer to be used in fastpath 872*19198e4eSPrabhakar Kushwaha * 873*19198e4eSPrabhakar Kushwaha * Return: Int. 874dacd88d6SYuval Mintz */ 875dacd88d6SYuval Mintz int qed_vf_pf_rxq_start(struct qed_hwfn *p_hwfn, 8763da7a37aSMintz, Yuval struct qed_queue_cid *p_cid, 877dacd88d6SYuval Mintz u16 bd_max_bytes, 878dacd88d6SYuval Mintz dma_addr_t bd_chain_phys_addr, 879dacd88d6SYuval Mintz dma_addr_t cqe_pbl_addr, 880dacd88d6SYuval Mintz u16 cqe_pbl_size, void __iomem **pp_prod); 881dacd88d6SYuval Mintz 882dacd88d6SYuval Mintz /** 883*19198e4eSPrabhakar Kushwaha * qed_vf_pf_txq_start(): VF - start the TX queue by sending a message to the 884dacd88d6SYuval Mintz * PF. 885dacd88d6SYuval Mintz * 886*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 887*19198e4eSPrabhakar Kushwaha * @p_cid: CID. 888*19198e4eSPrabhakar Kushwaha * @pbl_addr: PBL address. 889*19198e4eSPrabhakar Kushwaha * @pbl_size: PBL Size. 890*19198e4eSPrabhakar Kushwaha * @pp_doorbell: pointer to address to which to write the doorbell too. 891dacd88d6SYuval Mintz * 892*19198e4eSPrabhakar Kushwaha * Return: Int. 893dacd88d6SYuval Mintz */ 8943da7a37aSMintz, Yuval int 8953da7a37aSMintz, Yuval qed_vf_pf_txq_start(struct qed_hwfn *p_hwfn, 8963da7a37aSMintz, Yuval struct qed_queue_cid *p_cid, 897dacd88d6SYuval Mintz dma_addr_t pbl_addr, 898dacd88d6SYuval Mintz u16 pbl_size, void __iomem **pp_doorbell); 899dacd88d6SYuval Mintz 900dacd88d6SYuval Mintz /** 901*19198e4eSPrabhakar Kushwaha * qed_vf_pf_rxq_stop(): VF - stop the RX queue by sending a message to the PF. 902dacd88d6SYuval Mintz * 903*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 904*19198e4eSPrabhakar Kushwaha * @p_cid: CID. 905*19198e4eSPrabhakar Kushwaha * @cqe_completion: CQE Completion. 906dacd88d6SYuval Mintz * 907*19198e4eSPrabhakar Kushwaha * Return: Int. 908dacd88d6SYuval Mintz */ 909dacd88d6SYuval Mintz int qed_vf_pf_rxq_stop(struct qed_hwfn *p_hwfn, 9103da7a37aSMintz, Yuval struct qed_queue_cid *p_cid, bool cqe_completion); 911dacd88d6SYuval Mintz 912dacd88d6SYuval Mintz /** 913*19198e4eSPrabhakar Kushwaha * qed_vf_pf_txq_stop(): VF - stop the TX queue by sending a message to the PF. 914dacd88d6SYuval Mintz * 915*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 916*19198e4eSPrabhakar Kushwaha * @p_cid: CID. 917dacd88d6SYuval Mintz * 918*19198e4eSPrabhakar Kushwaha * Return: Int. 919dacd88d6SYuval Mintz */ 9203da7a37aSMintz, Yuval int qed_vf_pf_txq_stop(struct qed_hwfn *p_hwfn, struct qed_queue_cid *p_cid); 921dacd88d6SYuval Mintz 922dacd88d6SYuval Mintz /** 923*19198e4eSPrabhakar Kushwaha * qed_vf_pf_vport_update(): VF - send a vport update command. 924dacd88d6SYuval Mintz * 925*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 926*19198e4eSPrabhakar Kushwaha * @p_params: Params 927dacd88d6SYuval Mintz * 928*19198e4eSPrabhakar Kushwaha * Return: Int. 929dacd88d6SYuval Mintz */ 930dacd88d6SYuval Mintz int qed_vf_pf_vport_update(struct qed_hwfn *p_hwfn, 931dacd88d6SYuval Mintz struct qed_sp_vport_update_params *p_params); 932dacd88d6SYuval Mintz 933dacd88d6SYuval Mintz /** 934*19198e4eSPrabhakar Kushwaha * qed_vf_pf_reset(): VF - send a close message to PF. 9350b55e27dSYuval Mintz * 936*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 9370b55e27dSYuval Mintz * 938*19198e4eSPrabhakar Kushwaha * Return: enum _qed_status 9390b55e27dSYuval Mintz */ 9400b55e27dSYuval Mintz int qed_vf_pf_reset(struct qed_hwfn *p_hwfn); 9410b55e27dSYuval Mintz 9420b55e27dSYuval Mintz /** 943*19198e4eSPrabhakar Kushwaha * qed_vf_pf_release(): VF - free vf`s memories. 9440b55e27dSYuval Mintz * 945*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 9460b55e27dSYuval Mintz * 947*19198e4eSPrabhakar Kushwaha * Return: enum _qed_status 9480b55e27dSYuval Mintz */ 9490b55e27dSYuval Mintz int qed_vf_pf_release(struct qed_hwfn *p_hwfn); 95036558c3dSYuval Mintz 9510b55e27dSYuval Mintz /** 952*19198e4eSPrabhakar Kushwaha * qed_vf_get_igu_sb_id(): Get the IGU SB ID for a given 9531408cc1fSYuval Mintz * sb_id. For VFs igu sbs don't have to be contiguous 9541408cc1fSYuval Mintz * 955*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 956*19198e4eSPrabhakar Kushwaha * @sb_id: SB ID. 9571408cc1fSYuval Mintz * 958*19198e4eSPrabhakar Kushwaha * Return: INLINE u16 9591408cc1fSYuval Mintz */ 9601408cc1fSYuval Mintz u16 qed_vf_get_igu_sb_id(struct qed_hwfn *p_hwfn, u16 sb_id); 9610b55e27dSYuval Mintz 9620b55e27dSYuval Mintz /** 963*19198e4eSPrabhakar Kushwaha * qed_vf_set_sb_info(): Stores [or removes] a configured sb_info. 96450a20714SMintz, Yuval * 965*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 966*19198e4eSPrabhakar Kushwaha * @sb_id: zero-based SB index [for fastpath] 967*19198e4eSPrabhakar Kushwaha * @p_sb: may be NULL [during removal]. 968*19198e4eSPrabhakar Kushwaha * 969*19198e4eSPrabhakar Kushwaha * Return: Void. 97050a20714SMintz, Yuval */ 97150a20714SMintz, Yuval void qed_vf_set_sb_info(struct qed_hwfn *p_hwfn, 97250a20714SMintz, Yuval u16 sb_id, struct qed_sb_info *p_sb); 97350a20714SMintz, Yuval 97450a20714SMintz, Yuval /** 975*19198e4eSPrabhakar Kushwaha * qed_vf_pf_vport_start(): perform vport start for VF. 976dacd88d6SYuval Mintz * 977*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 978*19198e4eSPrabhakar Kushwaha * @vport_id: Vport ID. 979*19198e4eSPrabhakar Kushwaha * @mtu: MTU. 980*19198e4eSPrabhakar Kushwaha * @inner_vlan_removal: Innter VLAN removal. 981*19198e4eSPrabhakar Kushwaha * @tpa_mode: TPA mode 982*19198e4eSPrabhakar Kushwaha * @max_buffers_per_cqe: Max buffer pre CQE. 983*19198e4eSPrabhakar Kushwaha * @only_untagged: default behavior regarding vlan acceptance 984dacd88d6SYuval Mintz * 985*19198e4eSPrabhakar Kushwaha * Return: enum _qed_status 986dacd88d6SYuval Mintz */ 987dacd88d6SYuval Mintz int qed_vf_pf_vport_start(struct qed_hwfn *p_hwfn, 988dacd88d6SYuval Mintz u8 vport_id, 989dacd88d6SYuval Mintz u16 mtu, 990dacd88d6SYuval Mintz u8 inner_vlan_removal, 991dacd88d6SYuval Mintz enum qed_tpa_mode tpa_mode, 99208feecd7SYuval Mintz u8 max_buffers_per_cqe, u8 only_untagged); 993dacd88d6SYuval Mintz 994dacd88d6SYuval Mintz /** 995*19198e4eSPrabhakar Kushwaha * qed_vf_pf_vport_stop(): stop the VF's vport 996dacd88d6SYuval Mintz * 997*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 998dacd88d6SYuval Mintz * 999*19198e4eSPrabhakar Kushwaha * Return: enum _qed_status 1000dacd88d6SYuval Mintz */ 1001dacd88d6SYuval Mintz int qed_vf_pf_vport_stop(struct qed_hwfn *p_hwfn); 1002dacd88d6SYuval Mintz 1003dacd88d6SYuval Mintz int qed_vf_pf_filter_ucast(struct qed_hwfn *p_hwfn, 1004dacd88d6SYuval Mintz struct qed_filter_ucast *p_param); 1005dacd88d6SYuval Mintz 1006dacd88d6SYuval Mintz void qed_vf_pf_filter_mcast(struct qed_hwfn *p_hwfn, 1007dacd88d6SYuval Mintz struct qed_filter_mcast *p_filter_cmd); 1008dacd88d6SYuval Mintz 1009dacd88d6SYuval Mintz /** 1010*19198e4eSPrabhakar Kushwaha * qed_vf_pf_int_cleanup(): clean the SB of the VF 10110b55e27dSYuval Mintz * 1012*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 10130b55e27dSYuval Mintz * 1014*19198e4eSPrabhakar Kushwaha * Return: enum _qed_status 10150b55e27dSYuval Mintz */ 10160b55e27dSYuval Mintz int qed_vf_pf_int_cleanup(struct qed_hwfn *p_hwfn); 101736558c3dSYuval Mintz 101836558c3dSYuval Mintz /** 1019*19198e4eSPrabhakar Kushwaha * __qed_vf_get_link_params(): return the link params in a given bulletin board 102036558c3dSYuval Mintz * 1021*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 1022*19198e4eSPrabhakar Kushwaha * @p_params: pointer to a struct to fill with link params 1023*19198e4eSPrabhakar Kushwaha * @p_bulletin: Bulletin. 1024*19198e4eSPrabhakar Kushwaha * 1025*19198e4eSPrabhakar Kushwaha * Return: Void. 102636558c3dSYuval Mintz */ 102736558c3dSYuval Mintz void __qed_vf_get_link_params(struct qed_hwfn *p_hwfn, 102836558c3dSYuval Mintz struct qed_mcp_link_params *p_params, 102936558c3dSYuval Mintz struct qed_bulletin_content *p_bulletin); 103036558c3dSYuval Mintz 103136558c3dSYuval Mintz /** 1032*19198e4eSPrabhakar Kushwaha * __qed_vf_get_link_state(): return the link state in a given bulletin board 103336558c3dSYuval Mintz * 1034*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 1035*19198e4eSPrabhakar Kushwaha * @p_link: pointer to a struct to fill with link state 1036*19198e4eSPrabhakar Kushwaha * @p_bulletin: Bulletin. 1037*19198e4eSPrabhakar Kushwaha * 1038*19198e4eSPrabhakar Kushwaha * Return: Void. 103936558c3dSYuval Mintz */ 104036558c3dSYuval Mintz void __qed_vf_get_link_state(struct qed_hwfn *p_hwfn, 104136558c3dSYuval Mintz struct qed_mcp_link_state *p_link, 104236558c3dSYuval Mintz struct qed_bulletin_content *p_bulletin); 104336558c3dSYuval Mintz 104436558c3dSYuval Mintz /** 1045*19198e4eSPrabhakar Kushwaha * __qed_vf_get_link_caps(): return the link capabilities in a given 1046*19198e4eSPrabhakar Kushwaha * bulletin board 104736558c3dSYuval Mintz * 1048*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 1049*19198e4eSPrabhakar Kushwaha * @p_link_caps: pointer to a struct to fill with link capabilities 1050*19198e4eSPrabhakar Kushwaha * @p_bulletin: Bulletin. 1051*19198e4eSPrabhakar Kushwaha * 1052*19198e4eSPrabhakar Kushwaha * Return: Void. 105336558c3dSYuval Mintz */ 105436558c3dSYuval Mintz void __qed_vf_get_link_caps(struct qed_hwfn *p_hwfn, 105536558c3dSYuval Mintz struct qed_mcp_link_capabilities *p_link_caps, 105636558c3dSYuval Mintz struct qed_bulletin_content *p_bulletin); 105736558c3dSYuval Mintz 105836558c3dSYuval Mintz void qed_iov_vf_task(struct work_struct *work); 1059eaf3c0c6SChopra, Manish void qed_vf_set_vf_start_tunn_update_param(struct qed_tunnel_info *p_tun); 1060eaf3c0c6SChopra, Manish int qed_vf_pf_tunnel_param_update(struct qed_hwfn *p_hwfn, 1061eaf3c0c6SChopra, Manish struct qed_tunnel_info *p_tunn); 10621a850bfcSMintz, Yuval 10631a850bfcSMintz, Yuval u32 qed_vf_hw_bar_size(struct qed_hwfn *p_hwfn, enum BAR_ID bar_id); 1064809c45a0SShahed Shaikh /** 1065*19198e4eSPrabhakar Kushwaha * qed_vf_pf_bulletin_update_mac(): Ask PF to update the MAC address in 1066*19198e4eSPrabhakar Kushwaha * it's bulletin board 1067809c45a0SShahed Shaikh * 1068*19198e4eSPrabhakar Kushwaha * @p_hwfn: HW device data. 1069*19198e4eSPrabhakar Kushwaha * @p_mac: mac address to be updated in bulletin board 1070*19198e4eSPrabhakar Kushwaha * 1071*19198e4eSPrabhakar Kushwaha * Return: Int. 1072809c45a0SShahed Shaikh */ 1073809c45a0SShahed Shaikh int qed_vf_pf_bulletin_update_mac(struct qed_hwfn *p_hwfn, u8 *p_mac); 1074809c45a0SShahed Shaikh 10751408cc1fSYuval Mintz #else 107636558c3dSYuval Mintz static inline void qed_vf_get_link_params(struct qed_hwfn *p_hwfn, 107736558c3dSYuval Mintz struct qed_mcp_link_params *params) 107836558c3dSYuval Mintz { 107936558c3dSYuval Mintz } 108036558c3dSYuval Mintz 108136558c3dSYuval Mintz static inline void qed_vf_get_link_state(struct qed_hwfn *p_hwfn, 108236558c3dSYuval Mintz struct qed_mcp_link_state *link) 108336558c3dSYuval Mintz { 108436558c3dSYuval Mintz } 108536558c3dSYuval Mintz 108636558c3dSYuval Mintz static inline void 108736558c3dSYuval Mintz qed_vf_get_link_caps(struct qed_hwfn *p_hwfn, 108836558c3dSYuval Mintz struct qed_mcp_link_capabilities *p_link_caps) 108936558c3dSYuval Mintz { 109036558c3dSYuval Mintz } 109136558c3dSYuval Mintz 10921408cc1fSYuval Mintz static inline void qed_vf_get_num_rxqs(struct qed_hwfn *p_hwfn, u8 *num_rxqs) 10931408cc1fSYuval Mintz { 10941408cc1fSYuval Mintz } 10951408cc1fSYuval Mintz 10960db711bbSMintz, Yuval static inline void qed_vf_get_num_txqs(struct qed_hwfn *p_hwfn, u8 *num_txqs) 10970db711bbSMintz, Yuval { 10980db711bbSMintz, Yuval } 10990db711bbSMintz, Yuval 1100cbb8a12cSMintz, Yuval static inline void qed_vf_get_num_cids(struct qed_hwfn *p_hwfn, u8 *num_cids) 1101cbb8a12cSMintz, Yuval { 1102cbb8a12cSMintz, Yuval } 1103cbb8a12cSMintz, Yuval 11041408cc1fSYuval Mintz static inline void qed_vf_get_port_mac(struct qed_hwfn *p_hwfn, u8 *port_mac) 11051408cc1fSYuval Mintz { 11061408cc1fSYuval Mintz } 11071408cc1fSYuval Mintz 11081408cc1fSYuval Mintz static inline void qed_vf_get_num_vlan_filters(struct qed_hwfn *p_hwfn, 11091408cc1fSYuval Mintz u8 *num_vlan_filters) 11101408cc1fSYuval Mintz { 11111408cc1fSYuval Mintz } 11121408cc1fSYuval Mintz 1113b0fca312SMintz, Yuval static inline void qed_vf_get_num_mac_filters(struct qed_hwfn *p_hwfn, 1114b0fca312SMintz, Yuval u8 *num_mac_filters) 1115b0fca312SMintz, Yuval { 1116b0fca312SMintz, Yuval } 1117b0fca312SMintz, Yuval 1118eff16960SYuval Mintz static inline bool qed_vf_check_mac(struct qed_hwfn *p_hwfn, u8 *mac) 1119eff16960SYuval Mintz { 1120eff16960SYuval Mintz return false; 1121eff16960SYuval Mintz } 1122eff16960SYuval Mintz 11231408cc1fSYuval Mintz static inline void qed_vf_get_fw_version(struct qed_hwfn *p_hwfn, 11241408cc1fSYuval Mintz u16 *fw_major, u16 *fw_minor, 11251408cc1fSYuval Mintz u16 *fw_rev, u16 *fw_eng) 11261408cc1fSYuval Mintz { 11271408cc1fSYuval Mintz } 11281408cc1fSYuval Mintz 11291408cc1fSYuval Mintz static inline int qed_vf_hw_prepare(struct qed_hwfn *p_hwfn) 11301408cc1fSYuval Mintz { 11311408cc1fSYuval Mintz return -EINVAL; 11321408cc1fSYuval Mintz } 11331408cc1fSYuval Mintz 1134dacd88d6SYuval Mintz static inline int qed_vf_pf_rxq_start(struct qed_hwfn *p_hwfn, 11353da7a37aSMintz, Yuval struct qed_queue_cid *p_cid, 1136dacd88d6SYuval Mintz u16 bd_max_bytes, 1137dacd88d6SYuval Mintz dma_addr_t bd_chain_phys_adr, 1138dacd88d6SYuval Mintz dma_addr_t cqe_pbl_addr, 1139dacd88d6SYuval Mintz u16 cqe_pbl_size, void __iomem **pp_prod) 1140dacd88d6SYuval Mintz { 1141dacd88d6SYuval Mintz return -EINVAL; 1142dacd88d6SYuval Mintz } 1143dacd88d6SYuval Mintz 1144dacd88d6SYuval Mintz static inline int qed_vf_pf_txq_start(struct qed_hwfn *p_hwfn, 11453da7a37aSMintz, Yuval struct qed_queue_cid *p_cid, 1146dacd88d6SYuval Mintz dma_addr_t pbl_addr, 1147dacd88d6SYuval Mintz u16 pbl_size, void __iomem **pp_doorbell) 1148dacd88d6SYuval Mintz { 1149dacd88d6SYuval Mintz return -EINVAL; 1150dacd88d6SYuval Mintz } 1151dacd88d6SYuval Mintz 1152dacd88d6SYuval Mintz static inline int qed_vf_pf_rxq_stop(struct qed_hwfn *p_hwfn, 11533da7a37aSMintz, Yuval struct qed_queue_cid *p_cid, 11543da7a37aSMintz, Yuval bool cqe_completion) 1155dacd88d6SYuval Mintz { 1156dacd88d6SYuval Mintz return -EINVAL; 1157dacd88d6SYuval Mintz } 1158dacd88d6SYuval Mintz 11593da7a37aSMintz, Yuval static inline int qed_vf_pf_txq_stop(struct qed_hwfn *p_hwfn, 11603da7a37aSMintz, Yuval struct qed_queue_cid *p_cid) 1161dacd88d6SYuval Mintz { 1162dacd88d6SYuval Mintz return -EINVAL; 1163dacd88d6SYuval Mintz } 1164dacd88d6SYuval Mintz 1165dacd88d6SYuval Mintz static inline int 1166dacd88d6SYuval Mintz qed_vf_pf_vport_update(struct qed_hwfn *p_hwfn, 1167dacd88d6SYuval Mintz struct qed_sp_vport_update_params *p_params) 1168dacd88d6SYuval Mintz { 1169dacd88d6SYuval Mintz return -EINVAL; 1170dacd88d6SYuval Mintz } 1171dacd88d6SYuval Mintz 11720b55e27dSYuval Mintz static inline int qed_vf_pf_reset(struct qed_hwfn *p_hwfn) 11730b55e27dSYuval Mintz { 11740b55e27dSYuval Mintz return -EINVAL; 11750b55e27dSYuval Mintz } 11760b55e27dSYuval Mintz 11770b55e27dSYuval Mintz static inline int qed_vf_pf_release(struct qed_hwfn *p_hwfn) 11780b55e27dSYuval Mintz { 11790b55e27dSYuval Mintz return -EINVAL; 11800b55e27dSYuval Mintz } 11810b55e27dSYuval Mintz 11821408cc1fSYuval Mintz static inline u16 qed_vf_get_igu_sb_id(struct qed_hwfn *p_hwfn, u16 sb_id) 11831408cc1fSYuval Mintz { 11841408cc1fSYuval Mintz return 0; 11851408cc1fSYuval Mintz } 11860b55e27dSYuval Mintz 11872f3ca449SArnd Bergmann static inline void qed_vf_set_sb_info(struct qed_hwfn *p_hwfn, u16 sb_id, 11882f3ca449SArnd Bergmann struct qed_sb_info *p_sb) 11892f3ca449SArnd Bergmann { 11902f3ca449SArnd Bergmann } 11912f3ca449SArnd Bergmann 1192dacd88d6SYuval Mintz static inline int qed_vf_pf_vport_start(struct qed_hwfn *p_hwfn, 1193dacd88d6SYuval Mintz u8 vport_id, 1194dacd88d6SYuval Mintz u16 mtu, 1195dacd88d6SYuval Mintz u8 inner_vlan_removal, 1196dacd88d6SYuval Mintz enum qed_tpa_mode tpa_mode, 119708feecd7SYuval Mintz u8 max_buffers_per_cqe, 119808feecd7SYuval Mintz u8 only_untagged) 1199dacd88d6SYuval Mintz { 1200dacd88d6SYuval Mintz return -EINVAL; 1201dacd88d6SYuval Mintz } 1202dacd88d6SYuval Mintz 1203dacd88d6SYuval Mintz static inline int qed_vf_pf_vport_stop(struct qed_hwfn *p_hwfn) 1204dacd88d6SYuval Mintz { 1205dacd88d6SYuval Mintz return -EINVAL; 1206dacd88d6SYuval Mintz } 1207dacd88d6SYuval Mintz 1208dacd88d6SYuval Mintz static inline int qed_vf_pf_filter_ucast(struct qed_hwfn *p_hwfn, 1209dacd88d6SYuval Mintz struct qed_filter_ucast *p_param) 1210dacd88d6SYuval Mintz { 1211dacd88d6SYuval Mintz return -EINVAL; 1212dacd88d6SYuval Mintz } 1213dacd88d6SYuval Mintz 1214dacd88d6SYuval Mintz static inline void qed_vf_pf_filter_mcast(struct qed_hwfn *p_hwfn, 1215dacd88d6SYuval Mintz struct qed_filter_mcast *p_filter_cmd) 1216dacd88d6SYuval Mintz { 1217dacd88d6SYuval Mintz } 1218dacd88d6SYuval Mintz 12190b55e27dSYuval Mintz static inline int qed_vf_pf_int_cleanup(struct qed_hwfn *p_hwfn) 12200b55e27dSYuval Mintz { 12210b55e27dSYuval Mintz return -EINVAL; 12220b55e27dSYuval Mintz } 122336558c3dSYuval Mintz 122436558c3dSYuval Mintz static inline void __qed_vf_get_link_params(struct qed_hwfn *p_hwfn, 122536558c3dSYuval Mintz struct qed_mcp_link_params 122636558c3dSYuval Mintz *p_params, 122736558c3dSYuval Mintz struct qed_bulletin_content 122836558c3dSYuval Mintz *p_bulletin) 122936558c3dSYuval Mintz { 123036558c3dSYuval Mintz } 123136558c3dSYuval Mintz 123236558c3dSYuval Mintz static inline void __qed_vf_get_link_state(struct qed_hwfn *p_hwfn, 123336558c3dSYuval Mintz struct qed_mcp_link_state *p_link, 123436558c3dSYuval Mintz struct qed_bulletin_content 123536558c3dSYuval Mintz *p_bulletin) 123636558c3dSYuval Mintz { 123736558c3dSYuval Mintz } 123836558c3dSYuval Mintz 123936558c3dSYuval Mintz static inline void 124036558c3dSYuval Mintz __qed_vf_get_link_caps(struct qed_hwfn *p_hwfn, 124136558c3dSYuval Mintz struct qed_mcp_link_capabilities *p_link_caps, 124236558c3dSYuval Mintz struct qed_bulletin_content *p_bulletin) 124336558c3dSYuval Mintz { 124436558c3dSYuval Mintz } 124536558c3dSYuval Mintz 124636558c3dSYuval Mintz static inline void qed_iov_vf_task(struct work_struct *work) 124736558c3dSYuval Mintz { 124836558c3dSYuval Mintz } 1249eaf3c0c6SChopra, Manish 1250eaf3c0c6SChopra, Manish static inline void 1251eaf3c0c6SChopra, Manish qed_vf_set_vf_start_tunn_update_param(struct qed_tunnel_info *p_tun) 1252eaf3c0c6SChopra, Manish { 1253eaf3c0c6SChopra, Manish } 1254eaf3c0c6SChopra, Manish 1255eaf3c0c6SChopra, Manish static inline int qed_vf_pf_tunnel_param_update(struct qed_hwfn *p_hwfn, 1256eaf3c0c6SChopra, Manish struct qed_tunnel_info *p_tunn) 1257eaf3c0c6SChopra, Manish { 1258eaf3c0c6SChopra, Manish return -EINVAL; 1259eaf3c0c6SChopra, Manish } 12601a850bfcSMintz, Yuval 1261809c45a0SShahed Shaikh static inline int qed_vf_pf_bulletin_update_mac(struct qed_hwfn *p_hwfn, 1262809c45a0SShahed Shaikh u8 *p_mac) 1263809c45a0SShahed Shaikh { 1264809c45a0SShahed Shaikh return -EINVAL; 1265809c45a0SShahed Shaikh } 1266809c45a0SShahed Shaikh 12671a850bfcSMintz, Yuval static inline u32 12681a850bfcSMintz, Yuval qed_vf_hw_bar_size(struct qed_hwfn *p_hwfn, 12691a850bfcSMintz, Yuval enum BAR_ID bar_id) 12701a850bfcSMintz, Yuval { 12711a850bfcSMintz, Yuval return 0; 12721a850bfcSMintz, Yuval } 12731408cc1fSYuval Mintz #endif 12741408cc1fSYuval Mintz 127532a47e72SYuval Mintz #endif 1276