132a47e72SYuval Mintz /* QLogic qed NIC Driver 2e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 332a47e72SYuval Mintz * 4e8f1cb50SMintz, Yuval * This software is available to you under a choice of one of two 5e8f1cb50SMintz, Yuval * licenses. You may choose to be licensed under the terms of the GNU 6e8f1cb50SMintz, Yuval * General Public License (GPL) Version 2, available from the file 7e8f1cb50SMintz, Yuval * COPYING in the main directory of this source tree, or the 8e8f1cb50SMintz, Yuval * OpenIB.org BSD license below: 9e8f1cb50SMintz, Yuval * 10e8f1cb50SMintz, Yuval * Redistribution and use in source and binary forms, with or 11e8f1cb50SMintz, Yuval * without modification, are permitted provided that the following 12e8f1cb50SMintz, Yuval * conditions are met: 13e8f1cb50SMintz, Yuval * 14e8f1cb50SMintz, Yuval * - Redistributions of source code must retain the above 15e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 16e8f1cb50SMintz, Yuval * disclaimer. 17e8f1cb50SMintz, Yuval * 18e8f1cb50SMintz, Yuval * - Redistributions in binary form must reproduce the above 19e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 20e8f1cb50SMintz, Yuval * disclaimer in the documentation and /or other materials 21e8f1cb50SMintz, Yuval * provided with the distribution. 22e8f1cb50SMintz, Yuval * 23e8f1cb50SMintz, Yuval * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e8f1cb50SMintz, Yuval * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e8f1cb50SMintz, Yuval * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e8f1cb50SMintz, Yuval * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e8f1cb50SMintz, Yuval * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e8f1cb50SMintz, Yuval * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e8f1cb50SMintz, Yuval * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e8f1cb50SMintz, Yuval * SOFTWARE. 3132a47e72SYuval Mintz */ 3232a47e72SYuval Mintz 3332a47e72SYuval Mintz #ifndef _QED_SRIOV_H 3432a47e72SYuval Mintz #define _QED_SRIOV_H 3532a47e72SYuval Mintz #include <linux/types.h> 3632a47e72SYuval Mintz #include "qed_vf.h" 371cf2b1a9SYuval Mintz 381cf2b1a9SYuval Mintz #define QED_ETH_VF_NUM_MAC_FILTERS 1 391cf2b1a9SYuval Mintz #define QED_ETH_VF_NUM_VLAN_FILTERS 2 4032a47e72SYuval Mintz #define QED_VF_ARRAY_LENGTH (3) 4132a47e72SYuval Mintz 4214b84e86SArnd Bergmann #ifdef CONFIG_QED_SRIOV 4332a47e72SYuval Mintz #define IS_VF(cdev) ((cdev)->b_is_vf) 4432a47e72SYuval Mintz #define IS_PF(cdev) (!((cdev)->b_is_vf)) 4532a47e72SYuval Mintz #define IS_PF_SRIOV(p_hwfn) (!!((p_hwfn)->cdev->p_iov_info)) 4632a47e72SYuval Mintz #else 4714b84e86SArnd Bergmann #define IS_VF(cdev) (0) 4814b84e86SArnd Bergmann #define IS_PF(cdev) (1) 4932a47e72SYuval Mintz #define IS_PF_SRIOV(p_hwfn) (0) 5032a47e72SYuval Mintz #endif 5132a47e72SYuval Mintz #define IS_PF_SRIOV_ALLOC(p_hwfn) (!!((p_hwfn)->pf_iov_info)) 5232a47e72SYuval Mintz 531408cc1fSYuval Mintz #define QED_MAX_VF_CHAINS_PER_PF 16 541408cc1fSYuval Mintz 5508feecd7SYuval Mintz #define QED_ETH_MAX_VF_NUM_VLAN_FILTERS \ 5608feecd7SYuval Mintz (MAX_NUM_VFS * QED_ETH_VF_NUM_VLAN_FILTERS) 5708feecd7SYuval Mintz 58dacd88d6SYuval Mintz enum qed_iov_vport_update_flag { 59dacd88d6SYuval Mintz QED_IOV_VP_UPDATE_ACTIVATE, 6017b235c1SYuval Mintz QED_IOV_VP_UPDATE_VLAN_STRIP, 6117b235c1SYuval Mintz QED_IOV_VP_UPDATE_TX_SWITCH, 62dacd88d6SYuval Mintz QED_IOV_VP_UPDATE_MCAST, 63dacd88d6SYuval Mintz QED_IOV_VP_UPDATE_ACCEPT_PARAM, 64dacd88d6SYuval Mintz QED_IOV_VP_UPDATE_RSS, 6517b235c1SYuval Mintz QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN, 6617b235c1SYuval Mintz QED_IOV_VP_UPDATE_SGE_TPA, 67dacd88d6SYuval Mintz QED_IOV_VP_UPDATE_MAX, 68dacd88d6SYuval Mintz }; 69dacd88d6SYuval Mintz 700b55e27dSYuval Mintz struct qed_public_vf_info { 710b55e27dSYuval Mintz /* These copies will later be reflected in the bulletin board, 720b55e27dSYuval Mintz * but this copy should be newer. 730b55e27dSYuval Mintz */ 74eff16960SYuval Mintz u8 forced_mac[ETH_ALEN]; 7508feecd7SYuval Mintz u16 forced_vlan; 760b55e27dSYuval Mintz u8 mac[ETH_ALEN]; 77733def6aSYuval Mintz 78733def6aSYuval Mintz /* IFLA_VF_LINK_STATE_<X> */ 79733def6aSYuval Mintz int link_state; 80733def6aSYuval Mintz 81733def6aSYuval Mintz /* Currently configured Tx rate in MB/sec. 0 if unconfigured */ 82733def6aSYuval Mintz int tx_rate; 83f990c82cSMintz, Yuval 84f990c82cSMintz, Yuval /* Trusted VFs can configure promiscuous mode. 85f990c82cSMintz, Yuval * Also store shadow promisc configuration if needed. 86f990c82cSMintz, Yuval */ 87f990c82cSMintz, Yuval bool is_trusted_configured; 88f990c82cSMintz, Yuval bool is_trusted_request; 89f990c82cSMintz, Yuval u8 rx_accept_mode; 90f990c82cSMintz, Yuval u8 tx_accept_mode; 910b55e27dSYuval Mintz }; 920b55e27dSYuval Mintz 933da7a37aSMintz, Yuval struct qed_iov_vf_init_params { 943da7a37aSMintz, Yuval u16 rel_vf_id; 953da7a37aSMintz, Yuval 963da7a37aSMintz, Yuval /* Number of requested Queues; Currently, don't support different 973da7a37aSMintz, Yuval * number of Rx/Tx queues. 983da7a37aSMintz, Yuval */ 993da7a37aSMintz, Yuval 1003da7a37aSMintz, Yuval u16 num_queues; 1013da7a37aSMintz, Yuval 1023da7a37aSMintz, Yuval /* Allow the client to choose which qzones to use for Rx/Tx, 1033da7a37aSMintz, Yuval * and which queue_base to use for Tx queues on a per-queue basis. 1043da7a37aSMintz, Yuval * Notice values should be relative to the PF resources. 1053da7a37aSMintz, Yuval */ 1063da7a37aSMintz, Yuval u16 req_rx_queue[QED_MAX_VF_CHAINS_PER_PF]; 1073da7a37aSMintz, Yuval u16 req_tx_queue[QED_MAX_VF_CHAINS_PER_PF]; 1083da7a37aSMintz, Yuval }; 1093da7a37aSMintz, Yuval 11032a47e72SYuval Mintz /* This struct is part of qed_dev and contains data relevant to all hwfns; 11132a47e72SYuval Mintz * Initialized only if SR-IOV cpabability is exposed in PCIe config space. 11232a47e72SYuval Mintz */ 11332a47e72SYuval Mintz struct qed_hw_sriov_info { 11432a47e72SYuval Mintz int pos; /* capability position */ 11532a47e72SYuval Mintz int nres; /* number of resources */ 11632a47e72SYuval Mintz u32 cap; /* SR-IOV Capabilities */ 11732a47e72SYuval Mintz u16 ctrl; /* SR-IOV Control */ 11832a47e72SYuval Mintz u16 total_vfs; /* total VFs associated with the PF */ 11932a47e72SYuval Mintz u16 num_vfs; /* number of vfs that have been started */ 12032a47e72SYuval Mintz u16 initial_vfs; /* initial VFs associated with the PF */ 12132a47e72SYuval Mintz u16 nr_virtfn; /* number of VFs available */ 12232a47e72SYuval Mintz u16 offset; /* first VF Routing ID offset */ 12332a47e72SYuval Mintz u16 stride; /* following VF stride */ 12432a47e72SYuval Mintz u16 vf_device_id; /* VF device id */ 12532a47e72SYuval Mintz u32 pgsz; /* page size for BAR alignment */ 12632a47e72SYuval Mintz u8 link; /* Function Dependency Link */ 12732a47e72SYuval Mintz 12832a47e72SYuval Mintz u32 first_vf_in_pf; 12932a47e72SYuval Mintz }; 13032a47e72SYuval Mintz 13132a47e72SYuval Mintz /* This mailbox is maintained per VF in its PF contains all information 13232a47e72SYuval Mintz * required for sending / receiving a message. 13332a47e72SYuval Mintz */ 13432a47e72SYuval Mintz struct qed_iov_vf_mbx { 13532a47e72SYuval Mintz union vfpf_tlvs *req_virt; 13632a47e72SYuval Mintz dma_addr_t req_phys; 13732a47e72SYuval Mintz union pfvf_tlvs *reply_virt; 13832a47e72SYuval Mintz dma_addr_t reply_phys; 13937bff2b9SYuval Mintz 14037bff2b9SYuval Mintz /* Address in VF where a pending message is located */ 14137bff2b9SYuval Mintz dma_addr_t pending_req; 14237bff2b9SYuval Mintz 143fd3c615aSMintz, Yuval /* Message from VF awaits handling */ 144fd3c615aSMintz, Yuval bool b_pending_msg; 145fd3c615aSMintz, Yuval 14637bff2b9SYuval Mintz u8 *offset; 14737bff2b9SYuval Mintz 14837bff2b9SYuval Mintz /* saved VF request header */ 14937bff2b9SYuval Mintz struct vfpf_first_tlv first_tlv; 15032a47e72SYuval Mintz }; 15132a47e72SYuval Mintz 1521408cc1fSYuval Mintz struct qed_vf_q_info { 1531408cc1fSYuval Mintz u16 fw_rx_qid; 1543da7a37aSMintz, Yuval struct qed_queue_cid *p_rx_cid; 1551408cc1fSYuval Mintz u16 fw_tx_qid; 1563da7a37aSMintz, Yuval struct qed_queue_cid *p_tx_cid; 1571408cc1fSYuval Mintz u8 fw_cid; 1581408cc1fSYuval Mintz }; 1591408cc1fSYuval Mintz 16032a47e72SYuval Mintz enum vf_state { 1611408cc1fSYuval Mintz VF_FREE = 0, /* VF ready to be acquired holds no resc */ 1621408cc1fSYuval Mintz VF_ACQUIRED, /* VF, acquired, but not initalized */ 163dacd88d6SYuval Mintz VF_ENABLED, /* VF, Enabled */ 1640b55e27dSYuval Mintz VF_RESET, /* VF, FLR'd, pending cleanup */ 16532a47e72SYuval Mintz VF_STOPPED /* VF, Stopped */ 16632a47e72SYuval Mintz }; 16732a47e72SYuval Mintz 16808feecd7SYuval Mintz struct qed_vf_vlan_shadow { 16908feecd7SYuval Mintz bool used; 17008feecd7SYuval Mintz u16 vid; 17108feecd7SYuval Mintz }; 17208feecd7SYuval Mintz 17308feecd7SYuval Mintz struct qed_vf_shadow_config { 17408feecd7SYuval Mintz /* Shadow copy of all guest vlans */ 17508feecd7SYuval Mintz struct qed_vf_vlan_shadow vlans[QED_ETH_VF_NUM_VLAN_FILTERS + 1]; 17608feecd7SYuval Mintz 1778246d0b4SYuval Mintz /* Shadow copy of all configured MACs; Empty if forcing MACs */ 1788246d0b4SYuval Mintz u8 macs[QED_ETH_VF_NUM_MAC_FILTERS][ETH_ALEN]; 17908feecd7SYuval Mintz u8 inner_vlan_removal; 18008feecd7SYuval Mintz }; 18108feecd7SYuval Mintz 18232a47e72SYuval Mintz /* PFs maintain an array of this structure, per VF */ 18332a47e72SYuval Mintz struct qed_vf_info { 18432a47e72SYuval Mintz struct qed_iov_vf_mbx vf_mbx; 18532a47e72SYuval Mintz enum vf_state state; 18632a47e72SYuval Mintz bool b_init; 1877eff82b0SYuval Mintz bool b_malicious; 1880b55e27dSYuval Mintz u8 to_disable; 18932a47e72SYuval Mintz 19032a47e72SYuval Mintz struct qed_bulletin bulletin; 19132a47e72SYuval Mintz dma_addr_t vf_bulletin; 19232a47e72SYuval Mintz 1931fe614d1SYuval Mintz /* PF saves a copy of the last VF acquire message */ 1941fe614d1SYuval Mintz struct vfpf_acquire_tlv acquire; 1951fe614d1SYuval Mintz 19632a47e72SYuval Mintz u32 concrete_fid; 19732a47e72SYuval Mintz u16 opaque_fid; 198dacd88d6SYuval Mintz u16 mtu; 19932a47e72SYuval Mintz 20032a47e72SYuval Mintz u8 vport_id; 20132a47e72SYuval Mintz u8 relative_vf_id; 20232a47e72SYuval Mintz u8 abs_vf_id; 20332a47e72SYuval Mintz #define QED_VF_ABS_ID(p_hwfn, p_vf) (QED_PATH_ID(p_hwfn) ? \ 20432a47e72SYuval Mintz (p_vf)->abs_vf_id + MAX_NUM_VFS_BB : \ 20532a47e72SYuval Mintz (p_vf)->abs_vf_id) 2061408cc1fSYuval Mintz 207dacd88d6SYuval Mintz u8 vport_instance; 2081408cc1fSYuval Mintz u8 num_rxqs; 2091408cc1fSYuval Mintz u8 num_txqs; 2101408cc1fSYuval Mintz 2111408cc1fSYuval Mintz u8 num_sbs; 2121408cc1fSYuval Mintz 2131408cc1fSYuval Mintz u8 num_mac_filters; 2141408cc1fSYuval Mintz u8 num_vlan_filters; 2151408cc1fSYuval Mintz struct qed_vf_q_info vf_queues[QED_MAX_VF_CHAINS_PER_PF]; 2161408cc1fSYuval Mintz u16 igu_sbs[QED_MAX_VF_CHAINS_PER_PF]; 217dacd88d6SYuval Mintz u8 num_active_rxqs; 2180b55e27dSYuval Mintz struct qed_public_vf_info p_vf_info; 2196ddc7608SYuval Mintz bool spoof_chk; 2206ddc7608SYuval Mintz bool req_spoofchk_val; 22108feecd7SYuval Mintz 22208feecd7SYuval Mintz /* Stores the configuration requested by VF */ 22308feecd7SYuval Mintz struct qed_vf_shadow_config shadow_config; 22408feecd7SYuval Mintz 22508feecd7SYuval Mintz /* A bitfield using bulletin's valid-map bits, used to indicate 22608feecd7SYuval Mintz * which of the bulletin board features have been configured. 22708feecd7SYuval Mintz */ 22808feecd7SYuval Mintz u64 configured_features; 22908feecd7SYuval Mintz #define QED_IOV_CONFIGURED_FEATURES_MASK ((1 << MAC_ADDR_FORCED) | \ 23008feecd7SYuval Mintz (1 << VLAN_ADDR_FORCED)) 23132a47e72SYuval Mintz }; 23232a47e72SYuval Mintz 23332a47e72SYuval Mintz /* This structure is part of qed_hwfn and used only for PFs that have sriov 23432a47e72SYuval Mintz * capability enabled. 23532a47e72SYuval Mintz */ 23632a47e72SYuval Mintz struct qed_pf_iov { 23732a47e72SYuval Mintz struct qed_vf_info vfs_array[MAX_NUM_VFS]; 23832a47e72SYuval Mintz u64 pending_flr[QED_VF_ARRAY_LENGTH]; 23932a47e72SYuval Mintz 24032a47e72SYuval Mintz /* Allocate message address continuosuly and split to each VF */ 24132a47e72SYuval Mintz void *mbx_msg_virt_addr; 24232a47e72SYuval Mintz dma_addr_t mbx_msg_phys_addr; 24332a47e72SYuval Mintz u32 mbx_msg_size; 24432a47e72SYuval Mintz void *mbx_reply_virt_addr; 24532a47e72SYuval Mintz dma_addr_t mbx_reply_phys_addr; 24632a47e72SYuval Mintz u32 mbx_reply_size; 24732a47e72SYuval Mintz void *p_bulletins; 24832a47e72SYuval Mintz dma_addr_t bulletins_phys; 24932a47e72SYuval Mintz u32 bulletins_size; 25032a47e72SYuval Mintz }; 25132a47e72SYuval Mintz 25237bff2b9SYuval Mintz enum qed_iov_wq_flag { 25337bff2b9SYuval Mintz QED_IOV_WQ_MSG_FLAG, 25437bff2b9SYuval Mintz QED_IOV_WQ_SET_UNICAST_FILTER_FLAG, 25537bff2b9SYuval Mintz QED_IOV_WQ_BULLETIN_UPDATE_FLAG, 25637bff2b9SYuval Mintz QED_IOV_WQ_STOP_WQ_FLAG, 25737bff2b9SYuval Mintz QED_IOV_WQ_FLR_FLAG, 258f990c82cSMintz, Yuval QED_IOV_WQ_TRUST_FLAG, 25965ed2ffdSMintz, Yuval QED_IOV_WQ_VF_FORCE_LINK_QUERY_FLAG, 26037bff2b9SYuval Mintz }; 26137bff2b9SYuval Mintz 26232a47e72SYuval Mintz #ifdef CONFIG_QED_SRIOV 26332a47e72SYuval Mintz /** 26432a47e72SYuval Mintz * @brief - Given a VF index, return index of next [including that] active VF. 26532a47e72SYuval Mintz * 26632a47e72SYuval Mintz * @param p_hwfn 26732a47e72SYuval Mintz * @param rel_vf_id 26832a47e72SYuval Mintz * 26932a47e72SYuval Mintz * @return MAX_NUM_VFS in case no further active VFs, otherwise index. 27032a47e72SYuval Mintz */ 27132a47e72SYuval Mintz u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id); 27232a47e72SYuval Mintz 27397379f15SChopra, Manish void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn, 27497379f15SChopra, Manish int vfid, u16 vxlan_port, u16 geneve_port); 27597379f15SChopra, Manish 27632a47e72SYuval Mintz /** 27732a47e72SYuval Mintz * @brief Read sriov related information and allocated resources 27832a47e72SYuval Mintz * reads from configuraiton space, shmem, etc. 27932a47e72SYuval Mintz * 28032a47e72SYuval Mintz * @param p_hwfn 28132a47e72SYuval Mintz * 28232a47e72SYuval Mintz * @return int 28332a47e72SYuval Mintz */ 28432a47e72SYuval Mintz int qed_iov_hw_info(struct qed_hwfn *p_hwfn); 28532a47e72SYuval Mintz 28632a47e72SYuval Mintz /** 2871408cc1fSYuval Mintz * @brief qed_add_tlv - place a given tlv on the tlv buffer at next offset 2881408cc1fSYuval Mintz * 2891408cc1fSYuval Mintz * @param p_hwfn 2901408cc1fSYuval Mintz * @param p_iov 2911408cc1fSYuval Mintz * @param type 2921408cc1fSYuval Mintz * @param length 2931408cc1fSYuval Mintz * 2941408cc1fSYuval Mintz * @return pointer to the newly placed tlv 2951408cc1fSYuval Mintz */ 2961408cc1fSYuval Mintz void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length); 2971408cc1fSYuval Mintz 2981408cc1fSYuval Mintz /** 2991408cc1fSYuval Mintz * @brief list the types and lengths of the tlvs on the buffer 3001408cc1fSYuval Mintz * 3011408cc1fSYuval Mintz * @param p_hwfn 3021408cc1fSYuval Mintz * @param tlvs_list 3031408cc1fSYuval Mintz */ 3041408cc1fSYuval Mintz void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list); 3051408cc1fSYuval Mintz 3061408cc1fSYuval Mintz /** 30732a47e72SYuval Mintz * @brief qed_iov_alloc - allocate sriov related resources 30832a47e72SYuval Mintz * 30932a47e72SYuval Mintz * @param p_hwfn 31032a47e72SYuval Mintz * 31132a47e72SYuval Mintz * @return int 31232a47e72SYuval Mintz */ 31332a47e72SYuval Mintz int qed_iov_alloc(struct qed_hwfn *p_hwfn); 31432a47e72SYuval Mintz 31532a47e72SYuval Mintz /** 31632a47e72SYuval Mintz * @brief qed_iov_setup - setup sriov related resources 31732a47e72SYuval Mintz * 31832a47e72SYuval Mintz * @param p_hwfn 31932a47e72SYuval Mintz */ 3201ee240e3SMintz, Yuval void qed_iov_setup(struct qed_hwfn *p_hwfn); 32132a47e72SYuval Mintz 32232a47e72SYuval Mintz /** 32332a47e72SYuval Mintz * @brief qed_iov_free - free sriov related resources 32432a47e72SYuval Mintz * 32532a47e72SYuval Mintz * @param p_hwfn 32632a47e72SYuval Mintz */ 32732a47e72SYuval Mintz void qed_iov_free(struct qed_hwfn *p_hwfn); 32832a47e72SYuval Mintz 32932a47e72SYuval Mintz /** 33032a47e72SYuval Mintz * @brief free sriov related memory that was allocated during hw_prepare 33132a47e72SYuval Mintz * 33232a47e72SYuval Mintz * @param cdev 33332a47e72SYuval Mintz */ 33432a47e72SYuval Mintz void qed_iov_free_hw_info(struct qed_dev *cdev); 33537bff2b9SYuval Mintz 33637bff2b9SYuval Mintz /** 33737bff2b9SYuval Mintz * @brief qed_sriov_eqe_event - handle async sriov event arrived on eqe. 33837bff2b9SYuval Mintz * 33937bff2b9SYuval Mintz * @param p_hwfn 34037bff2b9SYuval Mintz * @param opcode 34137bff2b9SYuval Mintz * @param echo 34237bff2b9SYuval Mintz * @param data 34337bff2b9SYuval Mintz */ 34437bff2b9SYuval Mintz int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn, 34537bff2b9SYuval Mintz u8 opcode, __le16 echo, union event_ring_data *data); 34637bff2b9SYuval Mintz 3470b55e27dSYuval Mintz /** 3480b55e27dSYuval Mintz * @brief Mark structs of vfs that have been FLR-ed. 3490b55e27dSYuval Mintz * 3500b55e27dSYuval Mintz * @param p_hwfn 3510b55e27dSYuval Mintz * @param disabled_vfs - bitmask of all VFs on path that were FLRed 3520b55e27dSYuval Mintz * 353cccf6f5cSMintz, Yuval * @return true iff one of the PF's vfs got FLRed. false otherwise. 3540b55e27dSYuval Mintz */ 355cccf6f5cSMintz, Yuval bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *disabled_vfs); 3560b55e27dSYuval Mintz 357dacd88d6SYuval Mintz /** 358dacd88d6SYuval Mintz * @brief Search extended TLVs in request/reply buffer. 359dacd88d6SYuval Mintz * 360dacd88d6SYuval Mintz * @param p_hwfn 361dacd88d6SYuval Mintz * @param p_tlvs_list - Pointer to tlvs list 362dacd88d6SYuval Mintz * @param req_type - Type of TLV 363dacd88d6SYuval Mintz * 364dacd88d6SYuval Mintz * @return pointer to tlv type if found, otherwise returns NULL. 365dacd88d6SYuval Mintz */ 366dacd88d6SYuval Mintz void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn, 367dacd88d6SYuval Mintz void *p_tlvs_list, u16 req_type); 368dacd88d6SYuval Mintz 36937bff2b9SYuval Mintz void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first); 37037bff2b9SYuval Mintz int qed_iov_wq_start(struct qed_dev *cdev); 37137bff2b9SYuval Mintz 37237bff2b9SYuval Mintz void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag); 3731408cc1fSYuval Mintz void qed_vf_start_iov_wq(struct qed_dev *cdev); 3740b55e27dSYuval Mintz int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled); 37536558c3dSYuval Mintz void qed_inform_vf_link_state(struct qed_hwfn *hwfn); 37632a47e72SYuval Mintz #else 37732a47e72SYuval Mintz static inline u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, 37832a47e72SYuval Mintz u16 rel_vf_id) 37932a47e72SYuval Mintz { 38032a47e72SYuval Mintz return MAX_NUM_VFS; 38132a47e72SYuval Mintz } 38232a47e72SYuval Mintz 38397379f15SChopra, Manish static inline void 38497379f15SChopra, Manish qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn, int vfid, 38597379f15SChopra, Manish u16 vxlan_port, u16 geneve_port) 38697379f15SChopra, Manish { 38797379f15SChopra, Manish } 38897379f15SChopra, Manish 38932a47e72SYuval Mintz static inline int qed_iov_hw_info(struct qed_hwfn *p_hwfn) 39032a47e72SYuval Mintz { 39132a47e72SYuval Mintz return 0; 39232a47e72SYuval Mintz } 39332a47e72SYuval Mintz 39432a47e72SYuval Mintz static inline int qed_iov_alloc(struct qed_hwfn *p_hwfn) 39532a47e72SYuval Mintz { 39632a47e72SYuval Mintz return 0; 39732a47e72SYuval Mintz } 39832a47e72SYuval Mintz 3991ee240e3SMintz, Yuval static inline void qed_iov_setup(struct qed_hwfn *p_hwfn) 40032a47e72SYuval Mintz { 40132a47e72SYuval Mintz } 40232a47e72SYuval Mintz 40332a47e72SYuval Mintz static inline void qed_iov_free(struct qed_hwfn *p_hwfn) 40432a47e72SYuval Mintz { 40532a47e72SYuval Mintz } 40632a47e72SYuval Mintz 40732a47e72SYuval Mintz static inline void qed_iov_free_hw_info(struct qed_dev *cdev) 40832a47e72SYuval Mintz { 40932a47e72SYuval Mintz } 41037bff2b9SYuval Mintz 41137bff2b9SYuval Mintz static inline int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn, 41237bff2b9SYuval Mintz u8 opcode, 41337bff2b9SYuval Mintz __le16 echo, union event_ring_data *data) 41437bff2b9SYuval Mintz { 41537bff2b9SYuval Mintz return -EINVAL; 41637bff2b9SYuval Mintz } 41737bff2b9SYuval Mintz 418cccf6f5cSMintz, Yuval static inline bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, 4190b55e27dSYuval Mintz u32 *disabled_vfs) 4200b55e27dSYuval Mintz { 421cccf6f5cSMintz, Yuval return false; 4220b55e27dSYuval Mintz } 4230b55e27dSYuval Mintz 42437bff2b9SYuval Mintz static inline void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first) 42537bff2b9SYuval Mintz { 42637bff2b9SYuval Mintz } 42737bff2b9SYuval Mintz 42837bff2b9SYuval Mintz static inline int qed_iov_wq_start(struct qed_dev *cdev) 42937bff2b9SYuval Mintz { 43037bff2b9SYuval Mintz return 0; 43137bff2b9SYuval Mintz } 43237bff2b9SYuval Mintz 43337bff2b9SYuval Mintz static inline void qed_schedule_iov(struct qed_hwfn *hwfn, 43437bff2b9SYuval Mintz enum qed_iov_wq_flag flag) 43537bff2b9SYuval Mintz { 43637bff2b9SYuval Mintz } 4371408cc1fSYuval Mintz 4381408cc1fSYuval Mintz static inline void qed_vf_start_iov_wq(struct qed_dev *cdev) 4391408cc1fSYuval Mintz { 4401408cc1fSYuval Mintz } 4410b55e27dSYuval Mintz 4420b55e27dSYuval Mintz static inline int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled) 4430b55e27dSYuval Mintz { 4440b55e27dSYuval Mintz return 0; 4450b55e27dSYuval Mintz } 44636558c3dSYuval Mintz 44736558c3dSYuval Mintz static inline void qed_inform_vf_link_state(struct qed_hwfn *hwfn) 44836558c3dSYuval Mintz { 44936558c3dSYuval Mintz } 45032a47e72SYuval Mintz #endif 45132a47e72SYuval Mintz 45232a47e72SYuval Mintz #define qed_for_each_vf(_p_hwfn, _i) \ 45332a47e72SYuval Mintz for (_i = qed_iov_get_next_active_vf(_p_hwfn, 0); \ 45432a47e72SYuval Mintz _i < MAX_NUM_VFS; \ 45532a47e72SYuval Mintz _i = qed_iov_get_next_active_vf(_p_hwfn, _i + 1)) 45632a47e72SYuval Mintz 45732a47e72SYuval Mintz #endif 458