132a47e72SYuval Mintz /* QLogic qed NIC Driver
2e8f1cb50SMintz, Yuval  * Copyright (c) 2015-2017  QLogic Corporation
332a47e72SYuval Mintz  *
4e8f1cb50SMintz, Yuval  * This software is available to you under a choice of one of two
5e8f1cb50SMintz, Yuval  * licenses.  You may choose to be licensed under the terms of the GNU
6e8f1cb50SMintz, Yuval  * General Public License (GPL) Version 2, available from the file
7e8f1cb50SMintz, Yuval  * COPYING in the main directory of this source tree, or the
8e8f1cb50SMintz, Yuval  * OpenIB.org BSD license below:
9e8f1cb50SMintz, Yuval  *
10e8f1cb50SMintz, Yuval  *     Redistribution and use in source and binary forms, with or
11e8f1cb50SMintz, Yuval  *     without modification, are permitted provided that the following
12e8f1cb50SMintz, Yuval  *     conditions are met:
13e8f1cb50SMintz, Yuval  *
14e8f1cb50SMintz, Yuval  *      - Redistributions of source code must retain the above
15e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
16e8f1cb50SMintz, Yuval  *        disclaimer.
17e8f1cb50SMintz, Yuval  *
18e8f1cb50SMintz, Yuval  *      - Redistributions in binary form must reproduce the above
19e8f1cb50SMintz, Yuval  *        copyright notice, this list of conditions and the following
20e8f1cb50SMintz, Yuval  *        disclaimer in the documentation and /or other materials
21e8f1cb50SMintz, Yuval  *        provided with the distribution.
22e8f1cb50SMintz, Yuval  *
23e8f1cb50SMintz, Yuval  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e8f1cb50SMintz, Yuval  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e8f1cb50SMintz, Yuval  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e8f1cb50SMintz, Yuval  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e8f1cb50SMintz, Yuval  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e8f1cb50SMintz, Yuval  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e8f1cb50SMintz, Yuval  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e8f1cb50SMintz, Yuval  * SOFTWARE.
3132a47e72SYuval Mintz  */
3232a47e72SYuval Mintz 
33dacd88d6SYuval Mintz #include <linux/etherdevice.h>
3436558c3dSYuval Mintz #include <linux/crc32.h>
35f29ffdb6SMintz, Yuval #include <linux/vmalloc.h>
360b55e27dSYuval Mintz #include <linux/qed/qed_iov_if.h>
371408cc1fSYuval Mintz #include "qed_cxt.h"
381408cc1fSYuval Mintz #include "qed_hsi.h"
3932a47e72SYuval Mintz #include "qed_hw.h"
401408cc1fSYuval Mintz #include "qed_init_ops.h"
4132a47e72SYuval Mintz #include "qed_int.h"
421408cc1fSYuval Mintz #include "qed_mcp.h"
4332a47e72SYuval Mintz #include "qed_reg_addr.h"
441408cc1fSYuval Mintz #include "qed_sp.h"
4532a47e72SYuval Mintz #include "qed_sriov.h"
4632a47e72SYuval Mintz #include "qed_vf.h"
476c9e80eaSMichal Kalderon static int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
486c9e80eaSMichal Kalderon 			       u8 opcode,
496c9e80eaSMichal Kalderon 			       __le16 echo,
506c9e80eaSMichal Kalderon 			       union event_ring_data *data, u8 fw_return_code);
516c9e80eaSMichal Kalderon 
5232a47e72SYuval Mintz 
533b19f478SMintz, Yuval static u8 qed_vf_calculate_legacy(struct qed_vf_info *p_vf)
543b19f478SMintz, Yuval {
5508bc8f15SMintz, Yuval 	u8 legacy = 0;
563b19f478SMintz, Yuval 
573b19f478SMintz, Yuval 	if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
583b19f478SMintz, Yuval 	    ETH_HSI_VER_NO_PKT_LEN_TUNN)
593b19f478SMintz, Yuval 		legacy |= QED_QCID_LEGACY_VF_RX_PROD;
603b19f478SMintz, Yuval 
6108bc8f15SMintz, Yuval 	if (!(p_vf->acquire.vfdev_info.capabilities &
6208bc8f15SMintz, Yuval 	      VFPF_ACQUIRE_CAP_QUEUE_QIDS))
6308bc8f15SMintz, Yuval 		legacy |= QED_QCID_LEGACY_VF_CID;
6408bc8f15SMintz, Yuval 
653b19f478SMintz, Yuval 	return legacy;
663b19f478SMintz, Yuval }
673b19f478SMintz, Yuval 
681408cc1fSYuval Mintz /* IOV ramrods */
691fe614d1SYuval Mintz static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
701408cc1fSYuval Mintz {
711408cc1fSYuval Mintz 	struct vf_start_ramrod_data *p_ramrod = NULL;
721408cc1fSYuval Mintz 	struct qed_spq_entry *p_ent = NULL;
731408cc1fSYuval Mintz 	struct qed_sp_init_data init_data;
741408cc1fSYuval Mintz 	int rc = -EINVAL;
751fe614d1SYuval Mintz 	u8 fp_minor;
761408cc1fSYuval Mintz 
771408cc1fSYuval Mintz 	/* Get SPQ entry */
781408cc1fSYuval Mintz 	memset(&init_data, 0, sizeof(init_data));
791408cc1fSYuval Mintz 	init_data.cid = qed_spq_get_cid(p_hwfn);
801fe614d1SYuval Mintz 	init_data.opaque_fid = p_vf->opaque_fid;
811408cc1fSYuval Mintz 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
821408cc1fSYuval Mintz 
831408cc1fSYuval Mintz 	rc = qed_sp_init_request(p_hwfn, &p_ent,
841408cc1fSYuval Mintz 				 COMMON_RAMROD_VF_START,
851408cc1fSYuval Mintz 				 PROTOCOLID_COMMON, &init_data);
861408cc1fSYuval Mintz 	if (rc)
871408cc1fSYuval Mintz 		return rc;
881408cc1fSYuval Mintz 
891408cc1fSYuval Mintz 	p_ramrod = &p_ent->ramrod.vf_start;
901408cc1fSYuval Mintz 
911fe614d1SYuval Mintz 	p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
921fe614d1SYuval Mintz 	p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
931408cc1fSYuval Mintz 
941fe614d1SYuval Mintz 	switch (p_hwfn->hw_info.personality) {
951fe614d1SYuval Mintz 	case QED_PCI_ETH:
961408cc1fSYuval Mintz 		p_ramrod->personality = PERSONALITY_ETH;
971fe614d1SYuval Mintz 		break;
981fe614d1SYuval Mintz 	case QED_PCI_ETH_ROCE:
991fe614d1SYuval Mintz 		p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
1001fe614d1SYuval Mintz 		break;
1011fe614d1SYuval Mintz 	default:
1021fe614d1SYuval Mintz 		DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
1031fe614d1SYuval Mintz 			  p_hwfn->hw_info.personality);
1041fe614d1SYuval Mintz 		return -EINVAL;
1051fe614d1SYuval Mintz 	}
1061fe614d1SYuval Mintz 
1071fe614d1SYuval Mintz 	fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
108a044df83SYuval Mintz 	if (fp_minor > ETH_HSI_VER_MINOR &&
109a044df83SYuval Mintz 	    fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
1101fe614d1SYuval Mintz 		DP_VERBOSE(p_hwfn,
1111fe614d1SYuval Mintz 			   QED_MSG_IOV,
1121fe614d1SYuval Mintz 			   "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
1131fe614d1SYuval Mintz 			   p_vf->abs_vf_id,
1141fe614d1SYuval Mintz 			   ETH_HSI_VER_MAJOR,
1151fe614d1SYuval Mintz 			   fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1161fe614d1SYuval Mintz 		fp_minor = ETH_HSI_VER_MINOR;
1171fe614d1SYuval Mintz 	}
1181fe614d1SYuval Mintz 
119351a4dedSYuval Mintz 	p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
1201fe614d1SYuval Mintz 	p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
1211fe614d1SYuval Mintz 
1221fe614d1SYuval Mintz 	DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1231fe614d1SYuval Mintz 		   "VF[%d] - Starting using HSI %02x.%02x\n",
1241fe614d1SYuval Mintz 		   p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
1251408cc1fSYuval Mintz 
1261408cc1fSYuval Mintz 	return qed_spq_post(p_hwfn, p_ent, NULL);
1271408cc1fSYuval Mintz }
1281408cc1fSYuval Mintz 
1290b55e27dSYuval Mintz static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
1300b55e27dSYuval Mintz 			  u32 concrete_vfid, u16 opaque_vfid)
1310b55e27dSYuval Mintz {
1320b55e27dSYuval Mintz 	struct vf_stop_ramrod_data *p_ramrod = NULL;
1330b55e27dSYuval Mintz 	struct qed_spq_entry *p_ent = NULL;
1340b55e27dSYuval Mintz 	struct qed_sp_init_data init_data;
1350b55e27dSYuval Mintz 	int rc = -EINVAL;
1360b55e27dSYuval Mintz 
1370b55e27dSYuval Mintz 	/* Get SPQ entry */
1380b55e27dSYuval Mintz 	memset(&init_data, 0, sizeof(init_data));
1390b55e27dSYuval Mintz 	init_data.cid = qed_spq_get_cid(p_hwfn);
1400b55e27dSYuval Mintz 	init_data.opaque_fid = opaque_vfid;
1410b55e27dSYuval Mintz 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1420b55e27dSYuval Mintz 
1430b55e27dSYuval Mintz 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1440b55e27dSYuval Mintz 				 COMMON_RAMROD_VF_STOP,
1450b55e27dSYuval Mintz 				 PROTOCOLID_COMMON, &init_data);
1460b55e27dSYuval Mintz 	if (rc)
1470b55e27dSYuval Mintz 		return rc;
1480b55e27dSYuval Mintz 
1490b55e27dSYuval Mintz 	p_ramrod = &p_ent->ramrod.vf_stop;
1500b55e27dSYuval Mintz 
1510b55e27dSYuval Mintz 	p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
1520b55e27dSYuval Mintz 
1530b55e27dSYuval Mintz 	return qed_spq_post(p_hwfn, p_ent, NULL);
1540b55e27dSYuval Mintz }
1550b55e27dSYuval Mintz 
156ba56947aSBaoyou Xie static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
1577eff82b0SYuval Mintz 				  int rel_vf_id,
1587eff82b0SYuval Mintz 				  bool b_enabled_only, bool b_non_malicious)
15932a47e72SYuval Mintz {
16032a47e72SYuval Mintz 	if (!p_hwfn->pf_iov_info) {
16132a47e72SYuval Mintz 		DP_NOTICE(p_hwfn->cdev, "No iov info\n");
16232a47e72SYuval Mintz 		return false;
16332a47e72SYuval Mintz 	}
16432a47e72SYuval Mintz 
16532a47e72SYuval Mintz 	if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
16632a47e72SYuval Mintz 	    (rel_vf_id < 0))
16732a47e72SYuval Mintz 		return false;
16832a47e72SYuval Mintz 
16932a47e72SYuval Mintz 	if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
17032a47e72SYuval Mintz 	    b_enabled_only)
17132a47e72SYuval Mintz 		return false;
17232a47e72SYuval Mintz 
1737eff82b0SYuval Mintz 	if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
1747eff82b0SYuval Mintz 	    b_non_malicious)
1757eff82b0SYuval Mintz 		return false;
1767eff82b0SYuval Mintz 
17732a47e72SYuval Mintz 	return true;
17832a47e72SYuval Mintz }
17932a47e72SYuval Mintz 
18037bff2b9SYuval Mintz static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
18137bff2b9SYuval Mintz 					       u16 relative_vf_id,
18237bff2b9SYuval Mintz 					       bool b_enabled_only)
18337bff2b9SYuval Mintz {
18437bff2b9SYuval Mintz 	struct qed_vf_info *vf = NULL;
18537bff2b9SYuval Mintz 
18637bff2b9SYuval Mintz 	if (!p_hwfn->pf_iov_info) {
18737bff2b9SYuval Mintz 		DP_NOTICE(p_hwfn->cdev, "No iov info\n");
18837bff2b9SYuval Mintz 		return NULL;
18937bff2b9SYuval Mintz 	}
19037bff2b9SYuval Mintz 
1917eff82b0SYuval Mintz 	if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
1927eff82b0SYuval Mintz 				  b_enabled_only, false))
19337bff2b9SYuval Mintz 		vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
19437bff2b9SYuval Mintz 	else
19537bff2b9SYuval Mintz 		DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
19637bff2b9SYuval Mintz 		       relative_vf_id);
19737bff2b9SYuval Mintz 
19837bff2b9SYuval Mintz 	return vf;
19937bff2b9SYuval Mintz }
20037bff2b9SYuval Mintz 
201007bc371SMintz, Yuval static struct qed_queue_cid *
202007bc371SMintz, Yuval qed_iov_get_vf_rx_queue_cid(struct qed_vf_queue *p_queue)
203007bc371SMintz, Yuval {
204007bc371SMintz, Yuval 	int i;
205007bc371SMintz, Yuval 
206007bc371SMintz, Yuval 	for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
207007bc371SMintz, Yuval 		if (p_queue->cids[i].p_cid && !p_queue->cids[i].b_is_tx)
208007bc371SMintz, Yuval 			return p_queue->cids[i].p_cid;
209007bc371SMintz, Yuval 	}
210007bc371SMintz, Yuval 
211007bc371SMintz, Yuval 	return NULL;
212007bc371SMintz, Yuval }
213007bc371SMintz, Yuval 
214f109c240SMintz, Yuval enum qed_iov_validate_q_mode {
215f109c240SMintz, Yuval 	QED_IOV_VALIDATE_Q_NA,
216f109c240SMintz, Yuval 	QED_IOV_VALIDATE_Q_ENABLE,
217f109c240SMintz, Yuval 	QED_IOV_VALIDATE_Q_DISABLE,
218f109c240SMintz, Yuval };
219f109c240SMintz, Yuval 
220f109c240SMintz, Yuval static bool qed_iov_validate_queue_mode(struct qed_hwfn *p_hwfn,
221f109c240SMintz, Yuval 					struct qed_vf_info *p_vf,
222f109c240SMintz, Yuval 					u16 qid,
223f109c240SMintz, Yuval 					enum qed_iov_validate_q_mode mode,
224f109c240SMintz, Yuval 					bool b_is_tx)
22541086467SYuval Mintz {
226007bc371SMintz, Yuval 	int i;
227007bc371SMintz, Yuval 
228f109c240SMintz, Yuval 	if (mode == QED_IOV_VALIDATE_Q_NA)
229f109c240SMintz, Yuval 		return true;
230f109c240SMintz, Yuval 
231007bc371SMintz, Yuval 	for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
232007bc371SMintz, Yuval 		struct qed_vf_queue_cid *p_qcid;
233007bc371SMintz, Yuval 
234007bc371SMintz, Yuval 		p_qcid = &p_vf->vf_queues[qid].cids[i];
235007bc371SMintz, Yuval 
236007bc371SMintz, Yuval 		if (!p_qcid->p_cid)
237007bc371SMintz, Yuval 			continue;
238007bc371SMintz, Yuval 
239007bc371SMintz, Yuval 		if (p_qcid->b_is_tx != b_is_tx)
240007bc371SMintz, Yuval 			continue;
241007bc371SMintz, Yuval 
242f109c240SMintz, Yuval 		return mode == QED_IOV_VALIDATE_Q_ENABLE;
243007bc371SMintz, Yuval 	}
244f109c240SMintz, Yuval 
245f109c240SMintz, Yuval 	/* In case we haven't found any valid cid, then its disabled */
246f109c240SMintz, Yuval 	return mode == QED_IOV_VALIDATE_Q_DISABLE;
247f109c240SMintz, Yuval }
248f109c240SMintz, Yuval 
249f109c240SMintz, Yuval static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
250f109c240SMintz, Yuval 				 struct qed_vf_info *p_vf,
251f109c240SMintz, Yuval 				 u16 rx_qid,
252f109c240SMintz, Yuval 				 enum qed_iov_validate_q_mode mode)
253f109c240SMintz, Yuval {
254f109c240SMintz, Yuval 	if (rx_qid >= p_vf->num_rxqs) {
25541086467SYuval Mintz 		DP_VERBOSE(p_hwfn,
25641086467SYuval Mintz 			   QED_MSG_IOV,
25741086467SYuval Mintz 			   "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
25841086467SYuval Mintz 			   p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
259f109c240SMintz, Yuval 		return false;
260f109c240SMintz, Yuval 	}
261f109c240SMintz, Yuval 
262f109c240SMintz, Yuval 	return qed_iov_validate_queue_mode(p_hwfn, p_vf, rx_qid, mode, false);
26341086467SYuval Mintz }
26441086467SYuval Mintz 
26541086467SYuval Mintz static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
266f109c240SMintz, Yuval 				 struct qed_vf_info *p_vf,
267f109c240SMintz, Yuval 				 u16 tx_qid,
268f109c240SMintz, Yuval 				 enum qed_iov_validate_q_mode mode)
26941086467SYuval Mintz {
270f109c240SMintz, Yuval 	if (tx_qid >= p_vf->num_txqs) {
27141086467SYuval Mintz 		DP_VERBOSE(p_hwfn,
27241086467SYuval Mintz 			   QED_MSG_IOV,
27341086467SYuval Mintz 			   "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
27441086467SYuval Mintz 			   p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
275f109c240SMintz, Yuval 		return false;
276f109c240SMintz, Yuval 	}
277f109c240SMintz, Yuval 
278f109c240SMintz, Yuval 	return qed_iov_validate_queue_mode(p_hwfn, p_vf, tx_qid, mode, true);
27941086467SYuval Mintz }
28041086467SYuval Mintz 
28141086467SYuval Mintz static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
28241086467SYuval Mintz 				struct qed_vf_info *p_vf, u16 sb_idx)
28341086467SYuval Mintz {
28441086467SYuval Mintz 	int i;
28541086467SYuval Mintz 
28641086467SYuval Mintz 	for (i = 0; i < p_vf->num_sbs; i++)
28741086467SYuval Mintz 		if (p_vf->igu_sbs[i] == sb_idx)
28841086467SYuval Mintz 			return true;
28941086467SYuval Mintz 
29041086467SYuval Mintz 	DP_VERBOSE(p_hwfn,
29141086467SYuval Mintz 		   QED_MSG_IOV,
29241086467SYuval Mintz 		   "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
29341086467SYuval Mintz 		   p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
29441086467SYuval Mintz 
29541086467SYuval Mintz 	return false;
29641086467SYuval Mintz }
29741086467SYuval Mintz 
298f109c240SMintz, Yuval static bool qed_iov_validate_active_rxq(struct qed_hwfn *p_hwfn,
299f109c240SMintz, Yuval 					struct qed_vf_info *p_vf)
300f109c240SMintz, Yuval {
301f109c240SMintz, Yuval 	u8 i;
302f109c240SMintz, Yuval 
303f109c240SMintz, Yuval 	for (i = 0; i < p_vf->num_rxqs; i++)
304f109c240SMintz, Yuval 		if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
305f109c240SMintz, Yuval 						QED_IOV_VALIDATE_Q_ENABLE,
306f109c240SMintz, Yuval 						false))
307f109c240SMintz, Yuval 			return true;
308f109c240SMintz, Yuval 
309f109c240SMintz, Yuval 	return false;
310f109c240SMintz, Yuval }
311f109c240SMintz, Yuval 
312f109c240SMintz, Yuval static bool qed_iov_validate_active_txq(struct qed_hwfn *p_hwfn,
313f109c240SMintz, Yuval 					struct qed_vf_info *p_vf)
314f109c240SMintz, Yuval {
315f109c240SMintz, Yuval 	u8 i;
316f109c240SMintz, Yuval 
317f109c240SMintz, Yuval 	for (i = 0; i < p_vf->num_txqs; i++)
318f109c240SMintz, Yuval 		if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
319f109c240SMintz, Yuval 						QED_IOV_VALIDATE_Q_ENABLE,
320f109c240SMintz, Yuval 						true))
321f109c240SMintz, Yuval 			return true;
322f109c240SMintz, Yuval 
323f109c240SMintz, Yuval 	return false;
324f109c240SMintz, Yuval }
325f109c240SMintz, Yuval 
326ba56947aSBaoyou Xie static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
32736558c3dSYuval Mintz 				    int vfid, struct qed_ptt *p_ptt)
32836558c3dSYuval Mintz {
32936558c3dSYuval Mintz 	struct qed_bulletin_content *p_bulletin;
33036558c3dSYuval Mintz 	int crc_size = sizeof(p_bulletin->crc);
33136558c3dSYuval Mintz 	struct qed_dmae_params params;
33236558c3dSYuval Mintz 	struct qed_vf_info *p_vf;
33336558c3dSYuval Mintz 
33436558c3dSYuval Mintz 	p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
33536558c3dSYuval Mintz 	if (!p_vf)
33636558c3dSYuval Mintz 		return -EINVAL;
33736558c3dSYuval Mintz 
33836558c3dSYuval Mintz 	if (!p_vf->vf_bulletin)
33936558c3dSYuval Mintz 		return -EINVAL;
34036558c3dSYuval Mintz 
34136558c3dSYuval Mintz 	p_bulletin = p_vf->bulletin.p_virt;
34236558c3dSYuval Mintz 
34336558c3dSYuval Mintz 	/* Increment bulletin board version and compute crc */
34436558c3dSYuval Mintz 	p_bulletin->version++;
34536558c3dSYuval Mintz 	p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
34636558c3dSYuval Mintz 				p_vf->bulletin.size - crc_size);
34736558c3dSYuval Mintz 
34836558c3dSYuval Mintz 	DP_VERBOSE(p_hwfn, QED_MSG_IOV,
34936558c3dSYuval Mintz 		   "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
35036558c3dSYuval Mintz 		   p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
35136558c3dSYuval Mintz 
35236558c3dSYuval Mintz 	/* propagate bulletin board via dmae to vm memory */
35336558c3dSYuval Mintz 	memset(&params, 0, sizeof(params));
35436558c3dSYuval Mintz 	params.flags = QED_DMAE_FLAG_VF_DST;
35536558c3dSYuval Mintz 	params.dst_vfid = p_vf->abs_vf_id;
35636558c3dSYuval Mintz 	return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
35736558c3dSYuval Mintz 				  p_vf->vf_bulletin, p_vf->bulletin.size / 4,
35836558c3dSYuval Mintz 				  &params);
35936558c3dSYuval Mintz }
36036558c3dSYuval Mintz 
36132a47e72SYuval Mintz static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
36232a47e72SYuval Mintz {
36332a47e72SYuval Mintz 	struct qed_hw_sriov_info *iov = cdev->p_iov_info;
36432a47e72SYuval Mintz 	int pos = iov->pos;
36532a47e72SYuval Mintz 
36632a47e72SYuval Mintz 	DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
36732a47e72SYuval Mintz 	pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
36832a47e72SYuval Mintz 
36932a47e72SYuval Mintz 	pci_read_config_word(cdev->pdev,
37032a47e72SYuval Mintz 			     pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
37132a47e72SYuval Mintz 	pci_read_config_word(cdev->pdev,
37232a47e72SYuval Mintz 			     pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
37332a47e72SYuval Mintz 
37432a47e72SYuval Mintz 	pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
37532a47e72SYuval Mintz 	if (iov->num_vfs) {
37632a47e72SYuval Mintz 		DP_VERBOSE(cdev,
37732a47e72SYuval Mintz 			   QED_MSG_IOV,
37832a47e72SYuval Mintz 			   "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
37932a47e72SYuval Mintz 		iov->num_vfs = 0;
38032a47e72SYuval Mintz 	}
38132a47e72SYuval Mintz 
38232a47e72SYuval Mintz 	pci_read_config_word(cdev->pdev,
38332a47e72SYuval Mintz 			     pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
38432a47e72SYuval Mintz 
38532a47e72SYuval Mintz 	pci_read_config_word(cdev->pdev,
38632a47e72SYuval Mintz 			     pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
38732a47e72SYuval Mintz 
38832a47e72SYuval Mintz 	pci_read_config_word(cdev->pdev,
38932a47e72SYuval Mintz 			     pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
39032a47e72SYuval Mintz 
39132a47e72SYuval Mintz 	pci_read_config_dword(cdev->pdev,
39232a47e72SYuval Mintz 			      pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
39332a47e72SYuval Mintz 
39432a47e72SYuval Mintz 	pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
39532a47e72SYuval Mintz 
39632a47e72SYuval Mintz 	pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
39732a47e72SYuval Mintz 
39832a47e72SYuval Mintz 	DP_VERBOSE(cdev,
39932a47e72SYuval Mintz 		   QED_MSG_IOV,
40032a47e72SYuval Mintz 		   "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
40132a47e72SYuval Mintz 		   iov->nres,
40232a47e72SYuval Mintz 		   iov->cap,
40332a47e72SYuval Mintz 		   iov->ctrl,
40432a47e72SYuval Mintz 		   iov->total_vfs,
40532a47e72SYuval Mintz 		   iov->initial_vfs,
40632a47e72SYuval Mintz 		   iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
40732a47e72SYuval Mintz 
40832a47e72SYuval Mintz 	/* Some sanity checks */
40932a47e72SYuval Mintz 	if (iov->num_vfs > NUM_OF_VFS(cdev) ||
41032a47e72SYuval Mintz 	    iov->total_vfs > NUM_OF_VFS(cdev)) {
41132a47e72SYuval Mintz 		/* This can happen only due to a bug. In this case we set
41232a47e72SYuval Mintz 		 * num_vfs to zero to avoid memory corruption in the code that
41332a47e72SYuval Mintz 		 * assumes max number of vfs
41432a47e72SYuval Mintz 		 */
41532a47e72SYuval Mintz 		DP_NOTICE(cdev,
41632a47e72SYuval Mintz 			  "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
41732a47e72SYuval Mintz 			  iov->num_vfs);
41832a47e72SYuval Mintz 
41932a47e72SYuval Mintz 		iov->num_vfs = 0;
42032a47e72SYuval Mintz 		iov->total_vfs = 0;
42132a47e72SYuval Mintz 	}
42232a47e72SYuval Mintz 
42332a47e72SYuval Mintz 	return 0;
42432a47e72SYuval Mintz }
42532a47e72SYuval Mintz 
42632a47e72SYuval Mintz static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
42732a47e72SYuval Mintz {
42832a47e72SYuval Mintz 	struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
42932a47e72SYuval Mintz 	struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
43032a47e72SYuval Mintz 	struct qed_bulletin_content *p_bulletin_virt;
43132a47e72SYuval Mintz 	dma_addr_t req_p, rply_p, bulletin_p;
43232a47e72SYuval Mintz 	union pfvf_tlvs *p_reply_virt_addr;
43332a47e72SYuval Mintz 	union vfpf_tlvs *p_req_virt_addr;
43432a47e72SYuval Mintz 	u8 idx = 0;
43532a47e72SYuval Mintz 
43632a47e72SYuval Mintz 	memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
43732a47e72SYuval Mintz 
43832a47e72SYuval Mintz 	p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
43932a47e72SYuval Mintz 	req_p = p_iov_info->mbx_msg_phys_addr;
44032a47e72SYuval Mintz 	p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
44132a47e72SYuval Mintz 	rply_p = p_iov_info->mbx_reply_phys_addr;
44232a47e72SYuval Mintz 	p_bulletin_virt = p_iov_info->p_bulletins;
44332a47e72SYuval Mintz 	bulletin_p = p_iov_info->bulletins_phys;
44432a47e72SYuval Mintz 	if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
44532a47e72SYuval Mintz 		DP_ERR(p_hwfn,
44632a47e72SYuval Mintz 		       "qed_iov_setup_vfdb called without allocating mem first\n");
44732a47e72SYuval Mintz 		return;
44832a47e72SYuval Mintz 	}
44932a47e72SYuval Mintz 
45032a47e72SYuval Mintz 	for (idx = 0; idx < p_iov->total_vfs; idx++) {
45132a47e72SYuval Mintz 		struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
45232a47e72SYuval Mintz 		u32 concrete;
45332a47e72SYuval Mintz 
45432a47e72SYuval Mintz 		vf->vf_mbx.req_virt = p_req_virt_addr + idx;
45532a47e72SYuval Mintz 		vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
45632a47e72SYuval Mintz 		vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
45732a47e72SYuval Mintz 		vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
45832a47e72SYuval Mintz 
45932a47e72SYuval Mintz 		vf->state = VF_STOPPED;
46032a47e72SYuval Mintz 		vf->b_init = false;
46132a47e72SYuval Mintz 
46232a47e72SYuval Mintz 		vf->bulletin.phys = idx *
46332a47e72SYuval Mintz 				    sizeof(struct qed_bulletin_content) +
46432a47e72SYuval Mintz 				    bulletin_p;
46532a47e72SYuval Mintz 		vf->bulletin.p_virt = p_bulletin_virt + idx;
46632a47e72SYuval Mintz 		vf->bulletin.size = sizeof(struct qed_bulletin_content);
46732a47e72SYuval Mintz 
46832a47e72SYuval Mintz 		vf->relative_vf_id = idx;
46932a47e72SYuval Mintz 		vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
47032a47e72SYuval Mintz 		concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
47132a47e72SYuval Mintz 		vf->concrete_fid = concrete;
47232a47e72SYuval Mintz 		vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
47332a47e72SYuval Mintz 				 (vf->abs_vf_id << 8);
47432a47e72SYuval Mintz 		vf->vport_id = idx + 1;
4751cf2b1a9SYuval Mintz 
4761cf2b1a9SYuval Mintz 		vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
4771cf2b1a9SYuval Mintz 		vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
47832a47e72SYuval Mintz 	}
47932a47e72SYuval Mintz }
48032a47e72SYuval Mintz 
48132a47e72SYuval Mintz static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
48232a47e72SYuval Mintz {
48332a47e72SYuval Mintz 	struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
48432a47e72SYuval Mintz 	void **p_v_addr;
48532a47e72SYuval Mintz 	u16 num_vfs = 0;
48632a47e72SYuval Mintz 
48732a47e72SYuval Mintz 	num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
48832a47e72SYuval Mintz 
48932a47e72SYuval Mintz 	DP_VERBOSE(p_hwfn, QED_MSG_IOV,
49032a47e72SYuval Mintz 		   "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
49132a47e72SYuval Mintz 
49232a47e72SYuval Mintz 	/* Allocate PF Mailbox buffer (per-VF) */
49332a47e72SYuval Mintz 	p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
49432a47e72SYuval Mintz 	p_v_addr = &p_iov_info->mbx_msg_virt_addr;
49532a47e72SYuval Mintz 	*p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
49632a47e72SYuval Mintz 				       p_iov_info->mbx_msg_size,
49732a47e72SYuval Mintz 				       &p_iov_info->mbx_msg_phys_addr,
49832a47e72SYuval Mintz 				       GFP_KERNEL);
49932a47e72SYuval Mintz 	if (!*p_v_addr)
50032a47e72SYuval Mintz 		return -ENOMEM;
50132a47e72SYuval Mintz 
50232a47e72SYuval Mintz 	/* Allocate PF Mailbox Reply buffer (per-VF) */
50332a47e72SYuval Mintz 	p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
50432a47e72SYuval Mintz 	p_v_addr = &p_iov_info->mbx_reply_virt_addr;
50532a47e72SYuval Mintz 	*p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
50632a47e72SYuval Mintz 				       p_iov_info->mbx_reply_size,
50732a47e72SYuval Mintz 				       &p_iov_info->mbx_reply_phys_addr,
50832a47e72SYuval Mintz 				       GFP_KERNEL);
50932a47e72SYuval Mintz 	if (!*p_v_addr)
51032a47e72SYuval Mintz 		return -ENOMEM;
51132a47e72SYuval Mintz 
51232a47e72SYuval Mintz 	p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
51332a47e72SYuval Mintz 				     num_vfs;
51432a47e72SYuval Mintz 	p_v_addr = &p_iov_info->p_bulletins;
51532a47e72SYuval Mintz 	*p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
51632a47e72SYuval Mintz 				       p_iov_info->bulletins_size,
51732a47e72SYuval Mintz 				       &p_iov_info->bulletins_phys,
51832a47e72SYuval Mintz 				       GFP_KERNEL);
51932a47e72SYuval Mintz 	if (!*p_v_addr)
52032a47e72SYuval Mintz 		return -ENOMEM;
52132a47e72SYuval Mintz 
52232a47e72SYuval Mintz 	DP_VERBOSE(p_hwfn,
52332a47e72SYuval Mintz 		   QED_MSG_IOV,
52432a47e72SYuval Mintz 		   "PF's Requests mailbox [%p virt 0x%llx phys],  Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
52532a47e72SYuval Mintz 		   p_iov_info->mbx_msg_virt_addr,
52632a47e72SYuval Mintz 		   (u64) p_iov_info->mbx_msg_phys_addr,
52732a47e72SYuval Mintz 		   p_iov_info->mbx_reply_virt_addr,
52832a47e72SYuval Mintz 		   (u64) p_iov_info->mbx_reply_phys_addr,
52932a47e72SYuval Mintz 		   p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
53032a47e72SYuval Mintz 
53132a47e72SYuval Mintz 	return 0;
53232a47e72SYuval Mintz }
53332a47e72SYuval Mintz 
53432a47e72SYuval Mintz static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
53532a47e72SYuval Mintz {
53632a47e72SYuval Mintz 	struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
53732a47e72SYuval Mintz 
53832a47e72SYuval Mintz 	if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
53932a47e72SYuval Mintz 		dma_free_coherent(&p_hwfn->cdev->pdev->dev,
54032a47e72SYuval Mintz 				  p_iov_info->mbx_msg_size,
54132a47e72SYuval Mintz 				  p_iov_info->mbx_msg_virt_addr,
54232a47e72SYuval Mintz 				  p_iov_info->mbx_msg_phys_addr);
54332a47e72SYuval Mintz 
54432a47e72SYuval Mintz 	if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
54532a47e72SYuval Mintz 		dma_free_coherent(&p_hwfn->cdev->pdev->dev,
54632a47e72SYuval Mintz 				  p_iov_info->mbx_reply_size,
54732a47e72SYuval Mintz 				  p_iov_info->mbx_reply_virt_addr,
54832a47e72SYuval Mintz 				  p_iov_info->mbx_reply_phys_addr);
54932a47e72SYuval Mintz 
55032a47e72SYuval Mintz 	if (p_iov_info->p_bulletins)
55132a47e72SYuval Mintz 		dma_free_coherent(&p_hwfn->cdev->pdev->dev,
55232a47e72SYuval Mintz 				  p_iov_info->bulletins_size,
55332a47e72SYuval Mintz 				  p_iov_info->p_bulletins,
55432a47e72SYuval Mintz 				  p_iov_info->bulletins_phys);
55532a47e72SYuval Mintz }
55632a47e72SYuval Mintz 
55732a47e72SYuval Mintz int qed_iov_alloc(struct qed_hwfn *p_hwfn)
55832a47e72SYuval Mintz {
55932a47e72SYuval Mintz 	struct qed_pf_iov *p_sriov;
56032a47e72SYuval Mintz 
56132a47e72SYuval Mintz 	if (!IS_PF_SRIOV(p_hwfn)) {
56232a47e72SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
56332a47e72SYuval Mintz 			   "No SR-IOV - no need for IOV db\n");
56432a47e72SYuval Mintz 		return 0;
56532a47e72SYuval Mintz 	}
56632a47e72SYuval Mintz 
56732a47e72SYuval Mintz 	p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
5682591c280SJoe Perches 	if (!p_sriov)
56932a47e72SYuval Mintz 		return -ENOMEM;
57032a47e72SYuval Mintz 
57132a47e72SYuval Mintz 	p_hwfn->pf_iov_info = p_sriov;
57232a47e72SYuval Mintz 
5736c9e80eaSMichal Kalderon 	qed_spq_register_async_cb(p_hwfn, PROTOCOLID_COMMON,
5746c9e80eaSMichal Kalderon 				  qed_sriov_eqe_event);
5756c9e80eaSMichal Kalderon 
57632a47e72SYuval Mintz 	return qed_iov_allocate_vfdb(p_hwfn);
57732a47e72SYuval Mintz }
57832a47e72SYuval Mintz 
5791ee240e3SMintz, Yuval void qed_iov_setup(struct qed_hwfn *p_hwfn)
58032a47e72SYuval Mintz {
58132a47e72SYuval Mintz 	if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
58232a47e72SYuval Mintz 		return;
58332a47e72SYuval Mintz 
58432a47e72SYuval Mintz 	qed_iov_setup_vfdb(p_hwfn);
58532a47e72SYuval Mintz }
58632a47e72SYuval Mintz 
58732a47e72SYuval Mintz void qed_iov_free(struct qed_hwfn *p_hwfn)
58832a47e72SYuval Mintz {
5896c9e80eaSMichal Kalderon 	qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_COMMON);
5906c9e80eaSMichal Kalderon 
59132a47e72SYuval Mintz 	if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
59232a47e72SYuval Mintz 		qed_iov_free_vfdb(p_hwfn);
59332a47e72SYuval Mintz 		kfree(p_hwfn->pf_iov_info);
59432a47e72SYuval Mintz 	}
59532a47e72SYuval Mintz }
59632a47e72SYuval Mintz 
59732a47e72SYuval Mintz void qed_iov_free_hw_info(struct qed_dev *cdev)
59832a47e72SYuval Mintz {
59932a47e72SYuval Mintz 	kfree(cdev->p_iov_info);
60032a47e72SYuval Mintz 	cdev->p_iov_info = NULL;
60132a47e72SYuval Mintz }
60232a47e72SYuval Mintz 
60332a47e72SYuval Mintz int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
60432a47e72SYuval Mintz {
60532a47e72SYuval Mintz 	struct qed_dev *cdev = p_hwfn->cdev;
60632a47e72SYuval Mintz 	int pos;
60732a47e72SYuval Mintz 	int rc;
60832a47e72SYuval Mintz 
6091408cc1fSYuval Mintz 	if (IS_VF(p_hwfn->cdev))
6101408cc1fSYuval Mintz 		return 0;
6111408cc1fSYuval Mintz 
61232a47e72SYuval Mintz 	/* Learn the PCI configuration */
61332a47e72SYuval Mintz 	pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
61432a47e72SYuval Mintz 				      PCI_EXT_CAP_ID_SRIOV);
61532a47e72SYuval Mintz 	if (!pos) {
61632a47e72SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
61732a47e72SYuval Mintz 		return 0;
61832a47e72SYuval Mintz 	}
61932a47e72SYuval Mintz 
62032a47e72SYuval Mintz 	/* Allocate a new struct for IOV information */
62132a47e72SYuval Mintz 	cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
6222591c280SJoe Perches 	if (!cdev->p_iov_info)
62332a47e72SYuval Mintz 		return -ENOMEM;
6242591c280SJoe Perches 
62532a47e72SYuval Mintz 	cdev->p_iov_info->pos = pos;
62632a47e72SYuval Mintz 
62732a47e72SYuval Mintz 	rc = qed_iov_pci_cfg_info(cdev);
62832a47e72SYuval Mintz 	if (rc)
62932a47e72SYuval Mintz 		return rc;
63032a47e72SYuval Mintz 
63132a47e72SYuval Mintz 	/* We want PF IOV to be synonemous with the existance of p_iov_info;
63232a47e72SYuval Mintz 	 * In case the capability is published but there are no VFs, simply
63332a47e72SYuval Mintz 	 * de-allocate the struct.
63432a47e72SYuval Mintz 	 */
63532a47e72SYuval Mintz 	if (!cdev->p_iov_info->total_vfs) {
63632a47e72SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
63732a47e72SYuval Mintz 			   "IOV capabilities, but no VFs are published\n");
63832a47e72SYuval Mintz 		kfree(cdev->p_iov_info);
63932a47e72SYuval Mintz 		cdev->p_iov_info = NULL;
64032a47e72SYuval Mintz 		return 0;
64132a47e72SYuval Mintz 	}
64232a47e72SYuval Mintz 
6439c79ddaaSMintz, Yuval 	/* First VF index based on offset is tricky:
6449c79ddaaSMintz, Yuval 	 *  - If ARI is supported [likely], offset - (16 - pf_id) would
6459c79ddaaSMintz, Yuval 	 *    provide the number for eng0. 2nd engine Vfs would begin
64632a47e72SYuval Mintz 	 *    after the first engine's VFs.
6479c79ddaaSMintz, Yuval 	 *  - If !ARI, VFs would start on next device.
6489c79ddaaSMintz, Yuval 	 *    so offset - (256 - pf_id) would provide the number.
6499c79ddaaSMintz, Yuval 	 * Utilize the fact that (256 - pf_id) is achieved only by later
6508ac1ed79SJoe Perches 	 * to differentiate between the two.
65132a47e72SYuval Mintz 	 */
6529c79ddaaSMintz, Yuval 
6539c79ddaaSMintz, Yuval 	if (p_hwfn->cdev->p_iov_info->offset < (256 - p_hwfn->abs_pf_id)) {
6549c79ddaaSMintz, Yuval 		u32 first = p_hwfn->cdev->p_iov_info->offset +
65532a47e72SYuval Mintz 			    p_hwfn->abs_pf_id - 16;
6569c79ddaaSMintz, Yuval 
6579c79ddaaSMintz, Yuval 		cdev->p_iov_info->first_vf_in_pf = first;
6589c79ddaaSMintz, Yuval 
65932a47e72SYuval Mintz 		if (QED_PATH_ID(p_hwfn))
66032a47e72SYuval Mintz 			cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
6619c79ddaaSMintz, Yuval 	} else {
6629c79ddaaSMintz, Yuval 		u32 first = p_hwfn->cdev->p_iov_info->offset +
6639c79ddaaSMintz, Yuval 			    p_hwfn->abs_pf_id - 256;
6649c79ddaaSMintz, Yuval 
6659c79ddaaSMintz, Yuval 		cdev->p_iov_info->first_vf_in_pf = first;
6669c79ddaaSMintz, Yuval 	}
66732a47e72SYuval Mintz 
66832a47e72SYuval Mintz 	DP_VERBOSE(p_hwfn, QED_MSG_IOV,
66932a47e72SYuval Mintz 		   "First VF in hwfn 0x%08x\n",
67032a47e72SYuval Mintz 		   cdev->p_iov_info->first_vf_in_pf);
67132a47e72SYuval Mintz 
67232a47e72SYuval Mintz 	return 0;
67332a47e72SYuval Mintz }
67432a47e72SYuval Mintz 
6757eff82b0SYuval Mintz bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
6767eff82b0SYuval Mintz 			      int vfid, bool b_fail_malicious)
67737bff2b9SYuval Mintz {
67837bff2b9SYuval Mintz 	/* Check PF supports sriov */
679b0409fa0SYuval Mintz 	if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
680b0409fa0SYuval Mintz 	    !IS_PF_SRIOV_ALLOC(p_hwfn))
68137bff2b9SYuval Mintz 		return false;
68237bff2b9SYuval Mintz 
68337bff2b9SYuval Mintz 	/* Check VF validity */
6847eff82b0SYuval Mintz 	if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
68537bff2b9SYuval Mintz 		return false;
68637bff2b9SYuval Mintz 
68737bff2b9SYuval Mintz 	return true;
68837bff2b9SYuval Mintz }
68937bff2b9SYuval Mintz 
6907eff82b0SYuval Mintz bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
6917eff82b0SYuval Mintz {
6927eff82b0SYuval Mintz 	return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
6937eff82b0SYuval Mintz }
6947eff82b0SYuval Mintz 
6950b55e27dSYuval Mintz static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
6960b55e27dSYuval Mintz 				      u16 rel_vf_id, u8 to_disable)
6970b55e27dSYuval Mintz {
6980b55e27dSYuval Mintz 	struct qed_vf_info *vf;
6990b55e27dSYuval Mintz 	int i;
7000b55e27dSYuval Mintz 
7010b55e27dSYuval Mintz 	for_each_hwfn(cdev, i) {
7020b55e27dSYuval Mintz 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
7030b55e27dSYuval Mintz 
7040b55e27dSYuval Mintz 		vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
7050b55e27dSYuval Mintz 		if (!vf)
7060b55e27dSYuval Mintz 			continue;
7070b55e27dSYuval Mintz 
7080b55e27dSYuval Mintz 		vf->to_disable = to_disable;
7090b55e27dSYuval Mintz 	}
7100b55e27dSYuval Mintz }
7110b55e27dSYuval Mintz 
712ba56947aSBaoyou Xie static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
7130b55e27dSYuval Mintz {
7140b55e27dSYuval Mintz 	u16 i;
7150b55e27dSYuval Mintz 
7160b55e27dSYuval Mintz 	if (!IS_QED_SRIOV(cdev))
7170b55e27dSYuval Mintz 		return;
7180b55e27dSYuval Mintz 
7190b55e27dSYuval Mintz 	for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
7200b55e27dSYuval Mintz 		qed_iov_set_vf_to_disable(cdev, i, to_disable);
7210b55e27dSYuval Mintz }
7220b55e27dSYuval Mintz 
7231408cc1fSYuval Mintz static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
7241408cc1fSYuval Mintz 				       struct qed_ptt *p_ptt, u8 abs_vfid)
7251408cc1fSYuval Mintz {
7261408cc1fSYuval Mintz 	qed_wr(p_hwfn, p_ptt,
7271408cc1fSYuval Mintz 	       PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
7281408cc1fSYuval Mintz 	       1 << (abs_vfid & 0x1f));
7291408cc1fSYuval Mintz }
7301408cc1fSYuval Mintz 
731dacd88d6SYuval Mintz static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
732dacd88d6SYuval Mintz 				 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
733dacd88d6SYuval Mintz {
734dacd88d6SYuval Mintz 	int i;
735dacd88d6SYuval Mintz 
736dacd88d6SYuval Mintz 	/* Set VF masks and configuration - pretend */
737dacd88d6SYuval Mintz 	qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
738dacd88d6SYuval Mintz 
739dacd88d6SYuval Mintz 	qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
740dacd88d6SYuval Mintz 
741dacd88d6SYuval Mintz 	/* unpretend */
742dacd88d6SYuval Mintz 	qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
743dacd88d6SYuval Mintz 
744dacd88d6SYuval Mintz 	/* iterate over all queues, clear sb consumer */
745b2b897ebSYuval Mintz 	for (i = 0; i < vf->num_sbs; i++)
746b2b897ebSYuval Mintz 		qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
747b2b897ebSYuval Mintz 						vf->igu_sbs[i],
748b2b897ebSYuval Mintz 						vf->opaque_fid, true);
749dacd88d6SYuval Mintz }
750dacd88d6SYuval Mintz 
7510b55e27dSYuval Mintz static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
7520b55e27dSYuval Mintz 				   struct qed_ptt *p_ptt,
7530b55e27dSYuval Mintz 				   struct qed_vf_info *vf, bool enable)
7540b55e27dSYuval Mintz {
7550b55e27dSYuval Mintz 	u32 igu_vf_conf;
7560b55e27dSYuval Mintz 
7570b55e27dSYuval Mintz 	qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
7580b55e27dSYuval Mintz 
7590b55e27dSYuval Mintz 	igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
7600b55e27dSYuval Mintz 
7610b55e27dSYuval Mintz 	if (enable)
7620b55e27dSYuval Mintz 		igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
7630b55e27dSYuval Mintz 	else
7640b55e27dSYuval Mintz 		igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
7650b55e27dSYuval Mintz 
7660b55e27dSYuval Mintz 	qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
7670b55e27dSYuval Mintz 
7680b55e27dSYuval Mintz 	/* unpretend */
7690b55e27dSYuval Mintz 	qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
7700b55e27dSYuval Mintz }
7710b55e27dSYuval Mintz 
77288072fd4SMintz, Yuval static int
77388072fd4SMintz, Yuval qed_iov_enable_vf_access_msix(struct qed_hwfn *p_hwfn,
77488072fd4SMintz, Yuval 			      struct qed_ptt *p_ptt, u8 abs_vf_id, u8 num_sbs)
77588072fd4SMintz, Yuval {
77688072fd4SMintz, Yuval 	u8 current_max = 0;
77788072fd4SMintz, Yuval 	int i;
77888072fd4SMintz, Yuval 
77988072fd4SMintz, Yuval 	/* For AH onward, configuration is per-PF. Find maximum of all
78088072fd4SMintz, Yuval 	 * the currently enabled child VFs, and set the number to be that.
78188072fd4SMintz, Yuval 	 */
78288072fd4SMintz, Yuval 	if (!QED_IS_BB(p_hwfn->cdev)) {
78388072fd4SMintz, Yuval 		qed_for_each_vf(p_hwfn, i) {
78488072fd4SMintz, Yuval 			struct qed_vf_info *p_vf;
78588072fd4SMintz, Yuval 
78688072fd4SMintz, Yuval 			p_vf = qed_iov_get_vf_info(p_hwfn, (u16)i, true);
78788072fd4SMintz, Yuval 			if (!p_vf)
78888072fd4SMintz, Yuval 				continue;
78988072fd4SMintz, Yuval 
79088072fd4SMintz, Yuval 			current_max = max_t(u8, current_max, p_vf->num_sbs);
79188072fd4SMintz, Yuval 		}
79288072fd4SMintz, Yuval 	}
79388072fd4SMintz, Yuval 
79488072fd4SMintz, Yuval 	if (num_sbs > current_max)
79588072fd4SMintz, Yuval 		return qed_mcp_config_vf_msix(p_hwfn, p_ptt,
79688072fd4SMintz, Yuval 					      abs_vf_id, num_sbs);
79788072fd4SMintz, Yuval 
79888072fd4SMintz, Yuval 	return 0;
79988072fd4SMintz, Yuval }
80088072fd4SMintz, Yuval 
8011408cc1fSYuval Mintz static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
8021408cc1fSYuval Mintz 				    struct qed_ptt *p_ptt,
8031408cc1fSYuval Mintz 				    struct qed_vf_info *vf)
8041408cc1fSYuval Mintz {
8051408cc1fSYuval Mintz 	u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
8061408cc1fSYuval Mintz 	int rc;
8071408cc1fSYuval Mintz 
8084e9b2a67SMintz, Yuval 	/* It's possible VF was previously considered malicious -
8094e9b2a67SMintz, Yuval 	 * clear the indication even if we're only going to disable VF.
8104e9b2a67SMintz, Yuval 	 */
8114e9b2a67SMintz, Yuval 	vf->b_malicious = false;
8124e9b2a67SMintz, Yuval 
8130b55e27dSYuval Mintz 	if (vf->to_disable)
8140b55e27dSYuval Mintz 		return 0;
8150b55e27dSYuval Mintz 
8161408cc1fSYuval Mintz 	DP_VERBOSE(p_hwfn,
8171408cc1fSYuval Mintz 		   QED_MSG_IOV,
8181408cc1fSYuval Mintz 		   "Enable internal access for vf %x [abs %x]\n",
8191408cc1fSYuval Mintz 		   vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
8201408cc1fSYuval Mintz 
8211408cc1fSYuval Mintz 	qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
8221408cc1fSYuval Mintz 
823b2b897ebSYuval Mintz 	qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
824b2b897ebSYuval Mintz 
82588072fd4SMintz, Yuval 	rc = qed_iov_enable_vf_access_msix(p_hwfn, p_ptt,
82688072fd4SMintz, Yuval 					   vf->abs_vf_id, vf->num_sbs);
8271408cc1fSYuval Mintz 	if (rc)
8281408cc1fSYuval Mintz 		return rc;
8291408cc1fSYuval Mintz 
8301408cc1fSYuval Mintz 	qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
8311408cc1fSYuval Mintz 
8321408cc1fSYuval Mintz 	SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
8331408cc1fSYuval Mintz 	STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
8341408cc1fSYuval Mintz 
8351408cc1fSYuval Mintz 	qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
8361408cc1fSYuval Mintz 		     p_hwfn->hw_info.hw_mode);
8371408cc1fSYuval Mintz 
8381408cc1fSYuval Mintz 	/* unpretend */
8391408cc1fSYuval Mintz 	qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
8401408cc1fSYuval Mintz 
8411408cc1fSYuval Mintz 	vf->state = VF_FREE;
8421408cc1fSYuval Mintz 
8431408cc1fSYuval Mintz 	return rc;
8441408cc1fSYuval Mintz }
8451408cc1fSYuval Mintz 
8460b55e27dSYuval Mintz /**
8470b55e27dSYuval Mintz  * @brief qed_iov_config_perm_table - configure the permission
8480b55e27dSYuval Mintz  *      zone table.
8490b55e27dSYuval Mintz  *      In E4, queue zone permission table size is 320x9. There
8500b55e27dSYuval Mintz  *      are 320 VF queues for single engine device (256 for dual
8510b55e27dSYuval Mintz  *      engine device), and each entry has the following format:
8520b55e27dSYuval Mintz  *      {Valid, VF[7:0]}
8530b55e27dSYuval Mintz  * @param p_hwfn
8540b55e27dSYuval Mintz  * @param p_ptt
8550b55e27dSYuval Mintz  * @param vf
8560b55e27dSYuval Mintz  * @param enable
8570b55e27dSYuval Mintz  */
8580b55e27dSYuval Mintz static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
8590b55e27dSYuval Mintz 				      struct qed_ptt *p_ptt,
8600b55e27dSYuval Mintz 				      struct qed_vf_info *vf, u8 enable)
8610b55e27dSYuval Mintz {
8620b55e27dSYuval Mintz 	u32 reg_addr, val;
8630b55e27dSYuval Mintz 	u16 qzone_id = 0;
8640b55e27dSYuval Mintz 	int qid;
8650b55e27dSYuval Mintz 
8660b55e27dSYuval Mintz 	for (qid = 0; qid < vf->num_rxqs; qid++) {
8670b55e27dSYuval Mintz 		qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
8680b55e27dSYuval Mintz 				&qzone_id);
8690b55e27dSYuval Mintz 
8700b55e27dSYuval Mintz 		reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
8711a635e48SYuval Mintz 		val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
8720b55e27dSYuval Mintz 		qed_wr(p_hwfn, p_ptt, reg_addr, val);
8730b55e27dSYuval Mintz 	}
8740b55e27dSYuval Mintz }
8750b55e27dSYuval Mintz 
876dacd88d6SYuval Mintz static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
877dacd88d6SYuval Mintz 				      struct qed_ptt *p_ptt,
878dacd88d6SYuval Mintz 				      struct qed_vf_info *vf)
879dacd88d6SYuval Mintz {
880dacd88d6SYuval Mintz 	/* Reset vf in IGU - interrupts are still disabled */
881dacd88d6SYuval Mintz 	qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
882dacd88d6SYuval Mintz 
883dacd88d6SYuval Mintz 	qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
884dacd88d6SYuval Mintz 
885dacd88d6SYuval Mintz 	/* Permission Table */
886dacd88d6SYuval Mintz 	qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
887dacd88d6SYuval Mintz }
888dacd88d6SYuval Mintz 
8891408cc1fSYuval Mintz static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
8901408cc1fSYuval Mintz 				   struct qed_ptt *p_ptt,
8911408cc1fSYuval Mintz 				   struct qed_vf_info *vf, u16 num_rx_queues)
8921408cc1fSYuval Mintz {
89309b6b147SMintz, Yuval 	struct qed_igu_block *p_block;
89409b6b147SMintz, Yuval 	struct cau_sb_entry sb_entry;
89509b6b147SMintz, Yuval 	int qid = 0;
8961408cc1fSYuval Mintz 	u32 val = 0;
8971408cc1fSYuval Mintz 
898726fdbe9SMintz, Yuval 	if (num_rx_queues > p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov)
899726fdbe9SMintz, Yuval 		num_rx_queues = p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov;
900726fdbe9SMintz, Yuval 	p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov -= num_rx_queues;
9011408cc1fSYuval Mintz 
9021408cc1fSYuval Mintz 	SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
9031408cc1fSYuval Mintz 	SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
9041408cc1fSYuval Mintz 	SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
9051408cc1fSYuval Mintz 
90609b6b147SMintz, Yuval 	for (qid = 0; qid < num_rx_queues; qid++) {
90709b6b147SMintz, Yuval 		p_block = qed_get_igu_free_sb(p_hwfn, false);
90809b6b147SMintz, Yuval 		vf->igu_sbs[qid] = p_block->igu_sb_id;
90909b6b147SMintz, Yuval 		p_block->status &= ~QED_IGU_STATUS_FREE;
9101408cc1fSYuval Mintz 		SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
9111408cc1fSYuval Mintz 
9121408cc1fSYuval Mintz 		qed_wr(p_hwfn, p_ptt,
91309b6b147SMintz, Yuval 		       IGU_REG_MAPPING_MEMORY +
91409b6b147SMintz, Yuval 		       sizeof(u32) * p_block->igu_sb_id, val);
9151408cc1fSYuval Mintz 
9161408cc1fSYuval Mintz 		/* Configure igu sb in CAU which were marked valid */
9171408cc1fSYuval Mintz 		qed_init_cau_sb_entry(p_hwfn, &sb_entry,
91809b6b147SMintz, Yuval 				      p_hwfn->rel_pf_id, vf->abs_vf_id, 1);
9191408cc1fSYuval Mintz 		qed_dmae_host2grc(p_hwfn, p_ptt,
9201408cc1fSYuval Mintz 				  (u64)(uintptr_t)&sb_entry,
9211408cc1fSYuval Mintz 				  CAU_REG_SB_VAR_MEMORY +
92209b6b147SMintz, Yuval 				  p_block->igu_sb_id * sizeof(u64), 2, 0);
9231408cc1fSYuval Mintz 	}
9241408cc1fSYuval Mintz 
9251408cc1fSYuval Mintz 	vf->num_sbs = (u8) num_rx_queues;
9261408cc1fSYuval Mintz 
9271408cc1fSYuval Mintz 	return vf->num_sbs;
9281408cc1fSYuval Mintz }
9291408cc1fSYuval Mintz 
9300b55e27dSYuval Mintz static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
9310b55e27dSYuval Mintz 				    struct qed_ptt *p_ptt,
9320b55e27dSYuval Mintz 				    struct qed_vf_info *vf)
9330b55e27dSYuval Mintz {
9340b55e27dSYuval Mintz 	struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
9350b55e27dSYuval Mintz 	int idx, igu_id;
9360b55e27dSYuval Mintz 	u32 addr, val;
9370b55e27dSYuval Mintz 
9380b55e27dSYuval Mintz 	/* Invalidate igu CAM lines and mark them as free */
9390b55e27dSYuval Mintz 	for (idx = 0; idx < vf->num_sbs; idx++) {
9400b55e27dSYuval Mintz 		igu_id = vf->igu_sbs[idx];
9410b55e27dSYuval Mintz 		addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
9420b55e27dSYuval Mintz 
9430b55e27dSYuval Mintz 		val = qed_rd(p_hwfn, p_ptt, addr);
9440b55e27dSYuval Mintz 		SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
9450b55e27dSYuval Mintz 		qed_wr(p_hwfn, p_ptt, addr, val);
9460b55e27dSYuval Mintz 
947d749dd0dSMintz, Yuval 		p_info->entry[igu_id].status |= QED_IGU_STATUS_FREE;
948726fdbe9SMintz, Yuval 		p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov++;
9490b55e27dSYuval Mintz 	}
9500b55e27dSYuval Mintz 
9510b55e27dSYuval Mintz 	vf->num_sbs = 0;
9520b55e27dSYuval Mintz }
9530b55e27dSYuval Mintz 
95433b2fbd0SMintz, Yuval static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
95533b2fbd0SMintz, Yuval 			     u16 vfid,
95633b2fbd0SMintz, Yuval 			     struct qed_mcp_link_params *params,
95733b2fbd0SMintz, Yuval 			     struct qed_mcp_link_state *link,
95833b2fbd0SMintz, Yuval 			     struct qed_mcp_link_capabilities *p_caps)
95933b2fbd0SMintz, Yuval {
96033b2fbd0SMintz, Yuval 	struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
96133b2fbd0SMintz, Yuval 						       vfid,
96233b2fbd0SMintz, Yuval 						       false);
96333b2fbd0SMintz, Yuval 	struct qed_bulletin_content *p_bulletin;
96433b2fbd0SMintz, Yuval 
96533b2fbd0SMintz, Yuval 	if (!p_vf)
96633b2fbd0SMintz, Yuval 		return;
96733b2fbd0SMintz, Yuval 
96833b2fbd0SMintz, Yuval 	p_bulletin = p_vf->bulletin.p_virt;
96933b2fbd0SMintz, Yuval 	p_bulletin->req_autoneg = params->speed.autoneg;
97033b2fbd0SMintz, Yuval 	p_bulletin->req_adv_speed = params->speed.advertised_speeds;
97133b2fbd0SMintz, Yuval 	p_bulletin->req_forced_speed = params->speed.forced_speed;
97233b2fbd0SMintz, Yuval 	p_bulletin->req_autoneg_pause = params->pause.autoneg;
97333b2fbd0SMintz, Yuval 	p_bulletin->req_forced_rx = params->pause.forced_rx;
97433b2fbd0SMintz, Yuval 	p_bulletin->req_forced_tx = params->pause.forced_tx;
97533b2fbd0SMintz, Yuval 	p_bulletin->req_loopback = params->loopback_mode;
97633b2fbd0SMintz, Yuval 
97733b2fbd0SMintz, Yuval 	p_bulletin->link_up = link->link_up;
97833b2fbd0SMintz, Yuval 	p_bulletin->speed = link->speed;
97933b2fbd0SMintz, Yuval 	p_bulletin->full_duplex = link->full_duplex;
98033b2fbd0SMintz, Yuval 	p_bulletin->autoneg = link->an;
98133b2fbd0SMintz, Yuval 	p_bulletin->autoneg_complete = link->an_complete;
98233b2fbd0SMintz, Yuval 	p_bulletin->parallel_detection = link->parallel_detection;
98333b2fbd0SMintz, Yuval 	p_bulletin->pfc_enabled = link->pfc_enabled;
98433b2fbd0SMintz, Yuval 	p_bulletin->partner_adv_speed = link->partner_adv_speed;
98533b2fbd0SMintz, Yuval 	p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
98633b2fbd0SMintz, Yuval 	p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
98733b2fbd0SMintz, Yuval 	p_bulletin->partner_adv_pause = link->partner_adv_pause;
98833b2fbd0SMintz, Yuval 	p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
98933b2fbd0SMintz, Yuval 
99033b2fbd0SMintz, Yuval 	p_bulletin->capability_speed = p_caps->speed_capabilities;
99133b2fbd0SMintz, Yuval }
99233b2fbd0SMintz, Yuval 
9931408cc1fSYuval Mintz static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
9941408cc1fSYuval Mintz 				  struct qed_ptt *p_ptt,
9953da7a37aSMintz, Yuval 				  struct qed_iov_vf_init_params *p_params)
9961408cc1fSYuval Mintz {
99733b2fbd0SMintz, Yuval 	struct qed_mcp_link_capabilities link_caps;
99833b2fbd0SMintz, Yuval 	struct qed_mcp_link_params link_params;
99933b2fbd0SMintz, Yuval 	struct qed_mcp_link_state link_state;
10001408cc1fSYuval Mintz 	u8 num_of_vf_avaiable_chains = 0;
10011408cc1fSYuval Mintz 	struct qed_vf_info *vf = NULL;
10023da7a37aSMintz, Yuval 	u16 qid, num_irqs;
10031408cc1fSYuval Mintz 	int rc = 0;
10041408cc1fSYuval Mintz 	u32 cids;
10051408cc1fSYuval Mintz 	u8 i;
10061408cc1fSYuval Mintz 
10073da7a37aSMintz, Yuval 	vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
10081408cc1fSYuval Mintz 	if (!vf) {
10091408cc1fSYuval Mintz 		DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
10101408cc1fSYuval Mintz 		return -EINVAL;
10111408cc1fSYuval Mintz 	}
10121408cc1fSYuval Mintz 
10131408cc1fSYuval Mintz 	if (vf->b_init) {
10143da7a37aSMintz, Yuval 		DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
10153da7a37aSMintz, Yuval 			  p_params->rel_vf_id);
10161408cc1fSYuval Mintz 		return -EINVAL;
10171408cc1fSYuval Mintz 	}
10181408cc1fSYuval Mintz 
10193da7a37aSMintz, Yuval 	/* Perform sanity checking on the requested queue_id */
10203da7a37aSMintz, Yuval 	for (i = 0; i < p_params->num_queues; i++) {
10213da7a37aSMintz, Yuval 		u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
10223da7a37aSMintz, Yuval 		u16 max_vf_qzone = min_vf_qzone +
10233da7a37aSMintz, Yuval 		    FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
10243da7a37aSMintz, Yuval 
10253da7a37aSMintz, Yuval 		qid = p_params->req_rx_queue[i];
10263da7a37aSMintz, Yuval 		if (qid < min_vf_qzone || qid > max_vf_qzone) {
10273da7a37aSMintz, Yuval 			DP_NOTICE(p_hwfn,
10283da7a37aSMintz, Yuval 				  "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
10293da7a37aSMintz, Yuval 				  qid,
10303da7a37aSMintz, Yuval 				  p_params->rel_vf_id,
10313da7a37aSMintz, Yuval 				  min_vf_qzone, max_vf_qzone);
10323da7a37aSMintz, Yuval 			return -EINVAL;
10333da7a37aSMintz, Yuval 		}
10343da7a37aSMintz, Yuval 
10353da7a37aSMintz, Yuval 		qid = p_params->req_tx_queue[i];
10363da7a37aSMintz, Yuval 		if (qid > max_vf_qzone) {
10373da7a37aSMintz, Yuval 			DP_NOTICE(p_hwfn,
10383da7a37aSMintz, Yuval 				  "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
10393da7a37aSMintz, Yuval 				  qid, p_params->rel_vf_id, max_vf_qzone);
10403da7a37aSMintz, Yuval 			return -EINVAL;
10413da7a37aSMintz, Yuval 		}
10423da7a37aSMintz, Yuval 
10433da7a37aSMintz, Yuval 		/* If client *really* wants, Tx qid can be shared with PF */
10443da7a37aSMintz, Yuval 		if (qid < min_vf_qzone)
10453da7a37aSMintz, Yuval 			DP_VERBOSE(p_hwfn,
10463da7a37aSMintz, Yuval 				   QED_MSG_IOV,
10473da7a37aSMintz, Yuval 				   "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
10483da7a37aSMintz, Yuval 				   p_params->rel_vf_id, qid, i);
10493da7a37aSMintz, Yuval 	}
10503da7a37aSMintz, Yuval 
10511408cc1fSYuval Mintz 	/* Limit number of queues according to number of CIDs */
10521408cc1fSYuval Mintz 	qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
10531408cc1fSYuval Mintz 	DP_VERBOSE(p_hwfn,
10541408cc1fSYuval Mintz 		   QED_MSG_IOV,
10551408cc1fSYuval Mintz 		   "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
10563da7a37aSMintz, Yuval 		   vf->relative_vf_id, p_params->num_queues, (u16)cids);
10573da7a37aSMintz, Yuval 	num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
10581408cc1fSYuval Mintz 
10591408cc1fSYuval Mintz 	num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
10601408cc1fSYuval Mintz 							     p_ptt,
10613da7a37aSMintz, Yuval 							     vf, num_irqs);
10621408cc1fSYuval Mintz 	if (!num_of_vf_avaiable_chains) {
10631408cc1fSYuval Mintz 		DP_ERR(p_hwfn, "no available igu sbs\n");
10641408cc1fSYuval Mintz 		return -ENOMEM;
10651408cc1fSYuval Mintz 	}
10661408cc1fSYuval Mintz 
10671408cc1fSYuval Mintz 	/* Choose queue number and index ranges */
10681408cc1fSYuval Mintz 	vf->num_rxqs = num_of_vf_avaiable_chains;
10691408cc1fSYuval Mintz 	vf->num_txqs = num_of_vf_avaiable_chains;
10701408cc1fSYuval Mintz 
10711408cc1fSYuval Mintz 	for (i = 0; i < vf->num_rxqs; i++) {
1072007bc371SMintz, Yuval 		struct qed_vf_queue *p_queue = &vf->vf_queues[i];
10731408cc1fSYuval Mintz 
10743da7a37aSMintz, Yuval 		p_queue->fw_rx_qid = p_params->req_rx_queue[i];
10753da7a37aSMintz, Yuval 		p_queue->fw_tx_qid = p_params->req_tx_queue[i];
10761408cc1fSYuval Mintz 
10771408cc1fSYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1078007bc371SMintz, Yuval 			   "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x]\n",
1079007bc371SMintz, Yuval 			   vf->relative_vf_id, i, vf->igu_sbs[i],
1080007bc371SMintz, Yuval 			   p_queue->fw_rx_qid, p_queue->fw_tx_qid);
10811408cc1fSYuval Mintz 	}
10823da7a37aSMintz, Yuval 
108333b2fbd0SMintz, Yuval 	/* Update the link configuration in bulletin */
108433b2fbd0SMintz, Yuval 	memcpy(&link_params, qed_mcp_get_link_params(p_hwfn),
108533b2fbd0SMintz, Yuval 	       sizeof(link_params));
108633b2fbd0SMintz, Yuval 	memcpy(&link_state, qed_mcp_get_link_state(p_hwfn), sizeof(link_state));
108733b2fbd0SMintz, Yuval 	memcpy(&link_caps, qed_mcp_get_link_capabilities(p_hwfn),
108833b2fbd0SMintz, Yuval 	       sizeof(link_caps));
108933b2fbd0SMintz, Yuval 	qed_iov_set_link(p_hwfn, p_params->rel_vf_id,
109033b2fbd0SMintz, Yuval 			 &link_params, &link_state, &link_caps);
109133b2fbd0SMintz, Yuval 
10921408cc1fSYuval Mintz 	rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
10931408cc1fSYuval Mintz 	if (!rc) {
10941408cc1fSYuval Mintz 		vf->b_init = true;
10951408cc1fSYuval Mintz 
10961408cc1fSYuval Mintz 		if (IS_LEAD_HWFN(p_hwfn))
10971408cc1fSYuval Mintz 			p_hwfn->cdev->p_iov_info->num_vfs++;
10981408cc1fSYuval Mintz 	}
10991408cc1fSYuval Mintz 
11001408cc1fSYuval Mintz 	return rc;
11011408cc1fSYuval Mintz }
11021408cc1fSYuval Mintz 
11030b55e27dSYuval Mintz static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
11040b55e27dSYuval Mintz 				     struct qed_ptt *p_ptt, u16 rel_vf_id)
11050b55e27dSYuval Mintz {
1106079d20a6SManish Chopra 	struct qed_mcp_link_capabilities caps;
1107079d20a6SManish Chopra 	struct qed_mcp_link_params params;
1108079d20a6SManish Chopra 	struct qed_mcp_link_state link;
11090b55e27dSYuval Mintz 	struct qed_vf_info *vf = NULL;
11100b55e27dSYuval Mintz 
11110b55e27dSYuval Mintz 	vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
11120b55e27dSYuval Mintz 	if (!vf) {
11130b55e27dSYuval Mintz 		DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
11140b55e27dSYuval Mintz 		return -EINVAL;
11150b55e27dSYuval Mintz 	}
11160b55e27dSYuval Mintz 
111736558c3dSYuval Mintz 	if (vf->bulletin.p_virt)
111836558c3dSYuval Mintz 		memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
111936558c3dSYuval Mintz 
112036558c3dSYuval Mintz 	memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
112136558c3dSYuval Mintz 
1122079d20a6SManish Chopra 	/* Get the link configuration back in bulletin so
1123079d20a6SManish Chopra 	 * that when VFs are re-enabled they get the actual
1124079d20a6SManish Chopra 	 * link configuration.
1125079d20a6SManish Chopra 	 */
1126079d20a6SManish Chopra 	memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
1127079d20a6SManish Chopra 	memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
1128079d20a6SManish Chopra 	memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
1129079d20a6SManish Chopra 	qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
1130079d20a6SManish Chopra 
11311fe614d1SYuval Mintz 	/* Forget the VF's acquisition message */
11321fe614d1SYuval Mintz 	memset(&vf->acquire, 0, sizeof(vf->acquire));
11330b55e27dSYuval Mintz 
11340b55e27dSYuval Mintz 	/* disablng interrupts and resetting permission table was done during
11350b55e27dSYuval Mintz 	 * vf-close, however, we could get here without going through vf_close
11360b55e27dSYuval Mintz 	 */
11370b55e27dSYuval Mintz 	/* Disable Interrupts for VF */
11380b55e27dSYuval Mintz 	qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
11390b55e27dSYuval Mintz 
11400b55e27dSYuval Mintz 	/* Reset Permission table */
11410b55e27dSYuval Mintz 	qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
11420b55e27dSYuval Mintz 
11430b55e27dSYuval Mintz 	vf->num_rxqs = 0;
11440b55e27dSYuval Mintz 	vf->num_txqs = 0;
11450b55e27dSYuval Mintz 	qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
11460b55e27dSYuval Mintz 
11470b55e27dSYuval Mintz 	if (vf->b_init) {
11480b55e27dSYuval Mintz 		vf->b_init = false;
11490b55e27dSYuval Mintz 
11500b55e27dSYuval Mintz 		if (IS_LEAD_HWFN(p_hwfn))
11510b55e27dSYuval Mintz 			p_hwfn->cdev->p_iov_info->num_vfs--;
11520b55e27dSYuval Mintz 	}
11530b55e27dSYuval Mintz 
11540b55e27dSYuval Mintz 	return 0;
11550b55e27dSYuval Mintz }
11560b55e27dSYuval Mintz 
115737bff2b9SYuval Mintz static bool qed_iov_tlv_supported(u16 tlvtype)
115837bff2b9SYuval Mintz {
115937bff2b9SYuval Mintz 	return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
116037bff2b9SYuval Mintz }
116137bff2b9SYuval Mintz 
116237bff2b9SYuval Mintz /* place a given tlv on the tlv buffer, continuing current tlv list */
116337bff2b9SYuval Mintz void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
116437bff2b9SYuval Mintz {
116537bff2b9SYuval Mintz 	struct channel_tlv *tl = (struct channel_tlv *)*offset;
116637bff2b9SYuval Mintz 
116737bff2b9SYuval Mintz 	tl->type = type;
116837bff2b9SYuval Mintz 	tl->length = length;
116937bff2b9SYuval Mintz 
117037bff2b9SYuval Mintz 	/* Offset should keep pointing to next TLV (the end of the last) */
117137bff2b9SYuval Mintz 	*offset += length;
117237bff2b9SYuval Mintz 
117337bff2b9SYuval Mintz 	/* Return a pointer to the start of the added tlv */
117437bff2b9SYuval Mintz 	return *offset - length;
117537bff2b9SYuval Mintz }
117637bff2b9SYuval Mintz 
117737bff2b9SYuval Mintz /* list the types and lengths of the tlvs on the buffer */
117837bff2b9SYuval Mintz void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
117937bff2b9SYuval Mintz {
118037bff2b9SYuval Mintz 	u16 i = 1, total_length = 0;
118137bff2b9SYuval Mintz 	struct channel_tlv *tlv;
118237bff2b9SYuval Mintz 
118337bff2b9SYuval Mintz 	do {
118437bff2b9SYuval Mintz 		tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
118537bff2b9SYuval Mintz 
118637bff2b9SYuval Mintz 		/* output tlv */
118737bff2b9SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
118837bff2b9SYuval Mintz 			   "TLV number %d: type %d, length %d\n",
118937bff2b9SYuval Mintz 			   i, tlv->type, tlv->length);
119037bff2b9SYuval Mintz 
119137bff2b9SYuval Mintz 		if (tlv->type == CHANNEL_TLV_LIST_END)
119237bff2b9SYuval Mintz 			return;
119337bff2b9SYuval Mintz 
119437bff2b9SYuval Mintz 		/* Validate entry - protect against malicious VFs */
119537bff2b9SYuval Mintz 		if (!tlv->length) {
119637bff2b9SYuval Mintz 			DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
119737bff2b9SYuval Mintz 			return;
119837bff2b9SYuval Mintz 		}
119937bff2b9SYuval Mintz 
120037bff2b9SYuval Mintz 		total_length += tlv->length;
120137bff2b9SYuval Mintz 
120237bff2b9SYuval Mintz 		if (total_length >= sizeof(struct tlv_buffer_size)) {
120337bff2b9SYuval Mintz 			DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
120437bff2b9SYuval Mintz 			return;
120537bff2b9SYuval Mintz 		}
120637bff2b9SYuval Mintz 
120737bff2b9SYuval Mintz 		i++;
120837bff2b9SYuval Mintz 	} while (1);
120937bff2b9SYuval Mintz }
121037bff2b9SYuval Mintz 
121137bff2b9SYuval Mintz static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
121237bff2b9SYuval Mintz 				  struct qed_ptt *p_ptt,
121337bff2b9SYuval Mintz 				  struct qed_vf_info *p_vf,
121437bff2b9SYuval Mintz 				  u16 length, u8 status)
121537bff2b9SYuval Mintz {
121637bff2b9SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
121737bff2b9SYuval Mintz 	struct qed_dmae_params params;
121837bff2b9SYuval Mintz 	u8 eng_vf_id;
121937bff2b9SYuval Mintz 
122037bff2b9SYuval Mintz 	mbx->reply_virt->default_resp.hdr.status = status;
122137bff2b9SYuval Mintz 
122237bff2b9SYuval Mintz 	qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
122337bff2b9SYuval Mintz 
122437bff2b9SYuval Mintz 	eng_vf_id = p_vf->abs_vf_id;
122537bff2b9SYuval Mintz 
122637bff2b9SYuval Mintz 	memset(&params, 0, sizeof(struct qed_dmae_params));
122737bff2b9SYuval Mintz 	params.flags = QED_DMAE_FLAG_VF_DST;
122837bff2b9SYuval Mintz 	params.dst_vfid = eng_vf_id;
122937bff2b9SYuval Mintz 
123037bff2b9SYuval Mintz 	qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
123137bff2b9SYuval Mintz 			   mbx->req_virt->first_tlv.reply_address +
123237bff2b9SYuval Mintz 			   sizeof(u64),
123337bff2b9SYuval Mintz 			   (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
123437bff2b9SYuval Mintz 			   &params);
123537bff2b9SYuval Mintz 
1236d9194081SMintz, Yuval 	/* Once PF copies the rc to the VF, the latter can continue
1237d9194081SMintz, Yuval 	 * and send an additional message. So we have to make sure the
1238d9194081SMintz, Yuval 	 * channel would be re-set to ready prior to that.
1239d9194081SMintz, Yuval 	 */
124037bff2b9SYuval Mintz 	REG_WR(p_hwfn,
124137bff2b9SYuval Mintz 	       GTT_BAR0_MAP_REG_USDM_RAM +
124237bff2b9SYuval Mintz 	       USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
1243d9194081SMintz, Yuval 
1244d9194081SMintz, Yuval 	qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1245d9194081SMintz, Yuval 			   mbx->req_virt->first_tlv.reply_address,
1246d9194081SMintz, Yuval 			   sizeof(u64) / 4, &params);
124737bff2b9SYuval Mintz }
124837bff2b9SYuval Mintz 
1249dacd88d6SYuval Mintz static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
1250dacd88d6SYuval Mintz 				enum qed_iov_vport_update_flag flag)
1251dacd88d6SYuval Mintz {
1252dacd88d6SYuval Mintz 	switch (flag) {
1253dacd88d6SYuval Mintz 	case QED_IOV_VP_UPDATE_ACTIVATE:
1254dacd88d6SYuval Mintz 		return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
125517b235c1SYuval Mintz 	case QED_IOV_VP_UPDATE_VLAN_STRIP:
125617b235c1SYuval Mintz 		return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
125717b235c1SYuval Mintz 	case QED_IOV_VP_UPDATE_TX_SWITCH:
125817b235c1SYuval Mintz 		return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1259dacd88d6SYuval Mintz 	case QED_IOV_VP_UPDATE_MCAST:
1260dacd88d6SYuval Mintz 		return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1261dacd88d6SYuval Mintz 	case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
1262dacd88d6SYuval Mintz 		return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1263dacd88d6SYuval Mintz 	case QED_IOV_VP_UPDATE_RSS:
1264dacd88d6SYuval Mintz 		return CHANNEL_TLV_VPORT_UPDATE_RSS;
126517b235c1SYuval Mintz 	case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
126617b235c1SYuval Mintz 		return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
126717b235c1SYuval Mintz 	case QED_IOV_VP_UPDATE_SGE_TPA:
126817b235c1SYuval Mintz 		return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
1269dacd88d6SYuval Mintz 	default:
1270dacd88d6SYuval Mintz 		return 0;
1271dacd88d6SYuval Mintz 	}
1272dacd88d6SYuval Mintz }
1273dacd88d6SYuval Mintz 
1274dacd88d6SYuval Mintz static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
1275dacd88d6SYuval Mintz 					    struct qed_vf_info *p_vf,
1276dacd88d6SYuval Mintz 					    struct qed_iov_vf_mbx *p_mbx,
1277dacd88d6SYuval Mintz 					    u8 status,
1278dacd88d6SYuval Mintz 					    u16 tlvs_mask, u16 tlvs_accepted)
1279dacd88d6SYuval Mintz {
1280dacd88d6SYuval Mintz 	struct pfvf_def_resp_tlv *resp;
1281dacd88d6SYuval Mintz 	u16 size, total_len, i;
1282dacd88d6SYuval Mintz 
1283dacd88d6SYuval Mintz 	memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1284dacd88d6SYuval Mintz 	p_mbx->offset = (u8 *)p_mbx->reply_virt;
1285dacd88d6SYuval Mintz 	size = sizeof(struct pfvf_def_resp_tlv);
1286dacd88d6SYuval Mintz 	total_len = size;
1287dacd88d6SYuval Mintz 
1288dacd88d6SYuval Mintz 	qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1289dacd88d6SYuval Mintz 
1290dacd88d6SYuval Mintz 	/* Prepare response for all extended tlvs if they are found by PF */
1291dacd88d6SYuval Mintz 	for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
12921a635e48SYuval Mintz 		if (!(tlvs_mask & BIT(i)))
1293dacd88d6SYuval Mintz 			continue;
1294dacd88d6SYuval Mintz 
1295dacd88d6SYuval Mintz 		resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1296dacd88d6SYuval Mintz 				   qed_iov_vport_to_tlv(p_hwfn, i), size);
1297dacd88d6SYuval Mintz 
12981a635e48SYuval Mintz 		if (tlvs_accepted & BIT(i))
1299dacd88d6SYuval Mintz 			resp->hdr.status = status;
1300dacd88d6SYuval Mintz 		else
1301dacd88d6SYuval Mintz 			resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1302dacd88d6SYuval Mintz 
1303dacd88d6SYuval Mintz 		DP_VERBOSE(p_hwfn,
1304dacd88d6SYuval Mintz 			   QED_MSG_IOV,
1305dacd88d6SYuval Mintz 			   "VF[%d] - vport_update response: TLV %d, status %02x\n",
1306dacd88d6SYuval Mintz 			   p_vf->relative_vf_id,
1307dacd88d6SYuval Mintz 			   qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1308dacd88d6SYuval Mintz 
1309dacd88d6SYuval Mintz 		total_len += size;
1310dacd88d6SYuval Mintz 	}
1311dacd88d6SYuval Mintz 
1312dacd88d6SYuval Mintz 	qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1313dacd88d6SYuval Mintz 		    sizeof(struct channel_list_end_tlv));
1314dacd88d6SYuval Mintz 
1315dacd88d6SYuval Mintz 	return total_len;
1316dacd88d6SYuval Mintz }
1317dacd88d6SYuval Mintz 
131837bff2b9SYuval Mintz static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
131937bff2b9SYuval Mintz 				 struct qed_ptt *p_ptt,
132037bff2b9SYuval Mintz 				 struct qed_vf_info *vf_info,
132137bff2b9SYuval Mintz 				 u16 type, u16 length, u8 status)
132237bff2b9SYuval Mintz {
132337bff2b9SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
132437bff2b9SYuval Mintz 
132537bff2b9SYuval Mintz 	mbx->offset = (u8 *)mbx->reply_virt;
132637bff2b9SYuval Mintz 
132737bff2b9SYuval Mintz 	qed_add_tlv(p_hwfn, &mbx->offset, type, length);
132837bff2b9SYuval Mintz 	qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
132937bff2b9SYuval Mintz 		    sizeof(struct channel_list_end_tlv));
133037bff2b9SYuval Mintz 
133137bff2b9SYuval Mintz 	qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
133237bff2b9SYuval Mintz }
133337bff2b9SYuval Mintz 
1334ba56947aSBaoyou Xie static struct
1335ba56947aSBaoyou Xie qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
13360b55e27dSYuval Mintz 					       u16 relative_vf_id,
13370b55e27dSYuval Mintz 					       bool b_enabled_only)
13380b55e27dSYuval Mintz {
13390b55e27dSYuval Mintz 	struct qed_vf_info *vf = NULL;
13400b55e27dSYuval Mintz 
13410b55e27dSYuval Mintz 	vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
13420b55e27dSYuval Mintz 	if (!vf)
13430b55e27dSYuval Mintz 		return NULL;
13440b55e27dSYuval Mintz 
13450b55e27dSYuval Mintz 	return &vf->p_vf_info;
13460b55e27dSYuval Mintz }
13470b55e27dSYuval Mintz 
1348ba56947aSBaoyou Xie static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
13490b55e27dSYuval Mintz {
13500b55e27dSYuval Mintz 	struct qed_public_vf_info *vf_info;
13510b55e27dSYuval Mintz 
13520b55e27dSYuval Mintz 	vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
13530b55e27dSYuval Mintz 
13540b55e27dSYuval Mintz 	if (!vf_info)
13550b55e27dSYuval Mintz 		return;
13560b55e27dSYuval Mintz 
13570b55e27dSYuval Mintz 	/* Clear the VF mac */
13580ee28e31SShyam Saini 	eth_zero_addr(vf_info->mac);
1359f990c82cSMintz, Yuval 
1360f990c82cSMintz, Yuval 	vf_info->rx_accept_mode = 0;
1361f990c82cSMintz, Yuval 	vf_info->tx_accept_mode = 0;
13620b55e27dSYuval Mintz }
13630b55e27dSYuval Mintz 
13640b55e27dSYuval Mintz static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
13650b55e27dSYuval Mintz 			       struct qed_vf_info *p_vf)
13660b55e27dSYuval Mintz {
1367007bc371SMintz, Yuval 	u32 i, j;
13680b55e27dSYuval Mintz 
13690b55e27dSYuval Mintz 	p_vf->vf_bulletin = 0;
1370dacd88d6SYuval Mintz 	p_vf->vport_instance = 0;
137108feecd7SYuval Mintz 	p_vf->configured_features = 0;
13720b55e27dSYuval Mintz 
13730b55e27dSYuval Mintz 	/* If VF previously requested less resources, go back to default */
13740b55e27dSYuval Mintz 	p_vf->num_rxqs = p_vf->num_sbs;
13750b55e27dSYuval Mintz 	p_vf->num_txqs = p_vf->num_sbs;
13760b55e27dSYuval Mintz 
1377dacd88d6SYuval Mintz 	p_vf->num_active_rxqs = 0;
1378dacd88d6SYuval Mintz 
13793da7a37aSMintz, Yuval 	for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1380007bc371SMintz, Yuval 		struct qed_vf_queue *p_queue = &p_vf->vf_queues[i];
13813da7a37aSMintz, Yuval 
1382007bc371SMintz, Yuval 		for (j = 0; j < MAX_QUEUES_PER_QZONE; j++) {
1383007bc371SMintz, Yuval 			if (!p_queue->cids[j].p_cid)
1384007bc371SMintz, Yuval 				continue;
13853da7a37aSMintz, Yuval 
1386007bc371SMintz, Yuval 			qed_eth_queue_cid_release(p_hwfn,
1387007bc371SMintz, Yuval 						  p_queue->cids[j].p_cid);
1388007bc371SMintz, Yuval 			p_queue->cids[j].p_cid = NULL;
13893da7a37aSMintz, Yuval 		}
13903da7a37aSMintz, Yuval 	}
13910b55e27dSYuval Mintz 
139208feecd7SYuval Mintz 	memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
13931fe614d1SYuval Mintz 	memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
13940b55e27dSYuval Mintz 	qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
13950b55e27dSYuval Mintz }
13960b55e27dSYuval Mintz 
13971a850bfcSMintz, Yuval /* Returns either 0, or log(size) */
13981a850bfcSMintz, Yuval static u32 qed_iov_vf_db_bar_size(struct qed_hwfn *p_hwfn,
13991a850bfcSMintz, Yuval 				  struct qed_ptt *p_ptt)
14001a850bfcSMintz, Yuval {
14011a850bfcSMintz, Yuval 	u32 val = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_VF_BAR1_SIZE);
14021a850bfcSMintz, Yuval 
14031a850bfcSMintz, Yuval 	if (val)
14041a850bfcSMintz, Yuval 		return val + 11;
14051a850bfcSMintz, Yuval 	return 0;
14061a850bfcSMintz, Yuval }
14071a850bfcSMintz, Yuval 
14081a850bfcSMintz, Yuval static void
14091a850bfcSMintz, Yuval qed_iov_vf_mbx_acquire_resc_cids(struct qed_hwfn *p_hwfn,
14101a850bfcSMintz, Yuval 				 struct qed_ptt *p_ptt,
14111a850bfcSMintz, Yuval 				 struct qed_vf_info *p_vf,
14121a850bfcSMintz, Yuval 				 struct vf_pf_resc_request *p_req,
14131a850bfcSMintz, Yuval 				 struct pf_vf_resc *p_resp)
14141a850bfcSMintz, Yuval {
14151a850bfcSMintz, Yuval 	u8 num_vf_cons = p_hwfn->pf_params.eth_pf_params.num_vf_cons;
14161a850bfcSMintz, Yuval 	u8 db_size = qed_db_addr_vf(1, DQ_DEMS_LEGACY) -
14171a850bfcSMintz, Yuval 		     qed_db_addr_vf(0, DQ_DEMS_LEGACY);
14181a850bfcSMintz, Yuval 	u32 bar_size;
14191a850bfcSMintz, Yuval 
14201a850bfcSMintz, Yuval 	p_resp->num_cids = min_t(u8, p_req->num_cids, num_vf_cons);
14211a850bfcSMintz, Yuval 
14221a850bfcSMintz, Yuval 	/* If VF didn't bother asking for QIDs than don't bother limiting
14231a850bfcSMintz, Yuval 	 * number of CIDs. The VF doesn't care about the number, and this
14241a850bfcSMintz, Yuval 	 * has the likely result of causing an additional acquisition.
14251a850bfcSMintz, Yuval 	 */
14261a850bfcSMintz, Yuval 	if (!(p_vf->acquire.vfdev_info.capabilities &
14271a850bfcSMintz, Yuval 	      VFPF_ACQUIRE_CAP_QUEUE_QIDS))
14281a850bfcSMintz, Yuval 		return;
14291a850bfcSMintz, Yuval 
14301a850bfcSMintz, Yuval 	/* If doorbell bar was mapped by VF, limit the VF CIDs to an amount
14311a850bfcSMintz, Yuval 	 * that would make sure doorbells for all CIDs fall within the bar.
14321a850bfcSMintz, Yuval 	 * If it doesn't, make sure regview window is sufficient.
14331a850bfcSMintz, Yuval 	 */
14341a850bfcSMintz, Yuval 	if (p_vf->acquire.vfdev_info.capabilities &
14351a850bfcSMintz, Yuval 	    VFPF_ACQUIRE_CAP_PHYSICAL_BAR) {
14361a850bfcSMintz, Yuval 		bar_size = qed_iov_vf_db_bar_size(p_hwfn, p_ptt);
14371a850bfcSMintz, Yuval 		if (bar_size)
14381a850bfcSMintz, Yuval 			bar_size = 1 << bar_size;
14391a850bfcSMintz, Yuval 
14401a850bfcSMintz, Yuval 		if (p_hwfn->cdev->num_hwfns > 1)
14411a850bfcSMintz, Yuval 			bar_size /= 2;
14421a850bfcSMintz, Yuval 	} else {
14431a850bfcSMintz, Yuval 		bar_size = PXP_VF_BAR0_DQ_LENGTH;
14441a850bfcSMintz, Yuval 	}
14451a850bfcSMintz, Yuval 
14461a850bfcSMintz, Yuval 	if (bar_size / db_size < 256)
14471a850bfcSMintz, Yuval 		p_resp->num_cids = min_t(u8, p_resp->num_cids,
14481a850bfcSMintz, Yuval 					 (u8)(bar_size / db_size));
14491a850bfcSMintz, Yuval }
14501a850bfcSMintz, Yuval 
14511cf2b1a9SYuval Mintz static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
14521cf2b1a9SYuval Mintz 				      struct qed_ptt *p_ptt,
14531cf2b1a9SYuval Mintz 				      struct qed_vf_info *p_vf,
14541cf2b1a9SYuval Mintz 				      struct vf_pf_resc_request *p_req,
14551cf2b1a9SYuval Mintz 				      struct pf_vf_resc *p_resp)
14561cf2b1a9SYuval Mintz {
1457007bc371SMintz, Yuval 	u8 i;
14581cf2b1a9SYuval Mintz 
14591cf2b1a9SYuval Mintz 	/* Queue related information */
14601cf2b1a9SYuval Mintz 	p_resp->num_rxqs = p_vf->num_rxqs;
14611cf2b1a9SYuval Mintz 	p_resp->num_txqs = p_vf->num_txqs;
14621cf2b1a9SYuval Mintz 	p_resp->num_sbs = p_vf->num_sbs;
14631cf2b1a9SYuval Mintz 
14641cf2b1a9SYuval Mintz 	for (i = 0; i < p_resp->num_sbs; i++) {
14651cf2b1a9SYuval Mintz 		p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
14661cf2b1a9SYuval Mintz 		p_resp->hw_sbs[i].sb_qid = 0;
14671cf2b1a9SYuval Mintz 	}
14681cf2b1a9SYuval Mintz 
14691cf2b1a9SYuval Mintz 	/* These fields are filled for backward compatibility.
14701cf2b1a9SYuval Mintz 	 * Unused by modern vfs.
14711cf2b1a9SYuval Mintz 	 */
14721cf2b1a9SYuval Mintz 	for (i = 0; i < p_resp->num_rxqs; i++) {
14731cf2b1a9SYuval Mintz 		qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
14741cf2b1a9SYuval Mintz 				(u16 *)&p_resp->hw_qid[i]);
1475007bc371SMintz, Yuval 		p_resp->cid[i] = i;
14761cf2b1a9SYuval Mintz 	}
14771cf2b1a9SYuval Mintz 
14781cf2b1a9SYuval Mintz 	/* Filter related information */
14791cf2b1a9SYuval Mintz 	p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
14801cf2b1a9SYuval Mintz 					p_req->num_mac_filters);
14811cf2b1a9SYuval Mintz 	p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
14821cf2b1a9SYuval Mintz 					 p_req->num_vlan_filters);
14831cf2b1a9SYuval Mintz 
14841a850bfcSMintz, Yuval 	qed_iov_vf_mbx_acquire_resc_cids(p_hwfn, p_ptt, p_vf, p_req, p_resp);
148508bc8f15SMintz, Yuval 
14861cf2b1a9SYuval Mintz 	/* This isn't really needed/enforced, but some legacy VFs might depend
14871cf2b1a9SYuval Mintz 	 * on the correct filling of this field.
14881cf2b1a9SYuval Mintz 	 */
14891cf2b1a9SYuval Mintz 	p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
14901cf2b1a9SYuval Mintz 
14911cf2b1a9SYuval Mintz 	/* Validate sufficient resources for VF */
14921cf2b1a9SYuval Mintz 	if (p_resp->num_rxqs < p_req->num_rxqs ||
14931cf2b1a9SYuval Mintz 	    p_resp->num_txqs < p_req->num_txqs ||
14941cf2b1a9SYuval Mintz 	    p_resp->num_sbs < p_req->num_sbs ||
14951cf2b1a9SYuval Mintz 	    p_resp->num_mac_filters < p_req->num_mac_filters ||
14961cf2b1a9SYuval Mintz 	    p_resp->num_vlan_filters < p_req->num_vlan_filters ||
149708bc8f15SMintz, Yuval 	    p_resp->num_mc_filters < p_req->num_mc_filters ||
149808bc8f15SMintz, Yuval 	    p_resp->num_cids < p_req->num_cids) {
14991cf2b1a9SYuval Mintz 		DP_VERBOSE(p_hwfn,
15001cf2b1a9SYuval Mintz 			   QED_MSG_IOV,
150108bc8f15SMintz, Yuval 			   "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]\n",
15021cf2b1a9SYuval Mintz 			   p_vf->abs_vf_id,
15031cf2b1a9SYuval Mintz 			   p_req->num_rxqs,
15041cf2b1a9SYuval Mintz 			   p_resp->num_rxqs,
15051cf2b1a9SYuval Mintz 			   p_req->num_rxqs,
15061cf2b1a9SYuval Mintz 			   p_resp->num_txqs,
15071cf2b1a9SYuval Mintz 			   p_req->num_sbs,
15081cf2b1a9SYuval Mintz 			   p_resp->num_sbs,
15091cf2b1a9SYuval Mintz 			   p_req->num_mac_filters,
15101cf2b1a9SYuval Mintz 			   p_resp->num_mac_filters,
15111cf2b1a9SYuval Mintz 			   p_req->num_vlan_filters,
15121cf2b1a9SYuval Mintz 			   p_resp->num_vlan_filters,
151308bc8f15SMintz, Yuval 			   p_req->num_mc_filters,
151408bc8f15SMintz, Yuval 			   p_resp->num_mc_filters,
151508bc8f15SMintz, Yuval 			   p_req->num_cids, p_resp->num_cids);
1516a044df83SYuval Mintz 
1517a044df83SYuval Mintz 		/* Some legacy OSes are incapable of correctly handling this
1518a044df83SYuval Mintz 		 * failure.
1519a044df83SYuval Mintz 		 */
1520a044df83SYuval Mintz 		if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1521a044df83SYuval Mintz 		     ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
1522a044df83SYuval Mintz 		    (p_vf->acquire.vfdev_info.os_type ==
1523a044df83SYuval Mintz 		     VFPF_ACQUIRE_OS_WINDOWS))
1524a044df83SYuval Mintz 			return PFVF_STATUS_SUCCESS;
1525a044df83SYuval Mintz 
15261cf2b1a9SYuval Mintz 		return PFVF_STATUS_NO_RESOURCE;
15271cf2b1a9SYuval Mintz 	}
15281cf2b1a9SYuval Mintz 
15291cf2b1a9SYuval Mintz 	return PFVF_STATUS_SUCCESS;
15301cf2b1a9SYuval Mintz }
15311cf2b1a9SYuval Mintz 
15321cf2b1a9SYuval Mintz static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
15331cf2b1a9SYuval Mintz 					 struct pfvf_stats_info *p_stats)
15341cf2b1a9SYuval Mintz {
15351cf2b1a9SYuval Mintz 	p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
15361cf2b1a9SYuval Mintz 				  offsetof(struct mstorm_vf_zone,
15371cf2b1a9SYuval Mintz 					   non_trigger.eth_queue_stat);
15381cf2b1a9SYuval Mintz 	p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
15391cf2b1a9SYuval Mintz 	p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
15401cf2b1a9SYuval Mintz 				  offsetof(struct ustorm_vf_zone,
15411cf2b1a9SYuval Mintz 					   non_trigger.eth_queue_stat);
15421cf2b1a9SYuval Mintz 	p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
15431cf2b1a9SYuval Mintz 	p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
15441cf2b1a9SYuval Mintz 				  offsetof(struct pstorm_vf_zone,
15451cf2b1a9SYuval Mintz 					   non_trigger.eth_queue_stat);
15461cf2b1a9SYuval Mintz 	p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
15471cf2b1a9SYuval Mintz 	p_stats->tstats.address = 0;
15481cf2b1a9SYuval Mintz 	p_stats->tstats.len = 0;
15491cf2b1a9SYuval Mintz }
15501cf2b1a9SYuval Mintz 
15511408cc1fSYuval Mintz static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
155237bff2b9SYuval Mintz 				   struct qed_ptt *p_ptt,
15531408cc1fSYuval Mintz 				   struct qed_vf_info *vf)
155437bff2b9SYuval Mintz {
15551408cc1fSYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
15561408cc1fSYuval Mintz 	struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
15571408cc1fSYuval Mintz 	struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
15581408cc1fSYuval Mintz 	struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
15591cf2b1a9SYuval Mintz 	u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
15601408cc1fSYuval Mintz 	struct pf_vf_resc *resc = &resp->resc;
15611fe614d1SYuval Mintz 	int rc;
15621fe614d1SYuval Mintz 
15631fe614d1SYuval Mintz 	memset(resp, 0, sizeof(*resp));
15641408cc1fSYuval Mintz 
156505fafbfbSYuval Mintz 	/* Write the PF version so that VF would know which version
156605fafbfbSYuval Mintz 	 * is supported - might be later overriden. This guarantees that
156705fafbfbSYuval Mintz 	 * VF could recognize legacy PF based on lack of versions in reply.
156805fafbfbSYuval Mintz 	 */
156905fafbfbSYuval Mintz 	pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
157005fafbfbSYuval Mintz 	pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
157105fafbfbSYuval Mintz 
1572a044df83SYuval Mintz 	if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
1573a044df83SYuval Mintz 		DP_VERBOSE(p_hwfn,
1574a044df83SYuval Mintz 			   QED_MSG_IOV,
1575a044df83SYuval Mintz 			   "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
1576a044df83SYuval Mintz 			   vf->abs_vf_id, vf->state);
1577a044df83SYuval Mintz 		goto out;
1578a044df83SYuval Mintz 	}
1579a044df83SYuval Mintz 
15801408cc1fSYuval Mintz 	/* Validate FW compatibility */
15811fe614d1SYuval Mintz 	if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
1582a044df83SYuval Mintz 		if (req->vfdev_info.capabilities &
1583a044df83SYuval Mintz 		    VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
1584a044df83SYuval Mintz 			struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
1585a044df83SYuval Mintz 
1586a044df83SYuval Mintz 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1587a044df83SYuval Mintz 				   "VF[%d] is pre-fastpath HSI\n",
1588a044df83SYuval Mintz 				   vf->abs_vf_id);
1589a044df83SYuval Mintz 			p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
1590a044df83SYuval Mintz 			p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
1591a044df83SYuval Mintz 		} else {
15921408cc1fSYuval Mintz 			DP_INFO(p_hwfn,
15931fe614d1SYuval Mintz 				"VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
15941408cc1fSYuval Mintz 				vf->abs_vf_id,
15951fe614d1SYuval Mintz 				req->vfdev_info.eth_fp_hsi_major,
15961fe614d1SYuval Mintz 				req->vfdev_info.eth_fp_hsi_minor,
15971fe614d1SYuval Mintz 				ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
15981fe614d1SYuval Mintz 
15991408cc1fSYuval Mintz 			goto out;
16001408cc1fSYuval Mintz 		}
1601a044df83SYuval Mintz 	}
16021408cc1fSYuval Mintz 
16031408cc1fSYuval Mintz 	/* On 100g PFs, prevent old VFs from loading */
16041408cc1fSYuval Mintz 	if ((p_hwfn->cdev->num_hwfns > 1) &&
16051408cc1fSYuval Mintz 	    !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
16061408cc1fSYuval Mintz 		DP_INFO(p_hwfn,
16071408cc1fSYuval Mintz 			"VF[%d] is running an old driver that doesn't support 100g\n",
16081408cc1fSYuval Mintz 			vf->abs_vf_id);
16091408cc1fSYuval Mintz 		goto out;
16101408cc1fSYuval Mintz 	}
16111408cc1fSYuval Mintz 
16121fe614d1SYuval Mintz 	/* Store the acquire message */
16131fe614d1SYuval Mintz 	memcpy(&vf->acquire, req, sizeof(vf->acquire));
16141408cc1fSYuval Mintz 
16151408cc1fSYuval Mintz 	vf->opaque_fid = req->vfdev_info.opaque_fid;
16161408cc1fSYuval Mintz 
16171408cc1fSYuval Mintz 	vf->vf_bulletin = req->bulletin_addr;
16181408cc1fSYuval Mintz 	vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
16191408cc1fSYuval Mintz 			    vf->bulletin.size : req->bulletin_size;
16201408cc1fSYuval Mintz 
16211408cc1fSYuval Mintz 	/* fill in pfdev info */
16221408cc1fSYuval Mintz 	pfdev_info->chip_num = p_hwfn->cdev->chip_num;
16231408cc1fSYuval Mintz 	pfdev_info->db_size = 0;
16241408cc1fSYuval Mintz 	pfdev_info->indices_per_sb = PIS_PER_SB;
16251408cc1fSYuval Mintz 
16261408cc1fSYuval Mintz 	pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
16271408cc1fSYuval Mintz 				   PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
16281408cc1fSYuval Mintz 	if (p_hwfn->cdev->num_hwfns > 1)
16291408cc1fSYuval Mintz 		pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
16301408cc1fSYuval Mintz 
163108bc8f15SMintz, Yuval 	/* Share our ability to use multiple queue-ids only with VFs
163208bc8f15SMintz, Yuval 	 * that request it.
163308bc8f15SMintz, Yuval 	 */
163408bc8f15SMintz, Yuval 	if (req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_QUEUE_QIDS)
163508bc8f15SMintz, Yuval 		pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_QUEUE_QIDS;
163608bc8f15SMintz, Yuval 
16371a850bfcSMintz, Yuval 	/* Share the sizes of the bars with VF */
16381a850bfcSMintz, Yuval 	resp->pfdev_info.bar_size = qed_iov_vf_db_bar_size(p_hwfn, p_ptt);
16391a850bfcSMintz, Yuval 
16401cf2b1a9SYuval Mintz 	qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
16411408cc1fSYuval Mintz 
16421408cc1fSYuval Mintz 	memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
16431408cc1fSYuval Mintz 
16441408cc1fSYuval Mintz 	pfdev_info->fw_major = FW_MAJOR_VERSION;
16451408cc1fSYuval Mintz 	pfdev_info->fw_minor = FW_MINOR_VERSION;
16461408cc1fSYuval Mintz 	pfdev_info->fw_rev = FW_REVISION_VERSION;
16471408cc1fSYuval Mintz 	pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
1648a044df83SYuval Mintz 
1649a044df83SYuval Mintz 	/* Incorrect when legacy, but doesn't matter as legacy isn't reading
1650a044df83SYuval Mintz 	 * this field.
1651a044df83SYuval Mintz 	 */
16521a635e48SYuval Mintz 	pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
16531fe614d1SYuval Mintz 					 req->vfdev_info.eth_fp_hsi_minor);
16541408cc1fSYuval Mintz 	pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
16551408cc1fSYuval Mintz 	qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
16561408cc1fSYuval Mintz 
16571408cc1fSYuval Mintz 	pfdev_info->dev_type = p_hwfn->cdev->type;
16581408cc1fSYuval Mintz 	pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
16591408cc1fSYuval Mintz 
16601cf2b1a9SYuval Mintz 	/* Fill resources available to VF; Make sure there are enough to
16611cf2b1a9SYuval Mintz 	 * satisfy the VF's request.
16621408cc1fSYuval Mintz 	 */
16631cf2b1a9SYuval Mintz 	vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
16641cf2b1a9SYuval Mintz 						  &req->resc_request, resc);
16651cf2b1a9SYuval Mintz 	if (vfpf_status != PFVF_STATUS_SUCCESS)
16661cf2b1a9SYuval Mintz 		goto out;
16671408cc1fSYuval Mintz 
16681fe614d1SYuval Mintz 	/* Start the VF in FW */
16691fe614d1SYuval Mintz 	rc = qed_sp_vf_start(p_hwfn, vf);
16701fe614d1SYuval Mintz 	if (rc) {
16711fe614d1SYuval Mintz 		DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
16721fe614d1SYuval Mintz 		vfpf_status = PFVF_STATUS_FAILURE;
16731fe614d1SYuval Mintz 		goto out;
16741fe614d1SYuval Mintz 	}
16751fe614d1SYuval Mintz 
16761408cc1fSYuval Mintz 	/* Fill agreed size of bulletin board in response */
16771408cc1fSYuval Mintz 	resp->bulletin_size = vf->bulletin.size;
167836558c3dSYuval Mintz 	qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
16791408cc1fSYuval Mintz 
16801408cc1fSYuval Mintz 	DP_VERBOSE(p_hwfn,
16811408cc1fSYuval Mintz 		   QED_MSG_IOV,
16821408cc1fSYuval Mintz 		   "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
16831408cc1fSYuval Mintz 		   "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
16841408cc1fSYuval Mintz 		   vf->abs_vf_id,
16851408cc1fSYuval Mintz 		   resp->pfdev_info.chip_num,
16861408cc1fSYuval Mintz 		   resp->pfdev_info.db_size,
16871408cc1fSYuval Mintz 		   resp->pfdev_info.indices_per_sb,
16881408cc1fSYuval Mintz 		   resp->pfdev_info.capabilities,
16891408cc1fSYuval Mintz 		   resc->num_rxqs,
16901408cc1fSYuval Mintz 		   resc->num_txqs,
16911408cc1fSYuval Mintz 		   resc->num_sbs,
16921408cc1fSYuval Mintz 		   resc->num_mac_filters,
16931408cc1fSYuval Mintz 		   resc->num_vlan_filters);
16941408cc1fSYuval Mintz 	vf->state = VF_ACQUIRED;
16951408cc1fSYuval Mintz 
16961408cc1fSYuval Mintz 	/* Prepare Response */
16971408cc1fSYuval Mintz out:
16981408cc1fSYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
16991408cc1fSYuval Mintz 			     sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
170037bff2b9SYuval Mintz }
170137bff2b9SYuval Mintz 
17026ddc7608SYuval Mintz static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
17036ddc7608SYuval Mintz 				  struct qed_vf_info *p_vf, bool val)
17046ddc7608SYuval Mintz {
17056ddc7608SYuval Mintz 	struct qed_sp_vport_update_params params;
17066ddc7608SYuval Mintz 	int rc;
17076ddc7608SYuval Mintz 
17086ddc7608SYuval Mintz 	if (val == p_vf->spoof_chk) {
17096ddc7608SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
17106ddc7608SYuval Mintz 			   "Spoofchk value[%d] is already configured\n", val);
17116ddc7608SYuval Mintz 		return 0;
17126ddc7608SYuval Mintz 	}
17136ddc7608SYuval Mintz 
17146ddc7608SYuval Mintz 	memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
17156ddc7608SYuval Mintz 	params.opaque_fid = p_vf->opaque_fid;
17166ddc7608SYuval Mintz 	params.vport_id = p_vf->vport_id;
17176ddc7608SYuval Mintz 	params.update_anti_spoofing_en_flg = 1;
17186ddc7608SYuval Mintz 	params.anti_spoofing_en = val;
17196ddc7608SYuval Mintz 
17206ddc7608SYuval Mintz 	rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
1721cb1fa088SYuval Mintz 	if (!rc) {
17226ddc7608SYuval Mintz 		p_vf->spoof_chk = val;
17236ddc7608SYuval Mintz 		p_vf->req_spoofchk_val = p_vf->spoof_chk;
17246ddc7608SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
17256ddc7608SYuval Mintz 			   "Spoofchk val[%d] configured\n", val);
17266ddc7608SYuval Mintz 	} else {
17276ddc7608SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
17286ddc7608SYuval Mintz 			   "Spoofchk configuration[val:%d] failed for VF[%d]\n",
17296ddc7608SYuval Mintz 			   val, p_vf->relative_vf_id);
17306ddc7608SYuval Mintz 	}
17316ddc7608SYuval Mintz 
17326ddc7608SYuval Mintz 	return rc;
17336ddc7608SYuval Mintz }
17346ddc7608SYuval Mintz 
173508feecd7SYuval Mintz static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
173608feecd7SYuval Mintz 					    struct qed_vf_info *p_vf)
173708feecd7SYuval Mintz {
173808feecd7SYuval Mintz 	struct qed_filter_ucast filter;
173908feecd7SYuval Mintz 	int rc = 0;
174008feecd7SYuval Mintz 	int i;
174108feecd7SYuval Mintz 
174208feecd7SYuval Mintz 	memset(&filter, 0, sizeof(filter));
174308feecd7SYuval Mintz 	filter.is_rx_filter = 1;
174408feecd7SYuval Mintz 	filter.is_tx_filter = 1;
174508feecd7SYuval Mintz 	filter.vport_to_add_to = p_vf->vport_id;
174608feecd7SYuval Mintz 	filter.opcode = QED_FILTER_ADD;
174708feecd7SYuval Mintz 
174808feecd7SYuval Mintz 	/* Reconfigure vlans */
174908feecd7SYuval Mintz 	for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
175008feecd7SYuval Mintz 		if (!p_vf->shadow_config.vlans[i].used)
175108feecd7SYuval Mintz 			continue;
175208feecd7SYuval Mintz 
175308feecd7SYuval Mintz 		filter.type = QED_FILTER_VLAN;
175408feecd7SYuval Mintz 		filter.vlan = p_vf->shadow_config.vlans[i].vid;
17551a635e48SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
175608feecd7SYuval Mintz 			   "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
175708feecd7SYuval Mintz 			   filter.vlan, p_vf->relative_vf_id);
17581a635e48SYuval Mintz 		rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
17591a635e48SYuval Mintz 					     &filter, QED_SPQ_MODE_CB, NULL);
176008feecd7SYuval Mintz 		if (rc) {
176108feecd7SYuval Mintz 			DP_NOTICE(p_hwfn,
176208feecd7SYuval Mintz 				  "Failed to configure VLAN [%04x] to VF [%04x]\n",
176308feecd7SYuval Mintz 				  filter.vlan, p_vf->relative_vf_id);
176408feecd7SYuval Mintz 			break;
176508feecd7SYuval Mintz 		}
176608feecd7SYuval Mintz 	}
176708feecd7SYuval Mintz 
176808feecd7SYuval Mintz 	return rc;
176908feecd7SYuval Mintz }
177008feecd7SYuval Mintz 
177108feecd7SYuval Mintz static int
177208feecd7SYuval Mintz qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
177308feecd7SYuval Mintz 				   struct qed_vf_info *p_vf, u64 events)
177408feecd7SYuval Mintz {
177508feecd7SYuval Mintz 	int rc = 0;
177608feecd7SYuval Mintz 
17771a635e48SYuval Mintz 	if ((events & BIT(VLAN_ADDR_FORCED)) &&
177808feecd7SYuval Mintz 	    !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
177908feecd7SYuval Mintz 		rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
178008feecd7SYuval Mintz 
178108feecd7SYuval Mintz 	return rc;
178208feecd7SYuval Mintz }
178308feecd7SYuval Mintz 
178408feecd7SYuval Mintz static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
178508feecd7SYuval Mintz 					  struct qed_vf_info *p_vf, u64 events)
178608feecd7SYuval Mintz {
178708feecd7SYuval Mintz 	int rc = 0;
178808feecd7SYuval Mintz 	struct qed_filter_ucast filter;
178908feecd7SYuval Mintz 
179008feecd7SYuval Mintz 	if (!p_vf->vport_instance)
179108feecd7SYuval Mintz 		return -EINVAL;
179208feecd7SYuval Mintz 
17931a635e48SYuval Mintz 	if (events & BIT(MAC_ADDR_FORCED)) {
1794eff16960SYuval Mintz 		/* Since there's no way [currently] of removing the MAC,
1795eff16960SYuval Mintz 		 * we can always assume this means we need to force it.
1796eff16960SYuval Mintz 		 */
1797eff16960SYuval Mintz 		memset(&filter, 0, sizeof(filter));
1798eff16960SYuval Mintz 		filter.type = QED_FILTER_MAC;
1799eff16960SYuval Mintz 		filter.opcode = QED_FILTER_REPLACE;
1800eff16960SYuval Mintz 		filter.is_rx_filter = 1;
1801eff16960SYuval Mintz 		filter.is_tx_filter = 1;
1802eff16960SYuval Mintz 		filter.vport_to_add_to = p_vf->vport_id;
1803eff16960SYuval Mintz 		ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1804eff16960SYuval Mintz 
1805eff16960SYuval Mintz 		rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1806eff16960SYuval Mintz 					     &filter, QED_SPQ_MODE_CB, NULL);
1807eff16960SYuval Mintz 		if (rc) {
1808eff16960SYuval Mintz 			DP_NOTICE(p_hwfn,
1809eff16960SYuval Mintz 				  "PF failed to configure MAC for VF\n");
1810eff16960SYuval Mintz 			return rc;
1811eff16960SYuval Mintz 		}
1812eff16960SYuval Mintz 
1813eff16960SYuval Mintz 		p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1814eff16960SYuval Mintz 	}
1815eff16960SYuval Mintz 
18161a635e48SYuval Mintz 	if (events & BIT(VLAN_ADDR_FORCED)) {
181708feecd7SYuval Mintz 		struct qed_sp_vport_update_params vport_update;
181808feecd7SYuval Mintz 		u8 removal;
181908feecd7SYuval Mintz 		int i;
182008feecd7SYuval Mintz 
182108feecd7SYuval Mintz 		memset(&filter, 0, sizeof(filter));
182208feecd7SYuval Mintz 		filter.type = QED_FILTER_VLAN;
182308feecd7SYuval Mintz 		filter.is_rx_filter = 1;
182408feecd7SYuval Mintz 		filter.is_tx_filter = 1;
182508feecd7SYuval Mintz 		filter.vport_to_add_to = p_vf->vport_id;
182608feecd7SYuval Mintz 		filter.vlan = p_vf->bulletin.p_virt->pvid;
182708feecd7SYuval Mintz 		filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
182808feecd7SYuval Mintz 					      QED_FILTER_FLUSH;
182908feecd7SYuval Mintz 
183008feecd7SYuval Mintz 		/* Send the ramrod */
183108feecd7SYuval Mintz 		rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
183208feecd7SYuval Mintz 					     &filter, QED_SPQ_MODE_CB, NULL);
183308feecd7SYuval Mintz 		if (rc) {
183408feecd7SYuval Mintz 			DP_NOTICE(p_hwfn,
183508feecd7SYuval Mintz 				  "PF failed to configure VLAN for VF\n");
183608feecd7SYuval Mintz 			return rc;
183708feecd7SYuval Mintz 		}
183808feecd7SYuval Mintz 
183908feecd7SYuval Mintz 		/* Update the default-vlan & silent vlan stripping */
184008feecd7SYuval Mintz 		memset(&vport_update, 0, sizeof(vport_update));
184108feecd7SYuval Mintz 		vport_update.opaque_fid = p_vf->opaque_fid;
184208feecd7SYuval Mintz 		vport_update.vport_id = p_vf->vport_id;
184308feecd7SYuval Mintz 		vport_update.update_default_vlan_enable_flg = 1;
184408feecd7SYuval Mintz 		vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
184508feecd7SYuval Mintz 		vport_update.update_default_vlan_flg = 1;
184608feecd7SYuval Mintz 		vport_update.default_vlan = filter.vlan;
184708feecd7SYuval Mintz 
184808feecd7SYuval Mintz 		vport_update.update_inner_vlan_removal_flg = 1;
184908feecd7SYuval Mintz 		removal = filter.vlan ? 1
185008feecd7SYuval Mintz 				      : p_vf->shadow_config.inner_vlan_removal;
185108feecd7SYuval Mintz 		vport_update.inner_vlan_removal_flg = removal;
185208feecd7SYuval Mintz 		vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
185308feecd7SYuval Mintz 		rc = qed_sp_vport_update(p_hwfn,
185408feecd7SYuval Mintz 					 &vport_update,
185508feecd7SYuval Mintz 					 QED_SPQ_MODE_EBLOCK, NULL);
185608feecd7SYuval Mintz 		if (rc) {
185708feecd7SYuval Mintz 			DP_NOTICE(p_hwfn,
185808feecd7SYuval Mintz 				  "PF failed to configure VF vport for vlan\n");
185908feecd7SYuval Mintz 			return rc;
186008feecd7SYuval Mintz 		}
186108feecd7SYuval Mintz 
186208feecd7SYuval Mintz 		/* Update all the Rx queues */
186308feecd7SYuval Mintz 		for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1864007bc371SMintz, Yuval 			struct qed_vf_queue *p_queue = &p_vf->vf_queues[i];
1865007bc371SMintz, Yuval 			struct qed_queue_cid *p_cid = NULL;
186608feecd7SYuval Mintz 
1867007bc371SMintz, Yuval 			/* There can be at most 1 Rx queue on qzone. Find it */
1868007bc371SMintz, Yuval 			p_cid = qed_iov_get_vf_rx_queue_cid(p_queue);
18693da7a37aSMintz, Yuval 			if (!p_cid)
187008feecd7SYuval Mintz 				continue;
187108feecd7SYuval Mintz 
18723da7a37aSMintz, Yuval 			rc = qed_sp_eth_rx_queues_update(p_hwfn,
18733da7a37aSMintz, Yuval 							 (void **)&p_cid,
187408feecd7SYuval Mintz 							 1, 0, 1,
187508feecd7SYuval Mintz 							 QED_SPQ_MODE_EBLOCK,
187608feecd7SYuval Mintz 							 NULL);
187708feecd7SYuval Mintz 			if (rc) {
187808feecd7SYuval Mintz 				DP_NOTICE(p_hwfn,
187908feecd7SYuval Mintz 					  "Failed to send Rx update fo queue[0x%04x]\n",
18803da7a37aSMintz, Yuval 					  p_cid->rel.queue_id);
188108feecd7SYuval Mintz 				return rc;
188208feecd7SYuval Mintz 			}
188308feecd7SYuval Mintz 		}
188408feecd7SYuval Mintz 
188508feecd7SYuval Mintz 		if (filter.vlan)
188608feecd7SYuval Mintz 			p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
188708feecd7SYuval Mintz 		else
18881a635e48SYuval Mintz 			p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
188908feecd7SYuval Mintz 	}
189008feecd7SYuval Mintz 
189108feecd7SYuval Mintz 	/* If forced features are terminated, we need to configure the shadow
189208feecd7SYuval Mintz 	 * configuration back again.
189308feecd7SYuval Mintz 	 */
189408feecd7SYuval Mintz 	if (events)
189508feecd7SYuval Mintz 		qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
189608feecd7SYuval Mintz 
189708feecd7SYuval Mintz 	return rc;
189808feecd7SYuval Mintz }
189908feecd7SYuval Mintz 
1900dacd88d6SYuval Mintz static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1901dacd88d6SYuval Mintz 				       struct qed_ptt *p_ptt,
1902dacd88d6SYuval Mintz 				       struct qed_vf_info *vf)
1903dacd88d6SYuval Mintz {
1904dacd88d6SYuval Mintz 	struct qed_sp_vport_start_params params = { 0 };
1905dacd88d6SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1906dacd88d6SYuval Mintz 	struct vfpf_vport_start_tlv *start;
1907dacd88d6SYuval Mintz 	u8 status = PFVF_STATUS_SUCCESS;
1908dacd88d6SYuval Mintz 	struct qed_vf_info *vf_info;
190908feecd7SYuval Mintz 	u64 *p_bitmap;
1910dacd88d6SYuval Mintz 	int sb_id;
1911dacd88d6SYuval Mintz 	int rc;
1912dacd88d6SYuval Mintz 
1913dacd88d6SYuval Mintz 	vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1914dacd88d6SYuval Mintz 	if (!vf_info) {
1915dacd88d6SYuval Mintz 		DP_NOTICE(p_hwfn->cdev,
1916dacd88d6SYuval Mintz 			  "Failed to get VF info, invalid vfid [%d]\n",
1917dacd88d6SYuval Mintz 			  vf->relative_vf_id);
1918dacd88d6SYuval Mintz 		return;
1919dacd88d6SYuval Mintz 	}
1920dacd88d6SYuval Mintz 
1921dacd88d6SYuval Mintz 	vf->state = VF_ENABLED;
1922dacd88d6SYuval Mintz 	start = &mbx->req_virt->start_vport;
1923dacd88d6SYuval Mintz 
1924b801b159SMintz, Yuval 	qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1925b801b159SMintz, Yuval 
1926dacd88d6SYuval Mintz 	/* Initialize Status block in CAU */
1927dacd88d6SYuval Mintz 	for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1928dacd88d6SYuval Mintz 		if (!start->sb_addr[sb_id]) {
1929dacd88d6SYuval Mintz 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1930dacd88d6SYuval Mintz 				   "VF[%d] did not fill the address of SB %d\n",
1931dacd88d6SYuval Mintz 				   vf->relative_vf_id, sb_id);
1932dacd88d6SYuval Mintz 			break;
1933dacd88d6SYuval Mintz 		}
1934dacd88d6SYuval Mintz 
1935dacd88d6SYuval Mintz 		qed_int_cau_conf_sb(p_hwfn, p_ptt,
1936dacd88d6SYuval Mintz 				    start->sb_addr[sb_id],
19371a635e48SYuval Mintz 				    vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
1938dacd88d6SYuval Mintz 	}
1939dacd88d6SYuval Mintz 
1940dacd88d6SYuval Mintz 	vf->mtu = start->mtu;
194108feecd7SYuval Mintz 	vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
194208feecd7SYuval Mintz 
194308feecd7SYuval Mintz 	/* Take into consideration configuration forced by hypervisor;
194408feecd7SYuval Mintz 	 * If none is configured, use the supplied VF values [for old
194508feecd7SYuval Mintz 	 * vfs that would still be fine, since they passed '0' as padding].
194608feecd7SYuval Mintz 	 */
194708feecd7SYuval Mintz 	p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
19481a635e48SYuval Mintz 	if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
194908feecd7SYuval Mintz 		u8 vf_req = start->only_untagged;
195008feecd7SYuval Mintz 
195108feecd7SYuval Mintz 		vf_info->bulletin.p_virt->default_only_untagged = vf_req;
195208feecd7SYuval Mintz 		*p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
195308feecd7SYuval Mintz 	}
1954dacd88d6SYuval Mintz 
1955dacd88d6SYuval Mintz 	params.tpa_mode = start->tpa_mode;
1956dacd88d6SYuval Mintz 	params.remove_inner_vlan = start->inner_vlan_removal;
1957831bfb0eSYuval Mintz 	params.tx_switching = true;
1958dacd88d6SYuval Mintz 
195908feecd7SYuval Mintz 	params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
1960dacd88d6SYuval Mintz 	params.drop_ttl0 = false;
1961dacd88d6SYuval Mintz 	params.concrete_fid = vf->concrete_fid;
1962dacd88d6SYuval Mintz 	params.opaque_fid = vf->opaque_fid;
1963dacd88d6SYuval Mintz 	params.vport_id = vf->vport_id;
1964dacd88d6SYuval Mintz 	params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1965dacd88d6SYuval Mintz 	params.mtu = vf->mtu;
196611a85d75SYuval Mintz 	params.check_mac = true;
1967dacd88d6SYuval Mintz 
1968dacd88d6SYuval Mintz 	rc = qed_sp_eth_vport_start(p_hwfn, &params);
19691a635e48SYuval Mintz 	if (rc) {
1970dacd88d6SYuval Mintz 		DP_ERR(p_hwfn,
1971dacd88d6SYuval Mintz 		       "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1972dacd88d6SYuval Mintz 		status = PFVF_STATUS_FAILURE;
1973dacd88d6SYuval Mintz 	} else {
1974dacd88d6SYuval Mintz 		vf->vport_instance++;
197508feecd7SYuval Mintz 
197608feecd7SYuval Mintz 		/* Force configuration if needed on the newly opened vport */
197708feecd7SYuval Mintz 		qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
19786ddc7608SYuval Mintz 
19796ddc7608SYuval Mintz 		__qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
1980dacd88d6SYuval Mintz 	}
1981dacd88d6SYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1982dacd88d6SYuval Mintz 			     sizeof(struct pfvf_def_resp_tlv), status);
1983dacd88d6SYuval Mintz }
1984dacd88d6SYuval Mintz 
1985dacd88d6SYuval Mintz static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1986dacd88d6SYuval Mintz 				      struct qed_ptt *p_ptt,
1987dacd88d6SYuval Mintz 				      struct qed_vf_info *vf)
1988dacd88d6SYuval Mintz {
1989dacd88d6SYuval Mintz 	u8 status = PFVF_STATUS_SUCCESS;
1990dacd88d6SYuval Mintz 	int rc;
1991dacd88d6SYuval Mintz 
1992dacd88d6SYuval Mintz 	vf->vport_instance--;
19936ddc7608SYuval Mintz 	vf->spoof_chk = false;
1994dacd88d6SYuval Mintz 
1995f109c240SMintz, Yuval 	if ((qed_iov_validate_active_rxq(p_hwfn, vf)) ||
1996f109c240SMintz, Yuval 	    (qed_iov_validate_active_txq(p_hwfn, vf))) {
1997f109c240SMintz, Yuval 		vf->b_malicious = true;
1998f109c240SMintz, Yuval 		DP_NOTICE(p_hwfn,
1999f109c240SMintz, Yuval 			  "VF [%02x] - considered malicious; Unable to stop RX/TX queuess\n",
2000f109c240SMintz, Yuval 			  vf->abs_vf_id);
2001f109c240SMintz, Yuval 		status = PFVF_STATUS_MALICIOUS;
2002f109c240SMintz, Yuval 		goto out;
2003f109c240SMintz, Yuval 	}
2004f109c240SMintz, Yuval 
2005dacd88d6SYuval Mintz 	rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
20061a635e48SYuval Mintz 	if (rc) {
2007dacd88d6SYuval Mintz 		DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
2008dacd88d6SYuval Mintz 		       rc);
2009dacd88d6SYuval Mintz 		status = PFVF_STATUS_FAILURE;
2010dacd88d6SYuval Mintz 	}
2011dacd88d6SYuval Mintz 
201208feecd7SYuval Mintz 	/* Forget the configuration on the vport */
201308feecd7SYuval Mintz 	vf->configured_features = 0;
201408feecd7SYuval Mintz 	memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
201508feecd7SYuval Mintz 
2016f109c240SMintz, Yuval out:
2017dacd88d6SYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
2018dacd88d6SYuval Mintz 			     sizeof(struct pfvf_def_resp_tlv), status);
2019dacd88d6SYuval Mintz }
2020dacd88d6SYuval Mintz 
2021dacd88d6SYuval Mintz static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
2022dacd88d6SYuval Mintz 					  struct qed_ptt *p_ptt,
2023a044df83SYuval Mintz 					  struct qed_vf_info *vf,
2024a044df83SYuval Mintz 					  u8 status, bool b_legacy)
2025dacd88d6SYuval Mintz {
2026dacd88d6SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2027dacd88d6SYuval Mintz 	struct pfvf_start_queue_resp_tlv *p_tlv;
2028dacd88d6SYuval Mintz 	struct vfpf_start_rxq_tlv *req;
2029a044df83SYuval Mintz 	u16 length;
2030dacd88d6SYuval Mintz 
2031dacd88d6SYuval Mintz 	mbx->offset = (u8 *)mbx->reply_virt;
2032dacd88d6SYuval Mintz 
2033a044df83SYuval Mintz 	/* Taking a bigger struct instead of adding a TLV to list was a
2034a044df83SYuval Mintz 	 * mistake, but one which we're now stuck with, as some older
2035a044df83SYuval Mintz 	 * clients assume the size of the previous response.
2036a044df83SYuval Mintz 	 */
2037a044df83SYuval Mintz 	if (!b_legacy)
2038a044df83SYuval Mintz 		length = sizeof(*p_tlv);
2039a044df83SYuval Mintz 	else
2040a044df83SYuval Mintz 		length = sizeof(struct pfvf_def_resp_tlv);
2041a044df83SYuval Mintz 
2042dacd88d6SYuval Mintz 	p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
2043a044df83SYuval Mintz 			    length);
2044dacd88d6SYuval Mintz 	qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2045dacd88d6SYuval Mintz 		    sizeof(struct channel_list_end_tlv));
2046dacd88d6SYuval Mintz 
2047dacd88d6SYuval Mintz 	/* Update the TLV with the response */
2048a044df83SYuval Mintz 	if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
2049dacd88d6SYuval Mintz 		req = &mbx->req_virt->start_rxq;
2050351a4dedSYuval Mintz 		p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
2051351a4dedSYuval Mintz 				offsetof(struct mstorm_vf_zone,
2052351a4dedSYuval Mintz 					 non_trigger.eth_rx_queue_producers) +
2053351a4dedSYuval Mintz 				sizeof(struct eth_rx_prod_data) * req->rx_qid;
2054dacd88d6SYuval Mintz 	}
2055dacd88d6SYuval Mintz 
2056a044df83SYuval Mintz 	qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2057dacd88d6SYuval Mintz }
2058dacd88d6SYuval Mintz 
2059bbe3f233SMintz, Yuval static u8 qed_iov_vf_mbx_qid(struct qed_hwfn *p_hwfn,
2060bbe3f233SMintz, Yuval 			     struct qed_vf_info *p_vf, bool b_is_tx)
2061bbe3f233SMintz, Yuval {
206208bc8f15SMintz, Yuval 	struct qed_iov_vf_mbx *p_mbx = &p_vf->vf_mbx;
206308bc8f15SMintz, Yuval 	struct vfpf_qid_tlv *p_qid_tlv;
206408bc8f15SMintz, Yuval 
206508bc8f15SMintz, Yuval 	/* Search for the qid if the VF published its going to provide it */
206608bc8f15SMintz, Yuval 	if (!(p_vf->acquire.vfdev_info.capabilities &
206708bc8f15SMintz, Yuval 	      VFPF_ACQUIRE_CAP_QUEUE_QIDS)) {
2068bbe3f233SMintz, Yuval 		if (b_is_tx)
2069bbe3f233SMintz, Yuval 			return QED_IOV_LEGACY_QID_TX;
2070bbe3f233SMintz, Yuval 		else
2071bbe3f233SMintz, Yuval 			return QED_IOV_LEGACY_QID_RX;
2072bbe3f233SMintz, Yuval 	}
2073bbe3f233SMintz, Yuval 
207408bc8f15SMintz, Yuval 	p_qid_tlv = (struct vfpf_qid_tlv *)
207508bc8f15SMintz, Yuval 		    qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
207608bc8f15SMintz, Yuval 					     CHANNEL_TLV_QID);
207708bc8f15SMintz, Yuval 	if (!p_qid_tlv) {
207808bc8f15SMintz, Yuval 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
207908bc8f15SMintz, Yuval 			   "VF[%2x]: Failed to provide qid\n",
208008bc8f15SMintz, Yuval 			   p_vf->relative_vf_id);
208108bc8f15SMintz, Yuval 
208208bc8f15SMintz, Yuval 		return QED_IOV_QID_INVALID;
208308bc8f15SMintz, Yuval 	}
208408bc8f15SMintz, Yuval 
208508bc8f15SMintz, Yuval 	if (p_qid_tlv->qid >= MAX_QUEUES_PER_QZONE) {
208608bc8f15SMintz, Yuval 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
208708bc8f15SMintz, Yuval 			   "VF[%02x]: Provided qid out-of-bounds %02x\n",
208808bc8f15SMintz, Yuval 			   p_vf->relative_vf_id, p_qid_tlv->qid);
208908bc8f15SMintz, Yuval 		return QED_IOV_QID_INVALID;
209008bc8f15SMintz, Yuval 	}
209108bc8f15SMintz, Yuval 
209208bc8f15SMintz, Yuval 	return p_qid_tlv->qid;
209308bc8f15SMintz, Yuval }
209408bc8f15SMintz, Yuval 
2095dacd88d6SYuval Mintz static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
2096dacd88d6SYuval Mintz 				     struct qed_ptt *p_ptt,
2097dacd88d6SYuval Mintz 				     struct qed_vf_info *vf)
2098dacd88d6SYuval Mintz {
2099dacd88d6SYuval Mintz 	struct qed_queue_start_common_params params;
21003946497aSMintz, Yuval 	struct qed_queue_cid_vf_params vf_params;
2101dacd88d6SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
210241086467SYuval Mintz 	u8 status = PFVF_STATUS_NO_RESOURCE;
21033b19f478SMintz, Yuval 	u8 qid_usage_idx, vf_legacy = 0;
2104dacd88d6SYuval Mintz 	struct vfpf_start_rxq_tlv *req;
2105007bc371SMintz, Yuval 	struct qed_vf_queue *p_queue;
2106007bc371SMintz, Yuval 	struct qed_queue_cid *p_cid;
2107f604b17dSMintz, Yuval 	struct qed_sb_info sb_dummy;
2108dacd88d6SYuval Mintz 	int rc;
2109dacd88d6SYuval Mintz 
2110dacd88d6SYuval Mintz 	req = &mbx->req_virt->start_rxq;
211141086467SYuval Mintz 
2112f109c240SMintz, Yuval 	if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid,
2113f109c240SMintz, Yuval 				  QED_IOV_VALIDATE_Q_DISABLE) ||
211441086467SYuval Mintz 	    !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
211541086467SYuval Mintz 		goto out;
211641086467SYuval Mintz 
2117bbe3f233SMintz, Yuval 	qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
211808bc8f15SMintz, Yuval 	if (qid_usage_idx == QED_IOV_QID_INVALID)
211908bc8f15SMintz, Yuval 		goto out;
212008bc8f15SMintz, Yuval 
21213da7a37aSMintz, Yuval 	p_queue = &vf->vf_queues[req->rx_qid];
212208bc8f15SMintz, Yuval 	if (p_queue->cids[qid_usage_idx].p_cid)
212308bc8f15SMintz, Yuval 		goto out;
21243da7a37aSMintz, Yuval 
21253b19f478SMintz, Yuval 	vf_legacy = qed_vf_calculate_legacy(vf);
21263946497aSMintz, Yuval 
2127bbe3f233SMintz, Yuval 	/* Acquire a new queue-cid */
21283da7a37aSMintz, Yuval 	memset(&params, 0, sizeof(params));
21293da7a37aSMintz, Yuval 	params.queue_id = p_queue->fw_rx_qid;
2130dacd88d6SYuval Mintz 	params.vport_id = vf->vport_id;
21313da7a37aSMintz, Yuval 	params.stats_id = vf->abs_vf_id + 0x10;
2132f604b17dSMintz, Yuval 	/* Since IGU index is passed via sb_info, construct a dummy one */
2133f604b17dSMintz, Yuval 	memset(&sb_dummy, 0, sizeof(sb_dummy));
2134f604b17dSMintz, Yuval 	sb_dummy.igu_sb_id = req->hw_sb;
2135f604b17dSMintz, Yuval 	params.p_sb = &sb_dummy;
2136dacd88d6SYuval Mintz 	params.sb_idx = req->sb_index;
2137dacd88d6SYuval Mintz 
21383946497aSMintz, Yuval 	memset(&vf_params, 0, sizeof(vf_params));
21393946497aSMintz, Yuval 	vf_params.vfid = vf->relative_vf_id;
21403946497aSMintz, Yuval 	vf_params.vf_qid = (u8)req->rx_qid;
21413b19f478SMintz, Yuval 	vf_params.vf_legacy = vf_legacy;
2142bbe3f233SMintz, Yuval 	vf_params.qid_usage_idx = qid_usage_idx;
2143007bc371SMintz, Yuval 	p_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid,
2144007bc371SMintz, Yuval 				     &params, true, &vf_params);
2145007bc371SMintz, Yuval 	if (!p_cid)
21463da7a37aSMintz, Yuval 		goto out;
21473da7a37aSMintz, Yuval 
2148a044df83SYuval Mintz 	/* Legacy VFs have their Producers in a different location, which they
2149a044df83SYuval Mintz 	 * calculate on their own and clean the producer prior to this.
2150a044df83SYuval Mintz 	 */
21513b19f478SMintz, Yuval 	if (!(vf_legacy & QED_QCID_LEGACY_VF_RX_PROD))
2152a044df83SYuval Mintz 		REG_WR(p_hwfn,
2153a044df83SYuval Mintz 		       GTT_BAR0_MAP_REG_MSDM_RAM +
2154a044df83SYuval Mintz 		       MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
2155a044df83SYuval Mintz 		       0);
2156a044df83SYuval Mintz 
2157007bc371SMintz, Yuval 	rc = qed_eth_rxq_start_ramrod(p_hwfn, p_cid,
2158dacd88d6SYuval Mintz 				      req->bd_max_bytes,
2159dacd88d6SYuval Mintz 				      req->rxq_addr,
21603da7a37aSMintz, Yuval 				      req->cqe_pbl_addr, req->cqe_pbl_size);
2161dacd88d6SYuval Mintz 	if (rc) {
2162dacd88d6SYuval Mintz 		status = PFVF_STATUS_FAILURE;
2163007bc371SMintz, Yuval 		qed_eth_queue_cid_release(p_hwfn, p_cid);
2164dacd88d6SYuval Mintz 	} else {
2165007bc371SMintz, Yuval 		p_queue->cids[qid_usage_idx].p_cid = p_cid;
2166007bc371SMintz, Yuval 		p_queue->cids[qid_usage_idx].b_is_tx = false;
216741086467SYuval Mintz 		status = PFVF_STATUS_SUCCESS;
2168dacd88d6SYuval Mintz 		vf->num_active_rxqs++;
2169dacd88d6SYuval Mintz 	}
2170dacd88d6SYuval Mintz 
217141086467SYuval Mintz out:
21723b19f478SMintz, Yuval 	qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status,
21733b19f478SMintz, Yuval 				      !!(vf_legacy &
21743b19f478SMintz, Yuval 					 QED_QCID_LEGACY_VF_RX_PROD));
2175dacd88d6SYuval Mintz }
2176dacd88d6SYuval Mintz 
2177eaf3c0c6SChopra, Manish static void
2178eaf3c0c6SChopra, Manish qed_iov_pf_update_tun_response(struct pfvf_update_tunn_param_tlv *p_resp,
2179eaf3c0c6SChopra, Manish 			       struct qed_tunnel_info *p_tun,
2180eaf3c0c6SChopra, Manish 			       u16 tunn_feature_mask)
2181eaf3c0c6SChopra, Manish {
2182eaf3c0c6SChopra, Manish 	p_resp->tunn_feature_mask = tunn_feature_mask;
2183eaf3c0c6SChopra, Manish 	p_resp->vxlan_mode = p_tun->vxlan.b_mode_enabled;
2184eaf3c0c6SChopra, Manish 	p_resp->l2geneve_mode = p_tun->l2_geneve.b_mode_enabled;
2185eaf3c0c6SChopra, Manish 	p_resp->ipgeneve_mode = p_tun->ip_geneve.b_mode_enabled;
2186eaf3c0c6SChopra, Manish 	p_resp->l2gre_mode = p_tun->l2_gre.b_mode_enabled;
2187eaf3c0c6SChopra, Manish 	p_resp->ipgre_mode = p_tun->l2_gre.b_mode_enabled;
2188eaf3c0c6SChopra, Manish 	p_resp->vxlan_clss = p_tun->vxlan.tun_cls;
2189eaf3c0c6SChopra, Manish 	p_resp->l2gre_clss = p_tun->l2_gre.tun_cls;
2190eaf3c0c6SChopra, Manish 	p_resp->ipgre_clss = p_tun->ip_gre.tun_cls;
2191eaf3c0c6SChopra, Manish 	p_resp->l2geneve_clss = p_tun->l2_geneve.tun_cls;
2192eaf3c0c6SChopra, Manish 	p_resp->ipgeneve_clss = p_tun->ip_geneve.tun_cls;
2193eaf3c0c6SChopra, Manish 	p_resp->geneve_udp_port = p_tun->geneve_port.port;
2194eaf3c0c6SChopra, Manish 	p_resp->vxlan_udp_port = p_tun->vxlan_port.port;
2195eaf3c0c6SChopra, Manish }
2196eaf3c0c6SChopra, Manish 
2197eaf3c0c6SChopra, Manish static void
2198eaf3c0c6SChopra, Manish __qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2199eaf3c0c6SChopra, Manish 			      struct qed_tunn_update_type *p_tun,
2200eaf3c0c6SChopra, Manish 			      enum qed_tunn_mode mask, u8 tun_cls)
2201eaf3c0c6SChopra, Manish {
2202eaf3c0c6SChopra, Manish 	if (p_req->tun_mode_update_mask & BIT(mask)) {
2203eaf3c0c6SChopra, Manish 		p_tun->b_update_mode = true;
2204eaf3c0c6SChopra, Manish 
2205eaf3c0c6SChopra, Manish 		if (p_req->tunn_mode & BIT(mask))
2206eaf3c0c6SChopra, Manish 			p_tun->b_mode_enabled = true;
2207eaf3c0c6SChopra, Manish 	}
2208eaf3c0c6SChopra, Manish 
2209eaf3c0c6SChopra, Manish 	p_tun->tun_cls = tun_cls;
2210eaf3c0c6SChopra, Manish }
2211eaf3c0c6SChopra, Manish 
2212eaf3c0c6SChopra, Manish static void
2213eaf3c0c6SChopra, Manish qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2214eaf3c0c6SChopra, Manish 			    struct qed_tunn_update_type *p_tun,
2215eaf3c0c6SChopra, Manish 			    struct qed_tunn_update_udp_port *p_port,
2216eaf3c0c6SChopra, Manish 			    enum qed_tunn_mode mask,
2217eaf3c0c6SChopra, Manish 			    u8 tun_cls, u8 update_port, u16 port)
2218eaf3c0c6SChopra, Manish {
2219eaf3c0c6SChopra, Manish 	if (update_port) {
2220eaf3c0c6SChopra, Manish 		p_port->b_update_port = true;
2221eaf3c0c6SChopra, Manish 		p_port->port = port;
2222eaf3c0c6SChopra, Manish 	}
2223eaf3c0c6SChopra, Manish 
2224eaf3c0c6SChopra, Manish 	__qed_iov_pf_update_tun_param(p_req, p_tun, mask, tun_cls);
2225eaf3c0c6SChopra, Manish }
2226eaf3c0c6SChopra, Manish 
2227eaf3c0c6SChopra, Manish static bool
2228eaf3c0c6SChopra, Manish qed_iov_pf_validate_tunn_param(struct vfpf_update_tunn_param_tlv *p_req)
2229eaf3c0c6SChopra, Manish {
2230eaf3c0c6SChopra, Manish 	bool b_update_requested = false;
2231eaf3c0c6SChopra, Manish 
2232eaf3c0c6SChopra, Manish 	if (p_req->tun_mode_update_mask || p_req->update_tun_cls ||
2233eaf3c0c6SChopra, Manish 	    p_req->update_geneve_port || p_req->update_vxlan_port)
2234eaf3c0c6SChopra, Manish 		b_update_requested = true;
2235eaf3c0c6SChopra, Manish 
2236eaf3c0c6SChopra, Manish 	return b_update_requested;
2237eaf3c0c6SChopra, Manish }
2238eaf3c0c6SChopra, Manish 
2239eaf3c0c6SChopra, Manish static void qed_pf_validate_tunn_mode(struct qed_tunn_update_type *tun, int *rc)
2240eaf3c0c6SChopra, Manish {
2241eaf3c0c6SChopra, Manish 	if (tun->b_update_mode && !tun->b_mode_enabled) {
2242eaf3c0c6SChopra, Manish 		tun->b_update_mode = false;
2243eaf3c0c6SChopra, Manish 		*rc = -EINVAL;
2244eaf3c0c6SChopra, Manish 	}
2245eaf3c0c6SChopra, Manish }
2246eaf3c0c6SChopra, Manish 
2247eaf3c0c6SChopra, Manish static int
2248eaf3c0c6SChopra, Manish qed_pf_validate_modify_tunn_config(struct qed_hwfn *p_hwfn,
2249eaf3c0c6SChopra, Manish 				   u16 *tun_features, bool *update,
2250eaf3c0c6SChopra, Manish 				   struct qed_tunnel_info *tun_src)
2251eaf3c0c6SChopra, Manish {
2252eaf3c0c6SChopra, Manish 	struct qed_eth_cb_ops *ops = p_hwfn->cdev->protocol_ops.eth;
2253eaf3c0c6SChopra, Manish 	struct qed_tunnel_info *tun = &p_hwfn->cdev->tunnel;
2254eaf3c0c6SChopra, Manish 	u16 bultn_vxlan_port, bultn_geneve_port;
2255eaf3c0c6SChopra, Manish 	void *cookie = p_hwfn->cdev->ops_cookie;
2256eaf3c0c6SChopra, Manish 	int i, rc = 0;
2257eaf3c0c6SChopra, Manish 
2258eaf3c0c6SChopra, Manish 	*tun_features = p_hwfn->cdev->tunn_feature_mask;
2259eaf3c0c6SChopra, Manish 	bultn_vxlan_port = tun->vxlan_port.port;
2260eaf3c0c6SChopra, Manish 	bultn_geneve_port = tun->geneve_port.port;
2261eaf3c0c6SChopra, Manish 	qed_pf_validate_tunn_mode(&tun_src->vxlan, &rc);
2262eaf3c0c6SChopra, Manish 	qed_pf_validate_tunn_mode(&tun_src->l2_geneve, &rc);
2263eaf3c0c6SChopra, Manish 	qed_pf_validate_tunn_mode(&tun_src->ip_geneve, &rc);
2264eaf3c0c6SChopra, Manish 	qed_pf_validate_tunn_mode(&tun_src->l2_gre, &rc);
2265eaf3c0c6SChopra, Manish 	qed_pf_validate_tunn_mode(&tun_src->ip_gre, &rc);
2266eaf3c0c6SChopra, Manish 
2267eaf3c0c6SChopra, Manish 	if ((tun_src->b_update_rx_cls || tun_src->b_update_tx_cls) &&
2268eaf3c0c6SChopra, Manish 	    (tun_src->vxlan.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2269eaf3c0c6SChopra, Manish 	     tun_src->l2_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2270eaf3c0c6SChopra, Manish 	     tun_src->ip_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2271eaf3c0c6SChopra, Manish 	     tun_src->l2_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2272eaf3c0c6SChopra, Manish 	     tun_src->ip_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN)) {
2273eaf3c0c6SChopra, Manish 		tun_src->b_update_rx_cls = false;
2274eaf3c0c6SChopra, Manish 		tun_src->b_update_tx_cls = false;
2275eaf3c0c6SChopra, Manish 		rc = -EINVAL;
2276eaf3c0c6SChopra, Manish 	}
2277eaf3c0c6SChopra, Manish 
2278eaf3c0c6SChopra, Manish 	if (tun_src->vxlan_port.b_update_port) {
2279eaf3c0c6SChopra, Manish 		if (tun_src->vxlan_port.port == tun->vxlan_port.port) {
2280eaf3c0c6SChopra, Manish 			tun_src->vxlan_port.b_update_port = false;
2281eaf3c0c6SChopra, Manish 		} else {
2282eaf3c0c6SChopra, Manish 			*update = true;
2283eaf3c0c6SChopra, Manish 			bultn_vxlan_port = tun_src->vxlan_port.port;
2284eaf3c0c6SChopra, Manish 		}
2285eaf3c0c6SChopra, Manish 	}
2286eaf3c0c6SChopra, Manish 
2287eaf3c0c6SChopra, Manish 	if (tun_src->geneve_port.b_update_port) {
2288eaf3c0c6SChopra, Manish 		if (tun_src->geneve_port.port == tun->geneve_port.port) {
2289eaf3c0c6SChopra, Manish 			tun_src->geneve_port.b_update_port = false;
2290eaf3c0c6SChopra, Manish 		} else {
2291eaf3c0c6SChopra, Manish 			*update = true;
2292eaf3c0c6SChopra, Manish 			bultn_geneve_port = tun_src->geneve_port.port;
2293eaf3c0c6SChopra, Manish 		}
2294eaf3c0c6SChopra, Manish 	}
2295eaf3c0c6SChopra, Manish 
2296eaf3c0c6SChopra, Manish 	qed_for_each_vf(p_hwfn, i) {
2297eaf3c0c6SChopra, Manish 		qed_iov_bulletin_set_udp_ports(p_hwfn, i, bultn_vxlan_port,
2298eaf3c0c6SChopra, Manish 					       bultn_geneve_port);
2299eaf3c0c6SChopra, Manish 	}
2300eaf3c0c6SChopra, Manish 
2301eaf3c0c6SChopra, Manish 	qed_schedule_iov(p_hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
2302eaf3c0c6SChopra, Manish 	ops->ports_update(cookie, bultn_vxlan_port, bultn_geneve_port);
2303eaf3c0c6SChopra, Manish 
2304eaf3c0c6SChopra, Manish 	return rc;
2305eaf3c0c6SChopra, Manish }
2306eaf3c0c6SChopra, Manish 
2307eaf3c0c6SChopra, Manish static void qed_iov_vf_mbx_update_tunn_param(struct qed_hwfn *p_hwfn,
2308eaf3c0c6SChopra, Manish 					     struct qed_ptt *p_ptt,
2309eaf3c0c6SChopra, Manish 					     struct qed_vf_info *p_vf)
2310eaf3c0c6SChopra, Manish {
2311eaf3c0c6SChopra, Manish 	struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
2312eaf3c0c6SChopra, Manish 	struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2313eaf3c0c6SChopra, Manish 	struct pfvf_update_tunn_param_tlv *p_resp;
2314eaf3c0c6SChopra, Manish 	struct vfpf_update_tunn_param_tlv *p_req;
2315eaf3c0c6SChopra, Manish 	u8 status = PFVF_STATUS_SUCCESS;
2316eaf3c0c6SChopra, Manish 	bool b_update_required = false;
2317eaf3c0c6SChopra, Manish 	struct qed_tunnel_info tunn;
2318eaf3c0c6SChopra, Manish 	u16 tunn_feature_mask = 0;
2319eaf3c0c6SChopra, Manish 	int i, rc = 0;
2320eaf3c0c6SChopra, Manish 
2321eaf3c0c6SChopra, Manish 	mbx->offset = (u8 *)mbx->reply_virt;
2322eaf3c0c6SChopra, Manish 
2323eaf3c0c6SChopra, Manish 	memset(&tunn, 0, sizeof(tunn));
2324eaf3c0c6SChopra, Manish 	p_req = &mbx->req_virt->tunn_param_update;
2325eaf3c0c6SChopra, Manish 
2326eaf3c0c6SChopra, Manish 	if (!qed_iov_pf_validate_tunn_param(p_req)) {
2327eaf3c0c6SChopra, Manish 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2328eaf3c0c6SChopra, Manish 			   "No tunnel update requested by VF\n");
2329eaf3c0c6SChopra, Manish 		status = PFVF_STATUS_FAILURE;
2330eaf3c0c6SChopra, Manish 		goto send_resp;
2331eaf3c0c6SChopra, Manish 	}
2332eaf3c0c6SChopra, Manish 
2333eaf3c0c6SChopra, Manish 	tunn.b_update_rx_cls = p_req->update_tun_cls;
2334eaf3c0c6SChopra, Manish 	tunn.b_update_tx_cls = p_req->update_tun_cls;
2335eaf3c0c6SChopra, Manish 
2336eaf3c0c6SChopra, Manish 	qed_iov_pf_update_tun_param(p_req, &tunn.vxlan, &tunn.vxlan_port,
2337eaf3c0c6SChopra, Manish 				    QED_MODE_VXLAN_TUNN, p_req->vxlan_clss,
2338eaf3c0c6SChopra, Manish 				    p_req->update_vxlan_port,
2339eaf3c0c6SChopra, Manish 				    p_req->vxlan_port);
2340eaf3c0c6SChopra, Manish 	qed_iov_pf_update_tun_param(p_req, &tunn.l2_geneve, &tunn.geneve_port,
2341eaf3c0c6SChopra, Manish 				    QED_MODE_L2GENEVE_TUNN,
2342eaf3c0c6SChopra, Manish 				    p_req->l2geneve_clss,
2343eaf3c0c6SChopra, Manish 				    p_req->update_geneve_port,
2344eaf3c0c6SChopra, Manish 				    p_req->geneve_port);
2345eaf3c0c6SChopra, Manish 	__qed_iov_pf_update_tun_param(p_req, &tunn.ip_geneve,
2346eaf3c0c6SChopra, Manish 				      QED_MODE_IPGENEVE_TUNN,
2347eaf3c0c6SChopra, Manish 				      p_req->ipgeneve_clss);
2348eaf3c0c6SChopra, Manish 	__qed_iov_pf_update_tun_param(p_req, &tunn.l2_gre,
2349eaf3c0c6SChopra, Manish 				      QED_MODE_L2GRE_TUNN, p_req->l2gre_clss);
2350eaf3c0c6SChopra, Manish 	__qed_iov_pf_update_tun_param(p_req, &tunn.ip_gre,
2351eaf3c0c6SChopra, Manish 				      QED_MODE_IPGRE_TUNN, p_req->ipgre_clss);
2352eaf3c0c6SChopra, Manish 
2353eaf3c0c6SChopra, Manish 	/* If PF modifies VF's req then it should
2354eaf3c0c6SChopra, Manish 	 * still return an error in case of partial configuration
2355eaf3c0c6SChopra, Manish 	 * or modified configuration as opposed to requested one.
2356eaf3c0c6SChopra, Manish 	 */
2357eaf3c0c6SChopra, Manish 	rc = qed_pf_validate_modify_tunn_config(p_hwfn, &tunn_feature_mask,
2358eaf3c0c6SChopra, Manish 						&b_update_required, &tunn);
2359eaf3c0c6SChopra, Manish 
2360eaf3c0c6SChopra, Manish 	if (rc)
2361eaf3c0c6SChopra, Manish 		status = PFVF_STATUS_FAILURE;
2362eaf3c0c6SChopra, Manish 
2363eaf3c0c6SChopra, Manish 	/* If QED client is willing to update anything ? */
2364eaf3c0c6SChopra, Manish 	if (b_update_required) {
2365eaf3c0c6SChopra, Manish 		u16 geneve_port;
2366eaf3c0c6SChopra, Manish 
23674f64675fSManish Chopra 		rc = qed_sp_pf_update_tunn_cfg(p_hwfn, p_ptt, &tunn,
2368eaf3c0c6SChopra, Manish 					       QED_SPQ_MODE_EBLOCK, NULL);
2369eaf3c0c6SChopra, Manish 		if (rc)
2370eaf3c0c6SChopra, Manish 			status = PFVF_STATUS_FAILURE;
2371eaf3c0c6SChopra, Manish 
2372eaf3c0c6SChopra, Manish 		geneve_port = p_tun->geneve_port.port;
2373eaf3c0c6SChopra, Manish 		qed_for_each_vf(p_hwfn, i) {
2374eaf3c0c6SChopra, Manish 			qed_iov_bulletin_set_udp_ports(p_hwfn, i,
2375eaf3c0c6SChopra, Manish 						       p_tun->vxlan_port.port,
2376eaf3c0c6SChopra, Manish 						       geneve_port);
2377eaf3c0c6SChopra, Manish 		}
2378eaf3c0c6SChopra, Manish 	}
2379eaf3c0c6SChopra, Manish 
2380eaf3c0c6SChopra, Manish send_resp:
2381eaf3c0c6SChopra, Manish 	p_resp = qed_add_tlv(p_hwfn, &mbx->offset,
2382eaf3c0c6SChopra, Manish 			     CHANNEL_TLV_UPDATE_TUNN_PARAM, sizeof(*p_resp));
2383eaf3c0c6SChopra, Manish 
2384eaf3c0c6SChopra, Manish 	qed_iov_pf_update_tun_response(p_resp, p_tun, tunn_feature_mask);
2385eaf3c0c6SChopra, Manish 	qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2386eaf3c0c6SChopra, Manish 		    sizeof(struct channel_list_end_tlv));
2387eaf3c0c6SChopra, Manish 
2388eaf3c0c6SChopra, Manish 	qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status);
2389eaf3c0c6SChopra, Manish }
2390eaf3c0c6SChopra, Manish 
23915040acf5SYuval Mintz static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
23925040acf5SYuval Mintz 					  struct qed_ptt *p_ptt,
2393007bc371SMintz, Yuval 					  struct qed_vf_info *p_vf,
2394007bc371SMintz, Yuval 					  u32 cid, u8 status)
23955040acf5SYuval Mintz {
23965040acf5SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
23975040acf5SYuval Mintz 	struct pfvf_start_queue_resp_tlv *p_tlv;
2398a044df83SYuval Mintz 	bool b_legacy = false;
2399a044df83SYuval Mintz 	u16 length;
24005040acf5SYuval Mintz 
24015040acf5SYuval Mintz 	mbx->offset = (u8 *)mbx->reply_virt;
24025040acf5SYuval Mintz 
2403a044df83SYuval Mintz 	/* Taking a bigger struct instead of adding a TLV to list was a
2404a044df83SYuval Mintz 	 * mistake, but one which we're now stuck with, as some older
2405a044df83SYuval Mintz 	 * clients assume the size of the previous response.
2406a044df83SYuval Mintz 	 */
2407a044df83SYuval Mintz 	if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
2408a044df83SYuval Mintz 	    ETH_HSI_VER_NO_PKT_LEN_TUNN)
2409a044df83SYuval Mintz 		b_legacy = true;
2410a044df83SYuval Mintz 
2411a044df83SYuval Mintz 	if (!b_legacy)
2412a044df83SYuval Mintz 		length = sizeof(*p_tlv);
2413a044df83SYuval Mintz 	else
2414a044df83SYuval Mintz 		length = sizeof(struct pfvf_def_resp_tlv);
2415a044df83SYuval Mintz 
24165040acf5SYuval Mintz 	p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
2417a044df83SYuval Mintz 			    length);
24185040acf5SYuval Mintz 	qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
24195040acf5SYuval Mintz 		    sizeof(struct channel_list_end_tlv));
24205040acf5SYuval Mintz 
24215040acf5SYuval Mintz 	/* Update the TLV with the response */
2422007bc371SMintz, Yuval 	if ((status == PFVF_STATUS_SUCCESS) && !b_legacy)
2423007bc371SMintz, Yuval 		p_tlv->offset = qed_db_addr_vf(cid, DQ_DEMS_LEGACY);
24245040acf5SYuval Mintz 
2425a044df83SYuval Mintz 	qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
24265040acf5SYuval Mintz }
24275040acf5SYuval Mintz 
2428dacd88d6SYuval Mintz static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
2429dacd88d6SYuval Mintz 				     struct qed_ptt *p_ptt,
2430dacd88d6SYuval Mintz 				     struct qed_vf_info *vf)
2431dacd88d6SYuval Mintz {
2432dacd88d6SYuval Mintz 	struct qed_queue_start_common_params params;
24333946497aSMintz, Yuval 	struct qed_queue_cid_vf_params vf_params;
2434dacd88d6SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
243541086467SYuval Mintz 	u8 status = PFVF_STATUS_NO_RESOURCE;
2436dacd88d6SYuval Mintz 	struct vfpf_start_txq_tlv *req;
2437007bc371SMintz, Yuval 	struct qed_vf_queue *p_queue;
2438007bc371SMintz, Yuval 	struct qed_queue_cid *p_cid;
2439f604b17dSMintz, Yuval 	struct qed_sb_info sb_dummy;
24403b19f478SMintz, Yuval 	u8 qid_usage_idx, vf_legacy;
2441007bc371SMintz, Yuval 	u32 cid = 0;
2442dacd88d6SYuval Mintz 	int rc;
24433da7a37aSMintz, Yuval 	u16 pq;
2444dacd88d6SYuval Mintz 
2445dacd88d6SYuval Mintz 	memset(&params, 0, sizeof(params));
2446dacd88d6SYuval Mintz 	req = &mbx->req_virt->start_txq;
244741086467SYuval Mintz 
2448f109c240SMintz, Yuval 	if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid,
244908bc8f15SMintz, Yuval 				  QED_IOV_VALIDATE_Q_NA) ||
245041086467SYuval Mintz 	    !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
245141086467SYuval Mintz 		goto out;
245241086467SYuval Mintz 
2453bbe3f233SMintz, Yuval 	qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, true);
245408bc8f15SMintz, Yuval 	if (qid_usage_idx == QED_IOV_QID_INVALID)
245508bc8f15SMintz, Yuval 		goto out;
245608bc8f15SMintz, Yuval 
24573da7a37aSMintz, Yuval 	p_queue = &vf->vf_queues[req->tx_qid];
245808bc8f15SMintz, Yuval 	if (p_queue->cids[qid_usage_idx].p_cid)
245908bc8f15SMintz, Yuval 		goto out;
24603da7a37aSMintz, Yuval 
24613b19f478SMintz, Yuval 	vf_legacy = qed_vf_calculate_legacy(vf);
24623946497aSMintz, Yuval 
2463bbe3f233SMintz, Yuval 	/* Acquire a new queue-cid */
24643da7a37aSMintz, Yuval 	params.queue_id = p_queue->fw_tx_qid;
2465dacd88d6SYuval Mintz 	params.vport_id = vf->vport_id;
24663da7a37aSMintz, Yuval 	params.stats_id = vf->abs_vf_id + 0x10;
2467f604b17dSMintz, Yuval 
2468f604b17dSMintz, Yuval 	/* Since IGU index is passed via sb_info, construct a dummy one */
2469f604b17dSMintz, Yuval 	memset(&sb_dummy, 0, sizeof(sb_dummy));
2470f604b17dSMintz, Yuval 	sb_dummy.igu_sb_id = req->hw_sb;
2471f604b17dSMintz, Yuval 	params.p_sb = &sb_dummy;
2472dacd88d6SYuval Mintz 	params.sb_idx = req->sb_index;
2473dacd88d6SYuval Mintz 
24743946497aSMintz, Yuval 	memset(&vf_params, 0, sizeof(vf_params));
24753946497aSMintz, Yuval 	vf_params.vfid = vf->relative_vf_id;
24763946497aSMintz, Yuval 	vf_params.vf_qid = (u8)req->tx_qid;
24773b19f478SMintz, Yuval 	vf_params.vf_legacy = vf_legacy;
2478bbe3f233SMintz, Yuval 	vf_params.qid_usage_idx = qid_usage_idx;
24793946497aSMintz, Yuval 
2480007bc371SMintz, Yuval 	p_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid,
2481007bc371SMintz, Yuval 				     &params, false, &vf_params);
2482007bc371SMintz, Yuval 	if (!p_cid)
24833da7a37aSMintz, Yuval 		goto out;
2484dacd88d6SYuval Mintz 
2485b5a9ee7cSAriel Elior 	pq = qed_get_cm_pq_idx_vf(p_hwfn, vf->relative_vf_id);
2486007bc371SMintz, Yuval 	rc = qed_eth_txq_start_ramrod(p_hwfn, p_cid,
24873da7a37aSMintz, Yuval 				      req->pbl_addr, req->pbl_size, pq);
248841086467SYuval Mintz 	if (rc) {
2489dacd88d6SYuval Mintz 		status = PFVF_STATUS_FAILURE;
2490007bc371SMintz, Yuval 		qed_eth_queue_cid_release(p_hwfn, p_cid);
249141086467SYuval Mintz 	} else {
249241086467SYuval Mintz 		status = PFVF_STATUS_SUCCESS;
2493007bc371SMintz, Yuval 		p_queue->cids[qid_usage_idx].p_cid = p_cid;
2494007bc371SMintz, Yuval 		p_queue->cids[qid_usage_idx].b_is_tx = true;
2495007bc371SMintz, Yuval 		cid = p_cid->cid;
249641086467SYuval Mintz 	}
2497dacd88d6SYuval Mintz 
249841086467SYuval Mintz out:
2499007bc371SMintz, Yuval 	qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, cid, status);
2500dacd88d6SYuval Mintz }
2501dacd88d6SYuval Mintz 
2502dacd88d6SYuval Mintz static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
2503dacd88d6SYuval Mintz 				struct qed_vf_info *vf,
2504007bc371SMintz, Yuval 				u16 rxq_id,
2505007bc371SMintz, Yuval 				u8 qid_usage_idx, bool cqe_completion)
2506dacd88d6SYuval Mintz {
2507007bc371SMintz, Yuval 	struct qed_vf_queue *p_queue;
2508dacd88d6SYuval Mintz 	int rc = 0;
2509dacd88d6SYuval Mintz 
251008bc8f15SMintz, Yuval 	if (!qed_iov_validate_rxq(p_hwfn, vf, rxq_id, QED_IOV_VALIDATE_Q_NA)) {
25114c4fa793SMintz, Yuval 		DP_VERBOSE(p_hwfn,
25124c4fa793SMintz, Yuval 			   QED_MSG_IOV,
251308bc8f15SMintz, Yuval 			   "VF[%d] Tried Closing Rx 0x%04x.%02x which is inactive\n",
251408bc8f15SMintz, Yuval 			   vf->relative_vf_id, rxq_id, qid_usage_idx);
2515dacd88d6SYuval Mintz 		return -EINVAL;
25164c4fa793SMintz, Yuval 	}
2517dacd88d6SYuval Mintz 
25184c4fa793SMintz, Yuval 	p_queue = &vf->vf_queues[rxq_id];
25193da7a37aSMintz, Yuval 
252008bc8f15SMintz, Yuval 	/* We've validated the index and the existence of the active RXQ -
252108bc8f15SMintz, Yuval 	 * now we need to make sure that it's using the correct qid.
252208bc8f15SMintz, Yuval 	 */
252308bc8f15SMintz, Yuval 	if (!p_queue->cids[qid_usage_idx].p_cid ||
252408bc8f15SMintz, Yuval 	    p_queue->cids[qid_usage_idx].b_is_tx) {
252508bc8f15SMintz, Yuval 		struct qed_queue_cid *p_cid;
252608bc8f15SMintz, Yuval 
252708bc8f15SMintz, Yuval 		p_cid = qed_iov_get_vf_rx_queue_cid(p_queue);
252808bc8f15SMintz, Yuval 		DP_VERBOSE(p_hwfn,
252908bc8f15SMintz, Yuval 			   QED_MSG_IOV,
253008bc8f15SMintz, Yuval 			   "VF[%d] - Tried Closing Rx 0x%04x.%02x, but Rx is at %04x.%02x\n",
253108bc8f15SMintz, Yuval 			   vf->relative_vf_id,
253208bc8f15SMintz, Yuval 			   rxq_id, qid_usage_idx, rxq_id, p_cid->qid_usage_idx);
253308bc8f15SMintz, Yuval 		return -EINVAL;
253408bc8f15SMintz, Yuval 	}
253508bc8f15SMintz, Yuval 
253608bc8f15SMintz, Yuval 	/* Now that we know we have a valid Rx-queue - close it */
25373da7a37aSMintz, Yuval 	rc = qed_eth_rx_queue_stop(p_hwfn,
2538007bc371SMintz, Yuval 				   p_queue->cids[qid_usage_idx].p_cid,
25393da7a37aSMintz, Yuval 				   false, cqe_completion);
2540dacd88d6SYuval Mintz 	if (rc)
2541dacd88d6SYuval Mintz 		return rc;
25423da7a37aSMintz, Yuval 
2543007bc371SMintz, Yuval 	p_queue->cids[qid_usage_idx].p_cid = NULL;
2544dacd88d6SYuval Mintz 	vf->num_active_rxqs--;
2545dacd88d6SYuval Mintz 
25464c4fa793SMintz, Yuval 	return 0;
2547dacd88d6SYuval Mintz }
2548dacd88d6SYuval Mintz 
2549dacd88d6SYuval Mintz static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
2550007bc371SMintz, Yuval 				struct qed_vf_info *vf,
2551007bc371SMintz, Yuval 				u16 txq_id, u8 qid_usage_idx)
2552dacd88d6SYuval Mintz {
2553007bc371SMintz, Yuval 	struct qed_vf_queue *p_queue;
25544c4fa793SMintz, Yuval 	int rc = 0;
2555dacd88d6SYuval Mintz 
255608bc8f15SMintz, Yuval 	if (!qed_iov_validate_txq(p_hwfn, vf, txq_id, QED_IOV_VALIDATE_Q_NA))
2557dacd88d6SYuval Mintz 		return -EINVAL;
2558dacd88d6SYuval Mintz 
25594c4fa793SMintz, Yuval 	p_queue = &vf->vf_queues[txq_id];
256008bc8f15SMintz, Yuval 	if (!p_queue->cids[qid_usage_idx].p_cid ||
256108bc8f15SMintz, Yuval 	    !p_queue->cids[qid_usage_idx].b_is_tx)
256208bc8f15SMintz, Yuval 		return -EINVAL;
2563dacd88d6SYuval Mintz 
2564007bc371SMintz, Yuval 	rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->cids[qid_usage_idx].p_cid);
2565dacd88d6SYuval Mintz 	if (rc)
2566dacd88d6SYuval Mintz 		return rc;
25673da7a37aSMintz, Yuval 
2568007bc371SMintz, Yuval 	p_queue->cids[qid_usage_idx].p_cid = NULL;
25694c4fa793SMintz, Yuval 	return 0;
2570dacd88d6SYuval Mintz }
2571dacd88d6SYuval Mintz 
2572dacd88d6SYuval Mintz static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
2573dacd88d6SYuval Mintz 				     struct qed_ptt *p_ptt,
2574dacd88d6SYuval Mintz 				     struct qed_vf_info *vf)
2575dacd88d6SYuval Mintz {
2576dacd88d6SYuval Mintz 	u16 length = sizeof(struct pfvf_def_resp_tlv);
2577dacd88d6SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
25784c4fa793SMintz, Yuval 	u8 status = PFVF_STATUS_FAILURE;
2579dacd88d6SYuval Mintz 	struct vfpf_stop_rxqs_tlv *req;
2580007bc371SMintz, Yuval 	u8 qid_usage_idx;
2581dacd88d6SYuval Mintz 	int rc;
2582dacd88d6SYuval Mintz 
25834c4fa793SMintz, Yuval 	/* There has never been an official driver that used this interface
25844c4fa793SMintz, Yuval 	 * for stopping multiple queues, and it is now considered deprecated.
25854c4fa793SMintz, Yuval 	 * Validate this isn't used here.
2586dacd88d6SYuval Mintz 	 */
2587dacd88d6SYuval Mintz 	req = &mbx->req_virt->stop_rxqs;
25884c4fa793SMintz, Yuval 	if (req->num_rxqs != 1) {
25894c4fa793SMintz, Yuval 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
25904c4fa793SMintz, Yuval 			   "Odd; VF[%d] tried stopping multiple Rx queues\n",
25914c4fa793SMintz, Yuval 			   vf->relative_vf_id);
25924c4fa793SMintz, Yuval 		status = PFVF_STATUS_NOT_SUPPORTED;
25934c4fa793SMintz, Yuval 		goto out;
25944c4fa793SMintz, Yuval 	}
2595dacd88d6SYuval Mintz 
2596007bc371SMintz, Yuval 	/* Find which qid-index is associated with the queue */
2597007bc371SMintz, Yuval 	qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
259808bc8f15SMintz, Yuval 	if (qid_usage_idx == QED_IOV_QID_INVALID)
259908bc8f15SMintz, Yuval 		goto out;
2600007bc371SMintz, Yuval 
26014c4fa793SMintz, Yuval 	rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
2602007bc371SMintz, Yuval 				  qid_usage_idx, req->cqe_completion);
26034c4fa793SMintz, Yuval 	if (!rc)
26044c4fa793SMintz, Yuval 		status = PFVF_STATUS_SUCCESS;
26054c4fa793SMintz, Yuval out:
2606dacd88d6SYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
2607dacd88d6SYuval Mintz 			     length, status);
2608dacd88d6SYuval Mintz }
2609dacd88d6SYuval Mintz 
2610dacd88d6SYuval Mintz static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
2611dacd88d6SYuval Mintz 				     struct qed_ptt *p_ptt,
2612dacd88d6SYuval Mintz 				     struct qed_vf_info *vf)
2613dacd88d6SYuval Mintz {
2614dacd88d6SYuval Mintz 	u16 length = sizeof(struct pfvf_def_resp_tlv);
2615dacd88d6SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
26164c4fa793SMintz, Yuval 	u8 status = PFVF_STATUS_FAILURE;
2617dacd88d6SYuval Mintz 	struct vfpf_stop_txqs_tlv *req;
2618007bc371SMintz, Yuval 	u8 qid_usage_idx;
2619dacd88d6SYuval Mintz 	int rc;
2620dacd88d6SYuval Mintz 
26214c4fa793SMintz, Yuval 	/* There has never been an official driver that used this interface
26224c4fa793SMintz, Yuval 	 * for stopping multiple queues, and it is now considered deprecated.
26234c4fa793SMintz, Yuval 	 * Validate this isn't used here.
2624dacd88d6SYuval Mintz 	 */
2625dacd88d6SYuval Mintz 	req = &mbx->req_virt->stop_txqs;
26264c4fa793SMintz, Yuval 	if (req->num_txqs != 1) {
26274c4fa793SMintz, Yuval 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
26284c4fa793SMintz, Yuval 			   "Odd; VF[%d] tried stopping multiple Tx queues\n",
26294c4fa793SMintz, Yuval 			   vf->relative_vf_id);
26304c4fa793SMintz, Yuval 		status = PFVF_STATUS_NOT_SUPPORTED;
26314c4fa793SMintz, Yuval 		goto out;
26324c4fa793SMintz, Yuval 	}
2633007bc371SMintz, Yuval 
2634007bc371SMintz, Yuval 	/* Find which qid-index is associated with the queue */
2635007bc371SMintz, Yuval 	qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, true);
263608bc8f15SMintz, Yuval 	if (qid_usage_idx == QED_IOV_QID_INVALID)
263708bc8f15SMintz, Yuval 		goto out;
2638007bc371SMintz, Yuval 
2639007bc371SMintz, Yuval 	rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, qid_usage_idx);
26404c4fa793SMintz, Yuval 	if (!rc)
26414c4fa793SMintz, Yuval 		status = PFVF_STATUS_SUCCESS;
2642dacd88d6SYuval Mintz 
26434c4fa793SMintz, Yuval out:
2644dacd88d6SYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
2645dacd88d6SYuval Mintz 			     length, status);
2646dacd88d6SYuval Mintz }
2647dacd88d6SYuval Mintz 
264817b235c1SYuval Mintz static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
264917b235c1SYuval Mintz 				       struct qed_ptt *p_ptt,
265017b235c1SYuval Mintz 				       struct qed_vf_info *vf)
265117b235c1SYuval Mintz {
26523da7a37aSMintz, Yuval 	struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
265317b235c1SYuval Mintz 	u16 length = sizeof(struct pfvf_def_resp_tlv);
265417b235c1SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
265517b235c1SYuval Mintz 	struct vfpf_update_rxq_tlv *req;
26563da7a37aSMintz, Yuval 	u8 status = PFVF_STATUS_FAILURE;
265717b235c1SYuval Mintz 	u8 complete_event_flg;
265817b235c1SYuval Mintz 	u8 complete_cqe_flg;
2659007bc371SMintz, Yuval 	u8 qid_usage_idx;
266017b235c1SYuval Mintz 	int rc;
266117b235c1SYuval Mintz 	u8 i;
266217b235c1SYuval Mintz 
266317b235c1SYuval Mintz 	req = &mbx->req_virt->update_rxq;
266417b235c1SYuval Mintz 	complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
266517b235c1SYuval Mintz 	complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
266617b235c1SYuval Mintz 
2667007bc371SMintz, Yuval 	qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
266808bc8f15SMintz, Yuval 	if (qid_usage_idx == QED_IOV_QID_INVALID)
26693da7a37aSMintz, Yuval 		goto out;
267008bc8f15SMintz, Yuval 
267108bc8f15SMintz, Yuval 	/* There shouldn't exist a VF that uses queue-qids yet uses this
267208bc8f15SMintz, Yuval 	 * API with multiple Rx queues. Validate this.
267308bc8f15SMintz, Yuval 	 */
267408bc8f15SMintz, Yuval 	if ((vf->acquire.vfdev_info.capabilities &
267508bc8f15SMintz, Yuval 	     VFPF_ACQUIRE_CAP_QUEUE_QIDS) && req->num_rxqs != 1) {
267608bc8f15SMintz, Yuval 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
267708bc8f15SMintz, Yuval 			   "VF[%d] supports QIDs but sends multiple queues\n",
267808bc8f15SMintz, Yuval 			   vf->relative_vf_id);
267908bc8f15SMintz, Yuval 		goto out;
268008bc8f15SMintz, Yuval 	}
268108bc8f15SMintz, Yuval 
268208bc8f15SMintz, Yuval 	/* Validate inputs - for the legacy case this is still true since
268308bc8f15SMintz, Yuval 	 * qid_usage_idx for each Rx queue would be LEGACY_QID_RX.
268408bc8f15SMintz, Yuval 	 */
268508bc8f15SMintz, Yuval 	for (i = req->rx_qid; i < req->rx_qid + req->num_rxqs; i++) {
268608bc8f15SMintz, Yuval 		if (!qed_iov_validate_rxq(p_hwfn, vf, i,
268708bc8f15SMintz, Yuval 					  QED_IOV_VALIDATE_Q_NA) ||
268808bc8f15SMintz, Yuval 		    !vf->vf_queues[i].cids[qid_usage_idx].p_cid ||
268908bc8f15SMintz, Yuval 		    vf->vf_queues[i].cids[qid_usage_idx].b_is_tx) {
269008bc8f15SMintz, Yuval 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
269108bc8f15SMintz, Yuval 				   "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
269208bc8f15SMintz, Yuval 				   vf->relative_vf_id, req->rx_qid,
269308bc8f15SMintz, Yuval 				   req->num_rxqs);
269408bc8f15SMintz, Yuval 			goto out;
269508bc8f15SMintz, Yuval 		}
269617b235c1SYuval Mintz 	}
269717b235c1SYuval Mintz 
2698f109c240SMintz, Yuval 	/* Prepare the handlers */
26993da7a37aSMintz, Yuval 	for (i = 0; i < req->num_rxqs; i++) {
2700007bc371SMintz, Yuval 		u16 qid = req->rx_qid + i;
2701007bc371SMintz, Yuval 
2702007bc371SMintz, Yuval 		handlers[i] = vf->vf_queues[qid].cids[qid_usage_idx].p_cid;
27033da7a37aSMintz, Yuval 	}
27043da7a37aSMintz, Yuval 
27053da7a37aSMintz, Yuval 	rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
27063da7a37aSMintz, Yuval 					 req->num_rxqs,
270717b235c1SYuval Mintz 					 complete_cqe_flg,
270817b235c1SYuval Mintz 					 complete_event_flg,
270917b235c1SYuval Mintz 					 QED_SPQ_MODE_EBLOCK, NULL);
27103da7a37aSMintz, Yuval 	if (rc)
27113da7a37aSMintz, Yuval 		goto out;
271217b235c1SYuval Mintz 
27133da7a37aSMintz, Yuval 	status = PFVF_STATUS_SUCCESS;
27143da7a37aSMintz, Yuval out:
271517b235c1SYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
271617b235c1SYuval Mintz 			     length, status);
271717b235c1SYuval Mintz }
271817b235c1SYuval Mintz 
2719dacd88d6SYuval Mintz void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
2720dacd88d6SYuval Mintz 			       void *p_tlvs_list, u16 req_type)
2721dacd88d6SYuval Mintz {
2722dacd88d6SYuval Mintz 	struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
2723dacd88d6SYuval Mintz 	int len = 0;
2724dacd88d6SYuval Mintz 
2725dacd88d6SYuval Mintz 	do {
2726dacd88d6SYuval Mintz 		if (!p_tlv->length) {
2727dacd88d6SYuval Mintz 			DP_NOTICE(p_hwfn, "Zero length TLV found\n");
2728dacd88d6SYuval Mintz 			return NULL;
2729dacd88d6SYuval Mintz 		}
2730dacd88d6SYuval Mintz 
2731dacd88d6SYuval Mintz 		if (p_tlv->type == req_type) {
2732dacd88d6SYuval Mintz 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2733dacd88d6SYuval Mintz 				   "Extended tlv type %d, length %d found\n",
2734dacd88d6SYuval Mintz 				   p_tlv->type, p_tlv->length);
2735dacd88d6SYuval Mintz 			return p_tlv;
2736dacd88d6SYuval Mintz 		}
2737dacd88d6SYuval Mintz 
2738dacd88d6SYuval Mintz 		len += p_tlv->length;
2739dacd88d6SYuval Mintz 		p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
2740dacd88d6SYuval Mintz 
2741dacd88d6SYuval Mintz 		if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
2742dacd88d6SYuval Mintz 			DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
2743dacd88d6SYuval Mintz 			return NULL;
2744dacd88d6SYuval Mintz 		}
2745dacd88d6SYuval Mintz 	} while (p_tlv->type != CHANNEL_TLV_LIST_END);
2746dacd88d6SYuval Mintz 
2747dacd88d6SYuval Mintz 	return NULL;
2748dacd88d6SYuval Mintz }
2749dacd88d6SYuval Mintz 
2750dacd88d6SYuval Mintz static void
2751dacd88d6SYuval Mintz qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
2752dacd88d6SYuval Mintz 			    struct qed_sp_vport_update_params *p_data,
2753dacd88d6SYuval Mintz 			    struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2754dacd88d6SYuval Mintz {
2755dacd88d6SYuval Mintz 	struct vfpf_vport_update_activate_tlv *p_act_tlv;
2756dacd88d6SYuval Mintz 	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
2757dacd88d6SYuval Mintz 
2758dacd88d6SYuval Mintz 	p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
2759dacd88d6SYuval Mintz 		    qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2760dacd88d6SYuval Mintz 	if (!p_act_tlv)
2761dacd88d6SYuval Mintz 		return;
2762dacd88d6SYuval Mintz 
2763dacd88d6SYuval Mintz 	p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
2764dacd88d6SYuval Mintz 	p_data->vport_active_rx_flg = p_act_tlv->active_rx;
2765dacd88d6SYuval Mintz 	p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
2766dacd88d6SYuval Mintz 	p_data->vport_active_tx_flg = p_act_tlv->active_tx;
2767dacd88d6SYuval Mintz 	*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
2768dacd88d6SYuval Mintz }
2769dacd88d6SYuval Mintz 
2770dacd88d6SYuval Mintz static void
277117b235c1SYuval Mintz qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
277217b235c1SYuval Mintz 			     struct qed_sp_vport_update_params *p_data,
277317b235c1SYuval Mintz 			     struct qed_vf_info *p_vf,
277417b235c1SYuval Mintz 			     struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
277517b235c1SYuval Mintz {
277617b235c1SYuval Mintz 	struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
277717b235c1SYuval Mintz 	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
277817b235c1SYuval Mintz 
277917b235c1SYuval Mintz 	p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
278017b235c1SYuval Mintz 		     qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
278117b235c1SYuval Mintz 	if (!p_vlan_tlv)
278217b235c1SYuval Mintz 		return;
278317b235c1SYuval Mintz 
278408feecd7SYuval Mintz 	p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
278508feecd7SYuval Mintz 
278608feecd7SYuval Mintz 	/* Ignore the VF request if we're forcing a vlan */
27871a635e48SYuval Mintz 	if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
278817b235c1SYuval Mintz 		p_data->update_inner_vlan_removal_flg = 1;
278917b235c1SYuval Mintz 		p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
279008feecd7SYuval Mintz 	}
279117b235c1SYuval Mintz 
279217b235c1SYuval Mintz 	*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
279317b235c1SYuval Mintz }
279417b235c1SYuval Mintz 
279517b235c1SYuval Mintz static void
279617b235c1SYuval Mintz qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
279717b235c1SYuval Mintz 			    struct qed_sp_vport_update_params *p_data,
279817b235c1SYuval Mintz 			    struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
279917b235c1SYuval Mintz {
280017b235c1SYuval Mintz 	struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
280117b235c1SYuval Mintz 	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
280217b235c1SYuval Mintz 
280317b235c1SYuval Mintz 	p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
280417b235c1SYuval Mintz 			  qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
280517b235c1SYuval Mintz 						   tlv);
280617b235c1SYuval Mintz 	if (!p_tx_switch_tlv)
280717b235c1SYuval Mintz 		return;
280817b235c1SYuval Mintz 
280917b235c1SYuval Mintz 	p_data->update_tx_switching_flg = 1;
281017b235c1SYuval Mintz 	p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
281117b235c1SYuval Mintz 	*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
281217b235c1SYuval Mintz }
281317b235c1SYuval Mintz 
281417b235c1SYuval Mintz static void
2815dacd88d6SYuval Mintz qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
2816dacd88d6SYuval Mintz 				  struct qed_sp_vport_update_params *p_data,
2817dacd88d6SYuval Mintz 				  struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2818dacd88d6SYuval Mintz {
2819dacd88d6SYuval Mintz 	struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2820dacd88d6SYuval Mintz 	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2821dacd88d6SYuval Mintz 
2822dacd88d6SYuval Mintz 	p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2823dacd88d6SYuval Mintz 	    qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2824dacd88d6SYuval Mintz 	if (!p_mcast_tlv)
2825dacd88d6SYuval Mintz 		return;
2826dacd88d6SYuval Mintz 
2827dacd88d6SYuval Mintz 	p_data->update_approx_mcast_flg = 1;
2828dacd88d6SYuval Mintz 	memcpy(p_data->bins, p_mcast_tlv->bins,
2829dacd88d6SYuval Mintz 	       sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
2830dacd88d6SYuval Mintz 	*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
2831dacd88d6SYuval Mintz }
2832dacd88d6SYuval Mintz 
2833dacd88d6SYuval Mintz static void
2834dacd88d6SYuval Mintz qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
2835dacd88d6SYuval Mintz 			      struct qed_sp_vport_update_params *p_data,
2836dacd88d6SYuval Mintz 			      struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2837dacd88d6SYuval Mintz {
2838dacd88d6SYuval Mintz 	struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
2839dacd88d6SYuval Mintz 	struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2840dacd88d6SYuval Mintz 	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2841dacd88d6SYuval Mintz 
2842dacd88d6SYuval Mintz 	p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2843dacd88d6SYuval Mintz 	    qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2844dacd88d6SYuval Mintz 	if (!p_accept_tlv)
2845dacd88d6SYuval Mintz 		return;
2846dacd88d6SYuval Mintz 
2847dacd88d6SYuval Mintz 	p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2848dacd88d6SYuval Mintz 	p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2849dacd88d6SYuval Mintz 	p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2850dacd88d6SYuval Mintz 	p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2851dacd88d6SYuval Mintz 	*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
2852dacd88d6SYuval Mintz }
2853dacd88d6SYuval Mintz 
2854dacd88d6SYuval Mintz static void
285517b235c1SYuval Mintz qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
285617b235c1SYuval Mintz 				  struct qed_sp_vport_update_params *p_data,
285717b235c1SYuval Mintz 				  struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
285817b235c1SYuval Mintz {
285917b235c1SYuval Mintz 	struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
286017b235c1SYuval Mintz 	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
286117b235c1SYuval Mintz 
286217b235c1SYuval Mintz 	p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
286317b235c1SYuval Mintz 			    qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
286417b235c1SYuval Mintz 						     tlv);
286517b235c1SYuval Mintz 	if (!p_accept_any_vlan)
286617b235c1SYuval Mintz 		return;
286717b235c1SYuval Mintz 
286817b235c1SYuval Mintz 	p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
286917b235c1SYuval Mintz 	p_data->update_accept_any_vlan_flg =
287017b235c1SYuval Mintz 		    p_accept_any_vlan->update_accept_any_vlan_flg;
287117b235c1SYuval Mintz 	*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
287217b235c1SYuval Mintz }
287317b235c1SYuval Mintz 
287417b235c1SYuval Mintz static void
2875dacd88d6SYuval Mintz qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
2876dacd88d6SYuval Mintz 			    struct qed_vf_info *vf,
2877dacd88d6SYuval Mintz 			    struct qed_sp_vport_update_params *p_data,
2878dacd88d6SYuval Mintz 			    struct qed_rss_params *p_rss,
2879f29ffdb6SMintz, Yuval 			    struct qed_iov_vf_mbx *p_mbx,
2880f29ffdb6SMintz, Yuval 			    u16 *tlvs_mask, u16 *tlvs_accepted)
2881dacd88d6SYuval Mintz {
2882dacd88d6SYuval Mintz 	struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2883dacd88d6SYuval Mintz 	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
2884f29ffdb6SMintz, Yuval 	bool b_reject = false;
2885dacd88d6SYuval Mintz 	u16 table_size;
2886f29ffdb6SMintz, Yuval 	u16 i, q_idx;
2887dacd88d6SYuval Mintz 
2888dacd88d6SYuval Mintz 	p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2889dacd88d6SYuval Mintz 		    qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2890dacd88d6SYuval Mintz 	if (!p_rss_tlv) {
2891dacd88d6SYuval Mintz 		p_data->rss_params = NULL;
2892dacd88d6SYuval Mintz 		return;
2893dacd88d6SYuval Mintz 	}
2894dacd88d6SYuval Mintz 
2895dacd88d6SYuval Mintz 	memset(p_rss, 0, sizeof(struct qed_rss_params));
2896dacd88d6SYuval Mintz 
2897dacd88d6SYuval Mintz 	p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
2898dacd88d6SYuval Mintz 				      VFPF_UPDATE_RSS_CONFIG_FLAG);
2899dacd88d6SYuval Mintz 	p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
2900dacd88d6SYuval Mintz 					    VFPF_UPDATE_RSS_CAPS_FLAG);
2901dacd88d6SYuval Mintz 	p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
2902dacd88d6SYuval Mintz 					 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2903dacd88d6SYuval Mintz 	p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
2904dacd88d6SYuval Mintz 				   VFPF_UPDATE_RSS_KEY_FLAG);
2905dacd88d6SYuval Mintz 
2906dacd88d6SYuval Mintz 	p_rss->rss_enable = p_rss_tlv->rss_enable;
2907dacd88d6SYuval Mintz 	p_rss->rss_eng_id = vf->relative_vf_id + 1;
2908dacd88d6SYuval Mintz 	p_rss->rss_caps = p_rss_tlv->rss_caps;
2909dacd88d6SYuval Mintz 	p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
2910dacd88d6SYuval Mintz 	memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
2911dacd88d6SYuval Mintz 
2912dacd88d6SYuval Mintz 	table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
2913dacd88d6SYuval Mintz 			   (1 << p_rss_tlv->rss_table_size_log));
2914dacd88d6SYuval Mintz 
2915dacd88d6SYuval Mintz 	for (i = 0; i < table_size; i++) {
2916007bc371SMintz, Yuval 		struct qed_queue_cid *p_cid;
2917007bc371SMintz, Yuval 
2918f29ffdb6SMintz, Yuval 		q_idx = p_rss_tlv->rss_ind_table[i];
2919f109c240SMintz, Yuval 		if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx,
2920f109c240SMintz, Yuval 					  QED_IOV_VALIDATE_Q_ENABLE)) {
2921f29ffdb6SMintz, Yuval 			DP_VERBOSE(p_hwfn,
2922f29ffdb6SMintz, Yuval 				   QED_MSG_IOV,
2923f29ffdb6SMintz, Yuval 				   "VF[%d]: Omitting RSS due to wrong queue %04x\n",
2924f29ffdb6SMintz, Yuval 				   vf->relative_vf_id, q_idx);
2925f29ffdb6SMintz, Yuval 			b_reject = true;
2926f29ffdb6SMintz, Yuval 			goto out;
2927f29ffdb6SMintz, Yuval 		}
2928dacd88d6SYuval Mintz 
2929007bc371SMintz, Yuval 		p_cid = qed_iov_get_vf_rx_queue_cid(&vf->vf_queues[q_idx]);
2930007bc371SMintz, Yuval 		p_rss->rss_ind_table[i] = p_cid;
2931dacd88d6SYuval Mintz 	}
2932dacd88d6SYuval Mintz 
2933dacd88d6SYuval Mintz 	p_data->rss_params = p_rss;
2934f29ffdb6SMintz, Yuval out:
2935dacd88d6SYuval Mintz 	*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
2936f29ffdb6SMintz, Yuval 	if (!b_reject)
2937f29ffdb6SMintz, Yuval 		*tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS;
2938dacd88d6SYuval Mintz }
2939dacd88d6SYuval Mintz 
294017b235c1SYuval Mintz static void
294117b235c1SYuval Mintz qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
294217b235c1SYuval Mintz 				struct qed_vf_info *vf,
294317b235c1SYuval Mintz 				struct qed_sp_vport_update_params *p_data,
294417b235c1SYuval Mintz 				struct qed_sge_tpa_params *p_sge_tpa,
294517b235c1SYuval Mintz 				struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
294617b235c1SYuval Mintz {
294717b235c1SYuval Mintz 	struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
294817b235c1SYuval Mintz 	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
294917b235c1SYuval Mintz 
295017b235c1SYuval Mintz 	p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
295117b235c1SYuval Mintz 	    qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
295217b235c1SYuval Mintz 
295317b235c1SYuval Mintz 	if (!p_sge_tpa_tlv) {
295417b235c1SYuval Mintz 		p_data->sge_tpa_params = NULL;
295517b235c1SYuval Mintz 		return;
295617b235c1SYuval Mintz 	}
295717b235c1SYuval Mintz 
295817b235c1SYuval Mintz 	memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
295917b235c1SYuval Mintz 
296017b235c1SYuval Mintz 	p_sge_tpa->update_tpa_en_flg =
296117b235c1SYuval Mintz 	    !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
296217b235c1SYuval Mintz 	p_sge_tpa->update_tpa_param_flg =
296317b235c1SYuval Mintz 	    !!(p_sge_tpa_tlv->update_sge_tpa_flags &
296417b235c1SYuval Mintz 		VFPF_UPDATE_TPA_PARAM_FLAG);
296517b235c1SYuval Mintz 
296617b235c1SYuval Mintz 	p_sge_tpa->tpa_ipv4_en_flg =
296717b235c1SYuval Mintz 	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
296817b235c1SYuval Mintz 	p_sge_tpa->tpa_ipv6_en_flg =
296917b235c1SYuval Mintz 	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
297017b235c1SYuval Mintz 	p_sge_tpa->tpa_pkt_split_flg =
297117b235c1SYuval Mintz 	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
297217b235c1SYuval Mintz 	p_sge_tpa->tpa_hdr_data_split_flg =
297317b235c1SYuval Mintz 	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
297417b235c1SYuval Mintz 	p_sge_tpa->tpa_gro_consistent_flg =
297517b235c1SYuval Mintz 	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
297617b235c1SYuval Mintz 
297717b235c1SYuval Mintz 	p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
297817b235c1SYuval Mintz 	p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
297917b235c1SYuval Mintz 	p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
298017b235c1SYuval Mintz 	p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
298117b235c1SYuval Mintz 	p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
298217b235c1SYuval Mintz 
298317b235c1SYuval Mintz 	p_data->sge_tpa_params = p_sge_tpa;
298417b235c1SYuval Mintz 
298517b235c1SYuval Mintz 	*tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
298617b235c1SYuval Mintz }
298717b235c1SYuval Mintz 
2988f990c82cSMintz, Yuval static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn,
2989f990c82cSMintz, Yuval 				    u8 vfid,
2990f990c82cSMintz, Yuval 				    struct qed_sp_vport_update_params *params,
2991f990c82cSMintz, Yuval 				    u16 *tlvs)
2992f990c82cSMintz, Yuval {
2993f990c82cSMintz, Yuval 	u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
2994f990c82cSMintz, Yuval 	struct qed_filter_accept_flags *flags = &params->accept_flags;
2995f990c82cSMintz, Yuval 	struct qed_public_vf_info *vf_info;
2996f990c82cSMintz, Yuval 
2997f990c82cSMintz, Yuval 	/* Untrusted VFs can't even be trusted to know that fact.
2998f990c82cSMintz, Yuval 	 * Simply indicate everything is configured fine, and trace
2999f990c82cSMintz, Yuval 	 * configuration 'behind their back'.
3000f990c82cSMintz, Yuval 	 */
3001f990c82cSMintz, Yuval 	if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM)))
3002f990c82cSMintz, Yuval 		return 0;
3003f990c82cSMintz, Yuval 
3004f990c82cSMintz, Yuval 	vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3005f990c82cSMintz, Yuval 
3006f990c82cSMintz, Yuval 	if (flags->update_rx_mode_config) {
3007f990c82cSMintz, Yuval 		vf_info->rx_accept_mode = flags->rx_accept_filter;
3008f990c82cSMintz, Yuval 		if (!vf_info->is_trusted_configured)
3009f990c82cSMintz, Yuval 			flags->rx_accept_filter &= ~mask;
3010f990c82cSMintz, Yuval 	}
3011f990c82cSMintz, Yuval 
3012f990c82cSMintz, Yuval 	if (flags->update_tx_mode_config) {
3013f990c82cSMintz, Yuval 		vf_info->tx_accept_mode = flags->tx_accept_filter;
3014f990c82cSMintz, Yuval 		if (!vf_info->is_trusted_configured)
3015f990c82cSMintz, Yuval 			flags->tx_accept_filter &= ~mask;
3016f990c82cSMintz, Yuval 	}
3017f990c82cSMintz, Yuval 
3018f990c82cSMintz, Yuval 	return 0;
3019f990c82cSMintz, Yuval }
3020f990c82cSMintz, Yuval 
3021dacd88d6SYuval Mintz static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
3022dacd88d6SYuval Mintz 					struct qed_ptt *p_ptt,
3023dacd88d6SYuval Mintz 					struct qed_vf_info *vf)
3024dacd88d6SYuval Mintz {
3025f29ffdb6SMintz, Yuval 	struct qed_rss_params *p_rss_params = NULL;
3026dacd88d6SYuval Mintz 	struct qed_sp_vport_update_params params;
3027dacd88d6SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
302817b235c1SYuval Mintz 	struct qed_sge_tpa_params sge_tpa_params;
3029f29ffdb6SMintz, Yuval 	u16 tlvs_mask = 0, tlvs_accepted = 0;
3030dacd88d6SYuval Mintz 	u8 status = PFVF_STATUS_SUCCESS;
3031dacd88d6SYuval Mintz 	u16 length;
3032dacd88d6SYuval Mintz 	int rc;
3033dacd88d6SYuval Mintz 
303441086467SYuval Mintz 	/* Valiate PF can send such a request */
303541086467SYuval Mintz 	if (!vf->vport_instance) {
303641086467SYuval Mintz 		DP_VERBOSE(p_hwfn,
303741086467SYuval Mintz 			   QED_MSG_IOV,
303841086467SYuval Mintz 			   "No VPORT instance available for VF[%d], failing vport update\n",
303941086467SYuval Mintz 			   vf->abs_vf_id);
304041086467SYuval Mintz 		status = PFVF_STATUS_FAILURE;
304141086467SYuval Mintz 		goto out;
304241086467SYuval Mintz 	}
3043f29ffdb6SMintz, Yuval 	p_rss_params = vzalloc(sizeof(*p_rss_params));
3044f29ffdb6SMintz, Yuval 	if (p_rss_params == NULL) {
3045f29ffdb6SMintz, Yuval 		status = PFVF_STATUS_FAILURE;
3046f29ffdb6SMintz, Yuval 		goto out;
3047f29ffdb6SMintz, Yuval 	}
304841086467SYuval Mintz 
3049dacd88d6SYuval Mintz 	memset(&params, 0, sizeof(params));
3050dacd88d6SYuval Mintz 	params.opaque_fid = vf->opaque_fid;
3051dacd88d6SYuval Mintz 	params.vport_id = vf->vport_id;
3052dacd88d6SYuval Mintz 	params.rss_params = NULL;
3053dacd88d6SYuval Mintz 
3054dacd88d6SYuval Mintz 	/* Search for extended tlvs list and update values
3055dacd88d6SYuval Mintz 	 * from VF in struct qed_sp_vport_update_params.
3056dacd88d6SYuval Mintz 	 */
3057dacd88d6SYuval Mintz 	qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
305817b235c1SYuval Mintz 	qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
305917b235c1SYuval Mintz 	qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
3060dacd88d6SYuval Mintz 	qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
3061dacd88d6SYuval Mintz 	qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
306217b235c1SYuval Mintz 	qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
306317b235c1SYuval Mintz 	qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
306417b235c1SYuval Mintz 					&sge_tpa_params, mbx, &tlvs_mask);
3065dacd88d6SYuval Mintz 
3066f29ffdb6SMintz, Yuval 	tlvs_accepted = tlvs_mask;
3067f29ffdb6SMintz, Yuval 
3068f29ffdb6SMintz, Yuval 	/* Some of the extended TLVs need to be validated first; In that case,
3069f29ffdb6SMintz, Yuval 	 * they can update the mask without updating the accepted [so that
3070f29ffdb6SMintz, Yuval 	 * PF could communicate to VF it has rejected request].
3071dacd88d6SYuval Mintz 	 */
3072f29ffdb6SMintz, Yuval 	qed_iov_vp_update_rss_param(p_hwfn, vf, &params, p_rss_params,
3073f29ffdb6SMintz, Yuval 				    mbx, &tlvs_mask, &tlvs_accepted);
3074f29ffdb6SMintz, Yuval 
3075f990c82cSMintz, Yuval 	if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id,
3076f990c82cSMintz, Yuval 				     &params, &tlvs_accepted)) {
3077f990c82cSMintz, Yuval 		tlvs_accepted = 0;
3078f990c82cSMintz, Yuval 		status = PFVF_STATUS_NOT_SUPPORTED;
3079f990c82cSMintz, Yuval 		goto out;
3080f990c82cSMintz, Yuval 	}
3081f990c82cSMintz, Yuval 
3082f29ffdb6SMintz, Yuval 	if (!tlvs_accepted) {
3083f29ffdb6SMintz, Yuval 		if (tlvs_mask)
3084f29ffdb6SMintz, Yuval 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3085f29ffdb6SMintz, Yuval 				   "Upper-layer prevents VF vport configuration\n");
3086f29ffdb6SMintz, Yuval 		else
3087f29ffdb6SMintz, Yuval 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3088dacd88d6SYuval Mintz 				   "No feature tlvs found for vport update\n");
3089dacd88d6SYuval Mintz 		status = PFVF_STATUS_NOT_SUPPORTED;
3090dacd88d6SYuval Mintz 		goto out;
3091dacd88d6SYuval Mintz 	}
3092dacd88d6SYuval Mintz 
3093dacd88d6SYuval Mintz 	rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
3094dacd88d6SYuval Mintz 
3095dacd88d6SYuval Mintz 	if (rc)
3096dacd88d6SYuval Mintz 		status = PFVF_STATUS_FAILURE;
3097dacd88d6SYuval Mintz 
3098dacd88d6SYuval Mintz out:
3099f29ffdb6SMintz, Yuval 	vfree(p_rss_params);
3100dacd88d6SYuval Mintz 	length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
3101f29ffdb6SMintz, Yuval 						  tlvs_mask, tlvs_accepted);
3102dacd88d6SYuval Mintz 	qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
3103dacd88d6SYuval Mintz }
3104dacd88d6SYuval Mintz 
31058246d0b4SYuval Mintz static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
310608feecd7SYuval Mintz 					 struct qed_vf_info *p_vf,
310708feecd7SYuval Mintz 					 struct qed_filter_ucast *p_params)
310808feecd7SYuval Mintz {
310908feecd7SYuval Mintz 	int i;
311008feecd7SYuval Mintz 
311108feecd7SYuval Mintz 	/* First remove entries and then add new ones */
311208feecd7SYuval Mintz 	if (p_params->opcode == QED_FILTER_REMOVE) {
311308feecd7SYuval Mintz 		for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
311408feecd7SYuval Mintz 			if (p_vf->shadow_config.vlans[i].used &&
311508feecd7SYuval Mintz 			    p_vf->shadow_config.vlans[i].vid ==
311608feecd7SYuval Mintz 			    p_params->vlan) {
311708feecd7SYuval Mintz 				p_vf->shadow_config.vlans[i].used = false;
311808feecd7SYuval Mintz 				break;
311908feecd7SYuval Mintz 			}
312008feecd7SYuval Mintz 		if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
312108feecd7SYuval Mintz 			DP_VERBOSE(p_hwfn,
312208feecd7SYuval Mintz 				   QED_MSG_IOV,
312308feecd7SYuval Mintz 				   "VF [%d] - Tries to remove a non-existing vlan\n",
312408feecd7SYuval Mintz 				   p_vf->relative_vf_id);
312508feecd7SYuval Mintz 			return -EINVAL;
312608feecd7SYuval Mintz 		}
312708feecd7SYuval Mintz 	} else if (p_params->opcode == QED_FILTER_REPLACE ||
312808feecd7SYuval Mintz 		   p_params->opcode == QED_FILTER_FLUSH) {
312908feecd7SYuval Mintz 		for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
313008feecd7SYuval Mintz 			p_vf->shadow_config.vlans[i].used = false;
313108feecd7SYuval Mintz 	}
313208feecd7SYuval Mintz 
313308feecd7SYuval Mintz 	/* In forced mode, we're willing to remove entries - but we don't add
313408feecd7SYuval Mintz 	 * new ones.
313508feecd7SYuval Mintz 	 */
31361a635e48SYuval Mintz 	if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
313708feecd7SYuval Mintz 		return 0;
313808feecd7SYuval Mintz 
313908feecd7SYuval Mintz 	if (p_params->opcode == QED_FILTER_ADD ||
314008feecd7SYuval Mintz 	    p_params->opcode == QED_FILTER_REPLACE) {
314108feecd7SYuval Mintz 		for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
314208feecd7SYuval Mintz 			if (p_vf->shadow_config.vlans[i].used)
314308feecd7SYuval Mintz 				continue;
314408feecd7SYuval Mintz 
314508feecd7SYuval Mintz 			p_vf->shadow_config.vlans[i].used = true;
314608feecd7SYuval Mintz 			p_vf->shadow_config.vlans[i].vid = p_params->vlan;
314708feecd7SYuval Mintz 			break;
314808feecd7SYuval Mintz 		}
314908feecd7SYuval Mintz 
315008feecd7SYuval Mintz 		if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
315108feecd7SYuval Mintz 			DP_VERBOSE(p_hwfn,
315208feecd7SYuval Mintz 				   QED_MSG_IOV,
315308feecd7SYuval Mintz 				   "VF [%d] - Tries to configure more than %d vlan filters\n",
315408feecd7SYuval Mintz 				   p_vf->relative_vf_id,
315508feecd7SYuval Mintz 				   QED_ETH_VF_NUM_VLAN_FILTERS + 1);
315608feecd7SYuval Mintz 			return -EINVAL;
315708feecd7SYuval Mintz 		}
315808feecd7SYuval Mintz 	}
315908feecd7SYuval Mintz 
316008feecd7SYuval Mintz 	return 0;
316108feecd7SYuval Mintz }
316208feecd7SYuval Mintz 
31638246d0b4SYuval Mintz static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
31648246d0b4SYuval Mintz 					struct qed_vf_info *p_vf,
31658246d0b4SYuval Mintz 					struct qed_filter_ucast *p_params)
31668246d0b4SYuval Mintz {
31678246d0b4SYuval Mintz 	int i;
31688246d0b4SYuval Mintz 
31698246d0b4SYuval Mintz 	/* If we're in forced-mode, we don't allow any change */
31701a635e48SYuval Mintz 	if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
31718246d0b4SYuval Mintz 		return 0;
31728246d0b4SYuval Mintz 
31738246d0b4SYuval Mintz 	/* First remove entries and then add new ones */
31748246d0b4SYuval Mintz 	if (p_params->opcode == QED_FILTER_REMOVE) {
31758246d0b4SYuval Mintz 		for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
31768246d0b4SYuval Mintz 			if (ether_addr_equal(p_vf->shadow_config.macs[i],
31778246d0b4SYuval Mintz 					     p_params->mac)) {
31780ee28e31SShyam Saini 				eth_zero_addr(p_vf->shadow_config.macs[i]);
31798246d0b4SYuval Mintz 				break;
31808246d0b4SYuval Mintz 			}
31818246d0b4SYuval Mintz 		}
31828246d0b4SYuval Mintz 
31838246d0b4SYuval Mintz 		if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
31848246d0b4SYuval Mintz 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
31858246d0b4SYuval Mintz 				   "MAC isn't configured\n");
31868246d0b4SYuval Mintz 			return -EINVAL;
31878246d0b4SYuval Mintz 		}
31888246d0b4SYuval Mintz 	} else if (p_params->opcode == QED_FILTER_REPLACE ||
31898246d0b4SYuval Mintz 		   p_params->opcode == QED_FILTER_FLUSH) {
31908246d0b4SYuval Mintz 		for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
31910ee28e31SShyam Saini 			eth_zero_addr(p_vf->shadow_config.macs[i]);
31928246d0b4SYuval Mintz 	}
31938246d0b4SYuval Mintz 
31948246d0b4SYuval Mintz 	/* List the new MAC address */
31958246d0b4SYuval Mintz 	if (p_params->opcode != QED_FILTER_ADD &&
31968246d0b4SYuval Mintz 	    p_params->opcode != QED_FILTER_REPLACE)
31978246d0b4SYuval Mintz 		return 0;
31988246d0b4SYuval Mintz 
31998246d0b4SYuval Mintz 	for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
32008246d0b4SYuval Mintz 		if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
32018246d0b4SYuval Mintz 			ether_addr_copy(p_vf->shadow_config.macs[i],
32028246d0b4SYuval Mintz 					p_params->mac);
32038246d0b4SYuval Mintz 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
32048246d0b4SYuval Mintz 				   "Added MAC at %d entry in shadow\n", i);
32058246d0b4SYuval Mintz 			break;
32068246d0b4SYuval Mintz 		}
32078246d0b4SYuval Mintz 	}
32088246d0b4SYuval Mintz 
32098246d0b4SYuval Mintz 	if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
32108246d0b4SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
32118246d0b4SYuval Mintz 		return -EINVAL;
32128246d0b4SYuval Mintz 	}
32138246d0b4SYuval Mintz 
32148246d0b4SYuval Mintz 	return 0;
32158246d0b4SYuval Mintz }
32168246d0b4SYuval Mintz 
32178246d0b4SYuval Mintz static int
32188246d0b4SYuval Mintz qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
32198246d0b4SYuval Mintz 				 struct qed_vf_info *p_vf,
32208246d0b4SYuval Mintz 				 struct qed_filter_ucast *p_params)
32218246d0b4SYuval Mintz {
32228246d0b4SYuval Mintz 	int rc = 0;
32238246d0b4SYuval Mintz 
32248246d0b4SYuval Mintz 	if (p_params->type == QED_FILTER_MAC) {
32258246d0b4SYuval Mintz 		rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
32268246d0b4SYuval Mintz 		if (rc)
32278246d0b4SYuval Mintz 			return rc;
32288246d0b4SYuval Mintz 	}
32298246d0b4SYuval Mintz 
32308246d0b4SYuval Mintz 	if (p_params->type == QED_FILTER_VLAN)
32318246d0b4SYuval Mintz 		rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
32328246d0b4SYuval Mintz 
32338246d0b4SYuval Mintz 	return rc;
32348246d0b4SYuval Mintz }
32358246d0b4SYuval Mintz 
3236ba56947aSBaoyou Xie static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
3237dacd88d6SYuval Mintz 			     int vfid, struct qed_filter_ucast *params)
3238dacd88d6SYuval Mintz {
3239dacd88d6SYuval Mintz 	struct qed_public_vf_info *vf;
3240dacd88d6SYuval Mintz 
3241dacd88d6SYuval Mintz 	vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
3242dacd88d6SYuval Mintz 	if (!vf)
3243dacd88d6SYuval Mintz 		return -EINVAL;
3244dacd88d6SYuval Mintz 
3245dacd88d6SYuval Mintz 	/* No real decision to make; Store the configured MAC */
3246dacd88d6SYuval Mintz 	if (params->type == QED_FILTER_MAC ||
3247dacd88d6SYuval Mintz 	    params->type == QED_FILTER_MAC_VLAN)
3248dacd88d6SYuval Mintz 		ether_addr_copy(vf->mac, params->mac);
3249dacd88d6SYuval Mintz 
3250dacd88d6SYuval Mintz 	return 0;
3251dacd88d6SYuval Mintz }
3252dacd88d6SYuval Mintz 
3253dacd88d6SYuval Mintz static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
3254dacd88d6SYuval Mintz 					struct qed_ptt *p_ptt,
3255dacd88d6SYuval Mintz 					struct qed_vf_info *vf)
3256dacd88d6SYuval Mintz {
325708feecd7SYuval Mintz 	struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
3258dacd88d6SYuval Mintz 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
3259dacd88d6SYuval Mintz 	struct vfpf_ucast_filter_tlv *req;
3260dacd88d6SYuval Mintz 	u8 status = PFVF_STATUS_SUCCESS;
3261dacd88d6SYuval Mintz 	struct qed_filter_ucast params;
3262dacd88d6SYuval Mintz 	int rc;
3263dacd88d6SYuval Mintz 
3264dacd88d6SYuval Mintz 	/* Prepare the unicast filter params */
3265dacd88d6SYuval Mintz 	memset(&params, 0, sizeof(struct qed_filter_ucast));
3266dacd88d6SYuval Mintz 	req = &mbx->req_virt->ucast_filter;
3267dacd88d6SYuval Mintz 	params.opcode = (enum qed_filter_opcode)req->opcode;
3268dacd88d6SYuval Mintz 	params.type = (enum qed_filter_ucast_type)req->type;
3269dacd88d6SYuval Mintz 
3270dacd88d6SYuval Mintz 	params.is_rx_filter = 1;
3271dacd88d6SYuval Mintz 	params.is_tx_filter = 1;
3272dacd88d6SYuval Mintz 	params.vport_to_remove_from = vf->vport_id;
3273dacd88d6SYuval Mintz 	params.vport_to_add_to = vf->vport_id;
3274dacd88d6SYuval Mintz 	memcpy(params.mac, req->mac, ETH_ALEN);
3275dacd88d6SYuval Mintz 	params.vlan = req->vlan;
3276dacd88d6SYuval Mintz 
3277dacd88d6SYuval Mintz 	DP_VERBOSE(p_hwfn,
3278dacd88d6SYuval Mintz 		   QED_MSG_IOV,
3279dacd88d6SYuval Mintz 		   "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
3280dacd88d6SYuval Mintz 		   vf->abs_vf_id, params.opcode, params.type,
3281dacd88d6SYuval Mintz 		   params.is_rx_filter ? "RX" : "",
3282dacd88d6SYuval Mintz 		   params.is_tx_filter ? "TX" : "",
3283dacd88d6SYuval Mintz 		   params.vport_to_add_to,
3284dacd88d6SYuval Mintz 		   params.mac[0], params.mac[1],
3285dacd88d6SYuval Mintz 		   params.mac[2], params.mac[3],
3286dacd88d6SYuval Mintz 		   params.mac[4], params.mac[5], params.vlan);
3287dacd88d6SYuval Mintz 
3288dacd88d6SYuval Mintz 	if (!vf->vport_instance) {
3289dacd88d6SYuval Mintz 		DP_VERBOSE(p_hwfn,
3290dacd88d6SYuval Mintz 			   QED_MSG_IOV,
3291dacd88d6SYuval Mintz 			   "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
3292dacd88d6SYuval Mintz 			   vf->abs_vf_id);
3293dacd88d6SYuval Mintz 		status = PFVF_STATUS_FAILURE;
3294dacd88d6SYuval Mintz 		goto out;
3295dacd88d6SYuval Mintz 	}
3296dacd88d6SYuval Mintz 
329708feecd7SYuval Mintz 	/* Update shadow copy of the VF configuration */
329808feecd7SYuval Mintz 	if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
329908feecd7SYuval Mintz 		status = PFVF_STATUS_FAILURE;
330008feecd7SYuval Mintz 		goto out;
330108feecd7SYuval Mintz 	}
330208feecd7SYuval Mintz 
330308feecd7SYuval Mintz 	/* Determine if the unicast filtering is acceptible by PF */
33041a635e48SYuval Mintz 	if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
330508feecd7SYuval Mintz 	    (params.type == QED_FILTER_VLAN ||
330608feecd7SYuval Mintz 	     params.type == QED_FILTER_MAC_VLAN)) {
330708feecd7SYuval Mintz 		/* Once VLAN is forced or PVID is set, do not allow
330808feecd7SYuval Mintz 		 * to add/replace any further VLANs.
330908feecd7SYuval Mintz 		 */
331008feecd7SYuval Mintz 		if (params.opcode == QED_FILTER_ADD ||
331108feecd7SYuval Mintz 		    params.opcode == QED_FILTER_REPLACE)
331208feecd7SYuval Mintz 			status = PFVF_STATUS_FORCED;
331308feecd7SYuval Mintz 		goto out;
331408feecd7SYuval Mintz 	}
331508feecd7SYuval Mintz 
33161a635e48SYuval Mintz 	if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
3317eff16960SYuval Mintz 	    (params.type == QED_FILTER_MAC ||
3318eff16960SYuval Mintz 	     params.type == QED_FILTER_MAC_VLAN)) {
3319eff16960SYuval Mintz 		if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
3320eff16960SYuval Mintz 		    (params.opcode != QED_FILTER_ADD &&
3321eff16960SYuval Mintz 		     params.opcode != QED_FILTER_REPLACE))
3322eff16960SYuval Mintz 			status = PFVF_STATUS_FORCED;
3323eff16960SYuval Mintz 		goto out;
3324eff16960SYuval Mintz 	}
3325eff16960SYuval Mintz 
3326dacd88d6SYuval Mintz 	rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
3327dacd88d6SYuval Mintz 	if (rc) {
3328dacd88d6SYuval Mintz 		status = PFVF_STATUS_FAILURE;
3329dacd88d6SYuval Mintz 		goto out;
3330dacd88d6SYuval Mintz 	}
3331dacd88d6SYuval Mintz 
3332dacd88d6SYuval Mintz 	rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
3333dacd88d6SYuval Mintz 				     QED_SPQ_MODE_CB, NULL);
3334dacd88d6SYuval Mintz 	if (rc)
3335dacd88d6SYuval Mintz 		status = PFVF_STATUS_FAILURE;
3336dacd88d6SYuval Mintz 
3337dacd88d6SYuval Mintz out:
3338dacd88d6SYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
3339dacd88d6SYuval Mintz 			     sizeof(struct pfvf_def_resp_tlv), status);
3340dacd88d6SYuval Mintz }
3341dacd88d6SYuval Mintz 
33420b55e27dSYuval Mintz static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
33430b55e27dSYuval Mintz 				       struct qed_ptt *p_ptt,
33440b55e27dSYuval Mintz 				       struct qed_vf_info *vf)
33450b55e27dSYuval Mintz {
33460b55e27dSYuval Mintz 	int i;
33470b55e27dSYuval Mintz 
33480b55e27dSYuval Mintz 	/* Reset the SBs */
33490b55e27dSYuval Mintz 	for (i = 0; i < vf->num_sbs; i++)
33500b55e27dSYuval Mintz 		qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
33510b55e27dSYuval Mintz 						vf->igu_sbs[i],
33520b55e27dSYuval Mintz 						vf->opaque_fid, false);
33530b55e27dSYuval Mintz 
33540b55e27dSYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
33550b55e27dSYuval Mintz 			     sizeof(struct pfvf_def_resp_tlv),
33560b55e27dSYuval Mintz 			     PFVF_STATUS_SUCCESS);
33570b55e27dSYuval Mintz }
33580b55e27dSYuval Mintz 
33590b55e27dSYuval Mintz static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
33600b55e27dSYuval Mintz 				 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
33610b55e27dSYuval Mintz {
33620b55e27dSYuval Mintz 	u16 length = sizeof(struct pfvf_def_resp_tlv);
33630b55e27dSYuval Mintz 	u8 status = PFVF_STATUS_SUCCESS;
33640b55e27dSYuval Mintz 
33650b55e27dSYuval Mintz 	/* Disable Interrupts for VF */
33660b55e27dSYuval Mintz 	qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
33670b55e27dSYuval Mintz 
33680b55e27dSYuval Mintz 	/* Reset Permission table */
33690b55e27dSYuval Mintz 	qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
33700b55e27dSYuval Mintz 
33710b55e27dSYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
33720b55e27dSYuval Mintz 			     length, status);
33730b55e27dSYuval Mintz }
33740b55e27dSYuval Mintz 
33750b55e27dSYuval Mintz static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
33760b55e27dSYuval Mintz 				   struct qed_ptt *p_ptt,
33770b55e27dSYuval Mintz 				   struct qed_vf_info *p_vf)
33780b55e27dSYuval Mintz {
33790b55e27dSYuval Mintz 	u16 length = sizeof(struct pfvf_def_resp_tlv);
33801fe614d1SYuval Mintz 	u8 status = PFVF_STATUS_SUCCESS;
33811fe614d1SYuval Mintz 	int rc = 0;
33820b55e27dSYuval Mintz 
33830b55e27dSYuval Mintz 	qed_iov_vf_cleanup(p_hwfn, p_vf);
33840b55e27dSYuval Mintz 
33851fe614d1SYuval Mintz 	if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
33861fe614d1SYuval Mintz 		/* Stopping the VF */
33871fe614d1SYuval Mintz 		rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
33881fe614d1SYuval Mintz 				    p_vf->opaque_fid);
33891fe614d1SYuval Mintz 
33901fe614d1SYuval Mintz 		if (rc) {
33911fe614d1SYuval Mintz 			DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
33921fe614d1SYuval Mintz 			       rc);
33931fe614d1SYuval Mintz 			status = PFVF_STATUS_FAILURE;
33941fe614d1SYuval Mintz 		}
33951fe614d1SYuval Mintz 
33961fe614d1SYuval Mintz 		p_vf->state = VF_STOPPED;
33971fe614d1SYuval Mintz 	}
33981fe614d1SYuval Mintz 
33990b55e27dSYuval Mintz 	qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
34001fe614d1SYuval Mintz 			     length, status);
34010b55e27dSYuval Mintz }
34020b55e27dSYuval Mintz 
3403bf5a94bfSRahul Verma static void qed_iov_vf_pf_get_coalesce(struct qed_hwfn *p_hwfn,
3404bf5a94bfSRahul Verma 				       struct qed_ptt *p_ptt,
3405bf5a94bfSRahul Verma 				       struct qed_vf_info *p_vf)
3406bf5a94bfSRahul Verma {
3407bf5a94bfSRahul Verma 	struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
3408bf5a94bfSRahul Verma 	struct pfvf_read_coal_resp_tlv *p_resp;
3409bf5a94bfSRahul Verma 	struct vfpf_read_coal_req_tlv *req;
3410bf5a94bfSRahul Verma 	u8 status = PFVF_STATUS_FAILURE;
3411bf5a94bfSRahul Verma 	struct qed_vf_queue *p_queue;
3412bf5a94bfSRahul Verma 	struct qed_queue_cid *p_cid;
3413bf5a94bfSRahul Verma 	u16 coal = 0, qid, i;
3414bf5a94bfSRahul Verma 	bool b_is_rx;
3415bf5a94bfSRahul Verma 	int rc = 0;
3416bf5a94bfSRahul Verma 
3417bf5a94bfSRahul Verma 	mbx->offset = (u8 *)mbx->reply_virt;
3418bf5a94bfSRahul Verma 	req = &mbx->req_virt->read_coal_req;
3419bf5a94bfSRahul Verma 
3420bf5a94bfSRahul Verma 	qid = req->qid;
3421bf5a94bfSRahul Verma 	b_is_rx = req->is_rx ? true : false;
3422bf5a94bfSRahul Verma 
3423bf5a94bfSRahul Verma 	if (b_is_rx) {
3424bf5a94bfSRahul Verma 		if (!qed_iov_validate_rxq(p_hwfn, p_vf, qid,
3425bf5a94bfSRahul Verma 					  QED_IOV_VALIDATE_Q_ENABLE)) {
3426bf5a94bfSRahul Verma 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3427bf5a94bfSRahul Verma 				   "VF[%d]: Invalid Rx queue_id = %d\n",
3428bf5a94bfSRahul Verma 				   p_vf->abs_vf_id, qid);
3429bf5a94bfSRahul Verma 			goto send_resp;
3430bf5a94bfSRahul Verma 		}
3431bf5a94bfSRahul Verma 
3432bf5a94bfSRahul Verma 		p_cid = qed_iov_get_vf_rx_queue_cid(&p_vf->vf_queues[qid]);
3433bf5a94bfSRahul Verma 		rc = qed_get_rxq_coalesce(p_hwfn, p_ptt, p_cid, &coal);
3434bf5a94bfSRahul Verma 		if (rc)
3435bf5a94bfSRahul Verma 			goto send_resp;
3436bf5a94bfSRahul Verma 	} else {
3437bf5a94bfSRahul Verma 		if (!qed_iov_validate_txq(p_hwfn, p_vf, qid,
3438bf5a94bfSRahul Verma 					  QED_IOV_VALIDATE_Q_ENABLE)) {
3439bf5a94bfSRahul Verma 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3440bf5a94bfSRahul Verma 				   "VF[%d]: Invalid Tx queue_id = %d\n",
3441bf5a94bfSRahul Verma 				   p_vf->abs_vf_id, qid);
3442bf5a94bfSRahul Verma 			goto send_resp;
3443bf5a94bfSRahul Verma 		}
3444bf5a94bfSRahul Verma 		for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
3445bf5a94bfSRahul Verma 			p_queue = &p_vf->vf_queues[qid];
3446bf5a94bfSRahul Verma 			if ((!p_queue->cids[i].p_cid) ||
3447bf5a94bfSRahul Verma 			    (!p_queue->cids[i].b_is_tx))
3448bf5a94bfSRahul Verma 				continue;
3449bf5a94bfSRahul Verma 
3450bf5a94bfSRahul Verma 			p_cid = p_queue->cids[i].p_cid;
3451bf5a94bfSRahul Verma 
3452bf5a94bfSRahul Verma 			rc = qed_get_txq_coalesce(p_hwfn, p_ptt, p_cid, &coal);
3453bf5a94bfSRahul Verma 			if (rc)
3454bf5a94bfSRahul Verma 				goto send_resp;
3455bf5a94bfSRahul Verma 			break;
3456bf5a94bfSRahul Verma 		}
3457bf5a94bfSRahul Verma 	}
3458bf5a94bfSRahul Verma 
3459bf5a94bfSRahul Verma 	status = PFVF_STATUS_SUCCESS;
3460bf5a94bfSRahul Verma 
3461bf5a94bfSRahul Verma send_resp:
3462bf5a94bfSRahul Verma 	p_resp = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_COALESCE_READ,
3463bf5a94bfSRahul Verma 			     sizeof(*p_resp));
3464bf5a94bfSRahul Verma 	p_resp->coal = coal;
3465bf5a94bfSRahul Verma 
3466bf5a94bfSRahul Verma 	qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
3467bf5a94bfSRahul Verma 		    sizeof(struct channel_list_end_tlv));
3468bf5a94bfSRahul Verma 
3469bf5a94bfSRahul Verma 	qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status);
3470bf5a94bfSRahul Verma }
3471bf5a94bfSRahul Verma 
3472477f2d14SRahul Verma static void qed_iov_vf_pf_set_coalesce(struct qed_hwfn *p_hwfn,
3473477f2d14SRahul Verma 				       struct qed_ptt *p_ptt,
3474477f2d14SRahul Verma 				       struct qed_vf_info *vf)
3475477f2d14SRahul Verma {
3476477f2d14SRahul Verma 	struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
3477477f2d14SRahul Verma 	struct vfpf_update_coalesce *req;
3478477f2d14SRahul Verma 	u8 status = PFVF_STATUS_FAILURE;
3479477f2d14SRahul Verma 	struct qed_queue_cid *p_cid;
3480477f2d14SRahul Verma 	u16 rx_coal, tx_coal;
3481477f2d14SRahul Verma 	int rc = 0, i;
3482477f2d14SRahul Verma 	u16 qid;
3483477f2d14SRahul Verma 
3484477f2d14SRahul Verma 	req = &mbx->req_virt->update_coalesce;
3485477f2d14SRahul Verma 
3486477f2d14SRahul Verma 	rx_coal = req->rx_coal;
3487477f2d14SRahul Verma 	tx_coal = req->tx_coal;
3488477f2d14SRahul Verma 	qid = req->qid;
3489477f2d14SRahul Verma 
3490477f2d14SRahul Verma 	if (!qed_iov_validate_rxq(p_hwfn, vf, qid,
3491477f2d14SRahul Verma 				  QED_IOV_VALIDATE_Q_ENABLE) && rx_coal) {
3492477f2d14SRahul Verma 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3493477f2d14SRahul Verma 			   "VF[%d]: Invalid Rx queue_id = %d\n",
3494477f2d14SRahul Verma 			   vf->abs_vf_id, qid);
3495477f2d14SRahul Verma 		goto out;
3496477f2d14SRahul Verma 	}
3497477f2d14SRahul Verma 
3498477f2d14SRahul Verma 	if (!qed_iov_validate_txq(p_hwfn, vf, qid,
3499477f2d14SRahul Verma 				  QED_IOV_VALIDATE_Q_ENABLE) && tx_coal) {
3500477f2d14SRahul Verma 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3501477f2d14SRahul Verma 			   "VF[%d]: Invalid Tx queue_id = %d\n",
3502477f2d14SRahul Verma 			   vf->abs_vf_id, qid);
3503477f2d14SRahul Verma 		goto out;
3504477f2d14SRahul Verma 	}
3505477f2d14SRahul Verma 
3506477f2d14SRahul Verma 	DP_VERBOSE(p_hwfn,
3507477f2d14SRahul Verma 		   QED_MSG_IOV,
3508477f2d14SRahul Verma 		   "VF[%d]: Setting coalesce for VF rx_coal = %d, tx_coal = %d at queue = %d\n",
3509477f2d14SRahul Verma 		   vf->abs_vf_id, rx_coal, tx_coal, qid);
3510477f2d14SRahul Verma 
3511477f2d14SRahul Verma 	if (rx_coal) {
3512477f2d14SRahul Verma 		p_cid = qed_iov_get_vf_rx_queue_cid(&vf->vf_queues[qid]);
3513477f2d14SRahul Verma 
3514477f2d14SRahul Verma 		rc = qed_set_rxq_coalesce(p_hwfn, p_ptt, rx_coal, p_cid);
3515477f2d14SRahul Verma 		if (rc) {
3516477f2d14SRahul Verma 			DP_VERBOSE(p_hwfn,
3517477f2d14SRahul Verma 				   QED_MSG_IOV,
3518477f2d14SRahul Verma 				   "VF[%d]: Unable to set rx queue = %d coalesce\n",
3519477f2d14SRahul Verma 				   vf->abs_vf_id, vf->vf_queues[qid].fw_rx_qid);
3520477f2d14SRahul Verma 			goto out;
3521477f2d14SRahul Verma 		}
3522bf5a94bfSRahul Verma 		vf->rx_coal = rx_coal;
3523477f2d14SRahul Verma 	}
3524477f2d14SRahul Verma 
3525477f2d14SRahul Verma 	if (tx_coal) {
3526477f2d14SRahul Verma 		struct qed_vf_queue *p_queue = &vf->vf_queues[qid];
3527477f2d14SRahul Verma 
3528477f2d14SRahul Verma 		for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
3529477f2d14SRahul Verma 			if (!p_queue->cids[i].p_cid)
3530477f2d14SRahul Verma 				continue;
3531477f2d14SRahul Verma 
3532477f2d14SRahul Verma 			if (!p_queue->cids[i].b_is_tx)
3533477f2d14SRahul Verma 				continue;
3534477f2d14SRahul Verma 
3535477f2d14SRahul Verma 			rc = qed_set_txq_coalesce(p_hwfn, p_ptt, tx_coal,
3536477f2d14SRahul Verma 						  p_queue->cids[i].p_cid);
3537477f2d14SRahul Verma 
3538477f2d14SRahul Verma 			if (rc) {
3539477f2d14SRahul Verma 				DP_VERBOSE(p_hwfn,
3540477f2d14SRahul Verma 					   QED_MSG_IOV,
3541477f2d14SRahul Verma 					   "VF[%d]: Unable to set tx queue coalesce\n",
3542477f2d14SRahul Verma 					   vf->abs_vf_id);
3543477f2d14SRahul Verma 				goto out;
3544477f2d14SRahul Verma 			}
3545477f2d14SRahul Verma 		}
3546bf5a94bfSRahul Verma 		vf->tx_coal = tx_coal;
3547477f2d14SRahul Verma 	}
3548477f2d14SRahul Verma 
3549477f2d14SRahul Verma 	status = PFVF_STATUS_SUCCESS;
3550477f2d14SRahul Verma out:
3551477f2d14SRahul Verma 	qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_COALESCE_UPDATE,
3552477f2d14SRahul Verma 			     sizeof(struct pfvf_def_resp_tlv), status);
3553477f2d14SRahul Verma }
35540b55e27dSYuval Mintz static int
35550b55e27dSYuval Mintz qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
35560b55e27dSYuval Mintz 			 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
35570b55e27dSYuval Mintz {
35580b55e27dSYuval Mintz 	int cnt;
35590b55e27dSYuval Mintz 	u32 val;
35600b55e27dSYuval Mintz 
35610b55e27dSYuval Mintz 	qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
35620b55e27dSYuval Mintz 
35630b55e27dSYuval Mintz 	for (cnt = 0; cnt < 50; cnt++) {
35640b55e27dSYuval Mintz 		val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
35650b55e27dSYuval Mintz 		if (!val)
35660b55e27dSYuval Mintz 			break;
35670b55e27dSYuval Mintz 		msleep(20);
35680b55e27dSYuval Mintz 	}
35690b55e27dSYuval Mintz 	qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
35700b55e27dSYuval Mintz 
35710b55e27dSYuval Mintz 	if (cnt == 50) {
35720b55e27dSYuval Mintz 		DP_ERR(p_hwfn,
35730b55e27dSYuval Mintz 		       "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
35740b55e27dSYuval Mintz 		       p_vf->abs_vf_id, val);
35750b55e27dSYuval Mintz 		return -EBUSY;
35760b55e27dSYuval Mintz 	}
35770b55e27dSYuval Mintz 
35780b55e27dSYuval Mintz 	return 0;
35790b55e27dSYuval Mintz }
35800b55e27dSYuval Mintz 
35810b55e27dSYuval Mintz static int
35820b55e27dSYuval Mintz qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
35830b55e27dSYuval Mintz 			struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
35840b55e27dSYuval Mintz {
35850b55e27dSYuval Mintz 	u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
35860b55e27dSYuval Mintz 	int i, cnt;
35870b55e27dSYuval Mintz 
35880b55e27dSYuval Mintz 	/* Read initial consumers & producers */
35890b55e27dSYuval Mintz 	for (i = 0; i < MAX_NUM_VOQS; i++) {
35900b55e27dSYuval Mintz 		u32 prod;
35910b55e27dSYuval Mintz 
35920b55e27dSYuval Mintz 		cons[i] = qed_rd(p_hwfn, p_ptt,
35930b55e27dSYuval Mintz 				 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
35940b55e27dSYuval Mintz 				 i * 0x40);
35950b55e27dSYuval Mintz 		prod = qed_rd(p_hwfn, p_ptt,
35960b55e27dSYuval Mintz 			      PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
35970b55e27dSYuval Mintz 			      i * 0x40);
35980b55e27dSYuval Mintz 		distance[i] = prod - cons[i];
35990b55e27dSYuval Mintz 	}
36000b55e27dSYuval Mintz 
36010b55e27dSYuval Mintz 	/* Wait for consumers to pass the producers */
36020b55e27dSYuval Mintz 	i = 0;
36030b55e27dSYuval Mintz 	for (cnt = 0; cnt < 50; cnt++) {
36040b55e27dSYuval Mintz 		for (; i < MAX_NUM_VOQS; i++) {
36050b55e27dSYuval Mintz 			u32 tmp;
36060b55e27dSYuval Mintz 
36070b55e27dSYuval Mintz 			tmp = qed_rd(p_hwfn, p_ptt,
36080b55e27dSYuval Mintz 				     PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
36090b55e27dSYuval Mintz 				     i * 0x40);
36100b55e27dSYuval Mintz 			if (distance[i] > tmp - cons[i])
36110b55e27dSYuval Mintz 				break;
36120b55e27dSYuval Mintz 		}
36130b55e27dSYuval Mintz 
36140b55e27dSYuval Mintz 		if (i == MAX_NUM_VOQS)
36150b55e27dSYuval Mintz 			break;
36160b55e27dSYuval Mintz 
36170b55e27dSYuval Mintz 		msleep(20);
36180b55e27dSYuval Mintz 	}
36190b55e27dSYuval Mintz 
36200b55e27dSYuval Mintz 	if (cnt == 50) {
36210b55e27dSYuval Mintz 		DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
36220b55e27dSYuval Mintz 		       p_vf->abs_vf_id, i);
36230b55e27dSYuval Mintz 		return -EBUSY;
36240b55e27dSYuval Mintz 	}
36250b55e27dSYuval Mintz 
36260b55e27dSYuval Mintz 	return 0;
36270b55e27dSYuval Mintz }
36280b55e27dSYuval Mintz 
36290b55e27dSYuval Mintz static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
36300b55e27dSYuval Mintz 			       struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
36310b55e27dSYuval Mintz {
36320b55e27dSYuval Mintz 	int rc;
36330b55e27dSYuval Mintz 
36340b55e27dSYuval Mintz 	rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
36350b55e27dSYuval Mintz 	if (rc)
36360b55e27dSYuval Mintz 		return rc;
36370b55e27dSYuval Mintz 
36380b55e27dSYuval Mintz 	rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
36390b55e27dSYuval Mintz 	if (rc)
36400b55e27dSYuval Mintz 		return rc;
36410b55e27dSYuval Mintz 
36420b55e27dSYuval Mintz 	return 0;
36430b55e27dSYuval Mintz }
36440b55e27dSYuval Mintz 
36450b55e27dSYuval Mintz static int
36460b55e27dSYuval Mintz qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
36470b55e27dSYuval Mintz 			       struct qed_ptt *p_ptt,
36480b55e27dSYuval Mintz 			       u16 rel_vf_id, u32 *ack_vfs)
36490b55e27dSYuval Mintz {
36500b55e27dSYuval Mintz 	struct qed_vf_info *p_vf;
36510b55e27dSYuval Mintz 	int rc = 0;
36520b55e27dSYuval Mintz 
36530b55e27dSYuval Mintz 	p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
36540b55e27dSYuval Mintz 	if (!p_vf)
36550b55e27dSYuval Mintz 		return 0;
36560b55e27dSYuval Mintz 
36570b55e27dSYuval Mintz 	if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
36580b55e27dSYuval Mintz 	    (1ULL << (rel_vf_id % 64))) {
36590b55e27dSYuval Mintz 		u16 vfid = p_vf->abs_vf_id;
36600b55e27dSYuval Mintz 
36610b55e27dSYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
36620b55e27dSYuval Mintz 			   "VF[%d] - Handling FLR\n", vfid);
36630b55e27dSYuval Mintz 
36640b55e27dSYuval Mintz 		qed_iov_vf_cleanup(p_hwfn, p_vf);
36650b55e27dSYuval Mintz 
36660b55e27dSYuval Mintz 		/* If VF isn't active, no need for anything but SW */
36670b55e27dSYuval Mintz 		if (!p_vf->b_init)
36680b55e27dSYuval Mintz 			goto cleanup;
36690b55e27dSYuval Mintz 
36700b55e27dSYuval Mintz 		rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
36710b55e27dSYuval Mintz 		if (rc)
36720b55e27dSYuval Mintz 			goto cleanup;
36730b55e27dSYuval Mintz 
36740b55e27dSYuval Mintz 		rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
36750b55e27dSYuval Mintz 		if (rc) {
36760b55e27dSYuval Mintz 			DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
36770b55e27dSYuval Mintz 			return rc;
36780b55e27dSYuval Mintz 		}
36790b55e27dSYuval Mintz 
36807eff82b0SYuval Mintz 		/* Workaround to make VF-PF channel ready, as FW
36817eff82b0SYuval Mintz 		 * doesn't do that as a part of FLR.
36827eff82b0SYuval Mintz 		 */
36837eff82b0SYuval Mintz 		REG_WR(p_hwfn,
36847eff82b0SYuval Mintz 		       GTT_BAR0_MAP_REG_USDM_RAM +
36857eff82b0SYuval Mintz 		       USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
36867eff82b0SYuval Mintz 
36870b55e27dSYuval Mintz 		/* VF_STOPPED has to be set only after final cleanup
36880b55e27dSYuval Mintz 		 * but prior to re-enabling the VF.
36890b55e27dSYuval Mintz 		 */
36900b55e27dSYuval Mintz 		p_vf->state = VF_STOPPED;
36910b55e27dSYuval Mintz 
36920b55e27dSYuval Mintz 		rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
36930b55e27dSYuval Mintz 		if (rc) {
36940b55e27dSYuval Mintz 			DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
36950b55e27dSYuval Mintz 			       vfid);
36960b55e27dSYuval Mintz 			return rc;
36970b55e27dSYuval Mintz 		}
36980b55e27dSYuval Mintz cleanup:
36990b55e27dSYuval Mintz 		/* Mark VF for ack and clean pending state */
37000b55e27dSYuval Mintz 		if (p_vf->state == VF_RESET)
37010b55e27dSYuval Mintz 			p_vf->state = VF_STOPPED;
37021a635e48SYuval Mintz 		ack_vfs[vfid / 32] |= BIT((vfid % 32));
37030b55e27dSYuval Mintz 		p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
37040b55e27dSYuval Mintz 		    ~(1ULL << (rel_vf_id % 64));
3705fd3c615aSMintz, Yuval 		p_vf->vf_mbx.b_pending_msg = false;
37060b55e27dSYuval Mintz 	}
37070b55e27dSYuval Mintz 
37080b55e27dSYuval Mintz 	return rc;
37090b55e27dSYuval Mintz }
37100b55e27dSYuval Mintz 
3711ba56947aSBaoyou Xie static int
3712ba56947aSBaoyou Xie qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
37130b55e27dSYuval Mintz {
37140b55e27dSYuval Mintz 	u32 ack_vfs[VF_MAX_STATIC / 32];
37150b55e27dSYuval Mintz 	int rc = 0;
37160b55e27dSYuval Mintz 	u16 i;
37170b55e27dSYuval Mintz 
37180b55e27dSYuval Mintz 	memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
37190b55e27dSYuval Mintz 
37200b55e27dSYuval Mintz 	/* Since BRB <-> PRS interface can't be tested as part of the flr
37210b55e27dSYuval Mintz 	 * polling due to HW limitations, simply sleep a bit. And since
37220b55e27dSYuval Mintz 	 * there's no need to wait per-vf, do it before looping.
37230b55e27dSYuval Mintz 	 */
37240b55e27dSYuval Mintz 	msleep(100);
37250b55e27dSYuval Mintz 
37260b55e27dSYuval Mintz 	for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
37270b55e27dSYuval Mintz 		qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
37280b55e27dSYuval Mintz 
37290b55e27dSYuval Mintz 	rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
37300b55e27dSYuval Mintz 	return rc;
37310b55e27dSYuval Mintz }
37320b55e27dSYuval Mintz 
3733cccf6f5cSMintz, Yuval bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
37340b55e27dSYuval Mintz {
3735cccf6f5cSMintz, Yuval 	bool found = false;
3736cccf6f5cSMintz, Yuval 	u16 i;
37370b55e27dSYuval Mintz 
37380b55e27dSYuval Mintz 	DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
37390b55e27dSYuval Mintz 	for (i = 0; i < (VF_MAX_STATIC / 32); i++)
37400b55e27dSYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
37410b55e27dSYuval Mintz 			   "[%08x,...,%08x]: %08x\n",
37420b55e27dSYuval Mintz 			   i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
37430b55e27dSYuval Mintz 
37440b55e27dSYuval Mintz 	if (!p_hwfn->cdev->p_iov_info) {
37450b55e27dSYuval Mintz 		DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
3746cccf6f5cSMintz, Yuval 		return false;
37470b55e27dSYuval Mintz 	}
37480b55e27dSYuval Mintz 
37490b55e27dSYuval Mintz 	/* Mark VFs */
37500b55e27dSYuval Mintz 	for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
37510b55e27dSYuval Mintz 		struct qed_vf_info *p_vf;
37520b55e27dSYuval Mintz 		u8 vfid;
37530b55e27dSYuval Mintz 
37540b55e27dSYuval Mintz 		p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
37550b55e27dSYuval Mintz 		if (!p_vf)
37560b55e27dSYuval Mintz 			continue;
37570b55e27dSYuval Mintz 
37580b55e27dSYuval Mintz 		vfid = p_vf->abs_vf_id;
37591a635e48SYuval Mintz 		if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
37600b55e27dSYuval Mintz 			u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
37610b55e27dSYuval Mintz 			u16 rel_vf_id = p_vf->relative_vf_id;
37620b55e27dSYuval Mintz 
37630b55e27dSYuval Mintz 			DP_VERBOSE(p_hwfn, QED_MSG_IOV,
37640b55e27dSYuval Mintz 				   "VF[%d] [rel %d] got FLR-ed\n",
37650b55e27dSYuval Mintz 				   vfid, rel_vf_id);
37660b55e27dSYuval Mintz 
37670b55e27dSYuval Mintz 			p_vf->state = VF_RESET;
37680b55e27dSYuval Mintz 
37690b55e27dSYuval Mintz 			/* No need to lock here, since pending_flr should
37700b55e27dSYuval Mintz 			 * only change here and before ACKing MFw. Since
37710b55e27dSYuval Mintz 			 * MFW will not trigger an additional attention for
37720b55e27dSYuval Mintz 			 * VF flr until ACKs, we're safe.
37730b55e27dSYuval Mintz 			 */
37740b55e27dSYuval Mintz 			p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
3775cccf6f5cSMintz, Yuval 			found = true;
37760b55e27dSYuval Mintz 		}
37770b55e27dSYuval Mintz 	}
37780b55e27dSYuval Mintz 
37790b55e27dSYuval Mintz 	return found;
37800b55e27dSYuval Mintz }
37810b55e27dSYuval Mintz 
378273390ac9SYuval Mintz static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
378373390ac9SYuval Mintz 			     u16 vfid,
378473390ac9SYuval Mintz 			     struct qed_mcp_link_params *p_params,
378573390ac9SYuval Mintz 			     struct qed_mcp_link_state *p_link,
378673390ac9SYuval Mintz 			     struct qed_mcp_link_capabilities *p_caps)
378773390ac9SYuval Mintz {
378873390ac9SYuval Mintz 	struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
378973390ac9SYuval Mintz 						       vfid,
379073390ac9SYuval Mintz 						       false);
379173390ac9SYuval Mintz 	struct qed_bulletin_content *p_bulletin;
379273390ac9SYuval Mintz 
379373390ac9SYuval Mintz 	if (!p_vf)
379473390ac9SYuval Mintz 		return;
379573390ac9SYuval Mintz 
379673390ac9SYuval Mintz 	p_bulletin = p_vf->bulletin.p_virt;
379773390ac9SYuval Mintz 
379873390ac9SYuval Mintz 	if (p_params)
379973390ac9SYuval Mintz 		__qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
380073390ac9SYuval Mintz 	if (p_link)
380173390ac9SYuval Mintz 		__qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
380273390ac9SYuval Mintz 	if (p_caps)
380373390ac9SYuval Mintz 		__qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
380473390ac9SYuval Mintz }
380573390ac9SYuval Mintz 
380637bff2b9SYuval Mintz static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
380737bff2b9SYuval Mintz 				    struct qed_ptt *p_ptt, int vfid)
380837bff2b9SYuval Mintz {
380937bff2b9SYuval Mintz 	struct qed_iov_vf_mbx *mbx;
381037bff2b9SYuval Mintz 	struct qed_vf_info *p_vf;
381137bff2b9SYuval Mintz 
381237bff2b9SYuval Mintz 	p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
381337bff2b9SYuval Mintz 	if (!p_vf)
381437bff2b9SYuval Mintz 		return;
381537bff2b9SYuval Mintz 
381637bff2b9SYuval Mintz 	mbx = &p_vf->vf_mbx;
381737bff2b9SYuval Mintz 
381837bff2b9SYuval Mintz 	/* qed_iov_process_mbx_request */
3819fd3c615aSMintz, Yuval 	if (!mbx->b_pending_msg) {
3820fd3c615aSMintz, Yuval 		DP_NOTICE(p_hwfn,
3821fd3c615aSMintz, Yuval 			  "VF[%02x]: Trying to process mailbox message when none is pending\n",
3822fd3c615aSMintz, Yuval 			  p_vf->abs_vf_id);
3823fd3c615aSMintz, Yuval 		return;
3824fd3c615aSMintz, Yuval 	}
3825fd3c615aSMintz, Yuval 	mbx->b_pending_msg = false;
382637bff2b9SYuval Mintz 
382737bff2b9SYuval Mintz 	mbx->first_tlv = mbx->req_virt->first_tlv;
382837bff2b9SYuval Mintz 
3829fd3c615aSMintz, Yuval 	DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3830fd3c615aSMintz, Yuval 		   "VF[%02x]: Processing mailbox message [type %04x]\n",
3831fd3c615aSMintz, Yuval 		   p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3832fd3c615aSMintz, Yuval 
383337bff2b9SYuval Mintz 	/* check if tlv type is known */
38347eff82b0SYuval Mintz 	if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
38357eff82b0SYuval Mintz 	    !p_vf->b_malicious) {
38361408cc1fSYuval Mintz 		switch (mbx->first_tlv.tl.type) {
38371408cc1fSYuval Mintz 		case CHANNEL_TLV_ACQUIRE:
38381408cc1fSYuval Mintz 			qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
38391408cc1fSYuval Mintz 			break;
3840dacd88d6SYuval Mintz 		case CHANNEL_TLV_VPORT_START:
3841dacd88d6SYuval Mintz 			qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
3842dacd88d6SYuval Mintz 			break;
3843dacd88d6SYuval Mintz 		case CHANNEL_TLV_VPORT_TEARDOWN:
3844dacd88d6SYuval Mintz 			qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
3845dacd88d6SYuval Mintz 			break;
3846dacd88d6SYuval Mintz 		case CHANNEL_TLV_START_RXQ:
3847dacd88d6SYuval Mintz 			qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
3848dacd88d6SYuval Mintz 			break;
3849dacd88d6SYuval Mintz 		case CHANNEL_TLV_START_TXQ:
3850dacd88d6SYuval Mintz 			qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
3851dacd88d6SYuval Mintz 			break;
3852dacd88d6SYuval Mintz 		case CHANNEL_TLV_STOP_RXQS:
3853dacd88d6SYuval Mintz 			qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
3854dacd88d6SYuval Mintz 			break;
3855dacd88d6SYuval Mintz 		case CHANNEL_TLV_STOP_TXQS:
3856dacd88d6SYuval Mintz 			qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
3857dacd88d6SYuval Mintz 			break;
385817b235c1SYuval Mintz 		case CHANNEL_TLV_UPDATE_RXQ:
385917b235c1SYuval Mintz 			qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
386017b235c1SYuval Mintz 			break;
3861dacd88d6SYuval Mintz 		case CHANNEL_TLV_VPORT_UPDATE:
3862dacd88d6SYuval Mintz 			qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
3863dacd88d6SYuval Mintz 			break;
3864dacd88d6SYuval Mintz 		case CHANNEL_TLV_UCAST_FILTER:
3865dacd88d6SYuval Mintz 			qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
3866dacd88d6SYuval Mintz 			break;
38670b55e27dSYuval Mintz 		case CHANNEL_TLV_CLOSE:
38680b55e27dSYuval Mintz 			qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
38690b55e27dSYuval Mintz 			break;
38700b55e27dSYuval Mintz 		case CHANNEL_TLV_INT_CLEANUP:
38710b55e27dSYuval Mintz 			qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
38720b55e27dSYuval Mintz 			break;
38730b55e27dSYuval Mintz 		case CHANNEL_TLV_RELEASE:
38740b55e27dSYuval Mintz 			qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
38750b55e27dSYuval Mintz 			break;
3876eaf3c0c6SChopra, Manish 		case CHANNEL_TLV_UPDATE_TUNN_PARAM:
3877eaf3c0c6SChopra, Manish 			qed_iov_vf_mbx_update_tunn_param(p_hwfn, p_ptt, p_vf);
3878eaf3c0c6SChopra, Manish 			break;
3879477f2d14SRahul Verma 		case CHANNEL_TLV_COALESCE_UPDATE:
3880477f2d14SRahul Verma 			qed_iov_vf_pf_set_coalesce(p_hwfn, p_ptt, p_vf);
3881477f2d14SRahul Verma 			break;
3882bf5a94bfSRahul Verma 		case CHANNEL_TLV_COALESCE_READ:
3883bf5a94bfSRahul Verma 			qed_iov_vf_pf_get_coalesce(p_hwfn, p_ptt, p_vf);
3884bf5a94bfSRahul Verma 			break;
38851408cc1fSYuval Mintz 		}
38867eff82b0SYuval Mintz 	} else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
38877eff82b0SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
38887eff82b0SYuval Mintz 			   "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
38897eff82b0SYuval Mintz 			   p_vf->abs_vf_id, mbx->first_tlv.tl.type);
38907eff82b0SYuval Mintz 
38917eff82b0SYuval Mintz 		qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
38927eff82b0SYuval Mintz 				     mbx->first_tlv.tl.type,
38937eff82b0SYuval Mintz 				     sizeof(struct pfvf_def_resp_tlv),
38947eff82b0SYuval Mintz 				     PFVF_STATUS_MALICIOUS);
389537bff2b9SYuval Mintz 	} else {
389637bff2b9SYuval Mintz 		/* unknown TLV - this may belong to a VF driver from the future
389737bff2b9SYuval Mintz 		 * - a version written after this PF driver was written, which
389837bff2b9SYuval Mintz 		 * supports features unknown as of yet. Too bad since we don't
389937bff2b9SYuval Mintz 		 * support them. Or this may be because someone wrote a crappy
390037bff2b9SYuval Mintz 		 * VF driver and is sending garbage over the channel.
390137bff2b9SYuval Mintz 		 */
390254fdd80fSYuval Mintz 		DP_NOTICE(p_hwfn,
390354fdd80fSYuval Mintz 			  "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
390454fdd80fSYuval Mintz 			  p_vf->abs_vf_id,
390554fdd80fSYuval Mintz 			  mbx->first_tlv.tl.type,
390654fdd80fSYuval Mintz 			  mbx->first_tlv.tl.length,
390754fdd80fSYuval Mintz 			  mbx->first_tlv.padding, mbx->first_tlv.reply_address);
390837bff2b9SYuval Mintz 
390954fdd80fSYuval Mintz 		/* Try replying in case reply address matches the acquisition's
391054fdd80fSYuval Mintz 		 * posted address.
391154fdd80fSYuval Mintz 		 */
391254fdd80fSYuval Mintz 		if (p_vf->acquire.first_tlv.reply_address &&
391354fdd80fSYuval Mintz 		    (mbx->first_tlv.reply_address ==
391454fdd80fSYuval Mintz 		     p_vf->acquire.first_tlv.reply_address)) {
391554fdd80fSYuval Mintz 			qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
391654fdd80fSYuval Mintz 					     mbx->first_tlv.tl.type,
391754fdd80fSYuval Mintz 					     sizeof(struct pfvf_def_resp_tlv),
391854fdd80fSYuval Mintz 					     PFVF_STATUS_NOT_SUPPORTED);
391954fdd80fSYuval Mintz 		} else {
392037bff2b9SYuval Mintz 			DP_VERBOSE(p_hwfn,
392137bff2b9SYuval Mintz 				   QED_MSG_IOV,
392254fdd80fSYuval Mintz 				   "VF[%02x]: Can't respond to TLV - no valid reply address\n",
392354fdd80fSYuval Mintz 				   p_vf->abs_vf_id);
392437bff2b9SYuval Mintz 		}
392537bff2b9SYuval Mintz 	}
392637bff2b9SYuval Mintz }
392737bff2b9SYuval Mintz 
3928fd3c615aSMintz, Yuval void qed_iov_pf_get_pending_events(struct qed_hwfn *p_hwfn, u64 *events)
392937bff2b9SYuval Mintz {
3930fd3c615aSMintz, Yuval 	int i;
393137bff2b9SYuval Mintz 
3932fd3c615aSMintz, Yuval 	memset(events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
3933fd3c615aSMintz, Yuval 
3934fd3c615aSMintz, Yuval 	qed_for_each_vf(p_hwfn, i) {
3935fd3c615aSMintz, Yuval 		struct qed_vf_info *p_vf;
3936fd3c615aSMintz, Yuval 
3937fd3c615aSMintz, Yuval 		p_vf = &p_hwfn->pf_iov_info->vfs_array[i];
3938fd3c615aSMintz, Yuval 		if (p_vf->vf_mbx.b_pending_msg)
3939fd3c615aSMintz, Yuval 			events[i / 64] |= 1ULL << (i % 64);
394037bff2b9SYuval Mintz 	}
394137bff2b9SYuval Mintz }
394237bff2b9SYuval Mintz 
39437eff82b0SYuval Mintz static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
39447eff82b0SYuval Mintz 						       u16 abs_vfid)
39457eff82b0SYuval Mintz {
39467eff82b0SYuval Mintz 	u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
39477eff82b0SYuval Mintz 
39487eff82b0SYuval Mintz 	if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
39497eff82b0SYuval Mintz 		DP_VERBOSE(p_hwfn,
39507eff82b0SYuval Mintz 			   QED_MSG_IOV,
39517eff82b0SYuval Mintz 			   "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
39527eff82b0SYuval Mintz 			   abs_vfid);
39537eff82b0SYuval Mintz 		return NULL;
39547eff82b0SYuval Mintz 	}
39557eff82b0SYuval Mintz 
39567eff82b0SYuval Mintz 	return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
39577eff82b0SYuval Mintz }
39587eff82b0SYuval Mintz 
395937bff2b9SYuval Mintz static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
396037bff2b9SYuval Mintz 			      u16 abs_vfid, struct regpair *vf_msg)
396137bff2b9SYuval Mintz {
39627eff82b0SYuval Mintz 	struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
396337bff2b9SYuval Mintz 			   abs_vfid);
39647eff82b0SYuval Mintz 
39657eff82b0SYuval Mintz 	if (!p_vf)
396637bff2b9SYuval Mintz 		return 0;
396737bff2b9SYuval Mintz 
396837bff2b9SYuval Mintz 	/* List the physical address of the request so that handler
396937bff2b9SYuval Mintz 	 * could later on copy the message from it.
397037bff2b9SYuval Mintz 	 */
397137bff2b9SYuval Mintz 	p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
397237bff2b9SYuval Mintz 
397337bff2b9SYuval Mintz 	/* Mark the event and schedule the workqueue */
3974fd3c615aSMintz, Yuval 	p_vf->vf_mbx.b_pending_msg = true;
397537bff2b9SYuval Mintz 	qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
397637bff2b9SYuval Mintz 
397737bff2b9SYuval Mintz 	return 0;
397837bff2b9SYuval Mintz }
397937bff2b9SYuval Mintz 
39807eff82b0SYuval Mintz static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
39817eff82b0SYuval Mintz 				     struct malicious_vf_eqe_data *p_data)
39827eff82b0SYuval Mintz {
39837eff82b0SYuval Mintz 	struct qed_vf_info *p_vf;
39847eff82b0SYuval Mintz 
39857eff82b0SYuval Mintz 	p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
39867eff82b0SYuval Mintz 
39877eff82b0SYuval Mintz 	if (!p_vf)
39887eff82b0SYuval Mintz 		return;
39897eff82b0SYuval Mintz 
3990e99a21cbSMintz, Yuval 	if (!p_vf->b_malicious) {
3991e99a21cbSMintz, Yuval 		DP_NOTICE(p_hwfn,
39927eff82b0SYuval Mintz 			  "VF [%d] - Malicious behavior [%02x]\n",
39937eff82b0SYuval Mintz 			  p_vf->abs_vf_id, p_data->err_id);
39947eff82b0SYuval Mintz 
39957eff82b0SYuval Mintz 		p_vf->b_malicious = true;
3996e99a21cbSMintz, Yuval 	} else {
3997e99a21cbSMintz, Yuval 		DP_INFO(p_hwfn,
3998e99a21cbSMintz, Yuval 			"VF [%d] - Malicious behavior [%02x]\n",
3999e99a21cbSMintz, Yuval 			p_vf->abs_vf_id, p_data->err_id);
4000e99a21cbSMintz, Yuval 	}
40017eff82b0SYuval Mintz }
40027eff82b0SYuval Mintz 
40036c9e80eaSMichal Kalderon static int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
40046c9e80eaSMichal Kalderon 			       u8 opcode,
40056c9e80eaSMichal Kalderon 			       __le16 echo,
40066c9e80eaSMichal Kalderon 			       union event_ring_data *data, u8 fw_return_code)
400737bff2b9SYuval Mintz {
400837bff2b9SYuval Mintz 	switch (opcode) {
400937bff2b9SYuval Mintz 	case COMMON_EVENT_VF_PF_CHANNEL:
401037bff2b9SYuval Mintz 		return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
401137bff2b9SYuval Mintz 					  &data->vf_pf_channel.msg_addr);
40127eff82b0SYuval Mintz 	case COMMON_EVENT_MALICIOUS_VF:
40137eff82b0SYuval Mintz 		qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
40147eff82b0SYuval Mintz 		return 0;
401537bff2b9SYuval Mintz 	default:
401637bff2b9SYuval Mintz 		DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
401737bff2b9SYuval Mintz 			opcode);
401837bff2b9SYuval Mintz 		return -EINVAL;
401937bff2b9SYuval Mintz 	}
402037bff2b9SYuval Mintz }
402137bff2b9SYuval Mintz 
402232a47e72SYuval Mintz u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
402332a47e72SYuval Mintz {
402432a47e72SYuval Mintz 	struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
402532a47e72SYuval Mintz 	u16 i;
402632a47e72SYuval Mintz 
402732a47e72SYuval Mintz 	if (!p_iov)
402832a47e72SYuval Mintz 		goto out;
402932a47e72SYuval Mintz 
403032a47e72SYuval Mintz 	for (i = rel_vf_id; i < p_iov->total_vfs; i++)
40317eff82b0SYuval Mintz 		if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
403232a47e72SYuval Mintz 			return i;
403332a47e72SYuval Mintz 
403432a47e72SYuval Mintz out:
403532a47e72SYuval Mintz 	return MAX_NUM_VFS;
403632a47e72SYuval Mintz }
403737bff2b9SYuval Mintz 
403837bff2b9SYuval Mintz static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
403937bff2b9SYuval Mintz 			       int vfid)
404037bff2b9SYuval Mintz {
404137bff2b9SYuval Mintz 	struct qed_dmae_params params;
404237bff2b9SYuval Mintz 	struct qed_vf_info *vf_info;
404337bff2b9SYuval Mintz 
404437bff2b9SYuval Mintz 	vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
404537bff2b9SYuval Mintz 	if (!vf_info)
404637bff2b9SYuval Mintz 		return -EINVAL;
404737bff2b9SYuval Mintz 
404837bff2b9SYuval Mintz 	memset(&params, 0, sizeof(struct qed_dmae_params));
404937bff2b9SYuval Mintz 	params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
405037bff2b9SYuval Mintz 	params.src_vfid = vf_info->abs_vf_id;
405137bff2b9SYuval Mintz 
405237bff2b9SYuval Mintz 	if (qed_dmae_host2host(p_hwfn, ptt,
405337bff2b9SYuval Mintz 			       vf_info->vf_mbx.pending_req,
405437bff2b9SYuval Mintz 			       vf_info->vf_mbx.req_phys,
405537bff2b9SYuval Mintz 			       sizeof(union vfpf_tlvs) / 4, &params)) {
405637bff2b9SYuval Mintz 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
405737bff2b9SYuval Mintz 			   "Failed to copy message from VF 0x%02x\n", vfid);
405837bff2b9SYuval Mintz 
405937bff2b9SYuval Mintz 		return -EIO;
406037bff2b9SYuval Mintz 	}
406137bff2b9SYuval Mintz 
406237bff2b9SYuval Mintz 	return 0;
406337bff2b9SYuval Mintz }
406437bff2b9SYuval Mintz 
4065eff16960SYuval Mintz static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
4066eff16960SYuval Mintz 					    u8 *mac, int vfid)
4067eff16960SYuval Mintz {
4068eff16960SYuval Mintz 	struct qed_vf_info *vf_info;
4069eff16960SYuval Mintz 	u64 feature;
4070eff16960SYuval Mintz 
4071eff16960SYuval Mintz 	vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
4072eff16960SYuval Mintz 	if (!vf_info) {
4073eff16960SYuval Mintz 		DP_NOTICE(p_hwfn->cdev,
4074eff16960SYuval Mintz 			  "Can not set forced MAC, invalid vfid [%d]\n", vfid);
4075eff16960SYuval Mintz 		return;
4076eff16960SYuval Mintz 	}
4077eff16960SYuval Mintz 
40787eff82b0SYuval Mintz 	if (vf_info->b_malicious) {
40797eff82b0SYuval Mintz 		DP_NOTICE(p_hwfn->cdev,
40807eff82b0SYuval Mintz 			  "Can't set forced MAC to malicious VF [%d]\n", vfid);
40817eff82b0SYuval Mintz 		return;
40827eff82b0SYuval Mintz 	}
40837eff82b0SYuval Mintz 
4084eff16960SYuval Mintz 	feature = 1 << MAC_ADDR_FORCED;
4085eff16960SYuval Mintz 	memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
4086eff16960SYuval Mintz 
4087eff16960SYuval Mintz 	vf_info->bulletin.p_virt->valid_bitmap |= feature;
4088eff16960SYuval Mintz 	/* Forced MAC will disable MAC_ADDR */
40891a635e48SYuval Mintz 	vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
4090eff16960SYuval Mintz 
4091eff16960SYuval Mintz 	qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
4092eff16960SYuval Mintz }
4093eff16960SYuval Mintz 
4094ba56947aSBaoyou Xie static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
409508feecd7SYuval Mintz 					     u16 pvid, int vfid)
409608feecd7SYuval Mintz {
409708feecd7SYuval Mintz 	struct qed_vf_info *vf_info;
409808feecd7SYuval Mintz 	u64 feature;
409908feecd7SYuval Mintz 
410008feecd7SYuval Mintz 	vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
410108feecd7SYuval Mintz 	if (!vf_info) {
410208feecd7SYuval Mintz 		DP_NOTICE(p_hwfn->cdev,
410308feecd7SYuval Mintz 			  "Can not set forced MAC, invalid vfid [%d]\n", vfid);
410408feecd7SYuval Mintz 		return;
410508feecd7SYuval Mintz 	}
410608feecd7SYuval Mintz 
41077eff82b0SYuval Mintz 	if (vf_info->b_malicious) {
41087eff82b0SYuval Mintz 		DP_NOTICE(p_hwfn->cdev,
41097eff82b0SYuval Mintz 			  "Can't set forced vlan to malicious VF [%d]\n", vfid);
41107eff82b0SYuval Mintz 		return;
41117eff82b0SYuval Mintz 	}
41127eff82b0SYuval Mintz 
411308feecd7SYuval Mintz 	feature = 1 << VLAN_ADDR_FORCED;
411408feecd7SYuval Mintz 	vf_info->bulletin.p_virt->pvid = pvid;
411508feecd7SYuval Mintz 	if (pvid)
411608feecd7SYuval Mintz 		vf_info->bulletin.p_virt->valid_bitmap |= feature;
411708feecd7SYuval Mintz 	else
411808feecd7SYuval Mintz 		vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
411908feecd7SYuval Mintz 
412008feecd7SYuval Mintz 	qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
412108feecd7SYuval Mintz }
412208feecd7SYuval Mintz 
412397379f15SChopra, Manish void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn,
412497379f15SChopra, Manish 				    int vfid, u16 vxlan_port, u16 geneve_port)
412597379f15SChopra, Manish {
412697379f15SChopra, Manish 	struct qed_vf_info *vf_info;
412797379f15SChopra, Manish 
412897379f15SChopra, Manish 	vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
412997379f15SChopra, Manish 	if (!vf_info) {
413097379f15SChopra, Manish 		DP_NOTICE(p_hwfn->cdev,
413197379f15SChopra, Manish 			  "Can not set udp ports, invalid vfid [%d]\n", vfid);
413297379f15SChopra, Manish 		return;
413397379f15SChopra, Manish 	}
413497379f15SChopra, Manish 
413597379f15SChopra, Manish 	if (vf_info->b_malicious) {
413697379f15SChopra, Manish 		DP_VERBOSE(p_hwfn, QED_MSG_IOV,
413797379f15SChopra, Manish 			   "Can not set udp ports to malicious VF [%d]\n",
413897379f15SChopra, Manish 			   vfid);
413997379f15SChopra, Manish 		return;
414097379f15SChopra, Manish 	}
414197379f15SChopra, Manish 
414297379f15SChopra, Manish 	vf_info->bulletin.p_virt->vxlan_udp_port = vxlan_port;
414397379f15SChopra, Manish 	vf_info->bulletin.p_virt->geneve_udp_port = geneve_port;
414497379f15SChopra, Manish }
414597379f15SChopra, Manish 
41466ddc7608SYuval Mintz static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
41476ddc7608SYuval Mintz {
41486ddc7608SYuval Mintz 	struct qed_vf_info *p_vf_info;
41496ddc7608SYuval Mintz 
41506ddc7608SYuval Mintz 	p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
41516ddc7608SYuval Mintz 	if (!p_vf_info)
41526ddc7608SYuval Mintz 		return false;
41536ddc7608SYuval Mintz 
41546ddc7608SYuval Mintz 	return !!p_vf_info->vport_instance;
41556ddc7608SYuval Mintz }
41566ddc7608SYuval Mintz 
4157ba56947aSBaoyou Xie static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
41580b55e27dSYuval Mintz {
41590b55e27dSYuval Mintz 	struct qed_vf_info *p_vf_info;
41600b55e27dSYuval Mintz 
41610b55e27dSYuval Mintz 	p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
41620b55e27dSYuval Mintz 	if (!p_vf_info)
41630b55e27dSYuval Mintz 		return true;
41640b55e27dSYuval Mintz 
41650b55e27dSYuval Mintz 	return p_vf_info->state == VF_STOPPED;
41660b55e27dSYuval Mintz }
41670b55e27dSYuval Mintz 
416873390ac9SYuval Mintz static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
416973390ac9SYuval Mintz {
417073390ac9SYuval Mintz 	struct qed_vf_info *vf_info;
417173390ac9SYuval Mintz 
417273390ac9SYuval Mintz 	vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
417373390ac9SYuval Mintz 	if (!vf_info)
417473390ac9SYuval Mintz 		return false;
417573390ac9SYuval Mintz 
417673390ac9SYuval Mintz 	return vf_info->spoof_chk;
417773390ac9SYuval Mintz }
417873390ac9SYuval Mintz 
4179ba56947aSBaoyou Xie static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
41806ddc7608SYuval Mintz {
41816ddc7608SYuval Mintz 	struct qed_vf_info *vf;
41826ddc7608SYuval Mintz 	int rc = -EINVAL;
41836ddc7608SYuval Mintz 
41846ddc7608SYuval Mintz 	if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
41856ddc7608SYuval Mintz 		DP_NOTICE(p_hwfn,
41866ddc7608SYuval Mintz 			  "SR-IOV sanity check failed, can't set spoofchk\n");
41876ddc7608SYuval Mintz 		goto out;
41886ddc7608SYuval Mintz 	}
41896ddc7608SYuval Mintz 
41906ddc7608SYuval Mintz 	vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
41916ddc7608SYuval Mintz 	if (!vf)
41926ddc7608SYuval Mintz 		goto out;
41936ddc7608SYuval Mintz 
41946ddc7608SYuval Mintz 	if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
41956ddc7608SYuval Mintz 		/* After VF VPORT start PF will configure spoof check */
41966ddc7608SYuval Mintz 		vf->req_spoofchk_val = val;
41976ddc7608SYuval Mintz 		rc = 0;
41986ddc7608SYuval Mintz 		goto out;
41996ddc7608SYuval Mintz 	}
42006ddc7608SYuval Mintz 
42016ddc7608SYuval Mintz 	rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
42026ddc7608SYuval Mintz 
42036ddc7608SYuval Mintz out:
42046ddc7608SYuval Mintz 	return rc;
42056ddc7608SYuval Mintz }
42066ddc7608SYuval Mintz 
4207eff16960SYuval Mintz static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
4208eff16960SYuval Mintz 					   u16 rel_vf_id)
4209eff16960SYuval Mintz {
4210eff16960SYuval Mintz 	struct qed_vf_info *p_vf;
4211eff16960SYuval Mintz 
4212eff16960SYuval Mintz 	p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
4213eff16960SYuval Mintz 	if (!p_vf || !p_vf->bulletin.p_virt)
4214eff16960SYuval Mintz 		return NULL;
4215eff16960SYuval Mintz 
42161a635e48SYuval Mintz 	if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
4217eff16960SYuval Mintz 		return NULL;
4218eff16960SYuval Mintz 
4219eff16960SYuval Mintz 	return p_vf->bulletin.p_virt->mac;
4220eff16960SYuval Mintz }
4221eff16960SYuval Mintz 
4222ba56947aSBaoyou Xie static u16
4223ba56947aSBaoyou Xie qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
422408feecd7SYuval Mintz {
422508feecd7SYuval Mintz 	struct qed_vf_info *p_vf;
422608feecd7SYuval Mintz 
422708feecd7SYuval Mintz 	p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
422808feecd7SYuval Mintz 	if (!p_vf || !p_vf->bulletin.p_virt)
422908feecd7SYuval Mintz 		return 0;
423008feecd7SYuval Mintz 
42311a635e48SYuval Mintz 	if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
423208feecd7SYuval Mintz 		return 0;
423308feecd7SYuval Mintz 
423408feecd7SYuval Mintz 	return p_vf->bulletin.p_virt->pvid;
423508feecd7SYuval Mintz }
423608feecd7SYuval Mintz 
4237733def6aSYuval Mintz static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
4238733def6aSYuval Mintz 				     struct qed_ptt *p_ptt, int vfid, int val)
4239733def6aSYuval Mintz {
4240733def6aSYuval Mintz 	struct qed_vf_info *vf;
4241733def6aSYuval Mintz 	u8 abs_vp_id = 0;
4242733def6aSYuval Mintz 	int rc;
4243733def6aSYuval Mintz 
4244733def6aSYuval Mintz 	vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
4245733def6aSYuval Mintz 	if (!vf)
4246733def6aSYuval Mintz 		return -EINVAL;
4247733def6aSYuval Mintz 
4248733def6aSYuval Mintz 	rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
4249733def6aSYuval Mintz 	if (rc)
4250733def6aSYuval Mintz 		return rc;
4251733def6aSYuval Mintz 
4252733def6aSYuval Mintz 	return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
4253733def6aSYuval Mintz }
4254733def6aSYuval Mintz 
4255ba56947aSBaoyou Xie static int
4256ba56947aSBaoyou Xie qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
4257733def6aSYuval Mintz {
4258733def6aSYuval Mintz 	struct qed_vf_info *vf;
4259733def6aSYuval Mintz 	u8 vport_id;
4260733def6aSYuval Mintz 	int i;
4261733def6aSYuval Mintz 
4262733def6aSYuval Mintz 	for_each_hwfn(cdev, i) {
4263733def6aSYuval Mintz 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4264733def6aSYuval Mintz 
4265733def6aSYuval Mintz 		if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
4266733def6aSYuval Mintz 			DP_NOTICE(p_hwfn,
4267733def6aSYuval Mintz 				  "SR-IOV sanity check failed, can't set min rate\n");
4268733def6aSYuval Mintz 			return -EINVAL;
4269733def6aSYuval Mintz 		}
4270733def6aSYuval Mintz 	}
4271733def6aSYuval Mintz 
4272733def6aSYuval Mintz 	vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
4273733def6aSYuval Mintz 	vport_id = vf->vport_id;
4274733def6aSYuval Mintz 
4275733def6aSYuval Mintz 	return qed_configure_vport_wfq(cdev, vport_id, rate);
4276733def6aSYuval Mintz }
4277733def6aSYuval Mintz 
427873390ac9SYuval Mintz static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
427973390ac9SYuval Mintz {
428073390ac9SYuval Mintz 	struct qed_wfq_data *vf_vp_wfq;
428173390ac9SYuval Mintz 	struct qed_vf_info *vf_info;
428273390ac9SYuval Mintz 
428373390ac9SYuval Mintz 	vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
428473390ac9SYuval Mintz 	if (!vf_info)
428573390ac9SYuval Mintz 		return 0;
428673390ac9SYuval Mintz 
428773390ac9SYuval Mintz 	vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
428873390ac9SYuval Mintz 
428973390ac9SYuval Mintz 	if (vf_vp_wfq->configured)
429073390ac9SYuval Mintz 		return vf_vp_wfq->min_speed;
429173390ac9SYuval Mintz 	else
429273390ac9SYuval Mintz 		return 0;
429373390ac9SYuval Mintz }
429473390ac9SYuval Mintz 
429537bff2b9SYuval Mintz /**
429637bff2b9SYuval Mintz  * qed_schedule_iov - schedules IOV task for VF and PF
429737bff2b9SYuval Mintz  * @hwfn: hardware function pointer
429837bff2b9SYuval Mintz  * @flag: IOV flag for VF/PF
429937bff2b9SYuval Mintz  */
430037bff2b9SYuval Mintz void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
430137bff2b9SYuval Mintz {
430237bff2b9SYuval Mintz 	smp_mb__before_atomic();
430337bff2b9SYuval Mintz 	set_bit(flag, &hwfn->iov_task_flags);
430437bff2b9SYuval Mintz 	smp_mb__after_atomic();
430537bff2b9SYuval Mintz 	DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
430637bff2b9SYuval Mintz 	queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
430737bff2b9SYuval Mintz }
430837bff2b9SYuval Mintz 
43091408cc1fSYuval Mintz void qed_vf_start_iov_wq(struct qed_dev *cdev)
43101408cc1fSYuval Mintz {
43111408cc1fSYuval Mintz 	int i;
43121408cc1fSYuval Mintz 
43131408cc1fSYuval Mintz 	for_each_hwfn(cdev, i)
43141408cc1fSYuval Mintz 	    queue_delayed_work(cdev->hwfns[i].iov_wq,
43151408cc1fSYuval Mintz 			       &cdev->hwfns[i].iov_task, 0);
43161408cc1fSYuval Mintz }
43171408cc1fSYuval Mintz 
43180b55e27dSYuval Mintz int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
43190b55e27dSYuval Mintz {
43200b55e27dSYuval Mintz 	int i, j;
43210b55e27dSYuval Mintz 
43220b55e27dSYuval Mintz 	for_each_hwfn(cdev, i)
43230b55e27dSYuval Mintz 	    if (cdev->hwfns[i].iov_wq)
43240b55e27dSYuval Mintz 		flush_workqueue(cdev->hwfns[i].iov_wq);
43250b55e27dSYuval Mintz 
43260b55e27dSYuval Mintz 	/* Mark VFs for disablement */
43270b55e27dSYuval Mintz 	qed_iov_set_vfs_to_disable(cdev, true);
43280b55e27dSYuval Mintz 
43290b55e27dSYuval Mintz 	if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
43300b55e27dSYuval Mintz 		pci_disable_sriov(cdev->pdev);
43310b55e27dSYuval Mintz 
43320b55e27dSYuval Mintz 	for_each_hwfn(cdev, i) {
43330b55e27dSYuval Mintz 		struct qed_hwfn *hwfn = &cdev->hwfns[i];
43340b55e27dSYuval Mintz 		struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
43350b55e27dSYuval Mintz 
43360b55e27dSYuval Mintz 		/* Failure to acquire the ptt in 100g creates an odd error
43370b55e27dSYuval Mintz 		 * where the first engine has already relased IOV.
43380b55e27dSYuval Mintz 		 */
43390b55e27dSYuval Mintz 		if (!ptt) {
43400b55e27dSYuval Mintz 			DP_ERR(hwfn, "Failed to acquire ptt\n");
43410b55e27dSYuval Mintz 			return -EBUSY;
43420b55e27dSYuval Mintz 		}
43430b55e27dSYuval Mintz 
4344733def6aSYuval Mintz 		/* Clean WFQ db and configure equal weight for all vports */
4345733def6aSYuval Mintz 		qed_clean_wfq_db(hwfn, ptt);
4346733def6aSYuval Mintz 
43470b55e27dSYuval Mintz 		qed_for_each_vf(hwfn, j) {
43480b55e27dSYuval Mintz 			int k;
43490b55e27dSYuval Mintz 
43507eff82b0SYuval Mintz 			if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
43510b55e27dSYuval Mintz 				continue;
43520b55e27dSYuval Mintz 
43530b55e27dSYuval Mintz 			/* Wait until VF is disabled before releasing */
43540b55e27dSYuval Mintz 			for (k = 0; k < 100; k++) {
43550b55e27dSYuval Mintz 				if (!qed_iov_is_vf_stopped(hwfn, j))
43560b55e27dSYuval Mintz 					msleep(20);
43570b55e27dSYuval Mintz 				else
43580b55e27dSYuval Mintz 					break;
43590b55e27dSYuval Mintz 			}
43600b55e27dSYuval Mintz 
43610b55e27dSYuval Mintz 			if (k < 100)
43620b55e27dSYuval Mintz 				qed_iov_release_hw_for_vf(&cdev->hwfns[i],
43630b55e27dSYuval Mintz 							  ptt, j);
43640b55e27dSYuval Mintz 			else
43650b55e27dSYuval Mintz 				DP_ERR(hwfn,
43660b55e27dSYuval Mintz 				       "Timeout waiting for VF's FLR to end\n");
43670b55e27dSYuval Mintz 		}
43680b55e27dSYuval Mintz 
43690b55e27dSYuval Mintz 		qed_ptt_release(hwfn, ptt);
43700b55e27dSYuval Mintz 	}
43710b55e27dSYuval Mintz 
43720b55e27dSYuval Mintz 	qed_iov_set_vfs_to_disable(cdev, false);
43730b55e27dSYuval Mintz 
43740b55e27dSYuval Mintz 	return 0;
43750b55e27dSYuval Mintz }
43760b55e27dSYuval Mintz 
43773da7a37aSMintz, Yuval static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
43783da7a37aSMintz, Yuval 					u16 vfid,
43793da7a37aSMintz, Yuval 					struct qed_iov_vf_init_params *params)
43803da7a37aSMintz, Yuval {
43813da7a37aSMintz, Yuval 	u16 base, i;
43823da7a37aSMintz, Yuval 
43833da7a37aSMintz, Yuval 	/* Since we have an equal resource distribution per-VF, and we assume
43843da7a37aSMintz, Yuval 	 * PF has acquired the QED_PF_L2_QUE first queues, we start setting
43853da7a37aSMintz, Yuval 	 * sequentially from there.
43863da7a37aSMintz, Yuval 	 */
43873da7a37aSMintz, Yuval 	base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
43883da7a37aSMintz, Yuval 
43893da7a37aSMintz, Yuval 	params->rel_vf_id = vfid;
43903da7a37aSMintz, Yuval 	for (i = 0; i < params->num_queues; i++) {
43913da7a37aSMintz, Yuval 		params->req_rx_queue[i] = base + i;
43923da7a37aSMintz, Yuval 		params->req_tx_queue[i] = base + i;
43933da7a37aSMintz, Yuval 	}
43943da7a37aSMintz, Yuval }
43953da7a37aSMintz, Yuval 
43960b55e27dSYuval Mintz static int qed_sriov_enable(struct qed_dev *cdev, int num)
43970b55e27dSYuval Mintz {
43983da7a37aSMintz, Yuval 	struct qed_iov_vf_init_params params;
43990b55e27dSYuval Mintz 	int i, j, rc;
44000b55e27dSYuval Mintz 
44010b55e27dSYuval Mintz 	if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
44020b55e27dSYuval Mintz 		DP_NOTICE(cdev, "Can start at most %d VFs\n",
44030b55e27dSYuval Mintz 			  RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
44040b55e27dSYuval Mintz 		return -EINVAL;
44050b55e27dSYuval Mintz 	}
44060b55e27dSYuval Mintz 
44073da7a37aSMintz, Yuval 	memset(&params, 0, sizeof(params));
44083da7a37aSMintz, Yuval 
44090b55e27dSYuval Mintz 	/* Initialize HW for VF access */
44100b55e27dSYuval Mintz 	for_each_hwfn(cdev, j) {
44110b55e27dSYuval Mintz 		struct qed_hwfn *hwfn = &cdev->hwfns[j];
44120b55e27dSYuval Mintz 		struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
44135a1f965aSMintz, Yuval 
44145a1f965aSMintz, Yuval 		/* Make sure not to use more than 16 queues per VF */
44153da7a37aSMintz, Yuval 		params.num_queues = min_t(int,
44163da7a37aSMintz, Yuval 					  FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
44173da7a37aSMintz, Yuval 					  16);
44180b55e27dSYuval Mintz 
44190b55e27dSYuval Mintz 		if (!ptt) {
44200b55e27dSYuval Mintz 			DP_ERR(hwfn, "Failed to acquire ptt\n");
44210b55e27dSYuval Mintz 			rc = -EBUSY;
44220b55e27dSYuval Mintz 			goto err;
44230b55e27dSYuval Mintz 		}
44240b55e27dSYuval Mintz 
44250b55e27dSYuval Mintz 		for (i = 0; i < num; i++) {
44267eff82b0SYuval Mintz 			if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
44270b55e27dSYuval Mintz 				continue;
44280b55e27dSYuval Mintz 
44293da7a37aSMintz, Yuval 			qed_sriov_enable_qid_config(hwfn, i, &params);
44303da7a37aSMintz, Yuval 			rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
44310b55e27dSYuval Mintz 			if (rc) {
44320b55e27dSYuval Mintz 				DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
44330b55e27dSYuval Mintz 				qed_ptt_release(hwfn, ptt);
44340b55e27dSYuval Mintz 				goto err;
44350b55e27dSYuval Mintz 			}
44360b55e27dSYuval Mintz 		}
44370b55e27dSYuval Mintz 
44380b55e27dSYuval Mintz 		qed_ptt_release(hwfn, ptt);
44390b55e27dSYuval Mintz 	}
44400b55e27dSYuval Mintz 
44410b55e27dSYuval Mintz 	/* Enable SRIOV PCIe functions */
44420b55e27dSYuval Mintz 	rc = pci_enable_sriov(cdev->pdev, num);
44430b55e27dSYuval Mintz 	if (rc) {
44440b55e27dSYuval Mintz 		DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
44450b55e27dSYuval Mintz 		goto err;
44460b55e27dSYuval Mintz 	}
44470b55e27dSYuval Mintz 
44480b55e27dSYuval Mintz 	return num;
44490b55e27dSYuval Mintz 
44500b55e27dSYuval Mintz err:
44510b55e27dSYuval Mintz 	qed_sriov_disable(cdev, false);
44520b55e27dSYuval Mintz 	return rc;
44530b55e27dSYuval Mintz }
44540b55e27dSYuval Mintz 
44550b55e27dSYuval Mintz static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
44560b55e27dSYuval Mintz {
44570b55e27dSYuval Mintz 	if (!IS_QED_SRIOV(cdev)) {
44580b55e27dSYuval Mintz 		DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
44590b55e27dSYuval Mintz 		return -EOPNOTSUPP;
44600b55e27dSYuval Mintz 	}
44610b55e27dSYuval Mintz 
44620b55e27dSYuval Mintz 	if (num_vfs_param)
44630b55e27dSYuval Mintz 		return qed_sriov_enable(cdev, num_vfs_param);
44640b55e27dSYuval Mintz 	else
44650b55e27dSYuval Mintz 		return qed_sriov_disable(cdev, true);
44660b55e27dSYuval Mintz }
44670b55e27dSYuval Mintz 
4468eff16960SYuval Mintz static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
4469eff16960SYuval Mintz {
4470eff16960SYuval Mintz 	int i;
4471eff16960SYuval Mintz 
4472eff16960SYuval Mintz 	if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4473eff16960SYuval Mintz 		DP_VERBOSE(cdev, QED_MSG_IOV,
4474eff16960SYuval Mintz 			   "Cannot set a VF MAC; Sriov is not enabled\n");
4475eff16960SYuval Mintz 		return -EINVAL;
4476eff16960SYuval Mintz 	}
4477eff16960SYuval Mintz 
44787eff82b0SYuval Mintz 	if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
4479eff16960SYuval Mintz 		DP_VERBOSE(cdev, QED_MSG_IOV,
4480eff16960SYuval Mintz 			   "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4481eff16960SYuval Mintz 		return -EINVAL;
4482eff16960SYuval Mintz 	}
4483eff16960SYuval Mintz 
4484eff16960SYuval Mintz 	for_each_hwfn(cdev, i) {
4485eff16960SYuval Mintz 		struct qed_hwfn *hwfn = &cdev->hwfns[i];
4486eff16960SYuval Mintz 		struct qed_public_vf_info *vf_info;
4487eff16960SYuval Mintz 
4488eff16960SYuval Mintz 		vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4489eff16960SYuval Mintz 		if (!vf_info)
4490eff16960SYuval Mintz 			continue;
4491eff16960SYuval Mintz 
4492eff16960SYuval Mintz 		/* Set the forced MAC, and schedule the IOV task */
4493eff16960SYuval Mintz 		ether_addr_copy(vf_info->forced_mac, mac);
4494eff16960SYuval Mintz 		qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4495eff16960SYuval Mintz 	}
4496eff16960SYuval Mintz 
4497eff16960SYuval Mintz 	return 0;
4498eff16960SYuval Mintz }
4499eff16960SYuval Mintz 
450008feecd7SYuval Mintz static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
450108feecd7SYuval Mintz {
450208feecd7SYuval Mintz 	int i;
450308feecd7SYuval Mintz 
450408feecd7SYuval Mintz 	if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
450508feecd7SYuval Mintz 		DP_VERBOSE(cdev, QED_MSG_IOV,
450608feecd7SYuval Mintz 			   "Cannot set a VF MAC; Sriov is not enabled\n");
450708feecd7SYuval Mintz 		return -EINVAL;
450808feecd7SYuval Mintz 	}
450908feecd7SYuval Mintz 
45107eff82b0SYuval Mintz 	if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
451108feecd7SYuval Mintz 		DP_VERBOSE(cdev, QED_MSG_IOV,
451208feecd7SYuval Mintz 			   "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
451308feecd7SYuval Mintz 		return -EINVAL;
451408feecd7SYuval Mintz 	}
451508feecd7SYuval Mintz 
451608feecd7SYuval Mintz 	for_each_hwfn(cdev, i) {
451708feecd7SYuval Mintz 		struct qed_hwfn *hwfn = &cdev->hwfns[i];
451808feecd7SYuval Mintz 		struct qed_public_vf_info *vf_info;
451908feecd7SYuval Mintz 
452008feecd7SYuval Mintz 		vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
452108feecd7SYuval Mintz 		if (!vf_info)
452208feecd7SYuval Mintz 			continue;
452308feecd7SYuval Mintz 
452408feecd7SYuval Mintz 		/* Set the forced vlan, and schedule the IOV task */
452508feecd7SYuval Mintz 		vf_info->forced_vlan = vid;
452608feecd7SYuval Mintz 		qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
452708feecd7SYuval Mintz 	}
452808feecd7SYuval Mintz 
452908feecd7SYuval Mintz 	return 0;
453008feecd7SYuval Mintz }
453108feecd7SYuval Mintz 
453273390ac9SYuval Mintz static int qed_get_vf_config(struct qed_dev *cdev,
453373390ac9SYuval Mintz 			     int vf_id, struct ifla_vf_info *ivi)
453473390ac9SYuval Mintz {
453573390ac9SYuval Mintz 	struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
453673390ac9SYuval Mintz 	struct qed_public_vf_info *vf_info;
453773390ac9SYuval Mintz 	struct qed_mcp_link_state link;
453873390ac9SYuval Mintz 	u32 tx_rate;
453973390ac9SYuval Mintz 
454073390ac9SYuval Mintz 	/* Sanitize request */
454173390ac9SYuval Mintz 	if (IS_VF(cdev))
454273390ac9SYuval Mintz 		return -EINVAL;
454373390ac9SYuval Mintz 
45447eff82b0SYuval Mintz 	if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
454573390ac9SYuval Mintz 		DP_VERBOSE(cdev, QED_MSG_IOV,
454673390ac9SYuval Mintz 			   "VF index [%d] isn't active\n", vf_id);
454773390ac9SYuval Mintz 		return -EINVAL;
454873390ac9SYuval Mintz 	}
454973390ac9SYuval Mintz 
455073390ac9SYuval Mintz 	vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
455173390ac9SYuval Mintz 
455273390ac9SYuval Mintz 	qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
455373390ac9SYuval Mintz 
455473390ac9SYuval Mintz 	/* Fill information about VF */
455573390ac9SYuval Mintz 	ivi->vf = vf_id;
455673390ac9SYuval Mintz 
455773390ac9SYuval Mintz 	if (is_valid_ether_addr(vf_info->forced_mac))
455873390ac9SYuval Mintz 		ether_addr_copy(ivi->mac, vf_info->forced_mac);
455973390ac9SYuval Mintz 	else
456073390ac9SYuval Mintz 		ether_addr_copy(ivi->mac, vf_info->mac);
456173390ac9SYuval Mintz 
456273390ac9SYuval Mintz 	ivi->vlan = vf_info->forced_vlan;
456373390ac9SYuval Mintz 	ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
456473390ac9SYuval Mintz 	ivi->linkstate = vf_info->link_state;
456573390ac9SYuval Mintz 	tx_rate = vf_info->tx_rate;
456673390ac9SYuval Mintz 	ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
456773390ac9SYuval Mintz 	ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
456873390ac9SYuval Mintz 
456973390ac9SYuval Mintz 	return 0;
457073390ac9SYuval Mintz }
457173390ac9SYuval Mintz 
457236558c3dSYuval Mintz void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
457336558c3dSYuval Mintz {
4574e50728efSMintz, Yuval 	struct qed_hwfn *lead_hwfn = QED_LEADING_HWFN(hwfn->cdev);
457536558c3dSYuval Mintz 	struct qed_mcp_link_capabilities caps;
457636558c3dSYuval Mintz 	struct qed_mcp_link_params params;
457736558c3dSYuval Mintz 	struct qed_mcp_link_state link;
457836558c3dSYuval Mintz 	int i;
457936558c3dSYuval Mintz 
458036558c3dSYuval Mintz 	if (!hwfn->pf_iov_info)
458136558c3dSYuval Mintz 		return;
458236558c3dSYuval Mintz 
458336558c3dSYuval Mintz 	/* Update bulletin of all future possible VFs with link configuration */
458436558c3dSYuval Mintz 	for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
4585733def6aSYuval Mintz 		struct qed_public_vf_info *vf_info;
4586733def6aSYuval Mintz 
4587733def6aSYuval Mintz 		vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
4588733def6aSYuval Mintz 		if (!vf_info)
4589733def6aSYuval Mintz 			continue;
4590733def6aSYuval Mintz 
4591e50728efSMintz, Yuval 		/* Only hwfn0 is actually interested in the link speed.
4592e50728efSMintz, Yuval 		 * But since only it would receive an MFW indication of link,
4593e50728efSMintz, Yuval 		 * need to take configuration from it - otherwise things like
4594e50728efSMintz, Yuval 		 * rate limiting for hwfn1 VF would not work.
4595e50728efSMintz, Yuval 		 */
4596e50728efSMintz, Yuval 		memcpy(&params, qed_mcp_get_link_params(lead_hwfn),
4597e50728efSMintz, Yuval 		       sizeof(params));
4598e50728efSMintz, Yuval 		memcpy(&link, qed_mcp_get_link_state(lead_hwfn), sizeof(link));
4599e50728efSMintz, Yuval 		memcpy(&caps, qed_mcp_get_link_capabilities(lead_hwfn),
460036558c3dSYuval Mintz 		       sizeof(caps));
460136558c3dSYuval Mintz 
4602733def6aSYuval Mintz 		/* Modify link according to the VF's configured link state */
4603733def6aSYuval Mintz 		switch (vf_info->link_state) {
4604733def6aSYuval Mintz 		case IFLA_VF_LINK_STATE_DISABLE:
4605733def6aSYuval Mintz 			link.link_up = false;
4606733def6aSYuval Mintz 			break;
4607733def6aSYuval Mintz 		case IFLA_VF_LINK_STATE_ENABLE:
4608733def6aSYuval Mintz 			link.link_up = true;
4609733def6aSYuval Mintz 			/* Set speed according to maximum supported by HW.
4610733def6aSYuval Mintz 			 * that is 40G for regular devices and 100G for CMT
4611733def6aSYuval Mintz 			 * mode devices.
4612733def6aSYuval Mintz 			 */
4613733def6aSYuval Mintz 			link.speed = (hwfn->cdev->num_hwfns > 1) ?
4614733def6aSYuval Mintz 				     100000 : 40000;
4615733def6aSYuval Mintz 		default:
4616733def6aSYuval Mintz 			/* In auto mode pass PF link image to VF */
4617733def6aSYuval Mintz 			break;
4618733def6aSYuval Mintz 		}
4619733def6aSYuval Mintz 
4620733def6aSYuval Mintz 		if (link.link_up && vf_info->tx_rate) {
4621733def6aSYuval Mintz 			struct qed_ptt *ptt;
4622733def6aSYuval Mintz 			int rate;
4623733def6aSYuval Mintz 
4624733def6aSYuval Mintz 			rate = min_t(int, vf_info->tx_rate, link.speed);
4625733def6aSYuval Mintz 
4626733def6aSYuval Mintz 			ptt = qed_ptt_acquire(hwfn);
4627733def6aSYuval Mintz 			if (!ptt) {
4628733def6aSYuval Mintz 				DP_NOTICE(hwfn, "Failed to acquire PTT\n");
4629733def6aSYuval Mintz 				return;
4630733def6aSYuval Mintz 			}
4631733def6aSYuval Mintz 
4632733def6aSYuval Mintz 			if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
4633733def6aSYuval Mintz 				vf_info->tx_rate = rate;
4634733def6aSYuval Mintz 				link.speed = rate;
4635733def6aSYuval Mintz 			}
4636733def6aSYuval Mintz 
4637733def6aSYuval Mintz 			qed_ptt_release(hwfn, ptt);
4638733def6aSYuval Mintz 		}
4639733def6aSYuval Mintz 
464036558c3dSYuval Mintz 		qed_iov_set_link(hwfn, i, &params, &link, &caps);
464136558c3dSYuval Mintz 	}
464236558c3dSYuval Mintz 
464336558c3dSYuval Mintz 	qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
464436558c3dSYuval Mintz }
464536558c3dSYuval Mintz 
4646733def6aSYuval Mintz static int qed_set_vf_link_state(struct qed_dev *cdev,
4647733def6aSYuval Mintz 				 int vf_id, int link_state)
4648733def6aSYuval Mintz {
4649733def6aSYuval Mintz 	int i;
4650733def6aSYuval Mintz 
4651733def6aSYuval Mintz 	/* Sanitize request */
4652733def6aSYuval Mintz 	if (IS_VF(cdev))
4653733def6aSYuval Mintz 		return -EINVAL;
4654733def6aSYuval Mintz 
46557eff82b0SYuval Mintz 	if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
4656733def6aSYuval Mintz 		DP_VERBOSE(cdev, QED_MSG_IOV,
4657733def6aSYuval Mintz 			   "VF index [%d] isn't active\n", vf_id);
4658733def6aSYuval Mintz 		return -EINVAL;
4659733def6aSYuval Mintz 	}
4660733def6aSYuval Mintz 
4661733def6aSYuval Mintz 	/* Handle configuration of link state */
4662733def6aSYuval Mintz 	for_each_hwfn(cdev, i) {
4663733def6aSYuval Mintz 		struct qed_hwfn *hwfn = &cdev->hwfns[i];
4664733def6aSYuval Mintz 		struct qed_public_vf_info *vf;
4665733def6aSYuval Mintz 
4666733def6aSYuval Mintz 		vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4667733def6aSYuval Mintz 		if (!vf)
4668733def6aSYuval Mintz 			continue;
4669733def6aSYuval Mintz 
4670733def6aSYuval Mintz 		if (vf->link_state == link_state)
4671733def6aSYuval Mintz 			continue;
4672733def6aSYuval Mintz 
4673733def6aSYuval Mintz 		vf->link_state = link_state;
4674733def6aSYuval Mintz 		qed_inform_vf_link_state(&cdev->hwfns[i]);
4675733def6aSYuval Mintz 	}
4676733def6aSYuval Mintz 
4677733def6aSYuval Mintz 	return 0;
4678733def6aSYuval Mintz }
4679733def6aSYuval Mintz 
46806ddc7608SYuval Mintz static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
46816ddc7608SYuval Mintz {
46826ddc7608SYuval Mintz 	int i, rc = -EINVAL;
46836ddc7608SYuval Mintz 
46846ddc7608SYuval Mintz 	for_each_hwfn(cdev, i) {
46856ddc7608SYuval Mintz 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
46866ddc7608SYuval Mintz 
46876ddc7608SYuval Mintz 		rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
46886ddc7608SYuval Mintz 		if (rc)
46896ddc7608SYuval Mintz 			break;
46906ddc7608SYuval Mintz 	}
46916ddc7608SYuval Mintz 
46926ddc7608SYuval Mintz 	return rc;
46936ddc7608SYuval Mintz }
46946ddc7608SYuval Mintz 
4695733def6aSYuval Mintz static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
4696733def6aSYuval Mintz {
4697733def6aSYuval Mintz 	int i;
4698733def6aSYuval Mintz 
4699733def6aSYuval Mintz 	for_each_hwfn(cdev, i) {
4700733def6aSYuval Mintz 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4701733def6aSYuval Mintz 		struct qed_public_vf_info *vf;
4702733def6aSYuval Mintz 
4703733def6aSYuval Mintz 		if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
4704733def6aSYuval Mintz 			DP_NOTICE(p_hwfn,
4705733def6aSYuval Mintz 				  "SR-IOV sanity check failed, can't set tx rate\n");
4706733def6aSYuval Mintz 			return -EINVAL;
4707733def6aSYuval Mintz 		}
4708733def6aSYuval Mintz 
4709733def6aSYuval Mintz 		vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
4710733def6aSYuval Mintz 
4711733def6aSYuval Mintz 		vf->tx_rate = rate;
4712733def6aSYuval Mintz 
4713733def6aSYuval Mintz 		qed_inform_vf_link_state(p_hwfn);
4714733def6aSYuval Mintz 	}
4715733def6aSYuval Mintz 
4716733def6aSYuval Mintz 	return 0;
4717733def6aSYuval Mintz }
4718733def6aSYuval Mintz 
4719733def6aSYuval Mintz static int qed_set_vf_rate(struct qed_dev *cdev,
4720733def6aSYuval Mintz 			   int vfid, u32 min_rate, u32 max_rate)
4721733def6aSYuval Mintz {
4722733def6aSYuval Mintz 	int rc_min = 0, rc_max = 0;
4723733def6aSYuval Mintz 
4724733def6aSYuval Mintz 	if (max_rate)
4725733def6aSYuval Mintz 		rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
4726733def6aSYuval Mintz 
4727733def6aSYuval Mintz 	if (min_rate)
4728733def6aSYuval Mintz 		rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
4729733def6aSYuval Mintz 
4730733def6aSYuval Mintz 	if (rc_max | rc_min)
4731733def6aSYuval Mintz 		return -EINVAL;
4732733def6aSYuval Mintz 
4733733def6aSYuval Mintz 	return 0;
4734733def6aSYuval Mintz }
4735733def6aSYuval Mintz 
4736f990c82cSMintz, Yuval static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust)
4737f990c82cSMintz, Yuval {
4738f990c82cSMintz, Yuval 	int i;
4739f990c82cSMintz, Yuval 
4740f990c82cSMintz, Yuval 	for_each_hwfn(cdev, i) {
4741f990c82cSMintz, Yuval 		struct qed_hwfn *hwfn = &cdev->hwfns[i];
4742f990c82cSMintz, Yuval 		struct qed_public_vf_info *vf;
4743f990c82cSMintz, Yuval 
4744f990c82cSMintz, Yuval 		if (!qed_iov_pf_sanity_check(hwfn, vfid)) {
4745f990c82cSMintz, Yuval 			DP_NOTICE(hwfn,
4746f990c82cSMintz, Yuval 				  "SR-IOV sanity check failed, can't set trust\n");
4747f990c82cSMintz, Yuval 			return -EINVAL;
4748f990c82cSMintz, Yuval 		}
4749f990c82cSMintz, Yuval 
4750f990c82cSMintz, Yuval 		vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
4751f990c82cSMintz, Yuval 
4752f990c82cSMintz, Yuval 		if (vf->is_trusted_request == trust)
4753f990c82cSMintz, Yuval 			return 0;
4754f990c82cSMintz, Yuval 		vf->is_trusted_request = trust;
4755f990c82cSMintz, Yuval 
4756f990c82cSMintz, Yuval 		qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG);
4757f990c82cSMintz, Yuval 	}
4758f990c82cSMintz, Yuval 
4759f990c82cSMintz, Yuval 	return 0;
4760f990c82cSMintz, Yuval }
4761f990c82cSMintz, Yuval 
476237bff2b9SYuval Mintz static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
476337bff2b9SYuval Mintz {
476437bff2b9SYuval Mintz 	u64 events[QED_VF_ARRAY_LENGTH];
476537bff2b9SYuval Mintz 	struct qed_ptt *ptt;
476637bff2b9SYuval Mintz 	int i;
476737bff2b9SYuval Mintz 
476837bff2b9SYuval Mintz 	ptt = qed_ptt_acquire(hwfn);
476937bff2b9SYuval Mintz 	if (!ptt) {
477037bff2b9SYuval Mintz 		DP_VERBOSE(hwfn, QED_MSG_IOV,
477137bff2b9SYuval Mintz 			   "Can't acquire PTT; re-scheduling\n");
477237bff2b9SYuval Mintz 		qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
477337bff2b9SYuval Mintz 		return;
477437bff2b9SYuval Mintz 	}
477537bff2b9SYuval Mintz 
4776fd3c615aSMintz, Yuval 	qed_iov_pf_get_pending_events(hwfn, events);
477737bff2b9SYuval Mintz 
477837bff2b9SYuval Mintz 	DP_VERBOSE(hwfn, QED_MSG_IOV,
477937bff2b9SYuval Mintz 		   "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
478037bff2b9SYuval Mintz 		   events[0], events[1], events[2]);
478137bff2b9SYuval Mintz 
478237bff2b9SYuval Mintz 	qed_for_each_vf(hwfn, i) {
478337bff2b9SYuval Mintz 		/* Skip VFs with no pending messages */
478437bff2b9SYuval Mintz 		if (!(events[i / 64] & (1ULL << (i % 64))))
478537bff2b9SYuval Mintz 			continue;
478637bff2b9SYuval Mintz 
478737bff2b9SYuval Mintz 		DP_VERBOSE(hwfn, QED_MSG_IOV,
478837bff2b9SYuval Mintz 			   "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
478937bff2b9SYuval Mintz 			   i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
479037bff2b9SYuval Mintz 
479137bff2b9SYuval Mintz 		/* Copy VF's message to PF's request buffer for that VF */
479237bff2b9SYuval Mintz 		if (qed_iov_copy_vf_msg(hwfn, ptt, i))
479337bff2b9SYuval Mintz 			continue;
479437bff2b9SYuval Mintz 
479537bff2b9SYuval Mintz 		qed_iov_process_mbx_req(hwfn, ptt, i);
479637bff2b9SYuval Mintz 	}
479737bff2b9SYuval Mintz 
479837bff2b9SYuval Mintz 	qed_ptt_release(hwfn, ptt);
479937bff2b9SYuval Mintz }
480037bff2b9SYuval Mintz 
480108feecd7SYuval Mintz static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
480208feecd7SYuval Mintz {
480308feecd7SYuval Mintz 	int i;
480408feecd7SYuval Mintz 
480508feecd7SYuval Mintz 	qed_for_each_vf(hwfn, i) {
480608feecd7SYuval Mintz 		struct qed_public_vf_info *info;
480708feecd7SYuval Mintz 		bool update = false;
4808eff16960SYuval Mintz 		u8 *mac;
480908feecd7SYuval Mintz 
481008feecd7SYuval Mintz 		info = qed_iov_get_public_vf_info(hwfn, i, true);
481108feecd7SYuval Mintz 		if (!info)
481208feecd7SYuval Mintz 			continue;
481308feecd7SYuval Mintz 
481408feecd7SYuval Mintz 		/* Update data on bulletin board */
4815eff16960SYuval Mintz 		mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
4816eff16960SYuval Mintz 		if (is_valid_ether_addr(info->forced_mac) &&
4817eff16960SYuval Mintz 		    (!mac || !ether_addr_equal(mac, info->forced_mac))) {
4818eff16960SYuval Mintz 			DP_VERBOSE(hwfn,
4819eff16960SYuval Mintz 				   QED_MSG_IOV,
4820eff16960SYuval Mintz 				   "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
4821eff16960SYuval Mintz 				   i,
4822eff16960SYuval Mintz 				   hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4823eff16960SYuval Mintz 
4824eff16960SYuval Mintz 			/* Update bulletin board with forced MAC */
4825eff16960SYuval Mintz 			qed_iov_bulletin_set_forced_mac(hwfn,
4826eff16960SYuval Mintz 							info->forced_mac, i);
4827eff16960SYuval Mintz 			update = true;
4828eff16960SYuval Mintz 		}
482908feecd7SYuval Mintz 
483008feecd7SYuval Mintz 		if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
483108feecd7SYuval Mintz 		    info->forced_vlan) {
483208feecd7SYuval Mintz 			DP_VERBOSE(hwfn,
483308feecd7SYuval Mintz 				   QED_MSG_IOV,
483408feecd7SYuval Mintz 				   "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
483508feecd7SYuval Mintz 				   info->forced_vlan,
483608feecd7SYuval Mintz 				   i,
483708feecd7SYuval Mintz 				   hwfn->cdev->p_iov_info->first_vf_in_pf + i);
483808feecd7SYuval Mintz 			qed_iov_bulletin_set_forced_vlan(hwfn,
483908feecd7SYuval Mintz 							 info->forced_vlan, i);
484008feecd7SYuval Mintz 			update = true;
484108feecd7SYuval Mintz 		}
484208feecd7SYuval Mintz 
484308feecd7SYuval Mintz 		if (update)
484408feecd7SYuval Mintz 			qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
484508feecd7SYuval Mintz 	}
484608feecd7SYuval Mintz }
484708feecd7SYuval Mintz 
484836558c3dSYuval Mintz static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
484936558c3dSYuval Mintz {
485036558c3dSYuval Mintz 	struct qed_ptt *ptt;
485136558c3dSYuval Mintz 	int i;
485236558c3dSYuval Mintz 
485336558c3dSYuval Mintz 	ptt = qed_ptt_acquire(hwfn);
485436558c3dSYuval Mintz 	if (!ptt) {
485536558c3dSYuval Mintz 		DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
485636558c3dSYuval Mintz 		qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
485736558c3dSYuval Mintz 		return;
485836558c3dSYuval Mintz 	}
485936558c3dSYuval Mintz 
486036558c3dSYuval Mintz 	qed_for_each_vf(hwfn, i)
486136558c3dSYuval Mintz 	    qed_iov_post_vf_bulletin(hwfn, i, ptt);
486236558c3dSYuval Mintz 
486336558c3dSYuval Mintz 	qed_ptt_release(hwfn, ptt);
486436558c3dSYuval Mintz }
486536558c3dSYuval Mintz 
4866f990c82cSMintz, Yuval static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn)
4867f990c82cSMintz, Yuval {
4868f990c82cSMintz, Yuval 	struct qed_sp_vport_update_params params;
4869f990c82cSMintz, Yuval 	struct qed_filter_accept_flags *flags;
4870f990c82cSMintz, Yuval 	struct qed_public_vf_info *vf_info;
4871f990c82cSMintz, Yuval 	struct qed_vf_info *vf;
4872f990c82cSMintz, Yuval 	u8 mask;
4873f990c82cSMintz, Yuval 	int i;
4874f990c82cSMintz, Yuval 
4875f990c82cSMintz, Yuval 	mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
4876f990c82cSMintz, Yuval 	flags = &params.accept_flags;
4877f990c82cSMintz, Yuval 
4878f990c82cSMintz, Yuval 	qed_for_each_vf(hwfn, i) {
4879f990c82cSMintz, Yuval 		/* Need to make sure current requested configuration didn't
4880f990c82cSMintz, Yuval 		 * flip so that we'll end up configuring something that's not
4881f990c82cSMintz, Yuval 		 * needed.
4882f990c82cSMintz, Yuval 		 */
4883f990c82cSMintz, Yuval 		vf_info = qed_iov_get_public_vf_info(hwfn, i, true);
4884f990c82cSMintz, Yuval 		if (vf_info->is_trusted_configured ==
4885f990c82cSMintz, Yuval 		    vf_info->is_trusted_request)
4886f990c82cSMintz, Yuval 			continue;
4887f990c82cSMintz, Yuval 		vf_info->is_trusted_configured = vf_info->is_trusted_request;
4888f990c82cSMintz, Yuval 
4889f990c82cSMintz, Yuval 		/* Validate that the VF has a configured vport */
4890f990c82cSMintz, Yuval 		vf = qed_iov_get_vf_info(hwfn, i, true);
4891f990c82cSMintz, Yuval 		if (!vf->vport_instance)
4892f990c82cSMintz, Yuval 			continue;
4893f990c82cSMintz, Yuval 
4894f990c82cSMintz, Yuval 		memset(&params, 0, sizeof(params));
4895f990c82cSMintz, Yuval 		params.opaque_fid = vf->opaque_fid;
4896f990c82cSMintz, Yuval 		params.vport_id = vf->vport_id;
4897f990c82cSMintz, Yuval 
4898f990c82cSMintz, Yuval 		if (vf_info->rx_accept_mode & mask) {
4899f990c82cSMintz, Yuval 			flags->update_rx_mode_config = 1;
4900f990c82cSMintz, Yuval 			flags->rx_accept_filter = vf_info->rx_accept_mode;
4901f990c82cSMintz, Yuval 		}
4902f990c82cSMintz, Yuval 
4903f990c82cSMintz, Yuval 		if (vf_info->tx_accept_mode & mask) {
4904f990c82cSMintz, Yuval 			flags->update_tx_mode_config = 1;
4905f990c82cSMintz, Yuval 			flags->tx_accept_filter = vf_info->tx_accept_mode;
4906f990c82cSMintz, Yuval 		}
4907f990c82cSMintz, Yuval 
4908f990c82cSMintz, Yuval 		/* Remove if needed; Otherwise this would set the mask */
4909f990c82cSMintz, Yuval 		if (!vf_info->is_trusted_configured) {
4910f990c82cSMintz, Yuval 			flags->rx_accept_filter &= ~mask;
4911f990c82cSMintz, Yuval 			flags->tx_accept_filter &= ~mask;
4912f990c82cSMintz, Yuval 		}
4913f990c82cSMintz, Yuval 
4914f990c82cSMintz, Yuval 		if (flags->update_rx_mode_config ||
4915f990c82cSMintz, Yuval 		    flags->update_tx_mode_config)
4916f990c82cSMintz, Yuval 			qed_sp_vport_update(hwfn, &params,
4917f990c82cSMintz, Yuval 					    QED_SPQ_MODE_EBLOCK, NULL);
4918f990c82cSMintz, Yuval 	}
4919f990c82cSMintz, Yuval }
4920f990c82cSMintz, Yuval 
4921ba56947aSBaoyou Xie static void qed_iov_pf_task(struct work_struct *work)
4922ba56947aSBaoyou Xie 
492337bff2b9SYuval Mintz {
492437bff2b9SYuval Mintz 	struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
492537bff2b9SYuval Mintz 					     iov_task.work);
49260b55e27dSYuval Mintz 	int rc;
492737bff2b9SYuval Mintz 
492837bff2b9SYuval Mintz 	if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
492937bff2b9SYuval Mintz 		return;
493037bff2b9SYuval Mintz 
49310b55e27dSYuval Mintz 	if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
49320b55e27dSYuval Mintz 		struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
49330b55e27dSYuval Mintz 
49340b55e27dSYuval Mintz 		if (!ptt) {
49350b55e27dSYuval Mintz 			qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
49360b55e27dSYuval Mintz 			return;
49370b55e27dSYuval Mintz 		}
49380b55e27dSYuval Mintz 
49390b55e27dSYuval Mintz 		rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
49400b55e27dSYuval Mintz 		if (rc)
49410b55e27dSYuval Mintz 			qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
49420b55e27dSYuval Mintz 
49430b55e27dSYuval Mintz 		qed_ptt_release(hwfn, ptt);
49440b55e27dSYuval Mintz 	}
49450b55e27dSYuval Mintz 
494637bff2b9SYuval Mintz 	if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
494737bff2b9SYuval Mintz 		qed_handle_vf_msg(hwfn);
494808feecd7SYuval Mintz 
494908feecd7SYuval Mintz 	if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
495008feecd7SYuval Mintz 			       &hwfn->iov_task_flags))
495108feecd7SYuval Mintz 		qed_handle_pf_set_vf_unicast(hwfn);
495208feecd7SYuval Mintz 
495336558c3dSYuval Mintz 	if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
495436558c3dSYuval Mintz 			       &hwfn->iov_task_flags))
495536558c3dSYuval Mintz 		qed_handle_bulletin_post(hwfn);
4956f990c82cSMintz, Yuval 
4957f990c82cSMintz, Yuval 	if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags))
4958f990c82cSMintz, Yuval 		qed_iov_handle_trust_change(hwfn);
495937bff2b9SYuval Mintz }
496037bff2b9SYuval Mintz 
496137bff2b9SYuval Mintz void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
496237bff2b9SYuval Mintz {
496337bff2b9SYuval Mintz 	int i;
496437bff2b9SYuval Mintz 
496537bff2b9SYuval Mintz 	for_each_hwfn(cdev, i) {
496637bff2b9SYuval Mintz 		if (!cdev->hwfns[i].iov_wq)
496737bff2b9SYuval Mintz 			continue;
496837bff2b9SYuval Mintz 
496937bff2b9SYuval Mintz 		if (schedule_first) {
497037bff2b9SYuval Mintz 			qed_schedule_iov(&cdev->hwfns[i],
497137bff2b9SYuval Mintz 					 QED_IOV_WQ_STOP_WQ_FLAG);
497237bff2b9SYuval Mintz 			cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
497337bff2b9SYuval Mintz 		}
497437bff2b9SYuval Mintz 
497537bff2b9SYuval Mintz 		flush_workqueue(cdev->hwfns[i].iov_wq);
497637bff2b9SYuval Mintz 		destroy_workqueue(cdev->hwfns[i].iov_wq);
497737bff2b9SYuval Mintz 	}
497837bff2b9SYuval Mintz }
497937bff2b9SYuval Mintz 
498037bff2b9SYuval Mintz int qed_iov_wq_start(struct qed_dev *cdev)
498137bff2b9SYuval Mintz {
498237bff2b9SYuval Mintz 	char name[NAME_SIZE];
498337bff2b9SYuval Mintz 	int i;
498437bff2b9SYuval Mintz 
498537bff2b9SYuval Mintz 	for_each_hwfn(cdev, i) {
498637bff2b9SYuval Mintz 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
498737bff2b9SYuval Mintz 
498836558c3dSYuval Mintz 		/* PFs needs a dedicated workqueue only if they support IOV.
498936558c3dSYuval Mintz 		 * VFs always require one.
499036558c3dSYuval Mintz 		 */
499136558c3dSYuval Mintz 		if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
499237bff2b9SYuval Mintz 			continue;
499337bff2b9SYuval Mintz 
499437bff2b9SYuval Mintz 		snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
499537bff2b9SYuval Mintz 			 cdev->pdev->bus->number,
499637bff2b9SYuval Mintz 			 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
499737bff2b9SYuval Mintz 
499837bff2b9SYuval Mintz 		p_hwfn->iov_wq = create_singlethread_workqueue(name);
499937bff2b9SYuval Mintz 		if (!p_hwfn->iov_wq) {
500037bff2b9SYuval Mintz 			DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
500137bff2b9SYuval Mintz 			return -ENOMEM;
500237bff2b9SYuval Mintz 		}
500337bff2b9SYuval Mintz 
500436558c3dSYuval Mintz 		if (IS_PF(cdev))
500537bff2b9SYuval Mintz 			INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
500636558c3dSYuval Mintz 		else
500736558c3dSYuval Mintz 			INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
500837bff2b9SYuval Mintz 	}
500937bff2b9SYuval Mintz 
501037bff2b9SYuval Mintz 	return 0;
501137bff2b9SYuval Mintz }
50120b55e27dSYuval Mintz 
50130b55e27dSYuval Mintz const struct qed_iov_hv_ops qed_iov_ops_pass = {
50140b55e27dSYuval Mintz 	.configure = &qed_sriov_configure,
5015eff16960SYuval Mintz 	.set_mac = &qed_sriov_pf_set_mac,
501608feecd7SYuval Mintz 	.set_vlan = &qed_sriov_pf_set_vlan,
501773390ac9SYuval Mintz 	.get_config = &qed_get_vf_config,
5018733def6aSYuval Mintz 	.set_link_state = &qed_set_vf_link_state,
50196ddc7608SYuval Mintz 	.set_spoof = &qed_spoof_configure,
5020733def6aSYuval Mintz 	.set_rate = &qed_set_vf_rate,
5021f990c82cSMintz, Yuval 	.set_trust = &qed_set_vf_trust,
50220b55e27dSYuval Mintz };
5023