132a47e72SYuval Mintz /* QLogic qed NIC Driver 2e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation 332a47e72SYuval Mintz * 4e8f1cb50SMintz, Yuval * This software is available to you under a choice of one of two 5e8f1cb50SMintz, Yuval * licenses. You may choose to be licensed under the terms of the GNU 6e8f1cb50SMintz, Yuval * General Public License (GPL) Version 2, available from the file 7e8f1cb50SMintz, Yuval * COPYING in the main directory of this source tree, or the 8e8f1cb50SMintz, Yuval * OpenIB.org BSD license below: 9e8f1cb50SMintz, Yuval * 10e8f1cb50SMintz, Yuval * Redistribution and use in source and binary forms, with or 11e8f1cb50SMintz, Yuval * without modification, are permitted provided that the following 12e8f1cb50SMintz, Yuval * conditions are met: 13e8f1cb50SMintz, Yuval * 14e8f1cb50SMintz, Yuval * - Redistributions of source code must retain the above 15e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 16e8f1cb50SMintz, Yuval * disclaimer. 17e8f1cb50SMintz, Yuval * 18e8f1cb50SMintz, Yuval * - Redistributions in binary form must reproduce the above 19e8f1cb50SMintz, Yuval * copyright notice, this list of conditions and the following 20e8f1cb50SMintz, Yuval * disclaimer in the documentation and /or other materials 21e8f1cb50SMintz, Yuval * provided with the distribution. 22e8f1cb50SMintz, Yuval * 23e8f1cb50SMintz, Yuval * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e8f1cb50SMintz, Yuval * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e8f1cb50SMintz, Yuval * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e8f1cb50SMintz, Yuval * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e8f1cb50SMintz, Yuval * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e8f1cb50SMintz, Yuval * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e8f1cb50SMintz, Yuval * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e8f1cb50SMintz, Yuval * SOFTWARE. 3132a47e72SYuval Mintz */ 3232a47e72SYuval Mintz 33dacd88d6SYuval Mintz #include <linux/etherdevice.h> 3436558c3dSYuval Mintz #include <linux/crc32.h> 35f29ffdb6SMintz, Yuval #include <linux/vmalloc.h> 360b55e27dSYuval Mintz #include <linux/qed/qed_iov_if.h> 371408cc1fSYuval Mintz #include "qed_cxt.h" 381408cc1fSYuval Mintz #include "qed_hsi.h" 3932a47e72SYuval Mintz #include "qed_hw.h" 401408cc1fSYuval Mintz #include "qed_init_ops.h" 4132a47e72SYuval Mintz #include "qed_int.h" 421408cc1fSYuval Mintz #include "qed_mcp.h" 4332a47e72SYuval Mintz #include "qed_reg_addr.h" 441408cc1fSYuval Mintz #include "qed_sp.h" 4532a47e72SYuval Mintz #include "qed_sriov.h" 4632a47e72SYuval Mintz #include "qed_vf.h" 476c9e80eaSMichal Kalderon static int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn, 486c9e80eaSMichal Kalderon u8 opcode, 496c9e80eaSMichal Kalderon __le16 echo, 506c9e80eaSMichal Kalderon union event_ring_data *data, u8 fw_return_code); 517425d822SShahed Shaikh static int qed_iov_bulletin_set_mac(struct qed_hwfn *p_hwfn, u8 *mac, int vfid); 5232a47e72SYuval Mintz 533b19f478SMintz, Yuval static u8 qed_vf_calculate_legacy(struct qed_vf_info *p_vf) 543b19f478SMintz, Yuval { 5508bc8f15SMintz, Yuval u8 legacy = 0; 563b19f478SMintz, Yuval 573b19f478SMintz, Yuval if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor == 583b19f478SMintz, Yuval ETH_HSI_VER_NO_PKT_LEN_TUNN) 593b19f478SMintz, Yuval legacy |= QED_QCID_LEGACY_VF_RX_PROD; 603b19f478SMintz, Yuval 6108bc8f15SMintz, Yuval if (!(p_vf->acquire.vfdev_info.capabilities & 6208bc8f15SMintz, Yuval VFPF_ACQUIRE_CAP_QUEUE_QIDS)) 6308bc8f15SMintz, Yuval legacy |= QED_QCID_LEGACY_VF_CID; 6408bc8f15SMintz, Yuval 653b19f478SMintz, Yuval return legacy; 663b19f478SMintz, Yuval } 673b19f478SMintz, Yuval 681408cc1fSYuval Mintz /* IOV ramrods */ 691fe614d1SYuval Mintz static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf) 701408cc1fSYuval Mintz { 711408cc1fSYuval Mintz struct vf_start_ramrod_data *p_ramrod = NULL; 721408cc1fSYuval Mintz struct qed_spq_entry *p_ent = NULL; 731408cc1fSYuval Mintz struct qed_sp_init_data init_data; 741408cc1fSYuval Mintz int rc = -EINVAL; 751fe614d1SYuval Mintz u8 fp_minor; 761408cc1fSYuval Mintz 771408cc1fSYuval Mintz /* Get SPQ entry */ 781408cc1fSYuval Mintz memset(&init_data, 0, sizeof(init_data)); 791408cc1fSYuval Mintz init_data.cid = qed_spq_get_cid(p_hwfn); 801fe614d1SYuval Mintz init_data.opaque_fid = p_vf->opaque_fid; 811408cc1fSYuval Mintz init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 821408cc1fSYuval Mintz 831408cc1fSYuval Mintz rc = qed_sp_init_request(p_hwfn, &p_ent, 841408cc1fSYuval Mintz COMMON_RAMROD_VF_START, 851408cc1fSYuval Mintz PROTOCOLID_COMMON, &init_data); 861408cc1fSYuval Mintz if (rc) 871408cc1fSYuval Mintz return rc; 881408cc1fSYuval Mintz 891408cc1fSYuval Mintz p_ramrod = &p_ent->ramrod.vf_start; 901408cc1fSYuval Mintz 911fe614d1SYuval Mintz p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID); 921fe614d1SYuval Mintz p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid); 931408cc1fSYuval Mintz 941fe614d1SYuval Mintz switch (p_hwfn->hw_info.personality) { 951fe614d1SYuval Mintz case QED_PCI_ETH: 961408cc1fSYuval Mintz p_ramrod->personality = PERSONALITY_ETH; 971fe614d1SYuval Mintz break; 981fe614d1SYuval Mintz case QED_PCI_ETH_ROCE: 991fe614d1SYuval Mintz p_ramrod->personality = PERSONALITY_RDMA_AND_ETH; 1001fe614d1SYuval Mintz break; 1011fe614d1SYuval Mintz default: 1021fe614d1SYuval Mintz DP_NOTICE(p_hwfn, "Unknown VF personality %d\n", 1031fe614d1SYuval Mintz p_hwfn->hw_info.personality); 1041fe614d1SYuval Mintz return -EINVAL; 1051fe614d1SYuval Mintz } 1061fe614d1SYuval Mintz 1071fe614d1SYuval Mintz fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor; 108a044df83SYuval Mintz if (fp_minor > ETH_HSI_VER_MINOR && 109a044df83SYuval Mintz fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) { 1101fe614d1SYuval Mintz DP_VERBOSE(p_hwfn, 1111fe614d1SYuval Mintz QED_MSG_IOV, 1121fe614d1SYuval Mintz "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n", 1131fe614d1SYuval Mintz p_vf->abs_vf_id, 1141fe614d1SYuval Mintz ETH_HSI_VER_MAJOR, 1151fe614d1SYuval Mintz fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR); 1161fe614d1SYuval Mintz fp_minor = ETH_HSI_VER_MINOR; 1171fe614d1SYuval Mintz } 1181fe614d1SYuval Mintz 119351a4dedSYuval Mintz p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR; 1201fe614d1SYuval Mintz p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor; 1211fe614d1SYuval Mintz 1221fe614d1SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 1231fe614d1SYuval Mintz "VF[%d] - Starting using HSI %02x.%02x\n", 1241fe614d1SYuval Mintz p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor); 1251408cc1fSYuval Mintz 1261408cc1fSYuval Mintz return qed_spq_post(p_hwfn, p_ent, NULL); 1271408cc1fSYuval Mintz } 1281408cc1fSYuval Mintz 1290b55e27dSYuval Mintz static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn, 1300b55e27dSYuval Mintz u32 concrete_vfid, u16 opaque_vfid) 1310b55e27dSYuval Mintz { 1320b55e27dSYuval Mintz struct vf_stop_ramrod_data *p_ramrod = NULL; 1330b55e27dSYuval Mintz struct qed_spq_entry *p_ent = NULL; 1340b55e27dSYuval Mintz struct qed_sp_init_data init_data; 1350b55e27dSYuval Mintz int rc = -EINVAL; 1360b55e27dSYuval Mintz 1370b55e27dSYuval Mintz /* Get SPQ entry */ 1380b55e27dSYuval Mintz memset(&init_data, 0, sizeof(init_data)); 1390b55e27dSYuval Mintz init_data.cid = qed_spq_get_cid(p_hwfn); 1400b55e27dSYuval Mintz init_data.opaque_fid = opaque_vfid; 1410b55e27dSYuval Mintz init_data.comp_mode = QED_SPQ_MODE_EBLOCK; 1420b55e27dSYuval Mintz 1430b55e27dSYuval Mintz rc = qed_sp_init_request(p_hwfn, &p_ent, 1440b55e27dSYuval Mintz COMMON_RAMROD_VF_STOP, 1450b55e27dSYuval Mintz PROTOCOLID_COMMON, &init_data); 1460b55e27dSYuval Mintz if (rc) 1470b55e27dSYuval Mintz return rc; 1480b55e27dSYuval Mintz 1490b55e27dSYuval Mintz p_ramrod = &p_ent->ramrod.vf_stop; 1500b55e27dSYuval Mintz 1510b55e27dSYuval Mintz p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID); 1520b55e27dSYuval Mintz 1530b55e27dSYuval Mintz return qed_spq_post(p_hwfn, p_ent, NULL); 1540b55e27dSYuval Mintz } 1550b55e27dSYuval Mintz 156da090917STomer Tayar bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn, 1577eff82b0SYuval Mintz int rel_vf_id, 1587eff82b0SYuval Mintz bool b_enabled_only, bool b_non_malicious) 15932a47e72SYuval Mintz { 16032a47e72SYuval Mintz if (!p_hwfn->pf_iov_info) { 16132a47e72SYuval Mintz DP_NOTICE(p_hwfn->cdev, "No iov info\n"); 16232a47e72SYuval Mintz return false; 16332a47e72SYuval Mintz } 16432a47e72SYuval Mintz 16532a47e72SYuval Mintz if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) || 16632a47e72SYuval Mintz (rel_vf_id < 0)) 16732a47e72SYuval Mintz return false; 16832a47e72SYuval Mintz 16932a47e72SYuval Mintz if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) && 17032a47e72SYuval Mintz b_enabled_only) 17132a47e72SYuval Mintz return false; 17232a47e72SYuval Mintz 1737eff82b0SYuval Mintz if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) && 1747eff82b0SYuval Mintz b_non_malicious) 1757eff82b0SYuval Mintz return false; 1767eff82b0SYuval Mintz 17732a47e72SYuval Mintz return true; 17832a47e72SYuval Mintz } 17932a47e72SYuval Mintz 18037bff2b9SYuval Mintz static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn, 18137bff2b9SYuval Mintz u16 relative_vf_id, 18237bff2b9SYuval Mintz bool b_enabled_only) 18337bff2b9SYuval Mintz { 18437bff2b9SYuval Mintz struct qed_vf_info *vf = NULL; 18537bff2b9SYuval Mintz 18637bff2b9SYuval Mintz if (!p_hwfn->pf_iov_info) { 18737bff2b9SYuval Mintz DP_NOTICE(p_hwfn->cdev, "No iov info\n"); 18837bff2b9SYuval Mintz return NULL; 18937bff2b9SYuval Mintz } 19037bff2b9SYuval Mintz 1917eff82b0SYuval Mintz if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id, 1927eff82b0SYuval Mintz b_enabled_only, false)) 19337bff2b9SYuval Mintz vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id]; 19437bff2b9SYuval Mintz else 19537bff2b9SYuval Mintz DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n", 19637bff2b9SYuval Mintz relative_vf_id); 19737bff2b9SYuval Mintz 19837bff2b9SYuval Mintz return vf; 19937bff2b9SYuval Mintz } 20037bff2b9SYuval Mintz 201007bc371SMintz, Yuval static struct qed_queue_cid * 202007bc371SMintz, Yuval qed_iov_get_vf_rx_queue_cid(struct qed_vf_queue *p_queue) 203007bc371SMintz, Yuval { 204007bc371SMintz, Yuval int i; 205007bc371SMintz, Yuval 206007bc371SMintz, Yuval for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) { 207007bc371SMintz, Yuval if (p_queue->cids[i].p_cid && !p_queue->cids[i].b_is_tx) 208007bc371SMintz, Yuval return p_queue->cids[i].p_cid; 209007bc371SMintz, Yuval } 210007bc371SMintz, Yuval 211007bc371SMintz, Yuval return NULL; 212007bc371SMintz, Yuval } 213007bc371SMintz, Yuval 214f109c240SMintz, Yuval enum qed_iov_validate_q_mode { 215f109c240SMintz, Yuval QED_IOV_VALIDATE_Q_NA, 216f109c240SMintz, Yuval QED_IOV_VALIDATE_Q_ENABLE, 217f109c240SMintz, Yuval QED_IOV_VALIDATE_Q_DISABLE, 218f109c240SMintz, Yuval }; 219f109c240SMintz, Yuval 220f109c240SMintz, Yuval static bool qed_iov_validate_queue_mode(struct qed_hwfn *p_hwfn, 221f109c240SMintz, Yuval struct qed_vf_info *p_vf, 222f109c240SMintz, Yuval u16 qid, 223f109c240SMintz, Yuval enum qed_iov_validate_q_mode mode, 224f109c240SMintz, Yuval bool b_is_tx) 22541086467SYuval Mintz { 226007bc371SMintz, Yuval int i; 227007bc371SMintz, Yuval 228f109c240SMintz, Yuval if (mode == QED_IOV_VALIDATE_Q_NA) 229f109c240SMintz, Yuval return true; 230f109c240SMintz, Yuval 231007bc371SMintz, Yuval for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) { 232007bc371SMintz, Yuval struct qed_vf_queue_cid *p_qcid; 233007bc371SMintz, Yuval 234007bc371SMintz, Yuval p_qcid = &p_vf->vf_queues[qid].cids[i]; 235007bc371SMintz, Yuval 236007bc371SMintz, Yuval if (!p_qcid->p_cid) 237007bc371SMintz, Yuval continue; 238007bc371SMintz, Yuval 239007bc371SMintz, Yuval if (p_qcid->b_is_tx != b_is_tx) 240007bc371SMintz, Yuval continue; 241007bc371SMintz, Yuval 242f109c240SMintz, Yuval return mode == QED_IOV_VALIDATE_Q_ENABLE; 243007bc371SMintz, Yuval } 244f109c240SMintz, Yuval 245f109c240SMintz, Yuval /* In case we haven't found any valid cid, then its disabled */ 246f109c240SMintz, Yuval return mode == QED_IOV_VALIDATE_Q_DISABLE; 247f109c240SMintz, Yuval } 248f109c240SMintz, Yuval 249f109c240SMintz, Yuval static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn, 250f109c240SMintz, Yuval struct qed_vf_info *p_vf, 251f109c240SMintz, Yuval u16 rx_qid, 252f109c240SMintz, Yuval enum qed_iov_validate_q_mode mode) 253f109c240SMintz, Yuval { 254f109c240SMintz, Yuval if (rx_qid >= p_vf->num_rxqs) { 25541086467SYuval Mintz DP_VERBOSE(p_hwfn, 25641086467SYuval Mintz QED_MSG_IOV, 25741086467SYuval Mintz "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n", 25841086467SYuval Mintz p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs); 259f109c240SMintz, Yuval return false; 260f109c240SMintz, Yuval } 261f109c240SMintz, Yuval 262f109c240SMintz, Yuval return qed_iov_validate_queue_mode(p_hwfn, p_vf, rx_qid, mode, false); 26341086467SYuval Mintz } 26441086467SYuval Mintz 26541086467SYuval Mintz static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn, 266f109c240SMintz, Yuval struct qed_vf_info *p_vf, 267f109c240SMintz, Yuval u16 tx_qid, 268f109c240SMintz, Yuval enum qed_iov_validate_q_mode mode) 26941086467SYuval Mintz { 270f109c240SMintz, Yuval if (tx_qid >= p_vf->num_txqs) { 27141086467SYuval Mintz DP_VERBOSE(p_hwfn, 27241086467SYuval Mintz QED_MSG_IOV, 27341086467SYuval Mintz "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n", 27441086467SYuval Mintz p_vf->abs_vf_id, tx_qid, p_vf->num_txqs); 275f109c240SMintz, Yuval return false; 276f109c240SMintz, Yuval } 277f109c240SMintz, Yuval 278f109c240SMintz, Yuval return qed_iov_validate_queue_mode(p_hwfn, p_vf, tx_qid, mode, true); 27941086467SYuval Mintz } 28041086467SYuval Mintz 28141086467SYuval Mintz static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn, 28241086467SYuval Mintz struct qed_vf_info *p_vf, u16 sb_idx) 28341086467SYuval Mintz { 28441086467SYuval Mintz int i; 28541086467SYuval Mintz 28641086467SYuval Mintz for (i = 0; i < p_vf->num_sbs; i++) 28741086467SYuval Mintz if (p_vf->igu_sbs[i] == sb_idx) 28841086467SYuval Mintz return true; 28941086467SYuval Mintz 29041086467SYuval Mintz DP_VERBOSE(p_hwfn, 29141086467SYuval Mintz QED_MSG_IOV, 29241086467SYuval Mintz "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n", 29341086467SYuval Mintz p_vf->abs_vf_id, sb_idx, p_vf->num_sbs); 29441086467SYuval Mintz 29541086467SYuval Mintz return false; 29641086467SYuval Mintz } 29741086467SYuval Mintz 298f109c240SMintz, Yuval static bool qed_iov_validate_active_rxq(struct qed_hwfn *p_hwfn, 299f109c240SMintz, Yuval struct qed_vf_info *p_vf) 300f109c240SMintz, Yuval { 301f109c240SMintz, Yuval u8 i; 302f109c240SMintz, Yuval 303f109c240SMintz, Yuval for (i = 0; i < p_vf->num_rxqs; i++) 304f109c240SMintz, Yuval if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i, 305f109c240SMintz, Yuval QED_IOV_VALIDATE_Q_ENABLE, 306f109c240SMintz, Yuval false)) 307f109c240SMintz, Yuval return true; 308f109c240SMintz, Yuval 309f109c240SMintz, Yuval return false; 310f109c240SMintz, Yuval } 311f109c240SMintz, Yuval 312f109c240SMintz, Yuval static bool qed_iov_validate_active_txq(struct qed_hwfn *p_hwfn, 313f109c240SMintz, Yuval struct qed_vf_info *p_vf) 314f109c240SMintz, Yuval { 315f109c240SMintz, Yuval u8 i; 316f109c240SMintz, Yuval 317f109c240SMintz, Yuval for (i = 0; i < p_vf->num_txqs; i++) 318f109c240SMintz, Yuval if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i, 319f109c240SMintz, Yuval QED_IOV_VALIDATE_Q_ENABLE, 320f109c240SMintz, Yuval true)) 321f109c240SMintz, Yuval return true; 322f109c240SMintz, Yuval 323f109c240SMintz, Yuval return false; 324f109c240SMintz, Yuval } 325f109c240SMintz, Yuval 326ba56947aSBaoyou Xie static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn, 32736558c3dSYuval Mintz int vfid, struct qed_ptt *p_ptt) 32836558c3dSYuval Mintz { 32936558c3dSYuval Mintz struct qed_bulletin_content *p_bulletin; 33036558c3dSYuval Mintz int crc_size = sizeof(p_bulletin->crc); 33136558c3dSYuval Mintz struct qed_dmae_params params; 33236558c3dSYuval Mintz struct qed_vf_info *p_vf; 33336558c3dSYuval Mintz 33436558c3dSYuval Mintz p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 33536558c3dSYuval Mintz if (!p_vf) 33636558c3dSYuval Mintz return -EINVAL; 33736558c3dSYuval Mintz 33836558c3dSYuval Mintz if (!p_vf->vf_bulletin) 33936558c3dSYuval Mintz return -EINVAL; 34036558c3dSYuval Mintz 34136558c3dSYuval Mintz p_bulletin = p_vf->bulletin.p_virt; 34236558c3dSYuval Mintz 34336558c3dSYuval Mintz /* Increment bulletin board version and compute crc */ 34436558c3dSYuval Mintz p_bulletin->version++; 34536558c3dSYuval Mintz p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size, 34636558c3dSYuval Mintz p_vf->bulletin.size - crc_size); 34736558c3dSYuval Mintz 34836558c3dSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 34936558c3dSYuval Mintz "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n", 35036558c3dSYuval Mintz p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc); 35136558c3dSYuval Mintz 35236558c3dSYuval Mintz /* propagate bulletin board via dmae to vm memory */ 35336558c3dSYuval Mintz memset(¶ms, 0, sizeof(params)); 35436558c3dSYuval Mintz params.flags = QED_DMAE_FLAG_VF_DST; 35536558c3dSYuval Mintz params.dst_vfid = p_vf->abs_vf_id; 35636558c3dSYuval Mintz return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys, 35736558c3dSYuval Mintz p_vf->vf_bulletin, p_vf->bulletin.size / 4, 35836558c3dSYuval Mintz ¶ms); 35936558c3dSYuval Mintz } 36036558c3dSYuval Mintz 36132a47e72SYuval Mintz static int qed_iov_pci_cfg_info(struct qed_dev *cdev) 36232a47e72SYuval Mintz { 36332a47e72SYuval Mintz struct qed_hw_sriov_info *iov = cdev->p_iov_info; 36432a47e72SYuval Mintz int pos = iov->pos; 36532a47e72SYuval Mintz 36632a47e72SYuval Mintz DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos); 36732a47e72SYuval Mintz pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl); 36832a47e72SYuval Mintz 36932a47e72SYuval Mintz pci_read_config_word(cdev->pdev, 37032a47e72SYuval Mintz pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs); 37132a47e72SYuval Mintz pci_read_config_word(cdev->pdev, 37232a47e72SYuval Mintz pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs); 37332a47e72SYuval Mintz 37432a47e72SYuval Mintz pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs); 37532a47e72SYuval Mintz if (iov->num_vfs) { 37632a47e72SYuval Mintz DP_VERBOSE(cdev, 37732a47e72SYuval Mintz QED_MSG_IOV, 37832a47e72SYuval Mintz "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n"); 37932a47e72SYuval Mintz iov->num_vfs = 0; 38032a47e72SYuval Mintz } 38132a47e72SYuval Mintz 38232a47e72SYuval Mintz pci_read_config_word(cdev->pdev, 38332a47e72SYuval Mintz pos + PCI_SRIOV_VF_OFFSET, &iov->offset); 38432a47e72SYuval Mintz 38532a47e72SYuval Mintz pci_read_config_word(cdev->pdev, 38632a47e72SYuval Mintz pos + PCI_SRIOV_VF_STRIDE, &iov->stride); 38732a47e72SYuval Mintz 38832a47e72SYuval Mintz pci_read_config_word(cdev->pdev, 38932a47e72SYuval Mintz pos + PCI_SRIOV_VF_DID, &iov->vf_device_id); 39032a47e72SYuval Mintz 39132a47e72SYuval Mintz pci_read_config_dword(cdev->pdev, 39232a47e72SYuval Mintz pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz); 39332a47e72SYuval Mintz 39432a47e72SYuval Mintz pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap); 39532a47e72SYuval Mintz 39632a47e72SYuval Mintz pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); 39732a47e72SYuval Mintz 39832a47e72SYuval Mintz DP_VERBOSE(cdev, 39932a47e72SYuval Mintz QED_MSG_IOV, 40032a47e72SYuval Mintz "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n", 40132a47e72SYuval Mintz iov->nres, 40232a47e72SYuval Mintz iov->cap, 40332a47e72SYuval Mintz iov->ctrl, 40432a47e72SYuval Mintz iov->total_vfs, 40532a47e72SYuval Mintz iov->initial_vfs, 40632a47e72SYuval Mintz iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz); 40732a47e72SYuval Mintz 40832a47e72SYuval Mintz /* Some sanity checks */ 40932a47e72SYuval Mintz if (iov->num_vfs > NUM_OF_VFS(cdev) || 41032a47e72SYuval Mintz iov->total_vfs > NUM_OF_VFS(cdev)) { 41132a47e72SYuval Mintz /* This can happen only due to a bug. In this case we set 41232a47e72SYuval Mintz * num_vfs to zero to avoid memory corruption in the code that 41332a47e72SYuval Mintz * assumes max number of vfs 41432a47e72SYuval Mintz */ 41532a47e72SYuval Mintz DP_NOTICE(cdev, 41632a47e72SYuval Mintz "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n", 41732a47e72SYuval Mintz iov->num_vfs); 41832a47e72SYuval Mintz 41932a47e72SYuval Mintz iov->num_vfs = 0; 42032a47e72SYuval Mintz iov->total_vfs = 0; 42132a47e72SYuval Mintz } 42232a47e72SYuval Mintz 42332a47e72SYuval Mintz return 0; 42432a47e72SYuval Mintz } 42532a47e72SYuval Mintz 42632a47e72SYuval Mintz static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn) 42732a47e72SYuval Mintz { 42832a47e72SYuval Mintz struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info; 42932a47e72SYuval Mintz struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info; 43032a47e72SYuval Mintz struct qed_bulletin_content *p_bulletin_virt; 43132a47e72SYuval Mintz dma_addr_t req_p, rply_p, bulletin_p; 43232a47e72SYuval Mintz union pfvf_tlvs *p_reply_virt_addr; 43332a47e72SYuval Mintz union vfpf_tlvs *p_req_virt_addr; 43432a47e72SYuval Mintz u8 idx = 0; 43532a47e72SYuval Mintz 43632a47e72SYuval Mintz memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array)); 43732a47e72SYuval Mintz 43832a47e72SYuval Mintz p_req_virt_addr = p_iov_info->mbx_msg_virt_addr; 43932a47e72SYuval Mintz req_p = p_iov_info->mbx_msg_phys_addr; 44032a47e72SYuval Mintz p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr; 44132a47e72SYuval Mintz rply_p = p_iov_info->mbx_reply_phys_addr; 44232a47e72SYuval Mintz p_bulletin_virt = p_iov_info->p_bulletins; 44332a47e72SYuval Mintz bulletin_p = p_iov_info->bulletins_phys; 44432a47e72SYuval Mintz if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) { 44532a47e72SYuval Mintz DP_ERR(p_hwfn, 44632a47e72SYuval Mintz "qed_iov_setup_vfdb called without allocating mem first\n"); 44732a47e72SYuval Mintz return; 44832a47e72SYuval Mintz } 44932a47e72SYuval Mintz 45032a47e72SYuval Mintz for (idx = 0; idx < p_iov->total_vfs; idx++) { 45132a47e72SYuval Mintz struct qed_vf_info *vf = &p_iov_info->vfs_array[idx]; 45232a47e72SYuval Mintz u32 concrete; 45332a47e72SYuval Mintz 45432a47e72SYuval Mintz vf->vf_mbx.req_virt = p_req_virt_addr + idx; 45532a47e72SYuval Mintz vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs); 45632a47e72SYuval Mintz vf->vf_mbx.reply_virt = p_reply_virt_addr + idx; 45732a47e72SYuval Mintz vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs); 45832a47e72SYuval Mintz 45932a47e72SYuval Mintz vf->state = VF_STOPPED; 46032a47e72SYuval Mintz vf->b_init = false; 46132a47e72SYuval Mintz 46232a47e72SYuval Mintz vf->bulletin.phys = idx * 46332a47e72SYuval Mintz sizeof(struct qed_bulletin_content) + 46432a47e72SYuval Mintz bulletin_p; 46532a47e72SYuval Mintz vf->bulletin.p_virt = p_bulletin_virt + idx; 46632a47e72SYuval Mintz vf->bulletin.size = sizeof(struct qed_bulletin_content); 46732a47e72SYuval Mintz 46832a47e72SYuval Mintz vf->relative_vf_id = idx; 46932a47e72SYuval Mintz vf->abs_vf_id = idx + p_iov->first_vf_in_pf; 47032a47e72SYuval Mintz concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id); 47132a47e72SYuval Mintz vf->concrete_fid = concrete; 47232a47e72SYuval Mintz vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) | 47332a47e72SYuval Mintz (vf->abs_vf_id << 8); 47432a47e72SYuval Mintz vf->vport_id = idx + 1; 4751cf2b1a9SYuval Mintz 4761cf2b1a9SYuval Mintz vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS; 4771cf2b1a9SYuval Mintz vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS; 47832a47e72SYuval Mintz } 47932a47e72SYuval Mintz } 48032a47e72SYuval Mintz 48132a47e72SYuval Mintz static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn) 48232a47e72SYuval Mintz { 48332a47e72SYuval Mintz struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info; 48432a47e72SYuval Mintz void **p_v_addr; 48532a47e72SYuval Mintz u16 num_vfs = 0; 48632a47e72SYuval Mintz 48732a47e72SYuval Mintz num_vfs = p_hwfn->cdev->p_iov_info->total_vfs; 48832a47e72SYuval Mintz 48932a47e72SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 49032a47e72SYuval Mintz "qed_iov_allocate_vfdb for %d VFs\n", num_vfs); 49132a47e72SYuval Mintz 49232a47e72SYuval Mintz /* Allocate PF Mailbox buffer (per-VF) */ 49332a47e72SYuval Mintz p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs; 49432a47e72SYuval Mintz p_v_addr = &p_iov_info->mbx_msg_virt_addr; 49532a47e72SYuval Mintz *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 49632a47e72SYuval Mintz p_iov_info->mbx_msg_size, 49732a47e72SYuval Mintz &p_iov_info->mbx_msg_phys_addr, 49832a47e72SYuval Mintz GFP_KERNEL); 49932a47e72SYuval Mintz if (!*p_v_addr) 50032a47e72SYuval Mintz return -ENOMEM; 50132a47e72SYuval Mintz 50232a47e72SYuval Mintz /* Allocate PF Mailbox Reply buffer (per-VF) */ 50332a47e72SYuval Mintz p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs; 50432a47e72SYuval Mintz p_v_addr = &p_iov_info->mbx_reply_virt_addr; 50532a47e72SYuval Mintz *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 50632a47e72SYuval Mintz p_iov_info->mbx_reply_size, 50732a47e72SYuval Mintz &p_iov_info->mbx_reply_phys_addr, 50832a47e72SYuval Mintz GFP_KERNEL); 50932a47e72SYuval Mintz if (!*p_v_addr) 51032a47e72SYuval Mintz return -ENOMEM; 51132a47e72SYuval Mintz 51232a47e72SYuval Mintz p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) * 51332a47e72SYuval Mintz num_vfs; 51432a47e72SYuval Mintz p_v_addr = &p_iov_info->p_bulletins; 51532a47e72SYuval Mintz *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, 51632a47e72SYuval Mintz p_iov_info->bulletins_size, 51732a47e72SYuval Mintz &p_iov_info->bulletins_phys, 51832a47e72SYuval Mintz GFP_KERNEL); 51932a47e72SYuval Mintz if (!*p_v_addr) 52032a47e72SYuval Mintz return -ENOMEM; 52132a47e72SYuval Mintz 52232a47e72SYuval Mintz DP_VERBOSE(p_hwfn, 52332a47e72SYuval Mintz QED_MSG_IOV, 52432a47e72SYuval Mintz "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n", 52532a47e72SYuval Mintz p_iov_info->mbx_msg_virt_addr, 52632a47e72SYuval Mintz (u64) p_iov_info->mbx_msg_phys_addr, 52732a47e72SYuval Mintz p_iov_info->mbx_reply_virt_addr, 52832a47e72SYuval Mintz (u64) p_iov_info->mbx_reply_phys_addr, 52932a47e72SYuval Mintz p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys); 53032a47e72SYuval Mintz 53132a47e72SYuval Mintz return 0; 53232a47e72SYuval Mintz } 53332a47e72SYuval Mintz 53432a47e72SYuval Mintz static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn) 53532a47e72SYuval Mintz { 53632a47e72SYuval Mintz struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info; 53732a47e72SYuval Mintz 53832a47e72SYuval Mintz if (p_hwfn->pf_iov_info->mbx_msg_virt_addr) 53932a47e72SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 54032a47e72SYuval Mintz p_iov_info->mbx_msg_size, 54132a47e72SYuval Mintz p_iov_info->mbx_msg_virt_addr, 54232a47e72SYuval Mintz p_iov_info->mbx_msg_phys_addr); 54332a47e72SYuval Mintz 54432a47e72SYuval Mintz if (p_hwfn->pf_iov_info->mbx_reply_virt_addr) 54532a47e72SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 54632a47e72SYuval Mintz p_iov_info->mbx_reply_size, 54732a47e72SYuval Mintz p_iov_info->mbx_reply_virt_addr, 54832a47e72SYuval Mintz p_iov_info->mbx_reply_phys_addr); 54932a47e72SYuval Mintz 55032a47e72SYuval Mintz if (p_iov_info->p_bulletins) 55132a47e72SYuval Mintz dma_free_coherent(&p_hwfn->cdev->pdev->dev, 55232a47e72SYuval Mintz p_iov_info->bulletins_size, 55332a47e72SYuval Mintz p_iov_info->p_bulletins, 55432a47e72SYuval Mintz p_iov_info->bulletins_phys); 55532a47e72SYuval Mintz } 55632a47e72SYuval Mintz 55732a47e72SYuval Mintz int qed_iov_alloc(struct qed_hwfn *p_hwfn) 55832a47e72SYuval Mintz { 55932a47e72SYuval Mintz struct qed_pf_iov *p_sriov; 56032a47e72SYuval Mintz 56132a47e72SYuval Mintz if (!IS_PF_SRIOV(p_hwfn)) { 56232a47e72SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 56332a47e72SYuval Mintz "No SR-IOV - no need for IOV db\n"); 56432a47e72SYuval Mintz return 0; 56532a47e72SYuval Mintz } 56632a47e72SYuval Mintz 56732a47e72SYuval Mintz p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL); 5682591c280SJoe Perches if (!p_sriov) 56932a47e72SYuval Mintz return -ENOMEM; 57032a47e72SYuval Mintz 57132a47e72SYuval Mintz p_hwfn->pf_iov_info = p_sriov; 57232a47e72SYuval Mintz 5736c9e80eaSMichal Kalderon qed_spq_register_async_cb(p_hwfn, PROTOCOLID_COMMON, 5746c9e80eaSMichal Kalderon qed_sriov_eqe_event); 5756c9e80eaSMichal Kalderon 57632a47e72SYuval Mintz return qed_iov_allocate_vfdb(p_hwfn); 57732a47e72SYuval Mintz } 57832a47e72SYuval Mintz 5791ee240e3SMintz, Yuval void qed_iov_setup(struct qed_hwfn *p_hwfn) 58032a47e72SYuval Mintz { 58132a47e72SYuval Mintz if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn)) 58232a47e72SYuval Mintz return; 58332a47e72SYuval Mintz 58432a47e72SYuval Mintz qed_iov_setup_vfdb(p_hwfn); 58532a47e72SYuval Mintz } 58632a47e72SYuval Mintz 58732a47e72SYuval Mintz void qed_iov_free(struct qed_hwfn *p_hwfn) 58832a47e72SYuval Mintz { 5896c9e80eaSMichal Kalderon qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_COMMON); 5906c9e80eaSMichal Kalderon 59132a47e72SYuval Mintz if (IS_PF_SRIOV_ALLOC(p_hwfn)) { 59232a47e72SYuval Mintz qed_iov_free_vfdb(p_hwfn); 59332a47e72SYuval Mintz kfree(p_hwfn->pf_iov_info); 59432a47e72SYuval Mintz } 59532a47e72SYuval Mintz } 59632a47e72SYuval Mintz 59732a47e72SYuval Mintz void qed_iov_free_hw_info(struct qed_dev *cdev) 59832a47e72SYuval Mintz { 59932a47e72SYuval Mintz kfree(cdev->p_iov_info); 60032a47e72SYuval Mintz cdev->p_iov_info = NULL; 60132a47e72SYuval Mintz } 60232a47e72SYuval Mintz 60332a47e72SYuval Mintz int qed_iov_hw_info(struct qed_hwfn *p_hwfn) 60432a47e72SYuval Mintz { 60532a47e72SYuval Mintz struct qed_dev *cdev = p_hwfn->cdev; 60632a47e72SYuval Mintz int pos; 60732a47e72SYuval Mintz int rc; 60832a47e72SYuval Mintz 6091408cc1fSYuval Mintz if (IS_VF(p_hwfn->cdev)) 6101408cc1fSYuval Mintz return 0; 6111408cc1fSYuval Mintz 61232a47e72SYuval Mintz /* Learn the PCI configuration */ 61332a47e72SYuval Mintz pos = pci_find_ext_capability(p_hwfn->cdev->pdev, 61432a47e72SYuval Mintz PCI_EXT_CAP_ID_SRIOV); 61532a47e72SYuval Mintz if (!pos) { 61632a47e72SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n"); 61732a47e72SYuval Mintz return 0; 61832a47e72SYuval Mintz } 61932a47e72SYuval Mintz 62032a47e72SYuval Mintz /* Allocate a new struct for IOV information */ 62132a47e72SYuval Mintz cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL); 6222591c280SJoe Perches if (!cdev->p_iov_info) 62332a47e72SYuval Mintz return -ENOMEM; 6242591c280SJoe Perches 62532a47e72SYuval Mintz cdev->p_iov_info->pos = pos; 62632a47e72SYuval Mintz 62732a47e72SYuval Mintz rc = qed_iov_pci_cfg_info(cdev); 62832a47e72SYuval Mintz if (rc) 62932a47e72SYuval Mintz return rc; 63032a47e72SYuval Mintz 63132a47e72SYuval Mintz /* We want PF IOV to be synonemous with the existance of p_iov_info; 63232a47e72SYuval Mintz * In case the capability is published but there are no VFs, simply 63332a47e72SYuval Mintz * de-allocate the struct. 63432a47e72SYuval Mintz */ 63532a47e72SYuval Mintz if (!cdev->p_iov_info->total_vfs) { 63632a47e72SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 63732a47e72SYuval Mintz "IOV capabilities, but no VFs are published\n"); 63832a47e72SYuval Mintz kfree(cdev->p_iov_info); 63932a47e72SYuval Mintz cdev->p_iov_info = NULL; 64032a47e72SYuval Mintz return 0; 64132a47e72SYuval Mintz } 64232a47e72SYuval Mintz 6439c79ddaaSMintz, Yuval /* First VF index based on offset is tricky: 6449c79ddaaSMintz, Yuval * - If ARI is supported [likely], offset - (16 - pf_id) would 6459c79ddaaSMintz, Yuval * provide the number for eng0. 2nd engine Vfs would begin 64632a47e72SYuval Mintz * after the first engine's VFs. 6479c79ddaaSMintz, Yuval * - If !ARI, VFs would start on next device. 6489c79ddaaSMintz, Yuval * so offset - (256 - pf_id) would provide the number. 6499c79ddaaSMintz, Yuval * Utilize the fact that (256 - pf_id) is achieved only by later 6508ac1ed79SJoe Perches * to differentiate between the two. 65132a47e72SYuval Mintz */ 6529c79ddaaSMintz, Yuval 6539c79ddaaSMintz, Yuval if (p_hwfn->cdev->p_iov_info->offset < (256 - p_hwfn->abs_pf_id)) { 6549c79ddaaSMintz, Yuval u32 first = p_hwfn->cdev->p_iov_info->offset + 65532a47e72SYuval Mintz p_hwfn->abs_pf_id - 16; 6569c79ddaaSMintz, Yuval 6579c79ddaaSMintz, Yuval cdev->p_iov_info->first_vf_in_pf = first; 6589c79ddaaSMintz, Yuval 65932a47e72SYuval Mintz if (QED_PATH_ID(p_hwfn)) 66032a47e72SYuval Mintz cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB; 6619c79ddaaSMintz, Yuval } else { 6629c79ddaaSMintz, Yuval u32 first = p_hwfn->cdev->p_iov_info->offset + 6639c79ddaaSMintz, Yuval p_hwfn->abs_pf_id - 256; 6649c79ddaaSMintz, Yuval 6659c79ddaaSMintz, Yuval cdev->p_iov_info->first_vf_in_pf = first; 6669c79ddaaSMintz, Yuval } 66732a47e72SYuval Mintz 66832a47e72SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 66932a47e72SYuval Mintz "First VF in hwfn 0x%08x\n", 67032a47e72SYuval Mintz cdev->p_iov_info->first_vf_in_pf); 67132a47e72SYuval Mintz 67232a47e72SYuval Mintz return 0; 67332a47e72SYuval Mintz } 67432a47e72SYuval Mintz 6757eff82b0SYuval Mintz bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, 6767eff82b0SYuval Mintz int vfid, bool b_fail_malicious) 67737bff2b9SYuval Mintz { 67837bff2b9SYuval Mintz /* Check PF supports sriov */ 679b0409fa0SYuval Mintz if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) || 680b0409fa0SYuval Mintz !IS_PF_SRIOV_ALLOC(p_hwfn)) 68137bff2b9SYuval Mintz return false; 68237bff2b9SYuval Mintz 68337bff2b9SYuval Mintz /* Check VF validity */ 6847eff82b0SYuval Mintz if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious)) 68537bff2b9SYuval Mintz return false; 68637bff2b9SYuval Mintz 68737bff2b9SYuval Mintz return true; 68837bff2b9SYuval Mintz } 68937bff2b9SYuval Mintz 6907eff82b0SYuval Mintz bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid) 6917eff82b0SYuval Mintz { 6927eff82b0SYuval Mintz return _qed_iov_pf_sanity_check(p_hwfn, vfid, true); 6937eff82b0SYuval Mintz } 6947eff82b0SYuval Mintz 6950b55e27dSYuval Mintz static void qed_iov_set_vf_to_disable(struct qed_dev *cdev, 6960b55e27dSYuval Mintz u16 rel_vf_id, u8 to_disable) 6970b55e27dSYuval Mintz { 6980b55e27dSYuval Mintz struct qed_vf_info *vf; 6990b55e27dSYuval Mintz int i; 7000b55e27dSYuval Mintz 7010b55e27dSYuval Mintz for_each_hwfn(cdev, i) { 7020b55e27dSYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 7030b55e27dSYuval Mintz 7040b55e27dSYuval Mintz vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false); 7050b55e27dSYuval Mintz if (!vf) 7060b55e27dSYuval Mintz continue; 7070b55e27dSYuval Mintz 7080b55e27dSYuval Mintz vf->to_disable = to_disable; 7090b55e27dSYuval Mintz } 7100b55e27dSYuval Mintz } 7110b55e27dSYuval Mintz 712ba56947aSBaoyou Xie static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable) 7130b55e27dSYuval Mintz { 7140b55e27dSYuval Mintz u16 i; 7150b55e27dSYuval Mintz 7160b55e27dSYuval Mintz if (!IS_QED_SRIOV(cdev)) 7170b55e27dSYuval Mintz return; 7180b55e27dSYuval Mintz 7190b55e27dSYuval Mintz for (i = 0; i < cdev->p_iov_info->total_vfs; i++) 7200b55e27dSYuval Mintz qed_iov_set_vf_to_disable(cdev, i, to_disable); 7210b55e27dSYuval Mintz } 7220b55e27dSYuval Mintz 7231408cc1fSYuval Mintz static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn, 7241408cc1fSYuval Mintz struct qed_ptt *p_ptt, u8 abs_vfid) 7251408cc1fSYuval Mintz { 7261408cc1fSYuval Mintz qed_wr(p_hwfn, p_ptt, 7271408cc1fSYuval Mintz PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4, 7281408cc1fSYuval Mintz 1 << (abs_vfid & 0x1f)); 7291408cc1fSYuval Mintz } 7301408cc1fSYuval Mintz 731dacd88d6SYuval Mintz static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn, 732dacd88d6SYuval Mintz struct qed_ptt *p_ptt, struct qed_vf_info *vf) 733dacd88d6SYuval Mintz { 734dacd88d6SYuval Mintz int i; 735dacd88d6SYuval Mintz 736dacd88d6SYuval Mintz /* Set VF masks and configuration - pretend */ 737dacd88d6SYuval Mintz qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid); 738dacd88d6SYuval Mintz 739dacd88d6SYuval Mintz qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0); 740dacd88d6SYuval Mintz 741dacd88d6SYuval Mintz /* unpretend */ 742dacd88d6SYuval Mintz qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid); 743dacd88d6SYuval Mintz 744dacd88d6SYuval Mintz /* iterate over all queues, clear sb consumer */ 745b2b897ebSYuval Mintz for (i = 0; i < vf->num_sbs; i++) 746b2b897ebSYuval Mintz qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, 747b2b897ebSYuval Mintz vf->igu_sbs[i], 748b2b897ebSYuval Mintz vf->opaque_fid, true); 749dacd88d6SYuval Mintz } 750dacd88d6SYuval Mintz 7510b55e27dSYuval Mintz static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn, 7520b55e27dSYuval Mintz struct qed_ptt *p_ptt, 7530b55e27dSYuval Mintz struct qed_vf_info *vf, bool enable) 7540b55e27dSYuval Mintz { 7550b55e27dSYuval Mintz u32 igu_vf_conf; 7560b55e27dSYuval Mintz 7570b55e27dSYuval Mintz qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid); 7580b55e27dSYuval Mintz 7590b55e27dSYuval Mintz igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION); 7600b55e27dSYuval Mintz 7610b55e27dSYuval Mintz if (enable) 7620b55e27dSYuval Mintz igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN; 7630b55e27dSYuval Mintz else 7640b55e27dSYuval Mintz igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN; 7650b55e27dSYuval Mintz 7660b55e27dSYuval Mintz qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf); 7670b55e27dSYuval Mintz 7680b55e27dSYuval Mintz /* unpretend */ 7690b55e27dSYuval Mintz qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid); 7700b55e27dSYuval Mintz } 7710b55e27dSYuval Mintz 77288072fd4SMintz, Yuval static int 77388072fd4SMintz, Yuval qed_iov_enable_vf_access_msix(struct qed_hwfn *p_hwfn, 77488072fd4SMintz, Yuval struct qed_ptt *p_ptt, u8 abs_vf_id, u8 num_sbs) 77588072fd4SMintz, Yuval { 77688072fd4SMintz, Yuval u8 current_max = 0; 77788072fd4SMintz, Yuval int i; 77888072fd4SMintz, Yuval 77988072fd4SMintz, Yuval /* For AH onward, configuration is per-PF. Find maximum of all 78088072fd4SMintz, Yuval * the currently enabled child VFs, and set the number to be that. 78188072fd4SMintz, Yuval */ 78288072fd4SMintz, Yuval if (!QED_IS_BB(p_hwfn->cdev)) { 78388072fd4SMintz, Yuval qed_for_each_vf(p_hwfn, i) { 78488072fd4SMintz, Yuval struct qed_vf_info *p_vf; 78588072fd4SMintz, Yuval 78688072fd4SMintz, Yuval p_vf = qed_iov_get_vf_info(p_hwfn, (u16)i, true); 78788072fd4SMintz, Yuval if (!p_vf) 78888072fd4SMintz, Yuval continue; 78988072fd4SMintz, Yuval 79088072fd4SMintz, Yuval current_max = max_t(u8, current_max, p_vf->num_sbs); 79188072fd4SMintz, Yuval } 79288072fd4SMintz, Yuval } 79388072fd4SMintz, Yuval 79488072fd4SMintz, Yuval if (num_sbs > current_max) 79588072fd4SMintz, Yuval return qed_mcp_config_vf_msix(p_hwfn, p_ptt, 79688072fd4SMintz, Yuval abs_vf_id, num_sbs); 79788072fd4SMintz, Yuval 79888072fd4SMintz, Yuval return 0; 79988072fd4SMintz, Yuval } 80088072fd4SMintz, Yuval 8011408cc1fSYuval Mintz static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn, 8021408cc1fSYuval Mintz struct qed_ptt *p_ptt, 8031408cc1fSYuval Mintz struct qed_vf_info *vf) 8041408cc1fSYuval Mintz { 8051408cc1fSYuval Mintz u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN; 8061408cc1fSYuval Mintz int rc; 8071408cc1fSYuval Mintz 8084e9b2a67SMintz, Yuval /* It's possible VF was previously considered malicious - 8094e9b2a67SMintz, Yuval * clear the indication even if we're only going to disable VF. 8104e9b2a67SMintz, Yuval */ 8114e9b2a67SMintz, Yuval vf->b_malicious = false; 8124e9b2a67SMintz, Yuval 8130b55e27dSYuval Mintz if (vf->to_disable) 8140b55e27dSYuval Mintz return 0; 8150b55e27dSYuval Mintz 8161408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, 8171408cc1fSYuval Mintz QED_MSG_IOV, 8181408cc1fSYuval Mintz "Enable internal access for vf %x [abs %x]\n", 8191408cc1fSYuval Mintz vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf)); 8201408cc1fSYuval Mintz 8211408cc1fSYuval Mintz qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf)); 8221408cc1fSYuval Mintz 823b2b897ebSYuval Mintz qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf); 824b2b897ebSYuval Mintz 82588072fd4SMintz, Yuval rc = qed_iov_enable_vf_access_msix(p_hwfn, p_ptt, 82688072fd4SMintz, Yuval vf->abs_vf_id, vf->num_sbs); 8271408cc1fSYuval Mintz if (rc) 8281408cc1fSYuval Mintz return rc; 8291408cc1fSYuval Mintz 8301408cc1fSYuval Mintz qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid); 8311408cc1fSYuval Mintz 8321408cc1fSYuval Mintz SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id); 8331408cc1fSYuval Mintz STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf); 8341408cc1fSYuval Mintz 8351408cc1fSYuval Mintz qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id, 8361408cc1fSYuval Mintz p_hwfn->hw_info.hw_mode); 8371408cc1fSYuval Mintz 8381408cc1fSYuval Mintz /* unpretend */ 8391408cc1fSYuval Mintz qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid); 8401408cc1fSYuval Mintz 8411408cc1fSYuval Mintz vf->state = VF_FREE; 8421408cc1fSYuval Mintz 8431408cc1fSYuval Mintz return rc; 8441408cc1fSYuval Mintz } 8451408cc1fSYuval Mintz 8460b55e27dSYuval Mintz /** 8470b55e27dSYuval Mintz * @brief qed_iov_config_perm_table - configure the permission 8480b55e27dSYuval Mintz * zone table. 8490b55e27dSYuval Mintz * In E4, queue zone permission table size is 320x9. There 8500b55e27dSYuval Mintz * are 320 VF queues for single engine device (256 for dual 8510b55e27dSYuval Mintz * engine device), and each entry has the following format: 8520b55e27dSYuval Mintz * {Valid, VF[7:0]} 8530b55e27dSYuval Mintz * @param p_hwfn 8540b55e27dSYuval Mintz * @param p_ptt 8550b55e27dSYuval Mintz * @param vf 8560b55e27dSYuval Mintz * @param enable 8570b55e27dSYuval Mintz */ 8580b55e27dSYuval Mintz static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn, 8590b55e27dSYuval Mintz struct qed_ptt *p_ptt, 8600b55e27dSYuval Mintz struct qed_vf_info *vf, u8 enable) 8610b55e27dSYuval Mintz { 8620b55e27dSYuval Mintz u32 reg_addr, val; 8630b55e27dSYuval Mintz u16 qzone_id = 0; 8640b55e27dSYuval Mintz int qid; 8650b55e27dSYuval Mintz 8660b55e27dSYuval Mintz for (qid = 0; qid < vf->num_rxqs; qid++) { 8670b55e27dSYuval Mintz qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid, 8680b55e27dSYuval Mintz &qzone_id); 8690b55e27dSYuval Mintz 8700b55e27dSYuval Mintz reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4; 8711a635e48SYuval Mintz val = enable ? (vf->abs_vf_id | BIT(8)) : 0; 8720b55e27dSYuval Mintz qed_wr(p_hwfn, p_ptt, reg_addr, val); 8730b55e27dSYuval Mintz } 8740b55e27dSYuval Mintz } 8750b55e27dSYuval Mintz 876dacd88d6SYuval Mintz static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn, 877dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 878dacd88d6SYuval Mintz struct qed_vf_info *vf) 879dacd88d6SYuval Mintz { 880dacd88d6SYuval Mintz /* Reset vf in IGU - interrupts are still disabled */ 881dacd88d6SYuval Mintz qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf); 882dacd88d6SYuval Mintz 883dacd88d6SYuval Mintz qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1); 884dacd88d6SYuval Mintz 885dacd88d6SYuval Mintz /* Permission Table */ 886dacd88d6SYuval Mintz qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true); 887dacd88d6SYuval Mintz } 888dacd88d6SYuval Mintz 8891408cc1fSYuval Mintz static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn, 8901408cc1fSYuval Mintz struct qed_ptt *p_ptt, 8911408cc1fSYuval Mintz struct qed_vf_info *vf, u16 num_rx_queues) 8921408cc1fSYuval Mintz { 89309b6b147SMintz, Yuval struct qed_igu_block *p_block; 89409b6b147SMintz, Yuval struct cau_sb_entry sb_entry; 89509b6b147SMintz, Yuval int qid = 0; 8961408cc1fSYuval Mintz u32 val = 0; 8971408cc1fSYuval Mintz 898726fdbe9SMintz, Yuval if (num_rx_queues > p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov) 899726fdbe9SMintz, Yuval num_rx_queues = p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov; 900726fdbe9SMintz, Yuval p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov -= num_rx_queues; 9011408cc1fSYuval Mintz 9021408cc1fSYuval Mintz SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id); 9031408cc1fSYuval Mintz SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1); 9041408cc1fSYuval Mintz SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0); 9051408cc1fSYuval Mintz 90609b6b147SMintz, Yuval for (qid = 0; qid < num_rx_queues; qid++) { 90709b6b147SMintz, Yuval p_block = qed_get_igu_free_sb(p_hwfn, false); 90809b6b147SMintz, Yuval vf->igu_sbs[qid] = p_block->igu_sb_id; 90909b6b147SMintz, Yuval p_block->status &= ~QED_IGU_STATUS_FREE; 9101408cc1fSYuval Mintz SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid); 9111408cc1fSYuval Mintz 9121408cc1fSYuval Mintz qed_wr(p_hwfn, p_ptt, 91309b6b147SMintz, Yuval IGU_REG_MAPPING_MEMORY + 91409b6b147SMintz, Yuval sizeof(u32) * p_block->igu_sb_id, val); 9151408cc1fSYuval Mintz 9161408cc1fSYuval Mintz /* Configure igu sb in CAU which were marked valid */ 9171408cc1fSYuval Mintz qed_init_cau_sb_entry(p_hwfn, &sb_entry, 91809b6b147SMintz, Yuval p_hwfn->rel_pf_id, vf->abs_vf_id, 1); 9191408cc1fSYuval Mintz qed_dmae_host2grc(p_hwfn, p_ptt, 9201408cc1fSYuval Mintz (u64)(uintptr_t)&sb_entry, 9211408cc1fSYuval Mintz CAU_REG_SB_VAR_MEMORY + 92209b6b147SMintz, Yuval p_block->igu_sb_id * sizeof(u64), 2, 0); 9231408cc1fSYuval Mintz } 9241408cc1fSYuval Mintz 9251408cc1fSYuval Mintz vf->num_sbs = (u8) num_rx_queues; 9261408cc1fSYuval Mintz 9271408cc1fSYuval Mintz return vf->num_sbs; 9281408cc1fSYuval Mintz } 9291408cc1fSYuval Mintz 9300b55e27dSYuval Mintz static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn, 9310b55e27dSYuval Mintz struct qed_ptt *p_ptt, 9320b55e27dSYuval Mintz struct qed_vf_info *vf) 9330b55e27dSYuval Mintz { 9340b55e27dSYuval Mintz struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info; 9350b55e27dSYuval Mintz int idx, igu_id; 9360b55e27dSYuval Mintz u32 addr, val; 9370b55e27dSYuval Mintz 9380b55e27dSYuval Mintz /* Invalidate igu CAM lines and mark them as free */ 9390b55e27dSYuval Mintz for (idx = 0; idx < vf->num_sbs; idx++) { 9400b55e27dSYuval Mintz igu_id = vf->igu_sbs[idx]; 9410b55e27dSYuval Mintz addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id; 9420b55e27dSYuval Mintz 9430b55e27dSYuval Mintz val = qed_rd(p_hwfn, p_ptt, addr); 9440b55e27dSYuval Mintz SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0); 9450b55e27dSYuval Mintz qed_wr(p_hwfn, p_ptt, addr, val); 9460b55e27dSYuval Mintz 947d749dd0dSMintz, Yuval p_info->entry[igu_id].status |= QED_IGU_STATUS_FREE; 948726fdbe9SMintz, Yuval p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov++; 9490b55e27dSYuval Mintz } 9500b55e27dSYuval Mintz 9510b55e27dSYuval Mintz vf->num_sbs = 0; 9520b55e27dSYuval Mintz } 9530b55e27dSYuval Mintz 95433b2fbd0SMintz, Yuval static void qed_iov_set_link(struct qed_hwfn *p_hwfn, 95533b2fbd0SMintz, Yuval u16 vfid, 95633b2fbd0SMintz, Yuval struct qed_mcp_link_params *params, 95733b2fbd0SMintz, Yuval struct qed_mcp_link_state *link, 95833b2fbd0SMintz, Yuval struct qed_mcp_link_capabilities *p_caps) 95933b2fbd0SMintz, Yuval { 96033b2fbd0SMintz, Yuval struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn, 96133b2fbd0SMintz, Yuval vfid, 96233b2fbd0SMintz, Yuval false); 96333b2fbd0SMintz, Yuval struct qed_bulletin_content *p_bulletin; 96433b2fbd0SMintz, Yuval 96533b2fbd0SMintz, Yuval if (!p_vf) 96633b2fbd0SMintz, Yuval return; 96733b2fbd0SMintz, Yuval 96833b2fbd0SMintz, Yuval p_bulletin = p_vf->bulletin.p_virt; 96933b2fbd0SMintz, Yuval p_bulletin->req_autoneg = params->speed.autoneg; 97033b2fbd0SMintz, Yuval p_bulletin->req_adv_speed = params->speed.advertised_speeds; 97133b2fbd0SMintz, Yuval p_bulletin->req_forced_speed = params->speed.forced_speed; 97233b2fbd0SMintz, Yuval p_bulletin->req_autoneg_pause = params->pause.autoneg; 97333b2fbd0SMintz, Yuval p_bulletin->req_forced_rx = params->pause.forced_rx; 97433b2fbd0SMintz, Yuval p_bulletin->req_forced_tx = params->pause.forced_tx; 97533b2fbd0SMintz, Yuval p_bulletin->req_loopback = params->loopback_mode; 97633b2fbd0SMintz, Yuval 97733b2fbd0SMintz, Yuval p_bulletin->link_up = link->link_up; 97833b2fbd0SMintz, Yuval p_bulletin->speed = link->speed; 97933b2fbd0SMintz, Yuval p_bulletin->full_duplex = link->full_duplex; 98033b2fbd0SMintz, Yuval p_bulletin->autoneg = link->an; 98133b2fbd0SMintz, Yuval p_bulletin->autoneg_complete = link->an_complete; 98233b2fbd0SMintz, Yuval p_bulletin->parallel_detection = link->parallel_detection; 98333b2fbd0SMintz, Yuval p_bulletin->pfc_enabled = link->pfc_enabled; 98433b2fbd0SMintz, Yuval p_bulletin->partner_adv_speed = link->partner_adv_speed; 98533b2fbd0SMintz, Yuval p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en; 98633b2fbd0SMintz, Yuval p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en; 98733b2fbd0SMintz, Yuval p_bulletin->partner_adv_pause = link->partner_adv_pause; 98833b2fbd0SMintz, Yuval p_bulletin->sfp_tx_fault = link->sfp_tx_fault; 98933b2fbd0SMintz, Yuval 99033b2fbd0SMintz, Yuval p_bulletin->capability_speed = p_caps->speed_capabilities; 99133b2fbd0SMintz, Yuval } 99233b2fbd0SMintz, Yuval 9931408cc1fSYuval Mintz static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn, 9941408cc1fSYuval Mintz struct qed_ptt *p_ptt, 9953da7a37aSMintz, Yuval struct qed_iov_vf_init_params *p_params) 9961408cc1fSYuval Mintz { 99733b2fbd0SMintz, Yuval struct qed_mcp_link_capabilities link_caps; 99833b2fbd0SMintz, Yuval struct qed_mcp_link_params link_params; 99933b2fbd0SMintz, Yuval struct qed_mcp_link_state link_state; 10001408cc1fSYuval Mintz u8 num_of_vf_avaiable_chains = 0; 10011408cc1fSYuval Mintz struct qed_vf_info *vf = NULL; 10023da7a37aSMintz, Yuval u16 qid, num_irqs; 10031408cc1fSYuval Mintz int rc = 0; 10041408cc1fSYuval Mintz u32 cids; 10051408cc1fSYuval Mintz u8 i; 10061408cc1fSYuval Mintz 10073da7a37aSMintz, Yuval vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false); 10081408cc1fSYuval Mintz if (!vf) { 10091408cc1fSYuval Mintz DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n"); 10101408cc1fSYuval Mintz return -EINVAL; 10111408cc1fSYuval Mintz } 10121408cc1fSYuval Mintz 10131408cc1fSYuval Mintz if (vf->b_init) { 10143da7a37aSMintz, Yuval DP_NOTICE(p_hwfn, "VF[%d] is already active.\n", 10153da7a37aSMintz, Yuval p_params->rel_vf_id); 10161408cc1fSYuval Mintz return -EINVAL; 10171408cc1fSYuval Mintz } 10181408cc1fSYuval Mintz 10193da7a37aSMintz, Yuval /* Perform sanity checking on the requested queue_id */ 10203da7a37aSMintz, Yuval for (i = 0; i < p_params->num_queues; i++) { 10213da7a37aSMintz, Yuval u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE); 10223da7a37aSMintz, Yuval u16 max_vf_qzone = min_vf_qzone + 10233da7a37aSMintz, Yuval FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1; 10243da7a37aSMintz, Yuval 10253da7a37aSMintz, Yuval qid = p_params->req_rx_queue[i]; 10263da7a37aSMintz, Yuval if (qid < min_vf_qzone || qid > max_vf_qzone) { 10273da7a37aSMintz, Yuval DP_NOTICE(p_hwfn, 10283da7a37aSMintz, Yuval "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n", 10293da7a37aSMintz, Yuval qid, 10303da7a37aSMintz, Yuval p_params->rel_vf_id, 10313da7a37aSMintz, Yuval min_vf_qzone, max_vf_qzone); 10323da7a37aSMintz, Yuval return -EINVAL; 10333da7a37aSMintz, Yuval } 10343da7a37aSMintz, Yuval 10353da7a37aSMintz, Yuval qid = p_params->req_tx_queue[i]; 10363da7a37aSMintz, Yuval if (qid > max_vf_qzone) { 10373da7a37aSMintz, Yuval DP_NOTICE(p_hwfn, 10383da7a37aSMintz, Yuval "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n", 10393da7a37aSMintz, Yuval qid, p_params->rel_vf_id, max_vf_qzone); 10403da7a37aSMintz, Yuval return -EINVAL; 10413da7a37aSMintz, Yuval } 10423da7a37aSMintz, Yuval 10433da7a37aSMintz, Yuval /* If client *really* wants, Tx qid can be shared with PF */ 10443da7a37aSMintz, Yuval if (qid < min_vf_qzone) 10453da7a37aSMintz, Yuval DP_VERBOSE(p_hwfn, 10463da7a37aSMintz, Yuval QED_MSG_IOV, 10473da7a37aSMintz, Yuval "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n", 10483da7a37aSMintz, Yuval p_params->rel_vf_id, qid, i); 10493da7a37aSMintz, Yuval } 10503da7a37aSMintz, Yuval 10511408cc1fSYuval Mintz /* Limit number of queues according to number of CIDs */ 10521408cc1fSYuval Mintz qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids); 10531408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, 10541408cc1fSYuval Mintz QED_MSG_IOV, 10551408cc1fSYuval Mintz "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n", 10563da7a37aSMintz, Yuval vf->relative_vf_id, p_params->num_queues, (u16)cids); 10573da7a37aSMintz, Yuval num_irqs = min_t(u16, p_params->num_queues, ((u16)cids)); 10581408cc1fSYuval Mintz 10591408cc1fSYuval Mintz num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn, 10601408cc1fSYuval Mintz p_ptt, 10613da7a37aSMintz, Yuval vf, num_irqs); 10621408cc1fSYuval Mintz if (!num_of_vf_avaiable_chains) { 10631408cc1fSYuval Mintz DP_ERR(p_hwfn, "no available igu sbs\n"); 10641408cc1fSYuval Mintz return -ENOMEM; 10651408cc1fSYuval Mintz } 10661408cc1fSYuval Mintz 10671408cc1fSYuval Mintz /* Choose queue number and index ranges */ 10681408cc1fSYuval Mintz vf->num_rxqs = num_of_vf_avaiable_chains; 10691408cc1fSYuval Mintz vf->num_txqs = num_of_vf_avaiable_chains; 10701408cc1fSYuval Mintz 10711408cc1fSYuval Mintz for (i = 0; i < vf->num_rxqs; i++) { 1072007bc371SMintz, Yuval struct qed_vf_queue *p_queue = &vf->vf_queues[i]; 10731408cc1fSYuval Mintz 10743da7a37aSMintz, Yuval p_queue->fw_rx_qid = p_params->req_rx_queue[i]; 10753da7a37aSMintz, Yuval p_queue->fw_tx_qid = p_params->req_tx_queue[i]; 10761408cc1fSYuval Mintz 10771408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 1078007bc371SMintz, Yuval "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x]\n", 1079007bc371SMintz, Yuval vf->relative_vf_id, i, vf->igu_sbs[i], 1080007bc371SMintz, Yuval p_queue->fw_rx_qid, p_queue->fw_tx_qid); 10811408cc1fSYuval Mintz } 10823da7a37aSMintz, Yuval 108333b2fbd0SMintz, Yuval /* Update the link configuration in bulletin */ 108433b2fbd0SMintz, Yuval memcpy(&link_params, qed_mcp_get_link_params(p_hwfn), 108533b2fbd0SMintz, Yuval sizeof(link_params)); 108633b2fbd0SMintz, Yuval memcpy(&link_state, qed_mcp_get_link_state(p_hwfn), sizeof(link_state)); 108733b2fbd0SMintz, Yuval memcpy(&link_caps, qed_mcp_get_link_capabilities(p_hwfn), 108833b2fbd0SMintz, Yuval sizeof(link_caps)); 108933b2fbd0SMintz, Yuval qed_iov_set_link(p_hwfn, p_params->rel_vf_id, 109033b2fbd0SMintz, Yuval &link_params, &link_state, &link_caps); 109133b2fbd0SMintz, Yuval 10921408cc1fSYuval Mintz rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf); 10931408cc1fSYuval Mintz if (!rc) { 10941408cc1fSYuval Mintz vf->b_init = true; 10951408cc1fSYuval Mintz 10961408cc1fSYuval Mintz if (IS_LEAD_HWFN(p_hwfn)) 10971408cc1fSYuval Mintz p_hwfn->cdev->p_iov_info->num_vfs++; 10981408cc1fSYuval Mintz } 10991408cc1fSYuval Mintz 11001408cc1fSYuval Mintz return rc; 11011408cc1fSYuval Mintz } 11021408cc1fSYuval Mintz 11030b55e27dSYuval Mintz static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn, 11040b55e27dSYuval Mintz struct qed_ptt *p_ptt, u16 rel_vf_id) 11050b55e27dSYuval Mintz { 1106079d20a6SManish Chopra struct qed_mcp_link_capabilities caps; 1107079d20a6SManish Chopra struct qed_mcp_link_params params; 1108079d20a6SManish Chopra struct qed_mcp_link_state link; 11090b55e27dSYuval Mintz struct qed_vf_info *vf = NULL; 11100b55e27dSYuval Mintz 11110b55e27dSYuval Mintz vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true); 11120b55e27dSYuval Mintz if (!vf) { 11130b55e27dSYuval Mintz DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n"); 11140b55e27dSYuval Mintz return -EINVAL; 11150b55e27dSYuval Mintz } 11160b55e27dSYuval Mintz 111736558c3dSYuval Mintz if (vf->bulletin.p_virt) 111836558c3dSYuval Mintz memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt)); 111936558c3dSYuval Mintz 112036558c3dSYuval Mintz memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info)); 112136558c3dSYuval Mintz 1122079d20a6SManish Chopra /* Get the link configuration back in bulletin so 1123079d20a6SManish Chopra * that when VFs are re-enabled they get the actual 1124079d20a6SManish Chopra * link configuration. 1125079d20a6SManish Chopra */ 1126079d20a6SManish Chopra memcpy(¶ms, qed_mcp_get_link_params(p_hwfn), sizeof(params)); 1127079d20a6SManish Chopra memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link)); 1128079d20a6SManish Chopra memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps)); 1129079d20a6SManish Chopra qed_iov_set_link(p_hwfn, rel_vf_id, ¶ms, &link, &caps); 1130079d20a6SManish Chopra 11311fe614d1SYuval Mintz /* Forget the VF's acquisition message */ 11321fe614d1SYuval Mintz memset(&vf->acquire, 0, sizeof(vf->acquire)); 11330b55e27dSYuval Mintz 11340b55e27dSYuval Mintz /* disablng interrupts and resetting permission table was done during 11350b55e27dSYuval Mintz * vf-close, however, we could get here without going through vf_close 11360b55e27dSYuval Mintz */ 11370b55e27dSYuval Mintz /* Disable Interrupts for VF */ 11380b55e27dSYuval Mintz qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0); 11390b55e27dSYuval Mintz 11400b55e27dSYuval Mintz /* Reset Permission table */ 11410b55e27dSYuval Mintz qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0); 11420b55e27dSYuval Mintz 11430b55e27dSYuval Mintz vf->num_rxqs = 0; 11440b55e27dSYuval Mintz vf->num_txqs = 0; 11450b55e27dSYuval Mintz qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf); 11460b55e27dSYuval Mintz 11470b55e27dSYuval Mintz if (vf->b_init) { 11480b55e27dSYuval Mintz vf->b_init = false; 11490b55e27dSYuval Mintz 11500b55e27dSYuval Mintz if (IS_LEAD_HWFN(p_hwfn)) 11510b55e27dSYuval Mintz p_hwfn->cdev->p_iov_info->num_vfs--; 11520b55e27dSYuval Mintz } 11530b55e27dSYuval Mintz 11540b55e27dSYuval Mintz return 0; 11550b55e27dSYuval Mintz } 11560b55e27dSYuval Mintz 115737bff2b9SYuval Mintz static bool qed_iov_tlv_supported(u16 tlvtype) 115837bff2b9SYuval Mintz { 115937bff2b9SYuval Mintz return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX; 116037bff2b9SYuval Mintz } 116137bff2b9SYuval Mintz 116237bff2b9SYuval Mintz /* place a given tlv on the tlv buffer, continuing current tlv list */ 116337bff2b9SYuval Mintz void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length) 116437bff2b9SYuval Mintz { 116537bff2b9SYuval Mintz struct channel_tlv *tl = (struct channel_tlv *)*offset; 116637bff2b9SYuval Mintz 116737bff2b9SYuval Mintz tl->type = type; 116837bff2b9SYuval Mintz tl->length = length; 116937bff2b9SYuval Mintz 117037bff2b9SYuval Mintz /* Offset should keep pointing to next TLV (the end of the last) */ 117137bff2b9SYuval Mintz *offset += length; 117237bff2b9SYuval Mintz 117337bff2b9SYuval Mintz /* Return a pointer to the start of the added tlv */ 117437bff2b9SYuval Mintz return *offset - length; 117537bff2b9SYuval Mintz } 117637bff2b9SYuval Mintz 117737bff2b9SYuval Mintz /* list the types and lengths of the tlvs on the buffer */ 117837bff2b9SYuval Mintz void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list) 117937bff2b9SYuval Mintz { 118037bff2b9SYuval Mintz u16 i = 1, total_length = 0; 118137bff2b9SYuval Mintz struct channel_tlv *tlv; 118237bff2b9SYuval Mintz 118337bff2b9SYuval Mintz do { 118437bff2b9SYuval Mintz tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length); 118537bff2b9SYuval Mintz 118637bff2b9SYuval Mintz /* output tlv */ 118737bff2b9SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 118837bff2b9SYuval Mintz "TLV number %d: type %d, length %d\n", 118937bff2b9SYuval Mintz i, tlv->type, tlv->length); 119037bff2b9SYuval Mintz 119137bff2b9SYuval Mintz if (tlv->type == CHANNEL_TLV_LIST_END) 119237bff2b9SYuval Mintz return; 119337bff2b9SYuval Mintz 119437bff2b9SYuval Mintz /* Validate entry - protect against malicious VFs */ 119537bff2b9SYuval Mintz if (!tlv->length) { 119637bff2b9SYuval Mintz DP_NOTICE(p_hwfn, "TLV of length 0 found\n"); 119737bff2b9SYuval Mintz return; 119837bff2b9SYuval Mintz } 119937bff2b9SYuval Mintz 120037bff2b9SYuval Mintz total_length += tlv->length; 120137bff2b9SYuval Mintz 120237bff2b9SYuval Mintz if (total_length >= sizeof(struct tlv_buffer_size)) { 120337bff2b9SYuval Mintz DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n"); 120437bff2b9SYuval Mintz return; 120537bff2b9SYuval Mintz } 120637bff2b9SYuval Mintz 120737bff2b9SYuval Mintz i++; 120837bff2b9SYuval Mintz } while (1); 120937bff2b9SYuval Mintz } 121037bff2b9SYuval Mintz 121137bff2b9SYuval Mintz static void qed_iov_send_response(struct qed_hwfn *p_hwfn, 121237bff2b9SYuval Mintz struct qed_ptt *p_ptt, 121337bff2b9SYuval Mintz struct qed_vf_info *p_vf, 121437bff2b9SYuval Mintz u16 length, u8 status) 121537bff2b9SYuval Mintz { 121637bff2b9SYuval Mintz struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx; 121737bff2b9SYuval Mintz struct qed_dmae_params params; 121837bff2b9SYuval Mintz u8 eng_vf_id; 121937bff2b9SYuval Mintz 122037bff2b9SYuval Mintz mbx->reply_virt->default_resp.hdr.status = status; 122137bff2b9SYuval Mintz 122237bff2b9SYuval Mintz qed_dp_tlv_list(p_hwfn, mbx->reply_virt); 122337bff2b9SYuval Mintz 122437bff2b9SYuval Mintz eng_vf_id = p_vf->abs_vf_id; 122537bff2b9SYuval Mintz 122637bff2b9SYuval Mintz memset(¶ms, 0, sizeof(struct qed_dmae_params)); 122737bff2b9SYuval Mintz params.flags = QED_DMAE_FLAG_VF_DST; 122837bff2b9SYuval Mintz params.dst_vfid = eng_vf_id; 122937bff2b9SYuval Mintz 123037bff2b9SYuval Mintz qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64), 123137bff2b9SYuval Mintz mbx->req_virt->first_tlv.reply_address + 123237bff2b9SYuval Mintz sizeof(u64), 123337bff2b9SYuval Mintz (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4, 123437bff2b9SYuval Mintz ¶ms); 123537bff2b9SYuval Mintz 1236d9194081SMintz, Yuval /* Once PF copies the rc to the VF, the latter can continue 1237d9194081SMintz, Yuval * and send an additional message. So we have to make sure the 1238d9194081SMintz, Yuval * channel would be re-set to ready prior to that. 1239d9194081SMintz, Yuval */ 124037bff2b9SYuval Mintz REG_WR(p_hwfn, 124137bff2b9SYuval Mintz GTT_BAR0_MAP_REG_USDM_RAM + 124237bff2b9SYuval Mintz USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1); 1243d9194081SMintz, Yuval 1244d9194081SMintz, Yuval qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys, 1245d9194081SMintz, Yuval mbx->req_virt->first_tlv.reply_address, 1246d9194081SMintz, Yuval sizeof(u64) / 4, ¶ms); 124737bff2b9SYuval Mintz } 124837bff2b9SYuval Mintz 1249dacd88d6SYuval Mintz static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn, 1250dacd88d6SYuval Mintz enum qed_iov_vport_update_flag flag) 1251dacd88d6SYuval Mintz { 1252dacd88d6SYuval Mintz switch (flag) { 1253dacd88d6SYuval Mintz case QED_IOV_VP_UPDATE_ACTIVATE: 1254dacd88d6SYuval Mintz return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE; 125517b235c1SYuval Mintz case QED_IOV_VP_UPDATE_VLAN_STRIP: 125617b235c1SYuval Mintz return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP; 125717b235c1SYuval Mintz case QED_IOV_VP_UPDATE_TX_SWITCH: 125817b235c1SYuval Mintz return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH; 1259dacd88d6SYuval Mintz case QED_IOV_VP_UPDATE_MCAST: 1260dacd88d6SYuval Mintz return CHANNEL_TLV_VPORT_UPDATE_MCAST; 1261dacd88d6SYuval Mintz case QED_IOV_VP_UPDATE_ACCEPT_PARAM: 1262dacd88d6SYuval Mintz return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM; 1263dacd88d6SYuval Mintz case QED_IOV_VP_UPDATE_RSS: 1264dacd88d6SYuval Mintz return CHANNEL_TLV_VPORT_UPDATE_RSS; 126517b235c1SYuval Mintz case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN: 126617b235c1SYuval Mintz return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN; 126717b235c1SYuval Mintz case QED_IOV_VP_UPDATE_SGE_TPA: 126817b235c1SYuval Mintz return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA; 1269dacd88d6SYuval Mintz default: 1270dacd88d6SYuval Mintz return 0; 1271dacd88d6SYuval Mintz } 1272dacd88d6SYuval Mintz } 1273dacd88d6SYuval Mintz 1274dacd88d6SYuval Mintz static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn, 1275dacd88d6SYuval Mintz struct qed_vf_info *p_vf, 1276dacd88d6SYuval Mintz struct qed_iov_vf_mbx *p_mbx, 1277dacd88d6SYuval Mintz u8 status, 1278dacd88d6SYuval Mintz u16 tlvs_mask, u16 tlvs_accepted) 1279dacd88d6SYuval Mintz { 1280dacd88d6SYuval Mintz struct pfvf_def_resp_tlv *resp; 1281dacd88d6SYuval Mintz u16 size, total_len, i; 1282dacd88d6SYuval Mintz 1283dacd88d6SYuval Mintz memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs)); 1284dacd88d6SYuval Mintz p_mbx->offset = (u8 *)p_mbx->reply_virt; 1285dacd88d6SYuval Mintz size = sizeof(struct pfvf_def_resp_tlv); 1286dacd88d6SYuval Mintz total_len = size; 1287dacd88d6SYuval Mintz 1288dacd88d6SYuval Mintz qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size); 1289dacd88d6SYuval Mintz 1290dacd88d6SYuval Mintz /* Prepare response for all extended tlvs if they are found by PF */ 1291dacd88d6SYuval Mintz for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) { 12921a635e48SYuval Mintz if (!(tlvs_mask & BIT(i))) 1293dacd88d6SYuval Mintz continue; 1294dacd88d6SYuval Mintz 1295dacd88d6SYuval Mintz resp = qed_add_tlv(p_hwfn, &p_mbx->offset, 1296dacd88d6SYuval Mintz qed_iov_vport_to_tlv(p_hwfn, i), size); 1297dacd88d6SYuval Mintz 12981a635e48SYuval Mintz if (tlvs_accepted & BIT(i)) 1299dacd88d6SYuval Mintz resp->hdr.status = status; 1300dacd88d6SYuval Mintz else 1301dacd88d6SYuval Mintz resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED; 1302dacd88d6SYuval Mintz 1303dacd88d6SYuval Mintz DP_VERBOSE(p_hwfn, 1304dacd88d6SYuval Mintz QED_MSG_IOV, 1305dacd88d6SYuval Mintz "VF[%d] - vport_update response: TLV %d, status %02x\n", 1306dacd88d6SYuval Mintz p_vf->relative_vf_id, 1307dacd88d6SYuval Mintz qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status); 1308dacd88d6SYuval Mintz 1309dacd88d6SYuval Mintz total_len += size; 1310dacd88d6SYuval Mintz } 1311dacd88d6SYuval Mintz 1312dacd88d6SYuval Mintz qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END, 1313dacd88d6SYuval Mintz sizeof(struct channel_list_end_tlv)); 1314dacd88d6SYuval Mintz 1315dacd88d6SYuval Mintz return total_len; 1316dacd88d6SYuval Mintz } 1317dacd88d6SYuval Mintz 131837bff2b9SYuval Mintz static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn, 131937bff2b9SYuval Mintz struct qed_ptt *p_ptt, 132037bff2b9SYuval Mintz struct qed_vf_info *vf_info, 132137bff2b9SYuval Mintz u16 type, u16 length, u8 status) 132237bff2b9SYuval Mintz { 132337bff2b9SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx; 132437bff2b9SYuval Mintz 132537bff2b9SYuval Mintz mbx->offset = (u8 *)mbx->reply_virt; 132637bff2b9SYuval Mintz 132737bff2b9SYuval Mintz qed_add_tlv(p_hwfn, &mbx->offset, type, length); 132837bff2b9SYuval Mintz qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END, 132937bff2b9SYuval Mintz sizeof(struct channel_list_end_tlv)); 133037bff2b9SYuval Mintz 133137bff2b9SYuval Mintz qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status); 133237bff2b9SYuval Mintz } 133337bff2b9SYuval Mintz 1334ba56947aSBaoyou Xie static struct 1335ba56947aSBaoyou Xie qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn, 13360b55e27dSYuval Mintz u16 relative_vf_id, 13370b55e27dSYuval Mintz bool b_enabled_only) 13380b55e27dSYuval Mintz { 13390b55e27dSYuval Mintz struct qed_vf_info *vf = NULL; 13400b55e27dSYuval Mintz 13410b55e27dSYuval Mintz vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only); 13420b55e27dSYuval Mintz if (!vf) 13430b55e27dSYuval Mintz return NULL; 13440b55e27dSYuval Mintz 13450b55e27dSYuval Mintz return &vf->p_vf_info; 13460b55e27dSYuval Mintz } 13470b55e27dSYuval Mintz 1348ba56947aSBaoyou Xie static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid) 13490b55e27dSYuval Mintz { 13500b55e27dSYuval Mintz struct qed_public_vf_info *vf_info; 13510b55e27dSYuval Mintz 13520b55e27dSYuval Mintz vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false); 13530b55e27dSYuval Mintz 13540b55e27dSYuval Mintz if (!vf_info) 13550b55e27dSYuval Mintz return; 13560b55e27dSYuval Mintz 13570b55e27dSYuval Mintz /* Clear the VF mac */ 13580ee28e31SShyam Saini eth_zero_addr(vf_info->mac); 1359f990c82cSMintz, Yuval 1360f990c82cSMintz, Yuval vf_info->rx_accept_mode = 0; 1361f990c82cSMintz, Yuval vf_info->tx_accept_mode = 0; 13620b55e27dSYuval Mintz } 13630b55e27dSYuval Mintz 13640b55e27dSYuval Mintz static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn, 13650b55e27dSYuval Mintz struct qed_vf_info *p_vf) 13660b55e27dSYuval Mintz { 1367007bc371SMintz, Yuval u32 i, j; 13680b55e27dSYuval Mintz 13690b55e27dSYuval Mintz p_vf->vf_bulletin = 0; 1370dacd88d6SYuval Mintz p_vf->vport_instance = 0; 137108feecd7SYuval Mintz p_vf->configured_features = 0; 13720b55e27dSYuval Mintz 13730b55e27dSYuval Mintz /* If VF previously requested less resources, go back to default */ 13740b55e27dSYuval Mintz p_vf->num_rxqs = p_vf->num_sbs; 13750b55e27dSYuval Mintz p_vf->num_txqs = p_vf->num_sbs; 13760b55e27dSYuval Mintz 1377dacd88d6SYuval Mintz p_vf->num_active_rxqs = 0; 1378dacd88d6SYuval Mintz 13793da7a37aSMintz, Yuval for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) { 1380007bc371SMintz, Yuval struct qed_vf_queue *p_queue = &p_vf->vf_queues[i]; 13813da7a37aSMintz, Yuval 1382007bc371SMintz, Yuval for (j = 0; j < MAX_QUEUES_PER_QZONE; j++) { 1383007bc371SMintz, Yuval if (!p_queue->cids[j].p_cid) 1384007bc371SMintz, Yuval continue; 13853da7a37aSMintz, Yuval 1386007bc371SMintz, Yuval qed_eth_queue_cid_release(p_hwfn, 1387007bc371SMintz, Yuval p_queue->cids[j].p_cid); 1388007bc371SMintz, Yuval p_queue->cids[j].p_cid = NULL; 13893da7a37aSMintz, Yuval } 13903da7a37aSMintz, Yuval } 13910b55e27dSYuval Mintz 139208feecd7SYuval Mintz memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config)); 13931fe614d1SYuval Mintz memset(&p_vf->acquire, 0, sizeof(p_vf->acquire)); 13940b55e27dSYuval Mintz qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id); 13950b55e27dSYuval Mintz } 13960b55e27dSYuval Mintz 13971a850bfcSMintz, Yuval /* Returns either 0, or log(size) */ 13981a850bfcSMintz, Yuval static u32 qed_iov_vf_db_bar_size(struct qed_hwfn *p_hwfn, 13991a850bfcSMintz, Yuval struct qed_ptt *p_ptt) 14001a850bfcSMintz, Yuval { 14011a850bfcSMintz, Yuval u32 val = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_VF_BAR1_SIZE); 14021a850bfcSMintz, Yuval 14031a850bfcSMintz, Yuval if (val) 14041a850bfcSMintz, Yuval return val + 11; 14051a850bfcSMintz, Yuval return 0; 14061a850bfcSMintz, Yuval } 14071a850bfcSMintz, Yuval 14081a850bfcSMintz, Yuval static void 14091a850bfcSMintz, Yuval qed_iov_vf_mbx_acquire_resc_cids(struct qed_hwfn *p_hwfn, 14101a850bfcSMintz, Yuval struct qed_ptt *p_ptt, 14111a850bfcSMintz, Yuval struct qed_vf_info *p_vf, 14121a850bfcSMintz, Yuval struct vf_pf_resc_request *p_req, 14131a850bfcSMintz, Yuval struct pf_vf_resc *p_resp) 14141a850bfcSMintz, Yuval { 14151a850bfcSMintz, Yuval u8 num_vf_cons = p_hwfn->pf_params.eth_pf_params.num_vf_cons; 14161a850bfcSMintz, Yuval u8 db_size = qed_db_addr_vf(1, DQ_DEMS_LEGACY) - 14171a850bfcSMintz, Yuval qed_db_addr_vf(0, DQ_DEMS_LEGACY); 14181a850bfcSMintz, Yuval u32 bar_size; 14191a850bfcSMintz, Yuval 14201a850bfcSMintz, Yuval p_resp->num_cids = min_t(u8, p_req->num_cids, num_vf_cons); 14211a850bfcSMintz, Yuval 14221a850bfcSMintz, Yuval /* If VF didn't bother asking for QIDs than don't bother limiting 14231a850bfcSMintz, Yuval * number of CIDs. The VF doesn't care about the number, and this 14241a850bfcSMintz, Yuval * has the likely result of causing an additional acquisition. 14251a850bfcSMintz, Yuval */ 14261a850bfcSMintz, Yuval if (!(p_vf->acquire.vfdev_info.capabilities & 14271a850bfcSMintz, Yuval VFPF_ACQUIRE_CAP_QUEUE_QIDS)) 14281a850bfcSMintz, Yuval return; 14291a850bfcSMintz, Yuval 14301a850bfcSMintz, Yuval /* If doorbell bar was mapped by VF, limit the VF CIDs to an amount 14311a850bfcSMintz, Yuval * that would make sure doorbells for all CIDs fall within the bar. 14321a850bfcSMintz, Yuval * If it doesn't, make sure regview window is sufficient. 14331a850bfcSMintz, Yuval */ 14341a850bfcSMintz, Yuval if (p_vf->acquire.vfdev_info.capabilities & 14351a850bfcSMintz, Yuval VFPF_ACQUIRE_CAP_PHYSICAL_BAR) { 14361a850bfcSMintz, Yuval bar_size = qed_iov_vf_db_bar_size(p_hwfn, p_ptt); 14371a850bfcSMintz, Yuval if (bar_size) 14381a850bfcSMintz, Yuval bar_size = 1 << bar_size; 14391a850bfcSMintz, Yuval 14401a850bfcSMintz, Yuval if (p_hwfn->cdev->num_hwfns > 1) 14411a850bfcSMintz, Yuval bar_size /= 2; 14421a850bfcSMintz, Yuval } else { 14431a850bfcSMintz, Yuval bar_size = PXP_VF_BAR0_DQ_LENGTH; 14441a850bfcSMintz, Yuval } 14451a850bfcSMintz, Yuval 14461a850bfcSMintz, Yuval if (bar_size / db_size < 256) 14471a850bfcSMintz, Yuval p_resp->num_cids = min_t(u8, p_resp->num_cids, 14481a850bfcSMintz, Yuval (u8)(bar_size / db_size)); 14491a850bfcSMintz, Yuval } 14501a850bfcSMintz, Yuval 14511cf2b1a9SYuval Mintz static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn, 14521cf2b1a9SYuval Mintz struct qed_ptt *p_ptt, 14531cf2b1a9SYuval Mintz struct qed_vf_info *p_vf, 14541cf2b1a9SYuval Mintz struct vf_pf_resc_request *p_req, 14551cf2b1a9SYuval Mintz struct pf_vf_resc *p_resp) 14561cf2b1a9SYuval Mintz { 1457007bc371SMintz, Yuval u8 i; 14581cf2b1a9SYuval Mintz 14591cf2b1a9SYuval Mintz /* Queue related information */ 14601cf2b1a9SYuval Mintz p_resp->num_rxqs = p_vf->num_rxqs; 14611cf2b1a9SYuval Mintz p_resp->num_txqs = p_vf->num_txqs; 14621cf2b1a9SYuval Mintz p_resp->num_sbs = p_vf->num_sbs; 14631cf2b1a9SYuval Mintz 14641cf2b1a9SYuval Mintz for (i = 0; i < p_resp->num_sbs; i++) { 14651cf2b1a9SYuval Mintz p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i]; 14661cf2b1a9SYuval Mintz p_resp->hw_sbs[i].sb_qid = 0; 14671cf2b1a9SYuval Mintz } 14681cf2b1a9SYuval Mintz 14691cf2b1a9SYuval Mintz /* These fields are filled for backward compatibility. 14701cf2b1a9SYuval Mintz * Unused by modern vfs. 14711cf2b1a9SYuval Mintz */ 14721cf2b1a9SYuval Mintz for (i = 0; i < p_resp->num_rxqs; i++) { 14731cf2b1a9SYuval Mintz qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid, 14741cf2b1a9SYuval Mintz (u16 *)&p_resp->hw_qid[i]); 1475007bc371SMintz, Yuval p_resp->cid[i] = i; 14761cf2b1a9SYuval Mintz } 14771cf2b1a9SYuval Mintz 14781cf2b1a9SYuval Mintz /* Filter related information */ 14791cf2b1a9SYuval Mintz p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters, 14801cf2b1a9SYuval Mintz p_req->num_mac_filters); 14811cf2b1a9SYuval Mintz p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters, 14821cf2b1a9SYuval Mintz p_req->num_vlan_filters); 14831cf2b1a9SYuval Mintz 14841a850bfcSMintz, Yuval qed_iov_vf_mbx_acquire_resc_cids(p_hwfn, p_ptt, p_vf, p_req, p_resp); 148508bc8f15SMintz, Yuval 14861cf2b1a9SYuval Mintz /* This isn't really needed/enforced, but some legacy VFs might depend 14871cf2b1a9SYuval Mintz * on the correct filling of this field. 14881cf2b1a9SYuval Mintz */ 14891cf2b1a9SYuval Mintz p_resp->num_mc_filters = QED_MAX_MC_ADDRS; 14901cf2b1a9SYuval Mintz 14911cf2b1a9SYuval Mintz /* Validate sufficient resources for VF */ 14921cf2b1a9SYuval Mintz if (p_resp->num_rxqs < p_req->num_rxqs || 14931cf2b1a9SYuval Mintz p_resp->num_txqs < p_req->num_txqs || 14941cf2b1a9SYuval Mintz p_resp->num_sbs < p_req->num_sbs || 14951cf2b1a9SYuval Mintz p_resp->num_mac_filters < p_req->num_mac_filters || 14961cf2b1a9SYuval Mintz p_resp->num_vlan_filters < p_req->num_vlan_filters || 149708bc8f15SMintz, Yuval p_resp->num_mc_filters < p_req->num_mc_filters || 149808bc8f15SMintz, Yuval p_resp->num_cids < p_req->num_cids) { 14991cf2b1a9SYuval Mintz DP_VERBOSE(p_hwfn, 15001cf2b1a9SYuval Mintz QED_MSG_IOV, 150108bc8f15SMintz, Yuval "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]\n", 15021cf2b1a9SYuval Mintz p_vf->abs_vf_id, 15031cf2b1a9SYuval Mintz p_req->num_rxqs, 15041cf2b1a9SYuval Mintz p_resp->num_rxqs, 15051cf2b1a9SYuval Mintz p_req->num_rxqs, 15061cf2b1a9SYuval Mintz p_resp->num_txqs, 15071cf2b1a9SYuval Mintz p_req->num_sbs, 15081cf2b1a9SYuval Mintz p_resp->num_sbs, 15091cf2b1a9SYuval Mintz p_req->num_mac_filters, 15101cf2b1a9SYuval Mintz p_resp->num_mac_filters, 15111cf2b1a9SYuval Mintz p_req->num_vlan_filters, 15121cf2b1a9SYuval Mintz p_resp->num_vlan_filters, 151308bc8f15SMintz, Yuval p_req->num_mc_filters, 151408bc8f15SMintz, Yuval p_resp->num_mc_filters, 151508bc8f15SMintz, Yuval p_req->num_cids, p_resp->num_cids); 1516a044df83SYuval Mintz 1517a044df83SYuval Mintz /* Some legacy OSes are incapable of correctly handling this 1518a044df83SYuval Mintz * failure. 1519a044df83SYuval Mintz */ 1520a044df83SYuval Mintz if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor == 1521a044df83SYuval Mintz ETH_HSI_VER_NO_PKT_LEN_TUNN) && 1522a044df83SYuval Mintz (p_vf->acquire.vfdev_info.os_type == 1523a044df83SYuval Mintz VFPF_ACQUIRE_OS_WINDOWS)) 1524a044df83SYuval Mintz return PFVF_STATUS_SUCCESS; 1525a044df83SYuval Mintz 15261cf2b1a9SYuval Mintz return PFVF_STATUS_NO_RESOURCE; 15271cf2b1a9SYuval Mintz } 15281cf2b1a9SYuval Mintz 15291cf2b1a9SYuval Mintz return PFVF_STATUS_SUCCESS; 15301cf2b1a9SYuval Mintz } 15311cf2b1a9SYuval Mintz 15321cf2b1a9SYuval Mintz static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn, 15331cf2b1a9SYuval Mintz struct pfvf_stats_info *p_stats) 15341cf2b1a9SYuval Mintz { 15351cf2b1a9SYuval Mintz p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B + 15361cf2b1a9SYuval Mintz offsetof(struct mstorm_vf_zone, 15371cf2b1a9SYuval Mintz non_trigger.eth_queue_stat); 15381cf2b1a9SYuval Mintz p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat); 15391cf2b1a9SYuval Mintz p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B + 15401cf2b1a9SYuval Mintz offsetof(struct ustorm_vf_zone, 15411cf2b1a9SYuval Mintz non_trigger.eth_queue_stat); 15421cf2b1a9SYuval Mintz p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat); 15431cf2b1a9SYuval Mintz p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B + 15441cf2b1a9SYuval Mintz offsetof(struct pstorm_vf_zone, 15451cf2b1a9SYuval Mintz non_trigger.eth_queue_stat); 15461cf2b1a9SYuval Mintz p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat); 15471cf2b1a9SYuval Mintz p_stats->tstats.address = 0; 15481cf2b1a9SYuval Mintz p_stats->tstats.len = 0; 15491cf2b1a9SYuval Mintz } 15501cf2b1a9SYuval Mintz 15511408cc1fSYuval Mintz static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn, 155237bff2b9SYuval Mintz struct qed_ptt *p_ptt, 15531408cc1fSYuval Mintz struct qed_vf_info *vf) 155437bff2b9SYuval Mintz { 15551408cc1fSYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 15561408cc1fSYuval Mintz struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp; 15571408cc1fSYuval Mintz struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info; 15581408cc1fSYuval Mintz struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire; 15591cf2b1a9SYuval Mintz u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED; 15601408cc1fSYuval Mintz struct pf_vf_resc *resc = &resp->resc; 15611fe614d1SYuval Mintz int rc; 15621fe614d1SYuval Mintz 15631fe614d1SYuval Mintz memset(resp, 0, sizeof(*resp)); 15641408cc1fSYuval Mintz 156505fafbfbSYuval Mintz /* Write the PF version so that VF would know which version 156605fafbfbSYuval Mintz * is supported - might be later overriden. This guarantees that 156705fafbfbSYuval Mintz * VF could recognize legacy PF based on lack of versions in reply. 156805fafbfbSYuval Mintz */ 156905fafbfbSYuval Mintz pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR; 157005fafbfbSYuval Mintz pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR; 157105fafbfbSYuval Mintz 1572a044df83SYuval Mintz if (vf->state != VF_FREE && vf->state != VF_STOPPED) { 1573a044df83SYuval Mintz DP_VERBOSE(p_hwfn, 1574a044df83SYuval Mintz QED_MSG_IOV, 1575a044df83SYuval Mintz "VF[%d] sent ACQUIRE but is already in state %d - fail request\n", 1576a044df83SYuval Mintz vf->abs_vf_id, vf->state); 1577a044df83SYuval Mintz goto out; 1578a044df83SYuval Mintz } 1579a044df83SYuval Mintz 15801408cc1fSYuval Mintz /* Validate FW compatibility */ 15811fe614d1SYuval Mintz if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) { 1582a044df83SYuval Mintz if (req->vfdev_info.capabilities & 1583a044df83SYuval Mintz VFPF_ACQUIRE_CAP_PRE_FP_HSI) { 1584a044df83SYuval Mintz struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info; 1585a044df83SYuval Mintz 1586a044df83SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 1587a044df83SYuval Mintz "VF[%d] is pre-fastpath HSI\n", 1588a044df83SYuval Mintz vf->abs_vf_id); 1589a044df83SYuval Mintz p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR; 1590a044df83SYuval Mintz p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN; 1591a044df83SYuval Mintz } else { 15921408cc1fSYuval Mintz DP_INFO(p_hwfn, 15931fe614d1SYuval Mintz "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n", 15941408cc1fSYuval Mintz vf->abs_vf_id, 15951fe614d1SYuval Mintz req->vfdev_info.eth_fp_hsi_major, 15961fe614d1SYuval Mintz req->vfdev_info.eth_fp_hsi_minor, 15971fe614d1SYuval Mintz ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR); 15981fe614d1SYuval Mintz 15991408cc1fSYuval Mintz goto out; 16001408cc1fSYuval Mintz } 1601a044df83SYuval Mintz } 16021408cc1fSYuval Mintz 16031408cc1fSYuval Mintz /* On 100g PFs, prevent old VFs from loading */ 16041408cc1fSYuval Mintz if ((p_hwfn->cdev->num_hwfns > 1) && 16051408cc1fSYuval Mintz !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) { 16061408cc1fSYuval Mintz DP_INFO(p_hwfn, 16071408cc1fSYuval Mintz "VF[%d] is running an old driver that doesn't support 100g\n", 16081408cc1fSYuval Mintz vf->abs_vf_id); 16091408cc1fSYuval Mintz goto out; 16101408cc1fSYuval Mintz } 16111408cc1fSYuval Mintz 16121fe614d1SYuval Mintz /* Store the acquire message */ 16131fe614d1SYuval Mintz memcpy(&vf->acquire, req, sizeof(vf->acquire)); 16141408cc1fSYuval Mintz 16151408cc1fSYuval Mintz vf->opaque_fid = req->vfdev_info.opaque_fid; 16161408cc1fSYuval Mintz 16171408cc1fSYuval Mintz vf->vf_bulletin = req->bulletin_addr; 16181408cc1fSYuval Mintz vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ? 16191408cc1fSYuval Mintz vf->bulletin.size : req->bulletin_size; 16201408cc1fSYuval Mintz 16211408cc1fSYuval Mintz /* fill in pfdev info */ 16221408cc1fSYuval Mintz pfdev_info->chip_num = p_hwfn->cdev->chip_num; 16231408cc1fSYuval Mintz pfdev_info->db_size = 0; 162421dd79e8STomer Tayar pfdev_info->indices_per_sb = PIS_PER_SB_E4; 16251408cc1fSYuval Mintz 16261408cc1fSYuval Mintz pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED | 16271408cc1fSYuval Mintz PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE; 16281408cc1fSYuval Mintz if (p_hwfn->cdev->num_hwfns > 1) 16291408cc1fSYuval Mintz pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G; 16301408cc1fSYuval Mintz 163108bc8f15SMintz, Yuval /* Share our ability to use multiple queue-ids only with VFs 163208bc8f15SMintz, Yuval * that request it. 163308bc8f15SMintz, Yuval */ 163408bc8f15SMintz, Yuval if (req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_QUEUE_QIDS) 163508bc8f15SMintz, Yuval pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_QUEUE_QIDS; 163608bc8f15SMintz, Yuval 16371a850bfcSMintz, Yuval /* Share the sizes of the bars with VF */ 16381a850bfcSMintz, Yuval resp->pfdev_info.bar_size = qed_iov_vf_db_bar_size(p_hwfn, p_ptt); 16391a850bfcSMintz, Yuval 16401cf2b1a9SYuval Mintz qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info); 16411408cc1fSYuval Mintz 16421408cc1fSYuval Mintz memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN); 16431408cc1fSYuval Mintz 16441408cc1fSYuval Mintz pfdev_info->fw_major = FW_MAJOR_VERSION; 16451408cc1fSYuval Mintz pfdev_info->fw_minor = FW_MINOR_VERSION; 16461408cc1fSYuval Mintz pfdev_info->fw_rev = FW_REVISION_VERSION; 16471408cc1fSYuval Mintz pfdev_info->fw_eng = FW_ENGINEERING_VERSION; 1648a044df83SYuval Mintz 1649a044df83SYuval Mintz /* Incorrect when legacy, but doesn't matter as legacy isn't reading 1650a044df83SYuval Mintz * this field. 1651a044df83SYuval Mintz */ 16521a635e48SYuval Mintz pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR, 16531fe614d1SYuval Mintz req->vfdev_info.eth_fp_hsi_minor); 16541408cc1fSYuval Mintz pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX; 16551408cc1fSYuval Mintz qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL); 16561408cc1fSYuval Mintz 16571408cc1fSYuval Mintz pfdev_info->dev_type = p_hwfn->cdev->type; 16581408cc1fSYuval Mintz pfdev_info->chip_rev = p_hwfn->cdev->chip_rev; 16591408cc1fSYuval Mintz 16601cf2b1a9SYuval Mintz /* Fill resources available to VF; Make sure there are enough to 16611cf2b1a9SYuval Mintz * satisfy the VF's request. 16621408cc1fSYuval Mintz */ 16631cf2b1a9SYuval Mintz vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf, 16641cf2b1a9SYuval Mintz &req->resc_request, resc); 16651cf2b1a9SYuval Mintz if (vfpf_status != PFVF_STATUS_SUCCESS) 16661cf2b1a9SYuval Mintz goto out; 16671408cc1fSYuval Mintz 16681fe614d1SYuval Mintz /* Start the VF in FW */ 16691fe614d1SYuval Mintz rc = qed_sp_vf_start(p_hwfn, vf); 16701fe614d1SYuval Mintz if (rc) { 16711fe614d1SYuval Mintz DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id); 16721fe614d1SYuval Mintz vfpf_status = PFVF_STATUS_FAILURE; 16731fe614d1SYuval Mintz goto out; 16741fe614d1SYuval Mintz } 16751fe614d1SYuval Mintz 16761408cc1fSYuval Mintz /* Fill agreed size of bulletin board in response */ 16771408cc1fSYuval Mintz resp->bulletin_size = vf->bulletin.size; 167836558c3dSYuval Mintz qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt); 16791408cc1fSYuval Mintz 16801408cc1fSYuval Mintz DP_VERBOSE(p_hwfn, 16811408cc1fSYuval Mintz QED_MSG_IOV, 16821408cc1fSYuval Mintz "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n" 16831408cc1fSYuval Mintz "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n", 16841408cc1fSYuval Mintz vf->abs_vf_id, 16851408cc1fSYuval Mintz resp->pfdev_info.chip_num, 16861408cc1fSYuval Mintz resp->pfdev_info.db_size, 16871408cc1fSYuval Mintz resp->pfdev_info.indices_per_sb, 16881408cc1fSYuval Mintz resp->pfdev_info.capabilities, 16891408cc1fSYuval Mintz resc->num_rxqs, 16901408cc1fSYuval Mintz resc->num_txqs, 16911408cc1fSYuval Mintz resc->num_sbs, 16921408cc1fSYuval Mintz resc->num_mac_filters, 16931408cc1fSYuval Mintz resc->num_vlan_filters); 16941408cc1fSYuval Mintz vf->state = VF_ACQUIRED; 16951408cc1fSYuval Mintz 16961408cc1fSYuval Mintz /* Prepare Response */ 16971408cc1fSYuval Mintz out: 16981408cc1fSYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE, 16991408cc1fSYuval Mintz sizeof(struct pfvf_acquire_resp_tlv), vfpf_status); 170037bff2b9SYuval Mintz } 170137bff2b9SYuval Mintz 17026ddc7608SYuval Mintz static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, 17036ddc7608SYuval Mintz struct qed_vf_info *p_vf, bool val) 17046ddc7608SYuval Mintz { 17056ddc7608SYuval Mintz struct qed_sp_vport_update_params params; 17066ddc7608SYuval Mintz int rc; 17076ddc7608SYuval Mintz 17086ddc7608SYuval Mintz if (val == p_vf->spoof_chk) { 17096ddc7608SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 17106ddc7608SYuval Mintz "Spoofchk value[%d] is already configured\n", val); 17116ddc7608SYuval Mintz return 0; 17126ddc7608SYuval Mintz } 17136ddc7608SYuval Mintz 17146ddc7608SYuval Mintz memset(¶ms, 0, sizeof(struct qed_sp_vport_update_params)); 17156ddc7608SYuval Mintz params.opaque_fid = p_vf->opaque_fid; 17166ddc7608SYuval Mintz params.vport_id = p_vf->vport_id; 17176ddc7608SYuval Mintz params.update_anti_spoofing_en_flg = 1; 17186ddc7608SYuval Mintz params.anti_spoofing_en = val; 17196ddc7608SYuval Mintz 17206ddc7608SYuval Mintz rc = qed_sp_vport_update(p_hwfn, ¶ms, QED_SPQ_MODE_EBLOCK, NULL); 1721cb1fa088SYuval Mintz if (!rc) { 17226ddc7608SYuval Mintz p_vf->spoof_chk = val; 17236ddc7608SYuval Mintz p_vf->req_spoofchk_val = p_vf->spoof_chk; 17246ddc7608SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 17256ddc7608SYuval Mintz "Spoofchk val[%d] configured\n", val); 17266ddc7608SYuval Mintz } else { 17276ddc7608SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 17286ddc7608SYuval Mintz "Spoofchk configuration[val:%d] failed for VF[%d]\n", 17296ddc7608SYuval Mintz val, p_vf->relative_vf_id); 17306ddc7608SYuval Mintz } 17316ddc7608SYuval Mintz 17326ddc7608SYuval Mintz return rc; 17336ddc7608SYuval Mintz } 17346ddc7608SYuval Mintz 173508feecd7SYuval Mintz static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn, 173608feecd7SYuval Mintz struct qed_vf_info *p_vf) 173708feecd7SYuval Mintz { 173808feecd7SYuval Mintz struct qed_filter_ucast filter; 173908feecd7SYuval Mintz int rc = 0; 174008feecd7SYuval Mintz int i; 174108feecd7SYuval Mintz 174208feecd7SYuval Mintz memset(&filter, 0, sizeof(filter)); 174308feecd7SYuval Mintz filter.is_rx_filter = 1; 174408feecd7SYuval Mintz filter.is_tx_filter = 1; 174508feecd7SYuval Mintz filter.vport_to_add_to = p_vf->vport_id; 174608feecd7SYuval Mintz filter.opcode = QED_FILTER_ADD; 174708feecd7SYuval Mintz 174808feecd7SYuval Mintz /* Reconfigure vlans */ 174908feecd7SYuval Mintz for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) { 175008feecd7SYuval Mintz if (!p_vf->shadow_config.vlans[i].used) 175108feecd7SYuval Mintz continue; 175208feecd7SYuval Mintz 175308feecd7SYuval Mintz filter.type = QED_FILTER_VLAN; 175408feecd7SYuval Mintz filter.vlan = p_vf->shadow_config.vlans[i].vid; 17551a635e48SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 175608feecd7SYuval Mintz "Reconfiguring VLAN [0x%04x] for VF [%04x]\n", 175708feecd7SYuval Mintz filter.vlan, p_vf->relative_vf_id); 17581a635e48SYuval Mintz rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid, 17591a635e48SYuval Mintz &filter, QED_SPQ_MODE_CB, NULL); 176008feecd7SYuval Mintz if (rc) { 176108feecd7SYuval Mintz DP_NOTICE(p_hwfn, 176208feecd7SYuval Mintz "Failed to configure VLAN [%04x] to VF [%04x]\n", 176308feecd7SYuval Mintz filter.vlan, p_vf->relative_vf_id); 176408feecd7SYuval Mintz break; 176508feecd7SYuval Mintz } 176608feecd7SYuval Mintz } 176708feecd7SYuval Mintz 176808feecd7SYuval Mintz return rc; 176908feecd7SYuval Mintz } 177008feecd7SYuval Mintz 177108feecd7SYuval Mintz static int 177208feecd7SYuval Mintz qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn, 177308feecd7SYuval Mintz struct qed_vf_info *p_vf, u64 events) 177408feecd7SYuval Mintz { 177508feecd7SYuval Mintz int rc = 0; 177608feecd7SYuval Mintz 17771a635e48SYuval Mintz if ((events & BIT(VLAN_ADDR_FORCED)) && 177808feecd7SYuval Mintz !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED))) 177908feecd7SYuval Mintz rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf); 178008feecd7SYuval Mintz 178108feecd7SYuval Mintz return rc; 178208feecd7SYuval Mintz } 178308feecd7SYuval Mintz 178408feecd7SYuval Mintz static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn, 178508feecd7SYuval Mintz struct qed_vf_info *p_vf, u64 events) 178608feecd7SYuval Mintz { 178708feecd7SYuval Mintz int rc = 0; 178808feecd7SYuval Mintz struct qed_filter_ucast filter; 178908feecd7SYuval Mintz 179008feecd7SYuval Mintz if (!p_vf->vport_instance) 179108feecd7SYuval Mintz return -EINVAL; 179208feecd7SYuval Mintz 17937425d822SShahed Shaikh if ((events & BIT(MAC_ADDR_FORCED)) || 17947425d822SShahed Shaikh p_vf->p_vf_info.is_trusted_configured) { 1795eff16960SYuval Mintz /* Since there's no way [currently] of removing the MAC, 1796eff16960SYuval Mintz * we can always assume this means we need to force it. 1797eff16960SYuval Mintz */ 1798eff16960SYuval Mintz memset(&filter, 0, sizeof(filter)); 1799eff16960SYuval Mintz filter.type = QED_FILTER_MAC; 1800eff16960SYuval Mintz filter.opcode = QED_FILTER_REPLACE; 1801eff16960SYuval Mintz filter.is_rx_filter = 1; 1802eff16960SYuval Mintz filter.is_tx_filter = 1; 1803eff16960SYuval Mintz filter.vport_to_add_to = p_vf->vport_id; 1804eff16960SYuval Mintz ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac); 1805eff16960SYuval Mintz 1806eff16960SYuval Mintz rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid, 1807eff16960SYuval Mintz &filter, QED_SPQ_MODE_CB, NULL); 1808eff16960SYuval Mintz if (rc) { 1809eff16960SYuval Mintz DP_NOTICE(p_hwfn, 1810eff16960SYuval Mintz "PF failed to configure MAC for VF\n"); 1811eff16960SYuval Mintz return rc; 1812eff16960SYuval Mintz } 18137425d822SShahed Shaikh if (p_vf->p_vf_info.is_trusted_configured) 18147425d822SShahed Shaikh p_vf->configured_features |= 18157425d822SShahed Shaikh BIT(VFPF_BULLETIN_MAC_ADDR); 18167425d822SShahed Shaikh else 18177425d822SShahed Shaikh p_vf->configured_features |= 18187425d822SShahed Shaikh BIT(MAC_ADDR_FORCED); 1819eff16960SYuval Mintz } 1820eff16960SYuval Mintz 18211a635e48SYuval Mintz if (events & BIT(VLAN_ADDR_FORCED)) { 182208feecd7SYuval Mintz struct qed_sp_vport_update_params vport_update; 182308feecd7SYuval Mintz u8 removal; 182408feecd7SYuval Mintz int i; 182508feecd7SYuval Mintz 182608feecd7SYuval Mintz memset(&filter, 0, sizeof(filter)); 182708feecd7SYuval Mintz filter.type = QED_FILTER_VLAN; 182808feecd7SYuval Mintz filter.is_rx_filter = 1; 182908feecd7SYuval Mintz filter.is_tx_filter = 1; 183008feecd7SYuval Mintz filter.vport_to_add_to = p_vf->vport_id; 183108feecd7SYuval Mintz filter.vlan = p_vf->bulletin.p_virt->pvid; 183208feecd7SYuval Mintz filter.opcode = filter.vlan ? QED_FILTER_REPLACE : 183308feecd7SYuval Mintz QED_FILTER_FLUSH; 183408feecd7SYuval Mintz 183508feecd7SYuval Mintz /* Send the ramrod */ 183608feecd7SYuval Mintz rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid, 183708feecd7SYuval Mintz &filter, QED_SPQ_MODE_CB, NULL); 183808feecd7SYuval Mintz if (rc) { 183908feecd7SYuval Mintz DP_NOTICE(p_hwfn, 184008feecd7SYuval Mintz "PF failed to configure VLAN for VF\n"); 184108feecd7SYuval Mintz return rc; 184208feecd7SYuval Mintz } 184308feecd7SYuval Mintz 184408feecd7SYuval Mintz /* Update the default-vlan & silent vlan stripping */ 184508feecd7SYuval Mintz memset(&vport_update, 0, sizeof(vport_update)); 184608feecd7SYuval Mintz vport_update.opaque_fid = p_vf->opaque_fid; 184708feecd7SYuval Mintz vport_update.vport_id = p_vf->vport_id; 184808feecd7SYuval Mintz vport_update.update_default_vlan_enable_flg = 1; 184908feecd7SYuval Mintz vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0; 185008feecd7SYuval Mintz vport_update.update_default_vlan_flg = 1; 185108feecd7SYuval Mintz vport_update.default_vlan = filter.vlan; 185208feecd7SYuval Mintz 185308feecd7SYuval Mintz vport_update.update_inner_vlan_removal_flg = 1; 185408feecd7SYuval Mintz removal = filter.vlan ? 1 185508feecd7SYuval Mintz : p_vf->shadow_config.inner_vlan_removal; 185608feecd7SYuval Mintz vport_update.inner_vlan_removal_flg = removal; 185708feecd7SYuval Mintz vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0; 185808feecd7SYuval Mintz rc = qed_sp_vport_update(p_hwfn, 185908feecd7SYuval Mintz &vport_update, 186008feecd7SYuval Mintz QED_SPQ_MODE_EBLOCK, NULL); 186108feecd7SYuval Mintz if (rc) { 186208feecd7SYuval Mintz DP_NOTICE(p_hwfn, 186308feecd7SYuval Mintz "PF failed to configure VF vport for vlan\n"); 186408feecd7SYuval Mintz return rc; 186508feecd7SYuval Mintz } 186608feecd7SYuval Mintz 186708feecd7SYuval Mintz /* Update all the Rx queues */ 186808feecd7SYuval Mintz for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) { 1869007bc371SMintz, Yuval struct qed_vf_queue *p_queue = &p_vf->vf_queues[i]; 1870007bc371SMintz, Yuval struct qed_queue_cid *p_cid = NULL; 187108feecd7SYuval Mintz 1872007bc371SMintz, Yuval /* There can be at most 1 Rx queue on qzone. Find it */ 1873007bc371SMintz, Yuval p_cid = qed_iov_get_vf_rx_queue_cid(p_queue); 18743da7a37aSMintz, Yuval if (!p_cid) 187508feecd7SYuval Mintz continue; 187608feecd7SYuval Mintz 18773da7a37aSMintz, Yuval rc = qed_sp_eth_rx_queues_update(p_hwfn, 18783da7a37aSMintz, Yuval (void **)&p_cid, 187908feecd7SYuval Mintz 1, 0, 1, 188008feecd7SYuval Mintz QED_SPQ_MODE_EBLOCK, 188108feecd7SYuval Mintz NULL); 188208feecd7SYuval Mintz if (rc) { 188308feecd7SYuval Mintz DP_NOTICE(p_hwfn, 188408feecd7SYuval Mintz "Failed to send Rx update fo queue[0x%04x]\n", 18853da7a37aSMintz, Yuval p_cid->rel.queue_id); 188608feecd7SYuval Mintz return rc; 188708feecd7SYuval Mintz } 188808feecd7SYuval Mintz } 188908feecd7SYuval Mintz 189008feecd7SYuval Mintz if (filter.vlan) 189108feecd7SYuval Mintz p_vf->configured_features |= 1 << VLAN_ADDR_FORCED; 189208feecd7SYuval Mintz else 18931a635e48SYuval Mintz p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED); 189408feecd7SYuval Mintz } 189508feecd7SYuval Mintz 189608feecd7SYuval Mintz /* If forced features are terminated, we need to configure the shadow 189708feecd7SYuval Mintz * configuration back again. 189808feecd7SYuval Mintz */ 189908feecd7SYuval Mintz if (events) 190008feecd7SYuval Mintz qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events); 190108feecd7SYuval Mintz 190208feecd7SYuval Mintz return rc; 190308feecd7SYuval Mintz } 190408feecd7SYuval Mintz 1905dacd88d6SYuval Mintz static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn, 1906dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 1907dacd88d6SYuval Mintz struct qed_vf_info *vf) 1908dacd88d6SYuval Mintz { 1909dacd88d6SYuval Mintz struct qed_sp_vport_start_params params = { 0 }; 1910dacd88d6SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 1911dacd88d6SYuval Mintz struct vfpf_vport_start_tlv *start; 1912dacd88d6SYuval Mintz u8 status = PFVF_STATUS_SUCCESS; 1913dacd88d6SYuval Mintz struct qed_vf_info *vf_info; 191408feecd7SYuval Mintz u64 *p_bitmap; 1915dacd88d6SYuval Mintz int sb_id; 1916dacd88d6SYuval Mintz int rc; 1917dacd88d6SYuval Mintz 1918dacd88d6SYuval Mintz vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true); 1919dacd88d6SYuval Mintz if (!vf_info) { 1920dacd88d6SYuval Mintz DP_NOTICE(p_hwfn->cdev, 1921dacd88d6SYuval Mintz "Failed to get VF info, invalid vfid [%d]\n", 1922dacd88d6SYuval Mintz vf->relative_vf_id); 1923dacd88d6SYuval Mintz return; 1924dacd88d6SYuval Mintz } 1925dacd88d6SYuval Mintz 1926dacd88d6SYuval Mintz vf->state = VF_ENABLED; 1927dacd88d6SYuval Mintz start = &mbx->req_virt->start_vport; 1928dacd88d6SYuval Mintz 1929b801b159SMintz, Yuval qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf); 1930b801b159SMintz, Yuval 1931dacd88d6SYuval Mintz /* Initialize Status block in CAU */ 1932dacd88d6SYuval Mintz for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) { 1933dacd88d6SYuval Mintz if (!start->sb_addr[sb_id]) { 1934dacd88d6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 1935dacd88d6SYuval Mintz "VF[%d] did not fill the address of SB %d\n", 1936dacd88d6SYuval Mintz vf->relative_vf_id, sb_id); 1937dacd88d6SYuval Mintz break; 1938dacd88d6SYuval Mintz } 1939dacd88d6SYuval Mintz 1940dacd88d6SYuval Mintz qed_int_cau_conf_sb(p_hwfn, p_ptt, 1941dacd88d6SYuval Mintz start->sb_addr[sb_id], 19421a635e48SYuval Mintz vf->igu_sbs[sb_id], vf->abs_vf_id, 1); 1943dacd88d6SYuval Mintz } 1944dacd88d6SYuval Mintz 1945dacd88d6SYuval Mintz vf->mtu = start->mtu; 194608feecd7SYuval Mintz vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal; 194708feecd7SYuval Mintz 194808feecd7SYuval Mintz /* Take into consideration configuration forced by hypervisor; 194908feecd7SYuval Mintz * If none is configured, use the supplied VF values [for old 195008feecd7SYuval Mintz * vfs that would still be fine, since they passed '0' as padding]. 195108feecd7SYuval Mintz */ 195208feecd7SYuval Mintz p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap; 19531a635e48SYuval Mintz if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) { 195408feecd7SYuval Mintz u8 vf_req = start->only_untagged; 195508feecd7SYuval Mintz 195608feecd7SYuval Mintz vf_info->bulletin.p_virt->default_only_untagged = vf_req; 195708feecd7SYuval Mintz *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT; 195808feecd7SYuval Mintz } 1959dacd88d6SYuval Mintz 1960dacd88d6SYuval Mintz params.tpa_mode = start->tpa_mode; 1961dacd88d6SYuval Mintz params.remove_inner_vlan = start->inner_vlan_removal; 1962831bfb0eSYuval Mintz params.tx_switching = true; 1963dacd88d6SYuval Mintz 196408feecd7SYuval Mintz params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged; 1965dacd88d6SYuval Mintz params.drop_ttl0 = false; 1966dacd88d6SYuval Mintz params.concrete_fid = vf->concrete_fid; 1967dacd88d6SYuval Mintz params.opaque_fid = vf->opaque_fid; 1968dacd88d6SYuval Mintz params.vport_id = vf->vport_id; 1969dacd88d6SYuval Mintz params.max_buffers_per_cqe = start->max_buffers_per_cqe; 1970dacd88d6SYuval Mintz params.mtu = vf->mtu; 197111a85d75SYuval Mintz params.check_mac = true; 1972dacd88d6SYuval Mintz 1973dacd88d6SYuval Mintz rc = qed_sp_eth_vport_start(p_hwfn, ¶ms); 19741a635e48SYuval Mintz if (rc) { 1975dacd88d6SYuval Mintz DP_ERR(p_hwfn, 1976dacd88d6SYuval Mintz "qed_iov_vf_mbx_start_vport returned error %d\n", rc); 1977dacd88d6SYuval Mintz status = PFVF_STATUS_FAILURE; 1978dacd88d6SYuval Mintz } else { 1979dacd88d6SYuval Mintz vf->vport_instance++; 198008feecd7SYuval Mintz 198108feecd7SYuval Mintz /* Force configuration if needed on the newly opened vport */ 198208feecd7SYuval Mintz qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap); 19836ddc7608SYuval Mintz 19846ddc7608SYuval Mintz __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val); 1985dacd88d6SYuval Mintz } 1986dacd88d6SYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START, 1987dacd88d6SYuval Mintz sizeof(struct pfvf_def_resp_tlv), status); 1988dacd88d6SYuval Mintz } 1989dacd88d6SYuval Mintz 1990dacd88d6SYuval Mintz static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn, 1991dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 1992dacd88d6SYuval Mintz struct qed_vf_info *vf) 1993dacd88d6SYuval Mintz { 1994dacd88d6SYuval Mintz u8 status = PFVF_STATUS_SUCCESS; 1995dacd88d6SYuval Mintz int rc; 1996dacd88d6SYuval Mintz 1997dacd88d6SYuval Mintz vf->vport_instance--; 19986ddc7608SYuval Mintz vf->spoof_chk = false; 1999dacd88d6SYuval Mintz 2000f109c240SMintz, Yuval if ((qed_iov_validate_active_rxq(p_hwfn, vf)) || 2001f109c240SMintz, Yuval (qed_iov_validate_active_txq(p_hwfn, vf))) { 2002f109c240SMintz, Yuval vf->b_malicious = true; 2003f109c240SMintz, Yuval DP_NOTICE(p_hwfn, 2004f109c240SMintz, Yuval "VF [%02x] - considered malicious; Unable to stop RX/TX queuess\n", 2005f109c240SMintz, Yuval vf->abs_vf_id); 2006f109c240SMintz, Yuval status = PFVF_STATUS_MALICIOUS; 2007f109c240SMintz, Yuval goto out; 2008f109c240SMintz, Yuval } 2009f109c240SMintz, Yuval 2010dacd88d6SYuval Mintz rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id); 20111a635e48SYuval Mintz if (rc) { 2012dacd88d6SYuval Mintz DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n", 2013dacd88d6SYuval Mintz rc); 2014dacd88d6SYuval Mintz status = PFVF_STATUS_FAILURE; 2015dacd88d6SYuval Mintz } 2016dacd88d6SYuval Mintz 201708feecd7SYuval Mintz /* Forget the configuration on the vport */ 201808feecd7SYuval Mintz vf->configured_features = 0; 201908feecd7SYuval Mintz memset(&vf->shadow_config, 0, sizeof(vf->shadow_config)); 202008feecd7SYuval Mintz 2021f109c240SMintz, Yuval out: 2022dacd88d6SYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN, 2023dacd88d6SYuval Mintz sizeof(struct pfvf_def_resp_tlv), status); 2024dacd88d6SYuval Mintz } 2025dacd88d6SYuval Mintz 2026dacd88d6SYuval Mintz static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn, 2027dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 2028a044df83SYuval Mintz struct qed_vf_info *vf, 2029a044df83SYuval Mintz u8 status, bool b_legacy) 2030dacd88d6SYuval Mintz { 2031dacd88d6SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 2032dacd88d6SYuval Mintz struct pfvf_start_queue_resp_tlv *p_tlv; 2033dacd88d6SYuval Mintz struct vfpf_start_rxq_tlv *req; 2034a044df83SYuval Mintz u16 length; 2035dacd88d6SYuval Mintz 2036dacd88d6SYuval Mintz mbx->offset = (u8 *)mbx->reply_virt; 2037dacd88d6SYuval Mintz 2038a044df83SYuval Mintz /* Taking a bigger struct instead of adding a TLV to list was a 2039a044df83SYuval Mintz * mistake, but one which we're now stuck with, as some older 2040a044df83SYuval Mintz * clients assume the size of the previous response. 2041a044df83SYuval Mintz */ 2042a044df83SYuval Mintz if (!b_legacy) 2043a044df83SYuval Mintz length = sizeof(*p_tlv); 2044a044df83SYuval Mintz else 2045a044df83SYuval Mintz length = sizeof(struct pfvf_def_resp_tlv); 2046a044df83SYuval Mintz 2047dacd88d6SYuval Mintz p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ, 2048a044df83SYuval Mintz length); 2049dacd88d6SYuval Mintz qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END, 2050dacd88d6SYuval Mintz sizeof(struct channel_list_end_tlv)); 2051dacd88d6SYuval Mintz 2052dacd88d6SYuval Mintz /* Update the TLV with the response */ 2053a044df83SYuval Mintz if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) { 2054dacd88d6SYuval Mintz req = &mbx->req_virt->start_rxq; 2055351a4dedSYuval Mintz p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B + 2056351a4dedSYuval Mintz offsetof(struct mstorm_vf_zone, 2057351a4dedSYuval Mintz non_trigger.eth_rx_queue_producers) + 2058351a4dedSYuval Mintz sizeof(struct eth_rx_prod_data) * req->rx_qid; 2059dacd88d6SYuval Mintz } 2060dacd88d6SYuval Mintz 2061a044df83SYuval Mintz qed_iov_send_response(p_hwfn, p_ptt, vf, length, status); 2062dacd88d6SYuval Mintz } 2063dacd88d6SYuval Mintz 2064bbe3f233SMintz, Yuval static u8 qed_iov_vf_mbx_qid(struct qed_hwfn *p_hwfn, 2065bbe3f233SMintz, Yuval struct qed_vf_info *p_vf, bool b_is_tx) 2066bbe3f233SMintz, Yuval { 206708bc8f15SMintz, Yuval struct qed_iov_vf_mbx *p_mbx = &p_vf->vf_mbx; 206808bc8f15SMintz, Yuval struct vfpf_qid_tlv *p_qid_tlv; 206908bc8f15SMintz, Yuval 207008bc8f15SMintz, Yuval /* Search for the qid if the VF published its going to provide it */ 207108bc8f15SMintz, Yuval if (!(p_vf->acquire.vfdev_info.capabilities & 207208bc8f15SMintz, Yuval VFPF_ACQUIRE_CAP_QUEUE_QIDS)) { 2073bbe3f233SMintz, Yuval if (b_is_tx) 2074bbe3f233SMintz, Yuval return QED_IOV_LEGACY_QID_TX; 2075bbe3f233SMintz, Yuval else 2076bbe3f233SMintz, Yuval return QED_IOV_LEGACY_QID_RX; 2077bbe3f233SMintz, Yuval } 2078bbe3f233SMintz, Yuval 207908bc8f15SMintz, Yuval p_qid_tlv = (struct vfpf_qid_tlv *) 208008bc8f15SMintz, Yuval qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, 208108bc8f15SMintz, Yuval CHANNEL_TLV_QID); 208208bc8f15SMintz, Yuval if (!p_qid_tlv) { 208308bc8f15SMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 208408bc8f15SMintz, Yuval "VF[%2x]: Failed to provide qid\n", 208508bc8f15SMintz, Yuval p_vf->relative_vf_id); 208608bc8f15SMintz, Yuval 208708bc8f15SMintz, Yuval return QED_IOV_QID_INVALID; 208808bc8f15SMintz, Yuval } 208908bc8f15SMintz, Yuval 209008bc8f15SMintz, Yuval if (p_qid_tlv->qid >= MAX_QUEUES_PER_QZONE) { 209108bc8f15SMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 209208bc8f15SMintz, Yuval "VF[%02x]: Provided qid out-of-bounds %02x\n", 209308bc8f15SMintz, Yuval p_vf->relative_vf_id, p_qid_tlv->qid); 209408bc8f15SMintz, Yuval return QED_IOV_QID_INVALID; 209508bc8f15SMintz, Yuval } 209608bc8f15SMintz, Yuval 209708bc8f15SMintz, Yuval return p_qid_tlv->qid; 209808bc8f15SMintz, Yuval } 209908bc8f15SMintz, Yuval 2100dacd88d6SYuval Mintz static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn, 2101dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 2102dacd88d6SYuval Mintz struct qed_vf_info *vf) 2103dacd88d6SYuval Mintz { 2104dacd88d6SYuval Mintz struct qed_queue_start_common_params params; 21053946497aSMintz, Yuval struct qed_queue_cid_vf_params vf_params; 2106dacd88d6SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 210741086467SYuval Mintz u8 status = PFVF_STATUS_NO_RESOURCE; 21083b19f478SMintz, Yuval u8 qid_usage_idx, vf_legacy = 0; 2109dacd88d6SYuval Mintz struct vfpf_start_rxq_tlv *req; 2110007bc371SMintz, Yuval struct qed_vf_queue *p_queue; 2111007bc371SMintz, Yuval struct qed_queue_cid *p_cid; 2112f604b17dSMintz, Yuval struct qed_sb_info sb_dummy; 2113dacd88d6SYuval Mintz int rc; 2114dacd88d6SYuval Mintz 2115dacd88d6SYuval Mintz req = &mbx->req_virt->start_rxq; 211641086467SYuval Mintz 2117f109c240SMintz, Yuval if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid, 2118f109c240SMintz, Yuval QED_IOV_VALIDATE_Q_DISABLE) || 211941086467SYuval Mintz !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb)) 212041086467SYuval Mintz goto out; 212141086467SYuval Mintz 2122bbe3f233SMintz, Yuval qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false); 212308bc8f15SMintz, Yuval if (qid_usage_idx == QED_IOV_QID_INVALID) 212408bc8f15SMintz, Yuval goto out; 212508bc8f15SMintz, Yuval 21263da7a37aSMintz, Yuval p_queue = &vf->vf_queues[req->rx_qid]; 212708bc8f15SMintz, Yuval if (p_queue->cids[qid_usage_idx].p_cid) 212808bc8f15SMintz, Yuval goto out; 21293da7a37aSMintz, Yuval 21303b19f478SMintz, Yuval vf_legacy = qed_vf_calculate_legacy(vf); 21313946497aSMintz, Yuval 2132bbe3f233SMintz, Yuval /* Acquire a new queue-cid */ 21333da7a37aSMintz, Yuval memset(¶ms, 0, sizeof(params)); 21343da7a37aSMintz, Yuval params.queue_id = p_queue->fw_rx_qid; 2135dacd88d6SYuval Mintz params.vport_id = vf->vport_id; 21363da7a37aSMintz, Yuval params.stats_id = vf->abs_vf_id + 0x10; 2137f604b17dSMintz, Yuval /* Since IGU index is passed via sb_info, construct a dummy one */ 2138f604b17dSMintz, Yuval memset(&sb_dummy, 0, sizeof(sb_dummy)); 2139f604b17dSMintz, Yuval sb_dummy.igu_sb_id = req->hw_sb; 2140f604b17dSMintz, Yuval params.p_sb = &sb_dummy; 2141dacd88d6SYuval Mintz params.sb_idx = req->sb_index; 2142dacd88d6SYuval Mintz 21433946497aSMintz, Yuval memset(&vf_params, 0, sizeof(vf_params)); 21443946497aSMintz, Yuval vf_params.vfid = vf->relative_vf_id; 21453946497aSMintz, Yuval vf_params.vf_qid = (u8)req->rx_qid; 21463b19f478SMintz, Yuval vf_params.vf_legacy = vf_legacy; 2147bbe3f233SMintz, Yuval vf_params.qid_usage_idx = qid_usage_idx; 2148007bc371SMintz, Yuval p_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid, 2149007bc371SMintz, Yuval ¶ms, true, &vf_params); 2150007bc371SMintz, Yuval if (!p_cid) 21513da7a37aSMintz, Yuval goto out; 21523da7a37aSMintz, Yuval 2153a044df83SYuval Mintz /* Legacy VFs have their Producers in a different location, which they 2154a044df83SYuval Mintz * calculate on their own and clean the producer prior to this. 2155a044df83SYuval Mintz */ 21563b19f478SMintz, Yuval if (!(vf_legacy & QED_QCID_LEGACY_VF_RX_PROD)) 2157a044df83SYuval Mintz REG_WR(p_hwfn, 2158a044df83SYuval Mintz GTT_BAR0_MAP_REG_MSDM_RAM + 2159a044df83SYuval Mintz MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid), 2160a044df83SYuval Mintz 0); 2161a044df83SYuval Mintz 2162007bc371SMintz, Yuval rc = qed_eth_rxq_start_ramrod(p_hwfn, p_cid, 2163dacd88d6SYuval Mintz req->bd_max_bytes, 2164dacd88d6SYuval Mintz req->rxq_addr, 21653da7a37aSMintz, Yuval req->cqe_pbl_addr, req->cqe_pbl_size); 2166dacd88d6SYuval Mintz if (rc) { 2167dacd88d6SYuval Mintz status = PFVF_STATUS_FAILURE; 2168007bc371SMintz, Yuval qed_eth_queue_cid_release(p_hwfn, p_cid); 2169dacd88d6SYuval Mintz } else { 2170007bc371SMintz, Yuval p_queue->cids[qid_usage_idx].p_cid = p_cid; 2171007bc371SMintz, Yuval p_queue->cids[qid_usage_idx].b_is_tx = false; 217241086467SYuval Mintz status = PFVF_STATUS_SUCCESS; 2173dacd88d6SYuval Mintz vf->num_active_rxqs++; 2174dacd88d6SYuval Mintz } 2175dacd88d6SYuval Mintz 217641086467SYuval Mintz out: 21773b19f478SMintz, Yuval qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status, 21783b19f478SMintz, Yuval !!(vf_legacy & 21793b19f478SMintz, Yuval QED_QCID_LEGACY_VF_RX_PROD)); 2180dacd88d6SYuval Mintz } 2181dacd88d6SYuval Mintz 2182eaf3c0c6SChopra, Manish static void 2183eaf3c0c6SChopra, Manish qed_iov_pf_update_tun_response(struct pfvf_update_tunn_param_tlv *p_resp, 2184eaf3c0c6SChopra, Manish struct qed_tunnel_info *p_tun, 2185eaf3c0c6SChopra, Manish u16 tunn_feature_mask) 2186eaf3c0c6SChopra, Manish { 2187eaf3c0c6SChopra, Manish p_resp->tunn_feature_mask = tunn_feature_mask; 2188eaf3c0c6SChopra, Manish p_resp->vxlan_mode = p_tun->vxlan.b_mode_enabled; 2189eaf3c0c6SChopra, Manish p_resp->l2geneve_mode = p_tun->l2_geneve.b_mode_enabled; 2190eaf3c0c6SChopra, Manish p_resp->ipgeneve_mode = p_tun->ip_geneve.b_mode_enabled; 2191eaf3c0c6SChopra, Manish p_resp->l2gre_mode = p_tun->l2_gre.b_mode_enabled; 2192eaf3c0c6SChopra, Manish p_resp->ipgre_mode = p_tun->l2_gre.b_mode_enabled; 2193eaf3c0c6SChopra, Manish p_resp->vxlan_clss = p_tun->vxlan.tun_cls; 2194eaf3c0c6SChopra, Manish p_resp->l2gre_clss = p_tun->l2_gre.tun_cls; 2195eaf3c0c6SChopra, Manish p_resp->ipgre_clss = p_tun->ip_gre.tun_cls; 2196eaf3c0c6SChopra, Manish p_resp->l2geneve_clss = p_tun->l2_geneve.tun_cls; 2197eaf3c0c6SChopra, Manish p_resp->ipgeneve_clss = p_tun->ip_geneve.tun_cls; 2198eaf3c0c6SChopra, Manish p_resp->geneve_udp_port = p_tun->geneve_port.port; 2199eaf3c0c6SChopra, Manish p_resp->vxlan_udp_port = p_tun->vxlan_port.port; 2200eaf3c0c6SChopra, Manish } 2201eaf3c0c6SChopra, Manish 2202eaf3c0c6SChopra, Manish static void 2203eaf3c0c6SChopra, Manish __qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req, 2204eaf3c0c6SChopra, Manish struct qed_tunn_update_type *p_tun, 2205eaf3c0c6SChopra, Manish enum qed_tunn_mode mask, u8 tun_cls) 2206eaf3c0c6SChopra, Manish { 2207eaf3c0c6SChopra, Manish if (p_req->tun_mode_update_mask & BIT(mask)) { 2208eaf3c0c6SChopra, Manish p_tun->b_update_mode = true; 2209eaf3c0c6SChopra, Manish 2210eaf3c0c6SChopra, Manish if (p_req->tunn_mode & BIT(mask)) 2211eaf3c0c6SChopra, Manish p_tun->b_mode_enabled = true; 2212eaf3c0c6SChopra, Manish } 2213eaf3c0c6SChopra, Manish 2214eaf3c0c6SChopra, Manish p_tun->tun_cls = tun_cls; 2215eaf3c0c6SChopra, Manish } 2216eaf3c0c6SChopra, Manish 2217eaf3c0c6SChopra, Manish static void 2218eaf3c0c6SChopra, Manish qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req, 2219eaf3c0c6SChopra, Manish struct qed_tunn_update_type *p_tun, 2220eaf3c0c6SChopra, Manish struct qed_tunn_update_udp_port *p_port, 2221eaf3c0c6SChopra, Manish enum qed_tunn_mode mask, 2222eaf3c0c6SChopra, Manish u8 tun_cls, u8 update_port, u16 port) 2223eaf3c0c6SChopra, Manish { 2224eaf3c0c6SChopra, Manish if (update_port) { 2225eaf3c0c6SChopra, Manish p_port->b_update_port = true; 2226eaf3c0c6SChopra, Manish p_port->port = port; 2227eaf3c0c6SChopra, Manish } 2228eaf3c0c6SChopra, Manish 2229eaf3c0c6SChopra, Manish __qed_iov_pf_update_tun_param(p_req, p_tun, mask, tun_cls); 2230eaf3c0c6SChopra, Manish } 2231eaf3c0c6SChopra, Manish 2232eaf3c0c6SChopra, Manish static bool 2233eaf3c0c6SChopra, Manish qed_iov_pf_validate_tunn_param(struct vfpf_update_tunn_param_tlv *p_req) 2234eaf3c0c6SChopra, Manish { 2235eaf3c0c6SChopra, Manish bool b_update_requested = false; 2236eaf3c0c6SChopra, Manish 2237eaf3c0c6SChopra, Manish if (p_req->tun_mode_update_mask || p_req->update_tun_cls || 2238eaf3c0c6SChopra, Manish p_req->update_geneve_port || p_req->update_vxlan_port) 2239eaf3c0c6SChopra, Manish b_update_requested = true; 2240eaf3c0c6SChopra, Manish 2241eaf3c0c6SChopra, Manish return b_update_requested; 2242eaf3c0c6SChopra, Manish } 2243eaf3c0c6SChopra, Manish 2244eaf3c0c6SChopra, Manish static void qed_pf_validate_tunn_mode(struct qed_tunn_update_type *tun, int *rc) 2245eaf3c0c6SChopra, Manish { 2246eaf3c0c6SChopra, Manish if (tun->b_update_mode && !tun->b_mode_enabled) { 2247eaf3c0c6SChopra, Manish tun->b_update_mode = false; 2248eaf3c0c6SChopra, Manish *rc = -EINVAL; 2249eaf3c0c6SChopra, Manish } 2250eaf3c0c6SChopra, Manish } 2251eaf3c0c6SChopra, Manish 2252eaf3c0c6SChopra, Manish static int 2253eaf3c0c6SChopra, Manish qed_pf_validate_modify_tunn_config(struct qed_hwfn *p_hwfn, 2254eaf3c0c6SChopra, Manish u16 *tun_features, bool *update, 2255eaf3c0c6SChopra, Manish struct qed_tunnel_info *tun_src) 2256eaf3c0c6SChopra, Manish { 2257eaf3c0c6SChopra, Manish struct qed_eth_cb_ops *ops = p_hwfn->cdev->protocol_ops.eth; 2258eaf3c0c6SChopra, Manish struct qed_tunnel_info *tun = &p_hwfn->cdev->tunnel; 2259eaf3c0c6SChopra, Manish u16 bultn_vxlan_port, bultn_geneve_port; 2260eaf3c0c6SChopra, Manish void *cookie = p_hwfn->cdev->ops_cookie; 2261eaf3c0c6SChopra, Manish int i, rc = 0; 2262eaf3c0c6SChopra, Manish 2263eaf3c0c6SChopra, Manish *tun_features = p_hwfn->cdev->tunn_feature_mask; 2264eaf3c0c6SChopra, Manish bultn_vxlan_port = tun->vxlan_port.port; 2265eaf3c0c6SChopra, Manish bultn_geneve_port = tun->geneve_port.port; 2266eaf3c0c6SChopra, Manish qed_pf_validate_tunn_mode(&tun_src->vxlan, &rc); 2267eaf3c0c6SChopra, Manish qed_pf_validate_tunn_mode(&tun_src->l2_geneve, &rc); 2268eaf3c0c6SChopra, Manish qed_pf_validate_tunn_mode(&tun_src->ip_geneve, &rc); 2269eaf3c0c6SChopra, Manish qed_pf_validate_tunn_mode(&tun_src->l2_gre, &rc); 2270eaf3c0c6SChopra, Manish qed_pf_validate_tunn_mode(&tun_src->ip_gre, &rc); 2271eaf3c0c6SChopra, Manish 2272eaf3c0c6SChopra, Manish if ((tun_src->b_update_rx_cls || tun_src->b_update_tx_cls) && 2273eaf3c0c6SChopra, Manish (tun_src->vxlan.tun_cls != QED_TUNN_CLSS_MAC_VLAN || 2274eaf3c0c6SChopra, Manish tun_src->l2_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN || 2275eaf3c0c6SChopra, Manish tun_src->ip_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN || 2276eaf3c0c6SChopra, Manish tun_src->l2_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN || 2277eaf3c0c6SChopra, Manish tun_src->ip_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN)) { 2278eaf3c0c6SChopra, Manish tun_src->b_update_rx_cls = false; 2279eaf3c0c6SChopra, Manish tun_src->b_update_tx_cls = false; 2280eaf3c0c6SChopra, Manish rc = -EINVAL; 2281eaf3c0c6SChopra, Manish } 2282eaf3c0c6SChopra, Manish 2283eaf3c0c6SChopra, Manish if (tun_src->vxlan_port.b_update_port) { 2284eaf3c0c6SChopra, Manish if (tun_src->vxlan_port.port == tun->vxlan_port.port) { 2285eaf3c0c6SChopra, Manish tun_src->vxlan_port.b_update_port = false; 2286eaf3c0c6SChopra, Manish } else { 2287eaf3c0c6SChopra, Manish *update = true; 2288eaf3c0c6SChopra, Manish bultn_vxlan_port = tun_src->vxlan_port.port; 2289eaf3c0c6SChopra, Manish } 2290eaf3c0c6SChopra, Manish } 2291eaf3c0c6SChopra, Manish 2292eaf3c0c6SChopra, Manish if (tun_src->geneve_port.b_update_port) { 2293eaf3c0c6SChopra, Manish if (tun_src->geneve_port.port == tun->geneve_port.port) { 2294eaf3c0c6SChopra, Manish tun_src->geneve_port.b_update_port = false; 2295eaf3c0c6SChopra, Manish } else { 2296eaf3c0c6SChopra, Manish *update = true; 2297eaf3c0c6SChopra, Manish bultn_geneve_port = tun_src->geneve_port.port; 2298eaf3c0c6SChopra, Manish } 2299eaf3c0c6SChopra, Manish } 2300eaf3c0c6SChopra, Manish 2301eaf3c0c6SChopra, Manish qed_for_each_vf(p_hwfn, i) { 2302eaf3c0c6SChopra, Manish qed_iov_bulletin_set_udp_ports(p_hwfn, i, bultn_vxlan_port, 2303eaf3c0c6SChopra, Manish bultn_geneve_port); 2304eaf3c0c6SChopra, Manish } 2305eaf3c0c6SChopra, Manish 2306eaf3c0c6SChopra, Manish qed_schedule_iov(p_hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG); 2307eaf3c0c6SChopra, Manish ops->ports_update(cookie, bultn_vxlan_port, bultn_geneve_port); 2308eaf3c0c6SChopra, Manish 2309eaf3c0c6SChopra, Manish return rc; 2310eaf3c0c6SChopra, Manish } 2311eaf3c0c6SChopra, Manish 2312eaf3c0c6SChopra, Manish static void qed_iov_vf_mbx_update_tunn_param(struct qed_hwfn *p_hwfn, 2313eaf3c0c6SChopra, Manish struct qed_ptt *p_ptt, 2314eaf3c0c6SChopra, Manish struct qed_vf_info *p_vf) 2315eaf3c0c6SChopra, Manish { 2316eaf3c0c6SChopra, Manish struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel; 2317eaf3c0c6SChopra, Manish struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx; 2318eaf3c0c6SChopra, Manish struct pfvf_update_tunn_param_tlv *p_resp; 2319eaf3c0c6SChopra, Manish struct vfpf_update_tunn_param_tlv *p_req; 2320eaf3c0c6SChopra, Manish u8 status = PFVF_STATUS_SUCCESS; 2321eaf3c0c6SChopra, Manish bool b_update_required = false; 2322eaf3c0c6SChopra, Manish struct qed_tunnel_info tunn; 2323eaf3c0c6SChopra, Manish u16 tunn_feature_mask = 0; 2324eaf3c0c6SChopra, Manish int i, rc = 0; 2325eaf3c0c6SChopra, Manish 2326eaf3c0c6SChopra, Manish mbx->offset = (u8 *)mbx->reply_virt; 2327eaf3c0c6SChopra, Manish 2328eaf3c0c6SChopra, Manish memset(&tunn, 0, sizeof(tunn)); 2329eaf3c0c6SChopra, Manish p_req = &mbx->req_virt->tunn_param_update; 2330eaf3c0c6SChopra, Manish 2331eaf3c0c6SChopra, Manish if (!qed_iov_pf_validate_tunn_param(p_req)) { 2332eaf3c0c6SChopra, Manish DP_VERBOSE(p_hwfn, QED_MSG_IOV, 2333eaf3c0c6SChopra, Manish "No tunnel update requested by VF\n"); 2334eaf3c0c6SChopra, Manish status = PFVF_STATUS_FAILURE; 2335eaf3c0c6SChopra, Manish goto send_resp; 2336eaf3c0c6SChopra, Manish } 2337eaf3c0c6SChopra, Manish 2338eaf3c0c6SChopra, Manish tunn.b_update_rx_cls = p_req->update_tun_cls; 2339eaf3c0c6SChopra, Manish tunn.b_update_tx_cls = p_req->update_tun_cls; 2340eaf3c0c6SChopra, Manish 2341eaf3c0c6SChopra, Manish qed_iov_pf_update_tun_param(p_req, &tunn.vxlan, &tunn.vxlan_port, 2342eaf3c0c6SChopra, Manish QED_MODE_VXLAN_TUNN, p_req->vxlan_clss, 2343eaf3c0c6SChopra, Manish p_req->update_vxlan_port, 2344eaf3c0c6SChopra, Manish p_req->vxlan_port); 2345eaf3c0c6SChopra, Manish qed_iov_pf_update_tun_param(p_req, &tunn.l2_geneve, &tunn.geneve_port, 2346eaf3c0c6SChopra, Manish QED_MODE_L2GENEVE_TUNN, 2347eaf3c0c6SChopra, Manish p_req->l2geneve_clss, 2348eaf3c0c6SChopra, Manish p_req->update_geneve_port, 2349eaf3c0c6SChopra, Manish p_req->geneve_port); 2350eaf3c0c6SChopra, Manish __qed_iov_pf_update_tun_param(p_req, &tunn.ip_geneve, 2351eaf3c0c6SChopra, Manish QED_MODE_IPGENEVE_TUNN, 2352eaf3c0c6SChopra, Manish p_req->ipgeneve_clss); 2353eaf3c0c6SChopra, Manish __qed_iov_pf_update_tun_param(p_req, &tunn.l2_gre, 2354eaf3c0c6SChopra, Manish QED_MODE_L2GRE_TUNN, p_req->l2gre_clss); 2355eaf3c0c6SChopra, Manish __qed_iov_pf_update_tun_param(p_req, &tunn.ip_gre, 2356eaf3c0c6SChopra, Manish QED_MODE_IPGRE_TUNN, p_req->ipgre_clss); 2357eaf3c0c6SChopra, Manish 2358eaf3c0c6SChopra, Manish /* If PF modifies VF's req then it should 2359eaf3c0c6SChopra, Manish * still return an error in case of partial configuration 2360eaf3c0c6SChopra, Manish * or modified configuration as opposed to requested one. 2361eaf3c0c6SChopra, Manish */ 2362eaf3c0c6SChopra, Manish rc = qed_pf_validate_modify_tunn_config(p_hwfn, &tunn_feature_mask, 2363eaf3c0c6SChopra, Manish &b_update_required, &tunn); 2364eaf3c0c6SChopra, Manish 2365eaf3c0c6SChopra, Manish if (rc) 2366eaf3c0c6SChopra, Manish status = PFVF_STATUS_FAILURE; 2367eaf3c0c6SChopra, Manish 2368eaf3c0c6SChopra, Manish /* If QED client is willing to update anything ? */ 2369eaf3c0c6SChopra, Manish if (b_update_required) { 2370eaf3c0c6SChopra, Manish u16 geneve_port; 2371eaf3c0c6SChopra, Manish 23724f64675fSManish Chopra rc = qed_sp_pf_update_tunn_cfg(p_hwfn, p_ptt, &tunn, 2373eaf3c0c6SChopra, Manish QED_SPQ_MODE_EBLOCK, NULL); 2374eaf3c0c6SChopra, Manish if (rc) 2375eaf3c0c6SChopra, Manish status = PFVF_STATUS_FAILURE; 2376eaf3c0c6SChopra, Manish 2377eaf3c0c6SChopra, Manish geneve_port = p_tun->geneve_port.port; 2378eaf3c0c6SChopra, Manish qed_for_each_vf(p_hwfn, i) { 2379eaf3c0c6SChopra, Manish qed_iov_bulletin_set_udp_ports(p_hwfn, i, 2380eaf3c0c6SChopra, Manish p_tun->vxlan_port.port, 2381eaf3c0c6SChopra, Manish geneve_port); 2382eaf3c0c6SChopra, Manish } 2383eaf3c0c6SChopra, Manish } 2384eaf3c0c6SChopra, Manish 2385eaf3c0c6SChopra, Manish send_resp: 2386eaf3c0c6SChopra, Manish p_resp = qed_add_tlv(p_hwfn, &mbx->offset, 2387eaf3c0c6SChopra, Manish CHANNEL_TLV_UPDATE_TUNN_PARAM, sizeof(*p_resp)); 2388eaf3c0c6SChopra, Manish 2389eaf3c0c6SChopra, Manish qed_iov_pf_update_tun_response(p_resp, p_tun, tunn_feature_mask); 2390eaf3c0c6SChopra, Manish qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END, 2391eaf3c0c6SChopra, Manish sizeof(struct channel_list_end_tlv)); 2392eaf3c0c6SChopra, Manish 2393eaf3c0c6SChopra, Manish qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status); 2394eaf3c0c6SChopra, Manish } 2395eaf3c0c6SChopra, Manish 23965040acf5SYuval Mintz static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn, 23975040acf5SYuval Mintz struct qed_ptt *p_ptt, 2398007bc371SMintz, Yuval struct qed_vf_info *p_vf, 2399007bc371SMintz, Yuval u32 cid, u8 status) 24005040acf5SYuval Mintz { 24015040acf5SYuval Mintz struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx; 24025040acf5SYuval Mintz struct pfvf_start_queue_resp_tlv *p_tlv; 2403a044df83SYuval Mintz bool b_legacy = false; 2404a044df83SYuval Mintz u16 length; 24055040acf5SYuval Mintz 24065040acf5SYuval Mintz mbx->offset = (u8 *)mbx->reply_virt; 24075040acf5SYuval Mintz 2408a044df83SYuval Mintz /* Taking a bigger struct instead of adding a TLV to list was a 2409a044df83SYuval Mintz * mistake, but one which we're now stuck with, as some older 2410a044df83SYuval Mintz * clients assume the size of the previous response. 2411a044df83SYuval Mintz */ 2412a044df83SYuval Mintz if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor == 2413a044df83SYuval Mintz ETH_HSI_VER_NO_PKT_LEN_TUNN) 2414a044df83SYuval Mintz b_legacy = true; 2415a044df83SYuval Mintz 2416a044df83SYuval Mintz if (!b_legacy) 2417a044df83SYuval Mintz length = sizeof(*p_tlv); 2418a044df83SYuval Mintz else 2419a044df83SYuval Mintz length = sizeof(struct pfvf_def_resp_tlv); 2420a044df83SYuval Mintz 24215040acf5SYuval Mintz p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ, 2422a044df83SYuval Mintz length); 24235040acf5SYuval Mintz qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END, 24245040acf5SYuval Mintz sizeof(struct channel_list_end_tlv)); 24255040acf5SYuval Mintz 24265040acf5SYuval Mintz /* Update the TLV with the response */ 2427007bc371SMintz, Yuval if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) 2428007bc371SMintz, Yuval p_tlv->offset = qed_db_addr_vf(cid, DQ_DEMS_LEGACY); 24295040acf5SYuval Mintz 2430a044df83SYuval Mintz qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status); 24315040acf5SYuval Mintz } 24325040acf5SYuval Mintz 2433dacd88d6SYuval Mintz static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn, 2434dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 2435dacd88d6SYuval Mintz struct qed_vf_info *vf) 2436dacd88d6SYuval Mintz { 2437dacd88d6SYuval Mintz struct qed_queue_start_common_params params; 24383946497aSMintz, Yuval struct qed_queue_cid_vf_params vf_params; 2439dacd88d6SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 244041086467SYuval Mintz u8 status = PFVF_STATUS_NO_RESOURCE; 2441dacd88d6SYuval Mintz struct vfpf_start_txq_tlv *req; 2442007bc371SMintz, Yuval struct qed_vf_queue *p_queue; 2443007bc371SMintz, Yuval struct qed_queue_cid *p_cid; 2444f604b17dSMintz, Yuval struct qed_sb_info sb_dummy; 24453b19f478SMintz, Yuval u8 qid_usage_idx, vf_legacy; 2446007bc371SMintz, Yuval u32 cid = 0; 2447dacd88d6SYuval Mintz int rc; 24483da7a37aSMintz, Yuval u16 pq; 2449dacd88d6SYuval Mintz 2450dacd88d6SYuval Mintz memset(¶ms, 0, sizeof(params)); 2451dacd88d6SYuval Mintz req = &mbx->req_virt->start_txq; 245241086467SYuval Mintz 2453f109c240SMintz, Yuval if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid, 245408bc8f15SMintz, Yuval QED_IOV_VALIDATE_Q_NA) || 245541086467SYuval Mintz !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb)) 245641086467SYuval Mintz goto out; 245741086467SYuval Mintz 2458bbe3f233SMintz, Yuval qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, true); 245908bc8f15SMintz, Yuval if (qid_usage_idx == QED_IOV_QID_INVALID) 246008bc8f15SMintz, Yuval goto out; 246108bc8f15SMintz, Yuval 24623da7a37aSMintz, Yuval p_queue = &vf->vf_queues[req->tx_qid]; 246308bc8f15SMintz, Yuval if (p_queue->cids[qid_usage_idx].p_cid) 246408bc8f15SMintz, Yuval goto out; 24653da7a37aSMintz, Yuval 24663b19f478SMintz, Yuval vf_legacy = qed_vf_calculate_legacy(vf); 24673946497aSMintz, Yuval 2468bbe3f233SMintz, Yuval /* Acquire a new queue-cid */ 24693da7a37aSMintz, Yuval params.queue_id = p_queue->fw_tx_qid; 2470dacd88d6SYuval Mintz params.vport_id = vf->vport_id; 24713da7a37aSMintz, Yuval params.stats_id = vf->abs_vf_id + 0x10; 2472f604b17dSMintz, Yuval 2473f604b17dSMintz, Yuval /* Since IGU index is passed via sb_info, construct a dummy one */ 2474f604b17dSMintz, Yuval memset(&sb_dummy, 0, sizeof(sb_dummy)); 2475f604b17dSMintz, Yuval sb_dummy.igu_sb_id = req->hw_sb; 2476f604b17dSMintz, Yuval params.p_sb = &sb_dummy; 2477dacd88d6SYuval Mintz params.sb_idx = req->sb_index; 2478dacd88d6SYuval Mintz 24793946497aSMintz, Yuval memset(&vf_params, 0, sizeof(vf_params)); 24803946497aSMintz, Yuval vf_params.vfid = vf->relative_vf_id; 24813946497aSMintz, Yuval vf_params.vf_qid = (u8)req->tx_qid; 24823b19f478SMintz, Yuval vf_params.vf_legacy = vf_legacy; 2483bbe3f233SMintz, Yuval vf_params.qid_usage_idx = qid_usage_idx; 24843946497aSMintz, Yuval 2485007bc371SMintz, Yuval p_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid, 2486007bc371SMintz, Yuval ¶ms, false, &vf_params); 2487007bc371SMintz, Yuval if (!p_cid) 24883da7a37aSMintz, Yuval goto out; 2489dacd88d6SYuval Mintz 2490b5a9ee7cSAriel Elior pq = qed_get_cm_pq_idx_vf(p_hwfn, vf->relative_vf_id); 2491007bc371SMintz, Yuval rc = qed_eth_txq_start_ramrod(p_hwfn, p_cid, 24923da7a37aSMintz, Yuval req->pbl_addr, req->pbl_size, pq); 249341086467SYuval Mintz if (rc) { 2494dacd88d6SYuval Mintz status = PFVF_STATUS_FAILURE; 2495007bc371SMintz, Yuval qed_eth_queue_cid_release(p_hwfn, p_cid); 249641086467SYuval Mintz } else { 249741086467SYuval Mintz status = PFVF_STATUS_SUCCESS; 2498007bc371SMintz, Yuval p_queue->cids[qid_usage_idx].p_cid = p_cid; 2499007bc371SMintz, Yuval p_queue->cids[qid_usage_idx].b_is_tx = true; 2500007bc371SMintz, Yuval cid = p_cid->cid; 250141086467SYuval Mintz } 2502dacd88d6SYuval Mintz 250341086467SYuval Mintz out: 2504007bc371SMintz, Yuval qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, cid, status); 2505dacd88d6SYuval Mintz } 2506dacd88d6SYuval Mintz 2507dacd88d6SYuval Mintz static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn, 2508dacd88d6SYuval Mintz struct qed_vf_info *vf, 2509007bc371SMintz, Yuval u16 rxq_id, 2510007bc371SMintz, Yuval u8 qid_usage_idx, bool cqe_completion) 2511dacd88d6SYuval Mintz { 2512007bc371SMintz, Yuval struct qed_vf_queue *p_queue; 2513dacd88d6SYuval Mintz int rc = 0; 2514dacd88d6SYuval Mintz 251508bc8f15SMintz, Yuval if (!qed_iov_validate_rxq(p_hwfn, vf, rxq_id, QED_IOV_VALIDATE_Q_NA)) { 25164c4fa793SMintz, Yuval DP_VERBOSE(p_hwfn, 25174c4fa793SMintz, Yuval QED_MSG_IOV, 251808bc8f15SMintz, Yuval "VF[%d] Tried Closing Rx 0x%04x.%02x which is inactive\n", 251908bc8f15SMintz, Yuval vf->relative_vf_id, rxq_id, qid_usage_idx); 2520dacd88d6SYuval Mintz return -EINVAL; 25214c4fa793SMintz, Yuval } 2522dacd88d6SYuval Mintz 25234c4fa793SMintz, Yuval p_queue = &vf->vf_queues[rxq_id]; 25243da7a37aSMintz, Yuval 252508bc8f15SMintz, Yuval /* We've validated the index and the existence of the active RXQ - 252608bc8f15SMintz, Yuval * now we need to make sure that it's using the correct qid. 252708bc8f15SMintz, Yuval */ 252808bc8f15SMintz, Yuval if (!p_queue->cids[qid_usage_idx].p_cid || 252908bc8f15SMintz, Yuval p_queue->cids[qid_usage_idx].b_is_tx) { 253008bc8f15SMintz, Yuval struct qed_queue_cid *p_cid; 253108bc8f15SMintz, Yuval 253208bc8f15SMintz, Yuval p_cid = qed_iov_get_vf_rx_queue_cid(p_queue); 253308bc8f15SMintz, Yuval DP_VERBOSE(p_hwfn, 253408bc8f15SMintz, Yuval QED_MSG_IOV, 253508bc8f15SMintz, Yuval "VF[%d] - Tried Closing Rx 0x%04x.%02x, but Rx is at %04x.%02x\n", 253608bc8f15SMintz, Yuval vf->relative_vf_id, 253708bc8f15SMintz, Yuval rxq_id, qid_usage_idx, rxq_id, p_cid->qid_usage_idx); 253808bc8f15SMintz, Yuval return -EINVAL; 253908bc8f15SMintz, Yuval } 254008bc8f15SMintz, Yuval 254108bc8f15SMintz, Yuval /* Now that we know we have a valid Rx-queue - close it */ 25423da7a37aSMintz, Yuval rc = qed_eth_rx_queue_stop(p_hwfn, 2543007bc371SMintz, Yuval p_queue->cids[qid_usage_idx].p_cid, 25443da7a37aSMintz, Yuval false, cqe_completion); 2545dacd88d6SYuval Mintz if (rc) 2546dacd88d6SYuval Mintz return rc; 25473da7a37aSMintz, Yuval 2548007bc371SMintz, Yuval p_queue->cids[qid_usage_idx].p_cid = NULL; 2549dacd88d6SYuval Mintz vf->num_active_rxqs--; 2550dacd88d6SYuval Mintz 25514c4fa793SMintz, Yuval return 0; 2552dacd88d6SYuval Mintz } 2553dacd88d6SYuval Mintz 2554dacd88d6SYuval Mintz static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn, 2555007bc371SMintz, Yuval struct qed_vf_info *vf, 2556007bc371SMintz, Yuval u16 txq_id, u8 qid_usage_idx) 2557dacd88d6SYuval Mintz { 2558007bc371SMintz, Yuval struct qed_vf_queue *p_queue; 25594c4fa793SMintz, Yuval int rc = 0; 2560dacd88d6SYuval Mintz 256108bc8f15SMintz, Yuval if (!qed_iov_validate_txq(p_hwfn, vf, txq_id, QED_IOV_VALIDATE_Q_NA)) 2562dacd88d6SYuval Mintz return -EINVAL; 2563dacd88d6SYuval Mintz 25644c4fa793SMintz, Yuval p_queue = &vf->vf_queues[txq_id]; 256508bc8f15SMintz, Yuval if (!p_queue->cids[qid_usage_idx].p_cid || 256608bc8f15SMintz, Yuval !p_queue->cids[qid_usage_idx].b_is_tx) 256708bc8f15SMintz, Yuval return -EINVAL; 2568dacd88d6SYuval Mintz 2569007bc371SMintz, Yuval rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->cids[qid_usage_idx].p_cid); 2570dacd88d6SYuval Mintz if (rc) 2571dacd88d6SYuval Mintz return rc; 25723da7a37aSMintz, Yuval 2573007bc371SMintz, Yuval p_queue->cids[qid_usage_idx].p_cid = NULL; 25744c4fa793SMintz, Yuval return 0; 2575dacd88d6SYuval Mintz } 2576dacd88d6SYuval Mintz 2577dacd88d6SYuval Mintz static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn, 2578dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 2579dacd88d6SYuval Mintz struct qed_vf_info *vf) 2580dacd88d6SYuval Mintz { 2581dacd88d6SYuval Mintz u16 length = sizeof(struct pfvf_def_resp_tlv); 2582dacd88d6SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 25834c4fa793SMintz, Yuval u8 status = PFVF_STATUS_FAILURE; 2584dacd88d6SYuval Mintz struct vfpf_stop_rxqs_tlv *req; 2585007bc371SMintz, Yuval u8 qid_usage_idx; 2586dacd88d6SYuval Mintz int rc; 2587dacd88d6SYuval Mintz 25884c4fa793SMintz, Yuval /* There has never been an official driver that used this interface 25894c4fa793SMintz, Yuval * for stopping multiple queues, and it is now considered deprecated. 25904c4fa793SMintz, Yuval * Validate this isn't used here. 2591dacd88d6SYuval Mintz */ 2592dacd88d6SYuval Mintz req = &mbx->req_virt->stop_rxqs; 25934c4fa793SMintz, Yuval if (req->num_rxqs != 1) { 25944c4fa793SMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 25954c4fa793SMintz, Yuval "Odd; VF[%d] tried stopping multiple Rx queues\n", 25964c4fa793SMintz, Yuval vf->relative_vf_id); 25974c4fa793SMintz, Yuval status = PFVF_STATUS_NOT_SUPPORTED; 25984c4fa793SMintz, Yuval goto out; 25994c4fa793SMintz, Yuval } 2600dacd88d6SYuval Mintz 2601007bc371SMintz, Yuval /* Find which qid-index is associated with the queue */ 2602007bc371SMintz, Yuval qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false); 260308bc8f15SMintz, Yuval if (qid_usage_idx == QED_IOV_QID_INVALID) 260408bc8f15SMintz, Yuval goto out; 2605007bc371SMintz, Yuval 26064c4fa793SMintz, Yuval rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid, 2607007bc371SMintz, Yuval qid_usage_idx, req->cqe_completion); 26084c4fa793SMintz, Yuval if (!rc) 26094c4fa793SMintz, Yuval status = PFVF_STATUS_SUCCESS; 26104c4fa793SMintz, Yuval out: 2611dacd88d6SYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS, 2612dacd88d6SYuval Mintz length, status); 2613dacd88d6SYuval Mintz } 2614dacd88d6SYuval Mintz 2615dacd88d6SYuval Mintz static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn, 2616dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 2617dacd88d6SYuval Mintz struct qed_vf_info *vf) 2618dacd88d6SYuval Mintz { 2619dacd88d6SYuval Mintz u16 length = sizeof(struct pfvf_def_resp_tlv); 2620dacd88d6SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 26214c4fa793SMintz, Yuval u8 status = PFVF_STATUS_FAILURE; 2622dacd88d6SYuval Mintz struct vfpf_stop_txqs_tlv *req; 2623007bc371SMintz, Yuval u8 qid_usage_idx; 2624dacd88d6SYuval Mintz int rc; 2625dacd88d6SYuval Mintz 26264c4fa793SMintz, Yuval /* There has never been an official driver that used this interface 26274c4fa793SMintz, Yuval * for stopping multiple queues, and it is now considered deprecated. 26284c4fa793SMintz, Yuval * Validate this isn't used here. 2629dacd88d6SYuval Mintz */ 2630dacd88d6SYuval Mintz req = &mbx->req_virt->stop_txqs; 26314c4fa793SMintz, Yuval if (req->num_txqs != 1) { 26324c4fa793SMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 26334c4fa793SMintz, Yuval "Odd; VF[%d] tried stopping multiple Tx queues\n", 26344c4fa793SMintz, Yuval vf->relative_vf_id); 26354c4fa793SMintz, Yuval status = PFVF_STATUS_NOT_SUPPORTED; 26364c4fa793SMintz, Yuval goto out; 26374c4fa793SMintz, Yuval } 2638007bc371SMintz, Yuval 2639007bc371SMintz, Yuval /* Find which qid-index is associated with the queue */ 2640007bc371SMintz, Yuval qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, true); 264108bc8f15SMintz, Yuval if (qid_usage_idx == QED_IOV_QID_INVALID) 264208bc8f15SMintz, Yuval goto out; 2643007bc371SMintz, Yuval 2644007bc371SMintz, Yuval rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, qid_usage_idx); 26454c4fa793SMintz, Yuval if (!rc) 26464c4fa793SMintz, Yuval status = PFVF_STATUS_SUCCESS; 2647dacd88d6SYuval Mintz 26484c4fa793SMintz, Yuval out: 2649dacd88d6SYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS, 2650dacd88d6SYuval Mintz length, status); 2651dacd88d6SYuval Mintz } 2652dacd88d6SYuval Mintz 265317b235c1SYuval Mintz static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn, 265417b235c1SYuval Mintz struct qed_ptt *p_ptt, 265517b235c1SYuval Mintz struct qed_vf_info *vf) 265617b235c1SYuval Mintz { 26573da7a37aSMintz, Yuval struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF]; 265817b235c1SYuval Mintz u16 length = sizeof(struct pfvf_def_resp_tlv); 265917b235c1SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 266017b235c1SYuval Mintz struct vfpf_update_rxq_tlv *req; 26613da7a37aSMintz, Yuval u8 status = PFVF_STATUS_FAILURE; 266217b235c1SYuval Mintz u8 complete_event_flg; 266317b235c1SYuval Mintz u8 complete_cqe_flg; 2664007bc371SMintz, Yuval u8 qid_usage_idx; 266517b235c1SYuval Mintz int rc; 266617b235c1SYuval Mintz u8 i; 266717b235c1SYuval Mintz 266817b235c1SYuval Mintz req = &mbx->req_virt->update_rxq; 266917b235c1SYuval Mintz complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG); 267017b235c1SYuval Mintz complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG); 267117b235c1SYuval Mintz 2672007bc371SMintz, Yuval qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false); 267308bc8f15SMintz, Yuval if (qid_usage_idx == QED_IOV_QID_INVALID) 26743da7a37aSMintz, Yuval goto out; 267508bc8f15SMintz, Yuval 267608bc8f15SMintz, Yuval /* There shouldn't exist a VF that uses queue-qids yet uses this 267708bc8f15SMintz, Yuval * API with multiple Rx queues. Validate this. 267808bc8f15SMintz, Yuval */ 267908bc8f15SMintz, Yuval if ((vf->acquire.vfdev_info.capabilities & 268008bc8f15SMintz, Yuval VFPF_ACQUIRE_CAP_QUEUE_QIDS) && req->num_rxqs != 1) { 268108bc8f15SMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 268208bc8f15SMintz, Yuval "VF[%d] supports QIDs but sends multiple queues\n", 268308bc8f15SMintz, Yuval vf->relative_vf_id); 268408bc8f15SMintz, Yuval goto out; 268508bc8f15SMintz, Yuval } 268608bc8f15SMintz, Yuval 268708bc8f15SMintz, Yuval /* Validate inputs - for the legacy case this is still true since 268808bc8f15SMintz, Yuval * qid_usage_idx for each Rx queue would be LEGACY_QID_RX. 268908bc8f15SMintz, Yuval */ 269008bc8f15SMintz, Yuval for (i = req->rx_qid; i < req->rx_qid + req->num_rxqs; i++) { 269108bc8f15SMintz, Yuval if (!qed_iov_validate_rxq(p_hwfn, vf, i, 269208bc8f15SMintz, Yuval QED_IOV_VALIDATE_Q_NA) || 269308bc8f15SMintz, Yuval !vf->vf_queues[i].cids[qid_usage_idx].p_cid || 269408bc8f15SMintz, Yuval vf->vf_queues[i].cids[qid_usage_idx].b_is_tx) { 269508bc8f15SMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 269608bc8f15SMintz, Yuval "VF[%d]: Incorrect Rxqs [%04x, %02x]\n", 269708bc8f15SMintz, Yuval vf->relative_vf_id, req->rx_qid, 269808bc8f15SMintz, Yuval req->num_rxqs); 269908bc8f15SMintz, Yuval goto out; 270008bc8f15SMintz, Yuval } 270117b235c1SYuval Mintz } 270217b235c1SYuval Mintz 2703f109c240SMintz, Yuval /* Prepare the handlers */ 27043da7a37aSMintz, Yuval for (i = 0; i < req->num_rxqs; i++) { 2705007bc371SMintz, Yuval u16 qid = req->rx_qid + i; 2706007bc371SMintz, Yuval 2707007bc371SMintz, Yuval handlers[i] = vf->vf_queues[qid].cids[qid_usage_idx].p_cid; 27083da7a37aSMintz, Yuval } 27093da7a37aSMintz, Yuval 27103da7a37aSMintz, Yuval rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers, 27113da7a37aSMintz, Yuval req->num_rxqs, 271217b235c1SYuval Mintz complete_cqe_flg, 271317b235c1SYuval Mintz complete_event_flg, 271417b235c1SYuval Mintz QED_SPQ_MODE_EBLOCK, NULL); 27153da7a37aSMintz, Yuval if (rc) 27163da7a37aSMintz, Yuval goto out; 271717b235c1SYuval Mintz 27183da7a37aSMintz, Yuval status = PFVF_STATUS_SUCCESS; 27193da7a37aSMintz, Yuval out: 272017b235c1SYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ, 272117b235c1SYuval Mintz length, status); 272217b235c1SYuval Mintz } 272317b235c1SYuval Mintz 2724dacd88d6SYuval Mintz void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn, 2725dacd88d6SYuval Mintz void *p_tlvs_list, u16 req_type) 2726dacd88d6SYuval Mintz { 2727dacd88d6SYuval Mintz struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list; 2728dacd88d6SYuval Mintz int len = 0; 2729dacd88d6SYuval Mintz 2730dacd88d6SYuval Mintz do { 2731dacd88d6SYuval Mintz if (!p_tlv->length) { 2732dacd88d6SYuval Mintz DP_NOTICE(p_hwfn, "Zero length TLV found\n"); 2733dacd88d6SYuval Mintz return NULL; 2734dacd88d6SYuval Mintz } 2735dacd88d6SYuval Mintz 2736dacd88d6SYuval Mintz if (p_tlv->type == req_type) { 2737dacd88d6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 2738dacd88d6SYuval Mintz "Extended tlv type %d, length %d found\n", 2739dacd88d6SYuval Mintz p_tlv->type, p_tlv->length); 2740dacd88d6SYuval Mintz return p_tlv; 2741dacd88d6SYuval Mintz } 2742dacd88d6SYuval Mintz 2743dacd88d6SYuval Mintz len += p_tlv->length; 2744dacd88d6SYuval Mintz p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length); 2745dacd88d6SYuval Mintz 2746dacd88d6SYuval Mintz if ((len + p_tlv->length) > TLV_BUFFER_SIZE) { 2747dacd88d6SYuval Mintz DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n"); 2748dacd88d6SYuval Mintz return NULL; 2749dacd88d6SYuval Mintz } 2750dacd88d6SYuval Mintz } while (p_tlv->type != CHANNEL_TLV_LIST_END); 2751dacd88d6SYuval Mintz 2752dacd88d6SYuval Mintz return NULL; 2753dacd88d6SYuval Mintz } 2754dacd88d6SYuval Mintz 2755dacd88d6SYuval Mintz static void 2756dacd88d6SYuval Mintz qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn, 2757dacd88d6SYuval Mintz struct qed_sp_vport_update_params *p_data, 2758dacd88d6SYuval Mintz struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask) 2759dacd88d6SYuval Mintz { 2760dacd88d6SYuval Mintz struct vfpf_vport_update_activate_tlv *p_act_tlv; 2761dacd88d6SYuval Mintz u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE; 2762dacd88d6SYuval Mintz 2763dacd88d6SYuval Mintz p_act_tlv = (struct vfpf_vport_update_activate_tlv *) 2764dacd88d6SYuval Mintz qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv); 2765dacd88d6SYuval Mintz if (!p_act_tlv) 2766dacd88d6SYuval Mintz return; 2767dacd88d6SYuval Mintz 2768dacd88d6SYuval Mintz p_data->update_vport_active_rx_flg = p_act_tlv->update_rx; 2769dacd88d6SYuval Mintz p_data->vport_active_rx_flg = p_act_tlv->active_rx; 2770dacd88d6SYuval Mintz p_data->update_vport_active_tx_flg = p_act_tlv->update_tx; 2771dacd88d6SYuval Mintz p_data->vport_active_tx_flg = p_act_tlv->active_tx; 2772dacd88d6SYuval Mintz *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE; 2773dacd88d6SYuval Mintz } 2774dacd88d6SYuval Mintz 2775dacd88d6SYuval Mintz static void 277617b235c1SYuval Mintz qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn, 277717b235c1SYuval Mintz struct qed_sp_vport_update_params *p_data, 277817b235c1SYuval Mintz struct qed_vf_info *p_vf, 277917b235c1SYuval Mintz struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask) 278017b235c1SYuval Mintz { 278117b235c1SYuval Mintz struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv; 278217b235c1SYuval Mintz u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP; 278317b235c1SYuval Mintz 278417b235c1SYuval Mintz p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *) 278517b235c1SYuval Mintz qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv); 278617b235c1SYuval Mintz if (!p_vlan_tlv) 278717b235c1SYuval Mintz return; 278817b235c1SYuval Mintz 278908feecd7SYuval Mintz p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan; 279008feecd7SYuval Mintz 279108feecd7SYuval Mintz /* Ignore the VF request if we're forcing a vlan */ 27921a635e48SYuval Mintz if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) { 279317b235c1SYuval Mintz p_data->update_inner_vlan_removal_flg = 1; 279417b235c1SYuval Mintz p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan; 279508feecd7SYuval Mintz } 279617b235c1SYuval Mintz 279717b235c1SYuval Mintz *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP; 279817b235c1SYuval Mintz } 279917b235c1SYuval Mintz 280017b235c1SYuval Mintz static void 280117b235c1SYuval Mintz qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn, 280217b235c1SYuval Mintz struct qed_sp_vport_update_params *p_data, 280317b235c1SYuval Mintz struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask) 280417b235c1SYuval Mintz { 280517b235c1SYuval Mintz struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv; 280617b235c1SYuval Mintz u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH; 280717b235c1SYuval Mintz 280817b235c1SYuval Mintz p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *) 280917b235c1SYuval Mintz qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, 281017b235c1SYuval Mintz tlv); 281117b235c1SYuval Mintz if (!p_tx_switch_tlv) 281217b235c1SYuval Mintz return; 281317b235c1SYuval Mintz 281417b235c1SYuval Mintz p_data->update_tx_switching_flg = 1; 281517b235c1SYuval Mintz p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching; 281617b235c1SYuval Mintz *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH; 281717b235c1SYuval Mintz } 281817b235c1SYuval Mintz 281917b235c1SYuval Mintz static void 2820dacd88d6SYuval Mintz qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn, 2821dacd88d6SYuval Mintz struct qed_sp_vport_update_params *p_data, 2822dacd88d6SYuval Mintz struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask) 2823dacd88d6SYuval Mintz { 2824dacd88d6SYuval Mintz struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv; 2825dacd88d6SYuval Mintz u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST; 2826dacd88d6SYuval Mintz 2827dacd88d6SYuval Mintz p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *) 2828dacd88d6SYuval Mintz qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv); 2829dacd88d6SYuval Mintz if (!p_mcast_tlv) 2830dacd88d6SYuval Mintz return; 2831dacd88d6SYuval Mintz 2832dacd88d6SYuval Mintz p_data->update_approx_mcast_flg = 1; 2833dacd88d6SYuval Mintz memcpy(p_data->bins, p_mcast_tlv->bins, 283425c020a9SSudarsana Reddy Kalluru sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS); 2835dacd88d6SYuval Mintz *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST; 2836dacd88d6SYuval Mintz } 2837dacd88d6SYuval Mintz 2838dacd88d6SYuval Mintz static void 2839dacd88d6SYuval Mintz qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn, 2840dacd88d6SYuval Mintz struct qed_sp_vport_update_params *p_data, 2841dacd88d6SYuval Mintz struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask) 2842dacd88d6SYuval Mintz { 2843dacd88d6SYuval Mintz struct qed_filter_accept_flags *p_flags = &p_data->accept_flags; 2844dacd88d6SYuval Mintz struct vfpf_vport_update_accept_param_tlv *p_accept_tlv; 2845dacd88d6SYuval Mintz u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM; 2846dacd88d6SYuval Mintz 2847dacd88d6SYuval Mintz p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *) 2848dacd88d6SYuval Mintz qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv); 2849dacd88d6SYuval Mintz if (!p_accept_tlv) 2850dacd88d6SYuval Mintz return; 2851dacd88d6SYuval Mintz 2852dacd88d6SYuval Mintz p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode; 2853dacd88d6SYuval Mintz p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter; 2854dacd88d6SYuval Mintz p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode; 2855dacd88d6SYuval Mintz p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter; 2856dacd88d6SYuval Mintz *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM; 2857dacd88d6SYuval Mintz } 2858dacd88d6SYuval Mintz 2859dacd88d6SYuval Mintz static void 286017b235c1SYuval Mintz qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn, 286117b235c1SYuval Mintz struct qed_sp_vport_update_params *p_data, 286217b235c1SYuval Mintz struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask) 286317b235c1SYuval Mintz { 286417b235c1SYuval Mintz struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan; 286517b235c1SYuval Mintz u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN; 286617b235c1SYuval Mintz 286717b235c1SYuval Mintz p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *) 286817b235c1SYuval Mintz qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, 286917b235c1SYuval Mintz tlv); 287017b235c1SYuval Mintz if (!p_accept_any_vlan) 287117b235c1SYuval Mintz return; 287217b235c1SYuval Mintz 287317b235c1SYuval Mintz p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan; 287417b235c1SYuval Mintz p_data->update_accept_any_vlan_flg = 287517b235c1SYuval Mintz p_accept_any_vlan->update_accept_any_vlan_flg; 287617b235c1SYuval Mintz *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN; 287717b235c1SYuval Mintz } 287817b235c1SYuval Mintz 287917b235c1SYuval Mintz static void 2880dacd88d6SYuval Mintz qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn, 2881dacd88d6SYuval Mintz struct qed_vf_info *vf, 2882dacd88d6SYuval Mintz struct qed_sp_vport_update_params *p_data, 2883dacd88d6SYuval Mintz struct qed_rss_params *p_rss, 2884f29ffdb6SMintz, Yuval struct qed_iov_vf_mbx *p_mbx, 2885f29ffdb6SMintz, Yuval u16 *tlvs_mask, u16 *tlvs_accepted) 2886dacd88d6SYuval Mintz { 2887dacd88d6SYuval Mintz struct vfpf_vport_update_rss_tlv *p_rss_tlv; 2888dacd88d6SYuval Mintz u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS; 2889f29ffdb6SMintz, Yuval bool b_reject = false; 2890dacd88d6SYuval Mintz u16 table_size; 2891f29ffdb6SMintz, Yuval u16 i, q_idx; 2892dacd88d6SYuval Mintz 2893dacd88d6SYuval Mintz p_rss_tlv = (struct vfpf_vport_update_rss_tlv *) 2894dacd88d6SYuval Mintz qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv); 2895dacd88d6SYuval Mintz if (!p_rss_tlv) { 2896dacd88d6SYuval Mintz p_data->rss_params = NULL; 2897dacd88d6SYuval Mintz return; 2898dacd88d6SYuval Mintz } 2899dacd88d6SYuval Mintz 2900dacd88d6SYuval Mintz memset(p_rss, 0, sizeof(struct qed_rss_params)); 2901dacd88d6SYuval Mintz 2902dacd88d6SYuval Mintz p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags & 2903dacd88d6SYuval Mintz VFPF_UPDATE_RSS_CONFIG_FLAG); 2904dacd88d6SYuval Mintz p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags & 2905dacd88d6SYuval Mintz VFPF_UPDATE_RSS_CAPS_FLAG); 2906dacd88d6SYuval Mintz p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags & 2907dacd88d6SYuval Mintz VFPF_UPDATE_RSS_IND_TABLE_FLAG); 2908dacd88d6SYuval Mintz p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags & 2909dacd88d6SYuval Mintz VFPF_UPDATE_RSS_KEY_FLAG); 2910dacd88d6SYuval Mintz 2911dacd88d6SYuval Mintz p_rss->rss_enable = p_rss_tlv->rss_enable; 2912dacd88d6SYuval Mintz p_rss->rss_eng_id = vf->relative_vf_id + 1; 2913dacd88d6SYuval Mintz p_rss->rss_caps = p_rss_tlv->rss_caps; 2914dacd88d6SYuval Mintz p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log; 2915dacd88d6SYuval Mintz memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key)); 2916dacd88d6SYuval Mintz 2917dacd88d6SYuval Mintz table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table), 2918dacd88d6SYuval Mintz (1 << p_rss_tlv->rss_table_size_log)); 2919dacd88d6SYuval Mintz 2920dacd88d6SYuval Mintz for (i = 0; i < table_size; i++) { 2921007bc371SMintz, Yuval struct qed_queue_cid *p_cid; 2922007bc371SMintz, Yuval 2923f29ffdb6SMintz, Yuval q_idx = p_rss_tlv->rss_ind_table[i]; 2924f109c240SMintz, Yuval if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx, 2925f109c240SMintz, Yuval QED_IOV_VALIDATE_Q_ENABLE)) { 2926f29ffdb6SMintz, Yuval DP_VERBOSE(p_hwfn, 2927f29ffdb6SMintz, Yuval QED_MSG_IOV, 2928f29ffdb6SMintz, Yuval "VF[%d]: Omitting RSS due to wrong queue %04x\n", 2929f29ffdb6SMintz, Yuval vf->relative_vf_id, q_idx); 2930f29ffdb6SMintz, Yuval b_reject = true; 2931f29ffdb6SMintz, Yuval goto out; 2932f29ffdb6SMintz, Yuval } 2933dacd88d6SYuval Mintz 2934007bc371SMintz, Yuval p_cid = qed_iov_get_vf_rx_queue_cid(&vf->vf_queues[q_idx]); 2935007bc371SMintz, Yuval p_rss->rss_ind_table[i] = p_cid; 2936dacd88d6SYuval Mintz } 2937dacd88d6SYuval Mintz 2938dacd88d6SYuval Mintz p_data->rss_params = p_rss; 2939f29ffdb6SMintz, Yuval out: 2940dacd88d6SYuval Mintz *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS; 2941f29ffdb6SMintz, Yuval if (!b_reject) 2942f29ffdb6SMintz, Yuval *tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS; 2943dacd88d6SYuval Mintz } 2944dacd88d6SYuval Mintz 294517b235c1SYuval Mintz static void 294617b235c1SYuval Mintz qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn, 294717b235c1SYuval Mintz struct qed_vf_info *vf, 294817b235c1SYuval Mintz struct qed_sp_vport_update_params *p_data, 294917b235c1SYuval Mintz struct qed_sge_tpa_params *p_sge_tpa, 295017b235c1SYuval Mintz struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask) 295117b235c1SYuval Mintz { 295217b235c1SYuval Mintz struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv; 295317b235c1SYuval Mintz u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA; 295417b235c1SYuval Mintz 295517b235c1SYuval Mintz p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *) 295617b235c1SYuval Mintz qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv); 295717b235c1SYuval Mintz 295817b235c1SYuval Mintz if (!p_sge_tpa_tlv) { 295917b235c1SYuval Mintz p_data->sge_tpa_params = NULL; 296017b235c1SYuval Mintz return; 296117b235c1SYuval Mintz } 296217b235c1SYuval Mintz 296317b235c1SYuval Mintz memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params)); 296417b235c1SYuval Mintz 296517b235c1SYuval Mintz p_sge_tpa->update_tpa_en_flg = 296617b235c1SYuval Mintz !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG); 296717b235c1SYuval Mintz p_sge_tpa->update_tpa_param_flg = 296817b235c1SYuval Mintz !!(p_sge_tpa_tlv->update_sge_tpa_flags & 296917b235c1SYuval Mintz VFPF_UPDATE_TPA_PARAM_FLAG); 297017b235c1SYuval Mintz 297117b235c1SYuval Mintz p_sge_tpa->tpa_ipv4_en_flg = 297217b235c1SYuval Mintz !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG); 297317b235c1SYuval Mintz p_sge_tpa->tpa_ipv6_en_flg = 297417b235c1SYuval Mintz !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG); 297517b235c1SYuval Mintz p_sge_tpa->tpa_pkt_split_flg = 297617b235c1SYuval Mintz !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG); 297717b235c1SYuval Mintz p_sge_tpa->tpa_hdr_data_split_flg = 297817b235c1SYuval Mintz !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG); 297917b235c1SYuval Mintz p_sge_tpa->tpa_gro_consistent_flg = 298017b235c1SYuval Mintz !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG); 298117b235c1SYuval Mintz 298217b235c1SYuval Mintz p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num; 298317b235c1SYuval Mintz p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size; 298417b235c1SYuval Mintz p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start; 298517b235c1SYuval Mintz p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont; 298617b235c1SYuval Mintz p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe; 298717b235c1SYuval Mintz 298817b235c1SYuval Mintz p_data->sge_tpa_params = p_sge_tpa; 298917b235c1SYuval Mintz 299017b235c1SYuval Mintz *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA; 299117b235c1SYuval Mintz } 299217b235c1SYuval Mintz 2993f990c82cSMintz, Yuval static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn, 2994f990c82cSMintz, Yuval u8 vfid, 2995f990c82cSMintz, Yuval struct qed_sp_vport_update_params *params, 2996f990c82cSMintz, Yuval u16 *tlvs) 2997f990c82cSMintz, Yuval { 2998f990c82cSMintz, Yuval u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED; 2999f990c82cSMintz, Yuval struct qed_filter_accept_flags *flags = ¶ms->accept_flags; 3000f990c82cSMintz, Yuval struct qed_public_vf_info *vf_info; 3001f990c82cSMintz, Yuval 3002f990c82cSMintz, Yuval /* Untrusted VFs can't even be trusted to know that fact. 3003f990c82cSMintz, Yuval * Simply indicate everything is configured fine, and trace 3004f990c82cSMintz, Yuval * configuration 'behind their back'. 3005f990c82cSMintz, Yuval */ 3006f990c82cSMintz, Yuval if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM))) 3007f990c82cSMintz, Yuval return 0; 3008f990c82cSMintz, Yuval 3009f990c82cSMintz, Yuval vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true); 3010f990c82cSMintz, Yuval 3011f990c82cSMintz, Yuval if (flags->update_rx_mode_config) { 3012f990c82cSMintz, Yuval vf_info->rx_accept_mode = flags->rx_accept_filter; 3013f990c82cSMintz, Yuval if (!vf_info->is_trusted_configured) 3014f990c82cSMintz, Yuval flags->rx_accept_filter &= ~mask; 3015f990c82cSMintz, Yuval } 3016f990c82cSMintz, Yuval 3017f990c82cSMintz, Yuval if (flags->update_tx_mode_config) { 3018f990c82cSMintz, Yuval vf_info->tx_accept_mode = flags->tx_accept_filter; 3019f990c82cSMintz, Yuval if (!vf_info->is_trusted_configured) 3020f990c82cSMintz, Yuval flags->tx_accept_filter &= ~mask; 3021f990c82cSMintz, Yuval } 3022f990c82cSMintz, Yuval 3023f990c82cSMintz, Yuval return 0; 3024f990c82cSMintz, Yuval } 3025f990c82cSMintz, Yuval 3026dacd88d6SYuval Mintz static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn, 3027dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 3028dacd88d6SYuval Mintz struct qed_vf_info *vf) 3029dacd88d6SYuval Mintz { 3030f29ffdb6SMintz, Yuval struct qed_rss_params *p_rss_params = NULL; 3031dacd88d6SYuval Mintz struct qed_sp_vport_update_params params; 3032dacd88d6SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 303317b235c1SYuval Mintz struct qed_sge_tpa_params sge_tpa_params; 3034f29ffdb6SMintz, Yuval u16 tlvs_mask = 0, tlvs_accepted = 0; 3035dacd88d6SYuval Mintz u8 status = PFVF_STATUS_SUCCESS; 3036dacd88d6SYuval Mintz u16 length; 3037dacd88d6SYuval Mintz int rc; 3038dacd88d6SYuval Mintz 303941086467SYuval Mintz /* Valiate PF can send such a request */ 304041086467SYuval Mintz if (!vf->vport_instance) { 304141086467SYuval Mintz DP_VERBOSE(p_hwfn, 304241086467SYuval Mintz QED_MSG_IOV, 304341086467SYuval Mintz "No VPORT instance available for VF[%d], failing vport update\n", 304441086467SYuval Mintz vf->abs_vf_id); 304541086467SYuval Mintz status = PFVF_STATUS_FAILURE; 304641086467SYuval Mintz goto out; 304741086467SYuval Mintz } 3048f29ffdb6SMintz, Yuval p_rss_params = vzalloc(sizeof(*p_rss_params)); 3049f29ffdb6SMintz, Yuval if (p_rss_params == NULL) { 3050f29ffdb6SMintz, Yuval status = PFVF_STATUS_FAILURE; 3051f29ffdb6SMintz, Yuval goto out; 3052f29ffdb6SMintz, Yuval } 305341086467SYuval Mintz 3054dacd88d6SYuval Mintz memset(¶ms, 0, sizeof(params)); 3055dacd88d6SYuval Mintz params.opaque_fid = vf->opaque_fid; 3056dacd88d6SYuval Mintz params.vport_id = vf->vport_id; 3057dacd88d6SYuval Mintz params.rss_params = NULL; 3058dacd88d6SYuval Mintz 3059dacd88d6SYuval Mintz /* Search for extended tlvs list and update values 3060dacd88d6SYuval Mintz * from VF in struct qed_sp_vport_update_params. 3061dacd88d6SYuval Mintz */ 3062dacd88d6SYuval Mintz qed_iov_vp_update_act_param(p_hwfn, ¶ms, mbx, &tlvs_mask); 306317b235c1SYuval Mintz qed_iov_vp_update_vlan_param(p_hwfn, ¶ms, vf, mbx, &tlvs_mask); 306417b235c1SYuval Mintz qed_iov_vp_update_tx_switch(p_hwfn, ¶ms, mbx, &tlvs_mask); 3065dacd88d6SYuval Mintz qed_iov_vp_update_mcast_bin_param(p_hwfn, ¶ms, mbx, &tlvs_mask); 3066dacd88d6SYuval Mintz qed_iov_vp_update_accept_flag(p_hwfn, ¶ms, mbx, &tlvs_mask); 306717b235c1SYuval Mintz qed_iov_vp_update_accept_any_vlan(p_hwfn, ¶ms, mbx, &tlvs_mask); 306817b235c1SYuval Mintz qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, ¶ms, 306917b235c1SYuval Mintz &sge_tpa_params, mbx, &tlvs_mask); 3070dacd88d6SYuval Mintz 3071f29ffdb6SMintz, Yuval tlvs_accepted = tlvs_mask; 3072f29ffdb6SMintz, Yuval 3073f29ffdb6SMintz, Yuval /* Some of the extended TLVs need to be validated first; In that case, 3074f29ffdb6SMintz, Yuval * they can update the mask without updating the accepted [so that 3075f29ffdb6SMintz, Yuval * PF could communicate to VF it has rejected request]. 3076dacd88d6SYuval Mintz */ 3077f29ffdb6SMintz, Yuval qed_iov_vp_update_rss_param(p_hwfn, vf, ¶ms, p_rss_params, 3078f29ffdb6SMintz, Yuval mbx, &tlvs_mask, &tlvs_accepted); 3079f29ffdb6SMintz, Yuval 3080f990c82cSMintz, Yuval if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id, 3081f990c82cSMintz, Yuval ¶ms, &tlvs_accepted)) { 3082f990c82cSMintz, Yuval tlvs_accepted = 0; 3083f990c82cSMintz, Yuval status = PFVF_STATUS_NOT_SUPPORTED; 3084f990c82cSMintz, Yuval goto out; 3085f990c82cSMintz, Yuval } 3086f990c82cSMintz, Yuval 3087f29ffdb6SMintz, Yuval if (!tlvs_accepted) { 3088f29ffdb6SMintz, Yuval if (tlvs_mask) 3089f29ffdb6SMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 3090f29ffdb6SMintz, Yuval "Upper-layer prevents VF vport configuration\n"); 3091f29ffdb6SMintz, Yuval else 3092f29ffdb6SMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 3093dacd88d6SYuval Mintz "No feature tlvs found for vport update\n"); 3094dacd88d6SYuval Mintz status = PFVF_STATUS_NOT_SUPPORTED; 3095dacd88d6SYuval Mintz goto out; 3096dacd88d6SYuval Mintz } 3097dacd88d6SYuval Mintz 3098dacd88d6SYuval Mintz rc = qed_sp_vport_update(p_hwfn, ¶ms, QED_SPQ_MODE_EBLOCK, NULL); 3099dacd88d6SYuval Mintz 3100dacd88d6SYuval Mintz if (rc) 3101dacd88d6SYuval Mintz status = PFVF_STATUS_FAILURE; 3102dacd88d6SYuval Mintz 3103dacd88d6SYuval Mintz out: 3104f29ffdb6SMintz, Yuval vfree(p_rss_params); 3105dacd88d6SYuval Mintz length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status, 3106f29ffdb6SMintz, Yuval tlvs_mask, tlvs_accepted); 3107dacd88d6SYuval Mintz qed_iov_send_response(p_hwfn, p_ptt, vf, length, status); 3108dacd88d6SYuval Mintz } 3109dacd88d6SYuval Mintz 31108246d0b4SYuval Mintz static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn, 311108feecd7SYuval Mintz struct qed_vf_info *p_vf, 311208feecd7SYuval Mintz struct qed_filter_ucast *p_params) 311308feecd7SYuval Mintz { 311408feecd7SYuval Mintz int i; 311508feecd7SYuval Mintz 311608feecd7SYuval Mintz /* First remove entries and then add new ones */ 311708feecd7SYuval Mintz if (p_params->opcode == QED_FILTER_REMOVE) { 311808feecd7SYuval Mintz for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) 311908feecd7SYuval Mintz if (p_vf->shadow_config.vlans[i].used && 312008feecd7SYuval Mintz p_vf->shadow_config.vlans[i].vid == 312108feecd7SYuval Mintz p_params->vlan) { 312208feecd7SYuval Mintz p_vf->shadow_config.vlans[i].used = false; 312308feecd7SYuval Mintz break; 312408feecd7SYuval Mintz } 312508feecd7SYuval Mintz if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) { 312608feecd7SYuval Mintz DP_VERBOSE(p_hwfn, 312708feecd7SYuval Mintz QED_MSG_IOV, 312808feecd7SYuval Mintz "VF [%d] - Tries to remove a non-existing vlan\n", 312908feecd7SYuval Mintz p_vf->relative_vf_id); 313008feecd7SYuval Mintz return -EINVAL; 313108feecd7SYuval Mintz } 313208feecd7SYuval Mintz } else if (p_params->opcode == QED_FILTER_REPLACE || 313308feecd7SYuval Mintz p_params->opcode == QED_FILTER_FLUSH) { 313408feecd7SYuval Mintz for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) 313508feecd7SYuval Mintz p_vf->shadow_config.vlans[i].used = false; 313608feecd7SYuval Mintz } 313708feecd7SYuval Mintz 313808feecd7SYuval Mintz /* In forced mode, we're willing to remove entries - but we don't add 313908feecd7SYuval Mintz * new ones. 314008feecd7SYuval Mintz */ 31411a635e48SYuval Mintz if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)) 314208feecd7SYuval Mintz return 0; 314308feecd7SYuval Mintz 314408feecd7SYuval Mintz if (p_params->opcode == QED_FILTER_ADD || 314508feecd7SYuval Mintz p_params->opcode == QED_FILTER_REPLACE) { 314608feecd7SYuval Mintz for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) { 314708feecd7SYuval Mintz if (p_vf->shadow_config.vlans[i].used) 314808feecd7SYuval Mintz continue; 314908feecd7SYuval Mintz 315008feecd7SYuval Mintz p_vf->shadow_config.vlans[i].used = true; 315108feecd7SYuval Mintz p_vf->shadow_config.vlans[i].vid = p_params->vlan; 315208feecd7SYuval Mintz break; 315308feecd7SYuval Mintz } 315408feecd7SYuval Mintz 315508feecd7SYuval Mintz if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) { 315608feecd7SYuval Mintz DP_VERBOSE(p_hwfn, 315708feecd7SYuval Mintz QED_MSG_IOV, 315808feecd7SYuval Mintz "VF [%d] - Tries to configure more than %d vlan filters\n", 315908feecd7SYuval Mintz p_vf->relative_vf_id, 316008feecd7SYuval Mintz QED_ETH_VF_NUM_VLAN_FILTERS + 1); 316108feecd7SYuval Mintz return -EINVAL; 316208feecd7SYuval Mintz } 316308feecd7SYuval Mintz } 316408feecd7SYuval Mintz 316508feecd7SYuval Mintz return 0; 316608feecd7SYuval Mintz } 316708feecd7SYuval Mintz 31688246d0b4SYuval Mintz static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn, 31698246d0b4SYuval Mintz struct qed_vf_info *p_vf, 31708246d0b4SYuval Mintz struct qed_filter_ucast *p_params) 31718246d0b4SYuval Mintz { 31728246d0b4SYuval Mintz int i; 31738246d0b4SYuval Mintz 31748246d0b4SYuval Mintz /* If we're in forced-mode, we don't allow any change */ 31751a635e48SYuval Mintz if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)) 31768246d0b4SYuval Mintz return 0; 31778246d0b4SYuval Mintz 31787425d822SShahed Shaikh /* Don't keep track of shadow copy since we don't intend to restore. */ 31797425d822SShahed Shaikh if (p_vf->p_vf_info.is_trusted_configured) 31807425d822SShahed Shaikh return 0; 31817425d822SShahed Shaikh 31828246d0b4SYuval Mintz /* First remove entries and then add new ones */ 31838246d0b4SYuval Mintz if (p_params->opcode == QED_FILTER_REMOVE) { 31848246d0b4SYuval Mintz for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) { 31858246d0b4SYuval Mintz if (ether_addr_equal(p_vf->shadow_config.macs[i], 31868246d0b4SYuval Mintz p_params->mac)) { 31870ee28e31SShyam Saini eth_zero_addr(p_vf->shadow_config.macs[i]); 31888246d0b4SYuval Mintz break; 31898246d0b4SYuval Mintz } 31908246d0b4SYuval Mintz } 31918246d0b4SYuval Mintz 31928246d0b4SYuval Mintz if (i == QED_ETH_VF_NUM_MAC_FILTERS) { 31938246d0b4SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 31948246d0b4SYuval Mintz "MAC isn't configured\n"); 31958246d0b4SYuval Mintz return -EINVAL; 31968246d0b4SYuval Mintz } 31978246d0b4SYuval Mintz } else if (p_params->opcode == QED_FILTER_REPLACE || 31988246d0b4SYuval Mintz p_params->opcode == QED_FILTER_FLUSH) { 31998246d0b4SYuval Mintz for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) 32000ee28e31SShyam Saini eth_zero_addr(p_vf->shadow_config.macs[i]); 32018246d0b4SYuval Mintz } 32028246d0b4SYuval Mintz 32038246d0b4SYuval Mintz /* List the new MAC address */ 32048246d0b4SYuval Mintz if (p_params->opcode != QED_FILTER_ADD && 32058246d0b4SYuval Mintz p_params->opcode != QED_FILTER_REPLACE) 32068246d0b4SYuval Mintz return 0; 32078246d0b4SYuval Mintz 32088246d0b4SYuval Mintz for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) { 32098246d0b4SYuval Mintz if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) { 32108246d0b4SYuval Mintz ether_addr_copy(p_vf->shadow_config.macs[i], 32118246d0b4SYuval Mintz p_params->mac); 32128246d0b4SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 32138246d0b4SYuval Mintz "Added MAC at %d entry in shadow\n", i); 32148246d0b4SYuval Mintz break; 32158246d0b4SYuval Mintz } 32168246d0b4SYuval Mintz } 32178246d0b4SYuval Mintz 32188246d0b4SYuval Mintz if (i == QED_ETH_VF_NUM_MAC_FILTERS) { 32198246d0b4SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n"); 32208246d0b4SYuval Mintz return -EINVAL; 32218246d0b4SYuval Mintz } 32228246d0b4SYuval Mintz 32238246d0b4SYuval Mintz return 0; 32248246d0b4SYuval Mintz } 32258246d0b4SYuval Mintz 32268246d0b4SYuval Mintz static int 32278246d0b4SYuval Mintz qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn, 32288246d0b4SYuval Mintz struct qed_vf_info *p_vf, 32298246d0b4SYuval Mintz struct qed_filter_ucast *p_params) 32308246d0b4SYuval Mintz { 32318246d0b4SYuval Mintz int rc = 0; 32328246d0b4SYuval Mintz 32338246d0b4SYuval Mintz if (p_params->type == QED_FILTER_MAC) { 32348246d0b4SYuval Mintz rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params); 32358246d0b4SYuval Mintz if (rc) 32368246d0b4SYuval Mintz return rc; 32378246d0b4SYuval Mintz } 32388246d0b4SYuval Mintz 32398246d0b4SYuval Mintz if (p_params->type == QED_FILTER_VLAN) 32408246d0b4SYuval Mintz rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params); 32418246d0b4SYuval Mintz 32428246d0b4SYuval Mintz return rc; 32438246d0b4SYuval Mintz } 32448246d0b4SYuval Mintz 3245ba56947aSBaoyou Xie static int qed_iov_chk_ucast(struct qed_hwfn *hwfn, 3246dacd88d6SYuval Mintz int vfid, struct qed_filter_ucast *params) 3247dacd88d6SYuval Mintz { 3248dacd88d6SYuval Mintz struct qed_public_vf_info *vf; 3249dacd88d6SYuval Mintz 3250dacd88d6SYuval Mintz vf = qed_iov_get_public_vf_info(hwfn, vfid, true); 3251dacd88d6SYuval Mintz if (!vf) 3252dacd88d6SYuval Mintz return -EINVAL; 3253dacd88d6SYuval Mintz 3254dacd88d6SYuval Mintz /* No real decision to make; Store the configured MAC */ 3255dacd88d6SYuval Mintz if (params->type == QED_FILTER_MAC || 32567425d822SShahed Shaikh params->type == QED_FILTER_MAC_VLAN) { 3257dacd88d6SYuval Mintz ether_addr_copy(vf->mac, params->mac); 3258dacd88d6SYuval Mintz 32597425d822SShahed Shaikh if (vf->is_trusted_configured) { 32607425d822SShahed Shaikh qed_iov_bulletin_set_mac(hwfn, vf->mac, vfid); 32617425d822SShahed Shaikh 32627425d822SShahed Shaikh /* Update and post bulleitin again */ 32637425d822SShahed Shaikh qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG); 32647425d822SShahed Shaikh } 32657425d822SShahed Shaikh } 32667425d822SShahed Shaikh 3267dacd88d6SYuval Mintz return 0; 3268dacd88d6SYuval Mintz } 3269dacd88d6SYuval Mintz 3270dacd88d6SYuval Mintz static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn, 3271dacd88d6SYuval Mintz struct qed_ptt *p_ptt, 3272dacd88d6SYuval Mintz struct qed_vf_info *vf) 3273dacd88d6SYuval Mintz { 327408feecd7SYuval Mintz struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt; 3275dacd88d6SYuval Mintz struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 3276dacd88d6SYuval Mintz struct vfpf_ucast_filter_tlv *req; 3277dacd88d6SYuval Mintz u8 status = PFVF_STATUS_SUCCESS; 3278dacd88d6SYuval Mintz struct qed_filter_ucast params; 3279dacd88d6SYuval Mintz int rc; 3280dacd88d6SYuval Mintz 3281dacd88d6SYuval Mintz /* Prepare the unicast filter params */ 3282dacd88d6SYuval Mintz memset(¶ms, 0, sizeof(struct qed_filter_ucast)); 3283dacd88d6SYuval Mintz req = &mbx->req_virt->ucast_filter; 3284dacd88d6SYuval Mintz params.opcode = (enum qed_filter_opcode)req->opcode; 3285dacd88d6SYuval Mintz params.type = (enum qed_filter_ucast_type)req->type; 3286dacd88d6SYuval Mintz 3287dacd88d6SYuval Mintz params.is_rx_filter = 1; 3288dacd88d6SYuval Mintz params.is_tx_filter = 1; 3289dacd88d6SYuval Mintz params.vport_to_remove_from = vf->vport_id; 3290dacd88d6SYuval Mintz params.vport_to_add_to = vf->vport_id; 3291dacd88d6SYuval Mintz memcpy(params.mac, req->mac, ETH_ALEN); 3292dacd88d6SYuval Mintz params.vlan = req->vlan; 3293dacd88d6SYuval Mintz 3294dacd88d6SYuval Mintz DP_VERBOSE(p_hwfn, 3295dacd88d6SYuval Mintz QED_MSG_IOV, 3296dacd88d6SYuval Mintz "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n", 3297dacd88d6SYuval Mintz vf->abs_vf_id, params.opcode, params.type, 3298dacd88d6SYuval Mintz params.is_rx_filter ? "RX" : "", 3299dacd88d6SYuval Mintz params.is_tx_filter ? "TX" : "", 3300dacd88d6SYuval Mintz params.vport_to_add_to, 3301dacd88d6SYuval Mintz params.mac[0], params.mac[1], 3302dacd88d6SYuval Mintz params.mac[2], params.mac[3], 3303dacd88d6SYuval Mintz params.mac[4], params.mac[5], params.vlan); 3304dacd88d6SYuval Mintz 3305dacd88d6SYuval Mintz if (!vf->vport_instance) { 3306dacd88d6SYuval Mintz DP_VERBOSE(p_hwfn, 3307dacd88d6SYuval Mintz QED_MSG_IOV, 3308dacd88d6SYuval Mintz "No VPORT instance available for VF[%d], failing ucast MAC configuration\n", 3309dacd88d6SYuval Mintz vf->abs_vf_id); 3310dacd88d6SYuval Mintz status = PFVF_STATUS_FAILURE; 3311dacd88d6SYuval Mintz goto out; 3312dacd88d6SYuval Mintz } 3313dacd88d6SYuval Mintz 331408feecd7SYuval Mintz /* Update shadow copy of the VF configuration */ 331508feecd7SYuval Mintz if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, ¶ms)) { 331608feecd7SYuval Mintz status = PFVF_STATUS_FAILURE; 331708feecd7SYuval Mintz goto out; 331808feecd7SYuval Mintz } 331908feecd7SYuval Mintz 332008feecd7SYuval Mintz /* Determine if the unicast filtering is acceptible by PF */ 33211a635e48SYuval Mintz if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) && 332208feecd7SYuval Mintz (params.type == QED_FILTER_VLAN || 332308feecd7SYuval Mintz params.type == QED_FILTER_MAC_VLAN)) { 332408feecd7SYuval Mintz /* Once VLAN is forced or PVID is set, do not allow 332508feecd7SYuval Mintz * to add/replace any further VLANs. 332608feecd7SYuval Mintz */ 332708feecd7SYuval Mintz if (params.opcode == QED_FILTER_ADD || 332808feecd7SYuval Mintz params.opcode == QED_FILTER_REPLACE) 332908feecd7SYuval Mintz status = PFVF_STATUS_FORCED; 333008feecd7SYuval Mintz goto out; 333108feecd7SYuval Mintz } 333208feecd7SYuval Mintz 33331a635e48SYuval Mintz if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) && 3334eff16960SYuval Mintz (params.type == QED_FILTER_MAC || 3335eff16960SYuval Mintz params.type == QED_FILTER_MAC_VLAN)) { 3336eff16960SYuval Mintz if (!ether_addr_equal(p_bulletin->mac, params.mac) || 3337eff16960SYuval Mintz (params.opcode != QED_FILTER_ADD && 3338eff16960SYuval Mintz params.opcode != QED_FILTER_REPLACE)) 3339eff16960SYuval Mintz status = PFVF_STATUS_FORCED; 3340eff16960SYuval Mintz goto out; 3341eff16960SYuval Mintz } 3342eff16960SYuval Mintz 3343dacd88d6SYuval Mintz rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, ¶ms); 3344dacd88d6SYuval Mintz if (rc) { 3345dacd88d6SYuval Mintz status = PFVF_STATUS_FAILURE; 3346dacd88d6SYuval Mintz goto out; 3347dacd88d6SYuval Mintz } 3348dacd88d6SYuval Mintz 3349dacd88d6SYuval Mintz rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, ¶ms, 3350dacd88d6SYuval Mintz QED_SPQ_MODE_CB, NULL); 3351dacd88d6SYuval Mintz if (rc) 3352dacd88d6SYuval Mintz status = PFVF_STATUS_FAILURE; 3353dacd88d6SYuval Mintz 3354dacd88d6SYuval Mintz out: 3355dacd88d6SYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER, 3356dacd88d6SYuval Mintz sizeof(struct pfvf_def_resp_tlv), status); 3357dacd88d6SYuval Mintz } 3358dacd88d6SYuval Mintz 33590b55e27dSYuval Mintz static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn, 33600b55e27dSYuval Mintz struct qed_ptt *p_ptt, 33610b55e27dSYuval Mintz struct qed_vf_info *vf) 33620b55e27dSYuval Mintz { 33630b55e27dSYuval Mintz int i; 33640b55e27dSYuval Mintz 33650b55e27dSYuval Mintz /* Reset the SBs */ 33660b55e27dSYuval Mintz for (i = 0; i < vf->num_sbs; i++) 33670b55e27dSYuval Mintz qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, 33680b55e27dSYuval Mintz vf->igu_sbs[i], 33690b55e27dSYuval Mintz vf->opaque_fid, false); 33700b55e27dSYuval Mintz 33710b55e27dSYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP, 33720b55e27dSYuval Mintz sizeof(struct pfvf_def_resp_tlv), 33730b55e27dSYuval Mintz PFVF_STATUS_SUCCESS); 33740b55e27dSYuval Mintz } 33750b55e27dSYuval Mintz 33760b55e27dSYuval Mintz static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn, 33770b55e27dSYuval Mintz struct qed_ptt *p_ptt, struct qed_vf_info *vf) 33780b55e27dSYuval Mintz { 33790b55e27dSYuval Mintz u16 length = sizeof(struct pfvf_def_resp_tlv); 33800b55e27dSYuval Mintz u8 status = PFVF_STATUS_SUCCESS; 33810b55e27dSYuval Mintz 33820b55e27dSYuval Mintz /* Disable Interrupts for VF */ 33830b55e27dSYuval Mintz qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0); 33840b55e27dSYuval Mintz 33850b55e27dSYuval Mintz /* Reset Permission table */ 33860b55e27dSYuval Mintz qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0); 33870b55e27dSYuval Mintz 33880b55e27dSYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE, 33890b55e27dSYuval Mintz length, status); 33900b55e27dSYuval Mintz } 33910b55e27dSYuval Mintz 33920b55e27dSYuval Mintz static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn, 33930b55e27dSYuval Mintz struct qed_ptt *p_ptt, 33940b55e27dSYuval Mintz struct qed_vf_info *p_vf) 33950b55e27dSYuval Mintz { 33960b55e27dSYuval Mintz u16 length = sizeof(struct pfvf_def_resp_tlv); 33971fe614d1SYuval Mintz u8 status = PFVF_STATUS_SUCCESS; 33981fe614d1SYuval Mintz int rc = 0; 33990b55e27dSYuval Mintz 34000b55e27dSYuval Mintz qed_iov_vf_cleanup(p_hwfn, p_vf); 34010b55e27dSYuval Mintz 34021fe614d1SYuval Mintz if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) { 34031fe614d1SYuval Mintz /* Stopping the VF */ 34041fe614d1SYuval Mintz rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid, 34051fe614d1SYuval Mintz p_vf->opaque_fid); 34061fe614d1SYuval Mintz 34071fe614d1SYuval Mintz if (rc) { 34081fe614d1SYuval Mintz DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n", 34091fe614d1SYuval Mintz rc); 34101fe614d1SYuval Mintz status = PFVF_STATUS_FAILURE; 34111fe614d1SYuval Mintz } 34121fe614d1SYuval Mintz 34131fe614d1SYuval Mintz p_vf->state = VF_STOPPED; 34141fe614d1SYuval Mintz } 34151fe614d1SYuval Mintz 34160b55e27dSYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE, 34171fe614d1SYuval Mintz length, status); 34180b55e27dSYuval Mintz } 34190b55e27dSYuval Mintz 3420bf5a94bfSRahul Verma static void qed_iov_vf_pf_get_coalesce(struct qed_hwfn *p_hwfn, 3421bf5a94bfSRahul Verma struct qed_ptt *p_ptt, 3422bf5a94bfSRahul Verma struct qed_vf_info *p_vf) 3423bf5a94bfSRahul Verma { 3424bf5a94bfSRahul Verma struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx; 3425bf5a94bfSRahul Verma struct pfvf_read_coal_resp_tlv *p_resp; 3426bf5a94bfSRahul Verma struct vfpf_read_coal_req_tlv *req; 3427bf5a94bfSRahul Verma u8 status = PFVF_STATUS_FAILURE; 3428bf5a94bfSRahul Verma struct qed_vf_queue *p_queue; 3429bf5a94bfSRahul Verma struct qed_queue_cid *p_cid; 3430bf5a94bfSRahul Verma u16 coal = 0, qid, i; 3431bf5a94bfSRahul Verma bool b_is_rx; 3432bf5a94bfSRahul Verma int rc = 0; 3433bf5a94bfSRahul Verma 3434bf5a94bfSRahul Verma mbx->offset = (u8 *)mbx->reply_virt; 3435bf5a94bfSRahul Verma req = &mbx->req_virt->read_coal_req; 3436bf5a94bfSRahul Verma 3437bf5a94bfSRahul Verma qid = req->qid; 3438bf5a94bfSRahul Verma b_is_rx = req->is_rx ? true : false; 3439bf5a94bfSRahul Verma 3440bf5a94bfSRahul Verma if (b_is_rx) { 3441bf5a94bfSRahul Verma if (!qed_iov_validate_rxq(p_hwfn, p_vf, qid, 3442bf5a94bfSRahul Verma QED_IOV_VALIDATE_Q_ENABLE)) { 3443bf5a94bfSRahul Verma DP_VERBOSE(p_hwfn, QED_MSG_IOV, 3444bf5a94bfSRahul Verma "VF[%d]: Invalid Rx queue_id = %d\n", 3445bf5a94bfSRahul Verma p_vf->abs_vf_id, qid); 3446bf5a94bfSRahul Verma goto send_resp; 3447bf5a94bfSRahul Verma } 3448bf5a94bfSRahul Verma 3449bf5a94bfSRahul Verma p_cid = qed_iov_get_vf_rx_queue_cid(&p_vf->vf_queues[qid]); 3450bf5a94bfSRahul Verma rc = qed_get_rxq_coalesce(p_hwfn, p_ptt, p_cid, &coal); 3451bf5a94bfSRahul Verma if (rc) 3452bf5a94bfSRahul Verma goto send_resp; 3453bf5a94bfSRahul Verma } else { 3454bf5a94bfSRahul Verma if (!qed_iov_validate_txq(p_hwfn, p_vf, qid, 3455bf5a94bfSRahul Verma QED_IOV_VALIDATE_Q_ENABLE)) { 3456bf5a94bfSRahul Verma DP_VERBOSE(p_hwfn, QED_MSG_IOV, 3457bf5a94bfSRahul Verma "VF[%d]: Invalid Tx queue_id = %d\n", 3458bf5a94bfSRahul Verma p_vf->abs_vf_id, qid); 3459bf5a94bfSRahul Verma goto send_resp; 3460bf5a94bfSRahul Verma } 3461bf5a94bfSRahul Verma for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) { 3462bf5a94bfSRahul Verma p_queue = &p_vf->vf_queues[qid]; 3463bf5a94bfSRahul Verma if ((!p_queue->cids[i].p_cid) || 3464bf5a94bfSRahul Verma (!p_queue->cids[i].b_is_tx)) 3465bf5a94bfSRahul Verma continue; 3466bf5a94bfSRahul Verma 3467bf5a94bfSRahul Verma p_cid = p_queue->cids[i].p_cid; 3468bf5a94bfSRahul Verma 3469bf5a94bfSRahul Verma rc = qed_get_txq_coalesce(p_hwfn, p_ptt, p_cid, &coal); 3470bf5a94bfSRahul Verma if (rc) 3471bf5a94bfSRahul Verma goto send_resp; 3472bf5a94bfSRahul Verma break; 3473bf5a94bfSRahul Verma } 3474bf5a94bfSRahul Verma } 3475bf5a94bfSRahul Verma 3476bf5a94bfSRahul Verma status = PFVF_STATUS_SUCCESS; 3477bf5a94bfSRahul Verma 3478bf5a94bfSRahul Verma send_resp: 3479bf5a94bfSRahul Verma p_resp = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_COALESCE_READ, 3480bf5a94bfSRahul Verma sizeof(*p_resp)); 3481bf5a94bfSRahul Verma p_resp->coal = coal; 3482bf5a94bfSRahul Verma 3483bf5a94bfSRahul Verma qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END, 3484bf5a94bfSRahul Verma sizeof(struct channel_list_end_tlv)); 3485bf5a94bfSRahul Verma 3486bf5a94bfSRahul Verma qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status); 3487bf5a94bfSRahul Verma } 3488bf5a94bfSRahul Verma 3489477f2d14SRahul Verma static void qed_iov_vf_pf_set_coalesce(struct qed_hwfn *p_hwfn, 3490477f2d14SRahul Verma struct qed_ptt *p_ptt, 3491477f2d14SRahul Verma struct qed_vf_info *vf) 3492477f2d14SRahul Verma { 3493477f2d14SRahul Verma struct qed_iov_vf_mbx *mbx = &vf->vf_mbx; 3494477f2d14SRahul Verma struct vfpf_update_coalesce *req; 3495477f2d14SRahul Verma u8 status = PFVF_STATUS_FAILURE; 3496477f2d14SRahul Verma struct qed_queue_cid *p_cid; 3497477f2d14SRahul Verma u16 rx_coal, tx_coal; 3498477f2d14SRahul Verma int rc = 0, i; 3499477f2d14SRahul Verma u16 qid; 3500477f2d14SRahul Verma 3501477f2d14SRahul Verma req = &mbx->req_virt->update_coalesce; 3502477f2d14SRahul Verma 3503477f2d14SRahul Verma rx_coal = req->rx_coal; 3504477f2d14SRahul Verma tx_coal = req->tx_coal; 3505477f2d14SRahul Verma qid = req->qid; 3506477f2d14SRahul Verma 3507477f2d14SRahul Verma if (!qed_iov_validate_rxq(p_hwfn, vf, qid, 3508477f2d14SRahul Verma QED_IOV_VALIDATE_Q_ENABLE) && rx_coal) { 3509477f2d14SRahul Verma DP_VERBOSE(p_hwfn, QED_MSG_IOV, 3510477f2d14SRahul Verma "VF[%d]: Invalid Rx queue_id = %d\n", 3511477f2d14SRahul Verma vf->abs_vf_id, qid); 3512477f2d14SRahul Verma goto out; 3513477f2d14SRahul Verma } 3514477f2d14SRahul Verma 3515477f2d14SRahul Verma if (!qed_iov_validate_txq(p_hwfn, vf, qid, 3516477f2d14SRahul Verma QED_IOV_VALIDATE_Q_ENABLE) && tx_coal) { 3517477f2d14SRahul Verma DP_VERBOSE(p_hwfn, QED_MSG_IOV, 3518477f2d14SRahul Verma "VF[%d]: Invalid Tx queue_id = %d\n", 3519477f2d14SRahul Verma vf->abs_vf_id, qid); 3520477f2d14SRahul Verma goto out; 3521477f2d14SRahul Verma } 3522477f2d14SRahul Verma 3523477f2d14SRahul Verma DP_VERBOSE(p_hwfn, 3524477f2d14SRahul Verma QED_MSG_IOV, 3525477f2d14SRahul Verma "VF[%d]: Setting coalesce for VF rx_coal = %d, tx_coal = %d at queue = %d\n", 3526477f2d14SRahul Verma vf->abs_vf_id, rx_coal, tx_coal, qid); 3527477f2d14SRahul Verma 3528477f2d14SRahul Verma if (rx_coal) { 3529477f2d14SRahul Verma p_cid = qed_iov_get_vf_rx_queue_cid(&vf->vf_queues[qid]); 3530477f2d14SRahul Verma 3531477f2d14SRahul Verma rc = qed_set_rxq_coalesce(p_hwfn, p_ptt, rx_coal, p_cid); 3532477f2d14SRahul Verma if (rc) { 3533477f2d14SRahul Verma DP_VERBOSE(p_hwfn, 3534477f2d14SRahul Verma QED_MSG_IOV, 3535477f2d14SRahul Verma "VF[%d]: Unable to set rx queue = %d coalesce\n", 3536477f2d14SRahul Verma vf->abs_vf_id, vf->vf_queues[qid].fw_rx_qid); 3537477f2d14SRahul Verma goto out; 3538477f2d14SRahul Verma } 3539bf5a94bfSRahul Verma vf->rx_coal = rx_coal; 3540477f2d14SRahul Verma } 3541477f2d14SRahul Verma 3542477f2d14SRahul Verma if (tx_coal) { 3543477f2d14SRahul Verma struct qed_vf_queue *p_queue = &vf->vf_queues[qid]; 3544477f2d14SRahul Verma 3545477f2d14SRahul Verma for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) { 3546477f2d14SRahul Verma if (!p_queue->cids[i].p_cid) 3547477f2d14SRahul Verma continue; 3548477f2d14SRahul Verma 3549477f2d14SRahul Verma if (!p_queue->cids[i].b_is_tx) 3550477f2d14SRahul Verma continue; 3551477f2d14SRahul Verma 3552477f2d14SRahul Verma rc = qed_set_txq_coalesce(p_hwfn, p_ptt, tx_coal, 3553477f2d14SRahul Verma p_queue->cids[i].p_cid); 3554477f2d14SRahul Verma 3555477f2d14SRahul Verma if (rc) { 3556477f2d14SRahul Verma DP_VERBOSE(p_hwfn, 3557477f2d14SRahul Verma QED_MSG_IOV, 3558477f2d14SRahul Verma "VF[%d]: Unable to set tx queue coalesce\n", 3559477f2d14SRahul Verma vf->abs_vf_id); 3560477f2d14SRahul Verma goto out; 3561477f2d14SRahul Verma } 3562477f2d14SRahul Verma } 3563bf5a94bfSRahul Verma vf->tx_coal = tx_coal; 3564477f2d14SRahul Verma } 3565477f2d14SRahul Verma 3566477f2d14SRahul Verma status = PFVF_STATUS_SUCCESS; 3567477f2d14SRahul Verma out: 3568477f2d14SRahul Verma qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_COALESCE_UPDATE, 3569477f2d14SRahul Verma sizeof(struct pfvf_def_resp_tlv), status); 3570477f2d14SRahul Verma } 35710b55e27dSYuval Mintz static int 35720b55e27dSYuval Mintz qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn, 35730b55e27dSYuval Mintz struct qed_vf_info *p_vf, struct qed_ptt *p_ptt) 35740b55e27dSYuval Mintz { 35750b55e27dSYuval Mintz int cnt; 35760b55e27dSYuval Mintz u32 val; 35770b55e27dSYuval Mintz 35780b55e27dSYuval Mintz qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid); 35790b55e27dSYuval Mintz 35800b55e27dSYuval Mintz for (cnt = 0; cnt < 50; cnt++) { 35810b55e27dSYuval Mintz val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT); 35820b55e27dSYuval Mintz if (!val) 35830b55e27dSYuval Mintz break; 35840b55e27dSYuval Mintz msleep(20); 35850b55e27dSYuval Mintz } 35860b55e27dSYuval Mintz qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid); 35870b55e27dSYuval Mintz 35880b55e27dSYuval Mintz if (cnt == 50) { 35890b55e27dSYuval Mintz DP_ERR(p_hwfn, 35900b55e27dSYuval Mintz "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n", 35910b55e27dSYuval Mintz p_vf->abs_vf_id, val); 35920b55e27dSYuval Mintz return -EBUSY; 35930b55e27dSYuval Mintz } 35940b55e27dSYuval Mintz 35950b55e27dSYuval Mintz return 0; 35960b55e27dSYuval Mintz } 35970b55e27dSYuval Mintz 35980b55e27dSYuval Mintz static int 35990b55e27dSYuval Mintz qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn, 36000b55e27dSYuval Mintz struct qed_vf_info *p_vf, struct qed_ptt *p_ptt) 36010b55e27dSYuval Mintz { 360221dd79e8STomer Tayar u32 cons[MAX_NUM_VOQS_E4], distance[MAX_NUM_VOQS_E4]; 36030b55e27dSYuval Mintz int i, cnt; 36040b55e27dSYuval Mintz 36050b55e27dSYuval Mintz /* Read initial consumers & producers */ 360621dd79e8STomer Tayar for (i = 0; i < MAX_NUM_VOQS_E4; i++) { 36070b55e27dSYuval Mintz u32 prod; 36080b55e27dSYuval Mintz 36090b55e27dSYuval Mintz cons[i] = qed_rd(p_hwfn, p_ptt, 36100b55e27dSYuval Mintz PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 + 36110b55e27dSYuval Mintz i * 0x40); 36120b55e27dSYuval Mintz prod = qed_rd(p_hwfn, p_ptt, 36130b55e27dSYuval Mintz PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 + 36140b55e27dSYuval Mintz i * 0x40); 36150b55e27dSYuval Mintz distance[i] = prod - cons[i]; 36160b55e27dSYuval Mintz } 36170b55e27dSYuval Mintz 36180b55e27dSYuval Mintz /* Wait for consumers to pass the producers */ 36190b55e27dSYuval Mintz i = 0; 36200b55e27dSYuval Mintz for (cnt = 0; cnt < 50; cnt++) { 362121dd79e8STomer Tayar for (; i < MAX_NUM_VOQS_E4; i++) { 36220b55e27dSYuval Mintz u32 tmp; 36230b55e27dSYuval Mintz 36240b55e27dSYuval Mintz tmp = qed_rd(p_hwfn, p_ptt, 36250b55e27dSYuval Mintz PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 + 36260b55e27dSYuval Mintz i * 0x40); 36270b55e27dSYuval Mintz if (distance[i] > tmp - cons[i]) 36280b55e27dSYuval Mintz break; 36290b55e27dSYuval Mintz } 36300b55e27dSYuval Mintz 363121dd79e8STomer Tayar if (i == MAX_NUM_VOQS_E4) 36320b55e27dSYuval Mintz break; 36330b55e27dSYuval Mintz 36340b55e27dSYuval Mintz msleep(20); 36350b55e27dSYuval Mintz } 36360b55e27dSYuval Mintz 36370b55e27dSYuval Mintz if (cnt == 50) { 36380b55e27dSYuval Mintz DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n", 36390b55e27dSYuval Mintz p_vf->abs_vf_id, i); 36400b55e27dSYuval Mintz return -EBUSY; 36410b55e27dSYuval Mintz } 36420b55e27dSYuval Mintz 36430b55e27dSYuval Mintz return 0; 36440b55e27dSYuval Mintz } 36450b55e27dSYuval Mintz 36460b55e27dSYuval Mintz static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn, 36470b55e27dSYuval Mintz struct qed_vf_info *p_vf, struct qed_ptt *p_ptt) 36480b55e27dSYuval Mintz { 36490b55e27dSYuval Mintz int rc; 36500b55e27dSYuval Mintz 36510b55e27dSYuval Mintz rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt); 36520b55e27dSYuval Mintz if (rc) 36530b55e27dSYuval Mintz return rc; 36540b55e27dSYuval Mintz 36550b55e27dSYuval Mintz rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt); 36560b55e27dSYuval Mintz if (rc) 36570b55e27dSYuval Mintz return rc; 36580b55e27dSYuval Mintz 36590b55e27dSYuval Mintz return 0; 36600b55e27dSYuval Mintz } 36610b55e27dSYuval Mintz 36620b55e27dSYuval Mintz static int 36630b55e27dSYuval Mintz qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn, 36640b55e27dSYuval Mintz struct qed_ptt *p_ptt, 36650b55e27dSYuval Mintz u16 rel_vf_id, u32 *ack_vfs) 36660b55e27dSYuval Mintz { 36670b55e27dSYuval Mintz struct qed_vf_info *p_vf; 36680b55e27dSYuval Mintz int rc = 0; 36690b55e27dSYuval Mintz 36700b55e27dSYuval Mintz p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false); 36710b55e27dSYuval Mintz if (!p_vf) 36720b55e27dSYuval Mintz return 0; 36730b55e27dSYuval Mintz 36740b55e27dSYuval Mintz if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] & 36750b55e27dSYuval Mintz (1ULL << (rel_vf_id % 64))) { 36760b55e27dSYuval Mintz u16 vfid = p_vf->abs_vf_id; 36770b55e27dSYuval Mintz 36780b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 36790b55e27dSYuval Mintz "VF[%d] - Handling FLR\n", vfid); 36800b55e27dSYuval Mintz 36810b55e27dSYuval Mintz qed_iov_vf_cleanup(p_hwfn, p_vf); 36820b55e27dSYuval Mintz 36830b55e27dSYuval Mintz /* If VF isn't active, no need for anything but SW */ 36840b55e27dSYuval Mintz if (!p_vf->b_init) 36850b55e27dSYuval Mintz goto cleanup; 36860b55e27dSYuval Mintz 36870b55e27dSYuval Mintz rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt); 36880b55e27dSYuval Mintz if (rc) 36890b55e27dSYuval Mintz goto cleanup; 36900b55e27dSYuval Mintz 36910b55e27dSYuval Mintz rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true); 36920b55e27dSYuval Mintz if (rc) { 36930b55e27dSYuval Mintz DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid); 36940b55e27dSYuval Mintz return rc; 36950b55e27dSYuval Mintz } 36960b55e27dSYuval Mintz 36977eff82b0SYuval Mintz /* Workaround to make VF-PF channel ready, as FW 36987eff82b0SYuval Mintz * doesn't do that as a part of FLR. 36997eff82b0SYuval Mintz */ 37007eff82b0SYuval Mintz REG_WR(p_hwfn, 37017eff82b0SYuval Mintz GTT_BAR0_MAP_REG_USDM_RAM + 37027eff82b0SYuval Mintz USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1); 37037eff82b0SYuval Mintz 37040b55e27dSYuval Mintz /* VF_STOPPED has to be set only after final cleanup 37050b55e27dSYuval Mintz * but prior to re-enabling the VF. 37060b55e27dSYuval Mintz */ 37070b55e27dSYuval Mintz p_vf->state = VF_STOPPED; 37080b55e27dSYuval Mintz 37090b55e27dSYuval Mintz rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf); 37100b55e27dSYuval Mintz if (rc) { 37110b55e27dSYuval Mintz DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n", 37120b55e27dSYuval Mintz vfid); 37130b55e27dSYuval Mintz return rc; 37140b55e27dSYuval Mintz } 37150b55e27dSYuval Mintz cleanup: 37160b55e27dSYuval Mintz /* Mark VF for ack and clean pending state */ 37170b55e27dSYuval Mintz if (p_vf->state == VF_RESET) 37180b55e27dSYuval Mintz p_vf->state = VF_STOPPED; 37191a635e48SYuval Mintz ack_vfs[vfid / 32] |= BIT((vfid % 32)); 37200b55e27dSYuval Mintz p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &= 37210b55e27dSYuval Mintz ~(1ULL << (rel_vf_id % 64)); 3722fd3c615aSMintz, Yuval p_vf->vf_mbx.b_pending_msg = false; 37230b55e27dSYuval Mintz } 37240b55e27dSYuval Mintz 37250b55e27dSYuval Mintz return rc; 37260b55e27dSYuval Mintz } 37270b55e27dSYuval Mintz 3728ba56947aSBaoyou Xie static int 3729ba56947aSBaoyou Xie qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) 37300b55e27dSYuval Mintz { 37310b55e27dSYuval Mintz u32 ack_vfs[VF_MAX_STATIC / 32]; 37320b55e27dSYuval Mintz int rc = 0; 37330b55e27dSYuval Mintz u16 i; 37340b55e27dSYuval Mintz 37350b55e27dSYuval Mintz memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32)); 37360b55e27dSYuval Mintz 37370b55e27dSYuval Mintz /* Since BRB <-> PRS interface can't be tested as part of the flr 37380b55e27dSYuval Mintz * polling due to HW limitations, simply sleep a bit. And since 37390b55e27dSYuval Mintz * there's no need to wait per-vf, do it before looping. 37400b55e27dSYuval Mintz */ 37410b55e27dSYuval Mintz msleep(100); 37420b55e27dSYuval Mintz 37430b55e27dSYuval Mintz for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) 37440b55e27dSYuval Mintz qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs); 37450b55e27dSYuval Mintz 37460b55e27dSYuval Mintz rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs); 37470b55e27dSYuval Mintz return rc; 37480b55e27dSYuval Mintz } 37490b55e27dSYuval Mintz 3750cccf6f5cSMintz, Yuval bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs) 37510b55e27dSYuval Mintz { 3752cccf6f5cSMintz, Yuval bool found = false; 3753cccf6f5cSMintz, Yuval u16 i; 37540b55e27dSYuval Mintz 37550b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n"); 37560b55e27dSYuval Mintz for (i = 0; i < (VF_MAX_STATIC / 32); i++) 37570b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 37580b55e27dSYuval Mintz "[%08x,...,%08x]: %08x\n", 37590b55e27dSYuval Mintz i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]); 37600b55e27dSYuval Mintz 37610b55e27dSYuval Mintz if (!p_hwfn->cdev->p_iov_info) { 37620b55e27dSYuval Mintz DP_NOTICE(p_hwfn, "VF flr but no IOV\n"); 3763cccf6f5cSMintz, Yuval return false; 37640b55e27dSYuval Mintz } 37650b55e27dSYuval Mintz 37660b55e27dSYuval Mintz /* Mark VFs */ 37670b55e27dSYuval Mintz for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) { 37680b55e27dSYuval Mintz struct qed_vf_info *p_vf; 37690b55e27dSYuval Mintz u8 vfid; 37700b55e27dSYuval Mintz 37710b55e27dSYuval Mintz p_vf = qed_iov_get_vf_info(p_hwfn, i, false); 37720b55e27dSYuval Mintz if (!p_vf) 37730b55e27dSYuval Mintz continue; 37740b55e27dSYuval Mintz 37750b55e27dSYuval Mintz vfid = p_vf->abs_vf_id; 37761a635e48SYuval Mintz if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) { 37770b55e27dSYuval Mintz u64 *p_flr = p_hwfn->pf_iov_info->pending_flr; 37780b55e27dSYuval Mintz u16 rel_vf_id = p_vf->relative_vf_id; 37790b55e27dSYuval Mintz 37800b55e27dSYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 37810b55e27dSYuval Mintz "VF[%d] [rel %d] got FLR-ed\n", 37820b55e27dSYuval Mintz vfid, rel_vf_id); 37830b55e27dSYuval Mintz 37840b55e27dSYuval Mintz p_vf->state = VF_RESET; 37850b55e27dSYuval Mintz 37860b55e27dSYuval Mintz /* No need to lock here, since pending_flr should 37870b55e27dSYuval Mintz * only change here and before ACKing MFw. Since 37880b55e27dSYuval Mintz * MFW will not trigger an additional attention for 37890b55e27dSYuval Mintz * VF flr until ACKs, we're safe. 37900b55e27dSYuval Mintz */ 37910b55e27dSYuval Mintz p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64); 3792cccf6f5cSMintz, Yuval found = true; 37930b55e27dSYuval Mintz } 37940b55e27dSYuval Mintz } 37950b55e27dSYuval Mintz 37960b55e27dSYuval Mintz return found; 37970b55e27dSYuval Mintz } 37980b55e27dSYuval Mintz 379973390ac9SYuval Mintz static void qed_iov_get_link(struct qed_hwfn *p_hwfn, 380073390ac9SYuval Mintz u16 vfid, 380173390ac9SYuval Mintz struct qed_mcp_link_params *p_params, 380273390ac9SYuval Mintz struct qed_mcp_link_state *p_link, 380373390ac9SYuval Mintz struct qed_mcp_link_capabilities *p_caps) 380473390ac9SYuval Mintz { 380573390ac9SYuval Mintz struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn, 380673390ac9SYuval Mintz vfid, 380773390ac9SYuval Mintz false); 380873390ac9SYuval Mintz struct qed_bulletin_content *p_bulletin; 380973390ac9SYuval Mintz 381073390ac9SYuval Mintz if (!p_vf) 381173390ac9SYuval Mintz return; 381273390ac9SYuval Mintz 381373390ac9SYuval Mintz p_bulletin = p_vf->bulletin.p_virt; 381473390ac9SYuval Mintz 381573390ac9SYuval Mintz if (p_params) 381673390ac9SYuval Mintz __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin); 381773390ac9SYuval Mintz if (p_link) 381873390ac9SYuval Mintz __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin); 381973390ac9SYuval Mintz if (p_caps) 382073390ac9SYuval Mintz __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin); 382173390ac9SYuval Mintz } 382273390ac9SYuval Mintz 3823809c45a0SShahed Shaikh static int 3824809c45a0SShahed Shaikh qed_iov_vf_pf_bulletin_update_mac(struct qed_hwfn *p_hwfn, 3825809c45a0SShahed Shaikh struct qed_ptt *p_ptt, 3826809c45a0SShahed Shaikh struct qed_vf_info *p_vf) 3827809c45a0SShahed Shaikh { 3828809c45a0SShahed Shaikh struct qed_bulletin_content *p_bulletin = p_vf->bulletin.p_virt; 3829809c45a0SShahed Shaikh struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx; 3830809c45a0SShahed Shaikh struct vfpf_bulletin_update_mac_tlv *p_req; 3831809c45a0SShahed Shaikh u8 status = PFVF_STATUS_SUCCESS; 3832809c45a0SShahed Shaikh int rc = 0; 3833809c45a0SShahed Shaikh 3834809c45a0SShahed Shaikh if (!p_vf->p_vf_info.is_trusted_configured) { 3835809c45a0SShahed Shaikh DP_VERBOSE(p_hwfn, 3836809c45a0SShahed Shaikh QED_MSG_IOV, 3837809c45a0SShahed Shaikh "Blocking bulletin update request from untrusted VF[%d]\n", 3838809c45a0SShahed Shaikh p_vf->abs_vf_id); 3839809c45a0SShahed Shaikh status = PFVF_STATUS_NOT_SUPPORTED; 3840809c45a0SShahed Shaikh rc = -EINVAL; 3841809c45a0SShahed Shaikh goto send_status; 3842809c45a0SShahed Shaikh } 3843809c45a0SShahed Shaikh 3844809c45a0SShahed Shaikh p_req = &mbx->req_virt->bulletin_update_mac; 3845809c45a0SShahed Shaikh ether_addr_copy(p_bulletin->mac, p_req->mac); 3846809c45a0SShahed Shaikh DP_VERBOSE(p_hwfn, QED_MSG_IOV, 3847809c45a0SShahed Shaikh "Updated bulletin of VF[%d] with requested MAC[%pM]\n", 3848809c45a0SShahed Shaikh p_vf->abs_vf_id, p_req->mac); 3849809c45a0SShahed Shaikh 3850809c45a0SShahed Shaikh send_status: 3851809c45a0SShahed Shaikh qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, 3852809c45a0SShahed Shaikh CHANNEL_TLV_BULLETIN_UPDATE_MAC, 3853809c45a0SShahed Shaikh sizeof(struct pfvf_def_resp_tlv), status); 3854809c45a0SShahed Shaikh return rc; 3855809c45a0SShahed Shaikh } 3856809c45a0SShahed Shaikh 385737bff2b9SYuval Mintz static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn, 385837bff2b9SYuval Mintz struct qed_ptt *p_ptt, int vfid) 385937bff2b9SYuval Mintz { 386037bff2b9SYuval Mintz struct qed_iov_vf_mbx *mbx; 386137bff2b9SYuval Mintz struct qed_vf_info *p_vf; 386237bff2b9SYuval Mintz 386337bff2b9SYuval Mintz p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 386437bff2b9SYuval Mintz if (!p_vf) 386537bff2b9SYuval Mintz return; 386637bff2b9SYuval Mintz 386737bff2b9SYuval Mintz mbx = &p_vf->vf_mbx; 386837bff2b9SYuval Mintz 386937bff2b9SYuval Mintz /* qed_iov_process_mbx_request */ 3870fd3c615aSMintz, Yuval if (!mbx->b_pending_msg) { 3871fd3c615aSMintz, Yuval DP_NOTICE(p_hwfn, 3872fd3c615aSMintz, Yuval "VF[%02x]: Trying to process mailbox message when none is pending\n", 3873fd3c615aSMintz, Yuval p_vf->abs_vf_id); 3874fd3c615aSMintz, Yuval return; 3875fd3c615aSMintz, Yuval } 3876fd3c615aSMintz, Yuval mbx->b_pending_msg = false; 387737bff2b9SYuval Mintz 387837bff2b9SYuval Mintz mbx->first_tlv = mbx->req_virt->first_tlv; 387937bff2b9SYuval Mintz 3880fd3c615aSMintz, Yuval DP_VERBOSE(p_hwfn, QED_MSG_IOV, 3881fd3c615aSMintz, Yuval "VF[%02x]: Processing mailbox message [type %04x]\n", 3882fd3c615aSMintz, Yuval p_vf->abs_vf_id, mbx->first_tlv.tl.type); 3883fd3c615aSMintz, Yuval 388437bff2b9SYuval Mintz /* check if tlv type is known */ 38857eff82b0SYuval Mintz if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) && 38867eff82b0SYuval Mintz !p_vf->b_malicious) { 38871408cc1fSYuval Mintz switch (mbx->first_tlv.tl.type) { 38881408cc1fSYuval Mintz case CHANNEL_TLV_ACQUIRE: 38891408cc1fSYuval Mintz qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf); 38901408cc1fSYuval Mintz break; 3891dacd88d6SYuval Mintz case CHANNEL_TLV_VPORT_START: 3892dacd88d6SYuval Mintz qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf); 3893dacd88d6SYuval Mintz break; 3894dacd88d6SYuval Mintz case CHANNEL_TLV_VPORT_TEARDOWN: 3895dacd88d6SYuval Mintz qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf); 3896dacd88d6SYuval Mintz break; 3897dacd88d6SYuval Mintz case CHANNEL_TLV_START_RXQ: 3898dacd88d6SYuval Mintz qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf); 3899dacd88d6SYuval Mintz break; 3900dacd88d6SYuval Mintz case CHANNEL_TLV_START_TXQ: 3901dacd88d6SYuval Mintz qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf); 3902dacd88d6SYuval Mintz break; 3903dacd88d6SYuval Mintz case CHANNEL_TLV_STOP_RXQS: 3904dacd88d6SYuval Mintz qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf); 3905dacd88d6SYuval Mintz break; 3906dacd88d6SYuval Mintz case CHANNEL_TLV_STOP_TXQS: 3907dacd88d6SYuval Mintz qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf); 3908dacd88d6SYuval Mintz break; 390917b235c1SYuval Mintz case CHANNEL_TLV_UPDATE_RXQ: 391017b235c1SYuval Mintz qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf); 391117b235c1SYuval Mintz break; 3912dacd88d6SYuval Mintz case CHANNEL_TLV_VPORT_UPDATE: 3913dacd88d6SYuval Mintz qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf); 3914dacd88d6SYuval Mintz break; 3915dacd88d6SYuval Mintz case CHANNEL_TLV_UCAST_FILTER: 3916dacd88d6SYuval Mintz qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf); 3917dacd88d6SYuval Mintz break; 39180b55e27dSYuval Mintz case CHANNEL_TLV_CLOSE: 39190b55e27dSYuval Mintz qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf); 39200b55e27dSYuval Mintz break; 39210b55e27dSYuval Mintz case CHANNEL_TLV_INT_CLEANUP: 39220b55e27dSYuval Mintz qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf); 39230b55e27dSYuval Mintz break; 39240b55e27dSYuval Mintz case CHANNEL_TLV_RELEASE: 39250b55e27dSYuval Mintz qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf); 39260b55e27dSYuval Mintz break; 3927eaf3c0c6SChopra, Manish case CHANNEL_TLV_UPDATE_TUNN_PARAM: 3928eaf3c0c6SChopra, Manish qed_iov_vf_mbx_update_tunn_param(p_hwfn, p_ptt, p_vf); 3929eaf3c0c6SChopra, Manish break; 3930477f2d14SRahul Verma case CHANNEL_TLV_COALESCE_UPDATE: 3931477f2d14SRahul Verma qed_iov_vf_pf_set_coalesce(p_hwfn, p_ptt, p_vf); 3932477f2d14SRahul Verma break; 3933bf5a94bfSRahul Verma case CHANNEL_TLV_COALESCE_READ: 3934bf5a94bfSRahul Verma qed_iov_vf_pf_get_coalesce(p_hwfn, p_ptt, p_vf); 3935bf5a94bfSRahul Verma break; 3936809c45a0SShahed Shaikh case CHANNEL_TLV_BULLETIN_UPDATE_MAC: 3937809c45a0SShahed Shaikh qed_iov_vf_pf_bulletin_update_mac(p_hwfn, p_ptt, p_vf); 3938809c45a0SShahed Shaikh break; 39391408cc1fSYuval Mintz } 39407eff82b0SYuval Mintz } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) { 39417eff82b0SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 39427eff82b0SYuval Mintz "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n", 39437eff82b0SYuval Mintz p_vf->abs_vf_id, mbx->first_tlv.tl.type); 39447eff82b0SYuval Mintz 39457eff82b0SYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, 39467eff82b0SYuval Mintz mbx->first_tlv.tl.type, 39477eff82b0SYuval Mintz sizeof(struct pfvf_def_resp_tlv), 39487eff82b0SYuval Mintz PFVF_STATUS_MALICIOUS); 394937bff2b9SYuval Mintz } else { 395037bff2b9SYuval Mintz /* unknown TLV - this may belong to a VF driver from the future 395137bff2b9SYuval Mintz * - a version written after this PF driver was written, which 395237bff2b9SYuval Mintz * supports features unknown as of yet. Too bad since we don't 395337bff2b9SYuval Mintz * support them. Or this may be because someone wrote a crappy 395437bff2b9SYuval Mintz * VF driver and is sending garbage over the channel. 395537bff2b9SYuval Mintz */ 395654fdd80fSYuval Mintz DP_NOTICE(p_hwfn, 395754fdd80fSYuval Mintz "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n", 395854fdd80fSYuval Mintz p_vf->abs_vf_id, 395954fdd80fSYuval Mintz mbx->first_tlv.tl.type, 396054fdd80fSYuval Mintz mbx->first_tlv.tl.length, 396154fdd80fSYuval Mintz mbx->first_tlv.padding, mbx->first_tlv.reply_address); 396237bff2b9SYuval Mintz 396354fdd80fSYuval Mintz /* Try replying in case reply address matches the acquisition's 396454fdd80fSYuval Mintz * posted address. 396554fdd80fSYuval Mintz */ 396654fdd80fSYuval Mintz if (p_vf->acquire.first_tlv.reply_address && 396754fdd80fSYuval Mintz (mbx->first_tlv.reply_address == 396854fdd80fSYuval Mintz p_vf->acquire.first_tlv.reply_address)) { 396954fdd80fSYuval Mintz qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, 397054fdd80fSYuval Mintz mbx->first_tlv.tl.type, 397154fdd80fSYuval Mintz sizeof(struct pfvf_def_resp_tlv), 397254fdd80fSYuval Mintz PFVF_STATUS_NOT_SUPPORTED); 397354fdd80fSYuval Mintz } else { 397437bff2b9SYuval Mintz DP_VERBOSE(p_hwfn, 397537bff2b9SYuval Mintz QED_MSG_IOV, 397654fdd80fSYuval Mintz "VF[%02x]: Can't respond to TLV - no valid reply address\n", 397754fdd80fSYuval Mintz p_vf->abs_vf_id); 397837bff2b9SYuval Mintz } 397937bff2b9SYuval Mintz } 398037bff2b9SYuval Mintz } 398137bff2b9SYuval Mintz 3982fd3c615aSMintz, Yuval void qed_iov_pf_get_pending_events(struct qed_hwfn *p_hwfn, u64 *events) 398337bff2b9SYuval Mintz { 3984fd3c615aSMintz, Yuval int i; 398537bff2b9SYuval Mintz 3986fd3c615aSMintz, Yuval memset(events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH); 3987fd3c615aSMintz, Yuval 3988fd3c615aSMintz, Yuval qed_for_each_vf(p_hwfn, i) { 3989fd3c615aSMintz, Yuval struct qed_vf_info *p_vf; 3990fd3c615aSMintz, Yuval 3991fd3c615aSMintz, Yuval p_vf = &p_hwfn->pf_iov_info->vfs_array[i]; 3992fd3c615aSMintz, Yuval if (p_vf->vf_mbx.b_pending_msg) 3993fd3c615aSMintz, Yuval events[i / 64] |= 1ULL << (i % 64); 399437bff2b9SYuval Mintz } 399537bff2b9SYuval Mintz } 399637bff2b9SYuval Mintz 39977eff82b0SYuval Mintz static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn, 39987eff82b0SYuval Mintz u16 abs_vfid) 39997eff82b0SYuval Mintz { 40007eff82b0SYuval Mintz u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf; 40017eff82b0SYuval Mintz 40027eff82b0SYuval Mintz if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) { 40037eff82b0SYuval Mintz DP_VERBOSE(p_hwfn, 40047eff82b0SYuval Mintz QED_MSG_IOV, 40057eff82b0SYuval Mintz "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n", 40067eff82b0SYuval Mintz abs_vfid); 40077eff82b0SYuval Mintz return NULL; 40087eff82b0SYuval Mintz } 40097eff82b0SYuval Mintz 40107eff82b0SYuval Mintz return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min]; 40117eff82b0SYuval Mintz } 40127eff82b0SYuval Mintz 401337bff2b9SYuval Mintz static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn, 401437bff2b9SYuval Mintz u16 abs_vfid, struct regpair *vf_msg) 401537bff2b9SYuval Mintz { 40167eff82b0SYuval Mintz struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn, 401737bff2b9SYuval Mintz abs_vfid); 40187eff82b0SYuval Mintz 40197eff82b0SYuval Mintz if (!p_vf) 402037bff2b9SYuval Mintz return 0; 402137bff2b9SYuval Mintz 402237bff2b9SYuval Mintz /* List the physical address of the request so that handler 402337bff2b9SYuval Mintz * could later on copy the message from it. 402437bff2b9SYuval Mintz */ 402537bff2b9SYuval Mintz p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo; 402637bff2b9SYuval Mintz 402737bff2b9SYuval Mintz /* Mark the event and schedule the workqueue */ 4028fd3c615aSMintz, Yuval p_vf->vf_mbx.b_pending_msg = true; 402937bff2b9SYuval Mintz qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG); 403037bff2b9SYuval Mintz 403137bff2b9SYuval Mintz return 0; 403237bff2b9SYuval Mintz } 403337bff2b9SYuval Mintz 40347eff82b0SYuval Mintz static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn, 40357eff82b0SYuval Mintz struct malicious_vf_eqe_data *p_data) 40367eff82b0SYuval Mintz { 40377eff82b0SYuval Mintz struct qed_vf_info *p_vf; 40387eff82b0SYuval Mintz 40397eff82b0SYuval Mintz p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id); 40407eff82b0SYuval Mintz 40417eff82b0SYuval Mintz if (!p_vf) 40427eff82b0SYuval Mintz return; 40437eff82b0SYuval Mintz 4044e99a21cbSMintz, Yuval if (!p_vf->b_malicious) { 4045e99a21cbSMintz, Yuval DP_NOTICE(p_hwfn, 40467eff82b0SYuval Mintz "VF [%d] - Malicious behavior [%02x]\n", 40477eff82b0SYuval Mintz p_vf->abs_vf_id, p_data->err_id); 40487eff82b0SYuval Mintz 40497eff82b0SYuval Mintz p_vf->b_malicious = true; 4050e99a21cbSMintz, Yuval } else { 4051e99a21cbSMintz, Yuval DP_INFO(p_hwfn, 4052e99a21cbSMintz, Yuval "VF [%d] - Malicious behavior [%02x]\n", 4053e99a21cbSMintz, Yuval p_vf->abs_vf_id, p_data->err_id); 4054e99a21cbSMintz, Yuval } 40557eff82b0SYuval Mintz } 40567eff82b0SYuval Mintz 40576c9e80eaSMichal Kalderon static int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn, 40586c9e80eaSMichal Kalderon u8 opcode, 40596c9e80eaSMichal Kalderon __le16 echo, 40606c9e80eaSMichal Kalderon union event_ring_data *data, u8 fw_return_code) 406137bff2b9SYuval Mintz { 406237bff2b9SYuval Mintz switch (opcode) { 406337bff2b9SYuval Mintz case COMMON_EVENT_VF_PF_CHANNEL: 406437bff2b9SYuval Mintz return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo), 406537bff2b9SYuval Mintz &data->vf_pf_channel.msg_addr); 40667eff82b0SYuval Mintz case COMMON_EVENT_MALICIOUS_VF: 40677eff82b0SYuval Mintz qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf); 40687eff82b0SYuval Mintz return 0; 406937bff2b9SYuval Mintz default: 407037bff2b9SYuval Mintz DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n", 407137bff2b9SYuval Mintz opcode); 407237bff2b9SYuval Mintz return -EINVAL; 407337bff2b9SYuval Mintz } 407437bff2b9SYuval Mintz } 407537bff2b9SYuval Mintz 407632a47e72SYuval Mintz u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id) 407732a47e72SYuval Mintz { 407832a47e72SYuval Mintz struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info; 407932a47e72SYuval Mintz u16 i; 408032a47e72SYuval Mintz 408132a47e72SYuval Mintz if (!p_iov) 408232a47e72SYuval Mintz goto out; 408332a47e72SYuval Mintz 408432a47e72SYuval Mintz for (i = rel_vf_id; i < p_iov->total_vfs; i++) 40857eff82b0SYuval Mintz if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false)) 408632a47e72SYuval Mintz return i; 408732a47e72SYuval Mintz 408832a47e72SYuval Mintz out: 408932a47e72SYuval Mintz return MAX_NUM_VFS; 409032a47e72SYuval Mintz } 409137bff2b9SYuval Mintz 409237bff2b9SYuval Mintz static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt, 409337bff2b9SYuval Mintz int vfid) 409437bff2b9SYuval Mintz { 409537bff2b9SYuval Mintz struct qed_dmae_params params; 409637bff2b9SYuval Mintz struct qed_vf_info *vf_info; 409737bff2b9SYuval Mintz 409837bff2b9SYuval Mintz vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 409937bff2b9SYuval Mintz if (!vf_info) 410037bff2b9SYuval Mintz return -EINVAL; 410137bff2b9SYuval Mintz 410237bff2b9SYuval Mintz memset(¶ms, 0, sizeof(struct qed_dmae_params)); 410337bff2b9SYuval Mintz params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST; 410437bff2b9SYuval Mintz params.src_vfid = vf_info->abs_vf_id; 410537bff2b9SYuval Mintz 410637bff2b9SYuval Mintz if (qed_dmae_host2host(p_hwfn, ptt, 410737bff2b9SYuval Mintz vf_info->vf_mbx.pending_req, 410837bff2b9SYuval Mintz vf_info->vf_mbx.req_phys, 410937bff2b9SYuval Mintz sizeof(union vfpf_tlvs) / 4, ¶ms)) { 411037bff2b9SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_IOV, 411137bff2b9SYuval Mintz "Failed to copy message from VF 0x%02x\n", vfid); 411237bff2b9SYuval Mintz 411337bff2b9SYuval Mintz return -EIO; 411437bff2b9SYuval Mintz } 411537bff2b9SYuval Mintz 411637bff2b9SYuval Mintz return 0; 411737bff2b9SYuval Mintz } 411837bff2b9SYuval Mintz 4119eff16960SYuval Mintz static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn, 4120eff16960SYuval Mintz u8 *mac, int vfid) 4121eff16960SYuval Mintz { 4122eff16960SYuval Mintz struct qed_vf_info *vf_info; 4123eff16960SYuval Mintz u64 feature; 4124eff16960SYuval Mintz 4125eff16960SYuval Mintz vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true); 4126eff16960SYuval Mintz if (!vf_info) { 4127eff16960SYuval Mintz DP_NOTICE(p_hwfn->cdev, 4128eff16960SYuval Mintz "Can not set forced MAC, invalid vfid [%d]\n", vfid); 4129eff16960SYuval Mintz return; 4130eff16960SYuval Mintz } 4131eff16960SYuval Mintz 41327eff82b0SYuval Mintz if (vf_info->b_malicious) { 41337eff82b0SYuval Mintz DP_NOTICE(p_hwfn->cdev, 41347eff82b0SYuval Mintz "Can't set forced MAC to malicious VF [%d]\n", vfid); 41357eff82b0SYuval Mintz return; 41367eff82b0SYuval Mintz } 41377eff82b0SYuval Mintz 41387425d822SShahed Shaikh if (vf_info->p_vf_info.is_trusted_configured) { 41397425d822SShahed Shaikh feature = BIT(VFPF_BULLETIN_MAC_ADDR); 41407425d822SShahed Shaikh /* Trust mode will disable Forced MAC */ 41417425d822SShahed Shaikh vf_info->bulletin.p_virt->valid_bitmap &= 41427425d822SShahed Shaikh ~BIT(MAC_ADDR_FORCED); 41437425d822SShahed Shaikh } else { 41447425d822SShahed Shaikh feature = BIT(MAC_ADDR_FORCED); 41457425d822SShahed Shaikh /* Forced MAC will disable MAC_ADDR */ 41467425d822SShahed Shaikh vf_info->bulletin.p_virt->valid_bitmap &= 41477425d822SShahed Shaikh ~BIT(VFPF_BULLETIN_MAC_ADDR); 41487425d822SShahed Shaikh } 41497425d822SShahed Shaikh 4150eff16960SYuval Mintz memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN); 4151eff16960SYuval Mintz 4152eff16960SYuval Mintz vf_info->bulletin.p_virt->valid_bitmap |= feature; 4153eff16960SYuval Mintz 4154eff16960SYuval Mintz qed_iov_configure_vport_forced(p_hwfn, vf_info, feature); 4155eff16960SYuval Mintz } 4156eff16960SYuval Mintz 41577425d822SShahed Shaikh static int qed_iov_bulletin_set_mac(struct qed_hwfn *p_hwfn, u8 *mac, int vfid) 41587425d822SShahed Shaikh { 41597425d822SShahed Shaikh struct qed_vf_info *vf_info; 41607425d822SShahed Shaikh u64 feature; 41617425d822SShahed Shaikh 41627425d822SShahed Shaikh vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true); 41637425d822SShahed Shaikh if (!vf_info) { 41647425d822SShahed Shaikh DP_NOTICE(p_hwfn->cdev, "Can not set MAC, invalid vfid [%d]\n", 41657425d822SShahed Shaikh vfid); 41667425d822SShahed Shaikh return -EINVAL; 41677425d822SShahed Shaikh } 41687425d822SShahed Shaikh 41697425d822SShahed Shaikh if (vf_info->b_malicious) { 41707425d822SShahed Shaikh DP_NOTICE(p_hwfn->cdev, "Can't set MAC to malicious VF [%d]\n", 41717425d822SShahed Shaikh vfid); 41727425d822SShahed Shaikh return -EINVAL; 41737425d822SShahed Shaikh } 41747425d822SShahed Shaikh 41757425d822SShahed Shaikh if (vf_info->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)) { 41767425d822SShahed Shaikh DP_VERBOSE(p_hwfn, QED_MSG_IOV, 41777425d822SShahed Shaikh "Can not set MAC, Forced MAC is configured\n"); 41787425d822SShahed Shaikh return -EINVAL; 41797425d822SShahed Shaikh } 41807425d822SShahed Shaikh 41817425d822SShahed Shaikh feature = BIT(VFPF_BULLETIN_MAC_ADDR); 41827425d822SShahed Shaikh ether_addr_copy(vf_info->bulletin.p_virt->mac, mac); 41837425d822SShahed Shaikh 41847425d822SShahed Shaikh vf_info->bulletin.p_virt->valid_bitmap |= feature; 41857425d822SShahed Shaikh 41867425d822SShahed Shaikh if (vf_info->p_vf_info.is_trusted_configured) 41877425d822SShahed Shaikh qed_iov_configure_vport_forced(p_hwfn, vf_info, feature); 41887425d822SShahed Shaikh 41897425d822SShahed Shaikh return 0; 41907425d822SShahed Shaikh } 41917425d822SShahed Shaikh 4192ba56947aSBaoyou Xie static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn, 419308feecd7SYuval Mintz u16 pvid, int vfid) 419408feecd7SYuval Mintz { 419508feecd7SYuval Mintz struct qed_vf_info *vf_info; 419608feecd7SYuval Mintz u64 feature; 419708feecd7SYuval Mintz 419808feecd7SYuval Mintz vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 419908feecd7SYuval Mintz if (!vf_info) { 420008feecd7SYuval Mintz DP_NOTICE(p_hwfn->cdev, 420108feecd7SYuval Mintz "Can not set forced MAC, invalid vfid [%d]\n", vfid); 420208feecd7SYuval Mintz return; 420308feecd7SYuval Mintz } 420408feecd7SYuval Mintz 42057eff82b0SYuval Mintz if (vf_info->b_malicious) { 42067eff82b0SYuval Mintz DP_NOTICE(p_hwfn->cdev, 42077eff82b0SYuval Mintz "Can't set forced vlan to malicious VF [%d]\n", vfid); 42087eff82b0SYuval Mintz return; 42097eff82b0SYuval Mintz } 42107eff82b0SYuval Mintz 421108feecd7SYuval Mintz feature = 1 << VLAN_ADDR_FORCED; 421208feecd7SYuval Mintz vf_info->bulletin.p_virt->pvid = pvid; 421308feecd7SYuval Mintz if (pvid) 421408feecd7SYuval Mintz vf_info->bulletin.p_virt->valid_bitmap |= feature; 421508feecd7SYuval Mintz else 421608feecd7SYuval Mintz vf_info->bulletin.p_virt->valid_bitmap &= ~feature; 421708feecd7SYuval Mintz 421808feecd7SYuval Mintz qed_iov_configure_vport_forced(p_hwfn, vf_info, feature); 421908feecd7SYuval Mintz } 422008feecd7SYuval Mintz 422197379f15SChopra, Manish void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn, 422297379f15SChopra, Manish int vfid, u16 vxlan_port, u16 geneve_port) 422397379f15SChopra, Manish { 422497379f15SChopra, Manish struct qed_vf_info *vf_info; 422597379f15SChopra, Manish 422697379f15SChopra, Manish vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true); 422797379f15SChopra, Manish if (!vf_info) { 422897379f15SChopra, Manish DP_NOTICE(p_hwfn->cdev, 422997379f15SChopra, Manish "Can not set udp ports, invalid vfid [%d]\n", vfid); 423097379f15SChopra, Manish return; 423197379f15SChopra, Manish } 423297379f15SChopra, Manish 423397379f15SChopra, Manish if (vf_info->b_malicious) { 423497379f15SChopra, Manish DP_VERBOSE(p_hwfn, QED_MSG_IOV, 423597379f15SChopra, Manish "Can not set udp ports to malicious VF [%d]\n", 423697379f15SChopra, Manish vfid); 423797379f15SChopra, Manish return; 423897379f15SChopra, Manish } 423997379f15SChopra, Manish 424097379f15SChopra, Manish vf_info->bulletin.p_virt->vxlan_udp_port = vxlan_port; 424197379f15SChopra, Manish vf_info->bulletin.p_virt->geneve_udp_port = geneve_port; 424297379f15SChopra, Manish } 424397379f15SChopra, Manish 42446ddc7608SYuval Mintz static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid) 42456ddc7608SYuval Mintz { 42466ddc7608SYuval Mintz struct qed_vf_info *p_vf_info; 42476ddc7608SYuval Mintz 42486ddc7608SYuval Mintz p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 42496ddc7608SYuval Mintz if (!p_vf_info) 42506ddc7608SYuval Mintz return false; 42516ddc7608SYuval Mintz 42526ddc7608SYuval Mintz return !!p_vf_info->vport_instance; 42536ddc7608SYuval Mintz } 42546ddc7608SYuval Mintz 4255ba56947aSBaoyou Xie static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid) 42560b55e27dSYuval Mintz { 42570b55e27dSYuval Mintz struct qed_vf_info *p_vf_info; 42580b55e27dSYuval Mintz 42590b55e27dSYuval Mintz p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 42600b55e27dSYuval Mintz if (!p_vf_info) 42610b55e27dSYuval Mintz return true; 42620b55e27dSYuval Mintz 42630b55e27dSYuval Mintz return p_vf_info->state == VF_STOPPED; 42640b55e27dSYuval Mintz } 42650b55e27dSYuval Mintz 426673390ac9SYuval Mintz static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid) 426773390ac9SYuval Mintz { 426873390ac9SYuval Mintz struct qed_vf_info *vf_info; 426973390ac9SYuval Mintz 427073390ac9SYuval Mintz vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 427173390ac9SYuval Mintz if (!vf_info) 427273390ac9SYuval Mintz return false; 427373390ac9SYuval Mintz 427473390ac9SYuval Mintz return vf_info->spoof_chk; 427573390ac9SYuval Mintz } 427673390ac9SYuval Mintz 4277ba56947aSBaoyou Xie static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val) 42786ddc7608SYuval Mintz { 42796ddc7608SYuval Mintz struct qed_vf_info *vf; 42806ddc7608SYuval Mintz int rc = -EINVAL; 42816ddc7608SYuval Mintz 42826ddc7608SYuval Mintz if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) { 42836ddc7608SYuval Mintz DP_NOTICE(p_hwfn, 42846ddc7608SYuval Mintz "SR-IOV sanity check failed, can't set spoofchk\n"); 42856ddc7608SYuval Mintz goto out; 42866ddc7608SYuval Mintz } 42876ddc7608SYuval Mintz 42886ddc7608SYuval Mintz vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 42896ddc7608SYuval Mintz if (!vf) 42906ddc7608SYuval Mintz goto out; 42916ddc7608SYuval Mintz 42926ddc7608SYuval Mintz if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) { 42936ddc7608SYuval Mintz /* After VF VPORT start PF will configure spoof check */ 42946ddc7608SYuval Mintz vf->req_spoofchk_val = val; 42956ddc7608SYuval Mintz rc = 0; 42966ddc7608SYuval Mintz goto out; 42976ddc7608SYuval Mintz } 42986ddc7608SYuval Mintz 42996ddc7608SYuval Mintz rc = __qed_iov_spoofchk_set(p_hwfn, vf, val); 43006ddc7608SYuval Mintz 43016ddc7608SYuval Mintz out: 43026ddc7608SYuval Mintz return rc; 43036ddc7608SYuval Mintz } 43046ddc7608SYuval Mintz 43057425d822SShahed Shaikh static u8 *qed_iov_bulletin_get_mac(struct qed_hwfn *p_hwfn, u16 rel_vf_id) 43067425d822SShahed Shaikh { 43077425d822SShahed Shaikh struct qed_vf_info *p_vf; 43087425d822SShahed Shaikh 43097425d822SShahed Shaikh p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true); 43107425d822SShahed Shaikh if (!p_vf || !p_vf->bulletin.p_virt) 43117425d822SShahed Shaikh return NULL; 43127425d822SShahed Shaikh 43137425d822SShahed Shaikh if (!(p_vf->bulletin.p_virt->valid_bitmap & 43147425d822SShahed Shaikh BIT(VFPF_BULLETIN_MAC_ADDR))) 43157425d822SShahed Shaikh return NULL; 43167425d822SShahed Shaikh 43177425d822SShahed Shaikh return p_vf->bulletin.p_virt->mac; 43187425d822SShahed Shaikh } 43197425d822SShahed Shaikh 4320eff16960SYuval Mintz static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn, 4321eff16960SYuval Mintz u16 rel_vf_id) 4322eff16960SYuval Mintz { 4323eff16960SYuval Mintz struct qed_vf_info *p_vf; 4324eff16960SYuval Mintz 4325eff16960SYuval Mintz p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true); 4326eff16960SYuval Mintz if (!p_vf || !p_vf->bulletin.p_virt) 4327eff16960SYuval Mintz return NULL; 4328eff16960SYuval Mintz 43291a635e48SYuval Mintz if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))) 4330eff16960SYuval Mintz return NULL; 4331eff16960SYuval Mintz 4332eff16960SYuval Mintz return p_vf->bulletin.p_virt->mac; 4333eff16960SYuval Mintz } 4334eff16960SYuval Mintz 4335ba56947aSBaoyou Xie static u16 4336ba56947aSBaoyou Xie qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id) 433708feecd7SYuval Mintz { 433808feecd7SYuval Mintz struct qed_vf_info *p_vf; 433908feecd7SYuval Mintz 434008feecd7SYuval Mintz p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true); 434108feecd7SYuval Mintz if (!p_vf || !p_vf->bulletin.p_virt) 434208feecd7SYuval Mintz return 0; 434308feecd7SYuval Mintz 43441a635e48SYuval Mintz if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))) 434508feecd7SYuval Mintz return 0; 434608feecd7SYuval Mintz 434708feecd7SYuval Mintz return p_vf->bulletin.p_virt->pvid; 434808feecd7SYuval Mintz } 434908feecd7SYuval Mintz 4350733def6aSYuval Mintz static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn, 4351733def6aSYuval Mintz struct qed_ptt *p_ptt, int vfid, int val) 4352733def6aSYuval Mintz { 4353da090917STomer Tayar struct qed_mcp_link_state *p_link; 4354733def6aSYuval Mintz struct qed_vf_info *vf; 4355733def6aSYuval Mintz u8 abs_vp_id = 0; 4356733def6aSYuval Mintz int rc; 4357733def6aSYuval Mintz 4358733def6aSYuval Mintz vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true); 4359733def6aSYuval Mintz if (!vf) 4360733def6aSYuval Mintz return -EINVAL; 4361733def6aSYuval Mintz 4362733def6aSYuval Mintz rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id); 4363733def6aSYuval Mintz if (rc) 4364733def6aSYuval Mintz return rc; 4365733def6aSYuval Mintz 4366da090917STomer Tayar p_link = &QED_LEADING_HWFN(p_hwfn->cdev)->mcp_info->link_output; 4367da090917STomer Tayar 4368da090917STomer Tayar return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val, 4369da090917STomer Tayar p_link->speed); 4370733def6aSYuval Mintz } 4371733def6aSYuval Mintz 4372ba56947aSBaoyou Xie static int 4373ba56947aSBaoyou Xie qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate) 4374733def6aSYuval Mintz { 4375733def6aSYuval Mintz struct qed_vf_info *vf; 4376733def6aSYuval Mintz u8 vport_id; 4377733def6aSYuval Mintz int i; 4378733def6aSYuval Mintz 4379733def6aSYuval Mintz for_each_hwfn(cdev, i) { 4380733def6aSYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 4381733def6aSYuval Mintz 4382733def6aSYuval Mintz if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) { 4383733def6aSYuval Mintz DP_NOTICE(p_hwfn, 4384733def6aSYuval Mintz "SR-IOV sanity check failed, can't set min rate\n"); 4385733def6aSYuval Mintz return -EINVAL; 4386733def6aSYuval Mintz } 4387733def6aSYuval Mintz } 4388733def6aSYuval Mintz 4389733def6aSYuval Mintz vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true); 4390733def6aSYuval Mintz vport_id = vf->vport_id; 4391733def6aSYuval Mintz 4392733def6aSYuval Mintz return qed_configure_vport_wfq(cdev, vport_id, rate); 4393733def6aSYuval Mintz } 4394733def6aSYuval Mintz 439573390ac9SYuval Mintz static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid) 439673390ac9SYuval Mintz { 439773390ac9SYuval Mintz struct qed_wfq_data *vf_vp_wfq; 439873390ac9SYuval Mintz struct qed_vf_info *vf_info; 439973390ac9SYuval Mintz 440073390ac9SYuval Mintz vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true); 440173390ac9SYuval Mintz if (!vf_info) 440273390ac9SYuval Mintz return 0; 440373390ac9SYuval Mintz 440473390ac9SYuval Mintz vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id]; 440573390ac9SYuval Mintz 440673390ac9SYuval Mintz if (vf_vp_wfq->configured) 440773390ac9SYuval Mintz return vf_vp_wfq->min_speed; 440873390ac9SYuval Mintz else 440973390ac9SYuval Mintz return 0; 441073390ac9SYuval Mintz } 441173390ac9SYuval Mintz 441237bff2b9SYuval Mintz /** 441337bff2b9SYuval Mintz * qed_schedule_iov - schedules IOV task for VF and PF 441437bff2b9SYuval Mintz * @hwfn: hardware function pointer 441537bff2b9SYuval Mintz * @flag: IOV flag for VF/PF 441637bff2b9SYuval Mintz */ 441737bff2b9SYuval Mintz void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag) 441837bff2b9SYuval Mintz { 441937bff2b9SYuval Mintz smp_mb__before_atomic(); 442037bff2b9SYuval Mintz set_bit(flag, &hwfn->iov_task_flags); 442137bff2b9SYuval Mintz smp_mb__after_atomic(); 442237bff2b9SYuval Mintz DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag); 442337bff2b9SYuval Mintz queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0); 442437bff2b9SYuval Mintz } 442537bff2b9SYuval Mintz 44261408cc1fSYuval Mintz void qed_vf_start_iov_wq(struct qed_dev *cdev) 44271408cc1fSYuval Mintz { 44281408cc1fSYuval Mintz int i; 44291408cc1fSYuval Mintz 44301408cc1fSYuval Mintz for_each_hwfn(cdev, i) 44311408cc1fSYuval Mintz queue_delayed_work(cdev->hwfns[i].iov_wq, 44321408cc1fSYuval Mintz &cdev->hwfns[i].iov_task, 0); 44331408cc1fSYuval Mintz } 44341408cc1fSYuval Mintz 44350b55e27dSYuval Mintz int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled) 44360b55e27dSYuval Mintz { 44370b55e27dSYuval Mintz int i, j; 44380b55e27dSYuval Mintz 44390b55e27dSYuval Mintz for_each_hwfn(cdev, i) 44400b55e27dSYuval Mintz if (cdev->hwfns[i].iov_wq) 44410b55e27dSYuval Mintz flush_workqueue(cdev->hwfns[i].iov_wq); 44420b55e27dSYuval Mintz 44430b55e27dSYuval Mintz /* Mark VFs for disablement */ 44440b55e27dSYuval Mintz qed_iov_set_vfs_to_disable(cdev, true); 44450b55e27dSYuval Mintz 44460b55e27dSYuval Mintz if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled) 44470b55e27dSYuval Mintz pci_disable_sriov(cdev->pdev); 44480b55e27dSYuval Mintz 44490b55e27dSYuval Mintz for_each_hwfn(cdev, i) { 44500b55e27dSYuval Mintz struct qed_hwfn *hwfn = &cdev->hwfns[i]; 44510b55e27dSYuval Mintz struct qed_ptt *ptt = qed_ptt_acquire(hwfn); 44520b55e27dSYuval Mintz 44530b55e27dSYuval Mintz /* Failure to acquire the ptt in 100g creates an odd error 44540b55e27dSYuval Mintz * where the first engine has already relased IOV. 44550b55e27dSYuval Mintz */ 44560b55e27dSYuval Mintz if (!ptt) { 44570b55e27dSYuval Mintz DP_ERR(hwfn, "Failed to acquire ptt\n"); 44580b55e27dSYuval Mintz return -EBUSY; 44590b55e27dSYuval Mintz } 44600b55e27dSYuval Mintz 4461733def6aSYuval Mintz /* Clean WFQ db and configure equal weight for all vports */ 4462733def6aSYuval Mintz qed_clean_wfq_db(hwfn, ptt); 4463733def6aSYuval Mintz 44640b55e27dSYuval Mintz qed_for_each_vf(hwfn, j) { 44650b55e27dSYuval Mintz int k; 44660b55e27dSYuval Mintz 44677eff82b0SYuval Mintz if (!qed_iov_is_valid_vfid(hwfn, j, true, false)) 44680b55e27dSYuval Mintz continue; 44690b55e27dSYuval Mintz 44700b55e27dSYuval Mintz /* Wait until VF is disabled before releasing */ 44710b55e27dSYuval Mintz for (k = 0; k < 100; k++) { 44720b55e27dSYuval Mintz if (!qed_iov_is_vf_stopped(hwfn, j)) 44730b55e27dSYuval Mintz msleep(20); 44740b55e27dSYuval Mintz else 44750b55e27dSYuval Mintz break; 44760b55e27dSYuval Mintz } 44770b55e27dSYuval Mintz 44780b55e27dSYuval Mintz if (k < 100) 44790b55e27dSYuval Mintz qed_iov_release_hw_for_vf(&cdev->hwfns[i], 44800b55e27dSYuval Mintz ptt, j); 44810b55e27dSYuval Mintz else 44820b55e27dSYuval Mintz DP_ERR(hwfn, 44830b55e27dSYuval Mintz "Timeout waiting for VF's FLR to end\n"); 44840b55e27dSYuval Mintz } 44850b55e27dSYuval Mintz 44860b55e27dSYuval Mintz qed_ptt_release(hwfn, ptt); 44870b55e27dSYuval Mintz } 44880b55e27dSYuval Mintz 44890b55e27dSYuval Mintz qed_iov_set_vfs_to_disable(cdev, false); 44900b55e27dSYuval Mintz 44910b55e27dSYuval Mintz return 0; 44920b55e27dSYuval Mintz } 44930b55e27dSYuval Mintz 44943da7a37aSMintz, Yuval static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn, 44953da7a37aSMintz, Yuval u16 vfid, 44963da7a37aSMintz, Yuval struct qed_iov_vf_init_params *params) 44973da7a37aSMintz, Yuval { 44983da7a37aSMintz, Yuval u16 base, i; 44993da7a37aSMintz, Yuval 45003da7a37aSMintz, Yuval /* Since we have an equal resource distribution per-VF, and we assume 45013da7a37aSMintz, Yuval * PF has acquired the QED_PF_L2_QUE first queues, we start setting 45023da7a37aSMintz, Yuval * sequentially from there. 45033da7a37aSMintz, Yuval */ 45043da7a37aSMintz, Yuval base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues; 45053da7a37aSMintz, Yuval 45063da7a37aSMintz, Yuval params->rel_vf_id = vfid; 45073da7a37aSMintz, Yuval for (i = 0; i < params->num_queues; i++) { 45083da7a37aSMintz, Yuval params->req_rx_queue[i] = base + i; 45093da7a37aSMintz, Yuval params->req_tx_queue[i] = base + i; 45103da7a37aSMintz, Yuval } 45113da7a37aSMintz, Yuval } 45123da7a37aSMintz, Yuval 45130b55e27dSYuval Mintz static int qed_sriov_enable(struct qed_dev *cdev, int num) 45140b55e27dSYuval Mintz { 45153da7a37aSMintz, Yuval struct qed_iov_vf_init_params params; 4516538f8d00SSudarsana Reddy Kalluru struct qed_hwfn *hwfn; 4517538f8d00SSudarsana Reddy Kalluru struct qed_ptt *ptt; 45180b55e27dSYuval Mintz int i, j, rc; 45190b55e27dSYuval Mintz 45200b55e27dSYuval Mintz if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) { 45210b55e27dSYuval Mintz DP_NOTICE(cdev, "Can start at most %d VFs\n", 45220b55e27dSYuval Mintz RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1); 45230b55e27dSYuval Mintz return -EINVAL; 45240b55e27dSYuval Mintz } 45250b55e27dSYuval Mintz 45263da7a37aSMintz, Yuval memset(¶ms, 0, sizeof(params)); 45273da7a37aSMintz, Yuval 45280b55e27dSYuval Mintz /* Initialize HW for VF access */ 45290b55e27dSYuval Mintz for_each_hwfn(cdev, j) { 4530538f8d00SSudarsana Reddy Kalluru hwfn = &cdev->hwfns[j]; 4531538f8d00SSudarsana Reddy Kalluru ptt = qed_ptt_acquire(hwfn); 45325a1f965aSMintz, Yuval 45335a1f965aSMintz, Yuval /* Make sure not to use more than 16 queues per VF */ 45343da7a37aSMintz, Yuval params.num_queues = min_t(int, 45353da7a37aSMintz, Yuval FEAT_NUM(hwfn, QED_VF_L2_QUE) / num, 45363da7a37aSMintz, Yuval 16); 45370b55e27dSYuval Mintz 45380b55e27dSYuval Mintz if (!ptt) { 45390b55e27dSYuval Mintz DP_ERR(hwfn, "Failed to acquire ptt\n"); 45400b55e27dSYuval Mintz rc = -EBUSY; 45410b55e27dSYuval Mintz goto err; 45420b55e27dSYuval Mintz } 45430b55e27dSYuval Mintz 45440b55e27dSYuval Mintz for (i = 0; i < num; i++) { 45457eff82b0SYuval Mintz if (!qed_iov_is_valid_vfid(hwfn, i, false, true)) 45460b55e27dSYuval Mintz continue; 45470b55e27dSYuval Mintz 45483da7a37aSMintz, Yuval qed_sriov_enable_qid_config(hwfn, i, ¶ms); 45493da7a37aSMintz, Yuval rc = qed_iov_init_hw_for_vf(hwfn, ptt, ¶ms); 45500b55e27dSYuval Mintz if (rc) { 45510b55e27dSYuval Mintz DP_ERR(cdev, "Failed to enable VF[%d]\n", i); 45520b55e27dSYuval Mintz qed_ptt_release(hwfn, ptt); 45530b55e27dSYuval Mintz goto err; 45540b55e27dSYuval Mintz } 45550b55e27dSYuval Mintz } 45560b55e27dSYuval Mintz 45570b55e27dSYuval Mintz qed_ptt_release(hwfn, ptt); 45580b55e27dSYuval Mintz } 45590b55e27dSYuval Mintz 45600b55e27dSYuval Mintz /* Enable SRIOV PCIe functions */ 45610b55e27dSYuval Mintz rc = pci_enable_sriov(cdev->pdev, num); 45620b55e27dSYuval Mintz if (rc) { 45630b55e27dSYuval Mintz DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc); 45640b55e27dSYuval Mintz goto err; 45650b55e27dSYuval Mintz } 45660b55e27dSYuval Mintz 4567538f8d00SSudarsana Reddy Kalluru hwfn = QED_LEADING_HWFN(cdev); 4568538f8d00SSudarsana Reddy Kalluru ptt = qed_ptt_acquire(hwfn); 4569538f8d00SSudarsana Reddy Kalluru if (!ptt) { 4570538f8d00SSudarsana Reddy Kalluru DP_ERR(hwfn, "Failed to acquire ptt\n"); 4571538f8d00SSudarsana Reddy Kalluru rc = -EBUSY; 4572538f8d00SSudarsana Reddy Kalluru goto err; 4573538f8d00SSudarsana Reddy Kalluru } 4574538f8d00SSudarsana Reddy Kalluru 4575538f8d00SSudarsana Reddy Kalluru rc = qed_mcp_ov_update_eswitch(hwfn, ptt, QED_OV_ESWITCH_VEB); 4576538f8d00SSudarsana Reddy Kalluru if (rc) 4577538f8d00SSudarsana Reddy Kalluru DP_INFO(cdev, "Failed to update eswitch mode\n"); 4578538f8d00SSudarsana Reddy Kalluru qed_ptt_release(hwfn, ptt); 4579538f8d00SSudarsana Reddy Kalluru 45800b55e27dSYuval Mintz return num; 45810b55e27dSYuval Mintz 45820b55e27dSYuval Mintz err: 45830b55e27dSYuval Mintz qed_sriov_disable(cdev, false); 45840b55e27dSYuval Mintz return rc; 45850b55e27dSYuval Mintz } 45860b55e27dSYuval Mintz 45870b55e27dSYuval Mintz static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param) 45880b55e27dSYuval Mintz { 45890b55e27dSYuval Mintz if (!IS_QED_SRIOV(cdev)) { 45900b55e27dSYuval Mintz DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n"); 45910b55e27dSYuval Mintz return -EOPNOTSUPP; 45920b55e27dSYuval Mintz } 45930b55e27dSYuval Mintz 45940b55e27dSYuval Mintz if (num_vfs_param) 45950b55e27dSYuval Mintz return qed_sriov_enable(cdev, num_vfs_param); 45960b55e27dSYuval Mintz else 45970b55e27dSYuval Mintz return qed_sriov_disable(cdev, true); 45980b55e27dSYuval Mintz } 45990b55e27dSYuval Mintz 4600eff16960SYuval Mintz static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid) 4601eff16960SYuval Mintz { 4602eff16960SYuval Mintz int i; 4603eff16960SYuval Mintz 4604eff16960SYuval Mintz if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) { 4605eff16960SYuval Mintz DP_VERBOSE(cdev, QED_MSG_IOV, 4606eff16960SYuval Mintz "Cannot set a VF MAC; Sriov is not enabled\n"); 4607eff16960SYuval Mintz return -EINVAL; 4608eff16960SYuval Mintz } 4609eff16960SYuval Mintz 46107eff82b0SYuval Mintz if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) { 4611eff16960SYuval Mintz DP_VERBOSE(cdev, QED_MSG_IOV, 4612eff16960SYuval Mintz "Cannot set VF[%d] MAC (VF is not active)\n", vfid); 4613eff16960SYuval Mintz return -EINVAL; 4614eff16960SYuval Mintz } 4615eff16960SYuval Mintz 4616eff16960SYuval Mintz for_each_hwfn(cdev, i) { 4617eff16960SYuval Mintz struct qed_hwfn *hwfn = &cdev->hwfns[i]; 4618eff16960SYuval Mintz struct qed_public_vf_info *vf_info; 4619eff16960SYuval Mintz 4620eff16960SYuval Mintz vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true); 4621eff16960SYuval Mintz if (!vf_info) 4622eff16960SYuval Mintz continue; 4623eff16960SYuval Mintz 46247425d822SShahed Shaikh /* Set the MAC, and schedule the IOV task */ 46257425d822SShahed Shaikh if (vf_info->is_trusted_configured) 46267425d822SShahed Shaikh ether_addr_copy(vf_info->mac, mac); 46277425d822SShahed Shaikh else 4628eff16960SYuval Mintz ether_addr_copy(vf_info->forced_mac, mac); 46297425d822SShahed Shaikh 4630eff16960SYuval Mintz qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG); 4631eff16960SYuval Mintz } 4632eff16960SYuval Mintz 4633eff16960SYuval Mintz return 0; 4634eff16960SYuval Mintz } 4635eff16960SYuval Mintz 463608feecd7SYuval Mintz static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid) 463708feecd7SYuval Mintz { 463808feecd7SYuval Mintz int i; 463908feecd7SYuval Mintz 464008feecd7SYuval Mintz if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) { 464108feecd7SYuval Mintz DP_VERBOSE(cdev, QED_MSG_IOV, 464208feecd7SYuval Mintz "Cannot set a VF MAC; Sriov is not enabled\n"); 464308feecd7SYuval Mintz return -EINVAL; 464408feecd7SYuval Mintz } 464508feecd7SYuval Mintz 46467eff82b0SYuval Mintz if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) { 464708feecd7SYuval Mintz DP_VERBOSE(cdev, QED_MSG_IOV, 464808feecd7SYuval Mintz "Cannot set VF[%d] MAC (VF is not active)\n", vfid); 464908feecd7SYuval Mintz return -EINVAL; 465008feecd7SYuval Mintz } 465108feecd7SYuval Mintz 465208feecd7SYuval Mintz for_each_hwfn(cdev, i) { 465308feecd7SYuval Mintz struct qed_hwfn *hwfn = &cdev->hwfns[i]; 465408feecd7SYuval Mintz struct qed_public_vf_info *vf_info; 465508feecd7SYuval Mintz 465608feecd7SYuval Mintz vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true); 465708feecd7SYuval Mintz if (!vf_info) 465808feecd7SYuval Mintz continue; 465908feecd7SYuval Mintz 466008feecd7SYuval Mintz /* Set the forced vlan, and schedule the IOV task */ 466108feecd7SYuval Mintz vf_info->forced_vlan = vid; 466208feecd7SYuval Mintz qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG); 466308feecd7SYuval Mintz } 466408feecd7SYuval Mintz 466508feecd7SYuval Mintz return 0; 466608feecd7SYuval Mintz } 466708feecd7SYuval Mintz 466873390ac9SYuval Mintz static int qed_get_vf_config(struct qed_dev *cdev, 466973390ac9SYuval Mintz int vf_id, struct ifla_vf_info *ivi) 467073390ac9SYuval Mintz { 467173390ac9SYuval Mintz struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); 467273390ac9SYuval Mintz struct qed_public_vf_info *vf_info; 467373390ac9SYuval Mintz struct qed_mcp_link_state link; 467473390ac9SYuval Mintz u32 tx_rate; 467573390ac9SYuval Mintz 467673390ac9SYuval Mintz /* Sanitize request */ 467773390ac9SYuval Mintz if (IS_VF(cdev)) 467873390ac9SYuval Mintz return -EINVAL; 467973390ac9SYuval Mintz 46807eff82b0SYuval Mintz if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) { 468173390ac9SYuval Mintz DP_VERBOSE(cdev, QED_MSG_IOV, 468273390ac9SYuval Mintz "VF index [%d] isn't active\n", vf_id); 468373390ac9SYuval Mintz return -EINVAL; 468473390ac9SYuval Mintz } 468573390ac9SYuval Mintz 468673390ac9SYuval Mintz vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true); 468773390ac9SYuval Mintz 468873390ac9SYuval Mintz qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL); 468973390ac9SYuval Mintz 469073390ac9SYuval Mintz /* Fill information about VF */ 469173390ac9SYuval Mintz ivi->vf = vf_id; 469273390ac9SYuval Mintz 469373390ac9SYuval Mintz if (is_valid_ether_addr(vf_info->forced_mac)) 469473390ac9SYuval Mintz ether_addr_copy(ivi->mac, vf_info->forced_mac); 469573390ac9SYuval Mintz else 469673390ac9SYuval Mintz ether_addr_copy(ivi->mac, vf_info->mac); 469773390ac9SYuval Mintz 469873390ac9SYuval Mintz ivi->vlan = vf_info->forced_vlan; 469973390ac9SYuval Mintz ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id); 470073390ac9SYuval Mintz ivi->linkstate = vf_info->link_state; 470173390ac9SYuval Mintz tx_rate = vf_info->tx_rate; 470273390ac9SYuval Mintz ivi->max_tx_rate = tx_rate ? tx_rate : link.speed; 470373390ac9SYuval Mintz ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id); 470473390ac9SYuval Mintz 470573390ac9SYuval Mintz return 0; 470673390ac9SYuval Mintz } 470773390ac9SYuval Mintz 470836558c3dSYuval Mintz void qed_inform_vf_link_state(struct qed_hwfn *hwfn) 470936558c3dSYuval Mintz { 4710e50728efSMintz, Yuval struct qed_hwfn *lead_hwfn = QED_LEADING_HWFN(hwfn->cdev); 471136558c3dSYuval Mintz struct qed_mcp_link_capabilities caps; 471236558c3dSYuval Mintz struct qed_mcp_link_params params; 471336558c3dSYuval Mintz struct qed_mcp_link_state link; 471436558c3dSYuval Mintz int i; 471536558c3dSYuval Mintz 471636558c3dSYuval Mintz if (!hwfn->pf_iov_info) 471736558c3dSYuval Mintz return; 471836558c3dSYuval Mintz 471936558c3dSYuval Mintz /* Update bulletin of all future possible VFs with link configuration */ 472036558c3dSYuval Mintz for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) { 4721733def6aSYuval Mintz struct qed_public_vf_info *vf_info; 4722733def6aSYuval Mintz 4723733def6aSYuval Mintz vf_info = qed_iov_get_public_vf_info(hwfn, i, false); 4724733def6aSYuval Mintz if (!vf_info) 4725733def6aSYuval Mintz continue; 4726733def6aSYuval Mintz 4727e50728efSMintz, Yuval /* Only hwfn0 is actually interested in the link speed. 4728e50728efSMintz, Yuval * But since only it would receive an MFW indication of link, 4729e50728efSMintz, Yuval * need to take configuration from it - otherwise things like 4730e50728efSMintz, Yuval * rate limiting for hwfn1 VF would not work. 4731e50728efSMintz, Yuval */ 4732e50728efSMintz, Yuval memcpy(¶ms, qed_mcp_get_link_params(lead_hwfn), 4733e50728efSMintz, Yuval sizeof(params)); 4734e50728efSMintz, Yuval memcpy(&link, qed_mcp_get_link_state(lead_hwfn), sizeof(link)); 4735e50728efSMintz, Yuval memcpy(&caps, qed_mcp_get_link_capabilities(lead_hwfn), 473636558c3dSYuval Mintz sizeof(caps)); 473736558c3dSYuval Mintz 4738733def6aSYuval Mintz /* Modify link according to the VF's configured link state */ 4739733def6aSYuval Mintz switch (vf_info->link_state) { 4740733def6aSYuval Mintz case IFLA_VF_LINK_STATE_DISABLE: 4741733def6aSYuval Mintz link.link_up = false; 4742733def6aSYuval Mintz break; 4743733def6aSYuval Mintz case IFLA_VF_LINK_STATE_ENABLE: 4744733def6aSYuval Mintz link.link_up = true; 4745733def6aSYuval Mintz /* Set speed according to maximum supported by HW. 4746733def6aSYuval Mintz * that is 40G for regular devices and 100G for CMT 4747733def6aSYuval Mintz * mode devices. 4748733def6aSYuval Mintz */ 4749733def6aSYuval Mintz link.speed = (hwfn->cdev->num_hwfns > 1) ? 4750733def6aSYuval Mintz 100000 : 40000; 4751733def6aSYuval Mintz default: 4752733def6aSYuval Mintz /* In auto mode pass PF link image to VF */ 4753733def6aSYuval Mintz break; 4754733def6aSYuval Mintz } 4755733def6aSYuval Mintz 4756733def6aSYuval Mintz if (link.link_up && vf_info->tx_rate) { 4757733def6aSYuval Mintz struct qed_ptt *ptt; 4758733def6aSYuval Mintz int rate; 4759733def6aSYuval Mintz 4760733def6aSYuval Mintz rate = min_t(int, vf_info->tx_rate, link.speed); 4761733def6aSYuval Mintz 4762733def6aSYuval Mintz ptt = qed_ptt_acquire(hwfn); 4763733def6aSYuval Mintz if (!ptt) { 4764733def6aSYuval Mintz DP_NOTICE(hwfn, "Failed to acquire PTT\n"); 4765733def6aSYuval Mintz return; 4766733def6aSYuval Mintz } 4767733def6aSYuval Mintz 4768733def6aSYuval Mintz if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) { 4769733def6aSYuval Mintz vf_info->tx_rate = rate; 4770733def6aSYuval Mintz link.speed = rate; 4771733def6aSYuval Mintz } 4772733def6aSYuval Mintz 4773733def6aSYuval Mintz qed_ptt_release(hwfn, ptt); 4774733def6aSYuval Mintz } 4775733def6aSYuval Mintz 477636558c3dSYuval Mintz qed_iov_set_link(hwfn, i, ¶ms, &link, &caps); 477736558c3dSYuval Mintz } 477836558c3dSYuval Mintz 477936558c3dSYuval Mintz qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG); 478036558c3dSYuval Mintz } 478136558c3dSYuval Mintz 4782733def6aSYuval Mintz static int qed_set_vf_link_state(struct qed_dev *cdev, 4783733def6aSYuval Mintz int vf_id, int link_state) 4784733def6aSYuval Mintz { 4785733def6aSYuval Mintz int i; 4786733def6aSYuval Mintz 4787733def6aSYuval Mintz /* Sanitize request */ 4788733def6aSYuval Mintz if (IS_VF(cdev)) 4789733def6aSYuval Mintz return -EINVAL; 4790733def6aSYuval Mintz 47917eff82b0SYuval Mintz if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) { 4792733def6aSYuval Mintz DP_VERBOSE(cdev, QED_MSG_IOV, 4793733def6aSYuval Mintz "VF index [%d] isn't active\n", vf_id); 4794733def6aSYuval Mintz return -EINVAL; 4795733def6aSYuval Mintz } 4796733def6aSYuval Mintz 4797733def6aSYuval Mintz /* Handle configuration of link state */ 4798733def6aSYuval Mintz for_each_hwfn(cdev, i) { 4799733def6aSYuval Mintz struct qed_hwfn *hwfn = &cdev->hwfns[i]; 4800733def6aSYuval Mintz struct qed_public_vf_info *vf; 4801733def6aSYuval Mintz 4802733def6aSYuval Mintz vf = qed_iov_get_public_vf_info(hwfn, vf_id, true); 4803733def6aSYuval Mintz if (!vf) 4804733def6aSYuval Mintz continue; 4805733def6aSYuval Mintz 4806733def6aSYuval Mintz if (vf->link_state == link_state) 4807733def6aSYuval Mintz continue; 4808733def6aSYuval Mintz 4809733def6aSYuval Mintz vf->link_state = link_state; 4810733def6aSYuval Mintz qed_inform_vf_link_state(&cdev->hwfns[i]); 4811733def6aSYuval Mintz } 4812733def6aSYuval Mintz 4813733def6aSYuval Mintz return 0; 4814733def6aSYuval Mintz } 4815733def6aSYuval Mintz 48166ddc7608SYuval Mintz static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val) 48176ddc7608SYuval Mintz { 48186ddc7608SYuval Mintz int i, rc = -EINVAL; 48196ddc7608SYuval Mintz 48206ddc7608SYuval Mintz for_each_hwfn(cdev, i) { 48216ddc7608SYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 48226ddc7608SYuval Mintz 48236ddc7608SYuval Mintz rc = qed_iov_spoofchk_set(p_hwfn, vfid, val); 48246ddc7608SYuval Mintz if (rc) 48256ddc7608SYuval Mintz break; 48266ddc7608SYuval Mintz } 48276ddc7608SYuval Mintz 48286ddc7608SYuval Mintz return rc; 48296ddc7608SYuval Mintz } 48306ddc7608SYuval Mintz 4831733def6aSYuval Mintz static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate) 4832733def6aSYuval Mintz { 4833733def6aSYuval Mintz int i; 4834733def6aSYuval Mintz 4835733def6aSYuval Mintz for_each_hwfn(cdev, i) { 4836733def6aSYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 4837733def6aSYuval Mintz struct qed_public_vf_info *vf; 4838733def6aSYuval Mintz 4839733def6aSYuval Mintz if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) { 4840733def6aSYuval Mintz DP_NOTICE(p_hwfn, 4841733def6aSYuval Mintz "SR-IOV sanity check failed, can't set tx rate\n"); 4842733def6aSYuval Mintz return -EINVAL; 4843733def6aSYuval Mintz } 4844733def6aSYuval Mintz 4845733def6aSYuval Mintz vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true); 4846733def6aSYuval Mintz 4847733def6aSYuval Mintz vf->tx_rate = rate; 4848733def6aSYuval Mintz 4849733def6aSYuval Mintz qed_inform_vf_link_state(p_hwfn); 4850733def6aSYuval Mintz } 4851733def6aSYuval Mintz 4852733def6aSYuval Mintz return 0; 4853733def6aSYuval Mintz } 4854733def6aSYuval Mintz 4855733def6aSYuval Mintz static int qed_set_vf_rate(struct qed_dev *cdev, 4856733def6aSYuval Mintz int vfid, u32 min_rate, u32 max_rate) 4857733def6aSYuval Mintz { 4858733def6aSYuval Mintz int rc_min = 0, rc_max = 0; 4859733def6aSYuval Mintz 4860733def6aSYuval Mintz if (max_rate) 4861733def6aSYuval Mintz rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate); 4862733def6aSYuval Mintz 4863733def6aSYuval Mintz if (min_rate) 4864733def6aSYuval Mintz rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate); 4865733def6aSYuval Mintz 4866733def6aSYuval Mintz if (rc_max | rc_min) 4867733def6aSYuval Mintz return -EINVAL; 4868733def6aSYuval Mintz 4869733def6aSYuval Mintz return 0; 4870733def6aSYuval Mintz } 4871733def6aSYuval Mintz 4872f990c82cSMintz, Yuval static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust) 4873f990c82cSMintz, Yuval { 4874f990c82cSMintz, Yuval int i; 4875f990c82cSMintz, Yuval 4876f990c82cSMintz, Yuval for_each_hwfn(cdev, i) { 4877f990c82cSMintz, Yuval struct qed_hwfn *hwfn = &cdev->hwfns[i]; 4878f990c82cSMintz, Yuval struct qed_public_vf_info *vf; 4879f990c82cSMintz, Yuval 4880f990c82cSMintz, Yuval if (!qed_iov_pf_sanity_check(hwfn, vfid)) { 4881f990c82cSMintz, Yuval DP_NOTICE(hwfn, 4882f990c82cSMintz, Yuval "SR-IOV sanity check failed, can't set trust\n"); 4883f990c82cSMintz, Yuval return -EINVAL; 4884f990c82cSMintz, Yuval } 4885f990c82cSMintz, Yuval 4886f990c82cSMintz, Yuval vf = qed_iov_get_public_vf_info(hwfn, vfid, true); 4887f990c82cSMintz, Yuval 4888f990c82cSMintz, Yuval if (vf->is_trusted_request == trust) 4889f990c82cSMintz, Yuval return 0; 4890f990c82cSMintz, Yuval vf->is_trusted_request = trust; 4891f990c82cSMintz, Yuval 4892f990c82cSMintz, Yuval qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG); 4893f990c82cSMintz, Yuval } 4894f990c82cSMintz, Yuval 4895f990c82cSMintz, Yuval return 0; 4896f990c82cSMintz, Yuval } 4897f990c82cSMintz, Yuval 489837bff2b9SYuval Mintz static void qed_handle_vf_msg(struct qed_hwfn *hwfn) 489937bff2b9SYuval Mintz { 490037bff2b9SYuval Mintz u64 events[QED_VF_ARRAY_LENGTH]; 490137bff2b9SYuval Mintz struct qed_ptt *ptt; 490237bff2b9SYuval Mintz int i; 490337bff2b9SYuval Mintz 490437bff2b9SYuval Mintz ptt = qed_ptt_acquire(hwfn); 490537bff2b9SYuval Mintz if (!ptt) { 490637bff2b9SYuval Mintz DP_VERBOSE(hwfn, QED_MSG_IOV, 490737bff2b9SYuval Mintz "Can't acquire PTT; re-scheduling\n"); 490837bff2b9SYuval Mintz qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG); 490937bff2b9SYuval Mintz return; 491037bff2b9SYuval Mintz } 491137bff2b9SYuval Mintz 4912fd3c615aSMintz, Yuval qed_iov_pf_get_pending_events(hwfn, events); 491337bff2b9SYuval Mintz 491437bff2b9SYuval Mintz DP_VERBOSE(hwfn, QED_MSG_IOV, 491537bff2b9SYuval Mintz "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n", 491637bff2b9SYuval Mintz events[0], events[1], events[2]); 491737bff2b9SYuval Mintz 491837bff2b9SYuval Mintz qed_for_each_vf(hwfn, i) { 491937bff2b9SYuval Mintz /* Skip VFs with no pending messages */ 492037bff2b9SYuval Mintz if (!(events[i / 64] & (1ULL << (i % 64)))) 492137bff2b9SYuval Mintz continue; 492237bff2b9SYuval Mintz 492337bff2b9SYuval Mintz DP_VERBOSE(hwfn, QED_MSG_IOV, 492437bff2b9SYuval Mintz "Handling VF message from VF 0x%02x [Abs 0x%02x]\n", 492537bff2b9SYuval Mintz i, hwfn->cdev->p_iov_info->first_vf_in_pf + i); 492637bff2b9SYuval Mintz 492737bff2b9SYuval Mintz /* Copy VF's message to PF's request buffer for that VF */ 492837bff2b9SYuval Mintz if (qed_iov_copy_vf_msg(hwfn, ptt, i)) 492937bff2b9SYuval Mintz continue; 493037bff2b9SYuval Mintz 493137bff2b9SYuval Mintz qed_iov_process_mbx_req(hwfn, ptt, i); 493237bff2b9SYuval Mintz } 493337bff2b9SYuval Mintz 493437bff2b9SYuval Mintz qed_ptt_release(hwfn, ptt); 493537bff2b9SYuval Mintz } 493637bff2b9SYuval Mintz 49377425d822SShahed Shaikh static bool qed_pf_validate_req_vf_mac(struct qed_hwfn *hwfn, 49387425d822SShahed Shaikh u8 *mac, 49397425d822SShahed Shaikh struct qed_public_vf_info *info) 49407425d822SShahed Shaikh { 49417425d822SShahed Shaikh if (info->is_trusted_configured) { 49427425d822SShahed Shaikh if (is_valid_ether_addr(info->mac) && 49437425d822SShahed Shaikh (!mac || !ether_addr_equal(mac, info->mac))) 49447425d822SShahed Shaikh return true; 49457425d822SShahed Shaikh } else { 49467425d822SShahed Shaikh if (is_valid_ether_addr(info->forced_mac) && 49477425d822SShahed Shaikh (!mac || !ether_addr_equal(mac, info->forced_mac))) 49487425d822SShahed Shaikh return true; 49497425d822SShahed Shaikh } 49507425d822SShahed Shaikh 49517425d822SShahed Shaikh return false; 49527425d822SShahed Shaikh } 49537425d822SShahed Shaikh 49547425d822SShahed Shaikh static void qed_set_bulletin_mac(struct qed_hwfn *hwfn, 49557425d822SShahed Shaikh struct qed_public_vf_info *info, 49567425d822SShahed Shaikh int vfid) 49577425d822SShahed Shaikh { 49587425d822SShahed Shaikh if (info->is_trusted_configured) 49597425d822SShahed Shaikh qed_iov_bulletin_set_mac(hwfn, info->mac, vfid); 49607425d822SShahed Shaikh else 49617425d822SShahed Shaikh qed_iov_bulletin_set_forced_mac(hwfn, info->forced_mac, vfid); 49627425d822SShahed Shaikh } 49637425d822SShahed Shaikh 496408feecd7SYuval Mintz static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn) 496508feecd7SYuval Mintz { 496608feecd7SYuval Mintz int i; 496708feecd7SYuval Mintz 496808feecd7SYuval Mintz qed_for_each_vf(hwfn, i) { 496908feecd7SYuval Mintz struct qed_public_vf_info *info; 497008feecd7SYuval Mintz bool update = false; 4971eff16960SYuval Mintz u8 *mac; 497208feecd7SYuval Mintz 497308feecd7SYuval Mintz info = qed_iov_get_public_vf_info(hwfn, i, true); 497408feecd7SYuval Mintz if (!info) 497508feecd7SYuval Mintz continue; 497608feecd7SYuval Mintz 497708feecd7SYuval Mintz /* Update data on bulletin board */ 49787425d822SShahed Shaikh if (info->is_trusted_configured) 49797425d822SShahed Shaikh mac = qed_iov_bulletin_get_mac(hwfn, i); 49807425d822SShahed Shaikh else 4981eff16960SYuval Mintz mac = qed_iov_bulletin_get_forced_mac(hwfn, i); 49827425d822SShahed Shaikh 49837425d822SShahed Shaikh if (qed_pf_validate_req_vf_mac(hwfn, mac, info)) { 4984eff16960SYuval Mintz DP_VERBOSE(hwfn, 4985eff16960SYuval Mintz QED_MSG_IOV, 4986eff16960SYuval Mintz "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n", 4987eff16960SYuval Mintz i, 4988eff16960SYuval Mintz hwfn->cdev->p_iov_info->first_vf_in_pf + i); 4989eff16960SYuval Mintz 49907425d822SShahed Shaikh /* Update bulletin board with MAC */ 49917425d822SShahed Shaikh qed_set_bulletin_mac(hwfn, info, i); 4992eff16960SYuval Mintz update = true; 4993eff16960SYuval Mintz } 499408feecd7SYuval Mintz 499508feecd7SYuval Mintz if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^ 499608feecd7SYuval Mintz info->forced_vlan) { 499708feecd7SYuval Mintz DP_VERBOSE(hwfn, 499808feecd7SYuval Mintz QED_MSG_IOV, 499908feecd7SYuval Mintz "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n", 500008feecd7SYuval Mintz info->forced_vlan, 500108feecd7SYuval Mintz i, 500208feecd7SYuval Mintz hwfn->cdev->p_iov_info->first_vf_in_pf + i); 500308feecd7SYuval Mintz qed_iov_bulletin_set_forced_vlan(hwfn, 500408feecd7SYuval Mintz info->forced_vlan, i); 500508feecd7SYuval Mintz update = true; 500608feecd7SYuval Mintz } 500708feecd7SYuval Mintz 500808feecd7SYuval Mintz if (update) 500908feecd7SYuval Mintz qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG); 501008feecd7SYuval Mintz } 501108feecd7SYuval Mintz } 501208feecd7SYuval Mintz 501336558c3dSYuval Mintz static void qed_handle_bulletin_post(struct qed_hwfn *hwfn) 501436558c3dSYuval Mintz { 501536558c3dSYuval Mintz struct qed_ptt *ptt; 501636558c3dSYuval Mintz int i; 501736558c3dSYuval Mintz 501836558c3dSYuval Mintz ptt = qed_ptt_acquire(hwfn); 501936558c3dSYuval Mintz if (!ptt) { 502036558c3dSYuval Mintz DP_NOTICE(hwfn, "Failed allocating a ptt entry\n"); 502136558c3dSYuval Mintz qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG); 502236558c3dSYuval Mintz return; 502336558c3dSYuval Mintz } 502436558c3dSYuval Mintz 502536558c3dSYuval Mintz qed_for_each_vf(hwfn, i) 502636558c3dSYuval Mintz qed_iov_post_vf_bulletin(hwfn, i, ptt); 502736558c3dSYuval Mintz 502836558c3dSYuval Mintz qed_ptt_release(hwfn, ptt); 502936558c3dSYuval Mintz } 503036558c3dSYuval Mintz 50317425d822SShahed Shaikh static void qed_update_mac_for_vf_trust_change(struct qed_hwfn *hwfn, int vf_id) 50327425d822SShahed Shaikh { 50337425d822SShahed Shaikh struct qed_public_vf_info *vf_info; 50347425d822SShahed Shaikh struct qed_vf_info *vf; 50357425d822SShahed Shaikh u8 *force_mac; 50367425d822SShahed Shaikh int i; 50377425d822SShahed Shaikh 50387425d822SShahed Shaikh vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true); 50397425d822SShahed Shaikh vf = qed_iov_get_vf_info(hwfn, vf_id, true); 50407425d822SShahed Shaikh 50417425d822SShahed Shaikh if (!vf_info || !vf) 50427425d822SShahed Shaikh return; 50437425d822SShahed Shaikh 50447425d822SShahed Shaikh /* Force MAC converted to generic MAC in case of VF trust on */ 50457425d822SShahed Shaikh if (vf_info->is_trusted_configured && 50467425d822SShahed Shaikh (vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))) { 50477425d822SShahed Shaikh force_mac = qed_iov_bulletin_get_forced_mac(hwfn, vf_id); 50487425d822SShahed Shaikh 50497425d822SShahed Shaikh if (force_mac) { 50507425d822SShahed Shaikh /* Clear existing shadow copy of MAC to have a clean 50517425d822SShahed Shaikh * slate. 50527425d822SShahed Shaikh */ 50537425d822SShahed Shaikh for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) { 50547425d822SShahed Shaikh if (ether_addr_equal(vf->shadow_config.macs[i], 50557425d822SShahed Shaikh vf_info->mac)) { 50567425d822SShahed Shaikh memset(vf->shadow_config.macs[i], 0, 50577425d822SShahed Shaikh ETH_ALEN); 50587425d822SShahed Shaikh DP_VERBOSE(hwfn, QED_MSG_IOV, 50597425d822SShahed Shaikh "Shadow MAC %pM removed for VF 0x%02x, VF trust mode is ON\n", 50607425d822SShahed Shaikh vf_info->mac, vf_id); 50617425d822SShahed Shaikh break; 50627425d822SShahed Shaikh } 50637425d822SShahed Shaikh } 50647425d822SShahed Shaikh 50657425d822SShahed Shaikh ether_addr_copy(vf_info->mac, force_mac); 50667425d822SShahed Shaikh memset(vf_info->forced_mac, 0, ETH_ALEN); 50677425d822SShahed Shaikh vf->bulletin.p_virt->valid_bitmap &= 50687425d822SShahed Shaikh ~BIT(MAC_ADDR_FORCED); 50697425d822SShahed Shaikh qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG); 50707425d822SShahed Shaikh } 50717425d822SShahed Shaikh } 50727425d822SShahed Shaikh 50737425d822SShahed Shaikh /* Update shadow copy with VF MAC when trust mode is turned off */ 50747425d822SShahed Shaikh if (!vf_info->is_trusted_configured) { 50757425d822SShahed Shaikh u8 empty_mac[ETH_ALEN]; 50767425d822SShahed Shaikh 50777425d822SShahed Shaikh memset(empty_mac, 0, ETH_ALEN); 50787425d822SShahed Shaikh for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) { 50797425d822SShahed Shaikh if (ether_addr_equal(vf->shadow_config.macs[i], 50807425d822SShahed Shaikh empty_mac)) { 50817425d822SShahed Shaikh ether_addr_copy(vf->shadow_config.macs[i], 50827425d822SShahed Shaikh vf_info->mac); 50837425d822SShahed Shaikh DP_VERBOSE(hwfn, QED_MSG_IOV, 50847425d822SShahed Shaikh "Shadow is updated with %pM for VF 0x%02x, VF trust mode is OFF\n", 50857425d822SShahed Shaikh vf_info->mac, vf_id); 50867425d822SShahed Shaikh break; 50877425d822SShahed Shaikh } 50887425d822SShahed Shaikh } 50897425d822SShahed Shaikh /* Clear bulletin when trust mode is turned off, 50907425d822SShahed Shaikh * to have a clean slate for next (normal) operations. 50917425d822SShahed Shaikh */ 50927425d822SShahed Shaikh qed_iov_bulletin_set_mac(hwfn, empty_mac, vf_id); 50937425d822SShahed Shaikh qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG); 50947425d822SShahed Shaikh } 50957425d822SShahed Shaikh } 50967425d822SShahed Shaikh 5097f990c82cSMintz, Yuval static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn) 5098f990c82cSMintz, Yuval { 5099f990c82cSMintz, Yuval struct qed_sp_vport_update_params params; 5100f990c82cSMintz, Yuval struct qed_filter_accept_flags *flags; 5101f990c82cSMintz, Yuval struct qed_public_vf_info *vf_info; 5102f990c82cSMintz, Yuval struct qed_vf_info *vf; 5103f990c82cSMintz, Yuval u8 mask; 5104f990c82cSMintz, Yuval int i; 5105f990c82cSMintz, Yuval 5106f990c82cSMintz, Yuval mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED; 5107f990c82cSMintz, Yuval flags = ¶ms.accept_flags; 5108f990c82cSMintz, Yuval 5109f990c82cSMintz, Yuval qed_for_each_vf(hwfn, i) { 5110f990c82cSMintz, Yuval /* Need to make sure current requested configuration didn't 5111f990c82cSMintz, Yuval * flip so that we'll end up configuring something that's not 5112f990c82cSMintz, Yuval * needed. 5113f990c82cSMintz, Yuval */ 5114f990c82cSMintz, Yuval vf_info = qed_iov_get_public_vf_info(hwfn, i, true); 5115f990c82cSMintz, Yuval if (vf_info->is_trusted_configured == 5116f990c82cSMintz, Yuval vf_info->is_trusted_request) 5117f990c82cSMintz, Yuval continue; 5118f990c82cSMintz, Yuval vf_info->is_trusted_configured = vf_info->is_trusted_request; 5119f990c82cSMintz, Yuval 51207425d822SShahed Shaikh /* Handle forced MAC mode */ 51217425d822SShahed Shaikh qed_update_mac_for_vf_trust_change(hwfn, i); 51227425d822SShahed Shaikh 5123f990c82cSMintz, Yuval /* Validate that the VF has a configured vport */ 5124f990c82cSMintz, Yuval vf = qed_iov_get_vf_info(hwfn, i, true); 5125f990c82cSMintz, Yuval if (!vf->vport_instance) 5126f990c82cSMintz, Yuval continue; 5127f990c82cSMintz, Yuval 5128f990c82cSMintz, Yuval memset(¶ms, 0, sizeof(params)); 5129f990c82cSMintz, Yuval params.opaque_fid = vf->opaque_fid; 5130f990c82cSMintz, Yuval params.vport_id = vf->vport_id; 5131f990c82cSMintz, Yuval 5132f990c82cSMintz, Yuval if (vf_info->rx_accept_mode & mask) { 5133f990c82cSMintz, Yuval flags->update_rx_mode_config = 1; 5134f990c82cSMintz, Yuval flags->rx_accept_filter = vf_info->rx_accept_mode; 5135f990c82cSMintz, Yuval } 5136f990c82cSMintz, Yuval 5137f990c82cSMintz, Yuval if (vf_info->tx_accept_mode & mask) { 5138f990c82cSMintz, Yuval flags->update_tx_mode_config = 1; 5139f990c82cSMintz, Yuval flags->tx_accept_filter = vf_info->tx_accept_mode; 5140f990c82cSMintz, Yuval } 5141f990c82cSMintz, Yuval 5142f990c82cSMintz, Yuval /* Remove if needed; Otherwise this would set the mask */ 5143f990c82cSMintz, Yuval if (!vf_info->is_trusted_configured) { 5144f990c82cSMintz, Yuval flags->rx_accept_filter &= ~mask; 5145f990c82cSMintz, Yuval flags->tx_accept_filter &= ~mask; 5146f990c82cSMintz, Yuval } 5147f990c82cSMintz, Yuval 5148f990c82cSMintz, Yuval if (flags->update_rx_mode_config || 5149f990c82cSMintz, Yuval flags->update_tx_mode_config) 5150f990c82cSMintz, Yuval qed_sp_vport_update(hwfn, ¶ms, 5151f990c82cSMintz, Yuval QED_SPQ_MODE_EBLOCK, NULL); 5152f990c82cSMintz, Yuval } 5153f990c82cSMintz, Yuval } 5154f990c82cSMintz, Yuval 5155ba56947aSBaoyou Xie static void qed_iov_pf_task(struct work_struct *work) 5156ba56947aSBaoyou Xie 515737bff2b9SYuval Mintz { 515837bff2b9SYuval Mintz struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn, 515937bff2b9SYuval Mintz iov_task.work); 51600b55e27dSYuval Mintz int rc; 516137bff2b9SYuval Mintz 516237bff2b9SYuval Mintz if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags)) 516337bff2b9SYuval Mintz return; 516437bff2b9SYuval Mintz 51650b55e27dSYuval Mintz if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) { 51660b55e27dSYuval Mintz struct qed_ptt *ptt = qed_ptt_acquire(hwfn); 51670b55e27dSYuval Mintz 51680b55e27dSYuval Mintz if (!ptt) { 51690b55e27dSYuval Mintz qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG); 51700b55e27dSYuval Mintz return; 51710b55e27dSYuval Mintz } 51720b55e27dSYuval Mintz 51730b55e27dSYuval Mintz rc = qed_iov_vf_flr_cleanup(hwfn, ptt); 51740b55e27dSYuval Mintz if (rc) 51750b55e27dSYuval Mintz qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG); 51760b55e27dSYuval Mintz 51770b55e27dSYuval Mintz qed_ptt_release(hwfn, ptt); 51780b55e27dSYuval Mintz } 51790b55e27dSYuval Mintz 518037bff2b9SYuval Mintz if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags)) 518137bff2b9SYuval Mintz qed_handle_vf_msg(hwfn); 518208feecd7SYuval Mintz 518308feecd7SYuval Mintz if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG, 518408feecd7SYuval Mintz &hwfn->iov_task_flags)) 518508feecd7SYuval Mintz qed_handle_pf_set_vf_unicast(hwfn); 518608feecd7SYuval Mintz 518736558c3dSYuval Mintz if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG, 518836558c3dSYuval Mintz &hwfn->iov_task_flags)) 518936558c3dSYuval Mintz qed_handle_bulletin_post(hwfn); 5190f990c82cSMintz, Yuval 5191f990c82cSMintz, Yuval if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags)) 5192f990c82cSMintz, Yuval qed_iov_handle_trust_change(hwfn); 519337bff2b9SYuval Mintz } 519437bff2b9SYuval Mintz 519537bff2b9SYuval Mintz void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first) 519637bff2b9SYuval Mintz { 519737bff2b9SYuval Mintz int i; 519837bff2b9SYuval Mintz 519937bff2b9SYuval Mintz for_each_hwfn(cdev, i) { 520037bff2b9SYuval Mintz if (!cdev->hwfns[i].iov_wq) 520137bff2b9SYuval Mintz continue; 520237bff2b9SYuval Mintz 520337bff2b9SYuval Mintz if (schedule_first) { 520437bff2b9SYuval Mintz qed_schedule_iov(&cdev->hwfns[i], 520537bff2b9SYuval Mintz QED_IOV_WQ_STOP_WQ_FLAG); 520637bff2b9SYuval Mintz cancel_delayed_work_sync(&cdev->hwfns[i].iov_task); 520737bff2b9SYuval Mintz } 520837bff2b9SYuval Mintz 520937bff2b9SYuval Mintz flush_workqueue(cdev->hwfns[i].iov_wq); 521037bff2b9SYuval Mintz destroy_workqueue(cdev->hwfns[i].iov_wq); 521137bff2b9SYuval Mintz } 521237bff2b9SYuval Mintz } 521337bff2b9SYuval Mintz 521437bff2b9SYuval Mintz int qed_iov_wq_start(struct qed_dev *cdev) 521537bff2b9SYuval Mintz { 521637bff2b9SYuval Mintz char name[NAME_SIZE]; 521737bff2b9SYuval Mintz int i; 521837bff2b9SYuval Mintz 521937bff2b9SYuval Mintz for_each_hwfn(cdev, i) { 522037bff2b9SYuval Mintz struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 522137bff2b9SYuval Mintz 522236558c3dSYuval Mintz /* PFs needs a dedicated workqueue only if they support IOV. 522336558c3dSYuval Mintz * VFs always require one. 522436558c3dSYuval Mintz */ 522536558c3dSYuval Mintz if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn)) 522637bff2b9SYuval Mintz continue; 522737bff2b9SYuval Mintz 522837bff2b9SYuval Mintz snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x", 522937bff2b9SYuval Mintz cdev->pdev->bus->number, 523037bff2b9SYuval Mintz PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id); 523137bff2b9SYuval Mintz 523237bff2b9SYuval Mintz p_hwfn->iov_wq = create_singlethread_workqueue(name); 523337bff2b9SYuval Mintz if (!p_hwfn->iov_wq) { 523437bff2b9SYuval Mintz DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n"); 523537bff2b9SYuval Mintz return -ENOMEM; 523637bff2b9SYuval Mintz } 523737bff2b9SYuval Mintz 523836558c3dSYuval Mintz if (IS_PF(cdev)) 523937bff2b9SYuval Mintz INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task); 524036558c3dSYuval Mintz else 524136558c3dSYuval Mintz INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task); 524237bff2b9SYuval Mintz } 524337bff2b9SYuval Mintz 524437bff2b9SYuval Mintz return 0; 524537bff2b9SYuval Mintz } 52460b55e27dSYuval Mintz 52470b55e27dSYuval Mintz const struct qed_iov_hv_ops qed_iov_ops_pass = { 52480b55e27dSYuval Mintz .configure = &qed_sriov_configure, 5249eff16960SYuval Mintz .set_mac = &qed_sriov_pf_set_mac, 525008feecd7SYuval Mintz .set_vlan = &qed_sriov_pf_set_vlan, 525173390ac9SYuval Mintz .get_config = &qed_get_vf_config, 5252733def6aSYuval Mintz .set_link_state = &qed_set_vf_link_state, 52536ddc7608SYuval Mintz .set_spoof = &qed_spoof_configure, 5254733def6aSYuval Mintz .set_rate = &qed_set_vf_rate, 5255f990c82cSMintz, Yuval .set_trust = &qed_set_vf_trust, 52560b55e27dSYuval Mintz }; 5257