xref: /openbmc/linux/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c (revision 284aabb0e8c87f24922bd39f11a39f353c02d276)
1 /* QLogic qed NIC Driver
2  * Copyright (c) 2015 QLogic Corporation
3  *
4  * This software is available under the terms of the GNU General Public License
5  * (GPL) Version 2, available from the file COPYING in the main directory of
6  * this source tree.
7  */
8 
9 #include <linux/types.h>
10 #include <asm/byteorder.h>
11 #include <linux/bitops.h>
12 #include <linux/errno.h>
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include "qed.h"
16 #include <linux/qed/qed_chain.h>
17 #include "qed_cxt.h"
18 #include "qed_hsi.h"
19 #include "qed_hw.h"
20 #include "qed_int.h"
21 #include "qed_reg_addr.h"
22 #include "qed_sp.h"
23 
24 int qed_sp_init_request(struct qed_hwfn *p_hwfn,
25 			struct qed_spq_entry **pp_ent,
26 			u8 cmd,
27 			u8 protocol,
28 			struct qed_sp_init_data *p_data)
29 {
30 	u32 opaque_cid = p_data->opaque_fid << 16 | p_data->cid;
31 	struct qed_spq_entry *p_ent = NULL;
32 	int rc;
33 
34 	if (!pp_ent)
35 		return -ENOMEM;
36 
37 	rc = qed_spq_get_entry(p_hwfn, pp_ent);
38 
39 	if (rc != 0)
40 		return rc;
41 
42 	p_ent = *pp_ent;
43 
44 	p_ent->elem.hdr.cid		= cpu_to_le32(opaque_cid);
45 	p_ent->elem.hdr.cmd_id		= cmd;
46 	p_ent->elem.hdr.protocol_id	= protocol;
47 
48 	p_ent->priority		= QED_SPQ_PRIORITY_NORMAL;
49 	p_ent->comp_mode	= p_data->comp_mode;
50 	p_ent->comp_done.done	= 0;
51 
52 	switch (p_ent->comp_mode) {
53 	case QED_SPQ_MODE_EBLOCK:
54 		p_ent->comp_cb.cookie = &p_ent->comp_done;
55 		break;
56 
57 	case QED_SPQ_MODE_BLOCK:
58 		if (!p_data->p_comp_data)
59 			return -EINVAL;
60 
61 		p_ent->comp_cb.cookie = p_data->p_comp_data->cookie;
62 		break;
63 
64 	case QED_SPQ_MODE_CB:
65 		if (!p_data->p_comp_data)
66 			p_ent->comp_cb.function = NULL;
67 		else
68 			p_ent->comp_cb = *p_data->p_comp_data;
69 		break;
70 
71 	default:
72 		DP_NOTICE(p_hwfn, "Unknown SPQE completion mode %d\n",
73 			  p_ent->comp_mode);
74 		return -EINVAL;
75 	}
76 
77 	DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
78 		   "Initialized: CID %08x cmd %02x protocol %02x data_addr %lu comp_mode [%s]\n",
79 		   opaque_cid, cmd, protocol,
80 		   (unsigned long)&p_ent->ramrod,
81 		   D_TRINE(p_ent->comp_mode, QED_SPQ_MODE_EBLOCK,
82 			   QED_SPQ_MODE_BLOCK, "MODE_EBLOCK", "MODE_BLOCK",
83 			   "MODE_CB"));
84 
85 	memset(&p_ent->ramrod, 0, sizeof(p_ent->ramrod));
86 
87 	return 0;
88 }
89 
90 int qed_sp_pf_start(struct qed_hwfn *p_hwfn,
91 		    enum qed_mf_mode mode)
92 {
93 	struct pf_start_ramrod_data *p_ramrod = NULL;
94 	u16 sb = qed_int_get_sp_sb_id(p_hwfn);
95 	u8 sb_index = p_hwfn->p_eq->eq_sb_index;
96 	struct qed_spq_entry *p_ent = NULL;
97 	struct qed_sp_init_data init_data;
98 	int rc = -EINVAL;
99 
100 	/* update initial eq producer */
101 	qed_eq_prod_update(p_hwfn,
102 			   qed_chain_get_prod_idx(&p_hwfn->p_eq->chain));
103 
104 	memset(&init_data, 0, sizeof(init_data));
105 	init_data.cid = qed_spq_get_cid(p_hwfn);
106 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
107 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
108 
109 	rc = qed_sp_init_request(p_hwfn, &p_ent,
110 				 COMMON_RAMROD_PF_START,
111 				 PROTOCOLID_COMMON,
112 				 &init_data);
113 	if (rc)
114 		return rc;
115 
116 	p_ramrod = &p_ent->ramrod.pf_start;
117 
118 	p_ramrod->event_ring_sb_id	= cpu_to_le16(sb);
119 	p_ramrod->event_ring_sb_index	= sb_index;
120 	p_ramrod->path_id		= QED_PATH_ID(p_hwfn);
121 	p_ramrod->dont_log_ramrods	= 0;
122 	p_ramrod->log_type_mask		= cpu_to_le16(0xf);
123 	p_ramrod->mf_mode = mode;
124 	switch (mode) {
125 	case QED_MF_DEFAULT:
126 	case QED_MF_NPAR:
127 		p_ramrod->mf_mode = MF_NPAR;
128 		break;
129 	case QED_MF_OVLAN:
130 		p_ramrod->mf_mode = MF_OVLAN;
131 		break;
132 	default:
133 		DP_NOTICE(p_hwfn, "Unsupported MF mode, init as DEFAULT\n");
134 		p_ramrod->mf_mode = MF_NPAR;
135 	}
136 	p_ramrod->outer_tag = p_hwfn->hw_info.ovlan;
137 
138 	/* Place EQ address in RAMROD */
139 	DMA_REGPAIR_LE(p_ramrod->event_ring_pbl_addr,
140 		       p_hwfn->p_eq->chain.pbl.p_phys_table);
141 	p_ramrod->event_ring_num_pages = (u8)p_hwfn->p_eq->chain.page_cnt;
142 
143 	DMA_REGPAIR_LE(p_ramrod->consolid_q_pbl_addr,
144 		       p_hwfn->p_consq->chain.pbl.p_phys_table);
145 
146 	p_hwfn->hw_info.personality = PERSONALITY_ETH;
147 
148 	DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
149 		   "Setting event_ring_sb [id %04x index %02x], outer_tag [%d]\n",
150 		   sb, sb_index,
151 		   p_ramrod->outer_tag);
152 
153 	return qed_spq_post(p_hwfn, p_ent, NULL);
154 }
155 
156 int qed_sp_pf_stop(struct qed_hwfn *p_hwfn)
157 {
158 	struct qed_spq_entry *p_ent = NULL;
159 	struct qed_sp_init_data init_data;
160 	int rc = -EINVAL;
161 
162 	/* Get SPQ entry */
163 	memset(&init_data, 0, sizeof(init_data));
164 	init_data.cid = qed_spq_get_cid(p_hwfn);
165 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
166 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
167 
168 	rc = qed_sp_init_request(p_hwfn, &p_ent,
169 				 COMMON_RAMROD_PF_STOP, PROTOCOLID_COMMON,
170 				 &init_data);
171 	if (rc)
172 		return rc;
173 
174 	return qed_spq_post(p_hwfn, p_ent, NULL);
175 }
176