11f4d4ed6SAlexander Lobakin // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2fe56b9e6SYuval Mintz /* QLogic qed NIC Driver
3e8f1cb50SMintz, Yuval * Copyright (c) 2015-2017 QLogic Corporation
4663eacd8SAlexander Lobakin * Copyright (c) 2019-2020 Marvell International Ltd.
5fe56b9e6SYuval Mintz */
6fe56b9e6SYuval Mintz
7fe56b9e6SYuval Mintz #include <linux/types.h>
8fe56b9e6SYuval Mintz #include <asm/byteorder.h>
9fe56b9e6SYuval Mintz #include <linux/bitops.h>
10fe56b9e6SYuval Mintz #include <linux/errno.h>
11fe56b9e6SYuval Mintz #include <linux/kernel.h>
12fe56b9e6SYuval Mintz #include <linux/string.h>
13fe56b9e6SYuval Mintz #include "qed.h"
14fe56b9e6SYuval Mintz #include <linux/qed/qed_chain.h>
15fe56b9e6SYuval Mintz #include "qed_cxt.h"
1639651abdSSudarsana Reddy Kalluru #include "qed_dcbx.h"
17fe56b9e6SYuval Mintz #include "qed_hsi.h"
18fe56b9e6SYuval Mintz #include "qed_hw.h"
19fe56b9e6SYuval Mintz #include "qed_int.h"
20fe56b9e6SYuval Mintz #include "qed_reg_addr.h"
21fe56b9e6SYuval Mintz #include "qed_sp.h"
221408cc1fSYuval Mintz #include "qed_sriov.h"
23fe56b9e6SYuval Mintz
qed_sp_destroy_request(struct qed_hwfn * p_hwfn,struct qed_spq_entry * p_ent)24fb5e7438SDenis Bolotin void qed_sp_destroy_request(struct qed_hwfn *p_hwfn,
25fb5e7438SDenis Bolotin struct qed_spq_entry *p_ent)
26fb5e7438SDenis Bolotin {
27fb5e7438SDenis Bolotin /* qed_spq_get_entry() can either get an entry from the free_pool,
28fb5e7438SDenis Bolotin * or, if no entries are left, allocate a new entry and add it to
29fb5e7438SDenis Bolotin * the unlimited_pending list.
30fb5e7438SDenis Bolotin */
31fb5e7438SDenis Bolotin if (p_ent->queue == &p_hwfn->p_spq->unlimited_pending)
32fb5e7438SDenis Bolotin kfree(p_ent);
33fb5e7438SDenis Bolotin else
34fb5e7438SDenis Bolotin qed_spq_return_entry(p_hwfn, p_ent);
35fb5e7438SDenis Bolotin }
36fb5e7438SDenis Bolotin
qed_sp_init_request(struct qed_hwfn * p_hwfn,struct qed_spq_entry ** pp_ent,u8 cmd,u8 protocol,struct qed_sp_init_data * p_data)37fe56b9e6SYuval Mintz int qed_sp_init_request(struct qed_hwfn *p_hwfn,
38fe56b9e6SYuval Mintz struct qed_spq_entry **pp_ent,
391a635e48SYuval Mintz u8 cmd, u8 protocol, struct qed_sp_init_data *p_data)
40fe56b9e6SYuval Mintz {
4106f56b81SYuval Mintz u32 opaque_cid = p_data->opaque_fid << 16 | p_data->cid;
42fe56b9e6SYuval Mintz struct qed_spq_entry *p_ent = NULL;
4306f56b81SYuval Mintz int rc;
44fe56b9e6SYuval Mintz
45fe56b9e6SYuval Mintz if (!pp_ent)
46fe56b9e6SYuval Mintz return -ENOMEM;
47fe56b9e6SYuval Mintz
48fe56b9e6SYuval Mintz rc = qed_spq_get_entry(p_hwfn, pp_ent);
49fe56b9e6SYuval Mintz
501a635e48SYuval Mintz if (rc)
51fe56b9e6SYuval Mintz return rc;
52fe56b9e6SYuval Mintz
53fe56b9e6SYuval Mintz p_ent = *pp_ent;
54fe56b9e6SYuval Mintz
55fe56b9e6SYuval Mintz p_ent->elem.hdr.cid = cpu_to_le32(opaque_cid);
56fe56b9e6SYuval Mintz p_ent->elem.hdr.cmd_id = cmd;
57fe56b9e6SYuval Mintz p_ent->elem.hdr.protocol_id = protocol;
58fe56b9e6SYuval Mintz
59fe56b9e6SYuval Mintz p_ent->priority = QED_SPQ_PRIORITY_NORMAL;
6006f56b81SYuval Mintz p_ent->comp_mode = p_data->comp_mode;
61fe56b9e6SYuval Mintz p_ent->comp_done.done = 0;
62fe56b9e6SYuval Mintz
63fe56b9e6SYuval Mintz switch (p_ent->comp_mode) {
64fe56b9e6SYuval Mintz case QED_SPQ_MODE_EBLOCK:
65fe56b9e6SYuval Mintz p_ent->comp_cb.cookie = &p_ent->comp_done;
66fe56b9e6SYuval Mintz break;
67fe56b9e6SYuval Mintz
68fe56b9e6SYuval Mintz case QED_SPQ_MODE_BLOCK:
6906f56b81SYuval Mintz if (!p_data->p_comp_data)
7039477551SDenis Bolotin goto err;
71fe56b9e6SYuval Mintz
7206f56b81SYuval Mintz p_ent->comp_cb.cookie = p_data->p_comp_data->cookie;
73fe56b9e6SYuval Mintz break;
74fe56b9e6SYuval Mintz
75fe56b9e6SYuval Mintz case QED_SPQ_MODE_CB:
7606f56b81SYuval Mintz if (!p_data->p_comp_data)
77fe56b9e6SYuval Mintz p_ent->comp_cb.function = NULL;
78fe56b9e6SYuval Mintz else
7906f56b81SYuval Mintz p_ent->comp_cb = *p_data->p_comp_data;
80fe56b9e6SYuval Mintz break;
81fe56b9e6SYuval Mintz
82fe56b9e6SYuval Mintz default:
83fe56b9e6SYuval Mintz DP_NOTICE(p_hwfn, "Unknown SPQE completion mode %d\n",
84fe56b9e6SYuval Mintz p_ent->comp_mode);
8539477551SDenis Bolotin goto err;
86fe56b9e6SYuval Mintz }
87fe56b9e6SYuval Mintz
88*7e9979e3SPrabhakar Kushwaha DP_VERBOSE(p_hwfn,
89*7e9979e3SPrabhakar Kushwaha QED_MSG_SPQ,
90*7e9979e3SPrabhakar Kushwaha "Initialized: CID %08x %s:[%02x] %s:%02x data_addr %llx comp_mode [%s]\n",
91*7e9979e3SPrabhakar Kushwaha opaque_cid, qed_get_ramrod_cmd_id_str(protocol, cmd),
92*7e9979e3SPrabhakar Kushwaha cmd, qed_get_protocol_type_str(protocol), protocol,
93*7e9979e3SPrabhakar Kushwaha (unsigned long long)(uintptr_t)&p_ent->ramrod,
94fe56b9e6SYuval Mintz D_TRINE(p_ent->comp_mode, QED_SPQ_MODE_EBLOCK,
95fe56b9e6SYuval Mintz QED_SPQ_MODE_BLOCK, "MODE_EBLOCK", "MODE_BLOCK",
96fe56b9e6SYuval Mintz "MODE_CB"));
9706f56b81SYuval Mintz
9806f56b81SYuval Mintz memset(&p_ent->ramrod, 0, sizeof(p_ent->ramrod));
99fe56b9e6SYuval Mintz
100fe56b9e6SYuval Mintz return 0;
10139477551SDenis Bolotin
10239477551SDenis Bolotin err:
103fb5e7438SDenis Bolotin qed_sp_destroy_request(p_hwfn, p_ent);
10439477551SDenis Bolotin
10539477551SDenis Bolotin return -EINVAL;
106fe56b9e6SYuval Mintz }
107fe56b9e6SYuval Mintz
qed_tunn_clss_to_fw_clss(u8 type)10819968430SChopra, Manish static enum tunnel_clss qed_tunn_clss_to_fw_clss(u8 type)
109464f6645SManish Chopra {
110464f6645SManish Chopra switch (type) {
111464f6645SManish Chopra case QED_TUNN_CLSS_MAC_VLAN:
112464f6645SManish Chopra return TUNNEL_CLSS_MAC_VLAN;
113464f6645SManish Chopra case QED_TUNN_CLSS_MAC_VNI:
114464f6645SManish Chopra return TUNNEL_CLSS_MAC_VNI;
115464f6645SManish Chopra case QED_TUNN_CLSS_INNER_MAC_VLAN:
116464f6645SManish Chopra return TUNNEL_CLSS_INNER_MAC_VLAN;
117464f6645SManish Chopra case QED_TUNN_CLSS_INNER_MAC_VNI:
118464f6645SManish Chopra return TUNNEL_CLSS_INNER_MAC_VNI;
11919968430SChopra, Manish case QED_TUNN_CLSS_MAC_VLAN_DUAL_STAGE:
12019968430SChopra, Manish return TUNNEL_CLSS_MAC_VLAN_DUAL_STAGE;
121464f6645SManish Chopra default:
122464f6645SManish Chopra return TUNNEL_CLSS_MAC_VLAN;
123464f6645SManish Chopra }
124464f6645SManish Chopra }
125464f6645SManish Chopra
126464f6645SManish Chopra static void
qed_set_pf_update_tunn_mode(struct qed_tunnel_info * p_tun,struct qed_tunnel_info * p_src,bool b_pf_start)12719968430SChopra, Manish qed_set_pf_update_tunn_mode(struct qed_tunnel_info *p_tun,
12819968430SChopra, Manish struct qed_tunnel_info *p_src, bool b_pf_start)
129464f6645SManish Chopra {
13019968430SChopra, Manish if (p_src->vxlan.b_update_mode || b_pf_start)
13119968430SChopra, Manish p_tun->vxlan.b_mode_enabled = p_src->vxlan.b_mode_enabled;
132464f6645SManish Chopra
13319968430SChopra, Manish if (p_src->l2_gre.b_update_mode || b_pf_start)
13419968430SChopra, Manish p_tun->l2_gre.b_mode_enabled = p_src->l2_gre.b_mode_enabled;
13519968430SChopra, Manish
13619968430SChopra, Manish if (p_src->ip_gre.b_update_mode || b_pf_start)
13719968430SChopra, Manish p_tun->ip_gre.b_mode_enabled = p_src->ip_gre.b_mode_enabled;
13819968430SChopra, Manish
13919968430SChopra, Manish if (p_src->l2_geneve.b_update_mode || b_pf_start)
14019968430SChopra, Manish p_tun->l2_geneve.b_mode_enabled =
14119968430SChopra, Manish p_src->l2_geneve.b_mode_enabled;
14219968430SChopra, Manish
14319968430SChopra, Manish if (p_src->ip_geneve.b_update_mode || b_pf_start)
14419968430SChopra, Manish p_tun->ip_geneve.b_mode_enabled =
14519968430SChopra, Manish p_src->ip_geneve.b_mode_enabled;
146464f6645SManish Chopra }
147464f6645SManish Chopra
qed_set_tunn_cls_info(struct qed_tunnel_info * p_tun,struct qed_tunnel_info * p_src)14819968430SChopra, Manish static void qed_set_tunn_cls_info(struct qed_tunnel_info *p_tun,
14919968430SChopra, Manish struct qed_tunnel_info *p_src)
15019968430SChopra, Manish {
151a898fba3SNathan Chancellor int type;
15219968430SChopra, Manish
15319968430SChopra, Manish p_tun->b_update_rx_cls = p_src->b_update_rx_cls;
15419968430SChopra, Manish p_tun->b_update_tx_cls = p_src->b_update_tx_cls;
15519968430SChopra, Manish
15619968430SChopra, Manish type = qed_tunn_clss_to_fw_clss(p_src->vxlan.tun_cls);
15719968430SChopra, Manish p_tun->vxlan.tun_cls = type;
15819968430SChopra, Manish type = qed_tunn_clss_to_fw_clss(p_src->l2_gre.tun_cls);
15919968430SChopra, Manish p_tun->l2_gre.tun_cls = type;
16019968430SChopra, Manish type = qed_tunn_clss_to_fw_clss(p_src->ip_gre.tun_cls);
16119968430SChopra, Manish p_tun->ip_gre.tun_cls = type;
16219968430SChopra, Manish type = qed_tunn_clss_to_fw_clss(p_src->l2_geneve.tun_cls);
16319968430SChopra, Manish p_tun->l2_geneve.tun_cls = type;
16419968430SChopra, Manish type = qed_tunn_clss_to_fw_clss(p_src->ip_geneve.tun_cls);
16519968430SChopra, Manish p_tun->ip_geneve.tun_cls = type;
166464f6645SManish Chopra }
167464f6645SManish Chopra
qed_set_tunn_ports(struct qed_tunnel_info * p_tun,struct qed_tunnel_info * p_src)16819968430SChopra, Manish static void qed_set_tunn_ports(struct qed_tunnel_info *p_tun,
16919968430SChopra, Manish struct qed_tunnel_info *p_src)
17019968430SChopra, Manish {
17119968430SChopra, Manish p_tun->geneve_port.b_update_port = p_src->geneve_port.b_update_port;
17219968430SChopra, Manish p_tun->vxlan_port.b_update_port = p_src->vxlan_port.b_update_port;
17319968430SChopra, Manish
17419968430SChopra, Manish if (p_src->geneve_port.b_update_port)
17519968430SChopra, Manish p_tun->geneve_port.port = p_src->geneve_port.port;
17619968430SChopra, Manish
17719968430SChopra, Manish if (p_src->vxlan_port.b_update_port)
17819968430SChopra, Manish p_tun->vxlan_port.port = p_src->vxlan_port.port;
179464f6645SManish Chopra }
180464f6645SManish Chopra
18119968430SChopra, Manish static void
__qed_set_ramrod_tunnel_param(u8 * p_tunn_cls,struct qed_tunn_update_type * tun_type)1827b6859fbSMintz, Yuval __qed_set_ramrod_tunnel_param(u8 *p_tunn_cls,
18319968430SChopra, Manish struct qed_tunn_update_type *tun_type)
18419968430SChopra, Manish {
18519968430SChopra, Manish *p_tunn_cls = tun_type->tun_cls;
186464f6645SManish Chopra }
187464f6645SManish Chopra
18819968430SChopra, Manish static void
qed_set_ramrod_tunnel_param(u8 * p_tunn_cls,struct qed_tunn_update_type * tun_type,u8 * p_update_port,__le16 * p_port,struct qed_tunn_update_udp_port * p_udp_port)1897b6859fbSMintz, Yuval qed_set_ramrod_tunnel_param(u8 *p_tunn_cls,
19019968430SChopra, Manish struct qed_tunn_update_type *tun_type,
1917b6859fbSMintz, Yuval u8 *p_update_port,
1927b6859fbSMintz, Yuval __le16 *p_port,
19319968430SChopra, Manish struct qed_tunn_update_udp_port *p_udp_port)
19419968430SChopra, Manish {
1957b6859fbSMintz, Yuval __qed_set_ramrod_tunnel_param(p_tunn_cls, tun_type);
19619968430SChopra, Manish if (p_udp_port->b_update_port) {
19719968430SChopra, Manish *p_update_port = 1;
19819968430SChopra, Manish *p_port = cpu_to_le16(p_udp_port->port);
199464f6645SManish Chopra }
200464f6645SManish Chopra }
201464f6645SManish Chopra
202464f6645SManish Chopra static void
qed_tunn_set_pf_update_params(struct qed_hwfn * p_hwfn,struct qed_tunnel_info * p_src,struct pf_update_tunnel_config * p_tunn_cfg)203464f6645SManish Chopra qed_tunn_set_pf_update_params(struct qed_hwfn *p_hwfn,
20419968430SChopra, Manish struct qed_tunnel_info *p_src,
205464f6645SManish Chopra struct pf_update_tunnel_config *p_tunn_cfg)
206464f6645SManish Chopra {
20719968430SChopra, Manish struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
208464f6645SManish Chopra
20919968430SChopra, Manish qed_set_pf_update_tunn_mode(p_tun, p_src, false);
21019968430SChopra, Manish qed_set_tunn_cls_info(p_tun, p_src);
21119968430SChopra, Manish qed_set_tunn_ports(p_tun, p_src);
212464f6645SManish Chopra
21319968430SChopra, Manish qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_vxlan,
21419968430SChopra, Manish &p_tun->vxlan,
21519968430SChopra, Manish &p_tunn_cfg->set_vxlan_udp_port_flg,
21619968430SChopra, Manish &p_tunn_cfg->vxlan_udp_port,
21719968430SChopra, Manish &p_tun->vxlan_port);
218464f6645SManish Chopra
21919968430SChopra, Manish qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_l2geneve,
22019968430SChopra, Manish &p_tun->l2_geneve,
22119968430SChopra, Manish &p_tunn_cfg->set_geneve_udp_port_flg,
22219968430SChopra, Manish &p_tunn_cfg->geneve_udp_port,
22319968430SChopra, Manish &p_tun->geneve_port);
224464f6645SManish Chopra
22519968430SChopra, Manish __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_ipgeneve,
22619968430SChopra, Manish &p_tun->ip_geneve);
227464f6645SManish Chopra
22819968430SChopra, Manish __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_l2gre,
22919968430SChopra, Manish &p_tun->l2_gre);
230464f6645SManish Chopra
23119968430SChopra, Manish __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_ipgre,
23219968430SChopra, Manish &p_tun->ip_gre);
233464f6645SManish Chopra
23419968430SChopra, Manish p_tunn_cfg->update_rx_pf_clss = p_tun->b_update_rx_cls;
235464f6645SManish Chopra }
236464f6645SManish Chopra
qed_set_hw_tunn_mode(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_tunnel_info * p_tun)237464f6645SManish Chopra static void qed_set_hw_tunn_mode(struct qed_hwfn *p_hwfn,
238464f6645SManish Chopra struct qed_ptt *p_ptt,
23919968430SChopra, Manish struct qed_tunnel_info *p_tun)
240464f6645SManish Chopra {
24119968430SChopra, Manish qed_set_gre_enable(p_hwfn, p_ptt, p_tun->l2_gre.b_mode_enabled,
24219968430SChopra, Manish p_tun->ip_gre.b_mode_enabled);
24319968430SChopra, Manish qed_set_vxlan_enable(p_hwfn, p_ptt, p_tun->vxlan.b_mode_enabled);
244464f6645SManish Chopra
24519968430SChopra, Manish qed_set_geneve_enable(p_hwfn, p_ptt, p_tun->l2_geneve.b_mode_enabled,
24619968430SChopra, Manish p_tun->ip_geneve.b_mode_enabled);
24719968430SChopra, Manish }
248464f6645SManish Chopra
qed_set_hw_tunn_mode_port(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_tunnel_info * p_tunn)24919968430SChopra, Manish static void qed_set_hw_tunn_mode_port(struct qed_hwfn *p_hwfn,
2504f64675fSManish Chopra struct qed_ptt *p_ptt,
25119968430SChopra, Manish struct qed_tunnel_info *p_tunn)
25219968430SChopra, Manish {
25319968430SChopra, Manish if (p_tunn->vxlan_port.b_update_port)
2544f64675fSManish Chopra qed_set_vxlan_dest_port(p_hwfn, p_ptt,
25519968430SChopra, Manish p_tunn->vxlan_port.port);
256464f6645SManish Chopra
25719968430SChopra, Manish if (p_tunn->geneve_port.b_update_port)
2584f64675fSManish Chopra qed_set_geneve_dest_port(p_hwfn, p_ptt,
25919968430SChopra, Manish p_tunn->geneve_port.port);
260464f6645SManish Chopra
2614f64675fSManish Chopra qed_set_hw_tunn_mode(p_hwfn, p_ptt, p_tunn);
262464f6645SManish Chopra }
263464f6645SManish Chopra
264464f6645SManish Chopra static void
qed_tunn_set_pf_start_params(struct qed_hwfn * p_hwfn,struct qed_tunnel_info * p_src,struct pf_start_tunnel_config * p_tunn_cfg)265464f6645SManish Chopra qed_tunn_set_pf_start_params(struct qed_hwfn *p_hwfn,
26619968430SChopra, Manish struct qed_tunnel_info *p_src,
267464f6645SManish Chopra struct pf_start_tunnel_config *p_tunn_cfg)
268464f6645SManish Chopra {
26919968430SChopra, Manish struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
270464f6645SManish Chopra
271464f6645SManish Chopra if (!p_src)
272464f6645SManish Chopra return;
273464f6645SManish Chopra
27419968430SChopra, Manish qed_set_pf_update_tunn_mode(p_tun, p_src, true);
27519968430SChopra, Manish qed_set_tunn_cls_info(p_tun, p_src);
27619968430SChopra, Manish qed_set_tunn_ports(p_tun, p_src);
277464f6645SManish Chopra
27819968430SChopra, Manish qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_vxlan,
27919968430SChopra, Manish &p_tun->vxlan,
28019968430SChopra, Manish &p_tunn_cfg->set_vxlan_udp_port_flg,
28119968430SChopra, Manish &p_tunn_cfg->vxlan_udp_port,
28219968430SChopra, Manish &p_tun->vxlan_port);
283464f6645SManish Chopra
28419968430SChopra, Manish qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_l2geneve,
28519968430SChopra, Manish &p_tun->l2_geneve,
28619968430SChopra, Manish &p_tunn_cfg->set_geneve_udp_port_flg,
28719968430SChopra, Manish &p_tunn_cfg->geneve_udp_port,
28819968430SChopra, Manish &p_tun->geneve_port);
289464f6645SManish Chopra
29019968430SChopra, Manish __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_ipgeneve,
29119968430SChopra, Manish &p_tun->ip_geneve);
292464f6645SManish Chopra
29319968430SChopra, Manish __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_l2gre,
29419968430SChopra, Manish &p_tun->l2_gre);
295464f6645SManish Chopra
29619968430SChopra, Manish __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_ipgre,
29719968430SChopra, Manish &p_tun->ip_gre);
298464f6645SManish Chopra }
299464f6645SManish Chopra
qed_sp_pf_start(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_tunnel_info * p_tunn,bool allow_npar_tx_switch)300fe56b9e6SYuval Mintz int qed_sp_pf_start(struct qed_hwfn *p_hwfn,
3014f64675fSManish Chopra struct qed_ptt *p_ptt,
30219968430SChopra, Manish struct qed_tunnel_info *p_tunn,
3030bc5fe85SSudarsana Reddy Kalluru bool allow_npar_tx_switch)
304fe56b9e6SYuval Mintz {
305a0f3266fSAlexander Lobakin struct outer_tag_config_struct *outer_tag_config;
306fe56b9e6SYuval Mintz struct pf_start_ramrod_data *p_ramrod = NULL;
307fe56b9e6SYuval Mintz u16 sb = qed_int_get_sp_sb_id(p_hwfn);
308fe56b9e6SYuval Mintz u8 sb_index = p_hwfn->p_eq->eq_sb_index;
309fe56b9e6SYuval Mintz struct qed_spq_entry *p_ent = NULL;
31006f56b81SYuval Mintz struct qed_sp_init_data init_data;
311cac6f691SSudarsana Reddy Kalluru u8 page_cnt, i;
312e70ac628SColin Ian King int rc;
313fe56b9e6SYuval Mintz
314fe56b9e6SYuval Mintz /* update initial eq producer */
315fe56b9e6SYuval Mintz qed_eq_prod_update(p_hwfn,
316fe56b9e6SYuval Mintz qed_chain_get_prod_idx(&p_hwfn->p_eq->chain));
317fe56b9e6SYuval Mintz
31806f56b81SYuval Mintz memset(&init_data, 0, sizeof(init_data));
31906f56b81SYuval Mintz init_data.cid = qed_spq_get_cid(p_hwfn);
32006f56b81SYuval Mintz init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
32106f56b81SYuval Mintz init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
322fe56b9e6SYuval Mintz
32306f56b81SYuval Mintz rc = qed_sp_init_request(p_hwfn, &p_ent,
324fe56b9e6SYuval Mintz COMMON_RAMROD_PF_START,
3251a635e48SYuval Mintz PROTOCOLID_COMMON, &init_data);
326fe56b9e6SYuval Mintz if (rc)
327fe56b9e6SYuval Mintz return rc;
328fe56b9e6SYuval Mintz
329fe56b9e6SYuval Mintz p_ramrod = &p_ent->ramrod.pf_start;
330fe56b9e6SYuval Mintz
331fe56b9e6SYuval Mintz p_ramrod->event_ring_sb_id = cpu_to_le16(sb);
332fe56b9e6SYuval Mintz p_ramrod->event_ring_sb_index = sb_index;
333fe56b9e6SYuval Mintz p_ramrod->path_id = QED_PATH_ID(p_hwfn);
334fe56b9e6SYuval Mintz p_ramrod->dont_log_ramrods = 0;
335fe56b9e6SYuval Mintz p_ramrod->log_type_mask = cpu_to_le16(0xf);
336351a4dedSYuval Mintz
3370bc5fe85SSudarsana Reddy Kalluru if (test_bit(QED_MF_OVLAN_CLSS, &p_hwfn->cdev->mf_bits))
338fc48b7a6SYuval Mintz p_ramrod->mf_mode = MF_OVLAN;
3390bc5fe85SSudarsana Reddy Kalluru else
340fc48b7a6SYuval Mintz p_ramrod->mf_mode = MF_NPAR;
341da090917STomer Tayar
342a0f3266fSAlexander Lobakin outer_tag_config = &p_ramrod->outer_tag_config;
343a0f3266fSAlexander Lobakin outer_tag_config->outer_tag.tci = cpu_to_le16(p_hwfn->hw_info.ovlan);
344a0f3266fSAlexander Lobakin
345cac6f691SSudarsana Reddy Kalluru if (test_bit(QED_MF_8021Q_TAGGING, &p_hwfn->cdev->mf_bits)) {
3465ab90341SAlexander Lobakin outer_tag_config->outer_tag.tpid = cpu_to_le16(ETH_P_8021Q);
347cac6f691SSudarsana Reddy Kalluru } else if (test_bit(QED_MF_8021AD_TAGGING, &p_hwfn->cdev->mf_bits)) {
3485ab90341SAlexander Lobakin outer_tag_config->outer_tag.tpid = cpu_to_le16(ETH_P_8021AD);
349a0f3266fSAlexander Lobakin outer_tag_config->enable_stag_pri_change = 1;
350b51bdfb9SSudarsana Reddy Kalluru }
351b51bdfb9SSudarsana Reddy Kalluru
352a0f3266fSAlexander Lobakin outer_tag_config->pri_map_valid = 1;
353cac6f691SSudarsana Reddy Kalluru for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
354a0f3266fSAlexander Lobakin outer_tag_config->inner_to_outer_pri_map[i] = i;
355cac6f691SSudarsana Reddy Kalluru
356cac6f691SSudarsana Reddy Kalluru /* enable_stag_pri_change should be set if port is in BD mode or,
357cac6f691SSudarsana Reddy Kalluru * UFP with Host Control mode.
358cac6f691SSudarsana Reddy Kalluru */
359cac6f691SSudarsana Reddy Kalluru if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) {
360cac6f691SSudarsana Reddy Kalluru if (p_hwfn->ufp_info.pri_type == QED_UFP_PRI_OS)
361a0f3266fSAlexander Lobakin outer_tag_config->enable_stag_pri_change = 1;
362cac6f691SSudarsana Reddy Kalluru else
363a0f3266fSAlexander Lobakin outer_tag_config->enable_stag_pri_change = 0;
364cac6f691SSudarsana Reddy Kalluru
365a0f3266fSAlexander Lobakin outer_tag_config->outer_tag.tci |=
366cac6f691SSudarsana Reddy Kalluru cpu_to_le16(((u16)p_hwfn->ufp_info.tc << 13));
367cac6f691SSudarsana Reddy Kalluru }
368fe56b9e6SYuval Mintz
369fe56b9e6SYuval Mintz /* Place EQ address in RAMROD */
37094494598SYuval Mintz DMA_REGPAIR_LE(p_ramrod->event_ring_pbl_addr,
3719b6ee3cfSAlexander Lobakin qed_chain_get_pbl_phys(&p_hwfn->p_eq->chain));
372a91eb52aSYuval Mintz page_cnt = (u8)qed_chain_get_page_cnt(&p_hwfn->p_eq->chain);
373a91eb52aSYuval Mintz p_ramrod->event_ring_num_pages = page_cnt;
374fe40a830SPrabhakar Kushwaha
375fe40a830SPrabhakar Kushwaha /* Place consolidation queue address in ramrod */
376fe40a830SPrabhakar Kushwaha DMA_REGPAIR_LE(p_ramrod->consolid_q_pbl_base_addr,
3779b6ee3cfSAlexander Lobakin qed_chain_get_pbl_phys(&p_hwfn->p_consq->chain));
378fe40a830SPrabhakar Kushwaha page_cnt = (u8)qed_chain_get_page_cnt(&p_hwfn->p_consq->chain);
379fe40a830SPrabhakar Kushwaha p_ramrod->consolid_q_num_pages = page_cnt;
380fe56b9e6SYuval Mintz
3811a635e48SYuval Mintz qed_tunn_set_pf_start_params(p_hwfn, p_tunn, &p_ramrod->tunnel_config);
382fe56b9e6SYuval Mintz
3830bc5fe85SSudarsana Reddy Kalluru if (test_bit(QED_MF_INTER_PF_SWITCH, &p_hwfn->cdev->mf_bits))
384831bfb0eSYuval Mintz p_ramrod->allow_npar_tx_switching = allow_npar_tx_switch;
385831bfb0eSYuval Mintz
386c5ac9319SYuval Mintz switch (p_hwfn->hw_info.personality) {
387c5ac9319SYuval Mintz case QED_PCI_ETH:
388c5ac9319SYuval Mintz p_ramrod->personality = PERSONALITY_ETH;
389c5ac9319SYuval Mintz break;
3901e128c81SArun Easi case QED_PCI_FCOE:
3911e128c81SArun Easi p_ramrod->personality = PERSONALITY_FCOE;
3921e128c81SArun Easi break;
393c5ac9319SYuval Mintz case QED_PCI_ISCSI:
394897e87a1SShai Malin case QED_PCI_NVMETCP:
3951bd4f571SOmkar Kulkarni p_ramrod->personality = PERSONALITY_TCP_ULP;
396c5ac9319SYuval Mintz break;
397c5ac9319SYuval Mintz case QED_PCI_ETH_ROCE:
398e0a8f9deSMichal Kalderon case QED_PCI_ETH_IWARP:
399c5ac9319SYuval Mintz p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
400c5ac9319SYuval Mintz break;
401c5ac9319SYuval Mintz default:
4029165dabbSMasanari Iida DP_NOTICE(p_hwfn, "Unknown personality %d\n",
403c5ac9319SYuval Mintz p_hwfn->hw_info.personality);
404c5ac9319SYuval Mintz p_ramrod->personality = PERSONALITY_ETH;
405c5ac9319SYuval Mintz }
406c5ac9319SYuval Mintz
4071408cc1fSYuval Mintz if (p_hwfn->cdev->p_iov_info) {
4081408cc1fSYuval Mintz struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
4091408cc1fSYuval Mintz
4101408cc1fSYuval Mintz p_ramrod->base_vf_id = (u8)p_iov->first_vf_in_pf;
4111408cc1fSYuval Mintz p_ramrod->num_vfs = (u8)p_iov->total_vfs;
4121408cc1fSYuval Mintz }
413351a4dedSYuval Mintz p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
414351a4dedSYuval Mintz p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MINOR;
4151408cc1fSYuval Mintz
416fe56b9e6SYuval Mintz DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
417da090917STomer Tayar "Setting event_ring_sb [id %04x index %02x], outer_tag.tci [%d]\n",
418a0f3266fSAlexander Lobakin sb, sb_index, outer_tag_config->outer_tag.tci);
419fe56b9e6SYuval Mintz
420c0f31a05SManish Chopra rc = qed_spq_post(p_hwfn, p_ent, NULL);
421c0f31a05SManish Chopra
42219968430SChopra, Manish if (p_tunn)
4234f64675fSManish Chopra qed_set_hw_tunn_mode_port(p_hwfn, p_ptt,
4244f64675fSManish Chopra &p_hwfn->cdev->tunnel);
425c0f31a05SManish Chopra
426c0f31a05SManish Chopra return rc;
427fe56b9e6SYuval Mintz }
428fe56b9e6SYuval Mintz
qed_sp_pf_update(struct qed_hwfn * p_hwfn)42939651abdSSudarsana Reddy Kalluru int qed_sp_pf_update(struct qed_hwfn *p_hwfn)
43039651abdSSudarsana Reddy Kalluru {
43139651abdSSudarsana Reddy Kalluru struct qed_spq_entry *p_ent = NULL;
43239651abdSSudarsana Reddy Kalluru struct qed_sp_init_data init_data;
433e70ac628SColin Ian King int rc;
43439651abdSSudarsana Reddy Kalluru
43539651abdSSudarsana Reddy Kalluru /* Get SPQ entry */
43639651abdSSudarsana Reddy Kalluru memset(&init_data, 0, sizeof(init_data));
43739651abdSSudarsana Reddy Kalluru init_data.cid = qed_spq_get_cid(p_hwfn);
43839651abdSSudarsana Reddy Kalluru init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
43939651abdSSudarsana Reddy Kalluru init_data.comp_mode = QED_SPQ_MODE_CB;
44039651abdSSudarsana Reddy Kalluru
44139651abdSSudarsana Reddy Kalluru rc = qed_sp_init_request(p_hwfn, &p_ent,
44239651abdSSudarsana Reddy Kalluru COMMON_RAMROD_PF_UPDATE, PROTOCOLID_COMMON,
44339651abdSSudarsana Reddy Kalluru &init_data);
44439651abdSSudarsana Reddy Kalluru if (rc)
44539651abdSSudarsana Reddy Kalluru return rc;
44639651abdSSudarsana Reddy Kalluru
44739651abdSSudarsana Reddy Kalluru qed_dcbx_set_pf_update_params(&p_hwfn->p_dcbx_info->results,
44839651abdSSudarsana Reddy Kalluru &p_ent->ramrod.pf_update);
44939651abdSSudarsana Reddy Kalluru
45039651abdSSudarsana Reddy Kalluru return qed_spq_post(p_hwfn, p_ent, NULL);
45139651abdSSudarsana Reddy Kalluru }
45239651abdSSudarsana Reddy Kalluru
qed_sp_pf_update_ufp(struct qed_hwfn * p_hwfn)453cac6f691SSudarsana Reddy Kalluru int qed_sp_pf_update_ufp(struct qed_hwfn *p_hwfn)
454cac6f691SSudarsana Reddy Kalluru {
455cac6f691SSudarsana Reddy Kalluru struct qed_spq_entry *p_ent = NULL;
456cac6f691SSudarsana Reddy Kalluru struct qed_sp_init_data init_data;
457e70ac628SColin Ian King int rc;
458cac6f691SSudarsana Reddy Kalluru
459cac6f691SSudarsana Reddy Kalluru if (p_hwfn->ufp_info.pri_type == QED_UFP_PRI_UNKNOWN) {
460cac6f691SSudarsana Reddy Kalluru DP_INFO(p_hwfn, "Invalid priority type %d\n",
461cac6f691SSudarsana Reddy Kalluru p_hwfn->ufp_info.pri_type);
462cac6f691SSudarsana Reddy Kalluru return -EINVAL;
463cac6f691SSudarsana Reddy Kalluru }
464cac6f691SSudarsana Reddy Kalluru
465cac6f691SSudarsana Reddy Kalluru /* Get SPQ entry */
466cac6f691SSudarsana Reddy Kalluru memset(&init_data, 0, sizeof(init_data));
467cac6f691SSudarsana Reddy Kalluru init_data.cid = qed_spq_get_cid(p_hwfn);
468cac6f691SSudarsana Reddy Kalluru init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
469cac6f691SSudarsana Reddy Kalluru init_data.comp_mode = QED_SPQ_MODE_CB;
470cac6f691SSudarsana Reddy Kalluru
471cac6f691SSudarsana Reddy Kalluru rc = qed_sp_init_request(p_hwfn, &p_ent,
472cac6f691SSudarsana Reddy Kalluru COMMON_RAMROD_PF_UPDATE, PROTOCOLID_COMMON,
473cac6f691SSudarsana Reddy Kalluru &init_data);
474cac6f691SSudarsana Reddy Kalluru if (rc)
475cac6f691SSudarsana Reddy Kalluru return rc;
476cac6f691SSudarsana Reddy Kalluru
477cac6f691SSudarsana Reddy Kalluru p_ent->ramrod.pf_update.update_enable_stag_pri_change = true;
478cac6f691SSudarsana Reddy Kalluru if (p_hwfn->ufp_info.pri_type == QED_UFP_PRI_OS)
479cac6f691SSudarsana Reddy Kalluru p_ent->ramrod.pf_update.enable_stag_pri_change = 1;
480cac6f691SSudarsana Reddy Kalluru else
481cac6f691SSudarsana Reddy Kalluru p_ent->ramrod.pf_update.enable_stag_pri_change = 0;
482cac6f691SSudarsana Reddy Kalluru
483cac6f691SSudarsana Reddy Kalluru return qed_spq_post(p_hwfn, p_ent, NULL);
484cac6f691SSudarsana Reddy Kalluru }
485cac6f691SSudarsana Reddy Kalluru
486464f6645SManish Chopra /* Set pf update ramrod command params */
qed_sp_pf_update_tunn_cfg(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_tunnel_info * p_tunn,enum spq_mode comp_mode,struct qed_spq_comp_cb * p_comp_data)487464f6645SManish Chopra int qed_sp_pf_update_tunn_cfg(struct qed_hwfn *p_hwfn,
4884f64675fSManish Chopra struct qed_ptt *p_ptt,
48919968430SChopra, Manish struct qed_tunnel_info *p_tunn,
490464f6645SManish Chopra enum spq_mode comp_mode,
491464f6645SManish Chopra struct qed_spq_comp_cb *p_comp_data)
492464f6645SManish Chopra {
493464f6645SManish Chopra struct qed_spq_entry *p_ent = NULL;
494464f6645SManish Chopra struct qed_sp_init_data init_data;
495e70ac628SColin Ian King int rc;
496464f6645SManish Chopra
497eaf3c0c6SChopra, Manish if (IS_VF(p_hwfn->cdev))
498eaf3c0c6SChopra, Manish return qed_vf_pf_tunnel_param_update(p_hwfn, p_tunn);
499eaf3c0c6SChopra, Manish
50019968430SChopra, Manish if (!p_tunn)
50119968430SChopra, Manish return -EINVAL;
50219968430SChopra, Manish
503464f6645SManish Chopra /* Get SPQ entry */
504464f6645SManish Chopra memset(&init_data, 0, sizeof(init_data));
505464f6645SManish Chopra init_data.cid = qed_spq_get_cid(p_hwfn);
506464f6645SManish Chopra init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
507464f6645SManish Chopra init_data.comp_mode = comp_mode;
508464f6645SManish Chopra init_data.p_comp_data = p_comp_data;
509464f6645SManish Chopra
510464f6645SManish Chopra rc = qed_sp_init_request(p_hwfn, &p_ent,
511464f6645SManish Chopra COMMON_RAMROD_PF_UPDATE, PROTOCOLID_COMMON,
512464f6645SManish Chopra &init_data);
513464f6645SManish Chopra if (rc)
514464f6645SManish Chopra return rc;
515464f6645SManish Chopra
516464f6645SManish Chopra qed_tunn_set_pf_update_params(p_hwfn, p_tunn,
517464f6645SManish Chopra &p_ent->ramrod.pf_update.tunnel_config);
518464f6645SManish Chopra
519464f6645SManish Chopra rc = qed_spq_post(p_hwfn, p_ent, NULL);
520464f6645SManish Chopra if (rc)
521464f6645SManish Chopra return rc;
522464f6645SManish Chopra
5234f64675fSManish Chopra qed_set_hw_tunn_mode_port(p_hwfn, p_ptt, &p_hwfn->cdev->tunnel);
524464f6645SManish Chopra
525464f6645SManish Chopra return rc;
526464f6645SManish Chopra }
527464f6645SManish Chopra
qed_sp_pf_stop(struct qed_hwfn * p_hwfn)528fe56b9e6SYuval Mintz int qed_sp_pf_stop(struct qed_hwfn *p_hwfn)
529fe56b9e6SYuval Mintz {
530fe56b9e6SYuval Mintz struct qed_spq_entry *p_ent = NULL;
53106f56b81SYuval Mintz struct qed_sp_init_data init_data;
532e70ac628SColin Ian King int rc;
533fe56b9e6SYuval Mintz
53406f56b81SYuval Mintz /* Get SPQ entry */
53506f56b81SYuval Mintz memset(&init_data, 0, sizeof(init_data));
53606f56b81SYuval Mintz init_data.cid = qed_spq_get_cid(p_hwfn);
53706f56b81SYuval Mintz init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
53806f56b81SYuval Mintz init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
539fe56b9e6SYuval Mintz
54006f56b81SYuval Mintz rc = qed_sp_init_request(p_hwfn, &p_ent,
541fe56b9e6SYuval Mintz COMMON_RAMROD_PF_STOP, PROTOCOLID_COMMON,
54206f56b81SYuval Mintz &init_data);
543fe56b9e6SYuval Mintz if (rc)
544fe56b9e6SYuval Mintz return rc;
545fe56b9e6SYuval Mintz
546fe56b9e6SYuval Mintz return qed_spq_post(p_hwfn, p_ent, NULL);
547fe56b9e6SYuval Mintz }
54803dc76caSSudarsana Reddy Kalluru
qed_sp_heartbeat_ramrod(struct qed_hwfn * p_hwfn)54903dc76caSSudarsana Reddy Kalluru int qed_sp_heartbeat_ramrod(struct qed_hwfn *p_hwfn)
55003dc76caSSudarsana Reddy Kalluru {
55103dc76caSSudarsana Reddy Kalluru struct qed_spq_entry *p_ent = NULL;
55203dc76caSSudarsana Reddy Kalluru struct qed_sp_init_data init_data;
55303dc76caSSudarsana Reddy Kalluru int rc;
55403dc76caSSudarsana Reddy Kalluru
55503dc76caSSudarsana Reddy Kalluru /* Get SPQ entry */
55603dc76caSSudarsana Reddy Kalluru memset(&init_data, 0, sizeof(init_data));
55703dc76caSSudarsana Reddy Kalluru init_data.cid = qed_spq_get_cid(p_hwfn);
55803dc76caSSudarsana Reddy Kalluru init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
55903dc76caSSudarsana Reddy Kalluru init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
56003dc76caSSudarsana Reddy Kalluru
56103dc76caSSudarsana Reddy Kalluru rc = qed_sp_init_request(p_hwfn, &p_ent,
56203dc76caSSudarsana Reddy Kalluru COMMON_RAMROD_EMPTY, PROTOCOLID_COMMON,
56303dc76caSSudarsana Reddy Kalluru &init_data);
56403dc76caSSudarsana Reddy Kalluru if (rc)
56503dc76caSSudarsana Reddy Kalluru return rc;
56603dc76caSSudarsana Reddy Kalluru
56703dc76caSSudarsana Reddy Kalluru return qed_spq_post(p_hwfn, p_ent, NULL);
56803dc76caSSudarsana Reddy Kalluru }
5692a351fd9SMintz, Yuval
qed_sp_pf_update_stag(struct qed_hwfn * p_hwfn)5702a351fd9SMintz, Yuval int qed_sp_pf_update_stag(struct qed_hwfn *p_hwfn)
5712a351fd9SMintz, Yuval {
5722a351fd9SMintz, Yuval struct qed_spq_entry *p_ent = NULL;
5732a351fd9SMintz, Yuval struct qed_sp_init_data init_data;
574b9f88982SColin Ian King int rc;
5752a351fd9SMintz, Yuval
5762a351fd9SMintz, Yuval /* Get SPQ entry */
5772a351fd9SMintz, Yuval memset(&init_data, 0, sizeof(init_data));
5782a351fd9SMintz, Yuval init_data.cid = qed_spq_get_cid(p_hwfn);
5792a351fd9SMintz, Yuval init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
5802a351fd9SMintz, Yuval init_data.comp_mode = QED_SPQ_MODE_CB;
5812a351fd9SMintz, Yuval
5822a351fd9SMintz, Yuval rc = qed_sp_init_request(p_hwfn, &p_ent,
5832a351fd9SMintz, Yuval COMMON_RAMROD_PF_UPDATE, PROTOCOLID_COMMON,
5842a351fd9SMintz, Yuval &init_data);
5852a351fd9SMintz, Yuval if (rc)
5862a351fd9SMintz, Yuval return rc;
5872a351fd9SMintz, Yuval
5882a351fd9SMintz, Yuval p_ent->ramrod.pf_update.update_mf_vlan_flag = true;
5892a351fd9SMintz, Yuval p_ent->ramrod.pf_update.mf_vlan = cpu_to_le16(p_hwfn->hw_info.ovlan);
590ebd873a3SSudarsana Reddy Kalluru if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
591ebd873a3SSudarsana Reddy Kalluru p_ent->ramrod.pf_update.mf_vlan |=
592ebd873a3SSudarsana Reddy Kalluru cpu_to_le16(((u16)p_hwfn->ufp_info.tc << 13));
5932a351fd9SMintz, Yuval
5942a351fd9SMintz, Yuval return qed_spq_post(p_hwfn, p_ent, NULL);
5952a351fd9SMintz, Yuval }
596