1 /* QLogic qed NIC Driver
2  * Copyright (c) 2015-2017  QLogic Corporation
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and /or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 #ifndef _QED_RDMA_H
33 #define _QED_RDMA_H
34 #include <linux/types.h>
35 #include <linux/bitops.h>
36 #include <linux/kernel.h>
37 #include <linux/list.h>
38 #include <linux/slab.h>
39 #include <linux/spinlock.h>
40 #include <linux/qed/qed_if.h>
41 #include <linux/qed/qed_rdma_if.h>
42 #include "qed.h"
43 #include "qed_dev_api.h"
44 #include "qed_hsi.h"
45 #include "qed_iwarp.h"
46 #include "qed_roce.h"
47 
48 #define QED_RDMA_MAX_P_KEY                  (1)
49 #define QED_RDMA_MAX_WQE                    (0x7FFF)
50 #define QED_RDMA_MAX_SRQ_WQE_ELEM           (0x7FFF)
51 #define QED_RDMA_PAGE_SIZE_CAPS             (0xFFFFF000)
52 #define QED_RDMA_ACK_DELAY                  (15)
53 #define QED_RDMA_MAX_MR_SIZE                (0x10000000000ULL)
54 #define QED_RDMA_MAX_CQS                    (RDMA_MAX_CQS)
55 #define QED_RDMA_MAX_MRS                    (RDMA_MAX_TIDS)
56 /* Add 1 for header element */
57 #define QED_RDMA_MAX_SRQ_ELEM_PER_WQE	    (RDMA_MAX_SGE_PER_RQ_WQE + 1)
58 #define QED_RDMA_MAX_SGE_PER_SRQ_WQE        (RDMA_MAX_SGE_PER_RQ_WQE)
59 #define QED_RDMA_SRQ_WQE_ELEM_SIZE          (16)
60 #define QED_RDMA_MAX_SRQS                   (32 * 1024)
61 
62 #define QED_RDMA_MAX_CQE_32_BIT             (0x7FFFFFFF - 1)
63 #define QED_RDMA_MAX_CQE_16_BIT             (0x7FFF - 1)
64 
65 /* Up to 2^16 XRC Domains are supported, but the actual number of supported XRC
66  * SRQs is much smaller so there's no need to have that many domains.
67  */
68 #define QED_RDMA_MAX_XRCDS      (roundup_pow_of_two(RDMA_MAX_XRC_SRQS))
69 
70 enum qed_rdma_toggle_bit {
71 	QED_RDMA_TOGGLE_BIT_CLEAR = 0,
72 	QED_RDMA_TOGGLE_BIT_SET = 1
73 };
74 
75 #define QED_RDMA_MAX_BMAP_NAME	(10)
76 struct qed_bmap {
77 	unsigned long *bitmap;
78 	u32 max_count;
79 	char name[QED_RDMA_MAX_BMAP_NAME];
80 };
81 
82 struct qed_rdma_info {
83 	/* spin lock to protect bitmaps */
84 	spinlock_t lock;
85 
86 	struct qed_bmap cq_map;
87 	struct qed_bmap pd_map;
88 	struct qed_bmap xrcd_map;
89 	struct qed_bmap tid_map;
90 	struct qed_bmap qp_map;
91 	struct qed_bmap srq_map;
92 	struct qed_bmap xrc_srq_map;
93 	struct qed_bmap cid_map;
94 	struct qed_bmap tcp_cid_map;
95 	struct qed_bmap real_cid_map;
96 	struct qed_bmap dpi_map;
97 	struct qed_bmap toggle_bits;
98 	struct qed_rdma_events events;
99 	struct qed_rdma_device *dev;
100 	struct qed_rdma_port *port;
101 	u32 last_tid;
102 	u8 num_cnqs;
103 	u32 num_qps;
104 	u32 num_mrs;
105 	u32 num_srqs;
106 	u16 srq_id_offset;
107 	u16 queue_zone_base;
108 	u16 max_queue_zones;
109 	enum protocol_type proto;
110 	struct qed_iwarp_info iwarp;
111 	u8 active:1;
112 };
113 
114 struct qed_rdma_qp {
115 	struct regpair qp_handle;
116 	struct regpair qp_handle_async;
117 	u32 qpid;
118 	u16 icid;
119 	enum qed_roce_qp_state cur_state;
120 	enum qed_rdma_qp_type qp_type;
121 	enum qed_iwarp_qp_state iwarp_state;
122 	bool use_srq;
123 	bool signal_all;
124 	bool fmr_and_reserved_lkey;
125 
126 	bool incoming_rdma_read_en;
127 	bool incoming_rdma_write_en;
128 	bool incoming_atomic_en;
129 	bool e2e_flow_control_en;
130 
131 	u16 pd;
132 	u16 pkey;
133 	u32 dest_qp;
134 	u16 mtu;
135 	u16 srq_id;
136 	u8 traffic_class_tos;
137 	u8 hop_limit_ttl;
138 	u16 dpi;
139 	u32 flow_label;
140 	bool lb_indication;
141 	u16 vlan_id;
142 	u32 ack_timeout;
143 	u8 retry_cnt;
144 	u8 rnr_retry_cnt;
145 	u8 min_rnr_nak_timer;
146 	bool sqd_async;
147 	union qed_gid sgid;
148 	union qed_gid dgid;
149 	enum roce_mode roce_mode;
150 	u16 udp_src_port;
151 	u8 stats_queue;
152 
153 	/* requeseter */
154 	u8 max_rd_atomic_req;
155 	u32 sq_psn;
156 	u16 sq_cq_id;
157 	u16 sq_num_pages;
158 	dma_addr_t sq_pbl_ptr;
159 	void *orq;
160 	dma_addr_t orq_phys_addr;
161 	u8 orq_num_pages;
162 	bool req_offloaded;
163 	bool has_req;
164 
165 	/* responder */
166 	u8 max_rd_atomic_resp;
167 	u32 rq_psn;
168 	u16 rq_cq_id;
169 	u16 rq_num_pages;
170 	u16 xrcd_id;
171 	dma_addr_t rq_pbl_ptr;
172 	void *irq;
173 	dma_addr_t irq_phys_addr;
174 	u8 irq_num_pages;
175 	bool resp_offloaded;
176 	u32 cq_prod;
177 	bool has_resp;
178 
179 	u8 remote_mac_addr[6];
180 	u8 local_mac_addr[6];
181 
182 	void *shared_queue;
183 	dma_addr_t shared_queue_phys_addr;
184 	struct qed_iwarp_ep *ep;
185 	u8 edpm_mode;
186 };
187 
188 static inline bool qed_rdma_is_xrc_qp(struct qed_rdma_qp *qp)
189 {
190 	if (qp->qp_type == QED_RDMA_QP_TYPE_XRC_TGT ||
191 	    qp->qp_type == QED_RDMA_QP_TYPE_XRC_INI)
192 		return true;
193 
194 	return false;
195 }
196 #if IS_ENABLED(CONFIG_QED_RDMA)
197 void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
198 void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
199 int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn);
200 void qed_rdma_info_free(struct qed_hwfn *p_hwfn);
201 #else
202 static inline void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) {}
203 static inline void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn,
204 				    struct qed_ptt *p_ptt) {}
205 static inline int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn) {return -EINVAL;}
206 static inline void qed_rdma_info_free(struct qed_hwfn *p_hwfn) {}
207 #endif
208 
209 int
210 qed_rdma_bmap_alloc(struct qed_hwfn *p_hwfn,
211 		    struct qed_bmap *bmap, u32 max_count, char *name);
212 
213 void
214 qed_rdma_bmap_free(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, bool check);
215 
216 int
217 qed_rdma_bmap_alloc_id(struct qed_hwfn *p_hwfn,
218 		       struct qed_bmap *bmap, u32 *id_num);
219 
220 void
221 qed_bmap_set_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num);
222 
223 void
224 qed_bmap_release_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num);
225 
226 int
227 qed_bmap_test_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num);
228 
229 void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac);
230 
231 bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn);
232 #endif
233