1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* QLogic qed NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 */ 5 6 #ifndef _QED_RDMA_H 7 #define _QED_RDMA_H 8 #include <linux/types.h> 9 #include <linux/bitops.h> 10 #include <linux/kernel.h> 11 #include <linux/list.h> 12 #include <linux/slab.h> 13 #include <linux/spinlock.h> 14 #include <linux/qed/qed_if.h> 15 #include <linux/qed/qed_rdma_if.h> 16 #include "qed.h" 17 #include "qed_dev_api.h" 18 #include "qed_hsi.h" 19 #include "qed_iwarp.h" 20 #include "qed_roce.h" 21 22 #define QED_RDMA_MAX_P_KEY (1) 23 #define QED_RDMA_MAX_WQE (0x7FFF) 24 #define QED_RDMA_MAX_SRQ_WQE_ELEM (0x7FFF) 25 #define QED_RDMA_PAGE_SIZE_CAPS (0xFFFFF000) 26 #define QED_RDMA_ACK_DELAY (15) 27 #define QED_RDMA_MAX_MR_SIZE (0x10000000000ULL) 28 #define QED_RDMA_MAX_CQS (RDMA_MAX_CQS) 29 #define QED_RDMA_MAX_MRS (RDMA_MAX_TIDS) 30 /* Add 1 for header element */ 31 #define QED_RDMA_MAX_SRQ_ELEM_PER_WQE (RDMA_MAX_SGE_PER_RQ_WQE + 1) 32 #define QED_RDMA_MAX_SGE_PER_SRQ_WQE (RDMA_MAX_SGE_PER_RQ_WQE) 33 #define QED_RDMA_SRQ_WQE_ELEM_SIZE (16) 34 #define QED_RDMA_MAX_SRQS (32 * 1024) 35 36 #define QED_RDMA_MAX_CQE_32_BIT (0x7FFFFFFF - 1) 37 #define QED_RDMA_MAX_CQE_16_BIT (0x7FFF - 1) 38 39 /* Up to 2^16 XRC Domains are supported, but the actual number of supported XRC 40 * SRQs is much smaller so there's no need to have that many domains. 41 */ 42 #define QED_RDMA_MAX_XRCDS (roundup_pow_of_two(RDMA_MAX_XRC_SRQS)) 43 44 enum qed_rdma_toggle_bit { 45 QED_RDMA_TOGGLE_BIT_CLEAR = 0, 46 QED_RDMA_TOGGLE_BIT_SET = 1 47 }; 48 49 #define QED_RDMA_MAX_BMAP_NAME (10) 50 struct qed_bmap { 51 unsigned long *bitmap; 52 u32 max_count; 53 char name[QED_RDMA_MAX_BMAP_NAME]; 54 }; 55 56 struct qed_rdma_info { 57 /* spin lock to protect bitmaps */ 58 spinlock_t lock; 59 60 struct qed_bmap cq_map; 61 struct qed_bmap pd_map; 62 struct qed_bmap xrcd_map; 63 struct qed_bmap tid_map; 64 struct qed_bmap qp_map; 65 struct qed_bmap srq_map; 66 struct qed_bmap xrc_srq_map; 67 struct qed_bmap cid_map; 68 struct qed_bmap tcp_cid_map; 69 struct qed_bmap real_cid_map; 70 struct qed_bmap dpi_map; 71 struct qed_bmap toggle_bits; 72 struct qed_rdma_events events; 73 struct qed_rdma_device *dev; 74 struct qed_rdma_port *port; 75 u32 last_tid; 76 u8 num_cnqs; 77 u32 num_qps; 78 u32 num_mrs; 79 u32 num_srqs; 80 u16 srq_id_offset; 81 u16 queue_zone_base; 82 u16 max_queue_zones; 83 enum protocol_type proto; 84 struct qed_iwarp_info iwarp; 85 u8 active:1; 86 }; 87 88 struct qed_rdma_qp { 89 struct regpair qp_handle; 90 struct regpair qp_handle_async; 91 u32 qpid; 92 u16 icid; 93 enum qed_roce_qp_state cur_state; 94 enum qed_rdma_qp_type qp_type; 95 enum qed_iwarp_qp_state iwarp_state; 96 bool use_srq; 97 bool signal_all; 98 bool fmr_and_reserved_lkey; 99 100 bool incoming_rdma_read_en; 101 bool incoming_rdma_write_en; 102 bool incoming_atomic_en; 103 bool e2e_flow_control_en; 104 105 u16 pd; 106 u16 pkey; 107 u32 dest_qp; 108 u16 mtu; 109 u16 srq_id; 110 u8 traffic_class_tos; 111 u8 hop_limit_ttl; 112 u16 dpi; 113 u32 flow_label; 114 bool lb_indication; 115 u16 vlan_id; 116 u32 ack_timeout; 117 u8 retry_cnt; 118 u8 rnr_retry_cnt; 119 u8 min_rnr_nak_timer; 120 bool sqd_async; 121 union qed_gid sgid; 122 union qed_gid dgid; 123 enum roce_mode roce_mode; 124 u16 udp_src_port; 125 u8 stats_queue; 126 127 /* requeseter */ 128 u8 max_rd_atomic_req; 129 u32 sq_psn; 130 u16 sq_cq_id; 131 u16 sq_num_pages; 132 dma_addr_t sq_pbl_ptr; 133 void *orq; 134 dma_addr_t orq_phys_addr; 135 u8 orq_num_pages; 136 bool req_offloaded; 137 bool has_req; 138 139 /* responder */ 140 u8 max_rd_atomic_resp; 141 u32 rq_psn; 142 u16 rq_cq_id; 143 u16 rq_num_pages; 144 u16 xrcd_id; 145 dma_addr_t rq_pbl_ptr; 146 void *irq; 147 dma_addr_t irq_phys_addr; 148 u8 irq_num_pages; 149 bool resp_offloaded; 150 u32 cq_prod; 151 bool has_resp; 152 153 u8 remote_mac_addr[6]; 154 u8 local_mac_addr[6]; 155 156 void *shared_queue; 157 dma_addr_t shared_queue_phys_addr; 158 struct qed_iwarp_ep *ep; 159 u8 edpm_mode; 160 }; 161 162 static inline bool qed_rdma_is_xrc_qp(struct qed_rdma_qp *qp) 163 { 164 if (qp->qp_type == QED_RDMA_QP_TYPE_XRC_TGT || 165 qp->qp_type == QED_RDMA_QP_TYPE_XRC_INI) 166 return true; 167 168 return false; 169 } 170 #if IS_ENABLED(CONFIG_QED_RDMA) 171 void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 172 void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 173 int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn); 174 void qed_rdma_info_free(struct qed_hwfn *p_hwfn); 175 #else 176 static inline void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) {} 177 static inline void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, 178 struct qed_ptt *p_ptt) {} 179 static inline int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn) {return -EINVAL;} 180 static inline void qed_rdma_info_free(struct qed_hwfn *p_hwfn) {} 181 #endif 182 183 int 184 qed_rdma_bmap_alloc(struct qed_hwfn *p_hwfn, 185 struct qed_bmap *bmap, u32 max_count, char *name); 186 187 void 188 qed_rdma_bmap_free(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, bool check); 189 190 int 191 qed_rdma_bmap_alloc_id(struct qed_hwfn *p_hwfn, 192 struct qed_bmap *bmap, u32 *id_num); 193 194 void 195 qed_bmap_set_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num); 196 197 void 198 qed_bmap_release_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num); 199 200 int 201 qed_bmap_test_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num); 202 203 void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac); 204 205 bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn); 206 #endif 207